[llvm-branch-commits] [mlir] d4f1a3c - [mlir] Add microbenchmark for linalg+async-parallel-for

2020-11-21 Thread Eugene Zhulenev via llvm-branch-commits

Author: Eugene Zhulenev
Date: 2020-11-21T03:47:14-08:00
New Revision: d4f1a3c6e2c6031eb45ddb51e3f4fbf50bde6ed8

URL: 
https://github.com/llvm/llvm-project/commit/d4f1a3c6e2c6031eb45ddb51e3f4fbf50bde6ed8
DIFF: 
https://github.com/llvm/llvm-project/commit/d4f1a3c6e2c6031eb45ddb51e3f4fbf50bde6ed8.diff

LOG: [mlir] Add microbenchmark for linalg+async-parallel-for

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D91896

Added: 

mlir/integration_test/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir

Modified: 
mlir/lib/ExecutionEngine/AsyncRuntime.cpp

Removed: 




diff  --git 
a/mlir/integration_test/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
 
b/mlir/integration_test/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
new file mode 100644
index ..553e1c339c0a
--- /dev/null
+++ 
b/mlir/integration_test/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
@@ -0,0 +1,127 @@
+// RUN:   mlir-opt %s  
\
+// RUN:   -linalg-tile-to-parallel-loops="linalg-tile-sizes=256"   
\
+// RUN:   -async-parallel-for="num-concurrent-async-execute=4" 
\
+// RUN:   -async-ref-counting  
\
+// RUN:   -convert-async-to-llvm   
\
+// RUN:   -lower-affine
\
+// RUN:   -convert-linalg-to-loops 
\
+// RUN:   -convert-scf-to-std  
\
+// RUN:   -std-expand  
\
+// RUN:   -convert-vector-to-llvm  
\
+// RUN:   -convert-std-to-llvm 
\
+// RUN: | mlir-cpu-runner  
\
+// RUN:  -e entry -entry-point-result=void -O3 
\
+// RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext 
\
+// RUN:  
-shared-libs=%mlir_integration_test_dir/libmlir_async_runtime%shlibext\
+// RUN: | FileCheck %s --dump-input=always
+
+// RUN:   mlir-opt %s  
\
+// RUN:   -convert-linalg-to-loops 
\
+// RUN:   -convert-scf-to-std  
\
+// RUN:   -convert-vector-to-llvm  
\
+// RUN:   -convert-std-to-llvm 
\
+// RUN: | mlir-cpu-runner  
\
+// RUN:  -e entry -entry-point-result=void -O3 
\
+// RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext 
\
+// RUN:  
-shared-libs=%mlir_integration_test_dir/libmlir_async_runtime%shlibext\
+// RUN: | FileCheck %s --dump-input=always
+
+#map0 = affine_map<(d0, d1) -> (d0, d1)>
+
+func @linalg_generic(%lhs: memref,
+ %rhs: memref,
+ %sum: memref) {
+  linalg.generic {
+indexing_maps = [#map0, #map0, #map0],
+iterator_types = ["parallel", "parallel"]
+  }
+ins(%lhs, %rhs : memref, memref)
+outs(%sum : memref)
+  {
+^bb0(%lhs_in: f32, %rhs_in: f32, %sum_out: f32):
+  %0 = addf %lhs_in, %rhs_in : f32
+  linalg.yield %0 : f32
+  }
+
+  return
+}
+
+func @entry() {
+  %f1 = constant 1.0 : f32
+  %f4 = constant 4.0 : f32
+  %c0 = constant 0 : index
+  %c1 = constant 1 : index
+  %cM = constant 1000 : index
+
+  //
+  // Sanity check for the function under test.
+  //
+
+  %LHS10 = alloc() {alignment = 64} : memref<1x10xf32>
+  %RHS10 = alloc() {alignment = 64} : memref<1x10xf32>
+  %DST10 = alloc() {alignment = 64} : memref<1x10xf32>
+
+  linalg.fill(%LHS10, %f1) : memref<1x10xf32>, f32
+  linalg.fill(%RHS10, %f1) : memref<1x10xf32>, f32
+
+  %LHS = memref_cast %LHS10 : memref<1x10xf32> to memref
+  %RHS = memref_cast %RHS10 : memref<1x10xf32> to memref
+  %DST = memref_cast %DST10 : memref<1x10xf32> to memref
+
+  call @linalg_generic(%LHS, %RHS, %DST)
+: (memref, memref, memref) -> ()
+
+  // CHECK: [2, 2, 2, 2, 2, 2, 2, 2, 2, 2]
+  %U = memref_cast %DST10 :  memref<1x10xf32> to memref<*xf32>
+  call @print_memref_f32(%U): (memref<*xf32>) -> ()
+
+  dealloc %LHS10: memref<1x10xf32>
+  dealloc %RHS10: memref<1x10xf32>
+  dealloc %DST10: memref<1x10xf32>
+
+  //
+  // Allocate data for microbenchmarks.
+  //
+
+  %LHS1024 = alloc() {alignment = 64} : memref<1024x1024xf32>
+  %RHS1024 = alloc() {alignment = 64} : memref<1024x1024xf32>
+  %DST1024 = alloc() {alignment = 64} : memref<1024x1024xf32>
+
+  %LHS0 = memref_cast %LHS1024 : memref<1024x1024xf32> to memref
+  %RHS0 = memref_cast %RHS1

[llvm-branch-commits] [mlir] 13ab072 - [mlir] AsynToLLVM: do no use op->getOperands() in conversion patterns

2020-11-21 Thread Eugene Zhulenev via llvm-branch-commits

Author: Eugene Zhulenev
Date: 2020-11-21T04:57:26-08:00
New Revision: 13ab072b25b062d9510ebc9a7d0e1d2e619e4a34

URL: 
https://github.com/llvm/llvm-project/commit/13ab072b25b062d9510ebc9a7d0e1d2e619e4a34
DIFF: 
https://github.com/llvm/llvm-project/commit/13ab072b25b062d9510ebc9a7d0e1d2e619e4a34.diff

LOG: [mlir] AsynToLLVM: do no use op->getOperands() in conversion patterns

Differential Revision: https://reviews.llvm.org/D91910

Added: 


Modified: 
mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp

Removed: 




diff  --git a/mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp 
b/mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
index b08f7e4c45b7..c36cde1054ed 100644
--- a/mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
+++ b/mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
@@ -592,7 +592,7 @@ class CallOpOpConversion : public ConversionPattern {
 
 CallOp call = cast(op);
 rewriter.replaceOpWithNewOp(op, resultTypes, call.callee(),
-call.getOperands());
+operands);
 
 return success();
   }
@@ -733,7 +733,7 @@ class AwaitOpLoweringBase : public ConversionPattern {
 // async API await function call.
 if (!isInCoroutine)
   rewriter.create(loc, TypeRange(), blockingAwaitFuncName,
-  ValueRange(op->getOperand(0)));
+  ValueRange(operands[0]));
 
 // Inside the coroutine we convert await operation into coroutine 
suspension
 // point, and resume execution asynchronously.
@@ -755,8 +755,8 @@ class AwaitOpLoweringBase : public ConversionPattern {
 
   // Call async runtime API to resume a coroutine in the managed thread 
when
   // the async await argument becomes ready.
-  SmallVector awaitAndExecuteArgs = {
-  await.getOperand(), coro.coroHandle, resumePtr.res()};
+  SmallVector awaitAndExecuteArgs = {operands[0], 
coro.coroHandle,
+   resumePtr.res()};
   builder.create(loc, TypeRange(), coroAwaitFuncName,
  awaitAndExecuteArgs);
 



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[llvm-branch-commits] [llvm] 42ecf18 - [flang][openmp] Fix bug in `OmpClause::Hint` clause which was missing to generate inside in OMP.cpp.inc file.

2020-11-21 Thread Sameeran joshi via llvm-branch-commits

Author: sameeran joshi
Date: 2020-11-21T19:02:34+05:30
New Revision: 42ecf188b5ae1199d5b7405c521a3e72f80e7e94

URL: 
https://github.com/llvm/llvm-project/commit/42ecf188b5ae1199d5b7405c521a3e72f80e7e94
DIFF: 
https://github.com/llvm/llvm-project/commit/42ecf188b5ae1199d5b7405c521a3e72f80e7e94.diff

LOG: [flang][openmp] Fix bug in `OmpClause::Hint` clause which was missing to 
generate inside in OMP.cpp.inc file.

Before this patch "Hint" isn't found inside the generated file.
./bin/llvm-tblgen --gen-directive-gen 
../llvm-project/llvm/include/llvm/Frontend/OpenMP/OMP.td -I 
../llvm-project/llvm/include/ > OMP.cpp.in

Reviewed By: clementval

Differential Revision: https://reviews.llvm.org/D91909

Added: 


Modified: 
flang/lib/Parser/openmp-parsers.cpp
llvm/include/llvm/Frontend/OpenMP/OMP.td

Removed: 




diff  --git a/flang/lib/Parser/openmp-parsers.cpp 
b/flang/lib/Parser/openmp-parsers.cpp
index 5a7fd3d9c353..8ad13dffea04 100644
--- a/flang/lib/Parser/openmp-parsers.cpp
+++ b/flang/lib/Parser/openmp-parsers.cpp
@@ -184,7 +184,8 @@ TYPE_PARSER(
   parenthesized(Parser{}))) ||
 "GRAINSIZE" >> construct(construct(
parenthesized(scalarIntExpr))) ||
-"HINT" >> construct(parenthesized(constantExpr)) ||
+"HINT" >> construct(
+  construct(parenthesized(constantExpr))) ||
 "IF" >> construct(parenthesized(Parser{})) ||
 "INBRANCH" >> construct(construct()) ||
 "IS_DEVICE_PTR" >> construct(construct(

diff  --git a/llvm/include/llvm/Frontend/OpenMP/OMP.td 
b/llvm/include/llvm/Frontend/OpenMP/OMP.td
index 1ecf075c38a9..e73517697547 100644
--- a/llvm/include/llvm/Frontend/OpenMP/OMP.td
+++ b/llvm/include/llvm/Frontend/OpenMP/OMP.td
@@ -200,7 +200,7 @@ def OMPC_NumTasks : Clause<"num_tasks"> {
 }
 def OMPC_Hint : Clause<"hint"> {
   let clangClass = "OMPHintClause";
-  let flangClass = "ConstantExpr";
+  let flangClassValue = "ConstantExpr";
 }
 def OMPC_DistSchedule : Clause<"dist_schedule"> {
   let clangClass = "OMPDistScheduleClause";



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[llvm-branch-commits] [mlir] f2df67e - [mlir] Fix async microbench integration test

2020-11-21 Thread Eugene Zhulenev via llvm-branch-commits

Author: Eugene Zhulenev
Date: 2020-11-21T07:02:24-08:00
New Revision: f2df67e2a69e15b3e1117d99d076ffcdaeb2304f

URL: 
https://github.com/llvm/llvm-project/commit/f2df67e2a69e15b3e1117d99d076ffcdaeb2304f
DIFF: 
https://github.com/llvm/llvm-project/commit/f2df67e2a69e15b3e1117d99d076ffcdaeb2304f.diff

LOG: [mlir] Fix async microbench integration test

Differential Revision: https://reviews.llvm.org/D91912

Added: 


Modified: 

mlir/integration_test/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir

Removed: 




diff  --git 
a/mlir/integration_test/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
 
b/mlir/integration_test/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
index 553e1c339c0a..189eeaefc21d 100644
--- 
a/mlir/integration_test/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
+++ 
b/mlir/integration_test/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
@@ -10,9 +10,10 @@
 // RUN:   -convert-vector-to-llvm  
\
 // RUN:   -convert-std-to-llvm 
\
 // RUN: | mlir-cpu-runner  
\
-// RUN:  -e entry -entry-point-result=void -O3 
\
-// RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext 
\
-// RUN:  
-shared-libs=%mlir_integration_test_dir/libmlir_async_runtime%shlibext\
+// RUN: -e entry -entry-point-result=void -O3  
\
+// RUN: -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext  
\
+// RUN: 
-shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext\
+// RUN: -shared-libs=%mlir_integration_test_dir/libmlir_async_runtime%shlibext 
\
 // RUN: | FileCheck %s --dump-input=always
 
 // RUN:   mlir-opt %s  
\
@@ -21,9 +22,10 @@
 // RUN:   -convert-vector-to-llvm  
\
 // RUN:   -convert-std-to-llvm 
\
 // RUN: | mlir-cpu-runner  
\
-// RUN:  -e entry -entry-point-result=void -O3 
\
-// RUN:  -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext 
\
-// RUN:  
-shared-libs=%mlir_integration_test_dir/libmlir_async_runtime%shlibext\
+// RUN: -e entry -entry-point-result=void -O3  
\
+// RUN: -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext  
\
+// RUN: 
-shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext\
+// RUN: -shared-libs=%mlir_integration_test_dir/libmlir_async_runtime%shlibext 
\
 // RUN: | FileCheck %s --dump-input=always
 
 #map0 = affine_map<(d0, d1) -> (d0, d1)>



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[llvm-branch-commits] [clang] 9930d4d - [NFC, Refactor] Modernize enum FunctionDefinitionKind (DeclSpech.h) into a scoped enum

2020-11-21 Thread Faisal Vali via llvm-branch-commits

Author: Faisal Vali
Date: 2020-11-21T09:49:52-06:00
New Revision: 9930d4dff31a130890f21a64f43d530a83ae3d0a

URL: 
https://github.com/llvm/llvm-project/commit/9930d4dff31a130890f21a64f43d530a83ae3d0a
DIFF: 
https://github.com/llvm/llvm-project/commit/9930d4dff31a130890f21a64f43d530a83ae3d0a.diff

LOG: [NFC, Refactor] Modernize enum FunctionDefinitionKind (DeclSpech.h) into a 
scoped enum

Reviewed by aaron.ballman, rsmith, wchilders
Highlights of review:
- avoid specifying an underlying type (unless such an enum is stored (or part 
of an abi?))
- avoid using enums as bit-fields, preferring unsigned bit-fields that we 
static_cast enumerators to. (MS's abi laysout enum bit-fields differently).
- clang-format, clang-format, clang-format.

https://reviews.llvm.org/D91035

Thank you!

Added: 


Modified: 
clang/include/clang/Sema/DeclSpec.h
clang/lib/Parse/ParseCXXInlineMethods.cpp
clang/lib/Parse/ParseDeclCXX.cpp
clang/lib/Parse/ParseExpr.cpp
clang/lib/Parse/Parser.cpp
clang/lib/Sema/SemaDecl.cpp
clang/lib/Sema/SemaOpenMP.cpp
clang/lib/Sema/SemaType.cpp

Removed: 




diff  --git a/clang/include/clang/Sema/DeclSpec.h 
b/clang/include/clang/Sema/DeclSpec.h
index d2acafc2e4b3..afcbbaa5cfa7 100644
--- a/clang/include/clang/Sema/DeclSpec.h
+++ b/clang/include/clang/Sema/DeclSpec.h
@@ -1748,11 +1748,11 @@ class DecompositionDeclarator {
 
 /// Described the kind of function definition (if any) provided for
 /// a function.
-enum FunctionDefinitionKind {
-  FDK_Declaration,
-  FDK_Definition,
-  FDK_Defaulted,
-  FDK_Deleted
+enum class FunctionDefinitionKind {
+  Declaration,
+  Definition,
+  Defaulted,
+  Deleted
 };
 
 enum class DeclaratorContext {
@@ -1888,7 +1888,8 @@ class Declarator {
   Declarator(const DeclSpec &ds, DeclaratorContext C)
   : DS(ds), Range(ds.getSourceRange()), Context(C),
 InvalidType(DS.getTypeSpecType() == DeclSpec::TST_error),
-GroupingParens(false), FunctionDefinition(FDK_Declaration),
+GroupingParens(false), FunctionDefinition(static_cast(
+   FunctionDefinitionKind::Declaration)),
 Redeclaration(false), Extension(false), ObjCIvar(false),
 ObjCWeakProperty(false), InlineStorageUsed(false),
 Attrs(ds.getAttributePool().getFactory()), AsmLabel(nullptr),
@@ -2562,11 +2563,11 @@ class Declarator {
   void setEllipsisLoc(SourceLocation EL) { EllipsisLoc = EL; }
 
   void setFunctionDefinitionKind(FunctionDefinitionKind Val) {
-FunctionDefinition = Val;
+FunctionDefinition = static_cast(Val);
   }
 
   bool isFunctionDefinition() const {
-return getFunctionDefinitionKind() != FDK_Declaration;
+return getFunctionDefinitionKind() != FunctionDefinitionKind::Declaration;
   }
 
   FunctionDefinitionKind getFunctionDefinitionKind() const {

diff  --git a/clang/lib/Parse/ParseCXXInlineMethods.cpp 
b/clang/lib/Parse/ParseCXXInlineMethods.cpp
index 12941f214cbc..b0335905b6f8 100644
--- a/clang/lib/Parse/ParseCXXInlineMethods.cpp
+++ b/clang/lib/Parse/ParseCXXInlineMethods.cpp
@@ -108,7 +108,7 @@ NamedDecl *Parser::ParseCXXInlineMethodDef(
   // or if we are about to parse function member template then consume
   // the tokens and store them for parsing at the end of the translation unit.
   if (getLangOpts().DelayedTemplateParsing &&
-  D.getFunctionDefinitionKind() == FDK_Definition &&
+  D.getFunctionDefinitionKind() == FunctionDefinitionKind::Definition &&
   !D.getDeclSpec().hasConstexprSpecifier() &&
   !(FnD && FnD->getAsFunction() &&
 FnD->getAsFunction()->getReturnType()->getContainedAutoType()) &&

diff  --git a/clang/lib/Parse/ParseDeclCXX.cpp 
b/clang/lib/Parse/ParseDeclCXX.cpp
index 0a810fc393a6..9525c0222b9f 100644
--- a/clang/lib/Parse/ParseDeclCXX.cpp
+++ b/clang/lib/Parse/ParseDeclCXX.cpp
@@ -1045,8 +1045,16 @@ void Parser::AnnotateExistingDecltypeSpecifier(const 
DeclSpec& DS,
SourceLocation StartLoc,
SourceLocation EndLoc) {
   // make sure we have a token we can turn into an annotation token
-  if (PP.isBacktrackEnabled())
+  if (PP.isBacktrackEnabled()) {
 PP.RevertCachedTokens(1);
+if (DS.getTypeSpecType() == TST_error) {
+  // We encountered an error in parsing 'decltype(...)' so lets annotate 
all
+  // the tokens in the backtracking cache - that we likely had to skip over
+  // to get to a token that allows us to resume parsing, such as a
+  // semi-colon.
+  EndLoc = PP.getLastCachedTokenLocation();
+}
+  }
   else
 PP.EnterToken(Tok, /*IsReinject*/true);
 
@@ -2707,23 +2715,23 @@ Parser::ParseCXXClassMemberDeclaration(AccessSpecifier 
AS,
 if (getLangOpts().MicrosoftExt && DeclaratorInfo.isDeclarationOfFunction())
   TryConsumePureSpecifier(/*AllowDefinition*/ true);
 
-FunctionDefinitionKi

[llvm-branch-commits] [llvm] 9b7b8de - [TableGen] [ISel Matcher Emitter] Rework with two passes: one to size, one to emit

2020-11-21 Thread Paul C. Anagnostopoulos via llvm-branch-commits

Author: Paul C. Anagnostopoulos
Date: 2020-11-21T10:59:13-05:00
New Revision: 9b7b8de6d12ff2e0bb7aa813f83a8053d302bc2b

URL: 
https://github.com/llvm/llvm-project/commit/9b7b8de6d12ff2e0bb7aa813f83a8053d302bc2b
DIFF: 
https://github.com/llvm/llvm-project/commit/9b7b8de6d12ff2e0bb7aa813f83a8053d302bc2b.diff

LOG: [TableGen] [ISel Matcher Emitter] Rework with two passes: one to size, one 
to emit

Differential Revision: https://reviews.llvm.org/D91632

Added: 


Modified: 
llvm/utils/TableGen/DAGISelMatcher.h
llvm/utils/TableGen/DAGISelMatcherEmitter.cpp

Removed: 




diff  --git a/llvm/utils/TableGen/DAGISelMatcher.h 
b/llvm/utils/TableGen/DAGISelMatcher.h
index 223513fc8d38..dca1865b22e0 100644
--- a/llvm/utils/TableGen/DAGISelMatcher.h
+++ b/llvm/utils/TableGen/DAGISelMatcher.h
@@ -31,7 +31,7 @@ Matcher *ConvertPatternToMatcher(const PatternToMatch 
&Pattern,unsigned Variant,
  const CodeGenDAGPatterns &CGP);
 void OptimizeMatcher(std::unique_ptr &Matcher,
  const CodeGenDAGPatterns &CGP);
-void EmitMatcherTable(const Matcher *Matcher, const CodeGenDAGPatterns &CGP,
+void EmitMatcherTable(Matcher *Matcher, const CodeGenDAGPatterns &CGP,
   raw_ostream &OS);
 
 
@@ -41,6 +41,7 @@ class Matcher {
   // The next matcher node that is executed after this one.  Null if this is 
the
   // last stage of a match.
   std::unique_ptr Next;
+  size_t Size; // Size in bytes of matcher and all its children (if any).
   virtual void anchor();
 public:
   enum KindTy {
@@ -85,7 +86,10 @@ class Matcher {
 EmitNode, // Create a DAG node
 EmitNodeXForm,// Run a SDNodeXForm
 CompleteMatch,// Finish a match and update the results.
-MorphNodeTo   // Build a node, finish a match and update results.
+MorphNodeTo,  // Build a node, finish a match and update results.
+
+// Highest enum value; watch out when adding more.
+HighestKind = MorphNodeTo
   };
   const KindTy Kind;
 
@@ -94,6 +98,8 @@ class Matcher {
 public:
   virtual ~Matcher() {}
 
+  unsigned getSize() const { return Size; }
+  void setSize(unsigned sz) { Size = sz; }
   KindTy getKind() const { return Kind; }
 
   Matcher *getNext() { return Next.get(); }

diff  --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp 
b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
index cf92391f30c4..03528a46aea7 100644
--- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -23,6 +23,7 @@
 #include "llvm/Support/SourceMgr.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
+
 using namespace llvm;
 
 enum {
@@ -47,6 +48,8 @@ namespace {
 class MatcherTableEmitter {
   const CodeGenDAGPatterns &CGP;
 
+  SmallVector OpcodeCounts;
+
   DenseMap NodePredicateMap;
   std::vector NodePredicates;
   std::vector NodePredicatesWithOperands;
@@ -79,12 +82,15 @@ class MatcherTableEmitter {
   }
 
 public:
-  MatcherTableEmitter(const CodeGenDAGPatterns &cgp)
-: CGP(cgp) {}
+  MatcherTableEmitter(const CodeGenDAGPatterns &cgp) : CGP(cgp) {
+OpcodeCounts.assign(Matcher::HighestKind+1, 0);
+  }
 
-  unsigned EmitMatcherList(const Matcher *N, unsigned Indent,
+  unsigned EmitMatcherList(const Matcher *N, const unsigned Indent,
unsigned StartIdx, raw_ostream &OS);
 
+  unsigned SizeMatcherList(Matcher *N, raw_ostream &OS);
+
   void EmitPredicateFunctions(raw_ostream &OS);
 
   void EmitHistogram(const Matcher *N, raw_ostream &OS);
@@ -95,7 +101,9 @@ class MatcherTableEmitter {
   void EmitNodePredicatesFunction(const std::vector &Preds,
   StringRef Decl, raw_ostream &OS);
 
-  unsigned EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
+  unsigned SizeMatcher(Matcher *N, raw_ostream &OS);
+
+  unsigned EmitMatcher(const Matcher *N, const unsigned Indent, unsigned 
CurrentIdx,
raw_ostream &OS);
 
   unsigned getNodePredicate(TreePredicateFn Pred) {
@@ -165,7 +173,7 @@ static std::string GetPatFromTreePatternNode(const 
TreePatternNode *N) {
   return str;
 }
 
-static unsigned GetVBRSize(unsigned Val) {
+static size_t GetVBRSize(unsigned Val) {
   if (Val <= 127) return 1;
 
   unsigned NumBytes = 0;
@@ -219,6 +227,78 @@ static std::string getIncludePath(const Record *R) {
   return str;
 }
 
+/// This function traverses the matcher tree and sizes all the nodes
+/// that are children of the three kinds of nodes that have them.
+unsigned MatcherTableEmitter::
+SizeMatcherList(Matcher *N, raw_ostream &OS) {
+  unsigned Size = 0;
+  while (N) {
+Size += SizeMatcher(N, OS);
+N = N->getNext();
+  }
+  return Size;
+}
+
+/// This function sizes the children of the three kinds of nodes that
+/// have them. It does so by using special cases for those three
+/// nodes, but sharing th

[llvm-branch-commits] [lldb] 8aea95f - [lldb] Reland "Use translated full ftag values"

2020-11-21 Thread Michał Górny via llvm-branch-commits

Author: Michał Górny
Date: 2020-11-21T17:11:38+01:00
New Revision: 8aea95f3cb4ef72cc9146ca5a01af15f036acd19

URL: 
https://github.com/llvm/llvm-project/commit/8aea95f3cb4ef72cc9146ca5a01af15f036acd19
DIFF: 
https://github.com/llvm/llvm-project/commit/8aea95f3cb4ef72cc9146ca5a01af15f036acd19.diff

LOG: [lldb] Reland "Use translated full ftag values"

Translate between abridged and full ftag values in order to expose
the latter in the gdb-remote protocol while the former are used by
FXSAVE/XSAVE...  This matches the gdb behavior.

The Shell/Register tests now rely on the new behavior, and therefore
are run on non-Darwin systems only.  The Python (API) test relies
on the legacy behavior, and is run on Darwin only.

Differential Revision: https://reviews.llvm.org/D91504

Added: 
lldb/source/Plugins/Process/Utility/RegisterContext_x86.cpp
lldb/unittests/Process/Utility/RegisterContextTest.cpp

Modified: 

lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
lldb/source/Plugins/Process/Utility/CMakeLists.txt
lldb/source/Plugins/Process/Utility/RegisterContext_x86.h
lldb/test/API/commands/register/register/register_command/TestRegisters.py
lldb/test/Shell/Register/x86-64-fp-read.test
lldb/test/Shell/Register/x86-64-fp-write.test
lldb/test/Shell/Register/x86-fp-read.test
lldb/test/Shell/Register/x86-fp-write.test
lldb/unittests/Process/Utility/CMakeLists.txt

Removed: 




diff  --git 
a/lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
 
b/lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
index ea2494dabf27..ea5400c55713 100644
--- 
a/lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
+++ 
b/lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
@@ -451,10 +451,16 @@ NativeRegisterContextFreeBSD_x86_64::ReadRegister(const 
RegisterInfo *reg_info,
   switch (set) {
   case GPRegSet:
   case FPRegSet:
-  case DBRegSet:
-reg_value.SetBytes(GetOffsetRegSetData(set, reg_info->byte_offset),
-   reg_info->byte_size, endian::InlHostByteOrder());
+  case DBRegSet: {
+void *data = GetOffsetRegSetData(set, reg_info->byte_offset);
+FXSAVE *fpr = reinterpret_cast(m_fpr.data());
+if (data == &fpr->ftag) // ftag
+  reg_value.SetUInt16(
+  AbridgedToFullTagWord(fpr->ftag, fpr->fstat, fpr->stmm));
+else
+  reg_value.SetBytes(data, reg_info->byte_size, 
endian::InlHostByteOrder());
 break;
+  }
   case YMMRegSet: {
 llvm::Optional ymm_reg = GetYMMSplitReg(reg);
 if (!ymm_reg) {
@@ -511,10 +517,15 @@ Status NativeRegisterContextFreeBSD_x86_64::WriteRegister(
   switch (set) {
   case GPRegSet:
   case FPRegSet:
-  case DBRegSet:
-::memcpy(GetOffsetRegSetData(set, reg_info->byte_offset),
- reg_value.GetBytes(), reg_value.GetByteSize());
+  case DBRegSet: {
+void *data = GetOffsetRegSetData(set, reg_info->byte_offset);
+FXSAVE *fpr = reinterpret_cast(m_fpr.data());
+if (data == &fpr->ftag) // ftag
+  fpr->ftag = FullToAbridgedTagWord(reg_value.GetAsUInt16());
+else
+  ::memcpy(data, reg_value.GetBytes(), reg_value.GetByteSize());
 break;
+  }
   case YMMRegSet: {
 llvm::Optional ymm_reg = GetYMMSplitReg(reg);
 if (!ymm_reg) {

diff  --git 
a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp 
b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
index 20cd5e3f62ff..6462441249c0 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
@@ -530,6 +530,13 @@ NativeRegisterContextLinux_x86_64::ReadRegister(const 
RegisterInfo *reg_info,
   assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(FPR));
   uint8_t *src = (uint8_t *)m_xstate.get() + reg_info->byte_offset -
  m_fctrl_offset_in_userarea;
+
+  if (src == reinterpret_cast(&m_xstate->fxsave.ftag)) {
+reg_value.SetUInt16(AbridgedToFullTagWord(
+m_xstate->fxsave.ftag, m_xstate->fxsave.fstat, m_xstate->fxsave.stmm));
+return error;
+  }
+
   switch (reg_info->byte_size) {
   case 1:
 reg_value.SetUInt8(*(uint8_t *)src);
@@ -639,23 +646,28 @@ Status NativeRegisterContextLinux_x86_64::WriteRegister(
  sizeof(FPR));
   uint8_t *dst = (uint8_t *)m_xstate.get() + reg_info->byte_offset -
  m_fctrl_offset_in_userarea;
-  switch (reg_info->byte_size) {
-  case 1:
-*(uint8_t *)dst = reg_value.GetAsUInt8();
-break;
-  case 2:
-*(uint16_t *)dst = reg_value.GetAsUInt16();
-break;

[llvm-branch-commits] [llvm] 072ddff - [BasicAA] Add recphi test with dynamic offset (NFC)

2020-11-21 Thread Nikita Popov via llvm-branch-commits

Author: Nikita Popov
Date: 2020-11-21T17:37:41+01:00
New Revision: 072ddff3f20787fd82ed8ee7f019db5f594b8a08

URL: 
https://github.com/llvm/llvm-project/commit/072ddff3f20787fd82ed8ee7f019db5f594b8a08
DIFF: 
https://github.com/llvm/llvm-project/commit/072ddff3f20787fd82ed8ee7f019db5f594b8a08.diff

LOG: [BasicAA] Add recphi test with dynamic offset (NFC)

Currently, we don't recognize that %a an %p don't alias.

Added: 


Modified: 
llvm/test/Analysis/BasicAA/recphi.ll

Removed: 




diff  --git a/llvm/test/Analysis/BasicAA/recphi.ll 
b/llvm/test/Analysis/BasicAA/recphi.ll
index f0ddb8c94751..26114fc60e1c 100644
--- a/llvm/test/Analysis/BasicAA/recphi.ll
+++ b/llvm/test/Analysis/BasicAA/recphi.ll
@@ -188,6 +188,28 @@ bb5:  ; preds 
= %bb3, %bb4
   ret i16 0
 }
 
+; CHECK-LABEL: Function: dynamic_offset
+; CHECK: NoAlias:  i8* %a, i8* %p.base
+; CHECK: MayAlias: i8* %p, i8* %p.base
+; CHECK: MayAlias: i8* %a, i8* %p
+; CHECK: MayAlias: i8* %p.base, i8* %p.next
+; CHECK: MayAlias: i8* %a, i8* %p.next
+; CHECK: MayAlias: i8* %p, i8* %p.next
+define void @dynamic_offset(i1 %c, i8* noalias %p.base) {
+entry:
+  %a = alloca i8
+  br label %loop
+
+loop:
+  %p = phi i8* [ %p.base, %entry ], [ %p.next, %loop ]
+  %offset = call i16 @call(i32 0)
+  %p.next = getelementptr inbounds i8, i8* %p, i16 %offset
+  br i1 %c, label %loop, label %exit
+
+exit:
+  ret void
+}
+
 ; TODO: Currently yields an asymmetric result.
 ; CHECK-LABEL: Function: symmetry
 ; CHECK: MayAlias:  i32* %p, i32* %p.base



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[llvm-branch-commits] [llvm] 1df8fa7 - [Flang][OpenMP][NFC][2/2] Reorder OmpStructureChecker and simplify it.

2020-11-21 Thread Sameeran joshi via llvm-branch-commits

Author: sameeran joshi
Date: 2020-11-21T22:37:35+05:30
New Revision: 1df8fa78e652d112c83d21096e5f2750f70f5b66

URL: 
https://github.com/llvm/llvm-project/commit/1df8fa78e652d112c83d21096e5f2750f70f5b66
DIFF: 
https://github.com/llvm/llvm-project/commit/1df8fa78e652d112c83d21096e5f2750f70f5b66.diff

LOG: [Flang][OpenMP][NFC][2/2] Reorder OmpStructureChecker and simplify it.

`OmpStructureChecker` has too much boilerplate code in source file.

This patch:
  1. Use helpers from `check-directive-structure.h` and reduces the boilerplate.
  2. Use TableGen infrastructure as much as possible.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D90834

Added: 


Modified: 
flang/lib/Semantics/check-omp-structure.cpp
flang/lib/Semantics/check-omp-structure.h
flang/test/Semantics/omp-clause-validity01.f90
flang/test/Semantics/omp-combined-constructs.f90
flang/test/Semantics/omp-device-constructs.f90
llvm/include/llvm/Frontend/OpenMP/OMP.td

Removed: 




diff  --git a/flang/lib/Semantics/check-omp-structure.cpp 
b/flang/lib/Semantics/check-omp-structure.cpp
index 93787672b444..3cf77137ec12 100644
--- a/flang/lib/Semantics/check-omp-structure.cpp
+++ b/flang/lib/Semantics/check-omp-structure.cpp
@@ -9,6 +9,7 @@
 #include "check-omp-structure.h"
 #include "flang/Parser/parse-tree.h"
 #include "flang/Semantics/tools.h"
+#include 
 
 namespace Fortran::semantics {
 
@@ -160,8 +161,8 @@ void OmpStructureChecker::Enter(const 
parser::OmpEndSectionsDirective &x) {
   switch (dir.v) {
 // 2.7.2 end-sections -> END SECTIONS [nowait-clause]
   case llvm::omp::Directive::OMPD_sections:
-SetContextDirectiveEnum(llvm::omp::Directive::OMPD_end_sections);
-SetContextAllowedOnce(OmpClauseSet{llvm::omp::Clause::OMPC_nowait});
+PushContextAndClauseSets(
+dir.source, llvm::omp::Directive::OMPD_end_sections);
 break;
   default:
 // no clauses are allowed
@@ -183,8 +184,7 @@ void OmpStructureChecker::Enter(const 
parser::OpenMPDeclareTargetConstruct &x) {
   PushContext(dir.source, llvm::omp::Directive::OMPD_declare_target);
   const auto &spec{std::get(x.t)};
   if (std::holds_alternative(spec.u)) {
-SetContextAllowed(
-OmpClauseSet{llvm::omp::Clause::OMPC_to, 
llvm::omp::Clause::OMPC_link});
+SetClauseSets(llvm::omp::Directive::OMPD_declare_target);
   }
 }
 
@@ -248,17 +248,13 @@ void OmpStructureChecker::Enter(const 
parser::OmpEndBlockDirective &x) {
   switch (dir.v) {
   // 2.7.3 end-single-clause -> copyprivate-clause |
   //nowait-clause
-  case llvm::omp::Directive::OMPD_single: {
-SetContextDirectiveEnum(llvm::omp::Directive::OMPD_end_single);
-OmpClauseSet allowed{llvm::omp::Clause::OMPC_copyprivate};
-SetContextAllowed(allowed);
-OmpClauseSet allowedOnce{llvm::omp::Clause::OMPC_nowait};
-SetContextAllowedOnce(allowedOnce);
-  } break;
+  case llvm::omp::Directive::OMPD_single:
+PushContextAndClauseSets(dir.source, 
llvm::omp::Directive::OMPD_end_single);
+break;
   // 2.7.4 end-workshare -> END WORKSHARE [nowait-clause]
   case llvm::omp::Directive::OMPD_workshare:
-SetContextDirectiveEnum(llvm::omp::Directive::OMPD_end_workshare);
-SetContextAllowed(OmpClauseSet{llvm::omp::Clause::OMPC_nowait});
+PushContextAndClauseSets(
+dir.source, llvm::omp::Directive::OMPD_end_workshare);
 break;
   default:
 // no clauses are allowed
@@ -300,11 +296,8 @@ void OmpStructureChecker::Leave(const 
parser::OmpClauseList &) {
   std::get(clause->u)};
 
   if (orderedClause.v) {
-if (FindClause(llvm::omp::Clause::OMPC_linear)) {
-  context_.Say(clause->source,
-  "A loop directive may not have both a LINEAR clause and "
-  "an ORDERED clause with a parameter"_err_en_US);
-}
+CheckNotAllowedIfClause(
+llvm::omp::Clause::OMPC_ordered, {llvm::omp::Clause::OMPC_linear});
 
 if (auto *clause2{FindClause(llvm::omp::Clause::OMPC_collapse)}) {
   const auto &collapseClause{
@@ -347,19 +340,13 @@ void OmpStructureChecker::Leave(const 
parser::OmpClauseList &) {
 }
   }
 }
-
 // TODO: A list-item cannot appear in more than one aligned clause
   } // SIMD
 
   // 2.7.3 Single Construct Restriction
   if (GetContext().directive == llvm::omp::Directive::OMPD_end_single) {
-if (auto *clause{FindClause(llvm::omp::Clause::OMPC_copyprivate)}) {
-  if (FindClause(llvm::omp::Clause::OMPC_nowait)) {
-context_.Say(clause->source,
-"The COPYPRIVATE clause must not be used with "
-"the NOWAIT clause"_err_en_US);
-  }
-}
+CheckNotAllowedIfClause(
+llvm::omp::Clause::OMPC_copyprivate, {llvm::omp::Clause::OMPC_nowait});
   }
 
   GetContext().requiredClauses.IterateOverMembers(
@@ -410,7 +397,6 @@ void OmpStructureChecker::E

[llvm-branch-commits] [llvm] 63626a1 - [X86] Regenerate vector-reduce-or-cmp.ll

2020-11-21 Thread Simon Pilgrim via llvm-branch-commits

Author: Simon Pilgrim
Date: 2020-11-21T17:11:25Z
New Revision: 63626a1995847f9d8fdb652eef9cf240db44003f

URL: 
https://github.com/llvm/llvm-project/commit/63626a1995847f9d8fdb652eef9cf240db44003f
DIFF: 
https://github.com/llvm/llvm-project/commit/63626a1995847f9d8fdb652eef9cf240db44003f.diff

LOG: [X86] Regenerate vector-reduce-or-cmp.ll

Fix AVX512 prefixes to appease update_llc_test_checks.py

Added: 


Modified: 
llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll 
b/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
index 1d00782f2177..a06c7052044e 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
@@ -3,8 +3,8 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s 
--check-prefixes=SSE,SSE41
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s 
--check-prefixes=AVX,AVX1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s 
--check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | 
FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown 
-mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | 
FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown 
-mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s 
--check-prefixes=AVX,AVX512,AVX512BWVL
 
 ;
 ; vXi64
@@ -1122,22 +1122,43 @@ define i32 @mask_v3i1(<3 x i32> %a, <3 x i32> %b) {
 ; AVX2-NEXT:movl $1, %eax
 ; AVX2-NEXT:retq
 ;
-; AVX512-LABEL: mask_v3i1:
-; AVX512:   # %bb.0:
-; AVX512: vpcmpneqd %{{.}}mm1, %{{.}}mm0, %k0
-; AVX512-NEXT:kshiftrw $2, %k0, %k1
-; AVX512-NEXT:korw %k1, %k0, %k1
-; AVX512-NEXT:kshiftrw $1, %k0, %k0
-; AVX512-NEXT:korw %k0, %k1, %k0
-; AVX512-NEXT:kmovd %k0, %eax
-; AVX512-NEXT:testb $1, %al
-; AVX512-NEXT:je .LBB27_2
-; AVX512-NEXT:  # %bb.1:
-; AVX512-NEXT:xorl %eax, %eax
-; AVX512: retq
-; AVX512-NEXT:  .LBB27_2:
-; AVX512-NEXT:movl $1, %eax
-; AVX512: retq
+; AVX512BW-LABEL: mask_v3i1:
+; AVX512BW:   # %bb.0:
+; AVX512BW-NEXT:# kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512BW-NEXT:# kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512BW-NEXT:vpcmpneqd %zmm1, %zmm0, %k0
+; AVX512BW-NEXT:kshiftrw $2, %k0, %k1
+; AVX512BW-NEXT:korw %k1, %k0, %k1
+; AVX512BW-NEXT:kshiftrw $1, %k0, %k0
+; AVX512BW-NEXT:korw %k0, %k1, %k0
+; AVX512BW-NEXT:kmovd %k0, %eax
+; AVX512BW-NEXT:testb $1, %al
+; AVX512BW-NEXT:je .LBB27_2
+; AVX512BW-NEXT:  # %bb.1:
+; AVX512BW-NEXT:xorl %eax, %eax
+; AVX512BW-NEXT:vzeroupper
+; AVX512BW-NEXT:retq
+; AVX512BW-NEXT:  .LBB27_2:
+; AVX512BW-NEXT:movl $1, %eax
+; AVX512BW-NEXT:vzeroupper
+; AVX512BW-NEXT:retq
+;
+; AVX512BWVL-LABEL: mask_v3i1:
+; AVX512BWVL:   # %bb.0:
+; AVX512BWVL-NEXT:vpcmpneqd %xmm1, %xmm0, %k0
+; AVX512BWVL-NEXT:kshiftrw $2, %k0, %k1
+; AVX512BWVL-NEXT:korw %k1, %k0, %k1
+; AVX512BWVL-NEXT:kshiftrw $1, %k0, %k0
+; AVX512BWVL-NEXT:korw %k0, %k1, %k0
+; AVX512BWVL-NEXT:kmovd %k0, %eax
+; AVX512BWVL-NEXT:testb $1, %al
+; AVX512BWVL-NEXT:je .LBB27_2
+; AVX512BWVL-NEXT:  # %bb.1:
+; AVX512BWVL-NEXT:xorl %eax, %eax
+; AVX512BWVL-NEXT:retq
+; AVX512BWVL-NEXT:  .LBB27_2:
+; AVX512BWVL-NEXT:movl $1, %eax
+; AVX512BWVL-NEXT:retq
   %1 = icmp ne <3 x i32> %a, %b
   %2 = call i1 @llvm.vector.reduce.or.v3i1(<3 x i1> %1)
   br i1 %2, label %3, label %4



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[llvm-branch-commits] [llvm] 5318f6c - MachineDominators.h - remove unused include

2020-11-21 Thread Simon Pilgrim via llvm-branch-commits

Author: Simon Pilgrim
Date: 2020-11-21T17:11:26Z
New Revision: 5318f6c427c78c5737745acb18cae45b623cc067

URL: 
https://github.com/llvm/llvm-project/commit/5318f6c427c78c5737745acb18cae45b623cc067
DIFF: 
https://github.com/llvm/llvm-project/commit/5318f6c427c78c5737745acb18cae45b623cc067.diff

LOG: MachineDominators.h - remove unused  include

Added: 


Modified: 
llvm/include/llvm/CodeGen/MachineDominators.h

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/MachineDominators.h 
b/llvm/include/llvm/CodeGen/MachineDominators.h
index cf3af4d38223..46bf73cdd7b6 100644
--- a/llvm/include/llvm/CodeGen/MachineDominators.h
+++ b/llvm/include/llvm/CodeGen/MachineDominators.h
@@ -23,7 +23,6 @@
 #include "llvm/Support/GenericDomTreeConstruction.h"
 #include 
 #include 
-#include 
 
 namespace llvm {
 



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[llvm-branch-commits] [llvm] 7650d65 - DominanceFrontier - remove unused includes

2020-11-21 Thread Simon Pilgrim via llvm-branch-commits

Author: Simon Pilgrim
Date: 2020-11-21T17:11:26Z
New Revision: 7650d655050b614791ea386837fd80b324fdf286

URL: 
https://github.com/llvm/llvm-project/commit/7650d655050b614791ea386837fd80b324fdf286
DIFF: 
https://github.com/llvm/llvm-project/commit/7650d655050b614791ea386837fd80b324fdf286.diff

LOG: DominanceFrontier - remove unused  includes

Added: 


Modified: 
llvm/include/llvm/Analysis/DominanceFrontier.h
llvm/include/llvm/CodeGen/MachineDominanceFrontier.h

Removed: 




diff  --git a/llvm/include/llvm/Analysis/DominanceFrontier.h 
b/llvm/include/llvm/Analysis/DominanceFrontier.h
index f67929c997f9..cef5e03b3b7a 100644
--- a/llvm/include/llvm/Analysis/DominanceFrontier.h
+++ b/llvm/include/llvm/Analysis/DominanceFrontier.h
@@ -26,7 +26,6 @@
 #include 
 #include 
 #include 
-#include 
 
 namespace llvm {
 

diff  --git a/llvm/include/llvm/CodeGen/MachineDominanceFrontier.h 
b/llvm/include/llvm/CodeGen/MachineDominanceFrontier.h
index f7bbd07a63ab..e3e679608784 100644
--- a/llvm/include/llvm/CodeGen/MachineDominanceFrontier.h
+++ b/llvm/include/llvm/CodeGen/MachineDominanceFrontier.h
@@ -14,7 +14,6 @@
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/Support/GenericDomTree.h"
-#include 
 
 namespace llvm {
 



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[llvm-branch-commits] [llvm] 4629afa - [X86] Include %rip for 32-bit RIP-relative relocs for x32

2020-11-21 Thread Fangrui Song via llvm-branch-commits

Author: Harald van Dijk
Date: 2020-11-21T09:20:20-08:00
New Revision: 4629afa101d48bf347dfdd9d08796faeb489cd5f

URL: 
https://github.com/llvm/llvm-project/commit/4629afa101d48bf347dfdd9d08796faeb489cd5f
DIFF: 
https://github.com/llvm/llvm-project/commit/4629afa101d48bf347dfdd9d08796faeb489cd5f.diff

LOG: [X86] Include %rip for 32-bit RIP-relative relocs for x32

%rip was only included for 64-bit RIP-relative relocations, but needs to be 
included for 32-bit as well.

Reviewed By: MaskRay, RKSimon

Differential Revision: https://reviews.llvm.org/D91339

Added: 


Modified: 
llvm/lib/Target/X86/X86FastISel.cpp
llvm/test/CodeGen/X86/pic.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86FastISel.cpp 
b/llvm/lib/Target/X86/X86FastISel.cpp
index e59ebd701528..15b04c0c7357 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -779,14 +779,14 @@ bool X86FastISel::handleConstantAddresses(const Value *V, 
X86AddressMode &AM) {
 if (TLI.getPointerTy(DL) == MVT::i64) {
   Opc = X86::MOV64rm;
   RC  = &X86::GR64RegClass;
-
-  if (Subtarget->isPICStyleRIPRel())
-StubAM.Base.Reg = X86::RIP;
 } else {
   Opc = X86::MOV32rm;
   RC  = &X86::GR32RegClass;
 }
 
+if (Subtarget->isPICStyleRIPRel())
+  StubAM.Base.Reg = X86::RIP;
+
 LoadReg = createResultReg(RC);
 MachineInstrBuilder LoadMI =
   BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), 
LoadReg);

diff  --git a/llvm/test/CodeGen/X86/pic.ll b/llvm/test/CodeGen/X86/pic.ll
index f03dc3f4a285..8cf0602c57a8 100644
--- a/llvm/test/CodeGen/X86/pic.ll
+++ b/llvm/test/CodeGen/X86/pic.ll
@@ -1,4 +1,6 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -relocation-model=pic 
-asm-verbose=false -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -relocation-model=pic 
-asm-verbose=false -post-RA-scheduler=false | FileCheck %s 
-check-prefixes=CHECK,CHECK-I686
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 
-relocation-model=pic -asm-verbose=false -post-RA-scheduler=false | FileCheck 
%s -check-prefixes=CHECK,CHECK-X32
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 
-relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -fast-isel | 
FileCheck %s -check-prefixes=CHECK,CHECK-X32
 
 @ptr = external global i32* 
 @dst = external global i32 
@@ -11,15 +13,19 @@ entry:
 store i32 %tmp.s, i32* @dst
 ret void
 
-; LINUX-LABEL:test0:
-; LINUX:   calll   .L0$pb
-; LINUX-NEXT: .L0$pb:
-; LINUX-NEXT:  popl
-; LINUX:   addl$_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L0$pb),
-; LINUX:   movldst@GOT(%eax),
-; LINUX:   movlptr@GOT(%eax),
-; LINUX:   movlsrc@GOT(%eax),
-; LINUX:   ret
+; CHECK-LABEL: test0:
+; CHECK-I686:  calll   .L0$pb
+; CHECK-I686-NEXT: .L0$pb:
+; CHECK-I686-NEXT: popl
+; CHECK-I686:  addl$_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L0$pb),
+; CHECK-I686:  movldst@GOT(%eax),
+; CHECK-I686:  movlptr@GOT(%eax),
+; CHECK-I686:  movlsrc@GOT(%eax),
+; CHECK-I686:  ret
+; CHECK-DAG-X32:   movldst@GOTPCREL(%rip),
+; CHECK-DAG-X32:   movlptr@GOTPCREL(%rip),
+; CHECK-DAG-X32:   movlsrc@GOTPCREL(%rip),
+; CHECK-X32:   retq
 }
 
 @ptr2 = global i32* null
@@ -33,15 +39,19 @@ entry:
 store i32 %tmp.s, i32* @dst2
 ret void
 
-; LINUX-LABEL: test1:
-; LINUX:   calll   .L1$pb
-; LINUX-NEXT: .L1$pb:
-; LINUX-NEXT:  popl
-; LINUX:   addl$_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L1$pb), %eax
-; LINUX:   movldst2@GOT(%eax),
-; LINUX:   movlptr2@GOT(%eax),
-; LINUX:   movlsrc2@GOT(%eax),
-; LINUX:   ret
+; CHECK-LABEL: test1:
+; CHECK-I686:  calll   .L1$pb
+; CHECK-I686-NEXT: .L1$pb:
+; CHECK-I686-NEXT: popl
+; CHECK-I686:  addl$_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L1$pb), %eax
+; CHECK-I686:  movldst2@GOT(%eax),
+; CHECK-I686:  movlptr2@GOT(%eax),
+; CHECK-I686:  movlsrc2@GOT(%eax),
+; CHECK-I686:  ret
+; CHECK-DAG-X32:   movldst2@GOTPCREL(%rip),
+; CHECK-DAG-X32:   movlptr2@GOTPCREL(%rip),
+; CHECK-DAG-X32:   movlsrc2@GOTPCREL(%rip),
+; CHECK-X32:   retq
 
 }
 
@@ -51,18 +61,24 @@ define void @test2() nounwind {
 entry:
 %ptr = call i8* @malloc(i32 40)
 ret void
-; LINUX-LABEL: test2:
-; LINUX:   pushl   %ebx
-; LINUX-NEXT:  subl$8, %esp
-; LINUX-NEXT:  calll   .L2$pb
-; LINUX-NEXT: .L2$pb:
-; LINUX-NEXT:  popl%ebx
-; LINUX:   addl$_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L2$pb), %ebx
-; LINUX:   movl$40, (%esp)
-; LINUX:   calll   malloc@PLT
-; LINUX:   addl$8, %esp
-; LINUX:   popl%ebx
-; LINUX:   ret
+; CHECK-LABEL: test2:
+; CHECK-I686:  pushl   %ebx
+; CHECK-I686-NEXT: subl$8, %esp

[llvm-branch-commits] [llvm] 913a99c - [BasicAA] Remove stale FIXME (NFC)

2020-11-21 Thread Nikita Popov via llvm-branch-commits

Author: Nikita Popov
Date: 2020-11-21T20:07:26+01:00
New Revision: 913a99c47439740531e03cc7d08fc04448c0752c

URL: 
https://github.com/llvm/llvm-project/commit/913a99c47439740531e03cc7d08fc04448c0752c
DIFF: 
https://github.com/llvm/llvm-project/commit/913a99c47439740531e03cc7d08fc04448c0752c.diff

LOG: [BasicAA] Remove stale FIXME (NFC)

If aliasGEP returns MayAlias, the code does fall through to
aliasPHI etc, so this FIXME is no longer applicable.

Added: 


Modified: 
llvm/lib/Analysis/BasicAliasAnalysis.cpp

Removed: 




diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 944ff8e9917b..c7736e758bd1 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -1746,8 +1746,6 @@ AliasResult BasicAAResult::aliasCheck(const Value *V1, 
LocationSize V1Size,
   if (!Pair.second)
 return Pair.first->second;
 
-  // FIXME: This isn't aggressively handling alias(GEP, PHI) for example: if 
the
-  // GEP can't simplify, we don't even look at the PHI cases.
   if (const GEPOperator *GV1 = dyn_cast(V1)) {
 AliasResult Result =
 aliasGEP(GV1, V1Size, V1AAInfo, V2, V2Size, V2AAInfo, O1, O2, AAQI);



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[llvm-branch-commits] [flang] aa179d8 - [flang][openmp] Separate memory-order-clause parser creating OmpClause node

2020-11-21 Thread via llvm-branch-commits

Author: Valentin Clement
Date: 2020-11-21T14:31:33-05:00
New Revision: aa179d80990921486ec3e4f97d53522a4bb6cfad

URL: 
https://github.com/llvm/llvm-project/commit/aa179d80990921486ec3e4f97d53522a4bb6cfad
DIFF: 
https://github.com/llvm/llvm-project/commit/aa179d80990921486ec3e4f97d53522a4bb6cfad.diff

LOG: [flang][openmp] Separate memory-order-clause parser creating OmpClause node

This patch introduce the separate parser for the memory-order-clause from the 
general
OmpClauseList. This parser still creates OmpClause node and therefore can use 
all the feature
from TableGen and the OmpStructureChecker.
This is applied only for the Flush construct in this patch and it should be 
applied for
atomic as well.

This is the approach we disscussed several time during the weekly call.

Reviewed By: kiranchandramohan, sameeranjoshi

Differential Revision: https://reviews.llvm.org/D91839

Added: 


Modified: 
flang/include/flang/Parser/dump-parse-tree.h
flang/include/flang/Parser/parse-tree.h
flang/lib/Lower/OpenMP.cpp
flang/lib/Parser/openmp-parsers.cpp
flang/lib/Parser/unparse.cpp
flang/lib/Semantics/check-omp-structure.cpp
flang/lib/Semantics/check-omp-structure.h
flang/test/Semantics/omp-clause-validity01.f90

Removed: 




diff  --git a/flang/include/flang/Parser/dump-parse-tree.h 
b/flang/include/flang/Parser/dump-parse-tree.h
index e05c5d5e527e..61c5bddc0afb 100644
--- a/flang/include/flang/Parser/dump-parse-tree.h
+++ b/flang/include/flang/Parser/dump-parse-tree.h
@@ -548,7 +548,7 @@ class ParseTreeDumper {
   NODE(parser, OpenMPDeclareReductionConstruct)
   NODE(parser, OpenMPDeclareSimdConstruct)
   NODE(parser, OpenMPDeclareTargetConstruct)
-  NODE(parser, OmpFlushMemoryClause)
+  NODE(parser, OmpMemoryOrderClause)
   NODE(parser, OpenMPFlushConstruct)
   NODE(parser, OpenMPLoopConstruct)
   NODE(parser, OpenMPSimpleStandaloneConstruct)

diff  --git a/flang/include/flang/Parser/parse-tree.h 
b/flang/include/flang/Parser/parse-tree.h
index a64ca06f1b3b..2dcb92b4a725 100644
--- a/flang/include/flang/Parser/parse-tree.h
+++ b/flang/include/flang/Parser/parse-tree.h
@@ -3701,8 +3701,8 @@ struct OpenMPCancelConstruct {
 // memory-order-clause -> acq_rel
 //release
 //acquire
-struct OmpFlushMemoryClause {
-  WRAPPER_CLASS_BOILERPLATE(OmpFlushMemoryClause, llvm::omp::Clause);
+struct OmpMemoryOrderClause {
+  WRAPPER_CLASS_BOILERPLATE(OmpMemoryOrderClause, OmpClause);
   CharBlock source;
 };
 
@@ -3710,7 +3710,7 @@ struct OmpFlushMemoryClause {
 struct OpenMPFlushConstruct {
   TUPLE_CLASS_BOILERPLATE(OpenMPFlushConstruct);
   CharBlock source;
-  std::tuple,
+  std::tuple,
   std::optional>
   t;
 };

diff  --git a/flang/lib/Lower/OpenMP.cpp b/flang/lib/Lower/OpenMP.cpp
index 5b69800176ea..780aea9664fc 100644
--- a/flang/lib/Lower/OpenMP.cpp
+++ b/flang/lib/Lower/OpenMP.cpp
@@ -109,9 +109,9 @@ genOMP(Fortran::lower::AbstractConverter &converter,
 std::get>(
 flushConstruct.t))
   genObjectList(*ompObjectList, converter, operandRange);
-if (std::get>(
+if (std::get>(
 flushConstruct.t))
-  TODO("Handle OmpFlushMemoryClause");
+  TODO("Handle OmpMemoryOrderClause");
 converter.getFirOpBuilder().create(
 converter.getCurrentLocation(), operandRange);
   },

diff  --git a/flang/lib/Parser/openmp-parsers.cpp 
b/flang/lib/Parser/openmp-parsers.cpp
index 8ad13dffea04..0af313743c0f 100644
--- a/flang/lib/Parser/openmp-parsers.cpp
+++ b/flang/lib/Parser/openmp-parsers.cpp
@@ -302,18 +302,22 @@ 
TYPE_PARSER(sourced(construct(
 TYPE_PARSER(sourced(construct(verbatim("CANCEL"_tok),
 Parser{}, maybe("IF" >> parenthesized(scalarLogicalExpr)
 
-// 2.17.8 Flush construct [OpenMP 5.0]
-//flush -> FLUSH [memory-order-clause] [(variable-name-list)]
-//memory-order-clause -> acq_rel
+// 2.17.7 Atomtic construct/2.17.8 Flush construct [OpenMP 5.0]
+//memory-order-clause ->
+//   seq_cst
+//   acq_rel
 //   release
 //   acquire
-TYPE_PARSER(sourced(construct(
-"ACQ_REL" >> pure(llvm::omp::Clause::OMPC_acq_rel) ||
-"RELEASE" >> pure(llvm::omp::Clause::OMPC_release) ||
-"ACQUIRE" >> pure(llvm::omp::Clause::OMPC_acquire
+//   relaxed
+TYPE_PARSER(sourced(construct(
+sourced("SEQ_CST" >> construct(construct()) 
||
+"ACQ_REL" >> construct(construct()) ||
+"RELEASE" >> construct(construct()) ||
+"ACQUIRE" >> construct(construct()) ||
+"RELAXED" >> construct(construct())
 
 TYPE_PARSER(sourced(construct(verbatim("FLUSH"_tok),
-maybe(Parser{}),
+maybe(Parser{}),
 maybe(par

[llvm-branch-commits] [flang] 952c9d3 - [NFC] Fix typo in atomic

2020-11-21 Thread via llvm-branch-commits

Author: clementval
Date: 2020-11-21T14:32:31-05:00
New Revision: 952c9d3a91de351356336c4f84ff1a4d4090cc7b

URL: 
https://github.com/llvm/llvm-project/commit/952c9d3a91de351356336c4f84ff1a4d4090cc7b
DIFF: 
https://github.com/llvm/llvm-project/commit/952c9d3a91de351356336c4f84ff1a4d4090cc7b.diff

LOG: [NFC] Fix typo in atomic

Added: 


Modified: 
flang/lib/Parser/openmp-parsers.cpp

Removed: 




diff  --git a/flang/lib/Parser/openmp-parsers.cpp 
b/flang/lib/Parser/openmp-parsers.cpp
index 0af313743c0f..da10f9ffb0a8 100644
--- a/flang/lib/Parser/openmp-parsers.cpp
+++ b/flang/lib/Parser/openmp-parsers.cpp
@@ -302,7 +302,7 @@ 
TYPE_PARSER(sourced(construct(
 TYPE_PARSER(sourced(construct(verbatim("CANCEL"_tok),
 Parser{}, maybe("IF" >> parenthesized(scalarLogicalExpr)
 
-// 2.17.7 Atomtic construct/2.17.8 Flush construct [OpenMP 5.0]
+// 2.17.7 Atomic construct/2.17.8 Flush construct [OpenMP 5.0]
 //memory-order-clause ->
 //   seq_cst
 //   acq_rel



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[llvm-branch-commits] [llvm] f4412c5 - [BasicAA] Remove some intermediate variables (NFC)

2020-11-21 Thread Nikita Popov via llvm-branch-commits

Author: Nikita Popov
Date: 2020-11-21T20:36:25+01:00
New Revision: f4412c5ae4eee0421801c9db905428bae1f7658b

URL: 
https://github.com/llvm/llvm-project/commit/f4412c5ae4eee0421801c9db905428bae1f7658b
DIFF: 
https://github.com/llvm/llvm-project/commit/f4412c5ae4eee0421801c9db905428bae1f7658b.diff

LOG: [BasicAA] Remove some intermediate variables (NFC)

Use DecompGEP1.Offset instead of GEP1BaseOffset, etc. I found the
asymmetry of modifying DecompGEP1.VarIndices, but not modifying
DecompGEP1.Offset odd here.

Added: 


Modified: 
llvm/lib/Analysis/BasicAliasAnalysis.cpp

Removed: 




diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index c7736e758bd1..1cb207d4ccf0 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -1233,9 +1233,6 @@ AliasResult BasicAAResult::aliasGEP(
   !DecompGEP2.HasCompileTimeConstantScale)
 return MayAlias;
 
-  APInt GEP1BaseOffset = DecompGEP1.Offset;
-  APInt GEP2BaseOffset = DecompGEP2.Offset;
-
   assert(DecompGEP1.Base == UnderlyingV1 && DecompGEP2.Base == UnderlyingV2 &&
  "DecomposeGEPExpression returned a result 
diff erent from "
  "getUnderlyingObject");
@@ -1260,7 +1257,7 @@ AliasResult BasicAAResult::aliasGEP(
 
 // For GEPs with identical offsets, we can preserve the size and AAInfo
 // when performing the alias check on the underlying objects.
-if (BaseAlias == MayAlias && GEP1BaseOffset == GEP2BaseOffset &&
+if (BaseAlias == MayAlias && DecompGEP1.Offset == DecompGEP2.Offset &&
 DecompGEP1.VarIndices == DecompGEP2.VarIndices) {
   AliasResult PreciseBaseAlias = aliasCheck(
   UnderlyingV1, V1Size, V1AAInfo, UnderlyingV2, V2Size, V2AAInfo, 
AAQI);
@@ -1292,7 +1289,7 @@ AliasResult BasicAAResult::aliasGEP(
 
 // Subtract the GEP2 pointer from the GEP1 pointer to find out their
 // symbolic 
diff erence.
-GEP1BaseOffset -= GEP2BaseOffset;
+DecompGEP1.Offset -= DecompGEP2.Offset;
 GetIndexDifference(DecompGEP1.VarIndices, DecompGEP2.VarIndices);
 
   } else {
@@ -1324,17 +1321,17 @@ AliasResult BasicAAResult::aliasGEP(
   //
   // In the other case, if we have getelementptr , 0, 0, 0, 0, ... and V2
   // must aliases the GEP, the end result is a must alias also.
-  if (GEP1BaseOffset == 0 && DecompGEP1.VarIndices.empty())
+  if (DecompGEP1.Offset == 0 && DecompGEP1.VarIndices.empty())
 return MustAlias;
 
   // If there is a constant 
diff erence between the pointers, but the 
diff erence
   // is less than the size of the associated memory object, then we know
   // that the objects are partially overlapping.  If the 
diff erence is
   // greater, we know they do not overlap.
-  if (GEP1BaseOffset != 0 && DecompGEP1.VarIndices.empty()) {
-if (GEP1BaseOffset.sge(0)) {
+  if (DecompGEP1.Offset != 0 && DecompGEP1.VarIndices.empty()) {
+if (DecompGEP1.Offset.sge(0)) {
   if (V2Size.hasValue()) {
-if (GEP1BaseOffset.ult(V2Size.getValue()))
+if (DecompGEP1.Offset.ult(V2Size.getValue()))
   return PartialAlias;
 return NoAlias;
   }
@@ -1348,7 +1345,7 @@ AliasResult BasicAAResult::aliasGEP(
   // We need to know that V2Size is not unknown, otherwise we might have
   // stripped a gep with negative index ('gep , -1, ...).
   if (V1Size.hasValue() && V2Size.hasValue()) {
-if ((-GEP1BaseOffset).ult(V1Size.getValue()))
+if ((-DecompGEP1.Offset).ult(V1Size.getValue()))
   return PartialAlias;
 return NoAlias;
   }
@@ -1357,8 +1354,8 @@ AliasResult BasicAAResult::aliasGEP(
 
   if (!DecompGEP1.VarIndices.empty()) {
 APInt GCD;
-bool AllNonNegative = GEP1BaseOffset.isNonNegative();
-bool AllNonPositive = GEP1BaseOffset.isNonPositive();
+bool AllNonNegative = DecompGEP1.Offset.isNonNegative();
+bool AllNonPositive = DecompGEP1.Offset.isNonPositive();
 for (unsigned i = 0, e = DecompGEP1.VarIndices.size(); i != e; ++i) {
   const APInt &Scale = DecompGEP1.VarIndices[i].Scale;
   if (i == 0)
@@ -1391,12 +1388,12 @@ AliasResult BasicAAResult::aliasGEP(
 }
 
 // We now have accesses at two offsets from the same base:
-//  1. (...)*GCD + GEP1BaseOffset with size V1Size
+//  1. (...)*GCD + DecompGEP1.Offset with size V1Size
 //  2. 0 with size V2Size
 // Using arithmetic modulo GCD, the accesses are at
 // [ModOffset..ModOffset+V1Size) and [0..V2Size). If the first access fits
 // into the range [V2Size..GCD), then we know they cannot overlap.
-APInt ModOffset = GEP1BaseOffset.srem(GCD);
+APInt ModOffset = DecompGEP1.Offset.srem(GCD);
 if (ModOffset.isNegative())
   ModOffset += GCD; // We want mod, not rem.
 if (V1Size.hasValue() && V2Size.hasValue() &&
@@ -1405,22 +1402,22 @@ AliasResult BasicAAResult::aliasGEP(
   return NoAlias;
 
 

[llvm-branch-commits] [llvm] 0d114f5 - [BasicAA] Return DecomposedGEP (NFC)

2020-11-21 Thread Nikita Popov via llvm-branch-commits

Author: Nikita Popov
Date: 2020-11-21T21:05:26+01:00
New Revision: 0d114f56d709792cc4230775c7da8a623d3a409a

URL: 
https://github.com/llvm/llvm-project/commit/0d114f56d709792cc4230775c7da8a623d3a409a
DIFF: 
https://github.com/llvm/llvm-project/commit/0d114f56d709792cc4230775c7da8a623d3a409a.diff

LOG: [BasicAA] Return DecomposedGEP (NFC)

Instead of requiring the caller to initialize the DecomposedGEP
structure and then passing it in by reference, make
DecomposeGEPExpression() responsible for initializing and returning
the structure.

Added: 


Modified: 
llvm/include/llvm/Analysis/BasicAliasAnalysis.h
llvm/lib/Analysis/BasicAliasAnalysis.cpp

Removed: 




diff  --git a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h 
b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
index 9e7950e4102e..3717fc9e2c36 100644
--- a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
+++ b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
@@ -168,8 +168,9 @@ class BasicAAResult : public AAResultBase {
   const DataLayout &DL, unsigned Depth, AssumptionCache 
*AC,
   DominatorTree *DT, bool &NSW, bool &NUW);
 
-  static bool DecomposeGEPExpression(const Value *V, DecomposedGEP &Decomposed,
-  const DataLayout &DL, AssumptionCache *AC, DominatorTree *DT);
+  static DecomposedGEP
+  DecomposeGEPExpression(const Value *V, const DataLayout &DL,
+ AssumptionCache *AC, DominatorTree *DT);
 
   static bool isGEPBaseAtNegativeOffset(const GEPOperator *GEPOp,
   const DecomposedGEP &DecompGEP, const DecomposedGEP &DecompObject,

diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 1cb207d4ccf0..89e1ad25ecbd 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -416,15 +416,17 @@ static unsigned getMaxPointerSize(const DataLayout &DL) {
 /// can look through. To be able to do that getUnderlyingObject and
 /// DecomposeGEPExpression must use the same search depth
 /// (MaxLookupSearchDepth).
-bool BasicAAResult::DecomposeGEPExpression(const Value *V,
-   DecomposedGEP &Decomposed, const DataLayout &DL, AssumptionCache *AC,
-   DominatorTree *DT) {
+BasicAAResult::DecomposedGEP
+BasicAAResult::DecomposeGEPExpression(const Value *V, const DataLayout &DL,
+  AssumptionCache *AC, DominatorTree *DT) {
   // Limit recursion depth to limit compile time in crazy cases.
   unsigned MaxLookup = MaxLookupSearchDepth;
   SearchTimes++;
 
   unsigned MaxPointerSize = getMaxPointerSize(DL);
-  Decomposed.VarIndices.clear();
+  DecomposedGEP Decomposed;
+  Decomposed.Offset = APInt(MaxPointerSize, 0);
+  Decomposed.HasCompileTimeConstantScale = true;
   do {
 // See if this is a bitcast or GEP.
 const Operator *Op = dyn_cast(V);
@@ -437,7 +439,7 @@ bool BasicAAResult::DecomposeGEPExpression(const Value *V,
 }
   }
   Decomposed.Base = V;
-  return false;
+  return Decomposed;
 }
 
 if (Op->getOpcode() == Instruction::BitCast ||
@@ -471,13 +473,13 @@ bool BasicAAResult::DecomposeGEPExpression(const Value *V,
   }
 
   Decomposed.Base = V;
-  return false;
+  return Decomposed;
 }
 
 // Don't attempt to analyze GEPs over unsized objects.
 if (!GEPOp->getSourceElementType()->isSized()) {
   Decomposed.Base = V;
-  return false;
+  return Decomposed;
 }
 
 // Don't attempt to analyze GEPs if index scale is not a compile-time
@@ -485,7 +487,7 @@ bool BasicAAResult::DecomposeGEPExpression(const Value *V,
 if (isa(GEPOp->getSourceElementType())) {
   Decomposed.Base = V;
   Decomposed.HasCompileTimeConstantScale = false;
-  return false;
+  return Decomposed;
 }
 
 unsigned AS = GEPOp->getPointerAddressSpace();
@@ -599,7 +601,7 @@ bool BasicAAResult::DecomposeGEPExpression(const Value *V,
   // If the chain of expressions is too deep, just return early.
   Decomposed.Base = V;
   SearchLimitReached++;
-  return true;
+  return Decomposed;
 }
 
 /// Returns whether the given pointer value points to memory that is local to
@@ -1217,15 +1219,8 @@ AliasResult BasicAAResult::aliasGEP(
 const GEPOperator *GEP1, LocationSize V1Size, const AAMDNodes &V1AAInfo,
 const Value *V2, LocationSize V2Size, const AAMDNodes &V2AAInfo,
 const Value *UnderlyingV1, const Value *UnderlyingV2, AAQueryInfo &AAQI) {
-  DecomposedGEP DecompGEP1, DecompGEP2;
-  unsigned MaxPointerSize = getMaxPointerSize(DL);
-  DecompGEP1.Offset = APInt(MaxPointerSize, 0);
-  DecompGEP2.Offset = APInt(MaxPointerSize, 0);
-  DecompGEP1.HasCompileTimeConstantScale =
-  DecompGEP2.HasCompileTimeConstantScale = true;
-
-  DecomposeGEPExpression(GEP1, DecompGEP1, DL, &AC, DT);
-  DecomposeGEPExpression(V2, DecompGEP2, DL, &AC, DT);
+  DecomposedGEP DecompGEP1 = DecomposeGEP

[llvm-branch-commits] [compiler-rt] 33fb967 - [compiler-rt] [profile] Silence a warning about an unused function on mingw targets

2020-11-21 Thread Martin Storsjö via llvm-branch-commits

Author: Martin Storsjö
Date: 2020-11-21T22:14:35+02:00
New Revision: 33fb9679ec6e288bc72f2aa19c8ef1576b4c66b9

URL: 
https://github.com/llvm/llvm-project/commit/33fb9679ec6e288bc72f2aa19c8ef1576b4c66b9
DIFF: 
https://github.com/llvm/llvm-project/commit/33fb9679ec6e288bc72f2aa19c8ef1576b4c66b9.diff

LOG: [compiler-rt] [profile] Silence a warning about an unused function on 
mingw targets

This function is only used within the ifdef below.

Differential Revision: https://reviews.llvm.org/D91850

Added: 


Modified: 
compiler-rt/lib/profile/InstrProfilingFile.c

Removed: 




diff  --git a/compiler-rt/lib/profile/InstrProfilingFile.c 
b/compiler-rt/lib/profile/InstrProfilingFile.c
index bd1ec44fc77e..42ffdae82622 100644
--- a/compiler-rt/lib/profile/InstrProfilingFile.c
+++ b/compiler-rt/lib/profile/InstrProfilingFile.c
@@ -420,14 +420,12 @@ static void truncateCurrentFile(void) {
   fclose(File);
 }
 
-#ifndef _MSC_VER
+#if !defined(__Fuchsia__) && !defined(_WIN32)
 static void assertIsZero(int *i) {
   if (*i)
 PROF_WARN("Expected flag to be 0, but got: %d\n", *i);
 }
-#endif
 
-#if !defined(__Fuchsia__) && !defined(_WIN32)
 /* Write a partial profile to \p Filename, which is required to be backed by
  * the open file object \p File. */
 static int writeProfileWithFileObject(const char *Filename, FILE *File) {



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[llvm-branch-commits] [llvm] ded5928 - [BasicAA] Remove unnecessary sextOrSelf (NFC)

2020-11-21 Thread Nikita Popov via llvm-branch-commits

Author: Nikita Popov
Date: 2020-11-21T21:32:56+01:00
New Revision: ded5928866254ea08569aed946dd2a879464da48

URL: 
https://github.com/llvm/llvm-project/commit/ded5928866254ea08569aed946dd2a879464da48
DIFF: 
https://github.com/llvm/llvm-project/commit/ded5928866254ea08569aed946dd2a879464da48.diff

LOG: [BasicAA] Remove unnecessary sextOrSelf (NFC)

We are doing a sextOrTrunc directly afterwards, so this seems
useless. There is a multiplication in between, but truncating
before or after the multiplication should not make a difference.

Added: 


Modified: 
llvm/lib/Analysis/BasicAliasAnalysis.cpp

Removed: 




diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 89e1ad25ecbd..cfc1c59c15d9 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -515,9 +515,8 @@ BasicAAResult::DecomposeGEPExpression(const Value *V, const 
DataLayout &DL,
 if (CIdx->isZero())
   continue;
 Decomposed.Offset +=
-(DL.getTypeAllocSize(GTI.getIndexedType()).getFixedSize() *
- CIdx->getValue().sextOrSelf(MaxPointerSize))
-.sextOrTrunc(MaxPointerSize);
+DL.getTypeAllocSize(GTI.getIndexedType()).getFixedSize() *
+CIdx->getValue().sextOrTrunc(MaxPointerSize);
 continue;
   }
 



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[llvm-branch-commits] [libunwind] 3324fd8 - [libunwind] Delete unused handlerNotFound in unwind_phase1

2020-11-21 Thread Fangrui Song via llvm-branch-commits

Author: Fangrui Song
Date: 2020-11-21T12:38:00-08:00
New Revision: 3324fd8a7b1ab011513017ed8fd81e06928526d5

URL: 
https://github.com/llvm/llvm-project/commit/3324fd8a7b1ab011513017ed8fd81e06928526d5
DIFF: 
https://github.com/llvm/llvm-project/commit/3324fd8a7b1ab011513017ed8fd81e06928526d5.diff

LOG: [libunwind] Delete unused handlerNotFound in unwind_phase1

Added: 


Modified: 
libunwind/src/UnwindLevel1.c

Removed: 




diff  --git a/libunwind/src/UnwindLevel1.c b/libunwind/src/UnwindLevel1.c
index 3e75b5f13cd6..68e5e48b8c05 100644
--- a/libunwind/src/UnwindLevel1.c
+++ b/libunwind/src/UnwindLevel1.c
@@ -39,8 +39,7 @@ unwind_phase1(unw_context_t *uc, unw_cursor_t *cursor, 
_Unwind_Exception *except
   __unw_init_local(cursor, uc);
 
   // Walk each frame looking for a place to stop.
-  bool handlerNotFound = true;
-  while (handlerNotFound) {
+  while (true) {
 // Ask libunwind to get next frame (skip over first which is
 // _Unwind_RaiseException).
 int stepResult = __unw_step(cursor);
@@ -102,7 +101,6 @@ unwind_phase1(unw_context_t *uc, unw_cursor_t *cursor, 
_Unwind_Exception *except
   case _URC_HANDLER_FOUND:
 // found a catch clause or locals that need destructing in this frame
 // stop search and remember stack pointer at the frame
-handlerNotFound = false;
 __unw_get_reg(cursor, UNW_REG_SP, &sp);
 exception_object->private_2 = (uintptr_t)sp;
 _LIBUNWIND_TRACE_UNWINDING(



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[llvm-branch-commits] [llvm] dcc0659 - Fix shared build.

2020-11-21 Thread Michael Liao via llvm-branch-commits

Author: Michael Liao
Date: 2020-11-21T17:07:42-05:00
New Revision: dcc06597b1d61d35c7246d3ab2d7a807134aaa45

URL: 
https://github.com/llvm/llvm-project/commit/dcc06597b1d61d35c7246d3ab2d7a807134aaa45
DIFF: 
https://github.com/llvm/llvm-project/commit/dcc06597b1d61d35c7246d3ab2d7a807134aaa45.diff

LOG: Fix shared build.

Added: 


Modified: 
llvm/tools/llvm-profgen/CMakeLists.txt

Removed: 




diff  --git a/llvm/tools/llvm-profgen/CMakeLists.txt 
b/llvm/tools/llvm-profgen/CMakeLists.txt
index 5a631195c28b..10d82c12c662 100644
--- a/llvm/tools/llvm-profgen/CMakeLists.txt
+++ b/llvm/tools/llvm-profgen/CMakeLists.txt
@@ -2,6 +2,7 @@
 set(LLVM_LINK_COMPONENTS
   AllTargetsDescs
   AllTargetsDisassemblers
+  AllTargetsInfos
   Core
   MC
   MCDisassembler



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[llvm-branch-commits] [llvm] def7cfb - [InstCombine] Use is_contained (NFC)

2020-11-21 Thread Kazu Hirata via llvm-branch-commits

Author: Kazu Hirata
Date: 2020-11-21T15:47:11-08:00
New Revision: def7cfb7ffd40691f903287a060f4405bab56d1a

URL: 
https://github.com/llvm/llvm-project/commit/def7cfb7ffd40691f903287a060f4405bab56d1a
DIFF: 
https://github.com/llvm/llvm-project/commit/def7cfb7ffd40691f903287a060f4405bab56d1a.diff

LOG: [InstCombine] Use is_contained (NFC)

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
index 29c4aced75e7..06f22cdfb63d 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
@@ -2144,7 +2144,7 @@ static Instruction 
*foldShuffleWithInsert(ShuffleVectorInst &Shuf,
   uint64_t IdxC;
   if (match(V0, m_InsertElt(m_Value(X), m_Value(), m_ConstantInt(IdxC {
 // shuf (inselt X, ?, IdxC), ?, Mask --> shuf X, ?, Mask
-if (none_of(Mask, [IdxC](int MaskElt) { return MaskElt == (int)IdxC; }))
+if (!is_contained(Mask, (int)IdxC))
   return IC.replaceOperand(Shuf, 0, X);
   }
   if (match(V1, m_InsertElt(m_Value(X), m_Value(), m_ConstantInt(IdxC {
@@ -2152,7 +2152,7 @@ static Instruction 
*foldShuffleWithInsert(ShuffleVectorInst &Shuf,
 // accesses to the 2nd vector input of the shuffle.
 IdxC += NumElts;
 // shuf ?, (inselt X, ?, IdxC), Mask --> shuf ?, X, Mask
-if (none_of(Mask, [IdxC](int MaskElt) { return MaskElt == (int)IdxC; }))
+if (!is_contained(Mask, (int)IdxC))
   return IC.replaceOperand(Shuf, 1, X);
   }
 



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[llvm-branch-commits] [clang] 914f6c4 - [StaticAnalyzer] Support struct annotations in FuchsiaHandleChecker

2020-11-21 Thread Haowei Wu via llvm-branch-commits

Author: Haowei Wu
Date: 2020-11-21T19:59:51-08:00
New Revision: 914f6c4ff8a42d384cad0bbb07de4dd1a96c78d4

URL: 
https://github.com/llvm/llvm-project/commit/914f6c4ff8a42d384cad0bbb07de4dd1a96c78d4
DIFF: 
https://github.com/llvm/llvm-project/commit/914f6c4ff8a42d384cad0bbb07de4dd1a96c78d4.diff

LOG: [StaticAnalyzer] Support struct annotations in FuchsiaHandleChecker

Support adding handle annotations to sturucture that contains
handles. All the handles referenced by the structure (direct
value or ptr) would be treated as containing the
release/use/acquire annotations directly.

Patch by Yu Shan

Differential Revision: https://reviews.llvm.org/D91223

Added: 


Modified: 
clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp
clang/test/Analysis/fuchsia_handle.cpp

Removed: 




diff  --git a/clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp 
b/clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp
index b2822e5307f3..d4901eb0abbb 100644
--- a/clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp
@@ -53,7 +53,7 @@
 //
 // Note that, the analyzer does not always know for sure if a function failed
 // or succeeded. In those cases we use the state MaybeAllocated.
-// Thus, the diagramm above captures the intent, not implementation details.
+// Thus, the diagram above captures the intent, not implementation details.
 //
 // Due to the fact that the number of handle related syscalls in Fuchsia
 // is large, we adopt the annotation attributes to descript syscalls'
@@ -226,32 +226,70 @@ static const ExplodedNode *getAcquireSite(const 
ExplodedNode *N, SymbolRef Sym,
   return nullptr;
 }
 
-/// Returns the symbols extracted from the argument or null if it cannot be
-/// found.
-static SymbolRef getFuchsiaHandleSymbol(QualType QT, SVal Arg,
-ProgramStateRef State) {
+namespace {
+class FuchsiaHandleSymbolVisitor final : public SymbolVisitor {
+public:
+  FuchsiaHandleSymbolVisitor(ProgramStateRef State) : State(std::move(State)) 
{}
+  ProgramStateRef getState() const { return State; }
+
+  bool VisitSymbol(SymbolRef S) override {
+if (const auto *HandleType = S->getType()->getAs())
+  if (HandleType->getDecl()->getName() == HandleTypeName)
+Symbols.push_back(S);
+return true;
+  }
+
+  SmallVector GetSymbols() { return Symbols; }
+
+private:
+  SmallVector Symbols;
+  ProgramStateRef State;
+};
+} // end anonymous namespace
+
+/// Returns the symbols extracted from the argument or empty vector if it 
cannot
+/// be found. It is unlikely to have over 1024 symbols in one argument.
+static SmallVector
+getFuchsiaHandleSymbols(QualType QT, SVal Arg, ProgramStateRef State) {
   int PtrToHandleLevel = 0;
   while (QT->isAnyPointerType() || QT->isReferenceType()) {
 ++PtrToHandleLevel;
 QT = QT->getPointeeType();
   }
+  if (QT->isStructureType()) {
+// If we see a structure, see if there is any handle referenced by the
+// structure.
+FuchsiaHandleSymbolVisitor Visitor(State);
+State->scanReachableSymbols(Arg, Visitor);
+return Visitor.GetSymbols();
+  }
   if (const auto *HandleType = QT->getAs()) {
 if (HandleType->getDecl()->getName() != HandleTypeName)
-  return nullptr;
-if (PtrToHandleLevel > 1) {
+  return {};
+if (PtrToHandleLevel > 1)
   // Not supported yet.
-  return nullptr;
-}
+  return {};
 
 if (PtrToHandleLevel == 0) {
-  return Arg.getAsSymbol();
+  SymbolRef Sym = Arg.getAsSymbol();
+  if (Sym) {
+return {Sym};
+  } else {
+return {};
+  }
 } else {
   assert(PtrToHandleLevel == 1);
-  if (Optional ArgLoc = Arg.getAs())
-return State->getSVal(*ArgLoc).getAsSymbol();
+  if (Optional ArgLoc = Arg.getAs()) {
+SymbolRef Sym = State->getSVal(*ArgLoc).getAsSymbol();
+if (Sym) {
+  return {Sym};
+} else {
+  return {};
+}
+  }
 }
   }
-  return nullptr;
+  return {};
 }
 
 void FuchsiaHandleChecker::checkPreCall(const CallEvent &Call,
@@ -273,30 +311,31 @@ void FuchsiaHandleChecker::checkPreCall(const CallEvent 
&Call,
 if (Arg >= FuncDecl->getNumParams())
   break;
 const ParmVarDecl *PVD = FuncDecl->getParamDecl(Arg);
-SymbolRef Handle =
-getFuchsiaHandleSymbol(PVD->getType(), Call.getArgSVal(Arg), State);
-if (!Handle)
-  continue;
+SmallVector Handles =
+getFuchsiaHandleSymbols(PVD->getType(), Call.getArgSVal(Arg), State);
 
 // Handled in checkPostCall.
 if (hasFuchsiaAttr(PVD) ||
 hasFuchsiaAttr(PVD))
   continue;
 
-const HandleState *HState = State->get(Handle);
-if (!HState || HState->isEscaped())
-  continue;
+for (SymbolRef Handle : Handles) {
+  const HandleState *HState = State->get(Handle);
+  

[llvm-branch-commits] [clang] 2482648 - thinlto_embed_bitcode.ll: clarify grep should treat input as text

2020-11-21 Thread Mircea Trofin via llvm-branch-commits

Author: Mircea Trofin
Date: 2020-11-21T21:46:53-08:00
New Revision: 2482648a795afbe12774168bbbf70dc14c031267

URL: 
https://github.com/llvm/llvm-project/commit/2482648a795afbe12774168bbbf70dc14c031267
DIFF: 
https://github.com/llvm/llvm-project/commit/2482648a795afbe12774168bbbf70dc14c031267.diff

LOG: thinlto_embed_bitcode.ll: clarify grep should treat input as text

The input to the test's use of grep should be treated as text, and
that's not the case on certain Linux distros. Added --text.

Added: 


Modified: 
clang/test/CodeGen/thinlto_embed_bitcode.ll

Removed: 




diff  --git a/clang/test/CodeGen/thinlto_embed_bitcode.ll 
b/clang/test/CodeGen/thinlto_embed_bitcode.ll
index 6c7e36e7226b..971d4005435d 100644
--- a/clang/test/CodeGen/thinlto_embed_bitcode.ll
+++ b/clang/test/CodeGen/thinlto_embed_bitcode.ll
@@ -18,7 +18,7 @@
 ; RUN: %clang -target x86_64-unknown-linux-gnu -O2 -o %t.o -x ir %t1.bc -c 
-fthinlto-index=%t.o.thinlto.bc -mllvm -lto-embed-bitcode=post-merge-pre-opt
 ; RUN: llvm-readelf -S %t.o | FileCheck %s 
--check-prefixes=CHECK-ELF,CHECK-ELF-CMD
 ; RUN: llvm-objcopy --dump-section=.llvmcmd=%t-embedded.cmd %t.o /dev/null
-; RUN: grep x86_64-unknown-linux-gnu %t-embedded.cmd | count 1
+; RUN: grep --text x86_64-unknown-linux-gnu %t-embedded.cmd | count 1
 ; RUN: llvm-objcopy --dump-section=.llvmbc=%t-embedded.bc %t.o /dev/null
 ; RUN: llvm-dis %t-embedded.bc -o - | FileCheck %s 
--check-prefixes=CHECK,CHECK-NOOPT
 ; We should only need the index and the post-thinlto merged module to generate 



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[llvm-branch-commits] [llvm] c2309ff - [SelectionDAG] Remove unused declaration ExpandStrictFPOp (NFC)

2020-11-21 Thread Kazu Hirata via llvm-branch-commits

Author: Kazu Hirata
Date: 2020-11-21T22:29:44-08:00
New Revision: c2309ff3d50c27cea4b338affb6fd6168c792f0e

URL: 
https://github.com/llvm/llvm-project/commit/c2309ff3d50c27cea4b338affb6fd6168c792f0e
DIFF: 
https://github.com/llvm/llvm-project/commit/c2309ff3d50c27cea4b338affb6fd6168c792f0e.diff

LOG: [SelectionDAG] Remove unused declaration ExpandStrictFPOp (NFC)

ExpandStrictFPOp started taking two parameters instead of one on Jan
10, 2020 in commit f678fc7660b36ce0ad6ce4f05eaa28f3e9fdedb5, but the
declaration for the single-perameter version has remained since.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp 
b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index c356895c61a7..d3e95818af97 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -143,7 +143,6 @@ class VectorLegalizer {
   void ExpandSADDSUBO(SDNode *Node, SmallVectorImpl &Results);
   void ExpandMULO(SDNode *Node, SmallVectorImpl &Results);
   void ExpandFixedPointDiv(SDNode *Node, SmallVectorImpl &Results);
-  SDValue ExpandStrictFPOp(SDNode *Node);
   void ExpandStrictFPOp(SDNode *Node, SmallVectorImpl &Results);
   void ExpandREM(SDNode *Node, SmallVectorImpl &Results);
 



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[llvm-branch-commits] [llvm] 9d98508 - [MachineLICM] Remove unused declaration HoistRegion

2020-11-21 Thread Kazu Hirata via llvm-branch-commits

Author: Kazu Hirata
Date: 2020-11-21T22:55:37-08:00
New Revision: 9d985082ad0bcb34dd1b9b146abe73907a7cf72b

URL: 
https://github.com/llvm/llvm-project/commit/9d985082ad0bcb34dd1b9b146abe73907a7cf72b
DIFF: 
https://github.com/llvm/llvm-project/commit/9d985082ad0bcb34dd1b9b146abe73907a7cf72b.diff

LOG: [MachineLICM] Remove unused declaration HoistRegion

The function definition was removed on Dec 22, 2011 in commit
in 1eed5b51e87758affdbc10627b4a0884ab86606f.

Added: 


Modified: 
llvm/lib/CodeGen/MachineLICM.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/MachineLICM.cpp 
b/llvm/lib/CodeGen/MachineLICM.cpp
index 19e36669a254..be18581d866d 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -246,8 +246,6 @@ namespace {
 
 void HoistOutOfLoop(MachineDomTreeNode *HeaderN);
 
-void HoistRegion(MachineDomTreeNode *N, bool IsHeader);
-
 void SinkIntoLoop();
 
 void InitRegPressure(MachineBasicBlock *BB);



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[llvm-branch-commits] [flang] 3ee08e3 - Add Semantic check for Flang OpenMP 4.5 - 2.15.3.2 and 2.15.3.3 shared and private clause

2020-11-21 Thread via llvm-branch-commits

Author: Yashaswini
Date: 2020-11-22T12:50:17+05:30
New Revision: 3ee08e38194ac05e42f8c5a633dc1aa8e41139f4

URL: 
https://github.com/llvm/llvm-project/commit/3ee08e38194ac05e42f8c5a633dc1aa8e41139f4
DIFF: 
https://github.com/llvm/llvm-project/commit/3ee08e38194ac05e42f8c5a633dc1aa8e41139f4.diff

LOG: Add Semantic check for Flang OpenMP 4.5 - 2.15.3.2 and 2.15.3.3 shared and 
private clause

Semantic check to restrict the appearance of a variable that is part of another 
variable
 (as an array or structure element) in a PRIVATE or SHARED clause.

Test Cases:

omp-parallel-private01.f90
omp-parallel-private02.f90
omp-parallel-private03.f90
omp-parallel-private04.f90
omp-parallel-shared01.f90
omp-parallel-shared02.f90
omp-parallel-shared03.f90
omp-parallel-shared04.f90

Reviewed by: Kiran Chandramohan @kiranchandramohan , Valentin Clement 
@clementval

Differential Revision: https://reviews.llvm.org/D89395

Added: 
flang/test/Semantics/omp-parallel-private01.f90
flang/test/Semantics/omp-parallel-private02.f90
flang/test/Semantics/omp-parallel-private03.f90
flang/test/Semantics/omp-parallel-private04.f90
flang/test/Semantics/omp-parallel-shared01.f90
flang/test/Semantics/omp-parallel-shared02.f90
flang/test/Semantics/omp-parallel-shared03.f90
flang/test/Semantics/omp-parallel-shared04.f90

Modified: 
flang/lib/Semantics/check-omp-structure.cpp
flang/lib/Semantics/check-omp-structure.h

Removed: 




diff  --git a/flang/lib/Semantics/check-omp-structure.cpp 
b/flang/lib/Semantics/check-omp-structure.cpp
index d3430d724651..636471da78d1 100644
--- a/flang/lib/Semantics/check-omp-structure.cpp
+++ b/flang/lib/Semantics/check-omp-structure.cpp
@@ -372,8 +372,6 @@ CHECK_SIMPLE_CLAUSE(Link, OMPC_link)
 CHECK_SIMPLE_CLAUSE(Mergeable, OMPC_mergeable)
 CHECK_SIMPLE_CLAUSE(Nogroup, OMPC_nogroup)
 CHECK_SIMPLE_CLAUSE(Notinbranch, OMPC_notinbranch)
-CHECK_SIMPLE_CLAUSE(Private, OMPC_private)
-CHECK_SIMPLE_CLAUSE(Shared, OMPC_shared)
 CHECK_SIMPLE_CLAUSE(To, OMPC_to)
 CHECK_SIMPLE_CLAUSE(Uniform, OMPC_uniform)
 CHECK_SIMPLE_CLAUSE(Untied, OMPC_untied)
@@ -412,6 +410,37 @@ void OmpStructureChecker::Enter(const 
parser::OmpClause::Ordered &x) {
   }
 }
 
+void OmpStructureChecker::Enter(const parser::OmpClause::Shared &x) {
+  CheckAllowed(llvm::omp::Clause::OMPC_shared);
+  CheckIsVarPartOfAnotherVar(x.v);
+}
+void OmpStructureChecker::Enter(const parser::OmpClause::Private &x) {
+  CheckAllowed(llvm::omp::Clause::OMPC_private);
+  CheckIsVarPartOfAnotherVar(x.v);
+}
+
+void OmpStructureChecker::CheckIsVarPartOfAnotherVar(
+const parser::OmpObjectList &objList) {
+
+  for (const auto &ompObject : objList.v) {
+std::visit(
+common::visitors{
+[&](const parser::Designator &designator) {
+  if (std::get_if(&designator.u)) {
+if ((parser::Unwrap(ompObject)) ||
+(parser::Unwrap(ompObject))) {
+  context_.Say(GetContext().clauseSource,
+  "A variable that is part of another variable (as an "
+  "array or structure element)"
+  " cannot appear in a PRIVATE or SHARED 
clause."_err_en_US);
+}
+  }
+},
+[&](const parser::Name &name) {},
+},
+ompObject.u);
+  }
+}
 // Following clauses have a seperate node in parse-tree.h.
 CHECK_SIMPLE_PARSER_CLAUSE(OmpAllocateClause, OMPC_allocate)
 CHECK_SIMPLE_PARSER_CLAUSE(OmpDefaultClause, OMPC_default)

diff  --git a/flang/lib/Semantics/check-omp-structure.h 
b/flang/lib/Semantics/check-omp-structure.h
index 8384efecb840..5539ca2566f2 100644
--- a/flang/lib/Semantics/check-omp-structure.h
+++ b/flang/lib/Semantics/check-omp-structure.h
@@ -185,6 +185,8 @@ class OmpStructureChecker
   void CheckDependList(const parser::DataRef &);
   void CheckDependArraySection(
   const common::Indirection &, const parser::Name &);
+
+  void CheckIsVarPartOfAnotherVar(const parser::OmpObjectList &objList);
 };
 } // namespace Fortran::semantics
 #endif // FORTRAN_SEMANTICS_CHECK_OMP_STRUCTURE_H_

diff  --git a/flang/test/Semantics/omp-parallel-private01.f90 
b/flang/test/Semantics/omp-parallel-private01.f90
new file mode 100644
index ..029c36ffeeb5
--- /dev/null
+++ b/flang/test/Semantics/omp-parallel-private01.f90
@@ -0,0 +1,20 @@
+!RUN: %S/test_errors.sh %s %t %f18 -fopenmp
+! OpenMP Version 4.5
+! 2.15.3.3 parallel private Clause
+program omp_parallel_private
+  integer :: i, j, a(10), b(10), c(10)
+  integer :: k = 10
+  type my_type
+integer :: array(10)
+  end type my_type
+
+  type(my_type) :: my_var
+
+  !ERROR: A variable that is part of another variable (as an array or 
structure element) cannot appear in a PRIVATE or SHARED clause.
+  !$omp parallel private(my_var%array)
+  do i = 1, 10
+c(i) = a(i) + b(i) + k
+my_var%array(i) = k
+  

[llvm-branch-commits] [llvm] 68403af - [MBP] Remove unused declaration shouldPredBlockBeOutlined (NFC)

2020-11-21 Thread Kazu Hirata via llvm-branch-commits

Author: Kazu Hirata
Date: 2020-11-21T23:35:02-08:00
New Revision: 68403af007fa1ecd67e0c96d94eb9253b76c759d

URL: 
https://github.com/llvm/llvm-project/commit/68403af007fa1ecd67e0c96d94eb9253b76c759d
DIFF: 
https://github.com/llvm/llvm-project/commit/68403af007fa1ecd67e0c96d94eb9253b76c759d.diff

LOG: [MBP] Remove unused declaration shouldPredBlockBeOutlined (NFC)

The function was introduced on Jun 12, 2016 in commit
071d0f180794f7819c44026815614ce8fa00a3bd.  Its definition was removed
on Mar 2, 2017 in commit 1393761e0ca3fe8271245762f78daf4d5208cd77.

Added: 


Modified: 
llvm/lib/CodeGen/MachineBlockPlacement.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/MachineBlockPlacement.cpp 
b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
index 8a8669638031..461a73741648 100644
--- a/llvm/lib/CodeGen/MachineBlockPlacement.cpp
+++ b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
@@ -449,10 +449,6 @@ class MachineBlockPlacement : public MachineFunctionPass {
   const MachineBasicBlock *BB, const BlockChain &Chain,
   const BlockFilterSet *BlockFilter,
   SmallVector &Successors);
-  bool shouldPredBlockBeOutlined(
-  const MachineBasicBlock *BB, const MachineBasicBlock *Succ,
-  const BlockChain &Chain, const BlockFilterSet *BlockFilter,
-  BranchProbability SuccProb, BranchProbability HotProb);
   bool isBestSuccessor(MachineBasicBlock *BB, MachineBasicBlock *Pred,
BlockFilterSet *BlockFilter);
   void findDuplicateCandidates(SmallVectorImpl 
&Candidates,



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[llvm-branch-commits] [llvm] 1c0941e - [PowerPC] Extend folding RLWINM + RLWINM to post-RA.

2020-11-21 Thread via llvm-branch-commits

Author: Esme-Yi
Date: 2020-11-22T07:37:24Z
New Revision: 1c0941e1524f499e3fbde48fc3bdd0e70fc8f2e4

URL: 
https://github.com/llvm/llvm-project/commit/1c0941e1524f499e3fbde48fc3bdd0e70fc8f2e4
DIFF: 
https://github.com/llvm/llvm-project/commit/1c0941e1524f499e3fbde48fc3bdd0e70fc8f2e4.diff

LOG: [PowerPC] Extend folding RLWINM + RLWINM to post-RA.

Summary: We have the patterns to fold 2 RLWINMs before RA, while some RLWINM 
will be generated after RA, for example rGc4690b007743. If the RLWINM generated 
after RA followed by another RLWINM, we expect to perform the optimization too.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D89855

Added: 
llvm/test/CodeGen/PowerPC/fold-rlwinm-after-ra.mir

Modified: 
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.h
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
llvm/test/CodeGen/PowerPC/vsx_builtins.ll

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp 
b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 2de6a7754015..45587504df56 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -3231,18 +3231,64 @@ bool PPCInstrInfo::convertToImmediateForm(MachineInstr 
&MI,
   return false;
 }
 
-bool PPCInstrInfo::combineRLWINM(MachineInstr &MI,
- MachineInstr **ToErase) const {
+// This function tries to combine two RLWINMs. We not only perform such
+// optimization in SSA, but also after RA, since some RLWINM is generated after
+// RA.
+bool PPCInstrInfo::simplifyRotateAndMaskInstr(MachineInstr &MI,
+  MachineInstr *&ToErase) const {
+  bool Is64Bit = false;
+  switch (MI.getOpcode()) {
+  case PPC::RLWINM:
+  case PPC::RLWINM_rec:
+break;
+  case PPC::RLWINM8:
+  case PPC::RLWINM8_rec:
+Is64Bit = true;
+break;
+  default:
+return false;
+  }
   MachineRegisterInfo *MRI = &MI.getParent()->getParent()->getRegInfo();
-  unsigned FoldingReg = MI.getOperand(1).getReg();
-  if (!Register::isVirtualRegister(FoldingReg))
+  Register FoldingReg = MI.getOperand(1).getReg();
+  MachineInstr *SrcMI = nullptr;
+  bool CanErase = false;
+  bool OtherIntermediateUse = true;
+  if (MRI->isSSA()) {
+if (!Register::isVirtualRegister(FoldingReg))
+  return false;
+SrcMI = MRI->getVRegDef(FoldingReg);
+  } else {
+SrcMI = getDefMIPostRA(FoldingReg, MI, OtherIntermediateUse);
+  }
+  if (!SrcMI)
 return false;
-  MachineInstr *SrcMI = MRI->getVRegDef(FoldingReg);
-  if (SrcMI->getOpcode() != PPC::RLWINM &&
-  SrcMI->getOpcode() != PPC::RLWINM_rec &&
-  SrcMI->getOpcode() != PPC::RLWINM8 &&
-  SrcMI->getOpcode() != PPC::RLWINM8_rec)
+  // TODO: The pairs of RLWINM8(RLWINM) or RLWINM(RLWINM8) never occur before
+  // RA, but after RA. And We can fold RLWINM8(RLWINM) -> RLWINM8, or
+  // RLWINM(RLWINM8) -> RLWINM.
+  switch (SrcMI->getOpcode()) {
+  case PPC::RLWINM:
+  case PPC::RLWINM_rec:
+if (Is64Bit)
+  return false;
+break;
+  case PPC::RLWINM8:
+  case PPC::RLWINM8_rec:
+if (!Is64Bit)
+  return false;
+break;
+  default:
 return false;
+  }
+  if (MRI->isSSA()) {
+CanErase = !SrcMI->hasImplicitDef() && MRI->hasOneNonDBGUse(FoldingReg);
+  } else {
+CanErase = !OtherIntermediateUse && MI.getOperand(1).isKill() &&
+   !SrcMI->hasImplicitDef();
+// In post-RA, if SrcMI also defines the register to be forwarded, we can
+// only do the folding if SrcMI is going to be erased.
+if (!CanErase && SrcMI->definesRegister(SrcMI->getOperand(1).getReg()))
+  return false;
+  }
   assert((MI.getOperand(2).isImm() && MI.getOperand(3).isImm() &&
   MI.getOperand(4).isImm() && SrcMI->getOperand(2).isImm() &&
   SrcMI->getOperand(3).isImm() && SrcMI->getOperand(4).isImm()) &&
@@ -3253,7 +3299,6 @@ bool PPCInstrInfo::combineRLWINM(MachineInstr &MI,
   uint64_t MBMI = MI.getOperand(3).getImm();
   uint64_t MESrc = SrcMI->getOperand(4).getImm();
   uint64_t MEMI = MI.getOperand(4).getImm();
-
   assert((MEMI < 32 && MESrc < 32 && MBMI < 32 && MBSrc < 32) &&
  "Invalid PPC::RLWINM Instruction!");
   // If MBMI is bigger than MEMI, we always can not get run of ones.
@@ -3297,8 +3342,6 @@ bool PPCInstrInfo::combineRLWINM(MachineInstr &MI,
 
   // If final mask is 0, MI result should be 0 too.
   if (FinalMask.isNullValue()) {
-bool Is64Bit =
-(MI.getOpcode() == PPC::RLWINM8 || MI.getOpcode() == PPC::RLWINM8_rec);
 Simplified = true;
 LLVM_DEBUG(dbgs() << "Replace Instr: ");
 LLVM_DEBUG(MI.dump());
@@ -3356,12 +3399,10 @@ bool PPCInstrInfo::combineRLWINM(MachineInstr &MI,
 LLVM_DEBUG(dbgs() << "To: ");
 LLVM_DEBUG(MI.dump());
   }
-  if (Simplified & MRI->use_nodbg_empty(FoldingReg) &&
-  !SrcMI->hasImplicitD