date:20160808

[llvm-branch-commits] [cfe-branch] r278020 - Merging r277796, r277797, r277866, r277889 and r277900:

2016-08-08 Thread Hans Wennborg via llvm-branch-commits

Author: hans
Date: Mon Aug  8 11:37:00 2016
New Revision: 278020

URL: http://llvm.org/viewvc/llvm-project?rev=278020&view=rev
Log:
Merging r277796, r277797, r277866, r277889 and r277900:


r277796 | rtrieu | 2016-08-04 19:39:30 -0700 (Thu, 04 Aug 2016) | 6 lines

Allow -1 to assign max value to unsigned bitfields.

Silence the -Wbitfield-constant-conversion warning for when -1 or other
negative values are assigned to unsigned bitfields, provided that the bitfield
is wider than the minimum number of bits needed to encode the negative value.




r277797 | rtrieu | 2016-08-04 20:16:36 -0700 (Thu, 04 Aug 2016) | 7 lines

Fix crash in template type diffing.

When the type being diffed is a type alias, and the orginal type is not a
templated type, then there will be no unsugared TemplateSpecializationType.
When this happens, exit early from the constructor.  Also add assertions to
the other iterator accessor to prevent the iterator from being used.




r277866 | rtrieu | 2016-08-05 14:02:34 -0700 (Fri, 05 Aug 2016) | 12 lines

Fix false positive in -Wunsequenced and templates.

For builtin logical operators, there is a well-defined ordering of argument
evaluation.  For overloaded operator of the same type, there is no argument
evaluation order, similar to other function calls.  When both are present,
uninstantiated templates with an operator&& is treated as an unresolved
function call.  Unresolved function calls are treated as normal function calls,
and may result in false positives when the builtin logical operator is used.
Have the unsequenced checker ignore dependent expressions to avoid this
false positive.  The check also happens in template instantiations to catch
when the overloaded operator is used.




r277889 | rtrieu | 2016-08-05 16:24:47 -0700 (Fri, 05 Aug 2016) | 9 lines

Fix two false positives in -Wreturn-stack-address

If the return type is a pointer and the function returns the reference to a
pointer, don't warn since only the value is returned, not the reference.

If a reference function parameter appears in the reference chain, don't warn
since binding happens at the caller scope, so addresses returned are not
to local stack.  This includes default arguments as well.




r277900 | rtrieu | 2016-08-05 18:44:06 -0700 (Fri, 05 Aug 2016) | 2 lines

Fix typos from r277797 and unused variable from r277889.



Modified:
cfe/branches/release_39/   (props changed)
cfe/branches/release_39/lib/AST/ASTDiagnostic.cpp
cfe/branches/release_39/lib/Sema/SemaChecking.cpp
cfe/branches/release_39/test/Misc/diag-template-diffing.cpp
cfe/branches/release_39/test/Sema/bitfield.c
cfe/branches/release_39/test/Sema/constant-conversion.c
cfe/branches/release_39/test/SemaCXX/return-stack-addr-2.cpp
cfe/branches/release_39/test/SemaCXX/warn-unsequenced.cpp

Propchange: cfe/branches/release_39/
--
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Aug  8 11:37:00 2016
@@ -1,4 +1,4 @@
 /cfe/branches/type-system-rewrite:134693-134817
-/cfe/trunk:275880,275967,276102,276350,276361,276473,276653,276716,276887,276891,276979,276983,277095,277138,277141,277221,277307,277743
+/cfe/trunk:275880,275967,276102,276350,276361,276473,276653,276716,276887,276891,276979,276983,277095,277138,277141,277221,277307,277743,277796-277797,277866,277889,277900
 /cfe/trunk/test:170344
 /cfe/trunk/test/SemaTemplate:126920

Modified: cfe/branches/release_39/lib/AST/ASTDiagnostic.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/branches/release_39/lib/AST/ASTDiagnostic.cpp?rev=278020&r1=278019&r2=278020&view=diff
==
--- cfe/branches/release_39/lib/AST/ASTDiagnostic.cpp (original)
+++ cfe/branches/release_39/lib/AST/ASTDiagnostic.cpp Mon Aug  8 11:37:00 2016
@@ -917,6 +917,8 @@ class TemplateDiff {
   /// template argument.
   InternalIterator(const TemplateSpecializationType *TST)
   : TST(TST), Index(0), CurrentTA(nullptr), EndTA(nullptr) {
+if (!TST) return;
+
 if (isEnd()) return;
 
 // Set to first template argument.  If not a parameter pack, done.
@@ -937,11 +939,13 @@ class TemplateDiff {
 
   /// isEnd - Returns

[llvm-branch-commits] [cfe-branch] r278019 - Merging r277743:

2016-08-08 Thread Hans Wennborg via llvm-branch-commits

Author: hans
Date: Mon Aug  8 11:32:10 2016
New Revision: 278019

URL: http://llvm.org/viewvc/llvm-project?rev=278019&view=rev
Log:
Merging r277743:

r277743 | bader | 2016-08-04 11:06:27 -0700 (Thu, 04 Aug 2016) | 12 lines

[OpenCL] Added underscores to the names of 'to_addr' OpenCL built-ins.

Summary:
In order to re-define OpenCL built-in functions
'to_{private,local,global}' in OpenCL run-time library LLVM names must
be different from the clang built-in function names.

Reviewers: yaxunl, Anastasia

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D23120


Modified:
cfe/branches/release_39/   (props changed)
cfe/branches/release_39/lib/CodeGen/CGBuiltin.cpp
cfe/branches/release_39/test/CodeGenOpenCL/to_addr_builtin.cl

Propchange: cfe/branches/release_39/
--
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Aug  8 11:32:10 2016
@@ -1,4 +1,4 @@
 /cfe/branches/type-system-rewrite:134693-134817
-/cfe/trunk:275880,275967,276102,276350,276361,276473,276653,276716,276887,276891,276979,276983,277095,277138,277141,277221,277307
+/cfe/trunk:275880,275967,276102,276350,276361,276473,276653,276716,276887,276891,276979,276983,277095,277138,277141,277221,277307,277743
 /cfe/trunk/test:170344
 /cfe/trunk/test/SemaTemplate:126920

Modified: cfe/branches/release_39/lib/CodeGen/CGBuiltin.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/branches/release_39/lib/CodeGen/CGBuiltin.cpp?rev=278019&r1=278018&r2=278019&view=diff
==
--- cfe/branches/release_39/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/branches/release_39/lib/CodeGen/CGBuiltin.cpp Mon Aug  8 11:32:10 2016
@@ -2209,8 +2209,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(
   NewArg = Builder.CreateAddrSpaceCast(Arg0, NewArgT);
 else
   NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT);
-auto NewCall = Builder.CreateCall(CGM.CreateRuntimeFunction(FTy,
-  E->getDirectCallee()->getName()), {NewArg});
+auto NewName = std::string("__") + E->getDirectCallee()->getName().str();
+auto NewCall =
+Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, NewName), {NewArg});
 return RValue::get(Builder.CreateBitOrPointerCast(NewCall,
   ConvertType(E->getType(;
   }

Modified: cfe/branches/release_39/test/CodeGenOpenCL/to_addr_builtin.cl
URL: 
http://llvm.org/viewvc/llvm-project/cfe/branches/release_39/test/CodeGenOpenCL/to_addr_builtin.cl?rev=278019&r1=278018&r2=278019&view=diff
==
--- cfe/branches/release_39/test/CodeGenOpenCL/to_addr_builtin.cl (original)
+++ cfe/branches/release_39/test/CodeGenOpenCL/to_addr_builtin.cl Mon Aug  8 
11:32:10 2016
@@ -14,74 +14,74 @@ void test(void) {
   generic int *gen;
 
   //CHECK: %[[ARG:.*]] = addrspacecast i32 addrspace(1)* %{{.*}} to i8 
addrspace(4)*
-  //CHECK: %[[RET:.*]] = call i8 addrspace(1)* @to_global(i8 addrspace(4)* 
%[[ARG]])
+  //CHECK: %[[RET:.*]] = call i8 addrspace(1)* @__to_global(i8 addrspace(4)* 
%[[ARG]])
   //CHECK: %{{.*}} = bitcast i8 addrspace(1)* %[[RET]] to i32 addrspace(1)*
   glob = to_global(glob);
   
   //CHECK: %[[ARG:.*]] = addrspacecast i32 addrspace(3)* %{{.*}} to i8 
addrspace(4)*
-  //CHECK: %[[RET:.*]] = call i8 addrspace(1)* @to_global(i8 addrspace(4)* 
%[[ARG]])
+  //CHECK: %[[RET:.*]] = call i8 addrspace(1)* @__to_global(i8 addrspace(4)* 
%[[ARG]])
   //CHECK: %{{.*}} = bitcast i8 addrspace(1)* %[[RET]] to i32 addrspace(1)*
   glob = to_global(loc);
  
   //CHECK: %[[ARG:.*]] = addrspacecast i32* %{{.*}} to i8 addrspace(4)*
-  //CHECK: %[[RET:.*]] = call i8 addrspace(1)* @to_global(i8 addrspace(4)* 
%[[ARG]])
+  //CHECK: %[[RET:.*]] = call i8 addrspace(1)* @__to_global(i8 addrspace(4)* 
%[[ARG]])
   //CHECK: %{{.*}} = bitcast i8 addrspace(1)* %[[RET]] to i32 addrspace(1)*
   glob = to_global(priv);
  
   //CHECK: %[[ARG:.*]] = bitcast i32 addrspace(4)* %{{.*}} to i8 addrspace(4)*
-  //CHECK: %[[RET:.*]] = call i8 addrspace(1)* @to_global(i8 addrspace(4)* 
%[[ARG]])
+  //CHECK: %[[RET:.*]] = call i8 addrspace(1)* @__to_global(i8 addrspace(4)* 
%[[ARG]])
   //CHECK: %{{.*}} = bitcast i8 addrspace(1)* %[[RET]] to i32 addrspace(1)*
   glob = to_global(gen);
   
   //CHECK: %[[ARG:.*]] = addrspacecast i32 addrspace(1)* %{{.*}} to i8 
addrspace(4)*
-  //CHECK: %[[RET:.*]] = call i8 addrspace(3)* @to_local(i8 addrspace(4)* 
%[[ARG]])
+  //CHECK: %[[RET:.*]] = call i8 addrspace(3)* @__to_local(i8 addrspace(4)* 
%[[ARG]])
   //CHECK: %{{.*}} = bitcast i8 addrspace(3)* %[[RET]] to i32 addrspace(3)*
   loc = to_local(glob);
 
   //CHECK: %[[ARG:.*]] = addrspacecast i32 addrspace(3)* %{{.*}} to i8 
addrspace(4)*
-  //CHECK: %[[RET:.*]] = call i8 addrspace(3

[llvm-branch-commits] [llvm-branch] r278045 - Add LDC compiler to list of external OS projects using LLVM 3.9

2016-08-08 Thread Kai Nacke via llvm-branch-commits

Author: redstar
Date: Mon Aug  8 15:17:36 2016
New Revision: 278045

URL: http://llvm.org/viewvc/llvm-project?rev=278045&view=rev
Log:
Add LDC compiler to list of external OS projects using LLVM 3.9

Modified:
llvm/branches/release_39/docs/ReleaseNotes.rst

Modified: llvm/branches/release_39/docs/ReleaseNotes.rst
URL: 
http://llvm.org/viewvc/llvm-project/llvm/branches/release_39/docs/ReleaseNotes.rst?rev=278045&r1=278044&r2=278045&view=diff
==
--- llvm/branches/release_39/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_39/docs/ReleaseNotes.rst Mon Aug  8 15:17:36 2016
@@ -283,6 +283,21 @@ projects that have already been updated
 
 * A project
 
+LDC - the LLVM-based D compiler
+---
+
+`D `_ is a language with C-like syntax and static typing. It
+pragmatically combines efficiency, control, and modeling power, with safety and
+programmer productivity. D supports powerful concepts like Compile-Time 
Function
+Execution (CTFE) and Template Meta-Programming, provides an innovative approach
+to concurrency and offers many classical paradigms.
+
+`LDC `_ uses the frontend from the reference 
compiler
+combined with LLVM as backend to produce efficient native code. LDC targets
+x86/x86_64 systems like Linux, OS X, FreeBSD and Windows and also Linux on ARM
+and PowerPC (32/64 bit). Ports to other architectures like AArch64 and MIPS64
+are underway.
+
 
 Additional Information
 ==


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[llvm-branch-commits] [lldb] r278047 - Merging r277426:

2016-08-08 Thread Hans Wennborg via llvm-branch-commits

Author: hans
Date: Mon Aug  8 15:20:15 2016
New Revision: 278047

URL: http://llvm.org/viewvc/llvm-project?rev=278047&view=rev
Log:
Merging r277426:

r277426 | nitesh.jain | 2016-08-02 00:18:07 -0700 (Tue, 02 Aug 2016) | 7 lines

[LLVM][MIPS] Add (D)SUBU, (D)ADDU, LUI instructions emulation . Fix emulation 
for (D)ADDIU, SD/SW and LW/LD instructions

Reviewers: clayborg, jaydeep, bhushan

Subscribers: mohit.bhakkad, slthakur, sdardis, lldb-commits

Differential Revision: https://reviews.llvm.org/D20357


Modified:
lldb/branches/release_39/   (props changed)

lldb/branches/release_39/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp

lldb/branches/release_39/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h

lldb/branches/release_39/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp

lldb/branches/release_39/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h

Propchange: lldb/branches/release_39/
--
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Aug  8 15:20:15 2016
@@ -1,3 +1,3 @@
 /lldb/branches/apple/python-GIL:156467-162159
 /lldb/branches/iohandler:198360-200250
-/lldb/trunk:277343
+/lldb/trunk:277343,277426

Modified: 
lldb/branches/release_39/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/branches/release_39/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp?rev=278047&r1=278046&r2=278047&view=diff
==
--- 
lldb/branches/release_39/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
 (original)
+++ 
lldb/branches/release_39/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
 Mon Aug  8 15:20:15 2016
@@ -494,9 +494,13 @@ EmulateInstructionMIPS::GetOpcodeForInst
 
//--
 // Prologue/Epilogue instructions
 
//--
-{ "ADDiu",  &EmulateInstructionMIPS::Emulate_ADDiu,   "ADDIU 
rt,rs,immediate"},
-{ "SW", &EmulateInstructionMIPS::Emulate_SW,  "SW 
rt,offset(rs)" },
-{ "LW", &EmulateInstructionMIPS::Emulate_LW,  "LW 
rt,offset(base)"   },
+{ "ADDiu",  &EmulateInstructionMIPS::Emulate_ADDiu,   "ADDIU 
rt, rs, immediate"},
+{ "SW", &EmulateInstructionMIPS::Emulate_SW,  "SW rt, 
offset(rs)"  },
+{ "LW", &EmulateInstructionMIPS::Emulate_LW,  "LW rt, 
offset(base)"},
+{ "SUBU",   &EmulateInstructionMIPS::Emulate_SUBU_ADDU,   "SUBU 
rd, rs, rt"},
+{ "ADDU",   &EmulateInstructionMIPS::Emulate_SUBU_ADDU,   "ADDU 
rd, rs, rt"},
+{ "LUI",&EmulateInstructionMIPS::Emulate_LUI,  "LUI 
rt, immediate"  },
+
 
//--
 // MicroMIPS Prologue/Epilogue instructions
 
//--
@@ -904,36 +908,57 @@ EmulateInstructionMIPS::nonvolatile_reg_
 bool
 EmulateInstructionMIPS::Emulate_ADDiu (llvm::MCInst& insn)
 {
+// ADDIU rt, rs, immediate
+// GPR[rt] <- GPR[rs] + sign_extend(immediate)
+
+uint8_t dst, src;
 bool success = false;
 const uint32_t imm16 = insn.getOperand(2).getImm();
-uint32_t imm = SignedBits(imm16, 15, 0);
-uint64_t result;
-uint32_t src, dst;
+int64_t imm = SignedBits(imm16, 15, 0);
 
 dst = m_reg_info->getEncodingValue (insn.getOperand(0).getReg());
 src = m_reg_info->getEncodingValue (insn.getOperand(1).getReg());
 
-/* Check if this is addiu sp,,imm16 */
-if (dst == dwarf_sp_mips)
+// If immediate value is greater then 2^16 - 1 then clang generate
+// LUI, ADDIU, SUBU instructions in prolog.
+// Example
+// lui$1, 0x2
+// addiu $1, $1, -0x5920
+// subu  $sp, $sp, $1
+// In this case, ADDIU dst and src will be same and not equal to sp
+if (dst == src)
 {
+Context context;
+
 /* read  register */
-uint64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, 
dwarf_zero_mips + src, 0, &success);
+const int64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, 
dwarf_zero_mips + src, 0, &success);
 if (!success)
 return false;
 
-result = src_opd_val + imm;
+/* Check if this is daddiu sp, sp, imm16 */
+if (dst == dwarf_sp_mips)
+{
+uint64_t result = src_opd_val + imm;
+RegisterInfo reg_info_sp;
 
-Context context;
-Regi

[llvm-branch-commits] [cfe-branch] r278020 - Merging r277796, r277797, r277866, r277889 and r277900:

[llvm-branch-commits] [cfe-branch] r278019 - Merging r277743:

[llvm-branch-commits] [llvm-branch] r278045 - Add LDC compiler to list of external OS projects using LLVM 3.9

[llvm-branch-commits] [lldb] r278047 - Merging r277426:

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