https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/78970
>From 8cc71cb7ddb2e6691d31138ae2ef683a0690e171 Mon Sep 17 00:00:00 2001
From: wangpc
Date: Mon, 22 Jan 2024 21:11:42 +0800
Subject: [PATCH 1/7] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?UTF-8?q?itial=20version?=
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Created using spr 1.3.4
---
clang/lib/Basic/Targets/RISCV.cpp | 2 +-
.../test/Preprocessor/riscv-target-features.c | 18 ++
llvm/docs/RISCVUsage.rst | 2 +
llvm/lib/Support/RISCVISAInfo.cpp | 2 +
llvm/lib/Target/RISCV/RISCVFeatures.td| 26 ++-
llvm/test/CodeGen/RISCV/attributes.ll | 8 +
llvm/test/MC/RISCV/rv32i-invalid.s| 2 +-
llvm/test/MC/RISCV/rv32zaamo-invalid.s| 11 ++
llvm/test/MC/RISCV/rv32zaamo-valid.s | 122 ++
llvm/test/MC/RISCV/rv32zalrsc-invalid.s | 7 +
llvm/test/MC/RISCV/rv32zalrsc-valid.s | 36
llvm/test/MC/RISCV/rv64zaamo-invalid.s| 11 ++
llvm/test/MC/RISCV/rv64zaamo-valid.s | 157 ++
llvm/test/MC/RISCV/rv64zalrsc-invalid.s | 7 +
llvm/test/MC/RISCV/rv64zalrsc-valid.s | 42 +
llvm/unittests/Support/RISCVISAInfoTest.cpp | 2 +
16 files changed, 452 insertions(+), 3 deletions(-)
create mode 100644 llvm/test/MC/RISCV/rv32zaamo-invalid.s
create mode 100644 llvm/test/MC/RISCV/rv32zaamo-valid.s
create mode 100644 llvm/test/MC/RISCV/rv32zalrsc-invalid.s
create mode 100644 llvm/test/MC/RISCV/rv32zalrsc-valid.s
create mode 100644 llvm/test/MC/RISCV/rv64zaamo-invalid.s
create mode 100644 llvm/test/MC/RISCV/rv64zaamo-valid.s
create mode 100644 llvm/test/MC/RISCV/rv64zalrsc-invalid.s
create mode 100644 llvm/test/MC/RISCV/rv64zalrsc-valid.s
diff --git a/clang/lib/Basic/Targets/RISCV.cpp
b/clang/lib/Basic/Targets/RISCV.cpp
index c71b2e9eeb6c172..9af9bdd1d74e9dd 100644
--- a/clang/lib/Basic/Targets/RISCV.cpp
+++ b/clang/lib/Basic/Targets/RISCV.cpp
@@ -175,7 +175,7 @@ void RISCVTargetInfo::getTargetDefines(const LangOptions
&Opts,
Builder.defineMacro("__riscv_muldiv");
}
- if (ISAInfo->hasExtension("a")) {
+ if (ISAInfo->hasExtension("a") || ISAInfo->hasExtension("zaamo")) {
Builder.defineMacro("__riscv_atomic");
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
diff --git a/clang/test/Preprocessor/riscv-target-features.c
b/clang/test/Preprocessor/riscv-target-features.c
index 5fde5ccdbeacfb0..38473d07004a574 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -141,7 +141,9 @@
// Experimental extensions
+// CHECK-NOT: __riscv_zaamo {{.*$}}
// CHECK-NOT: __riscv_zacas {{.*$}}
+// CHECK-NOT: __riscv_zalrsc {{.*$}}
// CHECK-NOT: __riscv_zcmop {{.*$}}
// CHECK-NOT: __riscv_zfbfmin {{.*$}}
// CHECK-NOT: __riscv_zicfilp {{.*$}}
@@ -1307,6 +1309,14 @@
// CHECK-ZVKT-EXT: __riscv_zvkt 100{{$}}
// Experimental extensions
+// RUN: %clang --target=riscv32 -menable-experimental-extensions \
+// RUN: -march=rv32i_zaamo0p1 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
+// RUN: %clang --target=riscv64 -menable-experimental-extensions \
+// RUN: -march=rv64i_zaamo0p1 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
+// CHECK-ZAAMO-EXT: __riscv_atomic 1
+// CHECK-ZAAMO-EXT: __riscv_zaamo 1000{{$}}
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
// RUN: -march=rv32i_zacas1p0 -x c -E -dM %s \
@@ -1316,6 +1326,14 @@
// RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
+// RUN: %clang --target=riscv32 -menable-experimental-extensions \
+// RUN: -march=rv32i_zalrsc0p1 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZALRSC-EXT %s
+// RUN: %clang --target=riscv64 -menable-experimental-extensions \
+// RUN: -march=rv64i_zalrsc0p1 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZALRSC-EXT %s
+// CHECK-ZALRSC-EXT: __riscv_zalrsc 1000{{$}}
+
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
// RUN: -march=rv32izfbfmin1p0 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZFBFMIN-EXT %s
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 6fdc945ad27078e..005e9f1d7324445 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -100,6 +100,8 @@ on support follow.
``V``Supported
``Za128rs`` Supported (`See note
<#riscv-profiles-extensions-note>`__)
``Za64rs`` Supported (`See note
<#riscv-profiles-extensions-note>`__)
+ ``Zaamo``Supported
+ ``Zalrsc`` Supported
``Zawrs``Assembly Support
``Zba`` Supported
``Zbb`` Sup
