[Lldb-commits] [lldb] 9f6ff07 - [DebugInfo] Enable the debug entry values feature by default
Author: Djordje Todorovic Date: 2020-02-12T10:25:14+01:00 New Revision: 9f6ff07f8a396dfc736c4cb6f9fba9a203531329 URL: https://github.com/llvm/llvm-project/commit/9f6ff07f8a396dfc736c4cb6f9fba9a203531329 DIFF: https://github.com/llvm/llvm-project/commit/9f6ff07f8a396dfc736c4cb6f9fba9a203531329.diff LOG: [DebugInfo] Enable the debug entry values feature by default This patch enables the debug entry values feature. - Remove the (CC1) experimental -femit-debug-entry-values option - Enable it for x86, arm and aarch64 targets - Resolve the test failures - Leave the llc experimental option for targets that do not support the CallSiteInfo yet Differential Revision: https://reviews.llvm.org/D73534 Added: llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll Modified: clang/include/clang/Basic/CodeGenOptions.def clang/include/clang/Driver/CC1Options.td clang/lib/CodeGen/BackendUtil.cpp clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/test/CodeGen/debug-info-extern-call.c clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp lldb/packages/Python/lldbsuite/test/decorators.py lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile llvm/include/llvm/CodeGen/CommandFlags.inc llvm/include/llvm/Target/TargetMachine.h llvm/include/llvm/Target/TargetOptions.h llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h llvm/lib/CodeGen/LiveDebugValues.cpp llvm/lib/CodeGen/MIRParser/MIRParser.cpp llvm/lib/CodeGen/MachineFunction.cpp llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp llvm/lib/CodeGen/TargetOptionsImpl.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/AArch64TargetMachine.cpp llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86TargetMachine.cpp llvm/test/CodeGen/ARM/smml.ll llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir llvm/test/CodeGen/MIR/X86/call-site-info-error3.mir llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir llvm/test/CodeGen/X86/call-site-info-output.ll llvm/test/DebugInfo/AArch64/call-site-info-output.ll llvm/test/DebugInfo/ARM/call-site-info-output.ll llvm/test/DebugInfo/ARM/entry-value-multi-byte-expr.ll llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpret-movzxi.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir llvm/test/DebugInfo/Sparc/entry-value-complex-reg-expr.ll llvm/test/DebugInfo/X86/dbg-value-range.ll llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll llvm/test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll llvm/test/DebugInfo/X86/dbgcall-site-zero-valued-imms.ll llvm/test/DebugInfo/X86/loclists-dwp.ll llvm/test/tools/llvm-dwarfdump/X86/locstats.ll llvm/test/tools/llvm-dwarfdump/X86/stats-dbg-callsite-info.ll llvm/test/tools/llvm-dwarfdump/X86/valid-call-site-GNU-extensions.ll llvm/test/tools/llvm-locstats/locstats.ll Removed: diff --git a/clang/include/clang/Basic/CodeGenOptions.
[Lldb-commits] [lldb] 97ed706 - Revert "[DebugInfo] Enable the debug entry values feature by default"
Author: Djordje Todorovic Date: 2020-02-12T11:59:04+01:00 New Revision: 97ed706a962af7c6835c7b6716207c4072011ac1 URL: https://github.com/llvm/llvm-project/commit/97ed706a962af7c6835c7b6716207c4072011ac1 DIFF: https://github.com/llvm/llvm-project/commit/97ed706a962af7c6835c7b6716207c4072011ac1.diff LOG: Revert "[DebugInfo] Enable the debug entry values feature by default" This reverts commit rG9f6ff07f8a39. Found a test failure on clang-with-thin-lto-ubuntu buildbot. Added: Modified: clang/include/clang/Basic/CodeGenOptions.def clang/include/clang/Driver/CC1Options.td clang/lib/CodeGen/BackendUtil.cpp clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/test/CodeGen/debug-info-extern-call.c clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp lldb/packages/Python/lldbsuite/test/decorators.py lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile llvm/include/llvm/CodeGen/CommandFlags.inc llvm/include/llvm/Target/TargetMachine.h llvm/include/llvm/Target/TargetOptions.h llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h llvm/lib/CodeGen/LiveDebugValues.cpp llvm/lib/CodeGen/MIRParser/MIRParser.cpp llvm/lib/CodeGen/MachineFunction.cpp llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp llvm/lib/CodeGen/TargetOptionsImpl.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/AArch64TargetMachine.cpp llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86TargetMachine.cpp llvm/test/CodeGen/ARM/smml.ll llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir llvm/test/CodeGen/MIR/X86/call-site-info-error3.mir llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir llvm/test/CodeGen/X86/call-site-info-output.ll llvm/test/DebugInfo/AArch64/call-site-info-output.ll llvm/test/DebugInfo/ARM/call-site-info-output.ll llvm/test/DebugInfo/ARM/entry-value-multi-byte-expr.ll llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpret-movzxi.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir llvm/test/DebugInfo/Sparc/entry-value-complex-reg-expr.ll llvm/test/DebugInfo/X86/dbg-value-range.ll llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll llvm/test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll llvm/test/DebugInfo/X86/dbgcall-site-zero-valued-imms.ll llvm/test/DebugInfo/X86/loclists-dwp.ll llvm/test/tools/llvm-dwarfdump/X86/locstats.ll llvm/test/tools/llvm-dwarfdump/X86/stats-dbg-callsite-info.ll llvm/test/tools/llvm-dwarfdump/X86/valid-call-site-GNU-extensions.ll llvm/test/tools/llvm-locstats/locstats.ll Removed: llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll diff --git a/clang/include/clang/Basic/CodeGenOptions.def b/clang/include/clang/Basic/CodeGenOptions.def index fa450724ddd4..48c0df49e32d 100644 --- a/clang/include/clang/Basic/CodeGenOptions.def +++ b/clang/include/clang/Basic/CodeGenOptions.def @@ -63,6 +63,7 @@ CODEGENOPT(ExperimentalNewPa
[Lldb-commits] [lldb] a82d3e8 - Reland "[DebugInfo] Enable the debug entry values feature by default"
Author: Djordje Todorovic Date: 2020-02-18T14:41:08+01:00 New Revision: a82d3e8a6e67473c94a5ce6345372748e9b61718 URL: https://github.com/llvm/llvm-project/commit/a82d3e8a6e67473c94a5ce6345372748e9b61718 DIFF: https://github.com/llvm/llvm-project/commit/a82d3e8a6e67473c94a5ce6345372748e9b61718.diff LOG: Reland "[DebugInfo] Enable the debug entry values feature by default" This patch enables the debug entry values feature. - Remove the (CC1) experimental -femit-debug-entry-values option - Enable it for x86, arm and aarch64 targets - Resolve the test failures - Leave the llc experimental option for targets that do not support the CallSiteInfo yet Differential Revision: https://reviews.llvm.org/D73534 Added: llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll Modified: clang/include/clang/Basic/CodeGenOptions.def clang/include/clang/Driver/CC1Options.td clang/lib/CodeGen/BackendUtil.cpp clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/test/CodeGen/debug-info-extern-call.c clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp lldb/packages/Python/lldbsuite/test/decorators.py lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile llvm/include/llvm/CodeGen/CommandFlags.inc llvm/include/llvm/Target/TargetMachine.h llvm/include/llvm/Target/TargetOptions.h llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h llvm/lib/CodeGen/LiveDebugValues.cpp llvm/lib/CodeGen/MIRParser/MIRParser.cpp llvm/lib/CodeGen/MachineFunction.cpp llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp llvm/lib/CodeGen/TargetOptionsImpl.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/AArch64TargetMachine.cpp llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86TargetMachine.cpp llvm/test/CodeGen/AArch64/arm64-anyregcc.ll llvm/test/CodeGen/AArch64/arm64-patchpoint.ll llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll llvm/test/CodeGen/ARM/smml.ll llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir llvm/test/CodeGen/MIR/X86/call-site-info-error3.mir llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir llvm/test/CodeGen/X86/call-site-info-output.ll llvm/test/CodeGen/X86/hoist-invariant-load.ll llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll llvm/test/CodeGen/X86/statepoint-allocas.ll llvm/test/CodeGen/X86/tail-dup-repeat.ll llvm/test/CodeGen/X86/xray-custom-log.ll llvm/test/CodeGen/X86/xray-typed-event-log.ll llvm/test/DebugInfo/AArch64/call-site-info-output.ll llvm/test/DebugInfo/ARM/call-site-info-output.ll llvm/test/DebugInfo/ARM/entry-value-multi-byte-expr.ll llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpret-movzxi.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir llvm/test/DebugInfo/Sparc/entry-value-complex-reg-expr.ll llvm/test/DebugInfo/X86/dbg-value-range.ll llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll llvm/test
[Lldb-commits] [lldb] 2bf44d1 - Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
Author: Djordje Todorovic Date: 2020-02-18T16:38:11+01:00 New Revision: 2bf44d11cb42a952bdeb778210d8b3e737f0b96e URL: https://github.com/llvm/llvm-project/commit/2bf44d11cb42a952bdeb778210d8b3e737f0b96e DIFF: https://github.com/llvm/llvm-project/commit/2bf44d11cb42a952bdeb778210d8b3e737f0b96e.diff LOG: Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" This reverts commit rGa82d3e8a6e67. Added: Modified: clang/include/clang/Basic/CodeGenOptions.def clang/include/clang/Driver/CC1Options.td clang/lib/CodeGen/BackendUtil.cpp clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/test/CodeGen/debug-info-extern-call.c clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp lldb/packages/Python/lldbsuite/test/decorators.py lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile llvm/include/llvm/CodeGen/CommandFlags.inc llvm/include/llvm/Target/TargetMachine.h llvm/include/llvm/Target/TargetOptions.h llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h llvm/lib/CodeGen/LiveDebugValues.cpp llvm/lib/CodeGen/MIRParser/MIRParser.cpp llvm/lib/CodeGen/MachineFunction.cpp llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp llvm/lib/CodeGen/TargetOptionsImpl.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/AArch64TargetMachine.cpp llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86TargetMachine.cpp llvm/test/CodeGen/AArch64/arm64-anyregcc.ll llvm/test/CodeGen/AArch64/arm64-patchpoint.ll llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll llvm/test/CodeGen/ARM/smml.ll llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir llvm/test/CodeGen/MIR/X86/call-site-info-error3.mir llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir llvm/test/CodeGen/X86/call-site-info-output.ll llvm/test/CodeGen/X86/hoist-invariant-load.ll llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll llvm/test/CodeGen/X86/statepoint-allocas.ll llvm/test/CodeGen/X86/tail-dup-repeat.ll llvm/test/CodeGen/X86/xray-custom-log.ll llvm/test/CodeGen/X86/xray-typed-event-log.ll llvm/test/DebugInfo/AArch64/call-site-info-output.ll llvm/test/DebugInfo/ARM/call-site-info-output.ll llvm/test/DebugInfo/ARM/entry-value-multi-byte-expr.ll llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpret-movzxi.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir llvm/test/DebugInfo/Sparc/entry-value-complex-reg-expr.ll llvm/test/DebugInfo/X86/dbg-value-range.ll llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll llvm/test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll llvm/test/DebugInfo/X86/dbgcall-site-zero-valued-imms.ll llvm/test/DebugInfo/X86/loclists-dwp.ll llvm/test/tools/llvm-dwarfdump/X86/locstats.ll llvm/test/tools/llvm-dwarfdump/X86/stats-dbg-callsite-info.ll llvm/test/tools/llvm-dwarfdump/X86/valid-call-site-GNU-extensions.ll llvm/test
[Lldb-commits] [lldb] faff707 - Reland "[DebugInfo] Enable the debug entry values feature by default"
Author: Djordje Todorovic Date: 2020-02-19T11:12:26+01:00 New Revision: faff707db82d7db12fcd9f7826b8741261230e63 URL: https://github.com/llvm/llvm-project/commit/faff707db82d7db12fcd9f7826b8741261230e63 DIFF: https://github.com/llvm/llvm-project/commit/faff707db82d7db12fcd9f7826b8741261230e63.diff LOG: Reland "[DebugInfo] Enable the debug entry values feature by default" Differential Revision: https://reviews.llvm.org/D73534 Added: llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll Modified: clang/include/clang/Basic/CodeGenOptions.def clang/include/clang/Driver/CC1Options.td clang/lib/CodeGen/BackendUtil.cpp clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/test/CodeGen/debug-info-extern-call.c clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp lldb/packages/Python/lldbsuite/test/decorators.py lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile llvm/include/llvm/CodeGen/CommandFlags.inc llvm/include/llvm/Target/TargetMachine.h llvm/include/llvm/Target/TargetOptions.h llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h llvm/lib/CodeGen/LiveDebugValues.cpp llvm/lib/CodeGen/MIRParser/MIRParser.cpp llvm/lib/CodeGen/MachineFunction.cpp llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp llvm/lib/CodeGen/TargetOptionsImpl.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.cpp llvm/lib/Target/AArch64/AArch64TargetMachine.cpp llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86TargetMachine.cpp llvm/test/CodeGen/AArch64/arm64-anyregcc.ll llvm/test/CodeGen/AArch64/arm64-patchpoint.ll llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll llvm/test/CodeGen/ARM/smml.ll llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir llvm/test/CodeGen/MIR/X86/call-site-info-error3.mir llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir llvm/test/CodeGen/X86/call-site-info-output.ll llvm/test/CodeGen/X86/hoist-invariant-load.ll llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll llvm/test/CodeGen/X86/statepoint-allocas.ll llvm/test/CodeGen/X86/tail-dup-repeat.ll llvm/test/CodeGen/X86/xray-custom-log.ll llvm/test/CodeGen/X86/xray-typed-event-log.ll llvm/test/DebugInfo/AArch64/call-site-info-output.ll llvm/test/DebugInfo/ARM/call-site-info-output.ll llvm/test/DebugInfo/ARM/entry-value-multi-byte-expr.ll llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpret-movzxi.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir llvm/test/DebugInfo/Sparc/entry-value-complex-reg-expr.ll llvm/test/DebugInfo/X86/dbg-value-range.ll llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll llvm/test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll llvm/test/DebugInfo/X86/dbgcall-site-zero-valued-imms.ll llvm/test/DebugInfo/X86
[Lldb-commits] [lldb] 2f215cf - Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
Author: Djordje Todorovic Date: 2020-02-20T14:41:39+01:00 New Revision: 2f215cf36adced6bf1abda4bdbbc6422c1369353 URL: https://github.com/llvm/llvm-project/commit/2f215cf36adced6bf1abda4bdbbc6422c1369353 DIFF: https://github.com/llvm/llvm-project/commit/2f215cf36adced6bf1abda4bdbbc6422c1369353.diff LOG: Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" This reverts commit rGfaff707db82d. A failure found on an ARM 2-stage buildbot. The investigation is needed. Added: Modified: clang/include/clang/Basic/CodeGenOptions.def clang/include/clang/Driver/CC1Options.td clang/lib/CodeGen/BackendUtil.cpp clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/test/CodeGen/debug-info-extern-call.c clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp lldb/packages/Python/lldbsuite/test/decorators.py lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile llvm/include/llvm/CodeGen/CommandFlags.inc llvm/include/llvm/Target/TargetMachine.h llvm/include/llvm/Target/TargetOptions.h llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h llvm/lib/CodeGen/LiveDebugValues.cpp llvm/lib/CodeGen/MIRParser/MIRParser.cpp llvm/lib/CodeGen/MachineFunction.cpp llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp llvm/lib/CodeGen/TargetOptionsImpl.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.cpp llvm/lib/Target/AArch64/AArch64TargetMachine.cpp llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86TargetMachine.cpp llvm/test/CodeGen/AArch64/arm64-anyregcc.ll llvm/test/CodeGen/AArch64/arm64-patchpoint.ll llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll llvm/test/CodeGen/ARM/smml.ll llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir llvm/test/CodeGen/MIR/X86/call-site-info-error3.mir llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir llvm/test/CodeGen/X86/call-site-info-output.ll llvm/test/CodeGen/X86/hoist-invariant-load.ll llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll llvm/test/CodeGen/X86/statepoint-allocas.ll llvm/test/CodeGen/X86/tail-dup-repeat.ll llvm/test/CodeGen/X86/xray-custom-log.ll llvm/test/CodeGen/X86/xray-typed-event-log.ll llvm/test/DebugInfo/AArch64/call-site-info-output.ll llvm/test/DebugInfo/ARM/call-site-info-output.ll llvm/test/DebugInfo/ARM/entry-value-multi-byte-expr.ll llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpret-movzxi.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir llvm/test/DebugInfo/Sparc/entry-value-complex-reg-expr.ll llvm/test/DebugInfo/X86/dbg-value-range.ll llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll llvm/test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll llvm/test/DebugInfo/X86/dbgcall-site-zero-valued-imms.ll llvm/test/DebugInfo/X86/loclists-dwp.ll llvm/test/tools/llvm-dwarfdump/X
[Lldb-commits] [lldb] 5aa5c94 - Reland "[DebugInfo] Enable the debug entry values feature by default"
Author: Djordje Todorovic Date: 2020-03-10T09:15:06+01:00 New Revision: 5aa5c943f7da155b95564058cd5d50a93eabfc89 URL: https://github.com/llvm/llvm-project/commit/5aa5c943f7da155b95564058cd5d50a93eabfc89 DIFF: https://github.com/llvm/llvm-project/commit/5aa5c943f7da155b95564058cd5d50a93eabfc89.diff LOG: Reland "[DebugInfo] Enable the debug entry values feature by default" Differential Revision: https://reviews.llvm.org/D73534 Added: llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll Modified: clang/include/clang/Basic/CodeGenOptions.def clang/include/clang/Driver/CC1Options.td clang/lib/CodeGen/BackendUtil.cpp clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/test/CodeGen/debug-info-extern-call.c clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp lldb/packages/Python/lldbsuite/test/decorators.py lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile llvm/include/llvm/CodeGen/CommandFlags.inc llvm/include/llvm/Target/TargetMachine.h llvm/include/llvm/Target/TargetOptions.h llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h llvm/lib/CodeGen/LiveDebugValues.cpp llvm/lib/CodeGen/TargetOptionsImpl.cpp llvm/lib/Target/AArch64/AArch64TargetMachine.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/X86/X86TargetMachine.cpp llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir llvm/test/CodeGen/X86/call-site-info-output.ll llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir llvm/test/DebugInfo/X86/dbg-value-range.ll llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll llvm/test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll llvm/test/DebugInfo/X86/dbgcall-site-zero-valued-imms.ll llvm/test/DebugInfo/X86/loclists-dwp.ll llvm/test/tools/llvm-locstats/locstats.ll Removed: diff --git a/clang/include/clang/Basic/CodeGenOptions.def b/clang/include/clang/Basic/CodeGenOptions.def index 3c8b0eeb47a5..e047054447f3 100644 --- a/clang/include/clang/Basic/CodeGenOptions.def +++ b/clang/include/clang/Basic/CodeGenOptions.def @@ -63,7 +63,6 @@ CODEGENOPT(ExperimentalNewPassManager, 1, 0) ///< Enables the new, experimental CODEGENOPT(DebugPassManager, 1, 0) ///< Prints debug information for the new ///< pass manager. CODEGENOPT(DisableRedZone, 1, 0) ///< Set when -mno-red-zone is enabled. -CODEGENOPT(EnableDebugEntryValues, 1, 0) ///< Emit call site parameter dbg info CODEGENOPT(EmitCallSiteInfo, 1, 0) ///< Emit call site info only in the case of ///< '-g' + 'O>0' level. CODEGENOPT(IndirectTlsSegRefs, 1, 0) ///< Set when -mno-tls-direct-seg-refs diff --git a/clang/include/clang/Driver/CC1Options.td b/clang/include/clang/Driver/CC1Options.td index b7a2826d8fcb..cc30893703df 100644 --- a/clang/include/clang/Driver/CC1Options.td +++ b/clang/include/clang/Driver/CC1Options.td @@ -388,8 +388,6 @@ def flto_visibility_public_std: def flto_unit: Flag<["-"], "flto-unit">, HelpText<"Emit IR to support LTO unit features (CFI, whole program vtable opt)">; def fno_lto_unit: Flag<["-"], "fno-lto-unit">; -def femit_debug_entry_values : Flag<["-"], "femit-debug-entry-values">, -HelpText<"Enables debug info about call site parameter's entry values">; def fdebug_pass_manager : Flag<["-"], "fdebug-pass-manager">, HelpText<"Prints debug information for the new pass m
[Lldb-commits] [lldb] d9b9621 - Reland D73534: [DebugInfo] Enable the debug entry values feature by default
Author: Djordje Todorovic Date: 2020-03-19T13:57:30+01:00 New Revision: d9b962100942c71a4c26debaa716f7ab0c4ea8a1 URL: https://github.com/llvm/llvm-project/commit/d9b962100942c71a4c26debaa716f7ab0c4ea8a1 DIFF: https://github.com/llvm/llvm-project/commit/d9b962100942c71a4c26debaa716f7ab0c4ea8a1.diff LOG: Reland D73534: [DebugInfo] Enable the debug entry values feature by default The issue that was causing the build failures was fixed with the D76164. Added: llvm/test/DebugInfo/X86/no-entry-values-with-O0.ll Modified: clang/include/clang/Basic/CodeGenOptions.def clang/include/clang/Driver/CC1Options.td clang/lib/CodeGen/BackendUtil.cpp clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/test/CodeGen/debug-info-extern-call.c clang/test/CodeGenCXX/dbg-info-all-calls-described.cpp lldb/packages/Python/lldbsuite/test/decorators.py lldb/test/API/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile llvm/include/llvm/Target/TargetMachine.h llvm/include/llvm/Target/TargetOptions.h llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h llvm/lib/CodeGen/CommandFlags.cpp llvm/lib/CodeGen/LiveDebugValues.cpp llvm/lib/CodeGen/TargetOptionsImpl.cpp llvm/lib/Target/AArch64/AArch64TargetMachine.cpp llvm/lib/Target/ARM/ARMTargetMachine.cpp llvm/lib/Target/X86/X86TargetMachine.cpp llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir llvm/test/CodeGen/X86/call-site-info-output.ll llvm/test/DebugInfo/AArch64/dbgcall-site-float-entry-value.ll llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir llvm/test/DebugInfo/MIR/X86/DW_OP_entry_value.mir llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir llvm/test/DebugInfo/MIR/X86/callsite-stack-value.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir llvm/test/DebugInfo/X86/dbg-value-range.ll llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll llvm/test/DebugInfo/X86/dbgcall-site-64-bit-imms.ll llvm/test/DebugInfo/X86/dbgcall-site-zero-valued-imms.ll llvm/test/DebugInfo/X86/loclists-dwp.ll llvm/test/tools/llvm-locstats/locstats.ll Removed: diff --git a/clang/include/clang/Basic/CodeGenOptions.def b/clang/include/clang/Basic/CodeGenOptions.def index 3c8b0eeb47a5..e047054447f3 100644 --- a/clang/include/clang/Basic/CodeGenOptions.def +++ b/clang/include/clang/Basic/CodeGenOptions.def @@ -63,7 +63,6 @@ CODEGENOPT(ExperimentalNewPassManager, 1, 0) ///< Enables the new, experimental CODEGENOPT(DebugPassManager, 1, 0) ///< Prints debug information for the new ///< pass manager. CODEGENOPT(DisableRedZone, 1, 0) ///< Set when -mno-red-zone is enabled. -CODEGENOPT(EnableDebugEntryValues, 1, 0) ///< Emit call site parameter dbg info CODEGENOPT(EmitCallSiteInfo, 1, 0) ///< Emit call site info only in the case of ///< '-g' + 'O>0' level. CODEGENOPT(IndirectTlsSegRefs, 1, 0) ///< Set when -mno-tls-direct-seg-refs diff --git a/clang/include/clang/Driver/CC1Options.td b/clang/include/clang/Driver/CC1Options.td index b7a2826d8fcb..cc30893703df 100644 --- a/clang/include/clang/Driver/CC1Options.td +++ b/clang/include/clang/Driver/CC1Options.td @@ -388,8 +388,6 @@ def flto_visibility_public_std: def flto_unit: Flag<["-"], "flto-unit">, HelpText<"Emit IR to support LTO unit features (CFI, whole program vtable opt)">; def fno_lto_unit: Flag<["-"], "fno-lto-unit">; -def femit_debug_entry_values : Flag<["-"], "femit-debug-entry-values">, -HelpText<"Enables debug info about call site parameter's
[Lldb-commits] [lldb] r373074 - [lldb] Disable testing entry values as memory location
Author: djtodoro
Date: Fri Sep 27 05:16:29 2019
New Revision: 373074
URL: http://llvm.org/viewvc/llvm-project?rev=373074&view=rev
Log:
[lldb] Disable testing entry values as memory location
The D67717 excludes such locations for now.
Modified:
lldb/trunk/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
Modified:
lldb/trunk/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp?rev=373074&r1=373073&r2=373074&view=diff
==
---
lldb/trunk/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
(original)
+++
lldb/trunk/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
Fri Sep 27 05:16:29 2019
@@ -152,7 +152,10 @@ int main() {
func2(sink, 123);
// Test evaluation of "DW_OP_fbreg -24, DW_OP_deref" in the parent frame.
+ // Disabled for now, see: llvm.org/PR43343
+#if 0
func3(sink, s1.field2);
+#endif
// The sequences `main -> func4 -> func{5,6}_amb -> sink` are both plausible.
// Test that lldb doesn't attempt to guess which one occurred: entry value
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[Lldb-commits] [lldb] 9abd8c1 - [elf-core] Improve reading memory from core file
Author: Djordje Todorovic
Date: 2021-02-08T00:14:32-08:00
New Revision: 9abd8c1a4c3870f2831ee805cd3c0cec516a1c17
URL:
https://github.com/llvm/llvm-project/commit/9abd8c1a4c3870f2831ee805cd3c0cec516a1c17
DIFF:
https://github.com/llvm/llvm-project/commit/9abd8c1a4c3870f2831ee805cd3c0cec516a1c17.diff
LOG: [elf-core] Improve reading memory from core file
This patch tries to improve memory-read from core files
(in order to improve disassembly functionality).
I am using RHEL 7.7 (linux kernel 3.10) and for a lot of cases,
I was not able to disassemble some functions from backtrace when
debugging crashes from core files. It outputs some dummy code.
The cause of the problem was the fact we are returning all the zeros
from ProcessElfCore::ReadMemory() that is being called within
Disassembler::ParseInstructions() and it disassembles some dummy
opcodes from the buffer returned. Therefore, we are removing zero
bytes filling (padding) completely.
Differential Revision: https://reviews.llvm.org/D93939
Added:
Modified:
lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
Removed:
diff --git a/lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
b/lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
index ae19367ca3ae..9896638fa8ff 100644
--- a/lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
+++ b/lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
@@ -353,7 +353,6 @@ size_t ProcessElfCore::DoReadMemory(lldb::addr_t addr, void
*buf, size_t size,
const lldb::addr_t file_end = address_range->data.GetRangeEnd();
size_t bytes_to_read = size; // Number of bytes to read from the core file
size_t bytes_copied = 0; // Number of bytes actually read from the core
file
- size_t zero_fill_size = 0; // Padding
lldb::addr_t bytes_left =
0; // Number of bytes available in the core file from the given address
@@ -367,24 +366,15 @@ size_t ProcessElfCore::DoReadMemory(lldb::addr_t addr,
void *buf, size_t size,
if (file_end > file_start + offset)
bytes_left = file_end - (file_start + offset);
- // Figure out how many bytes we need to zero-fill if we are reading more
- // bytes than available in the on-disk segment
- if (bytes_to_read > bytes_left) {
-zero_fill_size = bytes_to_read - bytes_left;
+ if (bytes_to_read > bytes_left)
bytes_to_read = bytes_left;
- }
// If there is data available on the core file read it
if (bytes_to_read)
bytes_copied =
core_objfile->CopyData(offset + file_start, bytes_to_read, buf);
- assert(zero_fill_size <= size);
- // Pad remaining bytes
- if (zero_fill_size)
-memset(((char *)buf) + bytes_copied, 0, zero_fill_size);
-
- return bytes_copied + zero_fill_size;
+ return bytes_copied;
}
void ProcessElfCore::Clear() {
diff --git
a/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
b/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
index 162503c33d37..f3edf4b82bcd 100644
--- a/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
+++ b/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
@@ -155,6 +155,24 @@ def test_two_cores_same_pid(self):
self.do_test("linux-x86_64", self._x86_64_pid, self._x86_64_regions,
"a.out")
+
+@skipIf(triple='^mips')
+@skipIfLLVMTargetMissing("X86")
+@skipIfWindows
+@skipIfReproducer
+def test_read_memory(self):
+"""Test that we are able to read as many bytes as available"""
+target = self.dbg.CreateTarget("linux-x86_64.out")
+process = target.LoadCore("linux-x86_64.core")
+self.assertTrue(process, PROCESS_IS_VALID)
+
+error = lldb.SBError()
+bytesread = process.ReadMemory(0x400ff0, 20, error)
+
+# read only 16 bytes without zero bytes filling
+self.assertEqual(len(bytesread), 16)
+self.dbg.DeleteTarget(target)
+
@skipIf(triple='^mips')
@skipIfLLVMTargetMissing("X86")
def test_FPR_SSE(self):
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[Lldb-commits] [lldb] ce1f95a - Reland "[clang] Remove the DIFlagArgumentNotModified debug info flag"
Author: Djordje Todorovic
Date: 2019-11-20T10:08:07+01:00
New Revision: ce1f95a6e077693f93d8869245f911aff3eb7e4c
URL:
https://github.com/llvm/llvm-project/commit/ce1f95a6e077693f93d8869245f911aff3eb7e4c
DIFF:
https://github.com/llvm/llvm-project/commit/ce1f95a6e077693f93d8869245f911aff3eb7e4c.diff
LOG: Reland "[clang] Remove the DIFlagArgumentNotModified debug info flag"
It turns out that the ExprMutationAnalyzer can be very slow when AST
gets huge in some cases. The idea is to move this analysis to the LLVM
back-end level (more precisely, in the LiveDebugValues pass). The new
approach will remove the performance regression, simplify the
implementation and give us front-end independent implementation.
Differential Revision: https://reviews.llvm.org/D68206
Added:
Modified:
clang/lib/CodeGen/CGDebugInfo.cpp
clang/lib/CodeGen/CGDebugInfo.h
lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
Removed:
clang/test/CodeGen/debug-info-param-modification.c
diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp
b/clang/lib/CodeGen/CGDebugInfo.cpp
index 116517a9cb99..a9b3831aa0b5 100644
--- a/clang/lib/CodeGen/CGDebugInfo.cpp
+++ b/clang/lib/CodeGen/CGDebugInfo.cpp
@@ -18,7 +18,6 @@
#include "CodeGenFunction.h"
#include "CodeGenModule.h"
#include "ConstantEmitter.h"
-#include "clang/Analysis/Analyses/ExprMutationAnalyzer.h"
#include "clang/AST/ASTContext.h"
#include "clang/AST/DeclFriend.h"
#include "clang/AST/DeclObjC.h"
@@ -3686,15 +3685,6 @@ void CGDebugInfo::EmitFunctionStart(GlobalDecl GD,
SourceLocation Loc,
if (HasDecl && isa(D))
DeclCache[D->getCanonicalDecl()].reset(SP);
- // We use the SPDefCache only in the case when the debug entry values option
- // is set, in order to speed up parameters modification analysis.
- //
- // FIXME: Use AbstractCallee here to support ObjCMethodDecl.
- if (CGM.getCodeGenOpts().EnableDebugEntryValues && HasDecl)
-if (auto *FD = dyn_cast(D))
- if (FD->hasBody() && !FD->param_empty())
-SPDefCache[FD].reset(SP);
-
// Push the function onto the lexical block stack.
LexicalBlockStack.emplace_back(SP);
@@ -4097,11 +4087,6 @@ llvm::DILocalVariable *CGDebugInfo::EmitDeclare(const
VarDecl *VD,
llvm::DebugLoc::get(Line, Column, Scope,
CurInlinedAt),
Builder.GetInsertBlock());
- if (CGM.getCodeGenOpts().EnableDebugEntryValues && ArgNo) {
-if (auto *PD = dyn_cast(VD))
- ParamCache[PD].reset(D);
- }
-
return D;
}
@@ -4717,29 +4702,6 @@ void CGDebugInfo::setDwoId(uint64_t Signature) {
TheCU->setDWOId(Signature);
}
-/// Analyzes each function parameter to determine whether it is constant
-/// throughout the function body.
-static void analyzeParametersModification(
-ASTContext &Ctx,
-llvm::DenseMap &SPDefCache,
-llvm::DenseMap &ParamCache) {
- for (auto &SP : SPDefCache) {
-auto *FD = SP.first;
-assert(FD->hasBody() && "Functions must have body here");
-const Stmt *FuncBody = (*FD).getBody();
-for (auto Parm : FD->parameters()) {
- ExprMutationAnalyzer FuncAnalyzer(*FuncBody, Ctx);
- if (FuncAnalyzer.isMutated(Parm))
-continue;
-
- auto I = ParamCache.find(Parm);
- assert(I != ParamCache.end() && "Parameters should be already cached");
- auto *DIParm = cast(I->second);
- DIParm->setIsNotModified();
-}
- }
-}
-
void CGDebugInfo::finalize() {
// Creating types might create further types - invalidating the current
// element and the size(), so don't cache/reference them.
@@ -4812,10 +4774,6 @@ void CGDebugInfo::finalize() {
if (auto MD = TypeCache[RT])
DBuilder.retainType(cast(MD));
- if (CGM.getCodeGenOpts().EnableDebugEntryValues)
-// This will be used to emit debug entry values.
-analyzeParametersModification(CGM.getContext(), SPDefCache, ParamCache);
-
DBuilder.finalize();
}
diff --git a/clang/lib/CodeGen/CGDebugInfo.h b/clang/lib/CodeGen/CGDebugInfo.h
index 9a097615b4b4..5341bfa7f350 100644
--- a/clang/lib/CodeGen/CGDebugInfo.h
+++ b/clang/lib/CodeGen/CGDebugInfo.h
@@ -146,10 +146,6 @@ class CGDebugInfo {
llvm::DenseMap DIFileCache;
llvm::DenseMap SPCache;
- /// Cache function definitions relevant to use for parameters mutation
- /// analysis.
- llvm::DenseMap SPDefCache;
- llvm::DenseMap ParamCache;
/// Cache declarations relevant to DW_TAG_imported_declarations (C++
/// using declarations) that aren't covered by other more specific caches.
llvm::DenseMap DeclCache;
diff --git a/clang/test/CodeGen/debug-info-param-modification.c
b/clang/test/CodeGen/debug-info-param-modification.c
deleted file mode 100644
index f0a13a3777db..
--- a/clang/test/CodeGen/debug-info-param-modification.c
+++ /dev/null
@@ -1,25 +0,0 @@
-// RUN: %clang -Xclang -femit
[Lldb-commits] [lldb] 409350d - Revert "[LiveDebugValues] Introduce entry values of unmodified params"
Author: Djordje Todorovic
Date: 2019-12-03T13:13:27+01:00
New Revision: 409350deeaf27ab767018b4c4834cfb82919e338
URL:
https://github.com/llvm/llvm-project/commit/409350deeaf27ab767018b4c4834cfb82919e338
DIFF:
https://github.com/llvm/llvm-project/commit/409350deeaf27ab767018b4c4834cfb82919e338.diff
LOG: Revert "[LiveDebugValues] Introduce entry values of unmodified params"
This reverts commit rG4cfceb910692 due to LLDB test failing.
Added:
Modified:
lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
llvm/lib/CodeGen/LiveDebugValues.cpp
llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
Removed:
llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
diff --git
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
index e0285e6d626d..1192c2b672f6 100644
---
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
+++
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
@@ -6,7 +6,8 @@
supported_platforms.extend(lldbplatformutil.getDarwinOSTriples())
lldbinline.MakeInlineTest(__file__, globals(),
-[decorators.skipUnlessPlatform(supported_platforms),
+[decorators.skipIf(bugnumber="llvm.org/pr44059"),
+ decorators.skipUnlessPlatform(supported_platforms),
decorators.skipIf(compiler="clang", compiler_version=['<', '10.0']),
decorators.skipUnlessArch('x86_64'),
decorators.skipUnlessHasCallSiteInfo,
diff --git
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
index 9aac6e947838..ff72a81c6b29 100644
---
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
+++
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
@@ -18,14 +18,6 @@ template __attribute__((noinline)) void use(T x)
{
/* Clobbers */ : "rsi" \
);
-// Destroy %rbx in the current frame.
-#define DESTROY_RBX \
- asm volatile ("xorq %%rbx, %%rbx" \
- /* Outputs */ : \
- /* Inputs */ : \
- /* Clobbers */ : "rbx" \
- );
-
struct S1 {
int field1 = 123;
int *field2 = &field1;
@@ -38,17 +30,10 @@ void func1(int &sink, int x) {
// Destroy 'x' in the current frame.
DESTROY_RSI;
- // NOTE: Currently, we do not generate DW_OP_entry_value for the 'x',
- // since it gets copied into a register that is not callee saved,
- // and we can not guarantee that its value has not changed.
+ //% self.filecheck("image lookup -va $pc", "main.cpp",
"-check-prefix=FUNC1-DESC")
+ // FUNC1-DESC: name = "x", type = "int", location =
DW_OP_entry_value(DW_OP_reg4 RSI)
++sink;
-
- // Destroy 'sink' in the current frame.
- DESTROY_RBX;
-
- //% self.filecheck("image lookup -va $pc", "main.cpp",
"-check-prefix=FUNC1-DESC")
- // FUNC1-DESC: name = "sink", type = "int &", location =
DW_OP_entry_value(DW_OP_reg5 RDI)
}
__attribute__((noinline))
@@ -58,16 +43,10 @@ void func2(int &sink, int x) {
// Destroy 'x' in the current frame.
DESTROY_RSI;
- //% self.filecheck("expr x", "main.cpp", "-check-prefix=FUNC2-EXPR-FAIL",
expect_cmd_failure=True)
- // FUNC2-EXPR-FAIL: couldn't get the value of variable x: variable not
available
+ //% self.filecheck("expr x", "main.cpp", "-check-prefix=FUNC2-EXPR")
+ // FUNC2-EXPR: (int) ${{.*}} = 123
++sink;
-
- // Destroy 'sink' in the current frame.
- DESTROY_RBX;
-
- //% self.filecheck("expr sink", "main.cpp", "-check-prefix=FUNC2-EXPR")
- // FUNC2-EXPR: ${{.*}} = 2
}
__attribute__((noinline))
@@ -90,16 +69,10 @@ void func4_amb(int &sink, int x) {
// Destroy 'x' in the current frame.
DESTROY_RSI;
- //% self.filecheck("expr x", "main.cpp", "-check-prefix=FUNC4-EXPR-FAIL",
expect_cmd_failure=True)
- // FUNC4-EXPR-FAIL: couldn't get the value of variable x: variable not
available
+ //% self.filecheck("expr x", "main.cpp", "-check-prefix=FUNC4-EXPR",
expect_cmd_failure=True)
+ // FUNC4-EXPR: couldn't get the value of variable x: Could not evaluate
DW_OP_entry_value.
++sink;
[Lldb-commits] [lldb] 4b4ede4 - Reland "[LiveDebugValues] Introduce entry values of unmodified params"
Author: Djordje Todorovic
Date: 2019-12-05T11:10:49+01:00
New Revision: 4b4ede440a2ad51b150cb913775eee76189aac38
URL:
https://github.com/llvm/llvm-project/commit/4b4ede440a2ad51b150cb913775eee76189aac38
DIFF:
https://github.com/llvm/llvm-project/commit/4b4ede440a2ad51b150cb913775eee76189aac38.diff
LOG: Reland "[LiveDebugValues] Introduce entry values of unmodified params"
Relanding this after resolving the cause of the test failure.
Added:
llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
Modified:
lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile
lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
llvm/lib/CodeGen/LiveDebugValues.cpp
llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
Removed:
diff --git
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile
index 1adf3fc44a69..a49ffa84c547 100644
---
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile
+++
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/Makefile
@@ -1,5 +1,5 @@
LEVEL = ../../../make
CXX_SOURCES := main.cpp
include $(LEVEL)/Makefile.rules
-CXXFLAGS_EXTRAS := -O1 -glldb -Xclang -femit-debug-entry-values
+CXXFLAGS_EXTRAS := -O2 -glldb -Xclang -femit-debug-entry-values
include Makefile.rules
diff --git
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
index 1192c2b672f6..e0285e6d626d 100644
---
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
+++
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
@@ -6,8 +6,7 @@
supported_platforms.extend(lldbplatformutil.getDarwinOSTriples())
lldbinline.MakeInlineTest(__file__, globals(),
-[decorators.skipIf(bugnumber="llvm.org/pr44059"),
- decorators.skipUnlessPlatform(supported_platforms),
+[decorators.skipUnlessPlatform(supported_platforms),
decorators.skipIf(compiler="clang", compiler_version=['<', '10.0']),
decorators.skipUnlessArch('x86_64'),
decorators.skipUnlessHasCallSiteInfo,
diff --git
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
index ff72a81c6b29..9aac6e947838 100644
---
a/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
+++
b/lldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
@@ -18,6 +18,14 @@ template __attribute__((noinline)) void use(T x)
{
/* Clobbers */ : "rsi" \
);
+// Destroy %rbx in the current frame.
+#define DESTROY_RBX \
+ asm volatile ("xorq %%rbx, %%rbx" \
+ /* Outputs */ : \
+ /* Inputs */ : \
+ /* Clobbers */ : "rbx" \
+ );
+
struct S1 {
int field1 = 123;
int *field2 = &field1;
@@ -30,10 +38,17 @@ void func1(int &sink, int x) {
// Destroy 'x' in the current frame.
DESTROY_RSI;
- //% self.filecheck("image lookup -va $pc", "main.cpp",
"-check-prefix=FUNC1-DESC")
- // FUNC1-DESC: name = "x", type = "int", location =
DW_OP_entry_value(DW_OP_reg4 RSI)
+ // NOTE: Currently, we do not generate DW_OP_entry_value for the 'x',
+ // since it gets copied into a register that is not callee saved,
+ // and we can not guarantee that its value has not changed.
++sink;
+
+ // Destroy 'sink' in the current frame.
+ DESTROY_RBX;
+
+ //% self.filecheck("image lookup -va $pc", "main.cpp",
"-check-prefix=FUNC1-DESC")
+ // FUNC1-DESC: name = "sink", type = "int &", location =
DW_OP_entry_value(DW_OP_reg5 RDI)
}
__attribute__((noinline))
@@ -43,10 +58,16 @@ void func2(int &sink, int x) {
// Destroy 'x' in the current frame.
DESTROY_RSI;
- //% self.filecheck("expr x", "main.cpp", "-check-prefix=FUNC2-EXPR")
- // FUNC2-EXPR: (int) ${{.*}} = 123
+ //% self.filecheck("expr x", "main.cpp", "-check-prefi
