[Lldb-commits] [lldb] d96cb52 - [lldb] [Process/NetBSD] Use XStateRegSet for all FPU registers
Author: Michał Górny
Date: 2020-10-24T09:17:53+02:00
New Revision: d96cb52830fd7109cead60956a9b108935988e5c
URL:
https://github.com/llvm/llvm-project/commit/d96cb52830fd7109cead60956a9b108935988e5c
DIFF:
https://github.com/llvm/llvm-project/commit/d96cb52830fd7109cead60956a9b108935988e5c.diff
LOG: [lldb] [Process/NetBSD] Use XStateRegSet for all FPU registers
Unify the x86 regset API to use XStateRegSet for all FPU registers,
therefore eliminating the legacy API based on FPRegSet. This makes
the code a little bit simpler but most notably, it provides future
compatibility for register caching.
Since the NetBSD kernel takes care of providing compatibility with
pre-XSAVE processors, PT_{G,S}ETXSTATE can be used on systems supporting
only FXSAVE or even plain FSAVE (and unlike PT_{G,S}ETXMMREGS, it
clearly indicates that XMM registers are not supported).
Differential Revision: https://reviews.llvm.org/D90034
Added:
Modified:
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.h
Removed:
diff --git
a/lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
b/lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
index c82035a3714b..fb8d64ffe997 100644
--- a/lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
+++ b/lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
@@ -36,10 +36,6 @@
using namespace lldb_private;
using namespace lldb_private::process_netbsd;
-// Private namespace.
-
-namespace {
-// x86 64-bit general purpose registers.
static const uint32_t g_gpr_regnums_x86_64[] = {
lldb_rax_x86_64,lldb_rbx_x86_64,lldb_rcx_x86_64, lldb_rdx_x86_64,
lldb_rdi_x86_64,lldb_rsi_x86_64,lldb_rbp_x86_64, lldb_rsp_x86_64,
@@ -85,8 +81,8 @@ static_assert((sizeof(g_gpr_regnums_x86_64) /
sizeof(g_gpr_regnums_x86_64[0])) -
k_num_gpr_registers_x86_64,
"g_gpr_regnums_x86_64 has wrong number of register infos");
-// x86 64-bit floating point registers.
-static const uint32_t g_fpu_regnums_x86_64[] = {
+// x86 64-bit registers available via XState.
+static const uint32_t g_xstate_regnums_x86_64[] = {
lldb_fctrl_x86_64, lldb_fstat_x86_64, lldb_ftag_x86_64,
lldb_fop_x86_64, lldb_fiseg_x86_64, lldb_fioff_x86_64,
lldb_foseg_x86_64, lldb_fooff_x86_64, lldb_mxcsr_x86_64,
@@ -101,15 +97,6 @@ static const uint32_t g_fpu_regnums_x86_64[] = {
lldb_xmm7_x86_64, lldb_xmm8_x86_64, lldb_xmm9_x86_64,
lldb_xmm10_x86_64, lldb_xmm11_x86_64, lldb_xmm12_x86_64,
lldb_xmm13_x86_64, lldb_xmm14_x86_64, lldb_xmm15_x86_64,
-LLDB_INVALID_REGNUM // register sets need to end with this flag
-};
-static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0]))
-
- 1 ==
- k_num_fpr_registers_x86_64,
- "g_fpu_regnums_x86_64 has wrong number of register infos");
-
-// x86 64-bit registers available via XState.
-static const uint32_t g_xstate_regnums_x86_64[] = {
lldb_ymm0_x86_64, lldb_ymm1_x86_64, lldb_ymm2_x86_64, lldb_ymm3_x86_64,
lldb_ymm4_x86_64, lldb_ymm5_x86_64, lldb_ymm6_x86_64, lldb_ymm7_x86_64,
lldb_ymm8_x86_64, lldb_ymm9_x86_64, lldb_ymm10_x86_64,
lldb_ymm11_x86_64,
@@ -120,9 +107,11 @@ static const uint32_t g_xstate_regnums_x86_64[] = {
lldb_bnd3_x86_64,lldb_bndcfgu_x86_64, lldb_bndstatus_x86_64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
-static_assert((sizeof(g_xstate_regnums_x86_64) /
sizeof(g_xstate_regnums_x86_64[0])) -
+static_assert((sizeof(g_xstate_regnums_x86_64) /
+ sizeof(g_xstate_regnums_x86_64[0])) -
1 ==
- k_num_avx_registers_x86_64 + k_num_mpx_registers_x86_64,
+ k_num_fpr_registers_x86_64 + k_num_avx_registers_x86_64 +
+ k_num_mpx_registers_x86_64,
"g_xstate_regnums_x86_64 has wrong number of register infos");
// x86 debug registers.
@@ -137,7 +126,7 @@ static_assert((sizeof(g_dbr_regnums_x86_64) /
sizeof(g_dbr_regnums_x86_64[0])) -
"g_dbr_regnums_x86_64 has wrong number of register infos");
// x86 32-bit general purpose registers.
-const uint32_t g_gpr_regnums_i386[] = {
+static const uint32_t g_gpr_regnums_i386[] = {
lldb_eax_i386, lldb_ebx_i386,lldb_ecx_i386, lldb_edx_i386,
lldb_edi_i386, lldb_esi_i386,lldb_ebp_i386, lldb_esp_i386,
lldb_eip_i386, lldb_eflags_i386, lldb_cs_i386, lldb_fs_i386,
@@ -153,8 +142,8 @@ static_assert((sizeof(g_gpr_regnums_i386) /
sizeof(g_gpr_regnums_i386[0])) -
k_num_gpr_registers_i386,
"g_gpr_regnums_i386 has wrong number of register infos");
-// x86 32-bit fl
[Lldb-commits] [PATCH] D90034: [lldb] [Process/NetBSD] Use XStateRegSet for all FPU registers
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd96cb52830fd: [lldb] [Process/NetBSD] Use XStateRegSet for
all FPU registers (authored by mgorny).
Herald added a project: LLDB.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90034/new/
https://reviews.llvm.org/D90034
Files:
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.h
Index: lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.h
===
--- lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.h
+++ lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.h
@@ -23,10 +23,6 @@
#include "Plugins/Process/Utility/NativeRegisterContextWatchpoint_x86.h"
#include "Plugins/Process/Utility/lldb-x86-register-enums.h"
-#if defined(PT_GETXSTATE) && defined(PT_SETXSTATE)
-#define HAVE_XSTATE
-#endif
-
namespace lldb_private {
namespace process_netbsd {
@@ -57,19 +53,12 @@
private:
// Private member types.
- enum { GPRegSet, FPRegSet, XStateRegSet, DBRegSet };
+ enum { GPRegSet, XStateRegSet, DBRegSet };
// Private member variables.
struct reg m_gpr;
-#if defined(__x86_64__)
- struct fpreg m_fpr;
-#else
- struct xmmregs m_fpr;
-#endif
- struct dbreg m_dbr;
-#ifdef HAVE_XSTATE
struct xstate m_xstate;
-#endif
+ struct dbreg m_dbr;
int GetSetForNativeRegNum(int reg_num) const;
int GetDR(int num) const;
Index: lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
===
--- lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
+++ lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
@@ -36,10 +36,6 @@
using namespace lldb_private;
using namespace lldb_private::process_netbsd;
-// Private namespace.
-
-namespace {
-// x86 64-bit general purpose registers.
static const uint32_t g_gpr_regnums_x86_64[] = {
lldb_rax_x86_64,lldb_rbx_x86_64,lldb_rcx_x86_64, lldb_rdx_x86_64,
lldb_rdi_x86_64,lldb_rsi_x86_64,lldb_rbp_x86_64, lldb_rsp_x86_64,
@@ -85,8 +81,8 @@
k_num_gpr_registers_x86_64,
"g_gpr_regnums_x86_64 has wrong number of register infos");
-// x86 64-bit floating point registers.
-static const uint32_t g_fpu_regnums_x86_64[] = {
+// x86 64-bit registers available via XState.
+static const uint32_t g_xstate_regnums_x86_64[] = {
lldb_fctrl_x86_64, lldb_fstat_x86_64, lldb_ftag_x86_64,
lldb_fop_x86_64, lldb_fiseg_x86_64, lldb_fioff_x86_64,
lldb_foseg_x86_64, lldb_fooff_x86_64, lldb_mxcsr_x86_64,
@@ -101,15 +97,6 @@
lldb_xmm7_x86_64, lldb_xmm8_x86_64, lldb_xmm9_x86_64,
lldb_xmm10_x86_64, lldb_xmm11_x86_64, lldb_xmm12_x86_64,
lldb_xmm13_x86_64, lldb_xmm14_x86_64, lldb_xmm15_x86_64,
-LLDB_INVALID_REGNUM // register sets need to end with this flag
-};
-static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) -
- 1 ==
- k_num_fpr_registers_x86_64,
- "g_fpu_regnums_x86_64 has wrong number of register infos");
-
-// x86 64-bit registers available via XState.
-static const uint32_t g_xstate_regnums_x86_64[] = {
lldb_ymm0_x86_64, lldb_ymm1_x86_64, lldb_ymm2_x86_64, lldb_ymm3_x86_64,
lldb_ymm4_x86_64, lldb_ymm5_x86_64, lldb_ymm6_x86_64, lldb_ymm7_x86_64,
lldb_ymm8_x86_64, lldb_ymm9_x86_64, lldb_ymm10_x86_64, lldb_ymm11_x86_64,
@@ -120,9 +107,11 @@
lldb_bnd3_x86_64,lldb_bndcfgu_x86_64, lldb_bndstatus_x86_64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
-static_assert((sizeof(g_xstate_regnums_x86_64) / sizeof(g_xstate_regnums_x86_64[0])) -
+static_assert((sizeof(g_xstate_regnums_x86_64) /
+ sizeof(g_xstate_regnums_x86_64[0])) -
1 ==
- k_num_avx_registers_x86_64 + k_num_mpx_registers_x86_64,
+ k_num_fpr_registers_x86_64 + k_num_avx_registers_x86_64 +
+ k_num_mpx_registers_x86_64,
"g_xstate_regnums_x86_64 has wrong number of register infos");
// x86 debug registers.
@@ -137,7 +126,7 @@
"g_dbr_regnums_x86_64 has wrong number of register infos");
// x86 32-bit general purpose registers.
-const uint32_t g_gpr_regnums_i386[] = {
+static const uint32_t g_gpr_regnums_i386[] = {
lldb_eax_i386, lldb_ebx_i386,lldb_ecx_i386, lldb_edx_i386,
lldb_edi_i386, lldb_esi_i386,lldb_ebp_i386, lldb_esp_i386,
lldb_eip_i386, lldb_eflags_i386, lldb_cs_i386, lldb_fs_i386,
@@ -153,8 +142,8 @@
k_num_gpr_registers_i386,
"g_gpr_regnums_i386 has wrong number of register infos");
-// x86 32-bit floating point
[Lldb-commits] [PATCH] D90102: [lldb] [Process/FreeBSDRemote] Enable watchpoint support
mgorny created this revision. mgorny added reviewers: labath, emaste, krytarowski. Herald added subscribers: pengfei, arichardson. Herald added a reviewer: JDevlieghere. mgorny requested review of this revision. Replace the inline x86 watchpoint handling code with the reusable NativeRegisterContextWatchpoint_x86. Implement watchpoint support in NativeThreadFreeBSD and SIGTRAP handling for watchpoints. While at it, remove the accidentally copied logic of stopping all threads on SIGTRAP. Un-skip all concurrent_events tests as they pass with the new plugin. https://reviews.llvm.org/D90102 Files: lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD.cpp lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD.h lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.h lldb/source/Plugins/Process/FreeBSDRemote/NativeThreadFreeBSD.cpp lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentBreakpointDelayBreakpointOneSignal.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentBreakpointOneDelayBreakpointThreads.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentBreakpointsDelayedBreakpointOneWatchpoint.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentCrashWithBreak.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentCrashWithSignal.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentCrashWithWatchpoint.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentCrashWithWatchpointBreakpointSignal.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentDelaySignalBreak.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentDelaySignalWatch.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentDelayWatchBreak.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentDelayedCrashWithBreakpointSignal.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentDelayedCrashWithBreakpointWatchpoint.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentNWatchNBreak.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentSignalBreak.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentSignalDelayBreak.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentSignalDelayWatch.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentSignalNWatchNBreak.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentSignalWatch.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentSignalWatchBreak.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentTwoBreakpointThreads.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentTwoBreakpointsOneDelaySignal.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentTwoBreakpointsOneSignal.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentTwoBreakpointsOneWatchpoint.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentTwoWatchpointThreads.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentTwoWatchpointsOneBreakpoint.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentTwoWatchpointsOneDelayBreakpoint.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentTwoWatchpointsOneSignal.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentWatchBreak.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentWatchBreakDelay.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentWatchpointDelayWatchpointOneBreakpoint.py lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentWatchpointWithDelayWatchpointThreads.py Index: lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentWatchpointWithDelayWatchpointThreads.py === --- lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentWatchpointWithDelayWatchpointThreads.py +++ lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentWatchpointWithDelayWatchpointThreads.py @@ -11,7 +11,6 @@ mydir = ConcurrentEventsBase.compute_mydir(__file__) -@skipIfFreeBSD # timing out on buildbot # Atomic sequences are not supported yet for MIPS in LLDB. @skipIf(triple='^mips') @add_test_categories(["watchpoint"]) Index: lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentWatchpointDelayWatchpointOneBreakpoint.py === --- lldb/test/
[Lldb-commits] [PATCH] D90105: [lldb] [Process/NetBSD] Set xs_xstate_bv correctly when setting regs
mgorny created this revision.
mgorny added reviewers: labath, krytarowski.
mgorny requested review of this revision.
Ensure that xs_xstate_bv is set correctly before calling
WriteRegisterSet(). The bit can be clear if the relevant registers
were at their initial state when they were read, and it needs to be set
in order to apply changes from the XState structure.
https://reviews.llvm.org/D90105
Files:
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
Index: lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
===
--- lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
+++ lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
@@ -894,33 +894,43 @@
#endif
case lldb_fctrl_x86_64:
m_xstate.xs_fxsave.fx_cw = reg_value.GetAsUInt16();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fstat_x86_64:
m_xstate.xs_fxsave.fx_sw = reg_value.GetAsUInt16();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_ftag_x86_64:
m_xstate.xs_fxsave.fx_tw = reg_value.GetAsUInt16();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fop_x86_64:
m_xstate.xs_fxsave.fx_opcode = reg_value.GetAsUInt16();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fiseg_x86_64:
m_xstate.xs_fxsave.fx_ip.fa_32.fa_seg = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fioff_x86_64:
m_xstate.xs_fxsave.fx_ip.fa_32.fa_off = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_foseg_x86_64:
m_xstate.xs_fxsave.fx_dp.fa_32.fa_seg = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fooff_x86_64:
m_xstate.xs_fxsave.fx_dp.fa_32.fa_off = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_mxcsr_x86_64:
m_xstate.xs_fxsave.fx_mxcsr = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_SSE;
break;
case lldb_mxcsrmask_x86_64:
m_xstate.xs_fxsave.fx_mxcsr_mask = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_SSE;
break;
case lldb_st0_x86_64:
case lldb_st1_x86_64:
@@ -932,6 +942,7 @@
case lldb_st7_x86_64:
::memcpy(&m_xstate.xs_fxsave.fx_87_ac[reg - lldb_st0_x86_64],
reg_value.GetBytes(), reg_value.GetByteSize());
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_mm0_x86_64:
case lldb_mm1_x86_64:
@@ -943,6 +954,7 @@
case lldb_mm7_x86_64:
::memcpy(&m_xstate.xs_fxsave.fx_87_ac[reg - lldb_mm0_x86_64],
reg_value.GetBytes(), reg_value.GetByteSize());
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_xmm0_x86_64:
case lldb_xmm1_x86_64:
@@ -966,6 +978,7 @@
} else {
::memcpy(&m_xstate.xs_fxsave.fx_xmm[reg - lldb_xmm0_x86_64],
reg_value.GetBytes(), reg_value.GetByteSize());
+ m_xstate.xs_xstate_bv |= XCR0_SSE;
}
break;
case lldb_ymm0_x86_64:
@@ -994,6 +1007,7 @@
::memcpy(ymm.bytes, reg_value.GetBytes(), reg_value.GetByteSize());
YMMToXState(ymm, m_xstate.xs_fxsave.fx_xmm[reg_index].xmm_bytes,
m_xstate.xs_ymm_hi128.xs_ymm[reg_index].ymm_bytes);
+ m_xstate.xs_xstate_bv |= XCR0_SSE | XCR0_YMM_Hi128;
}
break;
case lldb_dr0_x86_64:
Index: lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
===
--- lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
+++ lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
@@ -894,33 +894,43 @@
#endif
case lldb_fctrl_x86_64:
m_xstate.xs_fxsave.fx_cw = reg_value.GetAsUInt16();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fstat_x86_64:
m_xstate.xs_fxsave.fx_sw = reg_value.GetAsUInt16();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_ftag_x86_64:
m_xstate.xs_fxsave.fx_tw = reg_value.GetAsUInt16();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fop_x86_64:
m_xstate.xs_fxsave.fx_opcode = reg_value.GetAsUInt16();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fiseg_x86_64:
m_xstate.xs_fxsave.fx_ip.fa_32.fa_seg = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fioff_x86_64:
m_xstate.xs_fxsave.fx_ip.fa_32.fa_off = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_foseg_x86_64:
m_xstate.xs_fxsave.fx_dp.fa_32.fa_seg = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_fooff_x86_64:
m_xstate.xs_fxsave.fx_dp.fa_32.fa_off = reg_value.GetAsUInt32();
+m_xstate.xs_xstate_bv |= XCR0_X87;
break;
case lldb_mxcsr_x86_64:
m_xstate.xs_fxsave.fx_mxcsr = reg_value
[Lldb-commits] [PATCH] D90105: [lldb] [Process/NetBSD] Set xs_xstate_bv correctly when setting regs
mgorny planned changes to this revision. mgorny added a comment. Hmm, I have an idea how to avoid all this repetition. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90105/new/ https://reviews.llvm.org/D90105 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D90105: [lldb] [Process/NetBSD] Set xs_xstate_bv correctly when setting regs
mgorny updated this revision to Diff 300505.
mgorny added a comment.
Reduce the repetition by bringing the most common case out.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90105/new/
https://reviews.llvm.org/D90105
Files:
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
Index: lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
===
--- lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
+++ lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
@@ -754,6 +754,8 @@
return error;
}
+ uint64_t new_xstate_bv = XCR0_X87; // the most common case
+
switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
case llvm::Triple::x86_64:
break;
@@ -918,9 +920,11 @@
break;
case lldb_mxcsr_x86_64:
m_xstate.xs_fxsave.fx_mxcsr = reg_value.GetAsUInt32();
+new_xstate_bv = XCR0_SSE;
break;
case lldb_mxcsrmask_x86_64:
m_xstate.xs_fxsave.fx_mxcsr_mask = reg_value.GetAsUInt32();
+new_xstate_bv = XCR0_SSE;
break;
case lldb_st0_x86_64:
case lldb_st1_x86_64:
@@ -966,6 +970,7 @@
} else {
::memcpy(&m_xstate.xs_fxsave.fx_xmm[reg - lldb_xmm0_x86_64],
reg_value.GetBytes(), reg_value.GetByteSize());
+ new_xstate_bv = XCR0_SSE;
}
break;
case lldb_ymm0_x86_64:
@@ -994,6 +999,7 @@
::memcpy(ymm.bytes, reg_value.GetBytes(), reg_value.GetByteSize());
YMMToXState(ymm, m_xstate.xs_fxsave.fx_xmm[reg_index].xmm_bytes,
m_xstate.xs_ymm_hi128.xs_ymm[reg_index].ymm_bytes);
+ new_xstate_bv = XCR0_SSE | XCR0_YMM_Hi128;
}
break;
case lldb_dr0_x86_64:
@@ -1010,6 +1016,9 @@
llvm_unreachable("Reading unknown/unsupported register");
}
+ if (set == XStateRegSet)
+m_xstate.xs_xstate_bv |= new_xstate_bv;
+
return WriteRegisterSet(set);
}
Index: lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
===
--- lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
+++ lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
@@ -754,6 +754,8 @@
return error;
}
+ uint64_t new_xstate_bv = XCR0_X87; // the most common case
+
switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
case llvm::Triple::x86_64:
break;
@@ -918,9 +920,11 @@
break;
case lldb_mxcsr_x86_64:
m_xstate.xs_fxsave.fx_mxcsr = reg_value.GetAsUInt32();
+new_xstate_bv = XCR0_SSE;
break;
case lldb_mxcsrmask_x86_64:
m_xstate.xs_fxsave.fx_mxcsr_mask = reg_value.GetAsUInt32();
+new_xstate_bv = XCR0_SSE;
break;
case lldb_st0_x86_64:
case lldb_st1_x86_64:
@@ -966,6 +970,7 @@
} else {
::memcpy(&m_xstate.xs_fxsave.fx_xmm[reg - lldb_xmm0_x86_64],
reg_value.GetBytes(), reg_value.GetByteSize());
+ new_xstate_bv = XCR0_SSE;
}
break;
case lldb_ymm0_x86_64:
@@ -994,6 +999,7 @@
::memcpy(ymm.bytes, reg_value.GetBytes(), reg_value.GetByteSize());
YMMToXState(ymm, m_xstate.xs_fxsave.fx_xmm[reg_index].xmm_bytes,
m_xstate.xs_ymm_hi128.xs_ymm[reg_index].ymm_bytes);
+ new_xstate_bv = XCR0_SSE | XCR0_YMM_Hi128;
}
break;
case lldb_dr0_x86_64:
@@ -1010,6 +1016,9 @@
llvm_unreachable("Reading unknown/unsupported register");
}
+ if (set == XStateRegSet)
+m_xstate.xs_xstate_bv |= new_xstate_bv;
+
return WriteRegisterSet(set);
}
___
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[Lldb-commits] [PATCH] D89335: [lldb] Generic support for caching register set reads/writes [WIP]
mgorny updated this revision to Diff 300506.
mgorny added a comment.
Moved stuff into mixin-style class. Changing return types is next on the list.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D89335/new/
https://reviews.llvm.org/D89335
Files:
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.h
lldb/source/Plugins/Process/Utility/CMakeLists.txt
lldb/source/Plugins/Process/Utility/NativeRegisterContextCache.cpp
lldb/source/Plugins/Process/Utility/NativeRegisterContextCache.h
Index: lldb/source/Plugins/Process/Utility/NativeRegisterContextCache.h
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/NativeRegisterContextCache.h
@@ -0,0 +1,52 @@
+//===-- NativeRegisterContextCache.h *- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef lldb_NativeRegisterContextCache_h
+#define lldb_NativeRegisterContextCache_h
+
+#include "Plugins/Process/Utility/NativeRegisterContextRegisterInfo.h"
+
+#include
+#include
+
+#define LLDB_INVALID_REGSET UINT32_MAX
+
+namespace lldb_private {
+
+enum class RegSetCacheStatus {
+ Empty,
+ Read,
+ Written,
+};
+
+class NativeRegisterContextCache
+: public virtual NativeRegisterContextRegisterInfo {
+public:
+ Status ReadRegister(const RegisterInfo *reg_info, RegisterValue ®_value) override;
+ Status WriteRegister(const RegisterInfo *reg_info, const RegisterValue ®_value) override;
+ Status FlushRegisterSets();
+
+protected:
+ virtual uint32_t GetRegisterSetForRegNum(uint32_t reg_index) const = 0;
+
+ virtual Status ReadRegisterSet(uint32_t set) = 0;
+ virtual Status WriteRegisterSet(uint32_t set) = 0;
+
+ virtual Status GetRegisterFromCache(const RegisterInfo *reg_info, RegisterValue ®_value, uint32_t set) = 0;
+ virtual Status SetRegisterInCache(const RegisterInfo *reg_info, const RegisterValue ®_value, uint32_t set) = 0;
+
+ virtual Status FlushRegisterSet(uint32_t set);
+
+private:
+ std::map m_regset_cache_status;
+};
+
+} // namespace lldb_private
+
+#endif // #ifndef lldb_NativeRegisterContextCache_h
+
Index: lldb/source/Plugins/Process/Utility/NativeRegisterContextCache.cpp
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/NativeRegisterContextCache.cpp
@@ -0,0 +1,106 @@
+//===-- NativeRegisterContextCache.cpp ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "NativeRegisterContextCache.h"
+
+using namespace lldb_private;
+
+Status
+NativeRegisterContextCache::ReadRegister(const RegisterInfo *reg_info,
+RegisterValue ®_value) {
+ Status error;
+
+ if (!reg_info) {
+error.SetErrorString("reg_info NULL");
+return error;
+ }
+
+ uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
+ if (reg == LLDB_INVALID_REGNUM) {
+// This is likely an internal register for lldb use only and should not be
+// directly queried.
+error.SetErrorStringWithFormat("register \"%s\" is an internal-only lldb "
+ "register, cannot read directly",
+ reg_info->name);
+return error;
+ }
+
+ uint32_t set = GetRegisterSetForRegNum(reg);
+ if (set == LLDB_INVALID_REGSET) {
+// This is likely an internal register for lldb use only and should not be
+// directly queried.
+error.SetErrorStringWithFormat("register \"%s\" is in unrecognized set",
+ reg_info->name);
+return error;
+ }
+
+ error = ReadRegisterSet(set);
+ if (error.Fail())
+return error;
+
+ return GetRegisterFromCache(reg_info, reg_value, set);
+}
+
+Status NativeRegisterContextCache::WriteRegister(
+const RegisterInfo *reg_info, const RegisterValue ®_value) {
+
+ Status error;
+
+ if (!reg_info) {
+error.SetErrorString("reg_info NULL");
+return error;
+ }
+
+ uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
+ if (reg == LLDB_INVALID_REGNUM) {
+// This is likely an internal register for lldb use only and should not be
+// directly queried.
+error.SetErrorStringWithFormat("register \"%s\" is an internal-only lldb "
+ "register, cannot read directly",
+ reg_info->name);
+return error
