Re: [Lldb-commits] [PATCH] D14985: Add 64/128 bit arm neon register definitions on linux
omjavaid added a comment.
Some minor typos inline comments.
I havnt applied nd tested this patch. Are you able to read these registers, i
guess you need to generate neon or vfp code to test all registers properly.
There no arm register test to my knowledge currently in testsuite we can put
this as a future todo to verify we are writing and reading properly.
Comment at: source/Plugins/Process/Utility/RegisterInfos_arm.h:316
@@ +315,3 @@
+static uint32_t g_q5_contains[] = { fpu_d10, fpu_d11, fpu_s20, fpu_s21,
fpu_s22, fpu_s23, LLDB_INVALID_REGNUM };
+static uint32_t g_q6_contains[] = { fpu_d12, fpu_d13, fpu_s24, fpu_s25,
fpu_s24, fpu_s27, LLDB_INVALID_REGNUM };
+static uint32_t g_q7_contains[] = { fpu_d14, fpu_d15, fpu_s28, fpu_s29,
fpu_s28, fpu_s31, LLDB_INVALID_REGNUM };
here fpu_s24 is being repeated twice instead of fpu_s26.
Comment at: source/Plugins/Process/Utility/RegisterInfos_arm.h:317
@@ +316,3 @@
+static uint32_t g_q6_contains[] = { fpu_d12, fpu_d13, fpu_s24, fpu_s25,
fpu_s24, fpu_s27, LLDB_INVALID_REGNUM };
+static uint32_t g_q7_contains[] = { fpu_d14, fpu_d15, fpu_s28, fpu_s29,
fpu_s28, fpu_s31, LLDB_INVALID_REGNUM };
+static uint32_t g_q8_contains[] = { fpu_d16, fpu_d17, LLDB_INVALID_REGNUM };
here fpu_s28 is being repeated twice instead of fpu_s30.
http://reviews.llvm.org/D14985
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Re: [Lldb-commits] [PATCH] D14989: Fix race during process interruption
labath updated this revision to Diff 41215.
labath added a comment.
Fix typo
http://reviews.llvm.org/D14989
Files:
include/lldb/Target/Process.h
packages/Python/lldbsuite/test/expression_command/timeout/TestCallWithTimeout.py
packages/Python/lldbsuite/test/functionalities/attach_resume/TestAttachResume.py
source/Target/Process.cpp
Index: source/Target/Process.cpp
===
--- source/Target/Process.cpp
+++ source/Target/Process.cpp
@@ -759,7 +759,6 @@
m_next_event_action_ap(),
m_public_run_lock (),
m_private_run_lock (),
-m_currently_handling_event(false),
m_stop_info_override_callback (NULL),
m_finalizing (false),
m_finalize_called (false),
@@ -992,7 +991,8 @@
EventSP *event_sp_ptr,
bool wait_always,
Listener *hijack_listener,
- Stream *stream)
+ Stream *stream,
+ bool use_run_lock)
{
// We can't just wait for a "stopped" event, because the stopped event may have restarted the target.
// We have to actually check each event, and in the case of a stopped event check the restarted flag
@@ -1019,7 +1019,7 @@
__FUNCTION__);
// We need to toggle the run lock as this won't get done in
// SetPublicState() if the process is hijacked.
-if (hijack_listener)
+if (hijack_listener && use_run_lock)
m_public_run_lock.SetStopped();
return state;
}
@@ -1042,7 +1042,7 @@
case eStateUnloaded:
// We need to toggle the run lock as this won't get done in
// SetPublicState() if the process is hijacked.
-if (hijack_listener)
+if (hijack_listener && use_run_lock)
m_public_run_lock.SetStopped();
return state;
case eStateStopped:
@@ -1052,7 +1052,7 @@
{
// We need to toggle the run lock as this won't get done in
// SetPublicState() if the process is hijacked.
-if (hijack_listener)
+if (hijack_listener && use_run_lock)
m_public_run_lock.SetStopped();
return state;
}
@@ -1308,23 +1308,6 @@
RestoreBroadcaster();
}
-bool
-Process::HijackPrivateProcessEvents (Listener *listener)
-{
-if (listener != NULL)
-{
-return m_private_state_broadcaster.HijackBroadcaster(listener, eBroadcastBitStateChanged | eBroadcastBitInterrupt);
-}
-else
-return false;
-}
-
-void
-Process::RestorePrivateProcessEvents ()
-{
-m_private_state_broadcaster.RestoreBroadcaster();
-}
-
StateType
Process::WaitForStateChangedEvents (const TimeValue *timeout, EventSP &event_sp, Listener *hijack_listener)
{
@@ -3831,101 +3814,52 @@
}
Error
-Process::Halt (bool clear_thread_plans)
+Process::Halt (bool clear_thread_plans, bool use_run_lock)
{
+if (! StateIsRunningState(m_public_state.GetValue()))
+return Error("Process is not running.");
+
// Don't clear the m_clear_thread_plans_on_stop, only set it to true if
// in case it was already set and some thread plan logic calls halt on its
// own.
m_clear_thread_plans_on_stop |= clear_thread_plans;
-// First make sure we aren't in the middle of handling an event, or we might restart. This is pretty weak, since
-// we could just straightaway get another event. It just narrows the window...
-m_currently_handling_event.WaitForValueEqualTo(false);
-
-
// Pause our private state thread so we can ensure no one else eats
// the stop event out from under us.
Listener halt_listener ("lldb.process.halt_listener");
-HijackPrivateProcessEvents(&halt_listener);
+HijackProcessEvents(&halt_listener);
EventSP event_sp;
-Error error (WillHalt());
-bool restored_process_events = false;
-if (error.Success())
+SendAsyncInterrupt();
+
+if (m_public_state.GetValue() == eStateAttaching)
{
-
-bool caused_stop = false;
-
-// Ask the process subclass to actually halt our process
-error = DoHalt(caused_stop);
-if (error.Success())
-{
-if (m_public_state.GetValue() == eStateAttaching)
-{
-// Don't hijack and eat the eStateExited as the code that was doing
-// the attach will be waiting for this event...
-RestorePrivateProcessEvents();
-restored_process_events = true;
-SetExitStatus(SIGKILL, "Cancelled async attach.");
-Destroy (false);
-}
-else
-{
-// If "caused_stop" is true, then DoHalt stopped the process. If
-// "caused_stop" is false, the pr
[Lldb-commits] [PATCH] D15010: Make some of the tests in TestRegisters.py arm compatible
tberghammer created this revision.
tberghammer added reviewers: omjavaid, labath.
tberghammer added a subscriber: lldb-commits.
Herald added subscribers: rengolin, aemerson.
Make some of the tests in TestRegisters.py arm compatible
http://reviews.llvm.org/D15010
Files:
packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
packages/Python/lldbsuite/test/functionalities/register/a.cpp
Index: packages/Python/lldbsuite/test/functionalities/register/a.cpp
===
--- packages/Python/lldbsuite/test/functionalities/register/a.cpp
+++ packages/Python/lldbsuite/test/functionalities/register/a.cpp
@@ -11,6 +11,7 @@
long double
return_long_double (long double value)
{
+#if defined (__i386__) || defined (__x86_64__)
float a=2, b=4,c=8, d=16, e=32, f=64, k=128, l=256, add=0;
__asm__ (
"int3 ;"
@@ -22,6 +23,7 @@
"flds %6 ;"
"flds %7 ;"
"faddp ;" : "=g" (add) : "g" (a), "g" (b), "g" (c), "g" (d), "g" (e), "g" (f), "g" (k), "g" (l) ); // Set break point at this line.
+#endif// #if defined (__i386__) || defined (__x86_64__)
return value;
}
Index: packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
===
--- packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
+++ packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
@@ -25,61 +25,83 @@
TestBase.tearDown(self)
@skipIfiOSSimulator
+@skipUnlessArch(['amd64', 'arm', 'i386', 'x86_64'])
def test_register_commands(self):
"""Test commands related to registers, in particular vector registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
self.build()
-self.register_commands()
+self.common_setup()
+
+# verify that logging does not assert
+self.log_enable("registers")
+
+self.expect("register read -a", MISSING_EXPECTED_REGISTERS,
+substrs = ['registers were unavailable'], matching = False)
+
+if self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
+self.runCmd("register read xmm0")
+self.runCmd("register read ymm15") # may be available
+elif self.getArchitecture() in ['arm']:
+self.runCmd("register read s0")
+self.runCmd("register read q15") # may be available
+
+self.expect("register read -s 3", substrs = ['invalid register set index: 3'], error = True)
@skipIfiOSSimulator
@skipIfTargetAndroid(archs=["i386"]) # Writing of mxcsr register fails, presumably due to a kernel/hardware problem
+@skipUnlessArch(['amd64', 'arm', 'i386', 'x86_64'])
def test_fp_register_write(self):
"""Test commands that write to registers, in particular floating-point registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
self.build()
self.fp_register_write()
@skipIfiOSSimulator
@expectedFailureAndroid(archs=["i386"]) # "register read fstat" always return 0x
@skipIfFreeBSD#llvm.org/pr25057
+@skipUnlessArch(['amd64', 'i386', 'x86_64'])
def test_fp_special_purpose_register_read(self):
"""Test commands that read fpu special purpose registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
self.build()
self.fp_special_purpose_register_read()
@skipIfiOSSimulator
+@skipUnlessArch(['amd64', 'arm', 'i386', 'x86_64'])
def test_register_expressions(self):
"""Test expression evaluation with commands related to registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
self.build()
-self.register_expressions()
+self.common_setup()
+
+if self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
+gpr = "eax"
+vector = "xmm0"
+elif self.getArchitecture() in ['arm']:
+gpr = "r0"
+vector = "q0"
+
+self.expect("expr/x $%s" % gpr, substrs = ['unsigned int', ' = 0x'])
+self.expect("expr $%s" % vector, substrs = ['vector_type'])
+self.expect("expr (unsigned int)$%s[0]" % vector, substrs = ['unsigned int'])
+
+if self.getArchitecture() in ['amd64', 'x86_64']:
+self.expect("expr -- ($rax & 0x) == $eax", substrs = ['true'])
@skipIfiOSSimulator
+@skipUnlessArch(['amd64', 'x86_64'])
def test_convenience_registers(self):
Re: [Lldb-commits] [PATCH] D15010: Make some of the tests in TestRegisters.py arm compatible
labath accepted this revision. labath added a comment. This revision is now accepted and ready to land. Looks great. Thank you for taking the time to do this. http://reviews.llvm.org/D15010 ___ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
Re: [Lldb-commits] [PATCH] D14985: Add 64/128 bit arm neon register definitions on linux
tberghammer added a comment.
I made some of the tests in TestRegisters.py arm compatible (see
http://reviews.llvm.org/D15010) and we also test register read/write in some
extent with the gdb remote protocol tests (they caught several issues while I
was doing this patch)
Comment at: source/Plugins/Process/Utility/RegisterInfos_arm.h:41
@@ -40,3 +42,1 @@
-#ifndef DBG_OFFSET
-#error DBG_OFFSET_NAME must be defined before including this header file
#endif
labath wrote:
> Was removing DBG_OFFSET intentional?
Yes because we don't use it in this file
Comment at: source/Plugins/Process/Utility/RegisterInfos_arm.h:316
@@ +315,3 @@
+static uint32_t g_q5_contains[] = { fpu_d10, fpu_d11, fpu_s20, fpu_s21,
fpu_s22, fpu_s23, LLDB_INVALID_REGNUM };
+static uint32_t g_q6_contains[] = { fpu_d12, fpu_d13, fpu_s24, fpu_s25,
fpu_s24, fpu_s27, LLDB_INVALID_REGNUM };
+static uint32_t g_q7_contains[] = { fpu_d14, fpu_d15, fpu_s28, fpu_s29,
fpu_s28, fpu_s31, LLDB_INVALID_REGNUM };
omjavaid wrote:
> here fpu_s24 is being repeated twice instead of fpu_s26.
Nice catch
Comment at: source/Plugins/Process/Utility/RegisterInfos_arm.h:317
@@ +316,3 @@
+static uint32_t g_q6_contains[] = { fpu_d12, fpu_d13, fpu_s24, fpu_s25,
fpu_s24, fpu_s27, LLDB_INVALID_REGNUM };
+static uint32_t g_q7_contains[] = { fpu_d14, fpu_d15, fpu_s28, fpu_s29,
fpu_s28, fpu_s31, LLDB_INVALID_REGNUM };
+static uint32_t g_q8_contains[] = { fpu_d16, fpu_d17, LLDB_INVALID_REGNUM };
omjavaid wrote:
> here fpu_s28 is being repeated twice instead of fpu_s30.
Nice catch
http://reviews.llvm.org/D14985
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Re: [Lldb-commits] [PATCH] D14985: Add 64/128 bit arm neon register definitions on linux
tberghammer updated this revision to Diff 41228.
http://reviews.llvm.org/D14985
Files:
source/Core/Scalar.cpp
source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp
source/Plugins/Process/Utility/RegisterInfos_arm.h
source/Plugins/Process/Utility/lldb-arm-register-enums.h
Index: source/Plugins/Process/Utility/lldb-arm-register-enums.h
===
--- source/Plugins/Process/Utility/lldb-arm-register-enums.h
+++ source/Plugins/Process/Utility/lldb-arm-register-enums.h
@@ -74,7 +74,55 @@
fpu_s30_arm,
fpu_s31_arm,
fpu_fpscr_arm,
-k_last_fpr_arm = fpu_fpscr_arm,
+fpu_d0_arm,
+fpu_d1_arm,
+fpu_d2_arm,
+fpu_d3_arm,
+fpu_d4_arm,
+fpu_d5_arm,
+fpu_d6_arm,
+fpu_d7_arm,
+fpu_d8_arm,
+fpu_d9_arm,
+fpu_d10_arm,
+fpu_d11_arm,
+fpu_d12_arm,
+fpu_d13_arm,
+fpu_d14_arm,
+fpu_d15_arm,
+fpu_d16_arm,
+fpu_d17_arm,
+fpu_d18_arm,
+fpu_d19_arm,
+fpu_d20_arm,
+fpu_d21_arm,
+fpu_d22_arm,
+fpu_d23_arm,
+fpu_d24_arm,
+fpu_d25_arm,
+fpu_d26_arm,
+fpu_d27_arm,
+fpu_d28_arm,
+fpu_d29_arm,
+fpu_d30_arm,
+fpu_d31_arm,
+fpu_q0_arm,
+fpu_q1_arm,
+fpu_q2_arm,
+fpu_q3_arm,
+fpu_q4_arm,
+fpu_q5_arm,
+fpu_q6_arm,
+fpu_q7_arm,
+fpu_q8_arm,
+fpu_q9_arm,
+fpu_q10_arm,
+fpu_q11_arm,
+fpu_q12_arm,
+fpu_q13_arm,
+fpu_q14_arm,
+fpu_q15_arm,
+k_last_fpr_arm = fpu_q15_arm,
exc_exception_arm,
exc_fsr_arm,
exc_far_arm,
Index: source/Plugins/Process/Utility/RegisterInfos_arm.h
===
--- source/Plugins/Process/Utility/RegisterInfos_arm.h
+++ source/Plugins/Process/Utility/RegisterInfos_arm.h
@@ -33,12 +33,12 @@
#error FPU_OFFSET must be defined before including this header file
#endif
-#ifndef EXC_OFFSET
-#error EXC_OFFSET_NAME must be defined before including this header file
+#ifndef FPSCR_OFFSET
+#error FPSCR_OFFSET must be defined before including this header file
#endif
-#ifndef DBG_OFFSET
-#error DBG_OFFSET_NAME must be defined before including this header file
+#ifndef EXC_OFFSET
+#error EXC_OFFSET_NAME must be defined before including this header file
#endif
#ifndef DEFINE_DBG
@@ -99,6 +99,56 @@
fpu_s31,
fpu_fpscr,
+fpu_d0,
+fpu_d1,
+fpu_d2,
+fpu_d3,
+fpu_d4,
+fpu_d5,
+fpu_d6,
+fpu_d7,
+fpu_d8,
+fpu_d9,
+fpu_d10,
+fpu_d11,
+fpu_d12,
+fpu_d13,
+fpu_d14,
+fpu_d15,
+fpu_d16,
+fpu_d17,
+fpu_d18,
+fpu_d19,
+fpu_d20,
+fpu_d21,
+fpu_d22,
+fpu_d23,
+fpu_d24,
+fpu_d25,
+fpu_d26,
+fpu_d27,
+fpu_d28,
+fpu_d29,
+fpu_d30,
+fpu_d31,
+
+fpu_q0,
+fpu_q1,
+fpu_q2,
+fpu_q3,
+fpu_q4,
+fpu_q5,
+fpu_q6,
+fpu_q7,
+fpu_q8,
+fpu_q9,
+fpu_q10,
+fpu_q11,
+fpu_q12,
+fpu_q13,
+fpu_q14,
+fpu_q15,
+
exc_exception,
exc_fsr,
exc_far,
@@ -174,65 +224,214 @@
k_num_registers
};
+static uint32_t g_s0_invalidates[] = { fpu_d0, fpu_q0, LLDB_INVALID_REGNUM };
+static uint32_t g_s1_invalidates[] = { fpu_d0, fpu_q0, LLDB_INVALID_REGNUM };
+static uint32_t g_s2_invalidates[] = { fpu_d1, fpu_q0, LLDB_INVALID_REGNUM };
+static uint32_t g_s3_invalidates[] = { fpu_d1, fpu_q0, LLDB_INVALID_REGNUM };
+static uint32_t g_s4_invalidates[] = { fpu_d2, fpu_q1, LLDB_INVALID_REGNUM };
+static uint32_t g_s5_invalidates[] = { fpu_d2, fpu_q1, LLDB_INVALID_REGNUM };
+static uint32_t g_s6_invalidates[] = { fpu_d3, fpu_q1, LLDB_INVALID_REGNUM };
+static uint32_t g_s7_invalidates[] = { fpu_d3, fpu_q1, LLDB_INVALID_REGNUM };
+static uint32_t g_s8_invalidates[] = { fpu_d4, fpu_q2, LLDB_INVALID_REGNUM };
+static uint32_t g_s9_invalidates[] = { fpu_d4, fpu_q2, LLDB_INVALID_REGNUM };
+static uint32_t g_s10_invalidates[] = { fpu_d5, fpu_q2, LLDB_INVALID_REGNUM };
+static uint32_t g_s11_invalidates[] = { fpu_d5, fpu_q2, LLDB_INVALID_REGNUM };
+static uint32_t g_s12_invalidates[] = { fpu_d6, fpu_q3, LLDB_INVALID_REGNUM };
+static uint32_t g_s13_invalidates[] = { fpu_d6, fpu_q3, LLDB_INVALID_REGNUM };
+static uint32_t g_s14_invalidates[] = { fpu_d7, fpu_q3, LLDB_INVALID_REGNUM };
+static uint32_t g_s15_invalidates[] = { fpu_d7, fpu_q3, LLDB_INVALID_REGNUM };
+static uint32_t g_s16_invalidates[] = { fpu_d8, fpu_q4, LLDB_INVALID_REGNUM };
+static uint32_t g_s17_invalidates[] = { fpu_d8, fpu_q4,
Re: [Lldb-commits] [PATCH] D14633: [LLDB][MIPS] Clear bug 25194 - LLDB-Server Assertion raised when single stepping on MIPS
sagar updated this revision to Diff 41232.
sagar added a comment.
Addressed review comments
Repository:
rL LLVM
http://reviews.llvm.org/D14633
Files:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
Index: source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
===
--- source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
+++ source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
@@ -1376,6 +1376,9 @@
{
GPR_linux_mips regs;
::memset(®s, 0, sizeof(GPR_linux_mips));
+
+// Clear all bits in RegisterValue before writing actual value read from
ptrace to avoid garbage value in 32-bit MSB
+value.SetBytes((void *)(((unsigned char *)®s) + offset), 8,
GetByteOrder());
Error error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGS,
m_thread.GetID(), NULL, ®s, sizeof regs);
if (error.Success())
{
Index: source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
===
--- source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
+++ source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
@@ -1376,6 +1376,9 @@
{
GPR_linux_mips regs;
::memset(®s, 0, sizeof(GPR_linux_mips));
+
+// Clear all bits in RegisterValue before writing actual value read from ptrace to avoid garbage value in 32-bit MSB
+value.SetBytes((void *)(((unsigned char *)®s) + offset), 8, GetByteOrder());
Error error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGS, m_thread.GetID(), NULL, ®s, sizeof regs);
if (error.Success())
{
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[Lldb-commits] [PATCH] D15019: [LLGS] Don't forward I/O when process is stopped
labath created this revision.
labath added reviewers: tberghammer, ovyalov.
labath added a subscriber: lldb-commits.
This makes sure we do not attempt to send output over the gdb-remote protocol
when the client is
not expecting it (i.e., after sending the stop-reply packet). Normally, this
should not happen
(the process cannot generate output when it is stopped), but due to the fact
that pty
communication is asynchronous in the linux kernel (llvm.org/pr25652), we may
sometimes get this
output too late. Instead, we just hold the output, and send it next time we
resume. This is not
ideal, but at least it makes sure we do not violate the remote protocol. Given
that this happens
extremely rarely it's not worth trying to work around it with sleeps or
something like that.
I also remove the m_stdio_communication_mutex, as all of LLGS is now
single-threaded anyway.
http://reviews.llvm.org/D15019
Files:
source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
Index: source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
===
--- source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
+++ source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
@@ -122,7 +122,6 @@
Mutex m_debugged_process_mutex;
NativeProcessProtocolSP m_debugged_process_sp;
-Mutex m_stdio_communication_mutex; // Protects m_stdio_communication and m_stdio_handle_up
Communication m_stdio_communication;
MainLoop::ReadHandleUP m_stdio_handle_up;
@@ -298,6 +297,9 @@
SendProcessOutput ();
void
+StartSTDIOForwarding();
+
+void
StopSTDIOForwarding();
//--
Index: source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
===
--- source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
+++ source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
@@ -44,6 +44,7 @@
#include "lldb/Host/common/NativeProcessProtocol.h"
#include "lldb/Host/common/NativeThreadProtocol.h"
#include "lldb/Utility/JSON.h"
+#include "lldb/Utility/LLDBAssert.h"
// Project includes
#include "Utility/StringExtractorGDBRemote.h"
@@ -860,21 +861,30 @@
StateAsCString (state));
}
-// Make sure we get all of the pending stdout/stderr from the inferior
-// and send it to the lldb host before we send the state change
-// notification
-SendProcessOutput();
-
switch (state)
{
-case StateType::eStateExited:
-HandleInferiorState_Exited (process);
+case StateType::eStateRunning:
+StartSTDIOForwarding();
break;
case StateType::eStateStopped:
+// Make sure we get all of the pending stdout/stderr from the inferior
+// and send it to the lldb host before we send the state change
+// notification
+SendProcessOutput();
+// Then stop the forwarding, so that any late output (see llvm.org/pr25652) does not
+// interfere with our protocol.
+StopSTDIOForwarding();
HandleInferiorState_Stopped (process);
break;
+case StateType::eStateExited:
+// Same as above
+SendProcessOutput();
+StopSTDIOForwarding();
+HandleInferiorState_Exited (process);
+break;
+
default:
if (log)
{
@@ -975,42 +985,49 @@
return error;
}
-Mutex::Locker locker(m_stdio_communication_mutex);
m_stdio_communication.SetCloseOnEOF (false);
m_stdio_communication.SetConnection (conn_up.release());
if (!m_stdio_communication.IsConnected ())
{
error.SetErrorString ("failed to set connection for inferior I/O communication");
return error;
}
+return Error();
+}
+
+void
+GDBRemoteCommunicationServerLLGS::StartSTDIOForwarding()
+{
// llgs local-process debugging may specify PTY paths, which will make these
// file actions non-null
// process launch -e/o will also make these file actions non-null
// nullptr means that the traffic is expected to flow over gdb-remote protocol
-if (
-m_process_launch_info.GetFileActionForFD(STDOUT_FILENO) == nullptr ||
-m_process_launch_info.GetFileActionForFD(STDERR_FILENO) == nullptr
-)
+if ( m_process_launch_info.GetFileActionForFD(STDOUT_FILENO) &&
+ m_process_launch_info.GetFileActionForFD(STDERR_FILENO))
+return;
+
+lldbassert(m_stdio_communication.GetConnection());
+if (! m_stdio_communication.GetConnection())
+return;
+
+Error error;
+m_stdio_handle_up = m_mainloop.RegisterReadObject(
+m_stdio_communication.GetConnection()->GetReadObject(),
+[this] (MainLoopBase &) { SendProcessOut
Re: [Lldb-commits] [PATCH] D14985: Add 64/128 bit arm neon register definitions on linux
omjavaid accepted this revision. omjavaid added a comment. LGTM http://reviews.llvm.org/D14985 ___ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [lldb] r254153 - Make some of the tests in TestRegisters.py arm compatible
Author: tberghammer
Date: Thu Nov 26 09:02:35 2015
New Revision: 254153
URL: http://llvm.org/viewvc/llvm-project?rev=254153&view=rev
Log:
Make some of the tests in TestRegisters.py arm compatible
Differential revision: http://reviews.llvm.org/D15010
Modified:
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/a.cpp
Modified:
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py?rev=254153&r1=254152&r2=254153&view=diff
==
---
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
(original)
+++
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
Thu Nov 26 09:02:35 2015
@@ -25,61 +25,83 @@ class RegisterCommandsTestCase(TestBase)
TestBase.tearDown(self)
@skipIfiOSSimulator
+@skipUnlessArch(['amd64', 'arm', 'i386', 'x86_64'])
def test_register_commands(self):
"""Test commands related to registers, in particular vector
registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the
architecture for the inferior")
self.build()
-self.register_commands()
+self.common_setup()
+
+# verify that logging does not assert
+self.log_enable("registers")
+
+self.expect("register read -a", MISSING_EXPECTED_REGISTERS,
+substrs = ['registers were unavailable'], matching = False)
+
+if self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
+self.runCmd("register read xmm0")
+self.runCmd("register read ymm15") # may be available
+elif self.getArchitecture() in ['arm']:
+self.runCmd("register read s0")
+self.runCmd("register read q15") # may be available
+
+self.expect("register read -s 3", substrs = ['invalid register set
index: 3'], error = True)
@skipIfiOSSimulator
@skipIfTargetAndroid(archs=["i386"]) # Writing of mxcsr register fails,
presumably due to a kernel/hardware problem
+@skipUnlessArch(['amd64', 'arm', 'i386', 'x86_64'])
def test_fp_register_write(self):
"""Test commands that write to registers, in particular floating-point
registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the
architecture for the inferior")
self.build()
self.fp_register_write()
@skipIfiOSSimulator
@expectedFailureAndroid(archs=["i386"]) # "register read fstat" always
return 0x
@skipIfFreeBSD#llvm.org/pr25057
+@skipUnlessArch(['amd64', 'i386', 'x86_64'])
def test_fp_special_purpose_register_read(self):
"""Test commands that read fpu special purpose registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the
architecture for the inferior")
self.build()
self.fp_special_purpose_register_read()
@skipIfiOSSimulator
+@skipUnlessArch(['amd64', 'arm', 'i386', 'x86_64'])
def test_register_expressions(self):
"""Test expression evaluation with commands related to registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the
architecture for the inferior")
self.build()
-self.register_expressions()
+self.common_setup()
+
+if self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
+gpr = "eax"
+vector = "xmm0"
+elif self.getArchitecture() in ['arm']:
+gpr = "r0"
+vector = "q0"
+
+self.expect("expr/x $%s" % gpr, substrs = ['unsigned int', ' = 0x'])
+self.expect("expr $%s" % vector, substrs = ['vector_type'])
+self.expect("expr (unsigned int)$%s[0]" % vector, substrs = ['unsigned
int'])
+
+if self.getArchitecture() in ['amd64', 'x86_64']:
+self.expect("expr -- ($rax & 0x) == $eax", substrs =
['true'])
@skipIfiOSSimulator
+@skipUnlessArch(['amd64', 'x86_64'])
def test_convenience_registers(self):
"""Test convenience registers."""
-if not self.getArchitecture() in ['amd64', 'x86_64']:
-self.skipTest("This test requires x86_64 as the architecture for
the inferior")
self.build()
self.convenience_registers()
@skipIfiOSSimulator
+@skipUnlessArch(['amd64', 'x86_64'])
def test_convenience_registers_with_process_attach(self):
"""Test convenience registers after a 'process at
[Lldb-commits] [lldb] r254152 - Add 64/128 bit arm neon register definitions on linux
Author: tberghammer
Date: Thu Nov 26 09:02:31 2015
New Revision: 254152
URL: http://llvm.org/viewvc/llvm-project?rev=254152&view=rev
Log:
Add 64/128 bit arm neon register definitions on linux
Differential revision: http://reviews.llvm.org/D14985
Modified:
lldb/trunk/source/Core/Scalar.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp
lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm.h
lldb/trunk/source/Plugins/Process/Utility/lldb-arm-register-enums.h
Modified: lldb/trunk/source/Core/Scalar.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Core/Scalar.cpp?rev=254152&r1=254151&r2=254152&view=diff
==
--- lldb/trunk/source/Core/Scalar.cpp (original)
+++ lldb/trunk/source/Core/Scalar.cpp Thu Nov 26 09:02:31 2015
@@ -2948,12 +2948,14 @@ Scalar::SetType (const RegisterInfo *reg
case eEncodingIEEE754:
if (byte_size == sizeof(float))
{
-m_float = llvm::APFloat(m_float.convertToFloat());
+bool losesInfo = false;
+m_float.convert(llvm::APFloat::IEEEsingle,
llvm::APFloat::rmTowardZero, &losesInfo);
m_type = e_float;
}
else if (byte_size == sizeof(double))
{
-m_float = llvm::APFloat(m_float.convertToDouble());
+bool losesInfo = false;
+m_float.convert(llvm::APFloat::IEEEdouble,
llvm::APFloat::rmTowardZero, &losesInfo);
m_type = e_double;
}
else if (byte_size == sizeof(long double))
Modified:
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp?rev=254152&r1=254151&r2=254152&view=diff
==
--- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
(original)
+++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
Thu Nov 26 09:02:31 2015
@@ -100,6 +100,54 @@ static const uint32_t g_fpu_regnums_arm[
fpu_s30_arm,
fpu_s31_arm,
fpu_fpscr_arm,
+fpu_d0_arm,
+fpu_d1_arm,
+fpu_d2_arm,
+fpu_d3_arm,
+fpu_d4_arm,
+fpu_d5_arm,
+fpu_d6_arm,
+fpu_d7_arm,
+fpu_d8_arm,
+fpu_d9_arm,
+fpu_d10_arm,
+fpu_d11_arm,
+fpu_d12_arm,
+fpu_d13_arm,
+fpu_d14_arm,
+fpu_d15_arm,
+fpu_d16_arm,
+fpu_d17_arm,
+fpu_d18_arm,
+fpu_d19_arm,
+fpu_d20_arm,
+fpu_d21_arm,
+fpu_d22_arm,
+fpu_d23_arm,
+fpu_d24_arm,
+fpu_d25_arm,
+fpu_d26_arm,
+fpu_d27_arm,
+fpu_d28_arm,
+fpu_d29_arm,
+fpu_d30_arm,
+fpu_d31_arm,
+fpu_q0_arm,
+fpu_q1_arm,
+fpu_q2_arm,
+fpu_q3_arm,
+fpu_q4_arm,
+fpu_q5_arm,
+fpu_q6_arm,
+fpu_q7_arm,
+fpu_q8_arm,
+fpu_q9_arm,
+fpu_q10_arm,
+fpu_q11_arm,
+fpu_q12_arm,
+fpu_q13_arm,
+fpu_q14_arm,
+fpu_q15_arm,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert(((sizeof g_fpu_regnums_arm / sizeof g_fpu_regnums_arm[0]) - 1)
== k_num_fpr_registers_arm, \
@@ -247,6 +295,9 @@ NativeRegisterContextLinux_arm::ReadRegi
case 8:
reg_value.SetUInt64(*(uint64_t *)src);
break;
+case 16:
+reg_value.SetBytes(src, 16, GetByteOrder());
+break;
default:
assert(false && "Unhandled data size.");
error.SetErrorStringWithFormat ("unhandled byte size: %" PRIu32,
reg_info->byte_size);
Modified:
lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp?rev=254152&r1=254151&r2=254152&view=diff
==
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
(original)
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
Thu Nov 26 09:02:31 2015
@@ -23,6 +23,7 @@ using namespace lldb_private;
// http://svnweb.freebsd.org/base/head/sys/arm/include/reg.h
#define GPR_OFFSET(idx) ((idx) * 4)
#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR))
+#define FPSCR_OFFSET (LLVM_EXTENSION offsetof
(RegisterContextFreeBSD_arm::FPU, fpscr) + sizeof
(RegisterContextFreeBSD_arm::GPR))
#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR)
+ sizeof (RegisterContextFreeBSD_arm::FPU))
#define DBG_OFFSET(
Re: [Lldb-commits] [PATCH] D14985: Add 64/128 bit arm neon register definitions on linux
This revision was automatically updated to reflect the committed changes.
Closed by commit rL254152: Add 64/128 bit arm neon register definitions on
linux (authored by tberghammer).
Changed prior to commit:
http://reviews.llvm.org/D14985?vs=41228&id=41247#toc
Repository:
rL LLVM
http://reviews.llvm.org/D14985
Files:
lldb/trunk/source/Core/Scalar.cpp
lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
lldb/trunk/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp
lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm.h
lldb/trunk/source/Plugins/Process/Utility/lldb-arm-register-enums.h
Index: lldb/trunk/source/Core/Scalar.cpp
===
--- lldb/trunk/source/Core/Scalar.cpp
+++ lldb/trunk/source/Core/Scalar.cpp
@@ -2948,12 +2948,14 @@
case eEncodingIEEE754:
if (byte_size == sizeof(float))
{
-m_float = llvm::APFloat(m_float.convertToFloat());
+bool losesInfo = false;
+m_float.convert(llvm::APFloat::IEEEsingle, llvm::APFloat::rmTowardZero, &losesInfo);
m_type = e_float;
}
else if (byte_size == sizeof(double))
{
-m_float = llvm::APFloat(m_float.convertToDouble());
+bool losesInfo = false;
+m_float.convert(llvm::APFloat::IEEEdouble, llvm::APFloat::rmTowardZero, &losesInfo);
m_type = e_double;
}
else if (byte_size == sizeof(long double))
Index: lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
===
--- lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
@@ -23,6 +23,7 @@
// http://svnweb.freebsd.org/base/head/sys/arm/include/reg.h
#define GPR_OFFSET(idx) ((idx) * 4)
#define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR))
+#define FPSCR_OFFSET (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::FPU, fpscr) + sizeof (RegisterContextFreeBSD_arm::GPR))
#define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU))
#define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::DBG, reg) + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC)))
Index: lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm.h
===
--- lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm.h
+++ lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_arm.h
@@ -33,12 +33,12 @@
#error FPU_OFFSET must be defined before including this header file
#endif
-#ifndef EXC_OFFSET
-#error EXC_OFFSET_NAME must be defined before including this header file
+#ifndef FPSCR_OFFSET
+#error FPSCR_OFFSET must be defined before including this header file
#endif
-#ifndef DBG_OFFSET
-#error DBG_OFFSET_NAME must be defined before including this header file
+#ifndef EXC_OFFSET
+#error EXC_OFFSET_NAME must be defined before including this header file
#endif
#ifndef DEFINE_DBG
@@ -99,6 +99,56 @@
fpu_s31,
fpu_fpscr,
+fpu_d0,
+fpu_d1,
+fpu_d2,
+fpu_d3,
+fpu_d4,
+fpu_d5,
+fpu_d6,
+fpu_d7,
+fpu_d8,
+fpu_d9,
+fpu_d10,
+fpu_d11,
+fpu_d12,
+fpu_d13,
+fpu_d14,
+fpu_d15,
+fpu_d16,
+fpu_d17,
+fpu_d18,
+fpu_d19,
+fpu_d20,
+fpu_d21,
+fpu_d22,
+fpu_d23,
+fpu_d24,
+fpu_d25,
+fpu_d26,
+fpu_d27,
+fpu_d28,
+fpu_d29,
+fpu_d30,
+fpu_d31,
+
+fpu_q0,
+fpu_q1,
+fpu_q2,
+fpu_q3,
+fpu_q4,
+fpu_q5,
+fpu_q6,
+fpu_q7,
+fpu_q8,
+fpu_q9,
+fpu_q10,
+fpu_q11,
+fpu_q12,
+fpu_q13,
+fpu_q14,
+fpu_q15,
+
exc_exception,
exc_fsr,
exc_far,
@@ -174,65 +224,214 @@
k_num_registers
};
+static uint32_t g_s0_invalidates[] = { fpu_d0, fpu_q0, LLDB_INVALID_REGNUM };
+static uint32_t g_s1_invalidates[] = { fpu_d0, fpu_q0, LLDB_INVALID_REGNUM };
+static uint32_t g_s2_invalidates[] = { fpu_d1, fpu_q0, LLDB_INVALID_REGNUM };
+static uint32_t g_s3_invalidates[] = { fpu_d1, fpu_q0, LLDB_INVALID_REGNUM };
+static uint32_t g_s4_invalidates[] = { fpu_d2, fpu_q1, LLDB_INVALID_REGNUM };
+static uint32_t g_s5_invalidates[] = { fpu_d2, fpu_q1, LLDB_INVALID_REGNUM };
+static uint32_t g_s6_invalidates[] = { fpu_d3, fpu_q1, LLDB_INVALID_REGNUM };
+static uint32_t g_s7_invalidates[] = { fpu_d3, fpu_q1, LLDB_INVALID_REGNUM };
+static uint32_t g_s8_invalidates[] = { fp
Re: [Lldb-commits] [PATCH] D15010: Make some of the tests in TestRegisters.py arm compatible
This revision was automatically updated to reflect the committed changes.
Closed by commit rL254153: Make some of the tests in TestRegisters.py arm
compatible (authored by tberghammer).
Changed prior to commit:
http://reviews.llvm.org/D15010?vs=41225&id=41248#toc
Repository:
rL LLVM
http://reviews.llvm.org/D15010
Files:
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/a.cpp
Index: lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/a.cpp
===
--- lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/a.cpp
+++ lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/a.cpp
@@ -11,6 +11,7 @@
long double
return_long_double (long double value)
{
+#if defined (__i386__) || defined (__x86_64__)
float a=2, b=4,c=8, d=16, e=32, f=64, k=128, l=256, add=0;
__asm__ (
"int3 ;"
@@ -22,6 +23,7 @@
"flds %6 ;"
"flds %7 ;"
"faddp ;" : "=g" (add) : "g" (a), "g" (b), "g" (c), "g" (d), "g" (e), "g" (f), "g" (k), "g" (l) ); // Set break point at this line.
+#endif// #if defined (__i386__) || defined (__x86_64__)
return value;
}
Index: lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
===
--- lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
+++ lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
@@ -25,61 +25,83 @@
TestBase.tearDown(self)
@skipIfiOSSimulator
+@skipUnlessArch(['amd64', 'arm', 'i386', 'x86_64'])
def test_register_commands(self):
"""Test commands related to registers, in particular vector registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
self.build()
-self.register_commands()
+self.common_setup()
+
+# verify that logging does not assert
+self.log_enable("registers")
+
+self.expect("register read -a", MISSING_EXPECTED_REGISTERS,
+substrs = ['registers were unavailable'], matching = False)
+
+if self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
+self.runCmd("register read xmm0")
+self.runCmd("register read ymm15") # may be available
+elif self.getArchitecture() in ['arm']:
+self.runCmd("register read s0")
+self.runCmd("register read q15") # may be available
+
+self.expect("register read -s 3", substrs = ['invalid register set index: 3'], error = True)
@skipIfiOSSimulator
@skipIfTargetAndroid(archs=["i386"]) # Writing of mxcsr register fails, presumably due to a kernel/hardware problem
+@skipUnlessArch(['amd64', 'arm', 'i386', 'x86_64'])
def test_fp_register_write(self):
"""Test commands that write to registers, in particular floating-point registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
self.build()
self.fp_register_write()
@skipIfiOSSimulator
@expectedFailureAndroid(archs=["i386"]) # "register read fstat" always return 0x
@skipIfFreeBSD#llvm.org/pr25057
+@skipUnlessArch(['amd64', 'i386', 'x86_64'])
def test_fp_special_purpose_register_read(self):
"""Test commands that read fpu special purpose registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
self.build()
self.fp_special_purpose_register_read()
@skipIfiOSSimulator
+@skipUnlessArch(['amd64', 'arm', 'i386', 'x86_64'])
def test_register_expressions(self):
"""Test expression evaluation with commands related to registers."""
-if not self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
-self.skipTest("This test requires x86 or x86_64 as the architecture for the inferior")
self.build()
-self.register_expressions()
+self.common_setup()
+
+if self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
+gpr = "eax"
+vector = "xmm0"
+elif self.getArchitecture() in ['arm']:
+gpr = "r0"
+vector = "q0"
+
+self.expect("expr/x $%s" % gpr, substrs = ['unsigned int', ' = 0x'])
+self.expect("expr $%s" % vector, substrs = ['vector_type'])
+self.expect("expr (unsigned int)$%s[0]" % vector, substrs = ['unsigned int'])
+
+if self.getArchitecture() in ['amd64', 'x86_64']:
+self.expect("expr -- ($rax & 0x
[Lldb-commits] [lldb] r254163 - Remove some xfail-s fixed by r253026
Author: tberghammer
Date: Thu Nov 26 10:11:57 2015
New Revision: 254163
URL: http://llvm.org/viewvc/llvm-project?rev=254163&view=rev
Log:
Remove some xfail-s fixed by r253026
These tests were fixed by r253026 but they was failing on the linux
build bot because of a system setup problem. Remove xfail from them
after we fixed the build bot.
Modified:
lldb/trunk/packages/Python/lldbsuite/test/api/multithreaded/TestMultithreaded.py
lldb/trunk/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-synth/TestDataFormatterSynth.py
Modified:
lldb/trunk/packages/Python/lldbsuite/test/api/multithreaded/TestMultithreaded.py
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/api/multithreaded/TestMultithreaded.py?rev=254163&r1=254162&r2=254163&view=diff
==
---
lldb/trunk/packages/Python/lldbsuite/test/api/multithreaded/TestMultithreaded.py
(original)
+++
lldb/trunk/packages/Python/lldbsuite/test/api/multithreaded/TestMultithreaded.py
Thu Nov 26 10:11:57 2015
@@ -17,7 +17,6 @@ class SBBreakpointCallbackCase(TestBase)
@skipIfRemote
@skipIfNoSBHeaders
@skipIfWindows # clang-cl does not support throw or catch
(llvm.org/pr24538)
-@expectedFailureAll("llvm.org/pr23139", oslist=["linux"], compiler="gcc",
compiler_version=[">=","4.9"], archs=["x86_64"])
def test_breakpoint_callback(self):
"""Test the that SBBreakpoint callback is invoked when a breakpoint is
hit. """
self.build_and_test('driver.cpp test_breakpoint_callback.cpp',
@@ -27,7 +26,6 @@ class SBBreakpointCallbackCase(TestBase)
@skipIfNoSBHeaders
@skipIfWindows # clang-cl does not support throw or catch
(llvm.org/pr24538)
@expectedFlakeyFreeBSD
-@expectedFailureAll("llvm.org/pr23139", oslist=["linux"], compiler="gcc",
compiler_version=[">=","4.9"], archs=["x86_64"])
def test_sb_api_listener_event_description(self):
""" Test the description of an SBListener breakpoint event is valid."""
self.build_and_test('driver.cpp listener_test.cpp
test_listener_event_description.cpp',
@@ -39,7 +37,6 @@ class SBBreakpointCallbackCase(TestBase)
@skipIfWindows # clang-cl does not support throw or catch
(llvm.org/pr24538)
@expectedFlakeyFreeBSD
@expectedFlakeyLinux # Driver occasionally returns '1' as exit status
-@expectedFailureAll("llvm.org/pr23139", oslist=["linux"], compiler="gcc",
compiler_version=[">=","4.9"], archs=["x86_64"])
def test_sb_api_listener_event_process_state(self):
""" Test that a registered SBListener receives events when a process
changes state.
@@ -53,7 +50,6 @@ class SBBreakpointCallbackCase(TestBase)
@skipIfNoSBHeaders
@skipIfWindows # clang-cl does not support throw or catch
(llvm.org/pr24538)
@expectedFlakeyFreeBSD
-@expectedFailureAll("llvm.org/pr23139", oslist=["linux"], compiler="gcc",
compiler_version=[">=","4.8"], archs=["x86_64"])
def test_sb_api_listener_resume(self):
""" Test that a process can be resumed from a non-main thread. """
self.build_and_test('driver.cpp listener_test.cpp
test_listener_resume.cpp',
Modified:
lldb/trunk/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-synth/TestDataFormatterSynth.py
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-synth/TestDataFormatterSynth.py?rev=254163&r1=254162&r2=254163&view=diff
==
---
lldb/trunk/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-synth/TestDataFormatterSynth.py
(original)
+++
lldb/trunk/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-synth/TestDataFormatterSynth.py
Thu Nov 26 10:11:57 2015
@@ -21,7 +21,6 @@ class SynthDataFormatterTestCase(TestBas
# Find the line number to break at.
self.line = line_number('main.cpp', '// Set break point at this line.')
-@expectedFailureAll("llvm.org/pr23139", oslist=["linux"], compiler="gcc",
compiler_version=[">=","4.9"], archs=["x86_64","i386"])
def test_with_run_command(self):
"""Test that that file and class static variables display correctly."""
self.build()
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Re: [Lldb-commits] [PATCH] D15019: [LLGS] Don't forward I/O when process is stopped
tberghammer accepted this revision. tberghammer added a comment. This revision is now accepted and ready to land. LGTM Comment at: source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:1014 @@ +1013,3 @@ + +Error error; +m_stdio_handle_up = m_mainloop.RegisterReadObject( Can you add an assert that m_stdio_handle_up is nullptr when StartSTDIOForwarding is called? http://reviews.llvm.org/D15019 ___ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [lldb] r254166 - Fix TestRegisters.py on arm
Author: tberghammer
Date: Thu Nov 26 11:43:24 2015
New Revision: 254166
URL: http://llvm.org/viewvc/llvm-project?rev=254166&view=rev
Log:
Fix TestRegisters.py on arm
Previously it tried to write a bit in the FPSCR register marked as
do not modify what failed on some device.
Modified:
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
Modified:
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
URL:
http://llvm.org/viewvc/llvm-project/lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py?rev=254166&r1=254165&r2=254166&view=diff
==
---
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
(original)
+++
lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/TestRegisters.py
Thu Nov 26 11:43:24 2015
@@ -269,7 +269,7 @@ class RegisterCommandsTestCase(TestBase)
elif self.getArchitecture() in ['arm']:
reg_list = [
# reg value
must-have
-("fpscr", "0xff0e",
True),
+("fpscr", "0xfbf79f9f",
True),
("s0","1.25",
True),
("s31", "0.75",
True),
("d1","123",
True),
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Re: [Lldb-commits] [PATCH] D14952: Create new "platform process connect" command
tberghammer updated this revision to Diff 41266.
tberghammer added a comment.
Add test
http://reviews.llvm.org/D14952
Files:
include/lldb/Target/Platform.h
packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
packages/Python/lldbsuite/test/tools/lldb-server/platform-process-connect/Makefile
packages/Python/lldbsuite/test/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
packages/Python/lldbsuite/test/tools/lldb-server/platform-process-connect/main.cpp
source/Commands/CommandObjectPlatform.cpp
source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.h
source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
source/Plugins/Platform/POSIX/PlatformPOSIX.h
source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp
source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.h
source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.h
tools/lldb-server/lldb-platform.cpp
Index: tools/lldb-server/lldb-platform.cpp
===
--- tools/lldb-server/lldb-platform.cpp
+++ tools/lldb-server/lldb-platform.cpp
@@ -285,6 +285,12 @@
exit(option_error);
}
+// Skip any options we consumed with getopt_long_only.
+argc -= optind;
+argv += optind;
+lldb_private::Args inferior_arguments;
+inferior_arguments.SetArguments(argc, const_cast(argv));
+
const bool children_inherit_listen_socket = false;
// the test suite makes many connections in parallel, let's not miss any.
// The highest this should get reasonably is a function of the number
@@ -317,7 +323,9 @@
do {
GDBRemoteCommunicationServerPlatform platform(acceptor_up->GetSocketProtocol(),
acceptor_up->GetSocketScheme());
-
+if (inferior_arguments.GetArgumentCount() > 0)
+platform.SetInferiorArguments(inferior_arguments);
+
if (port_offset > 0)
platform.SetPortOffset(port_offset);
Index: source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.h
===
--- source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.h
+++ source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.h
@@ -66,6 +66,9 @@
void
SetPortOffset (uint16_t port_offset);
+void
+SetInferiorArguments (const lldb_private::Args& args);
+
protected:
const Socket::SocketProtocol m_socket_protocol;
const std::string m_socket_scheme;
@@ -75,6 +78,7 @@
PortMap m_port_map;
uint16_t m_port_offset;
+lldb_private::Args m_inferior_arguments;
PacketResult
Handle_qLaunchGDBServer (StringExtractorGDBRemote &packet);
Index: source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
===
--- source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
+++ source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
@@ -165,7 +165,8 @@
Error error = StartDebugserverProcess (url.str().c_str(),
nullptr,
debugserver_launch_info,
- port_ptr);
+ port_ptr,
+ m_inferior_arguments);
lldb::pid_t debugserver_pid = debugserver_launch_info.GetProcessID();
@@ -553,7 +554,13 @@
}
void
-GDBRemoteCommunicationServerPlatform::SetPortOffset (uint16_t port_offset)
+GDBRemoteCommunicationServerPlatform::SetPortOffset(uint16_t port_offset)
{
m_port_offset = port_offset;
}
+
+void
+GDBRemoteCommunicationServerPlatform::SetInferiorArguments(const Args& args)
+{
+m_inferior_arguments = args;
+}
Index: source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
===
--- source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
+++ source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
@@ -25,6 +25,7 @@
#include "lldb/Host/Mutex.h"
#include "lldb/Host/Predicate.h"
#include "lldb/Host/TimeValue.h"
+#include "lldb/Interpreter/Args.h"
#include "Utility/StringExtractorGDBRemote.h"
@@ -168,7 +169,8 @@
StartDebugserverProcess(const char *url,
Platform *platform, // If non nullptr, then check with the platform for the GDB server binary if it can't be located
ProcessLaunchInfo &launch_info,
-uint16_t *port);
+
Re: [Lldb-commits] [PATCH] D14952: Create new "platform process connect" command
tberghammer marked an inline comment as done.
Comment at: source/Commands/CommandObjectPlatform.cpp:2040-2041
@@ -1968,13 +2039,4 @@
"platform process",
"A set of commands to query, launch and attach
to platform processes",
-"platform process [attach|launch|list] ...")
-{
-LoadSubCommand ("attach", CommandObjectSP (new
CommandObjectPlatformProcessAttach (interpreter)));
-LoadSubCommand ("launch", CommandObjectSP (new
CommandObjectPlatformProcessLaunch (interpreter)));
-LoadSubCommand ("info" , CommandObjectSP (new
CommandObjectPlatformProcessInfo (interpreter)));
-LoadSubCommand ("list" , CommandObjectSP (new
CommandObjectPlatformProcessList (interpreter)));
-
-}
-
-~CommandObjectPlatformProcess () override
+"platform process []")
{
Done
http://reviews.llvm.org/D14952
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