date:20230817

Re: [PATCH 20/20] ARC: pt_regs: create seperate type for ecr

2023-08-17 Thread Pavel . Kozlov

Hi Vineet,

I'm testing your updates and ran into the same build issue reported by the 
build 
robot.
http://lists.infradead.org/pipermail/linux-snps-arc/2023-August/007522.html

> #ifdef CONFIG_ISA_ARCOMPACT
> @@ -40,18 +51,7 @@ struct pt_regs {
>   *Last word used by Linux for extra state mgmt 
> (syscall-restart)
>   * For interrupts, use artificial ECR values to note current 
> prio-level
>   */
> -   union {
> -   struct {
> -#ifdef CONFIG_CPU_BIG_ENDIAN
> -   unsigned long state:8, ecr_vec:8,
> - ecr_cause:8, ecr_param:8;
> -#else
> -   unsigned long ecr_param:8, ecr_cause:8,
> - ecr_vec:8, state:8;
> -#endif
> -   };
> -   unsigned long event;
> -   };
> +   ecr_reg ecr;
> }
>
> #define MAX_REG_OFFSET offsetof(struct pt_regs, event)

This change causes a build issue for ARC700, as the event field has been
removed and the MAX_REG_OFFSET macro hasn't been updated.

Regards,
Pavel

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[PATCH v2 05/20] ARC: boot log: eliminate struct cpuinfo_arc #1: mm

2023-08-17 Thread Vineet Gupta

This is first step in eliminating struct cpuinfo_arc[NR_CPUS]

Back when we had just ARCompact ISA, the idea was to read/bit-fiddle
the BCRs once and and cache decoded information in a global struct ready
to use.

With ARCv2 it was modified to contained abstract / ISA agnostic
information.

However with ARCv3 there 's too much disparity to abstract in common
structures. So drop the entire decode once and store paradigm. Afterall
there's only 2 users of this machinery anyways:  boot printing and
cat /proc/cpuinfo. None is performance critical to warrant locking away
resident memory per cpu.

This patch is first step in that direction
 - decouples struct cpuinfo_arc_mmu from global struct cpuinfo_arc
 - mmu code still has a trimmed down static version of
   struct cpuinfo_arc_mmu to cache information needed in performance
   critical code such as tlb flush routines
 - folds read_decode_mmu_bcr() into arc_mmu_mumbojumbo()
 - setup_processor() directly calls arc_mmu_init() and not via
   arc_cpu_init()

Tested-by: kernel test robot 
Closes: 
https://lore.kernel.org/oe-kbuild-all/202308151213.qkzpmiyz-...@intel.com/
Signed-off-by: Vineet Gupta 
---
 arch/arc/include/asm/arcregs.h | 27 +++---
 arch/arc/include/asm/setup.h   |  1 -
 arch/arc/kernel/setup.c|  4 +-
 arch/arc/mm/tlb.c  | 93 +-
 4 files changed, 58 insertions(+), 67 deletions(-)

diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 2162023195c5..af00cbe9b850 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -185,6 +185,27 @@ struct bcr_uarch_build_arcv2 {
 #endif
 };
 
+struct bcr_mmu_3 {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+   unsigned int ver:8, ways:4, sets:4, res:3, sasid:1, pg_sz:4,
+u_itlb:4, u_dtlb:4;
+#else
+   unsigned int u_dtlb:4, u_itlb:4, pg_sz:4, sasid:1, res:3, sets:4,
+ways:4, ver:8;
+#endif
+};
+
+struct bcr_mmu_4 {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+   unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
+n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
+#else
+   /*   DTLB  ITLB  JESJE JA  */
+   unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
+pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
+#endif
+};
+
 struct bcr_mpy {
 #ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8;
@@ -307,11 +328,6 @@ struct bcr_generic {
  * Generic structures to hold build configuration used at runtime
  */
 
-struct cpuinfo_arc_mmu {
-   unsigned int ver:4, pg_sz_k:8, s_pg_sz_m:8, pad:10, sasid:1, pae:1;
-   unsigned int sets:12, ways:4, u_dtlb:8, u_itlb:8;
-};
-
 struct cpuinfo_arc_cache {
unsigned int sz_k:14, line_len:8, assoc:4, alias:1, vipt:1, pad:4;
 };
@@ -326,7 +342,6 @@ struct cpuinfo_arc_ccm {
 
 struct cpuinfo_arc {
struct cpuinfo_arc_cache icache, dcache, slc;
-   struct cpuinfo_arc_mmu mmu;
struct cpuinfo_arc_bpu bpu;
struct bcr_identity core;
struct bcr_isa_arcv2 isa;
diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h
index 374138832c5a..76443f198778 100644
--- a/arch/arc/include/asm/setup.h
+++ b/arch/arc/include/asm/setup.h
@@ -36,7 +36,6 @@ long __init arc_get_mem_sz(void);
 
 extern void arc_mmu_init(void);
 extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);
-extern void read_decode_mmu_bcr(void);
 
 extern void arc_cache_init(void);
 extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 41f07b3e594e..094461540f8a 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -186,7 +186,6 @@ static void read_arc_build_cfg_regs(void)
/* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
read_decode_ccm_bcr(cpu);
 
-   read_decode_mmu_bcr();
read_decode_cache_bcr();
 
if (is_isa_arcompact()) {
@@ -256,7 +255,7 @@ static void read_arc_build_cfg_regs(void)
cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 
 /* there's no direct way to distinguish 750 vs. 770 */
-   if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))
+   if (unlikely(cpu->core.family < 0x34))
cpu->name = "ARC750";
} else {
cpu->isa = isa;
@@ -463,6 +462,7 @@ void setup_processor(void)
arc_init_IRQ();
 
pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
+   pr_info("%s", arc_mmu_mumbojumbo(cpu_id, str, sizeof(str)));
 
arc_mmu_init();
arc_cache_init();
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index 2a3105a682c3..861cabe81e87 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -18,7 +18,9 @@
 /* A copy of the ASID from the PID reg is kept in asid_cache */
 DEFINE_PER_CPU(

[PATCH v2 08/20] ARC: boot log: eliminate struct cpuinfo_arc #4: boot log per ISA

2023-08-17 Thread Vineet Gupta

 - boot log now clearly per ISA
 - global struct cpuinfo_arc[] elimiated
 - local struct struct arcinfo kept for passing info
   between functions

Tested-by: kernel test robot 
Closes: 
https://lore.kernel.org/oe-kbuild-all/202308162101.ve5jbg80-...@intel.com
Signed-off-by: Vineet Gupta 
---
 arch/arc/include/asm/arcregs.h |  33 +-
 arch/arc/include/asm/setup.h   |   4 +-
 arch/arc/kernel/setup.c| 560 +++--
 arch/arc/mm/cache.c|  10 +-
 arch/arc/mm/tlb.c  |   4 +-
 5 files changed, 268 insertions(+), 343 deletions(-)

diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 160ee3fab1bd..4b13f60fe7ca 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -23,7 +23,7 @@
 #define ARC_REG_ICCM_BUILD 0x78/* ICCM size (common) */
 #define ARC_REG_XY_MEM_BCR 0x79
 #define ARC_REG_MAC_BCR0x7a
-#define ARC_REG_MUL_BCR0x7b
+#define ARC_REG_MPY_BCR0x7b
 #define ARC_REG_SWAP_BCR   0x7c
 #define ARC_REG_NORM_BCR   0x7d
 #define ARC_REG_MIXMAX_BCR 0x7e
@@ -177,7 +177,7 @@ struct bcr_isa_arcv2 {
 #endif
 };
 
-struct bcr_uarch_build_arcv2 {
+struct bcr_uarch_build {
 #ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:8, prod:8, maj:8, min:8;
 #else
@@ -355,35 +355,6 @@ struct bcr_generic {
 #endif
 };
 
-/*
- ***
- * Generic structures to hold build configuration used at runtime
- */
-
-struct cpuinfo_arc_bpu {
-   unsigned int ver, full, num_cache, num_pred, ret_stk;
-};
-
-struct cpuinfo_arc_ccm {
-   unsigned int base_addr, sz;
-};
-
-struct cpuinfo_arc {
-   struct cpuinfo_arc_bpu bpu;
-   struct bcr_identity core;
-   struct bcr_isa_arcv2 isa;
-   const char *release, *name;
-   unsigned int vec_base;
-   struct cpuinfo_arc_ccm iccm, dccm;
-   struct {
-   unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, 
swape:1, pad1:2,
-fpu_sp:1, fpu_dp:1, dual:1, dual_enb:1, pad2:4,
-ap_num:4, ap_full:1, smart:1, rtt:1, pad3:1,
-timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4;
-   } extn;
-   struct bcr_mpy extn_mpy;
-};
-
 static inline int is_isa_arcv2(void)
 {
return IS_ENABLED(CONFIG_ISA_ARCV2);
diff --git a/arch/arc/include/asm/setup.h b/arch/arc/include/asm/setup.h
index 4c0bacd0ff5c..1c6db599e1fc 100644
--- a/arch/arc/include/asm/setup.h
+++ b/arch/arc/include/asm/setup.h
@@ -35,10 +35,10 @@ long __init arc_get_mem_sz(void);
 #define IS_AVAIL3(v, v2, s)IS_AVAIL1(v, s), IS_AVAIL1(v, 
IS_DISABLED_RUN(v2))
 
 extern void arc_mmu_init(void);
-extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);
+extern int arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);
 
 extern void arc_cache_init(void);
-extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
+extern int arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
 
 extern void __init handle_uboot_args(void);
 
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 3ea834941c1f..0aa49308d792 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
 
@@ -43,19 +44,22 @@ const struct machine_desc *machine_desc;
 
 struct task_struct *_current_task[NR_CPUS];/* For stack switching */
 
-struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
+struct cpuinfo_arc {
+   int arcver;
+   unsigned int t0:1, t1:1;
+   struct {
+   unsigned long base;
+   unsigned int sz;
+   } iccm, dccm;
+};
+
+#ifdef CONFIG_ISA_ARCV2
 
-static const struct id_to_str arc_legacy_rel[] = {
+static const struct id_to_str arc_hs_rel[] = {
/* ID.ARCVER,   Release */
-#ifdef CONFIG_ISA_ARCOMPACT
-   { 0x34, "R4.10"},
-   { 0x35, "R4.11"},
-#else
{ 0x51, "R2.0" },
{ 0x52, "R2.1" },
{ 0x53, "R3.0" },
-#endif
-   { 0x00, NULL   }
 };
 
 static const struct id_to_str arc_hs_ver54_rel[] = {
@@ -66,320 +70,294 @@ static const struct id_to_str arc_hs_ver54_rel[] = {
{  3,   "R4.00a"},
{  0xFF,NULL   }
 };
+#endif
 
-static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
+static int
+arcompact_mumbojumbo(int c, struct cpuinfo_arc *info, char *buf, int len)
 {
-   if (is_isa_arcompact()) {
-   struct bcr_iccm_arcompact iccm;
-   struct bcr_dccm_arcompact dccm;
+   int n = 0;
+#ifdef CONFIG_ISA_ARCOMPACT
+   char *cpu_nm, *isa_nm = "ARCompact";
+   struct bcr_fp_arcompact fpu_sp, fpu_dp;
+   int atomic = 0, be, present;
+   int bpu_full, bpu_cache, bpu_pred;
+   struct bcr_bpu_arcompact bpu;
+   struct bcr_iccm_arcompact iccm;
+   struct

[PATCH v2 20/20] ARC: pt_regs: create seperate type for ecr

2023-08-17 Thread Vineet Gupta

Reduces duplication in each ISA specific pt_regs

Tested-by: kernel test robot 
Closes: 
https://lore.kernel.org/oe-kbuild-all/202308151342.roq9urvv-...@intel.com
Signed-off-by: Vineet Gupta 
---
 arch/arc/include/asm/ptrace.h  | 47 +-
 arch/arc/kernel/asm-offsets.c  |  2 +-
 arch/arc/kernel/kgdb.c |  2 +-
 arch/arc/kernel/ptrace.c   |  4 +--
 arch/arc/kernel/traps.c|  4 +--
 arch/arc/kernel/troubleshoot.c | 13 +-
 arch/arc/mm/fault.c|  6 ++---
 7 files changed, 33 insertions(+), 45 deletions(-)

diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h
index 3a054b695f28..4a2b30fb5a98 100644
--- a/arch/arc/include/asm/ptrace.h
+++ b/arch/arc/include/asm/ptrace.h
@@ -12,6 +12,17 @@
 
 #ifndef __ASSEMBLY__
 
+typedef union {
+   struct {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+   unsigned long state:8, vec:8, cause:8, param:8;
+#else
+   unsigned long param:8, cause:8, vec:8, state:8;
+#endif
+   };
+   unsigned long full;
+} ecr_reg;
+
 /* THE pt_regs: Defines how regs are saved during entry into kernel */
 
 #ifdef CONFIG_ISA_ARCOMPACT
@@ -40,21 +51,10 @@ struct pt_regs {
 *  Last word used by Linux for extra state mgmt (syscall-restart)
 * For interrupts, use artificial ECR values to note current prio-level
 */
-   union {
-   struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-   unsigned long state:8, ecr_vec:8,
- ecr_cause:8, ecr_param:8;
-#else
-   unsigned long ecr_param:8, ecr_cause:8,
- ecr_vec:8, state:8;
-#endif
-   };
-   unsigned long event;
-   };
+   ecr_reg ecr;
 };
 
-#define MAX_REG_OFFSET offsetof(struct pt_regs, event)
+#define MAX_REG_OFFSET offsetof(struct pt_regs, ecr)
 
 #else
 
@@ -62,18 +62,7 @@ struct pt_regs {
 
unsigned long orig_r0;
 
-   union {
-   struct {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-   unsigned long state:8, ecr_vec:8,
- ecr_cause:8, ecr_param:8;
-#else
-   unsigned long ecr_param:8, ecr_cause:8,
- ecr_vec:8, state:8;
-#endif
-   };
-   unsigned long event;
-   };
+   ecr_reg ecr;/* Exception Cause Reg */
 
unsigned long bta;  /* erbta */
 
@@ -131,13 +120,13 @@ struct callee_regs {
 /* return 1 if PC in delay slot */
 #define delay_mode(regs) ((regs->status32 & STATUS_DE_MASK) == STATUS_DE_MASK)
 
-#define in_syscall(regs)((regs->ecr_vec == ECR_V_TRAP) && !regs->ecr_param)
-#define in_brkpt_trap(regs) ((regs->ecr_vec == ECR_V_TRAP) && regs->ecr_param)
+#define in_syscall(regs)((regs->ecr.vec == ECR_V_TRAP) && !regs->ecr.param)
+#define in_brkpt_trap(regs) ((regs->ecr.vec == ECR_V_TRAP) && regs->ecr.param)
 
 #define STATE_SCALL_RESTARTED  0x01
 
-#define syscall_wont_restart(reg) (reg->state |= STATE_SCALL_RESTARTED)
-#define syscall_restartable(reg) !(reg->state &  STATE_SCALL_RESTARTED)
+#define syscall_wont_restart(regs) (regs->ecr.state |= STATE_SCALL_RESTARTED)
+#define syscall_restartable(regs) !(regs->ecr.state &  STATE_SCALL_RESTARTED)
 
 #define current_pt_regs()  \
 ({ \
diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c
index 478768c88f46..f77deb799175 100644
--- a/arch/arc/kernel/asm-offsets.c
+++ b/arch/arc/kernel/asm-offsets.c
@@ -46,7 +46,7 @@ int main(void)
BLANK();
 
DEFINE(PT_status32, offsetof(struct pt_regs, status32));
-   DEFINE(PT_event, offsetof(struct pt_regs, event));
+   DEFINE(PT_event, offsetof(struct pt_regs, ecr));
DEFINE(PT_bta, offsetof(struct pt_regs, bta));
DEFINE(PT_sp, offsetof(struct pt_regs, sp));
DEFINE(PT_r0, offsetof(struct pt_regs, r0));
diff --git a/arch/arc/kernel/kgdb.c b/arch/arc/kernel/kgdb.c
index 345a554c..4f2b5951454f 100644
--- a/arch/arc/kernel/kgdb.c
+++ b/arch/arc/kernel/kgdb.c
@@ -175,7 +175,7 @@ void kgdb_trap(struct pt_regs *regs)
 * with trap_s 4 (compiled) breakpoints, continuation needs to
 * start after the breakpoint.
 */
-   if (regs->ecr_param == 3)
+   if (regs->ecr.param == 3)
instruction_pointer(regs) -= BREAK_INSTR_SIZE;
 
kgdb_handle_exception(1, SIGTRAP, 0, regs);
diff --git a/arch/arc/kernel/ptrace.c b/arch/arc/kernel/ptrace.c
index 14ea7406f5cd..e0c233c178b1 100644
--- a/arch/arc/kernel/ptrace.c
+++ b/arch/arc/kernel/ptrace.c
@@ -46,7 +46,7 @@ static const struct pt_regs_offset regoffset_table[] = {
REG_OFFSET_NAME(r0),
REG_OFFSET_NAME(sp),
REG_OFFSET_NAME(orig_r0),
-   REG_OFFSET_NAME(event),
+   REG_OFFSET_NAME(ecr),
REG_OFFSET_END,
 };
 
@@ -54,7 +5

Re: [PATCH 20/20] ARC: pt_regs: create seperate type for ecr

2023-08-17 Thread Vineet Gupta




On 8/17/23 05:09, pavel.koz...@synopsys.com wrote:

Hi Vineet,

I'm testing your updates and ran into the same build issue reported by the build
robot.
http://lists.infradead.org/pipermail/linux-snps-arc/2023-August/007522.html


#define MAX_REG_OFFSET offsetof(struct pt_regs, event)

This change causes a build issue for ARC700, as the event field has been
removed and the MAX_REG_OFFSET macro hasn't been updated.


I've posted v2 for 3 patches. Please reapply/retest the whole series.

Thx,
-Vineet


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Re: [PATCH 20/20] ARC: pt_regs: create seperate type for ecr

[PATCH v2 05/20] ARC: boot log: eliminate struct cpuinfo_arc #1: mm

[PATCH v2 08/20] ARC: boot log: eliminate struct cpuinfo_arc #4: boot log per ISA

[PATCH v2 20/20] ARC: pt_regs: create seperate type for ecr

Re: [PATCH 20/20] ARC: pt_regs: create seperate type for ecr

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