date:20180306

[PATCH v3 2/2] dt-bindings: Document the Synopsys DW AXI DMA bindings

2018-03-06 Thread Eugeniy Paltsev

This patch adds documentation of device tree bindings for the Synopsys
DesignWare AXI DMA controller.

Signed-off-by: Eugeniy Paltsev 
---
Changes v2->v3:
 * None.

 .../devicetree/bindings/dma/snps,dw-axi-dmac.txt   | 41 ++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt

diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt 
b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
new file mode 100644
index ..f237b7928283
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
@@ -0,0 +1,41 @@
+Synopsys DesignWare AXI DMA Controller
+
+Required properties:
+- compatible: "snps,axi-dma-1.01a"
+- reg: Address range of the DMAC registers. This should include
+  all of the per-channel registers.
+- interrupt: Should contain the DMAC interrupt number.
+- interrupt-parent: Should be the phandle for the interrupt controller
+  that services interrupts for this device.
+- dma-channels: Number of channels supported by hardware.
+- snps,dma-masters: Number of AXI masters supported by the hardware.
+- snps,data-width: Maximum AXI data width supported by hardware.
+  (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
+- snps,priority: Priority of channel. Array size is equal to the number of
+  dma-channels. Priority value must be programmed within [0:dma-channels-1]
+  range. (0 - minimum priority)
+- snps,block-size: Maximum block size supported by the controller channel.
+  Array size is equal to the number of dma-channels.
+
+Optional properties:
+- snps,axi-max-burst-len: Restrict master AXI burst length by value specified
+  in this property. If this property is missing the maximum AXI burst length
+  supported by DMAC is used. [1:256]
+
+Example:
+
+dmac: dma-controller@8 {
+   compatible = "snps,axi-dma-1.01a";
+   reg = <0x8 0x400>;
+   clocks = <&core_clk>, <&cfgr_clk>;
+   clock-names = "core-clk", "cfgr-clk";
+   interrupt-parent = <&intc>;
+   interrupts = <27>;
+
+   dma-channels = <4>;
+   snps,dma-masters = <2>;
+   snps,data-width = <3>;
+   snps,block-size = <4096 4096 4096 4096>;
+   snps,priority = <0 1 2 3>;
+   snps,axi-max-burst-len = <16>;
+};
-- 
2.14.3


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[PATCH v3 0/2] Introduce DW AXI DMAC driver

2018-03-06 Thread Eugeniy Paltsev

This patch series add support for the DW AXI DMAC controller.

DW AXI DMAC is a part of HSDK development board from Synopsys.

In this driver implementation only DMA_MEMCPY transfers
are supported.

Changes v2->v3 (suggested by Andy Shevchenko and Vinod Koul):
 * Fix SPDX licence comment style.
 * Use KBUILD_MODNAME macro instead of custom one.
 * Refactor dma_chan_tx_status function.
 * Refactor dma_chan_pause function.
 * Remove dma_cookie_init() call from dma_chan_alloc_chan_resources()
 * Use upper_32_bits() and lower_32_bits() instead of custom one.
 * Add __maybe_unused to runtime PM callback functions instead of
   CONFIG_PM ifdef use.
 * Other small fixies.

Changes v1->v2 (suggested by Andy Shevchenko):
 * Use SPDX licence identifier.
 * Refactor axi_chan_get_xfer_width function.
 * Fix timeout calculation in dma_chan_pause.
 * Add record to MAINTAINERS in correct alphabetical order.

Eugeniy Paltsev (2):
  dmaengine: Introduce DW AXI DMAC driver
  dt-bindings: Document the Synopsys DW AXI DMA bindings

 .../devicetree/bindings/dma/snps,dw-axi-dmac.txt   |   41 +
 MAINTAINERS|6 +
 drivers/dma/Kconfig|   10 +
 drivers/dma/Makefile   |1 +
 drivers/dma/dw-axi-dmac/Makefile   |1 +
 drivers/dma/dw-axi-dmac/axi_dma_platform.c | 1010 
 drivers/dma/dw-axi-dmac/axi_dma_platform.h |  342 +++
 7 files changed, 1411 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
 create mode 100644 drivers/dma/dw-axi-dmac/Makefile
 create mode 100644 drivers/dma/dw-axi-dmac/axi_dma_platform.c
 create mode 100644 drivers/dma/dw-axi-dmac/axi_dma_platform.h

-- 
2.9.3


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[PATCH v3 1/2] dmaengine: Introduce DW AXI DMAC driver

2018-03-06 Thread Eugeniy Paltsev

This patch adds support for the DW AXI DMAC controller.
DW AXI DMAC is a part of HSDK development board from Synopsys.

In this driver implementation only DMA_MEMCPY transfers are
supported.

Signed-off-by: Eugeniy Paltsev 
---
Changes v2->v3 (suggested by Andy Shevchenko and Vinod Koul):
 * Fix SPDX licence comment style.
 * Use KBUILD_MODNAME macro instead of custom one.
 * Refactor dma_chan_tx_status function.
 * Refactor dma_chan_pause function.
 * Remove dma_cookie_init() call from dma_chan_alloc_chan_resources()
 * Use upper_32_bits() and lower_32_bits() instead of custom one.
 * Add __maybe_unused to runtime PM callback functions instead of
   CONFIG_PM ifdef use.
 * Other small fixies.

 MAINTAINERS|6 +
 drivers/dma/Kconfig|   10 +
 drivers/dma/Makefile   |1 +
 drivers/dma/dw-axi-dmac/Makefile   |1 +
 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 1008 
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h  |  334 
 6 files changed, 1360 insertions(+)
 create mode 100644 drivers/dma/dw-axi-dmac/Makefile
 create mode 100644 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
 create mode 100644 drivers/dma/dw-axi-dmac/dw-axi-dmac.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 3bdc260e36b7..b31bfdb8a09e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13336,6 +13336,12 @@ S: Maintained
 F: drivers/gpio/gpio-dwapb.c
 F: Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt
 
+SYNOPSYS DESIGNWARE AXI DMAC DRIVER
+M: Eugeniy Paltsev 
+S: Maintained
+F: drivers/dma/dwi-axi-dmac/
+F: Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
+
 SYNOPSYS DESIGNWARE DMAC DRIVER
 M: Viresh Kumar 
 R: Andy Shevchenko 
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 27df3e2837fd..c36272aa7c09 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -187,6 +187,16 @@ config DMA_SUN6I
help
  Support for the DMA engine first found in Allwinner A31 SoCs.
 
+config DW_AXI_DMAC
+   tristate "Synopsys DesignWare AXI DMA support"
+   depends on OF || COMPILE_TEST
+   select DMA_ENGINE
+   select DMA_VIRTUAL_CHANNELS
+   help
+ Enable support for Synopsys DesignWare AXI DMA controller.
+ NOTE: This driver wasn't tested on 64 bit platform because
+ of lack 64 bit platform with Synopsys DW AXI DMAC.
+
 config EP93XX_DMA
bool "Cirrus Logic EP93xx DMA support"
depends on ARCH_EP93XX || COMPILE_TEST
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index b9dca8a0e142..c242a5e8906b 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_DMA_OMAP) += omap-dma.o
 obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
 obj-$(CONFIG_DMA_SUN4I) += sun4i-dma.o
 obj-$(CONFIG_DMA_SUN6I) += sun6i-dma.o
+obj-$(CONFIG_DW_AXI_DMAC) += dw-axi-dmac/
 obj-$(CONFIG_DW_DMAC_CORE) += dw/
 obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
 obj-$(CONFIG_FSL_DMA) += fsldma.o
diff --git a/drivers/dma/dw-axi-dmac/Makefile b/drivers/dma/dw-axi-dmac/Makefile
new file mode 100644
index ..4bfa462005be
--- /dev/null
+++ b/drivers/dma/dw-axi-dmac/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_DW_AXI_DMAC) += dw-axi-dmac-platform.o
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
new file mode 100644
index ..dbe7312c15c6
--- /dev/null
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -0,0 +1,1008 @@
+// SPDX-License-Identifier:  GPL-2.0
+// (C) 2017-2018 Synopsys, Inc. (www.synopsys.com)
+
+/*
+ * Synopsys DesignWare AXI DMA Controller driver.
+ *
+ * Author: Eugeniy Paltsev 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "dw-axi-dmac.h"
+#include "../dmaengine.h"
+#include "../virt-dma.h"
+
+/*
+ * The set of bus widths supported by the DMA controller. DW AXI DMAC supports
+ * master data bus width up to 512 bits (for both AXI master interfaces), but
+ * it depends on IP block configurarion.
+ */
+#define AXI_DMA_BUSWIDTHS\
+   (DMA_SLAVE_BUSWIDTH_1_BYTE  | \
+   DMA_SLAVE_BUSWIDTH_2_BYTES  | \
+   DMA_SLAVE_BUSWIDTH_4_BYTES  | \
+   DMA_SLAVE_BUSWIDTH_8_BYTES  | \
+   DMA_SLAVE_BUSWIDTH_16_BYTES | \
+   DMA_SLAVE_BUSWIDTH_32_BYTES | \
+   DMA_SLAVE_BUSWIDTH_64_BYTES)
+
+static inline void
+axi_dma_iowrite32(struct axi_dma_chip *chip, u32 reg, u32 val)
+{
+   iowrite32(val, chip->regs + reg);
+}
+
+static inline u32 axi_dma_ioread32(struct axi_dma_chip *chip, u32 reg)
+{
+   return ioread32(chip->regs + reg);
+}
+
+static inline void
+axi_chan_iowrite32(struct axi_dma_chan *chan, u32 reg, u32 val)
+{
+   iowrite32(val, chan->chan_regs + reg);
+}
+
+static inline u32 axi_chan_ior

Re: uClibc-ng testsuite failures

2018-03-06 Thread Alexey Brodkin

Hi Waldemar,

On Mon, 2018-02-26 at 21:50 +0100, Waldemar Brodkorb wrote:
> Hi Vineet,
> Vineet Gupta wrote,
> 
> > On 02/26/2018 11:59 AM, Waldemar Brodkorb wrote:
> > > > > The syscall cancellation failures are still there with gcc 7.3.0 and
> > > > > binutils 2.30. Do you have any patches on top of it?
> > > > 
> > > > Are you talking about these results?
> > > > https://urldefense.proofpoint.com/v2/url?u=https-3A__downloads.uclibc-2Dng.org_reports_1.0.28_REPORT.arcv2.libc.uClibc-2Dng-2D1.0.28&d=DwIBaQ&;
> > > > c=DPL6_X_6JkXFx7AXWqB0tg&r=7FgpX6o3vAhwMrMhLh-4ZJey5kjdNUwOL2CWsFwR4T8&m=TsxZS2Izf4LUrQfQCh9Iw8-L0zYXeJLdRhvUfyiWw2A&s=BGT84AxTG_-
> > > > ymRw4CytOO7g6kTy7PXKYBrHbGF_pTR4&e=
> > > 
> > > No.
> > > > But the link above points to stuff built with gcc 7.2 but not 7.3.
> > > > Could you please share your results with gcc 7.2 and binutils 2.30?
> > > 
> > > Here with gcc 7.3.0 and binutils 2.30:
> > > https://urldefense.proofpoint.com/v2/url?u=https-3A__downloads.uclibc-2Dng.org_reports_git_&d=DwIBaQ&c=DPL6_X_6JkXFx7AXWqB0tg&r=7FgpX6o3vAhwMrMh
> > > Lh-4ZJey5kjdNUwOL2CWsFwR4T8&m=TsxZS2Izf4LUrQfQCh9Iw8-L0zYXeJLdRhvUfyiWw2A&s=Ni7_rqZq4c0mvnYsOyvZoZEIddMnIOEsSmopG9m9LwU&e=
> > 
> > I ran into similar issues with glibc test suite. It seems gcc 7.x released
> > won't cut it - it misses tons of upstream patches including
> > 
> > 2017-11-03 e892f4fac605 [ARC] Fix to unwinding.
> > 
> > So your best bet is to use upstream gcc master !
> 
> gcc 7 branch or gcc 8 latest greatest?
> 
> Last time there was some issue with gcc8 and you told me to use gcc7
> with some patches.
> 
> /me is confused.


Could you please elaborate a bit on how do you build ARC toolchain?
That way we'll try to reproduce your problem locally.

Also may I ask you to try the very latest GCC and Binutils from 

GCC: https://github.com/foss-for-synopsys-dwc-arc-processors/gcc/tree/dev
Binutils: 
https://github.com/foss-for-synopsys-dwc-arc-processors/binutils-gdb/tree/arc-2018.03

With these sources I can build everything successfully and run entire test-suite
with that following results:
-->8
Total skipped: 15
Total failed: 19
Total passed: 397
-->8

-Alexey
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[PATCH v3 2/2] dt-bindings: Document the Synopsys DW AXI DMA bindings

[PATCH v3 0/2] Introduce DW AXI DMAC driver

[PATCH v3 1/2] dmaengine: Introduce DW AXI DMAC driver

Re: uClibc-ng testsuite failures

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