[ACTIVITY] report week ending 12 Oct
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ Xilinx Versal SoC support
- investigated problem with a "suppress this warning patch" which
gcc 8 didn't like. It turns out that _Pragma() in GCC is a bit
of a disaster area; fortunately we only need to suppress a
warning here for clang, so we can just avoid using _Pragma() with GCC.
(cf GCC bugs 85153, 69558, 82335, 66099, 55578, 69543.
clang is not flawless here either: cf clang bugs 31999, 15129, 35154.
The clang false-positive warning we're working around is bug 39113.)
* VIRT-164 [improve Cortex-M emulation]
- stack-limit emulation patches have now gone into master, so this
epic can be closed out. Some v8M work will continue under
VIRT-268 (notably FP emulation); bugfixing and similar
small work will go under the general VIRT-65 maintainership epic.
* VIRT-215 ["run microvisors", aka support AArch32 Hyp mode]
- working through some of the HCR bits we don't implement, to see
if any of them are the cause of the failures I see with AArch32
hypervisors. (Sadly they don't seem to be.) Sent out patches
implementing HCR.{FB,DC,VI,VF,PTW} and fixing some syndrome
reporting corner cases where AArch32 differs from AArch64.
thanks
-- PMM
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[ACTIVITY] report week ending 12 Oct
[TCWG-1473] Fix -fno-integrated-as and -mbig-endian (Linux Kernel Build with clang) - Needed some revision to handle linker emulation. Patch in upstream review [TCWG-1474] Fix out of range branch (CBZ) when -fimplicit-it (or -fno-integrated-as) and certain kinds of inline assembly - Committed upstream. [TCWG-1424] Code-size investigations with PGO - Marking functions for size optimisation at the earliest possible stage improves code-size for little loss in performance. The main beneficiary is that loops are not unrolled in size optimised functions and inline thresholds are lower. - LTO with instrumented profiling still sees large increase in size. Originally thought my changes weren't working with LTO but I think that something else is happening. -- Found out that the profiling information isn't being sent to the LTO code-generator (although it should be present as IR annotations from the objects. -- There is an option to pass the sample profile through to the LTO code-generator but not an instrumented profile file. -- It seems like the LTO plugin doesn't use the new pass manager unless a separate option is passed through to the code-generator. -- It seems like Thin-LTO is where most of upstream development is these days and there is a slightly different pass pipeline, and some interaction with profiling. Worth some more experiments. First draft made of incorporating YVR18 Jira discussion into Confluence https://collaborate.linaro.org/display/TCWG/JIRA+Usage+and+Best+Practices ___ linaro-toolchain mailing list linaro-toolchain@lists.linaro.org https://lists.linaro.org/mailman/listinfo/linaro-toolchain
[ACTIVITY] Weekly report for week 41
=== Work done during this past week === * TCWG-1428 (Support arithmetic on FileCheck regex variable): + continued cleaning up code and painfully rebased it on recent trunk * GNU-296 / GCC PR85434 / CVE-2018-12886: + fixed changes to routines for PIC access to use specified register + fixed 2 more issues in stack protector new instruction patterns + testing for arm and thumb2, now starting over due to one of the above issues * GNU-580 / PR86968: in progress + investigate, try 2 approaches, need to start looking into 3rd approach * Line management. === Plan for week 42 === * GNU-296 / GCC PR85434 / CVE-2018-12886: + finish testing, and submit new stack protector patch for upstream review * TCWG-1428 (Support arithmetic on FileCheck regex variable): + extend testcase coverage (add tests for latest syntax change and add more negative testing) + finish cleaning up the code * GNU-580 / PR86968: in progress + attempt 3rd approach * Try to reproduce perf issue mentioned in week #30's weekly report on latest perf * Line management: + continue progress on rotations + start preparing first AFDS ___ linaro-toolchain mailing list linaro-toolchain@lists.linaro.org https://lists.linaro.org/mailman/listinfo/linaro-toolchain
[ACTIVITY] 8-12 October 2018
== Progress == * FDPIC - GCC: send v3 patches, got some feedback: will need another iteration * GCC upstream validation: - reported a few regressions - dealing with some random results, again * GCC: - looking at bug report on aarch64 about misaligned accesses. Need more details to reproduce the problem * Newlib - got a few small patches accepted * misc (conf-calls, meetings, emails, ) == Next == FDPIC: - GCC: handle v3 patches feedback - uclibc-ng: look at how to test fdpic mode with openadk ___ linaro-toolchain mailing list linaro-toolchain@lists.linaro.org https://lists.linaro.org/mailman/listinfo/linaro-toolchain
[ACTIVITY] week ending 14 Oct 2018
[VIRT-214 # SVE System Registers ] Posted v3 patch set. [VIRT-281 # Extend gdbstub for SVE ] Crashed gdb. Posted patch fixing buffer overrun. It was suggested to me that qemu's gdbstub might not support enough modern bits of the remote protocol for SVE. So I spent quite a bit of time reading up on the protocol and beginning to review [PATCH v2 00/15] gdbstub: support for the multiprocess extension In the end I'm not convinced there's anything missing for SVE. I think I'm going to have to examine upstream gdb more closely, running gdbserver proper. [Upstream] Collecting patches for tcg-next. Misc patch review. [GCC] Pinged my LSE patch set from 2 Oct. r~ ___ linaro-toolchain mailing list linaro-toolchain@lists.linaro.org https://lists.linaro.org/mailman/listinfo/linaro-toolchain
