SVE Support ([VIRT-198])
RISU Support for SVE ([VIRT-199])
~
- regenerate more half-precision test cases
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
SVE Reviews
~~~
- started reviewing {PATCH 0/9} target/arm: Fixups for
ARM_FEATURE_V8_FP16 Message-Id:
<20180425012300.14698-1-richard.hender...@linaro.org>
- fixed a couple of other problems testing picked up, see [this
branch]
[this branch] https://github.com/stsquad/qemu/tree/review/rth-fp16-fixes
SoftFloat Bugs ([VIRT-69])
==
- posted {PATCH v3 0/5} refactor float-to-float and fix AHP
Message-Id: <20180510094206.15354-1-alex.ben...@linaro.org>
- fixes up the current cases, AArch32 is lagging in later rev
support
- rth had a go at a canonical NaN solution
- reviewed {PATCH 00/19} softfloat: Clean up NaN handling Message-Id:
<20180511004345.26708-1-richard.hender...@linaro.org>
[VIRT-69] https://projects.linaro.org/browse/VIRT-69
Upstream Work ([VIRT-109])
==
- catch-up on review queue :todo
- reviewed {PATCH v6 0/3} target/arm: Add a dynamic XML-description of
the cp-registers to GDB Message-Id:
<1524153386-3550-1-git-send-email-abdallah.bouass...@lauterbach.com>
- finished testing - some wierdness with register values
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[a gdb bug] https://sourceware.org/bugzilla/show_bug.cgi?id=23127
Fixing up tests/tcg
~~~
- posted {PATCH v3 00/46} fix building of tests/tcg Message-Id:
<20180424152405.10304-1-alex.ben...@linaro.org>
- series looking pretty good, more comments incoming
- working on [v4 of the series]
[v4 of the series]
https://github.com/stsquad/qemu/tree/testing/tcg-tests-revival-v4
KVM CI Loop ([VIRT-2])
==
- need to sync-up on the current state of this work :todo
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Other Tasks
===
- Investigate weird QEMU CI OBS build issue :todo
- the OBS build should be failing the RISU tests but isn't, despite
the commit id it reports
- bringing up my SyncQuacer, did some serial port debugging to debug
DIMMS
- turns out supported DIMMs are "4GB UDIMM and 16GB RDIMM"
- will need new firmware to get the 16GB UDIMMs working
[ARMv8.2-LPA support] https://projects.linaro.org/browse/TCWG-1395
[ARMv8.2-LVA] https://projects.linaro.org/browse/TCWG-1396
Completed Reviews [5/5]
===
{PATCH v6 0/3} target/arm: Add a dynamic XML-description of the cp-registers to
GDB
Message-Id: <1524153386-3550-1-git-send-email-abdallah.bouass...@lauterbach.com>
~~~
- CLOSING NOTE tested with new gdb - some weirdness on timer register
{PATCH 00/19} softfloat: Clean up NaN handling
Message-Id: <20180511004345.26708-1-richard.hender...@linaro.org>
~~~
- CLOSING NOTE [2018-05-11 Fri 20:55]
Found a few minor bugs, rth re-spinning with my float-to-float stuff
Absences
- Bank Holiday (May 7th)
- VNC18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
* {Qemu-devel} {PATCH 0/9} target/arm: Implement v8.1-Atomics
Message-Id: <20180427002651.28356-1-richard.hender...@linaro.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <2018050114.19154-1-kbast...@mail.uni-paderborn.de>
* {RFC PATCH v2 00/19} reverse debugging
Message-Id: <20180428123627.12445.9923.stgit@pasha-VirtualBox>
* {PATCH 0/2} arm64: Report signal frame size to userspace via auxv
Message-Id: <1525776211-28169-1-git-send-email-dave.mar...@arm.com>
* {Qemu-devel} {PATCH v4 0/4} qemu-thread: support --enable-debug-mutex
Message-Id: <20180423053927.13715-1-pet...@redhat.com>
* {PATCH v3 00/15} fp-test + hardfloat
Message-Id: <1522883475-27858-1-git-send-email-c...@braap.org>
--
Alex Bennée
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