[PATCH] s390: Optimize vec_cmpge followed by vec_sel

[Juergen Christ via Gcc-patches]

A vec_cmpge produces a negation.  Replace this negation by swapping the two
selection choices of a vec_sel based on the result of the vec_cmpge.

Bootstrapped and regression tested on s390x.

gcc/ChangeLog:

* config/s390/vx-builtins.md: New vsel pattern.

gcc/testsuite/ChangeLog:

* gcc.target/s390/vector/vec-cmpge.c: New test.

Signed-off-by: Juergen Christ 
---
 gcc/config/s390/vx-builtins.md | 11 +++
 .../gcc.target/s390/vector/vec-cmpge.c | 18 ++
 2 files changed, 29 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/s390/vector/vec-cmpge.c

diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index f4248c55d4ec..0ce3ff6ef4a6 100644
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -530,6 +530,17 @@
   "vsel\t%v0,%1,%2,%3"
   [(set_attr "op_type" "VRR")])
 
+(define_insn "vsel_swapped"
+  [(set (match_operand:V_HW_FT   0 "register_operand" "=v")
+   (ior:V_HW_FT
+(and:V_HW_FT (not:V_HW_FT (match_operand:V_HW_FT 3 "register_operand"  
"v"))
+ (match_operand:V_HW_FT 1 "register_operand"  "v"))
+(and:V_HW_FT (match_dup 3)
+ (match_operand:V_HW_FT 2 "register_operand"  "v"]
+  "TARGET_VX"
+  "vsel\t%v0,%2,%1,%3"
+  [(set_attr "op_type" "VRR")])
+
 
 ; Vector sign extend to doubleword
 
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-cmpge.c 
b/gcc/testsuite/gcc.target/s390/vector/vec-cmpge.c
new file mode 100644
index ..eb188690ae41
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-cmpge.c
@@ -0,0 +1,18 @@
+/* Check that vec_sel absorbs a negation generated by vec_cmpge.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=z13" } */
+
+typedef __attribute__((vector_size(16))) unsigned char uv16qi;
+
+#include 
+
+void f(char *res, uv16qi ctrl)
+{
+  uv16qi a = vec_splat_u8(0xfe);
+  uv16qi b = vec_splat_u8(0x80);
+  uv16qi mask = vec_cmpge(ctrl, b);
+  *(uv16qi *)res = vec_sel(a, b, mask);
+}
+
+/* { dg-final { scan-assembler-not "vno\t" } } */
-- 
2.39.3

[PATCH] s390: Fix vec_init default expander

[Juergen Christ via Gcc-patches]

Do not reinitialize vector lanes to zero since they are already initialized to
zero.

Bootstrapped and regression tested on s390x.

gcc/ChangeLog:

* config/s390/s390.cc (vec_init): Fix default case

gcc/Testsuite/ChangeLog:

* gcc.target/s390/vector/vec-init-3.c: New test.

Signed-off-by: Juergen Christ 
---
 gcc/config/s390/s390.cc | 11 ++-
 .../gcc.target/s390/vector/vec-init-3.c | 17 +
 2 files changed, 23 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/s390/vector/vec-init-3.c

diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc
index 505de995da87..31b646782721 100644
--- a/gcc/config/s390/s390.cc
+++ b/gcc/config/s390/s390.cc
@@ -7130,11 +7130,12 @@ s390_expand_vec_init (rtx target, rtx vals)
   if (!general_operand (elem, GET_MODE (elem)))
elem = force_reg (inner_mode, elem);
 
-  emit_insn (gen_rtx_SET (target,
- gen_rtx_UNSPEC (mode,
- gen_rtvec (3, elem,
-GEN_INT (i), target),
- UNSPEC_VEC_SET)));
+  if (elem != const0_rtx)
+   emit_insn (gen_rtx_SET (target,
+   gen_rtx_UNSPEC (mode,
+   gen_rtvec (3, elem,
+  GEN_INT (i), target),
+   UNSPEC_VEC_SET)));
 }
 }
 
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-init-3.c 
b/gcc/testsuite/gcc.target/s390/vector/vec-init-3.c
new file mode 100644
index ..12008a963ffb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-init-3.c
@@ -0,0 +1,17 @@
+/* Check that the default case of the vec_init expander does its job.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=z13" } */
+
+typedef __attribute__((vector_size(16))) signed int v4si;
+
+extern v4si G;
+
+v4si
+n (signed int a)
+{
+  return G == (v4si){ a };
+}
+/* { dg-final { scan-assembler-times "vzero" 1 } } */
+/* { dg-final { scan-assembler-times "vlvgf\t" 1 } } */
+/* { dg-final { scan-assembler-not "vleif\t" } } */
-- 
2.39.3