Re: [PATCH v1] LoongArch: Fix bug for tmpdir-g++.dg-struct-layout-1/t033.
Hi,all: This patch has been merged into the master branch. Thanks! Lulu
Cheng 在 2022/4/11 下午3:08, Lulu Cheng 写道:
From: chenglulu
gcc/ChangeLog:
* config/loongarch/loongarch.cc: Fix bug for
tmpdir-g++.dg-struct-layout-1/t033.
---
gcc/config/loongarch/loongarch.cc | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 6e24111a79d..f22150a60cc 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -473,13 +473,14 @@ loongarch_pass_aggregate_in_fpr_and_gpr_p (const_tree
type,
static rtx
loongarch_pass_fpr_single (machine_mode type_mode, unsigned regno,
- machine_mode value_mode)
+ machine_mode value_mode,
+ HOST_WIDE_INT offset)
{
rtx x = gen_rtx_REG (value_mode, regno);
if (type_mode != value_mode)
{
- x = gen_rtx_EXPR_LIST (VOIDmode, x, const0_rtx);
+ x = gen_rtx_EXPR_LIST (VOIDmode, x, GEN_INT (offset));
x = gen_rtx_PARALLEL (type_mode, gen_rtvec (1, x));
}
return x;
@@ -539,7 +540,8 @@ loongarch_get_arg_info (struct loongarch_arg_info *info,
{
case 1:
return loongarch_pass_fpr_single (mode, fregno,
- TYPE_MODE (fields[0].type));
+ TYPE_MODE (fields[0].type),
+ fields[0].offset);
case 2:
return loongarch_pass_fpr_pair (mode, fregno,
[PATCH] gcov-profile: Allow negavive counts of indirect calls [PR105282]
From: Sergei Trofimovich
TOPN metrics are histograms that contain overall count and per-bucket
count. Overall count can be nevative when two profiles merge and some
of per-bucket metrics are dropped.
Noticed as an ICE on python PGO build where gcc crashes as:
during IPA pass: modref
a.c:36:1: ICE: in stream_out_histogram_value, at value-prof.cc:340
36 | }
| ^
stream_out_histogram_value(output_block*, histogram_value_t*)
gcc/value-prof.cc:340
gcc/ChangeLog:
PR gcov-profile/105282
* value-prof.cc (stream_out_histogram_value): Allow negavive counts
on HIST_TYPE_INDIR_CALL.
---
gcc/value-prof.cc | 4
1 file changed, 4 insertions(+)
diff --git a/gcc/value-prof.cc b/gcc/value-prof.cc
index 9785c7a03ea..4927d119aa0 100644
--- a/gcc/value-prof.cc
+++ b/gcc/value-prof.cc
@@ -319,40 +319,44 @@ stream_out_histogram_value (struct output_block *ob,
histogram_value hist)
streamer_write_bitpack (&bp);
switch (hist->type)
{
case HIST_TYPE_INTERVAL:
streamer_write_hwi (ob, hist->hdata.intvl.int_start);
streamer_write_uhwi (ob, hist->hdata.intvl.steps);
break;
default:
break;
}
for (i = 0; i < hist->n_counters; i++)
{
/* When user uses an unsigned type with a big value, constant converted
to gcov_type (a signed type) can be negative. */
gcov_type value = hist->hvalue.counters[i];
if (hist->type == HIST_TYPE_TOPN_VALUES
|| hist->type == HIST_TYPE_IOR)
/* Note that the IOR counter tracks pointer values and these can have
sign bit set. */
;
+ else if (hist->type == HIST_TYPE_INDIR_CALL && i == 0)
+ /* 'all' counter overflow is stored as a negative value. Individual
+ counters and values are expected to be non-negative. */
+ ;
else
gcc_assert (value >= 0);
streamer_write_gcov_count (ob, value);
}
if (hist->hvalue.next)
stream_out_histogram_value (ob, hist->hvalue.next);
}
/* Dump information about HIST to DUMP_FILE. */
void
stream_in_histogram_value (class lto_input_block *ib, gimple *stmt)
{
enum hist_type type;
unsigned int ncounters = 0;
struct bitpack_d bp;
unsigned int i;
histogram_value new_val;
bool next;
--
2.35.1
Re: [PATCH] i386: Correct target attribute for crc32 intrinsics
On Fri, Apr 15, 2022 at 6:30 AM Hongyu Wang wrote:
>
> Hi,
>
> Complile _mm_crc32_u8/16/32/64 intrinsics with -mcrc32
> would meet target specific option mismatch. Correct target pragma
> to fix.
>
> Bootstrapped/regtest on x86_64-pc-linux-gnu{-m32,}.
>
> Ok for master and backport to GCC 11?
>
> gcc/ChangeLog:
>
> * config/i386/smmintrin.h: Correct target pragma from sse4.1
> and sse4.2 to crc32 for crc32 intrinsics.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/crc32-6.c: Adjust to call builtin.
> * gcc.target/i386/crc32-7.c: New test.
> ---
> gcc/config/i386/smmintrin.h | 25 +-
> gcc/testsuite/gcc.target/i386/crc32-6.c | 2 +-
> gcc/testsuite/gcc.target/i386/crc32-7.c | 34 +
> 3 files changed, 42 insertions(+), 19 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/i386/crc32-7.c
>
> diff --git a/gcc/config/i386/smmintrin.h b/gcc/config/i386/smmintrin.h
> index b42b212300f..eb6a451c10a 100644
> --- a/gcc/config/i386/smmintrin.h
> +++ b/gcc/config/i386/smmintrin.h
> @@ -810,17 +810,11 @@ _mm_cmpgt_epi64 (__m128i __X, __m128i __Y)
>
> #include
>
> -#ifndef __SSE4_1__
> +#ifndef __CRC32__
> #pragma GCC push_options
> -#pragma GCC target("sse4.1")
> -#define __DISABLE_SSE4_1__
> -#endif /* __SSE4_1__ */
> -
> -#ifndef __SSE4_2__
> -#pragma GCC push_options
> -#pragma GCC target("sse4.2")
> -#define __DISABLE_SSE4_2__
> -#endif /* __SSE4_1__ */
> +#pragma GCC target("crc32")
> +#define __DISABLE_CRC32__
> +#endif /* __CRC32__ */
>
> /* Accumulate CRC32 (polynomial 0x11EDC6F41) value. */
> extern __inline unsigned int __attribute__((__gnu_inline__,
> __always_inline__, __artificial__))
> @@ -849,14 +843,9 @@ _mm_crc32_u64 (unsigned long long __C, unsigned long
> long __V)
> }
> #endif
>
> -#ifdef __DISABLE_SSE4_2__
> -#undef __DISABLE_SSE4_2__
> +#ifdef __DISABLE_CRC32__
> +#undef __DISABLE_CRC32__
> #pragma GCC pop_options
> -#endif /* __DISABLE_SSE4_2__ */
> -
> -#ifdef __DISABLE_SSE4_1__
> -#undef __DISABLE_SSE4_1__
> -#pragma GCC pop_options
> -#endif /* __DISABLE_SSE4_1__ */
> +#endif /* __DISABLE_CRC32__ */
>
> #endif /* _SMMINTRIN_H_INCLUDED */
> diff --git a/gcc/testsuite/gcc.target/i386/crc32-6.c
> b/gcc/testsuite/gcc.target/i386/crc32-6.c
> index 464e3444069..1f306534bb8 100644
> --- a/gcc/testsuite/gcc.target/i386/crc32-6.c
> +++ b/gcc/testsuite/gcc.target/i386/crc32-6.c
> @@ -7,7 +7,7 @@
> unsigned int
> test_mm_crc32_u8 (unsigned int CRC, unsigned char V)
> {
> - return _mm_crc32_u8 (CRC, V);
> + return __builtin_ia32_crc32qi (CRC, V);
This test should not be changed, it correctly reports ISA mismatch. It
even passes -mno-crc32.
Uros.
> }
>
> /* { dg-error "needs isa option -mcrc32" "" { target *-*-* } 0 } */
> diff --git a/gcc/testsuite/gcc.target/i386/crc32-7.c
> b/gcc/testsuite/gcc.target/i386/crc32-7.c
> new file mode 100644
> index 000..2e310e38b82
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/crc32-7.c
> @@ -0,0 +1,34 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mcrc32" } */
> +/* { dg-final { scan-assembler "crc32b\[^\\n\]*eax" } } */
> +/* { dg-final { scan-assembler "crc32w\[^\\n\]*eax" } } */
> +/* { dg-final { scan-assembler "crc32l\[^\\n\]*eax" } } */
> +/* { dg-final { scan-assembler "crc32q\[^\\n\]*rax" { target { ! ia32 } } }
> } */
> +
> +#include
> +
> +unsigned int
> +test_mm_crc32_u8 (unsigned int CRC, unsigned char V)
> +{
> + return _mm_crc32_u8 (CRC, V);
> +}
> +
> +unsigned int
> +test_mm_crc32_u16 (unsigned int CRC, unsigned short V)
> +{
> + return _mm_crc32_u16 (CRC, V);
> +}
> +
> +unsigned int
> +test_mm_crc32_u32 (unsigned int CRC, unsigned int V)
> +{
> + return _mm_crc32_u32 (CRC, V);
> +}
> +
> +#ifdef __x86_64__
> +unsigned long long
> +test_mm_crc32_u64 (unsigned long long CRC, unsigned long long V)
> +{
> + return _mm_crc32_u64 (CRC, V);
> +}
> +#endif
> --
> 2.18.1
>
[PATCH] rs6000: Move V2DI vec_neg under power8-vector [PR105271]
Hi,
As PR105271 shows, __builtin_altivec_neg_v2di requires option
-mpower8-vector as its pattern expansion relies on subv2di which
has guard VECTOR_UNIT_P8_VECTOR_P (V2DImode). This fix is to move
the related lines for __builtin_altivec_neg_v2di to the section
of stanza power8-vector.
Bootstrapped and regtested on powerpc64-linux-gnu P8 and
powerpc64le-linux-gnu P9 and P10.
Is it ok for trunk?
BR,
Kewen
-
PR target/105271
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def (NEG_V2DI): Move to [power8-vector]
stanza.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr105271.c: New test.
---
gcc/config/rs6000/rs6000-builtins.def | 6 +++---
gcc/testsuite/gcc.target/powerpc/pr105271.c | 14 ++
2 files changed, 17 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr105271.c
diff --git a/gcc/config/rs6000/rs6000-builtins.def
b/gcc/config/rs6000/rs6000-builtins.def
index 0f527c5d78f..f4a9f24bcc5 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -1190,9 +1190,6 @@
const vd __builtin_altivec_neg_v2df (vd);
NEG_V2DF negv2df2 {}
- const vsll __builtin_altivec_neg_v2di (vsll);
-NEG_V2DI negv2di2 {}
-
void __builtin_altivec_stvx_v2df (vd, signed long, void *);
STVX_V2DF altivec_stvx_v2df {stvec}
@@ -2136,6 +2133,9 @@
const vus __builtin_altivec_nand_v8hi_uns (vus, vus);
NAND_V8HI_UNS nandv8hi3 {}
+ const vsll __builtin_altivec_neg_v2di (vsll);
+NEG_V2DI negv2di2 {}
+
const vsc __builtin_altivec_orc_v16qi (vsc, vsc);
ORC_V16QI orcv16qi3 {}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr105271.c
b/gcc/testsuite/gcc.target/powerpc/pr105271.c
new file mode 100644
index 000..1c5f88cadcf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr105271.c
@@ -0,0 +1,14 @@
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mdejagnu-cpu=power7" } */
+
+/* It's to verify no ICE here, ignore error messages about
+ the required options for vec_neg here. */
+/* { dg-excess-errors "pr105271" } */
+
+#include
+
+vector signed long long
+test (vector signed long long x)
+{
+ return vec_neg (x);
+}
--
2.27.0
Re: [PATCH] i386: Correct target attribute for crc32 intrinsics
> This test should not be changed, it correctly reports ISA mismatch. It
> even passes -mno-crc32.
The error message changes from "needs isa option -mcrc32" to "target
specific option mismatch" with the #pragma change.
I see many of our intrinsic would throw such error, it has been a long
term issue for intrinsic diagnostic.
So for this test either I change the dg-error message or the call to
builtin, otherwise it would fail.
Uros Bizjak via Gcc-patches 于2022年4月15日周五 15:54写道：
>
> On Fri, Apr 15, 2022 at 6:30 AM Hongyu Wang wrote:
> >
> > Hi,
> >
> > Complile _mm_crc32_u8/16/32/64 intrinsics with -mcrc32
> > would meet target specific option mismatch. Correct target pragma
> > to fix.
> >
> > Bootstrapped/regtest on x86_64-pc-linux-gnu{-m32,}.
> >
> > Ok for master and backport to GCC 11?
> >
> > gcc/ChangeLog:
> >
> > * config/i386/smmintrin.h: Correct target pragma from sse4.1
> > and sse4.2 to crc32 for crc32 intrinsics.
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/i386/crc32-6.c: Adjust to call builtin.
> > * gcc.target/i386/crc32-7.c: New test.
> > ---
> > gcc/config/i386/smmintrin.h | 25 +-
> > gcc/testsuite/gcc.target/i386/crc32-6.c | 2 +-
> > gcc/testsuite/gcc.target/i386/crc32-7.c | 34 +
> > 3 files changed, 42 insertions(+), 19 deletions(-)
> > create mode 100644 gcc/testsuite/gcc.target/i386/crc32-7.c
> >
> > diff --git a/gcc/config/i386/smmintrin.h b/gcc/config/i386/smmintrin.h
> > index b42b212300f..eb6a451c10a 100644
> > --- a/gcc/config/i386/smmintrin.h
> > +++ b/gcc/config/i386/smmintrin.h
> > @@ -810,17 +810,11 @@ _mm_cmpgt_epi64 (__m128i __X, __m128i __Y)
> >
> > #include
> >
> > -#ifndef __SSE4_1__
> > +#ifndef __CRC32__
> > #pragma GCC push_options
> > -#pragma GCC target("sse4.1")
> > -#define __DISABLE_SSE4_1__
> > -#endif /* __SSE4_1__ */
> > -
> > -#ifndef __SSE4_2__
> > -#pragma GCC push_options
> > -#pragma GCC target("sse4.2")
> > -#define __DISABLE_SSE4_2__
> > -#endif /* __SSE4_1__ */
> > +#pragma GCC target("crc32")
> > +#define __DISABLE_CRC32__
> > +#endif /* __CRC32__ */
> >
> > /* Accumulate CRC32 (polynomial 0x11EDC6F41) value. */
> > extern __inline unsigned int __attribute__((__gnu_inline__,
> > __always_inline__, __artificial__))
> > @@ -849,14 +843,9 @@ _mm_crc32_u64 (unsigned long long __C, unsigned long
> > long __V)
> > }
> > #endif
> >
> > -#ifdef __DISABLE_SSE4_2__
> > -#undef __DISABLE_SSE4_2__
> > +#ifdef __DISABLE_CRC32__
> > +#undef __DISABLE_CRC32__
> > #pragma GCC pop_options
> > -#endif /* __DISABLE_SSE4_2__ */
> > -
> > -#ifdef __DISABLE_SSE4_1__
> > -#undef __DISABLE_SSE4_1__
> > -#pragma GCC pop_options
> > -#endif /* __DISABLE_SSE4_1__ */
> > +#endif /* __DISABLE_CRC32__ */
> >
> > #endif /* _SMMINTRIN_H_INCLUDED */
> > diff --git a/gcc/testsuite/gcc.target/i386/crc32-6.c
> > b/gcc/testsuite/gcc.target/i386/crc32-6.c
> > index 464e3444069..1f306534bb8 100644
> > --- a/gcc/testsuite/gcc.target/i386/crc32-6.c
> > +++ b/gcc/testsuite/gcc.target/i386/crc32-6.c
> > @@ -7,7 +7,7 @@
> > unsigned int
> > test_mm_crc32_u8 (unsigned int CRC, unsigned char V)
> > {
> > - return _mm_crc32_u8 (CRC, V);
> > + return __builtin_ia32_crc32qi (CRC, V);
>
> This test should not be changed, it correctly reports ISA mismatch. It
> even passes -mno-crc32.
>
> Uros.
>
> > }
> >
> > /* { dg-error "needs isa option -mcrc32" "" { target *-*-* } 0 } */
> > diff --git a/gcc/testsuite/gcc.target/i386/crc32-7.c
> > b/gcc/testsuite/gcc.target/i386/crc32-7.c
> > new file mode 100644
> > index 000..2e310e38b82
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/crc32-7.c
> > @@ -0,0 +1,34 @@
> > +/* { dg-do compile } */
> > +/* { dg-options "-O2 -mcrc32" } */
> > +/* { dg-final { scan-assembler "crc32b\[^\\n\]*eax" } } */
> > +/* { dg-final { scan-assembler "crc32w\[^\\n\]*eax" } } */
> > +/* { dg-final { scan-assembler "crc32l\[^\\n\]*eax" } } */
> > +/* { dg-final { scan-assembler "crc32q\[^\\n\]*rax" { target { ! ia32 } }
> > } } */
> > +
> > +#include
> > +
> > +unsigned int
> > +test_mm_crc32_u8 (unsigned int CRC, unsigned char V)
> > +{
> > + return _mm_crc32_u8 (CRC, V);
> > +}
> > +
> > +unsigned int
> > +test_mm_crc32_u16 (unsigned int CRC, unsigned short V)
> > +{
> > + return _mm_crc32_u16 (CRC, V);
> > +}
> > +
> > +unsigned int
> > +test_mm_crc32_u32 (unsigned int CRC, unsigned int V)
> > +{
> > + return _mm_crc32_u32 (CRC, V);
> > +}
> > +
> > +#ifdef __x86_64__
> > +unsigned long long
> > +test_mm_crc32_u64 (unsigned long long CRC, unsigned long long V)
> > +{
> > + return _mm_crc32_u64 (CRC, V);
> > +}
> > +#endif
> > --
> > 2.18.1
> >
Re: [PING] AArch64: add R30_REGNUM into shrink-wrapping separate
On 4/12/22 06:05, Richard Sandiford wrote: Dan Li writes: Gentile ping for this :), thanks. Link: https://gcc.gnu.org/pipermail/gcc-patches/2022-February/590906.html Sorry, I should have realised this at the time, but I don't think we can do this after all. The ABI requires us to set up the frame chain before assigning to the frame pointer. Sorry again for the bogus suggestion. Thanks, Richard OK, thanks Richard :) But I think I still don't quite understand it, so could the x30 be shrinked alone when we don't need the frame chain? Thanks, Dan.
[PATCH] c++: Fix up CONSTRUCTOR_PLACEHOLDER_BOUNDARY handling [PR105256]
Hi!
The CONSTRUCTOR_PLACEHOLDER_BOUNDARY bit is supposed to separate
PLACEHOLDER_EXPRs that should be replaced by one object or subobjects of it
(variable, TARGET_EXPR slot, ...) from other PLACEHOLDER_EXPRs that should
be replaced by different objects or subobjects.
The bit is set when finding PLACEHOLDER_EXPRs inside of a CONSTRUCTOR, not
looking into nested CONSTRUCTOR_PLACEHOLDER_BOUNDARY ctors, and we prevent
elision of TARGET_EXPRs (through TARGET_EXPR_NO_ELIDE) whose initializer
is a CONSTRUCTOR_PLACEHOLDER_BOUNDARY ctor. The following testcase ICEs
though, we don't replace the placeholders in there at all, because
CONSTRUCTOR_PLACEHOLDER_BOUNDARY isn't set on the TARGET_EXPR_INITIAL
ctor, but on a ctor nested in such a ctor. replace_placeholders should be
run on the whole TARGET_EXPR slot.
So, the following patch fixes it by moving the CONSTRUCTOR_PLACEHOLDER_BOUNDARY
bit from nested CONSTRUCTORs to the CONSTRUCTOR containing those (but only
if it is closely nested, if there is some other tree sandwiched in between,
it doesn't do it).
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2022-04-15 Jakub Jelinek
PR c++/105256
* typeck2.cc (process_init_constructor_array,
process_init_constructor_record, process_init_constructor_union): Move
CONSTRUCTOR_PLACEHOLDER_BOUNDARY flag from CONSTRUCTOR elements to the
containing CONSTRUCTOR.
* g++.dg/cpp0x/pr105256.C: New test.
--- gcc/cp/typeck2.cc.jj2022-04-07 09:09:54.432995137 +0200
+++ gcc/cp/typeck2.cc 2022-04-14 16:02:12.438432494 +0200
@@ -1515,6 +1515,14 @@ process_init_constructor_array (tree typ
strip_array_types (TREE_TYPE (ce->value);
picflags |= picflag_from_initializer (ce->value);
+ /* Propagate CONSTRUCTOR_PLACEHOLDER_BOUNDARY to outer
+CONSTRUCTOR. */
+ if (TREE_CODE (ce->value) == CONSTRUCTOR
+ && CONSTRUCTOR_PLACEHOLDER_BOUNDARY (ce->value))
+ {
+ CONSTRUCTOR_PLACEHOLDER_BOUNDARY (init) = 1;
+ CONSTRUCTOR_PLACEHOLDER_BOUNDARY (ce->value) = 0;
+ }
}
/* No more initializers. If the array is unbounded, we are done. Otherwise,
@@ -1560,6 +1568,14 @@ process_init_constructor_array (tree typ
}
picflags |= picflag_from_initializer (next);
+ /* Propagate CONSTRUCTOR_PLACEHOLDER_BOUNDARY to outer
+ CONSTRUCTOR. */
+ if (TREE_CODE (next) == CONSTRUCTOR
+ && CONSTRUCTOR_PLACEHOLDER_BOUNDARY (next))
+ {
+ CONSTRUCTOR_PLACEHOLDER_BOUNDARY (init) = 1;
+ CONSTRUCTOR_PLACEHOLDER_BOUNDARY (next) = 0;
+ }
if (len > i+1)
{
tree range = build2 (RANGE_EXPR, size_type_node,
@@ -1754,6 +1770,13 @@ process_init_constructor_record (tree ty
if (fldtype != TREE_TYPE (field))
next = cp_convert_and_check (TREE_TYPE (field), next, complain);
picflags |= picflag_from_initializer (next);
+ /* Propagate CONSTRUCTOR_PLACEHOLDER_BOUNDARY to outer CONSTRUCTOR. */
+ if (TREE_CODE (next) == CONSTRUCTOR
+ && CONSTRUCTOR_PLACEHOLDER_BOUNDARY (next))
+ {
+ CONSTRUCTOR_PLACEHOLDER_BOUNDARY (init) = 1;
+ CONSTRUCTOR_PLACEHOLDER_BOUNDARY (next) = 0;
+ }
CONSTRUCTOR_APPEND_ELT (v, field, next);
}
@@ -1894,6 +1917,14 @@ process_init_constructor_union (tree typ
ce->value = massage_init_elt (TREE_TYPE (ce->index), ce->value, nested,
flags, complain);
+ /* Propagate CONSTRUCTOR_PLACEHOLDER_BOUNDARY to outer CONSTRUCTOR. */
+ if (ce->value
+ && TREE_CODE (ce->value) == CONSTRUCTOR
+ && CONSTRUCTOR_PLACEHOLDER_BOUNDARY (ce->value))
+{
+ CONSTRUCTOR_PLACEHOLDER_BOUNDARY (init) = 1;
+ CONSTRUCTOR_PLACEHOLDER_BOUNDARY (ce->value) = 0;
+}
return picflag_from_initializer (ce->value);
}
--- gcc/testsuite/g++.dg/cpp0x/pr105256.C.jj2022-04-14 16:04:30.518518875
+0200
+++ gcc/testsuite/g++.dg/cpp0x/pr105256.C 2022-04-14 16:03:53.264035175
+0200
@@ -0,0 +1,18 @@
+// PR c++/105256
+// { dg-do compile { target c++11 } }
+
+int bar (int &);
+
+struct S {
+ struct T {
+struct U {
+ int i = bar (i);
+} u;
+ };
+};
+
+void
+foo (S::T *p)
+{
+ *p = {};
+};
Jakub
Re: [PATCH] i386: Correct target attribute for crc32 intrinsics
On Fri, Apr 15, 2022 at 10:34 AM Hongyu Wang wrote:
>
> > This test should not be changed, it correctly reports ISA mismatch. It
> > even passes -mno-crc32.
>
> The error message changes from "needs isa option -mcrc32" to "target
> specific option mismatch" with the #pragma change.
> I see many of our intrinsic would throw such error, it has been a long
> term issue for intrinsic diagnostic.
>
> So for this test either I change the dg-error message or the call to
> builtin, otherwise it would fail.
Please update the dg-error message.
OK with the above change.
Thanks,
Uros.
>
> Uros Bizjak via Gcc-patches 于2022年4月15日周五 15:54写道：
> >
> > On Fri, Apr 15, 2022 at 6:30 AM Hongyu Wang wrote:
> > >
> > > Hi,
> > >
> > > Complile _mm_crc32_u8/16/32/64 intrinsics with -mcrc32
> > > would meet target specific option mismatch. Correct target pragma
> > > to fix.
> > >
> > > Bootstrapped/regtest on x86_64-pc-linux-gnu{-m32,}.
> > >
> > > Ok for master and backport to GCC 11?
> > >
> > > gcc/ChangeLog:
> > >
> > > * config/i386/smmintrin.h: Correct target pragma from sse4.1
> > > and sse4.2 to crc32 for crc32 intrinsics.
> > >
> > > gcc/testsuite/ChangeLog:
> > >
> > > * gcc.target/i386/crc32-6.c: Adjust to call builtin.
> > > * gcc.target/i386/crc32-7.c: New test.
> > > ---
> > > gcc/config/i386/smmintrin.h | 25 +-
> > > gcc/testsuite/gcc.target/i386/crc32-6.c | 2 +-
> > > gcc/testsuite/gcc.target/i386/crc32-7.c | 34 +
> > > 3 files changed, 42 insertions(+), 19 deletions(-)
> > > create mode 100644 gcc/testsuite/gcc.target/i386/crc32-7.c
> > >
> > > diff --git a/gcc/config/i386/smmintrin.h b/gcc/config/i386/smmintrin.h
> > > index b42b212300f..eb6a451c10a 100644
> > > --- a/gcc/config/i386/smmintrin.h
> > > +++ b/gcc/config/i386/smmintrin.h
> > > @@ -810,17 +810,11 @@ _mm_cmpgt_epi64 (__m128i __X, __m128i __Y)
> > >
> > > #include
> > >
> > > -#ifndef __SSE4_1__
> > > +#ifndef __CRC32__
> > > #pragma GCC push_options
> > > -#pragma GCC target("sse4.1")
> > > -#define __DISABLE_SSE4_1__
> > > -#endif /* __SSE4_1__ */
> > > -
> > > -#ifndef __SSE4_2__
> > > -#pragma GCC push_options
> > > -#pragma GCC target("sse4.2")
> > > -#define __DISABLE_SSE4_2__
> > > -#endif /* __SSE4_1__ */
> > > +#pragma GCC target("crc32")
> > > +#define __DISABLE_CRC32__
> > > +#endif /* __CRC32__ */
> > >
> > > /* Accumulate CRC32 (polynomial 0x11EDC6F41) value. */
> > > extern __inline unsigned int __attribute__((__gnu_inline__,
> > > __always_inline__, __artificial__))
> > > @@ -849,14 +843,9 @@ _mm_crc32_u64 (unsigned long long __C, unsigned long
> > > long __V)
> > > }
> > > #endif
> > >
> > > -#ifdef __DISABLE_SSE4_2__
> > > -#undef __DISABLE_SSE4_2__
> > > +#ifdef __DISABLE_CRC32__
> > > +#undef __DISABLE_CRC32__
> > > #pragma GCC pop_options
> > > -#endif /* __DISABLE_SSE4_2__ */
> > > -
> > > -#ifdef __DISABLE_SSE4_1__
> > > -#undef __DISABLE_SSE4_1__
> > > -#pragma GCC pop_options
> > > -#endif /* __DISABLE_SSE4_1__ */
> > > +#endif /* __DISABLE_CRC32__ */
> > >
> > > #endif /* _SMMINTRIN_H_INCLUDED */
> > > diff --git a/gcc/testsuite/gcc.target/i386/crc32-6.c
> > > b/gcc/testsuite/gcc.target/i386/crc32-6.c
> > > index 464e3444069..1f306534bb8 100644
> > > --- a/gcc/testsuite/gcc.target/i386/crc32-6.c
> > > +++ b/gcc/testsuite/gcc.target/i386/crc32-6.c
> > > @@ -7,7 +7,7 @@
> > > unsigned int
> > > test_mm_crc32_u8 (unsigned int CRC, unsigned char V)
> > > {
> > > - return _mm_crc32_u8 (CRC, V);
> > > + return __builtin_ia32_crc32qi (CRC, V);
> >
> > This test should not be changed, it correctly reports ISA mismatch. It
> > even passes -mno-crc32.
> >
> > Uros.
> >
> > > }
> > >
> > > /* { dg-error "needs isa option -mcrc32" "" { target *-*-* } 0 } */
> > > diff --git a/gcc/testsuite/gcc.target/i386/crc32-7.c
> > > b/gcc/testsuite/gcc.target/i386/crc32-7.c
> > > new file mode 100644
> > > index 000..2e310e38b82
> > > --- /dev/null
> > > +++ b/gcc/testsuite/gcc.target/i386/crc32-7.c
> > > @@ -0,0 +1,34 @@
> > > +/* { dg-do compile } */
> > > +/* { dg-options "-O2 -mcrc32" } */
> > > +/* { dg-final { scan-assembler "crc32b\[^\\n\]*eax" } } */
> > > +/* { dg-final { scan-assembler "crc32w\[^\\n\]*eax" } } */
> > > +/* { dg-final { scan-assembler "crc32l\[^\\n\]*eax" } } */
> > > +/* { dg-final { scan-assembler "crc32q\[^\\n\]*rax" { target { ! ia32 }
> > > } } } */
> > > +
> > > +#include
> > > +
> > > +unsigned int
> > > +test_mm_crc32_u8 (unsigned int CRC, unsigned char V)
> > > +{
> > > + return _mm_crc32_u8 (CRC, V);
> > > +}
> > > +
> > > +unsigned int
> > > +test_mm_crc32_u16 (unsigned int CRC, unsigned short V)
> > > +{
> > > + return _mm_crc32_u16 (CRC, V);
> > > +}
> > > +
> > > +unsigned int
> > > +test_mm_crc32_u32 (unsigned int CRC, unsigned int V)
> > > +{
> > > + return _mm_crc32_u32 (CRC, V);
> > > +}
> > > +
> > > +#ifdef __x86_64__
> > > +unsigned long long
> > > +test_mm_crc32_u64 (unsign
Re: [wwwdocs] Add Ada's changelog entry
Am Wed, 13 Apr 2022 23:04:17 -0600 (MDT) schrieb "Gerald Pfeifer" : > On Wed, 13 Apr 2022, Gerald Pfeifer wrote: > > This is the first batch of fixes. Pushed. > > Hmm, there is one issue that confused me a bit. What did you want to > relay by the following? > >+Pattern matching >+ >+ The case statement has been extended to > cover > > Currently that is a within a , which does not work. Did you > mean to skip the and have that after the nested ? > > Gerald Hi Gerald, thank you for your comments. As you have picked up, HTML is not my strongest language. I did not know that "<" and ">" had to scaped in HTML, I will try to remember that. Regarding the nested . Since I did not know HTML, I looked at how nested structure/lists are generated. Since the changelog uses sequences of and to indent/create a nested list, so I did. I wanted to have a "title" (Pattern matching) and then have the explanation with the code. Therefore, I copied the , sequence to get another level of nesting. I checked my results by opening the file in Firefox (latest version) and it renders properly as I would expect/as I just explained. Is this not correct? Is Firefox trying to make it work/trying to understand what I meant and reproducing it as such? Thank you for your feedback. Regards, Fer
[PATCH] PR target/89125
Can someone, anyone, please commit the attach patch, which is
also attached to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89125
where one can read the audit trail. The original patch was
submitted 2 years ago, and required manual intervention due to
the recent *.c to *.cc rename.
Back story: When GCC is configured and built on non-glibc platforms,
it seems very little to no effort is made to enumerate the available
C99 libm functions. It is all or nothing for C99 libm. The patch
introduces a new function, used on only FreeBSD, to inform gcc that
it has C99 libm functions (minus a few which clearly GCC does not check
nor test).
The patch introduces no regression on x86_64-*-freebsd while
allowing an additional 31 new passes.
=== gcc Summary ===
w/o patch w patch
# of expected passes175405 175434
# of unexpected failures1081 1051
# of unexpected successes 20 20
# of expected failures 1459 1459
# of unresolved testcases 10 10
# of unsupported tests 3252 3252
=== g++ Summary ===
w/o patch w patch
# of expected passes225338 225341
# of unexpected failures678676
# of expected failures 2071 2071
# of unresolved testcases 11 11
# of unsupported tests 10353 10353
=== gfortran Summary ===
w/o patch w patch
# of expected passes65901 65901
# of unexpected failures12 12
# of expected failures 272272
# of unsupported tests 100100
2022-04-15 Steven G. Kargl
PR target/89125
* config/freebsd.h: Define TARGET_LIBC_HAS_FUNCTION to be
bsd_libc_has_function.
* gcc/targhooks.cc(bsd_libc_has_function): New function.
Expand the supported math functions to inclue C99 libm.
* gcc/targhooks.h: Prototype for bsd_libc_has_function.
--
Steve
diff --git a/gcc/config/freebsd.h b/gcc/config/freebsd.h
index 28ebcad88d4..d89ee7dfc97 100644
--- a/gcc/config/freebsd.h
+++ b/gcc/config/freebsd.h
@@ -55,7 +55,7 @@ along with GCC; see the file COPYING3. If not see
#endif
#undef TARGET_LIBC_HAS_FUNCTION
-#define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function
+#define TARGET_LIBC_HAS_FUNCTION bsd_libc_has_function
/* Use --as-needed -lgcc_s for eh support. */
#ifdef HAVE_LD_AS_NEEDED
diff --git a/gcc/targhooks.cc b/gcc/targhooks.cc
index e22bc66a6c8..ff127763cf2 100644
--- a/gcc/targhooks.cc
+++ b/gcc/targhooks.cc
@@ -1843,6 +1843,20 @@ no_c99_libc_has_function (enum function_class fn_class ATTRIBUTE_UNUSED,
return false;
}
+/* Assume some c99 functions are present at the runtime including sincos. */
+bool
+bsd_libc_has_function (enum function_class fn_class,
+ tree type ATTRIBUTE_UNUSED)
+{
+ if (fn_class == function_c94
+ || fn_class == function_c99_misc
+ || fn_class == function_sincos)
+return true;
+
+ return false;
+}
+
+
tree
default_builtin_tm_load_store (tree ARG_UNUSED (type))
{
diff --git a/gcc/targhooks.h b/gcc/targhooks.h
index ecfa11287ef..ecce55ebe79 100644
--- a/gcc/targhooks.h
+++ b/gcc/targhooks.h
@@ -212,6 +212,7 @@ extern bool default_libc_has_function (enum function_class, tree);
extern bool default_libc_has_fast_function (int fcode);
extern bool no_c99_libc_has_function (enum function_class, tree);
extern bool gnu_libc_has_function (enum function_class, tree);
+extern bool bsd_libc_has_function (enum function_class, tree);
extern tree default_builtin_tm_load_store (tree);
Re: [PATCH] testsuite: Skip pr105250.c for powerpc and s390 [PR105266]
On Thu, Apr 14, 2022 at 11:10:43AM +0800, Kewen.Lin wrote:
> Hi,
>
> The test case pr105250.c is like its related pr105140.c, which
> suffers the error with message like "{AltiVec,vector} argument
> passed to unprototyped" on powerpc and s390. So like commits
> r12-8025 and r12-8039, this fix is to add the dg-skip-if for
> powerpc*-*-* and s390*-*-*.
>
> Tested on powerpc64le-linux-gnu P9 and it should work on s390
> as its similar PR105147.
>
> Is it ok for trunk?
Yes. Thanks!
Segher
Re: [PATCH] libstdc++: Avoid double-deref of __first in ranges::minmax [PR104858]
On Thu, 14 Apr 2022, Jonathan Wakely wrote:
> On Thu, 14 Apr 2022 at 16:21, Patrick Palka via Libstdc++
> wrote:
> >
> > Tested on x86_64-pc-linux-gnu, does this look OK for trunk and 11/10
> > once the branch is unfrozen?
> >
> > PR libstdc++/104858
> >
> > libstdc++-v3/ChangeLog:
> >
> > * include/bits/ranges_algo.h (__minmax_fn): Avoid dereferencing
> > __first twice at the start.
> > * testsuite/25_algorithms/minmax/constrained.cc (test06): New test.
> > ---
> > libstdc++-v3/include/bits/ranges_algo.h | 2 +-
> > .../25_algorithms/minmax/constrained.cc | 23 +++
> > 2 files changed, 24 insertions(+), 1 deletion(-)
> >
> > diff --git a/libstdc++-v3/include/bits/ranges_algo.h
> > b/libstdc++-v3/include/bits/ranges_algo.h
> > index 62dc605080a..3d30fb1428c 100644
> > --- a/libstdc++-v3/include/bits/ranges_algo.h
> > +++ b/libstdc++-v3/include/bits/ranges_algo.h
> > @@ -3084,7 +3084,7 @@ namespace ranges
> > auto __last = ranges::end(__r);
> > __glibcxx_assert(__first != __last);
> > auto __comp_proj = __detail::__make_comp_proj(__comp, __proj);
> > - minmax_result> __result = {*__first,
> > *__first};
> > + minmax_result> __result = {*__first,
> > __result.min};
>
> Clever ... I'm surprised this even works. I would have expected it to
> evaluate both initializers before actually initializing the members.
> TIL.
Indeed, it seems to do the right thing, practically speaking at least :)
FWIW the alternative approach
- minmax_result> __result = {*__first, *__first};
+ minmax_result> __result;
+ __result.max = __result.min = *__first;
wouldn't be right because the value type is not necessarily default
constructible. I beefed up the new testcase to verify we don't demand
default constructibility here.
Go patch commited: Fix initialization ordering
compiler: revert `for package-scope "a = b; b = x" just set "a = x"`
This patch to the Go frontend reverts https://go.dev/cl/245098, which
introduced incorrect initialization ordering. This patch adjusts the
runtime package to work even with that change reverted.
Original description of change 245098:
This avoids requiring an init function to initialize the variable.
This can only be done if x is a static initializer.
The go1.15rc1 runtime package relies on this optimization.
The package has a variable "var maxSearchAddr = maxOffAddr".
The maxSearchAddr variable is used by code that runs before package
initialization is complete.
This is for https://golang.org/issue/51913.
Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed
to mainline.
Ian
5d6db440fd8ec4089fba83760874d70f449037a6
diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE
index 75ee2e3aaca..bcb526c85b9 100644
--- a/gcc/go/gofrontend/MERGE
+++ b/gcc/go/gofrontend/MERGE
@@ -1,4 +1,4 @@
-323ab0e6fab89978bdbd83dca9c2ad9c5dcd690f
+62fc90f52da2f52cbe3b4f10e560dc6aa59baeb5
The first line of this file holds the git revision number of the last
merge done from the gofrontend repository.
diff --git a/gcc/go/gofrontend/gogo.cc b/gcc/go/gofrontend/gogo.cc
index 30d5c9fcb0b..d35c6baf582 100644
--- a/gcc/go/gofrontend/gogo.cc
+++ b/gcc/go/gofrontend/gogo.cc
@@ -1612,31 +1612,16 @@ Gogo::write_globals()
// The initializer is constant if it is the zero-value of the
// variable's type or if the initial value is an immutable value
// that is not copied to the heap.
- Expression* init = var->init();
-
- // If we see "a = b; b = x", and x is a static
- // initializer, just set a to x.
- while (init != NULL && init->var_expression() != NULL)
- {
- Named_object* ino = init->var_expression()->named_object();
- if (!ino->is_variable() || ino->package() != NULL)
- break;
- Expression* ino_init = ino->var_value()->init();
- if (ino->var_value()->has_pre_init()
- || ino_init == NULL
- || !ino_init->is_static_initializer())
- break;
- init = ino_init;
- }
-
- bool is_static_initializer;
- if (init == NULL)
+ bool is_static_initializer = false;
+ if (var->init() == NULL)
is_static_initializer = true;
else
{
Type* var_type = var->type();
- init = Expression::make_cast(var_type, init,
var->location());
- is_static_initializer = init->is_static_initializer();
+ Expression* init = var->init();
+ Expression* init_cast =
+ Expression::make_cast(var_type, init, var->location());
+ is_static_initializer = init_cast->is_static_initializer();
}
// Non-constant variable initializations might need to create
@@ -1655,15 +1640,7 @@ Gogo::write_globals()
}
var_init_fn = init_fndecl;
}
-
- Bexpression* var_binit;
- if (init == NULL)
- var_binit = NULL;
- else
- {
- Translate_context context(this, var_init_fn, NULL, NULL);
- var_binit = init->get_backend(&context);
- }
+ Bexpression* var_binit = var->get_init(this, var_init_fn);
if (var_binit == NULL)
;
diff --git a/libgo/go/runtime/mpagealloc.go b/libgo/go/runtime/mpagealloc.go
index 2725e3b7c7b..5e40da45d17 100644
--- a/libgo/go/runtime/mpagealloc.go
+++ b/libgo/go/runtime/mpagealloc.go
@@ -87,7 +87,9 @@ const (
//
// We alias maxOffAddr just to make it clear that this is the maximum address
// for the page allocator's search space. See maxOffAddr for details.
-var maxSearchAddr = maxOffAddr
+func maxSearchAddr() offAddr {
+ return maxOffAddr
+}
// Global chunk index.
//
@@ -331,13 +333,13 @@ func (p *pageAlloc) init(mheapLock *mutex, sysStat
*sysMemStat) {
p.sysInit()
// Start with the searchAddr in a state indicating there's no free
memory.
- p.searchAddr = maxSearchAddr
+ p.searchAddr = maxSearchAddr()
// Set the mheapLock.
p.mheapLock = mheapLock
// Initialize scavenge tracking state.
- p.scav.scavLWM = maxSearchAddr
+ p.scav.scavLWM = maxSearchAddr()
}
// tryChunkOf returns the bitmap data for the given chunk.
@@ -760,7 +762,7 @@ nextLevel:
}
if l == 0 {
// We're at level zero, so that means we've exhausted
our search.
- return 0, maxSearchAddr
+ return
