Re: [PATCH 0/4] Eliminate cc0 from m68k

[Andreas Schwab]

On Nov 16 2019, Bernd Schmidt wrote:

> Well, there has to be some difference between what you are doing and
> what I am doing, because:
>
> Running /local/src/egcs/git/gcc/testsuite/g++.old-deja/old-deja.exp ...
>
>   === g++ Summary ===
>
> # of expected passes  26826
> # of expected failures82
> # of unsupported tests157
> /local/src/egcs/bm68k-test/gcc/xg++  version 10.0.0 20191101
> (experimental) (GCC)

=== g++ Summary ===

# of expected passes170041
# of unexpected failures74
# of expected failures  708
# of unresolved testcases   2
# of unsupported tests  7419
/daten/aranym/gcc/gcc-20191115/Build/gcc/xg++  version 10.0.0 20191114 
(experimental) [trunk revision 278266] (GCC) 

Andreas.

-- 
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

Record leader nodes in the SLP graph (PR92516)

[Richard Sandiford]

If stmt analysis failed for an SLP node, r278246 tried building the
node from scalars instead.  By that point we've already processed child
nodes (usually successfully) and might have made some of them the lead
nodes for their stmt list.  This is why we couldn't free the child nodes
when deciding to build from scalars:

  /* Don't remove and free the child nodes here, since they could be
 referenced by other structures.  The analysis and scheduling phases
 (need to) ignore child nodes of anything that isn't vect_internal_def.  */

The problem in this PR is that we (correctly) don't process the unused
child nodes again during the scheduling phase, which means that those
nodes won't become the leader again.  So some other node with same stmts
becomes the leader instead.  However, any internal-def child nodes of
this new leader won't have been processed during the analysis phase,
because we also (correctly) skip child nodes of non-leader nodes.

We talked on IRC about fixing this by sharing nodes between SLP
instances, so that it becomes a "proper" graph.  But that seems
like it could throw up some problems too, so I wanted to fix the
PR in a less invasive way first.

This patch therefore records the leader nodes during the analysis
phase and reuses that choice during scheduling.  When scheduling
a non-leader node, we first try to schedule the leader node and
then reuse its vector stmts.  At the moment, doing this means we
need to know the leader node's SLP instance, so the patch records
that in the SLP node too.

While there, I noticed that the two-operation handling returned
early without restoring the original def types.  That's really
an independent bug fix.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.  OK to install?

Richard


2019-11-16  Richard Sandiford  

gcc/
PR tree-optimization/92516
* tree-vectorizer.h (_slp_tree::leader): New member variable.
(_slp_tree::leader_instance): Likewise.
* tree-vect-slp.c (vect_create_new_slp_node): Initialize them.
(vect_slp_analyze_node_operations): When deferring to an existing
leader, record that leader in the SLP node.
(vect_slp_analyze_operations): When committing to keeping an
SLP instance, record that leaders in it are themselves leaderless.
Also record the SLP instance we should use to vectorize them.
(vect_schedule_slp_instance): Remove the bst_map parameter.
If the node has a leader, vectorize that first and reuse
its vector stmts.  Restore stmt def types for two-operation SLP.
(vect_schedule_slp): Update call accordingly, removing the bst_map.

gcc/testsuite/
* g++.dg/vect/slp-pr92516.cc: New test.

Index: gcc/tree-vectorizer.h
===
--- gcc/tree-vectorizer.h   2019-11-14 15:14:29.239572543 +
+++ gcc/tree-vectorizer.h   2019-11-16 08:22:50.620257693 +
@@ -128,6 +128,11 @@ struct _slp_tree {
   vec load_permutation;
   /* Vectorized stmt/s.  */
   vec vec_stmts;
+  /* If non-null, the leader node that provides the vectorized stmts.  */
+  _slp_tree *leader;
+  /* If the node is a leader node, this is the slp_instance to use when
+ vectorizing it.  */
+  class _slp_instance *leader_instance;
   /* Number of vector stmts that are created to replace the group of scalar
  stmts. It is calculated during the transformation phase as the number of
  scalar elements in one scalar iteration (GROUP_SIZE) multiplied by VF
Index: gcc/tree-vect-slp.c
===
--- gcc/tree-vect-slp.c 2019-11-14 15:33:43.503740636 +
+++ gcc/tree-vect-slp.c 2019-11-16 08:22:50.612257749 +
@@ -129,6 +129,8 @@ vect_create_new_slp_node (vecleader = NULL;
+  node->leader_instance = NULL;
   node->refcnt = 1;
   node->max_nunits = 1;
 
@@ -155,6 +157,8 @@ vect_create_new_slp_node (vec ops)
   SLP_TREE_LOAD_PERMUTATION (node) = vNULL;
   SLP_TREE_TWO_OPERATORS (node) = false;
   SLP_TREE_DEF_TYPE (node) = vect_external_def;
+  node->leader = NULL;
+  node->leader_instance = NULL;
   node->refcnt = 1;
   node->max_nunits = 1;
 
@@ -2764,6 +2768,7 @@ vect_slp_analyze_node_operations (vec_in
   if ((leader = visited->get (SLP_TREE_SCALAR_STMTS (node)))
   || (leader = lvisited->get (SLP_TREE_SCALAR_STMTS (node
 {
+  node->leader = *leader;
   SLP_TREE_NUMBER_OF_VEC_STMTS (node)
= SLP_TREE_NUMBER_OF_VEC_STMTS (*leader);
   /* Cope with cases in which we made a late decision to build the
@@ -2878,7 +2883,11 @@ vect_slp_analyze_operations (vec_info *v
{
  for (scalar_stmts_to_slp_tree_map_t::iterator x = lvisited.begin();
   x != lvisited.end(); ++x)
-   visited->put ((*x).first.copy (), (*x).second);
+   {
+ visited->put ((*x).first.copy (), (*x).second);
+ (*x).second->leader = NULL;
+ (*x).second->leader_instan

Fix uncached nonspec_time in inliner

[Jan Hubicka]

Hi,
this patch fixes quite embarasing and aged bug that
do_estimate_edge_time does not return correct nonspec_time first time it
is executed (when value is not in cache).  This does not really have
effect on generated code because inliner computes the value twice but it
does increase fibonaci heap overhead because priorities are calculated
wrong first time around.

Bootstrapped/regtested x86_64-linux, comitted.

Honza

* ipa-inline.h (do_estimate_edge_time): Add nonspec_time
parameter.
(estimate_edge_time): Use it.
* ipa-inine-analysis.c (do_estimate_edge_time): Add
ret_nonspec_time parameter.
Index: ipa-inline.h
===
--- ipa-inline.h(revision 278306)
+++ ipa-inline.h(working copy)
@@ -46,7 +46,7 @@ int estimate_size_after_inlining (struct
 int estimate_growth (struct cgraph_node *);
 bool growth_positive_p (struct cgraph_node *, struct cgraph_edge *, int);
 int do_estimate_edge_size (struct cgraph_edge *edge);
-sreal do_estimate_edge_time (struct cgraph_edge *edge);
+sreal do_estimate_edge_time (struct cgraph_edge *edge, sreal *nonspec_time = 
NULL);
 ipa_hints do_estimate_edge_hints (struct cgraph_edge *edge);
 void reset_node_cache (struct cgraph_node *node);
 void initialize_growth_caches ();
@@ -99,7 +99,7 @@ estimate_edge_time (struct cgraph_edge *
   if (edge_growth_cache == NULL
   || (entry = edge_growth_cache->get (edge)) == NULL
   || entry->time == 0)
-return do_estimate_edge_time (edge);
+return do_estimate_edge_time (edge, nonspec_time);
   if (nonspec_time)
 *nonspec_time = edge_growth_cache->get (edge)->nonspec_time;
   return entry->time;
Index: ipa-inline-analysis.c
===
--- ipa-inline-analysis.c   (revision 278306)
+++ ipa-inline-analysis.c   (working copy)
@@ -179,7 +179,7 @@ simple_edge_hints (struct cgraph_edge *e
size, since we always need both metrics eventually.  */
 
 sreal
-do_estimate_edge_time (struct cgraph_edge *edge)
+do_estimate_edge_time (struct cgraph_edge *edge, sreal *ret_nonspec_time)
 {
   sreal time, nonspec_time;
   int size;
@@ -275,6 +275,8 @@ do_estimate_edge_time (struct cgraph_edg
   hints |= simple_edge_hints (edge);
   entry->hints = hints + 1;
 }
+  if (ret_nonspec_time)
+*ret_nonspec_time = nonspec_time;
   return time;
 }
 

Re: Ping*2: [PATCH v5] Missed function specialization + partial devirtualization

[luoxhu]

Hi Thanks,

On 2019/11/14 17:04, Jan Hubicka wrote:
>>  PR ipa/69678
>>  * cgraph.c (symbol_table::create_edge): Init speculative_id.
>>  (cgraph_edge::make_speculative): Add param for setting speculative_id.
>>  (cgraph_edge::speculative_call_info): Find reference by
>>  speculative_id for multiple indirect targets.
>>  (cgraph_edge::resolve_speculation): Decrease the speculations
>>  for indirect edge, drop it's speculative if not direct target
>>  left.
>>  (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
>>  (cgraph_node::verify_node): Don't report error if speculative
>>  edge not include statement.
>>  (cgraph_edge::has_multiple_indirect_call_p): New function.
>>  (cgraph_edge::has_indirect_call_p): New function.
>>  * cgraph.h (struct indirect_target_info): New struct.
>>  (indirect_call_targets): New vector variable.
>>  (make_speculative): Add param for setting speculative_id.
>>  (cgraph_edge::has_multiple_indirect_call_p): New declare.
>>  (cgraph_edge::has_indirect_call_p): New declare.
>>  (speculative_id): New variable.
>>  * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
>>  * cgraphunit.c: Fix comments typo.
>>  * ipa-comdats.c: Fix comments typo.
>>  * ipa-inline.c (inline_small_functions): Fix iterator update.
>>  * ipa-profile.c (ipa_profile_generate_summary): Add indirect
>>  multiple targets logic.
>>  (ipa_profile): Likewise.
>>  * ipa-ref.h (speculative_id): New variable.
>>  * ipa.c (process_references): Fix typo.
>>  * lto-cgraph.c (lto_output_edge): Add indirect multiple targets
>>  logic.  Stream out speculative_id.
>>  (input_edge): Likewise.
>>  * predict.c (dump_prediction): Revome edges count assert to be
>>  precise.
>>  * symtab.c (symtab_node::create_reference): Init speculative_id.
>>  (symtab_node::clone_references): Clone speculative_id.
>>  (symtab_node::clone_referring): Clone speculative_id.
>>  (symtab_node::clone_reference): Clone speculative_id.
>>  (symtab_node::clear_stmts_in_references): Clear speculative_id.
>>  * tree-inline.c (copy_bb): Duplicate all the speculative edges
>>  if indirect call contains multiple speculative targets.
>>  * tree-profile.c (gimple_gen_ic_profiler): Use the new variable
>>  __gcov_indirect_call.counters and __gcov_indirect_call.callee.
>>  (gimple_gen_ic_func_profiler): Likewise.
>>  (pass_ipa_tree_profile::gate): Fix comment typos.
>>  * value-prof.h  (check_ic_target): Remove.
>>  * value-prof.c  (gimple_value_profile_transformations):
>>  Use void function gimple_ic_transform.
>>  * value-prof.c  (gimple_ic_transform): Handle topn case.
>>  Fix comment typos.  Change it to a void function.
>>
>> gcc/testsuite/ChangeLog
>>
>>  2019-11-14  Xiong Hu Luo  
>>
>>  PR ipa/69678
>>  * gcc.dg/tree-prof/indir-call-prof-topn.c: New testcase.
>>  * gcc.dg/tree-prof/crossmodule-indir-call-topn-1.c: New testcase.
>>  * gcc.dg/tree-prof/crossmodule-indir-call-topn-1a.c: New testcase.
>>  * gcc.dg/tree-prof/crossmodule-indir-call-topn-2.c: New testcase.
>>  * lib/scandump.exp: Dump executable file name.
>>  * lib/scanwpaipa.exp: New scan-pgo-wap-ipa-dump.
>> @@ -1089,6 +1093,38 @@ cgraph_edge::make_speculative (cgraph_node *n2, 
>> profile_count direct_count)
>>  call) and if one of them exists, all of them must exist.
>>   
>>  Given speculative call edge, return all three components.
>> +
>> +   For some indirect edge, it may maps to multiple direct edges, i.e.  1:N.
>> +   check the speculative_id to return all the three components for specified
>> +   direct edge or indirect edge.
>> +   If input is indirect, caller of this function will get the direct edge 
>> one by
>> +   one, get_edge will just return one of the direct edge mapped to the 
>> indirect
>> +   edge, the returned direct edge will be resolved or redirected by the 
>> caller,
>> +   then number of indirect calls (speculations) is deceased in each access.
>> +   If input is direct, this function will get the indirect edge and 
>> reference
>> +   with matched speculative_id, the returned edge will also be resolved or
>> +   redirected, decrease the speculations accordingly.
>> +   Speculations of indirect edge will be dropped only if all direct edges
>> +   be handled.
>> +
>> +   e.g.  for indirect edge E statement "call call_dest":
>> +
>> +   Redirect N3 after redirected N2:
>> +
>> +   if (call_dest == N2)
>> + n2 ();
>> +   else if (call_dest == N3)
>> + n3 ();
>> +   else
>> + call call_dest
>> +
>> +   Resolve N3 and only redirect N2:
>> +
>> +   if (call_dest == N2)
>> + n2 ();
>> +   else
>> + call call_dest
>> +
> 
> I find this comment hard to read. Reader probably does not know what
> speculative edges are and we only want to describe speculative_call_info
> function not also the way we 

Re: [PATCH 0/4] Eliminate cc0 from m68k

[Andreas Schwab]

Running /daten/aranym/gcc/gcc-20191116/gcc/testsuite/g++.old-deja/old-deja.exp 
...
FAIL: g++.old-deja/g++.other/dyncast1.C  -std=c++98 execution test
FAIL: g++.old-deja/g++.other/dyncast1.C  -std=c++14 execution test
FAIL: g++.old-deja/g++.other/dyncast1.C  -std=c++17 execution test
FAIL: g++.old-deja/g++.other/dyncast1.C  -std=c++2a execution test
FAIL: g++.old-deja/g++.other/dyncast6.C  -std=gnu++98 execution test
FAIL: g++.old-deja/g++.other/dyncast6.C  -std=gnu++14 execution test
FAIL: g++.old-deja/g++.other/dyncast6.C  -std=gnu++17 execution test
FAIL: g++.old-deja/g++.other/dyncast6.C  -std=gnu++2a execution test
FAIL: g++.old-deja/g++.other/rttid3.C  -std=gnu++98 execution test
FAIL: g++.old-deja/g++.other/rttid3.C  -std=gnu++14 execution test
FAIL: g++.old-deja/g++.other/rttid3.C  -std=gnu++17 execution test
FAIL: g++.old-deja/g++.other/rttid3.C  -std=gnu++2a execution test
FAIL: g++.old-deja/g++.robertl/eb46.C  -std=c++98 execution test
FAIL: g++.old-deja/g++.robertl/eb46.C  -std=c++14 execution test
FAIL: g++.old-deja/g++.robertl/eb46.C  -std=c++17 execution test
FAIL: g++.old-deja/g++.robertl/eb46.C  -std=c++2a execution test

=== g++ Summary ===

# of expected passes26803
# of unexpected failures16
# of expected failures  82
# of unsupported tests  157
/daten/aranym/gcc/gcc-20191116/Build/gcc/xg++  version 10.0.0 20191115 
(experimental) [trunk revision 278320] (GCC)

Andreas.

-- 
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

[committed][AArch64] Enable VECT_COMPARE_COSTS by default for SVE

[Richard Sandiford]

This patch enables VECT_COMPARE_COSTS by default for SVE, both so
that we can compare SVE against Advanced SIMD and so that (with future
patches) we can compare multiple SVE vectorisation approaches against
each other.  It also adds a target-specific --param to control this.

It only became possible to have target-specific --params after Martin's
patches earlier in the week (thanks!).  Since this is the first one,
it looks like a bit of an odd-one-out.  But I think the list is going
to grow over time.  I certainly have other SVE-related things I'd like
to put behind a --param in future.

Tested on aarch64-linux-gnu and applied as r278337.

Richard


2019-11-16  Richard Sandiford  

gcc/
* config/aarch64/aarch64.opt (--param=aarch64-sve-compare-costs):
New option.
* doc/invoke.texi: Document it.
* config/aarch64/aarch64.c (aarch64_autovectorize_vector_modes):
By default, return VECT_COMPARE_COSTS for SVE.

gcc/testsuite/
* gcc.target/aarch64/sve/reduc_3.c: Split multi-vector cases out
into...
* gcc.target/aarch64/sve/reduc_3_costly.c: ...this new test,
passing -fno-vect-cost-model for them.
* gcc.target/aarch64/sve/slp_6.c: Add -fno-vect-cost-model.
* gcc.target/aarch64/sve/slp_7.c,
* gcc.target/aarch64/sve/slp_7_run.c: Split multi-vector cases out
into...
* gcc.target/aarch64/sve/slp_7_costly.c,
* gcc.target/aarch64/sve/slp_7_costly_run.c: ...these new tests,
passing -fno-vect-cost-model for them.
* gcc.target/aarch64/sve/while_7.c: Add -fno-vect-cost-model.
* gcc.target/aarch64/sve/while_9.c: Likewise.

Index: gcc/config/aarch64/aarch64.opt
===
--- gcc/config/aarch64/aarch64.opt  2019-09-27 09:09:26.771844993 +0100
+++ gcc/config/aarch64/aarch64.opt  2019-11-16 10:42:55.025462691 +
@@ -258,3 +258,7 @@ long aarch64_stack_protector_guard_offse
 moutline-atomics
 Target Report Mask(OUTLINE_ATOMICS) Save
 Generate local calls to out-of-line atomic operations.
+
+-param=aarch64-sve-compare-costs=
+Target Joined UInteger Var(aarch64_sve_compare_costs) Init(1) IntegerRange(0, 
1) Param
+When vectorizing for SVE, consider using unpacked vectors for smaller elements 
and use the cost model to pick the cheapest approach.  Also use the cost model 
to choose between SVE and Advanced SIMD vectorization.
Index: gcc/doc/invoke.texi
===
--- gcc/doc/invoke.texi 2019-11-14 14:34:25.707796466 +
+++ gcc/doc/invoke.texi 2019-11-16 10:42:55.033462635 +
@@ -11179,8 +11179,8 @@ without notice in future releases.
 In order to get minimal, maximal and default value of a parameter,
 one can use @option{--help=param -Q} options.
 
-In each case, the @var{value} is an integer.  The allowable choices for
-@var{name} are:
+In each case, the @var{value} is an integer.  The following choices
+of @var{name} are recognized for all targets:
 
 @table @gcctabopt
 @item predictable-branch-outcome
@@ -12396,6 +12396,20 @@ statements or when determining their val
 diagnostics.
 
 @end table
+
+The following choices of @var{name} are available on AArch64 targets:
+
+@table @gcctabopt
+@item aarch64-sve-compare-costs
+When vectorizing for SVE, consider using ``unpacked'' vectors for
+smaller elements and use the cost model to pick the cheapest approach.
+Also use the cost model to choose between SVE and Advanced SIMD vectorization.
+
+Using unpacked vectors includes storing smaller elements in larger
+containers and accessing elements with extending loads and truncating
+stores.
+@end table
+
 @end table
 
 @node Instrumentation Options
Index: gcc/config/aarch64/aarch64.c
===
--- gcc/config/aarch64/aarch64.c2019-11-16 10:40:08.402638818 +
+++ gcc/config/aarch64/aarch64.c2019-11-16 10:42:55.025462691 +
@@ -15962,7 +15962,15 @@ aarch64_autovectorize_vector_modes (vect
  for this case.  */
   modes->safe_push (V2SImode);
 
-  return 0;
+  unsigned int flags = 0;
+  /* Consider enabling VECT_COMPARE_COSTS for SVE, both so that we
+ can compare SVE against Advanced SIMD and so that we can compare
+ multiple SVE vectorization approaches against each other.  There's
+ not really any point doing this for Advanced SIMD only, since the
+ first mode that works should always be the best.  */
+  if (TARGET_SVE && aarch64_sve_compare_costs)
+flags |= VECT_COMPARE_COSTS;
+  return flags;
 }
 
 /* Implement TARGET_MANGLE_TYPE.  */
Index: gcc/testsuite/gcc.target/aarch64/sve/reduc_3.c
===
--- gcc/testsuite/gcc.target/aarch64/sve/reduc_3.c  2019-11-06 
12:28:21.0 +
+++ gcc/testsuite/gcc.target/aarch64/sve/reduc_3.c  2019-11-16 
10:42:55.033462635 +
@@ -17,7 +17,6 @@ void reduc_ptr_

Re: Support C2x [[]] attributes for C

[Iain Sandoe]

Joseph Myers  wrote:

> This patch adds support for the C2x [[]] attribute syntax to the C
> front end.  

>   gcc.dg/gnu2x-attrs-1.c: New tests.

This test fails on targets without symbol alias support, but it would
be most unfortunate to skip it entirely with the usual dg-requires.

In this instance, I propose to expect the error for Darwin as per the patch
below, but open to other suggestions, if you prefer something different.

OK / something else?

thanks
Iain

gcc/testsuite/ChangeLog:

2019-11-16  Iain Sandoe  

* gcc.dg/gnu2x-attrs-1.c: Expect the alias case to produce
an error on Darwin platforms.


diff --git a/gcc/testsuite/gcc.dg/gnu2x-attrs-1.c 
b/gcc/testsuite/gcc.dg/gnu2x-attrs-1.c
index df22fb3..fe7e95b 100644
--- a/gcc/testsuite/gcc.dg/gnu2x-attrs-1.c
+++ b/gcc/testsuite/gcc.dg/gnu2x-attrs-1.c
@@ -5,7 +5,7 @@
 
 void f (void) {};
 
-[[gnu::alias("f")]] void g (void);
+[[gnu::alias("f")]] void g (void); /* { dg-error "only weak" *-*-darwin* } */
 
 void [[gnu::alias("f")]] h (void); /* { dg-warning "ignored" } */
 /* { dg-message "that appertains to a type-specifier" "appertains" { target 
*-*-* } .-1 } */

[committed][AArch64] Replace SVE_PARTIAL with SVE_PARTIAL_I

[Richard Sandiford]

Another renaming, this time to make way for partial/unpacked
float modes.

Tested on aarch64-linux-gnu and applied as r278339.

Richard


2019-11-16  Richard Sandiford  

gcc/
* config/aarch64/iterators.md (SVE_PARTIAL): Rename to...
(SVE_PARTIAL_I): ...this.
* config/aarch64/aarch64-sve.md: Apply the above renaming throughout.

Index: gcc/config/aarch64/iterators.md
===
--- gcc/config/aarch64/iterators.md 2019-11-16 10:50:39.014190116 +
+++ gcc/config/aarch64/iterators.md 2019-11-16 10:52:49.537270154 +
@@ -339,10 +339,10 @@ (define_mode_iterator SVE_FULL_S [VNx4SI
 ;; Fully-packed SVE vector modes that have 64-bit elements.
 (define_mode_iterator SVE_FULL_D [VNx2DI VNx2DF])
 
-;; All partial SVE modes.
-(define_mode_iterator SVE_PARTIAL [VNx2QI
-  VNx4QI VNx2HI
-  VNx8QI VNx4HI VNx2SI])
+;; All partial SVE integer modes.
+(define_mode_iterator SVE_PARTIAL_I [VNx8QI VNx4QI VNx2QI
+VNx4HI VNx2HI
+VNx2SI])
 
 ;; Modes involved in extending or truncating SVE data, for 8 elements per
 ;; 128-bit block.
Index: gcc/config/aarch64/aarch64-sve.md
===
--- gcc/config/aarch64/aarch64-sve.md   2019-11-16 10:50:39.014190116 +
+++ gcc/config/aarch64/aarch64-sve.md   2019-11-16 10:52:49.537270154 +
@@ -2818,33 +2818,33 @@ (define_insn "@cond_"
 ;; -
 
 ;; Predicated SXT[BHW].
-(define_insn "@aarch64_pred_sxt"
+(define_insn "@aarch64_pred_sxt"
   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w")
(unspec:SVE_FULL_HSDI
  [(match_operand: 1 "register_operand" "Upl")
   (sign_extend:SVE_FULL_HSDI
-(truncate:SVE_PARTIAL
+(truncate:SVE_PARTIAL_I
   (match_operand:SVE_FULL_HSDI 2 "register_operand" "w")))]
  UNSPEC_PRED_X))]
   "TARGET_SVE && (~ & ) == 0"
-  "sxt\t%0., %1/m, 
%2."
+  "sxt\t%0., %1/m, 
%2."
 )
 
 ;; Predicated SXT[BHW] with merging.
-(define_insn "@aarch64_cond_sxt"
+(define_insn "@aarch64_cond_sxt"
   [(set (match_operand:SVE_FULL_HSDI 0 "register_operand" "=w, ?&w, ?&w")
(unspec:SVE_FULL_HSDI
  [(match_operand: 1 "register_operand" "Upl, Upl, Upl")
   (sign_extend:SVE_FULL_HSDI
-(truncate:SVE_PARTIAL
+(truncate:SVE_PARTIAL_I
   (match_operand:SVE_FULL_HSDI 2 "register_operand" "w, w, w")))
   (match_operand:SVE_FULL_HSDI 3 "aarch64_simd_reg_or_zero" "0, Dz, 
w")]
  UNSPEC_SEL))]
   "TARGET_SVE && (~ & ) == 0"
   "@
-   sxt\t%0., %1/m, 
%2.
-   movprfx\t%0., %1/z, 
%2.\;sxt\t%0., 
%1/m, %2.
-   movprfx\t%0, %3\;sxt\t%0., %1/m, 
%2."
+   sxt\t%0., %1/m, 
%2.
+   movprfx\t%0., %1/z, 
%2.\;sxt\t%0.,
 %1/m, %2.
+   movprfx\t%0, %3\;sxt\t%0., 
%1/m, %2."
   [(set_attr "movprfx" "*,yes,yes")]
 )
 

[committed][AArch64] Tweak gcc.target/aarch64/sve/clastb_8.c

[Richard Sandiford]

clastb_8.c was using scan-tree-dump-times to check for fully-masked
loops, which made it sensitive to the number of times we try to
vectorize.

Tested on aarch64-linux-gnu and applied as r278340.

Richard


2019-11-16  Richard Sandiford  

gcc/testsuite/
* gcc.target/aarch64/sve/clastb_8.c: Use assembly tests to
check for fully-masked loops.

Index: gcc/testsuite/gcc.target/aarch64/sve/clastb_8.c
===
--- gcc/testsuite/gcc.target/aarch64/sve/clastb_8.c 2019-10-29 
08:29:01.800453312 +
+++ gcc/testsuite/gcc.target/aarch64/sve/clastb_8.c 2019-11-16 
10:57:44.155194560 +
@@ -1,5 +1,5 @@
 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details 
-msve-vector-bits=256 --save-temps" } */
+/* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=256 --save-temps" } */
 
 #include 
 
@@ -19,8 +19,11 @@ TEST_TYPE (uint16_t);
 TEST_TYPE (uint32_t);
 TEST_TYPE (uint64_t);
 
-/* { dg-final { scan-tree-dump-times "using a fully-masked loop." 4 "vect" } } 
*/
 /* { dg-final { scan-assembler {\tclastb\t(b[0-9]+), p[0-7], \1, z[0-9]+\.b\n} 
} } */
 /* { dg-final { scan-assembler {\tclastb\t(h[0-9]+), p[0-7], \1, z[0-9]+\.h\n} 
} } */
 /* { dg-final { scan-assembler {\tclastb\t(s[0-9]+), p[0-7], \1, z[0-9]+\.s\n} 
} } */
 /* { dg-final { scan-assembler {\tclastb\t(d[0-9]+), p[0-7], \1, z[0-9]+\.d\n} 
} } */
+/* { dg-final { scan-assembler {\twhilelo\tp[0-9]+\.b,} } } */
+/* { dg-final { scan-assembler {\twhilelo\tp[0-9]+\.h,} } } */
+/* { dg-final { scan-assembler {\twhilelo\tp[0-9]+\.s,} } } */
+/* { dg-final { scan-assembler {\twhilelo\tp[0-9]+\.d,} } } */

[committed][AArch64] Add autovec support for partial SVE vectors

[Richard Sandiford]

This patch adds the bare minimum needed to support autovectorisation of
partial SVE vectors, namely moves and integer addition.  Later patches
add more interesting cases.

Tested on aarch64-linux-gnu and applied as r278341.

Richard


2019-11-16  Richard Sandiford  

gcc/
* config/aarch64/aarch64-modes.def: Define partial SVE vector
float modes.
* config/aarch64/aarch64-protos.h (aarch64_sve_pred_mode): New
function.
* config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle the
new vector float modes.
(aarch64_sve_container_bits): New function.
(aarch64_sve_pred_mode): Likewise.
(aarch64_get_mask_mode): Use it.
(aarch64_sve_element_int_mode): Handle structure modes and partial
modes.
(aarch64_sve_container_int_mode): New function.
(aarch64_vectorize_related_mode): Return SVE modes when given
SVE modes.  Handle partial modes, taking the preferred number
of units from the size of the given mode.
(aarch64_hard_regno_mode_ok): Allow partial modes to be stored
in registers.
(aarch64_expand_sve_ld1rq): Use the mode form of aarch64_sve_pred_mode.
(aarch64_expand_sve_const_vector): Handle partial SVE vectors.
(aarch64_split_sve_subreg_move): Use the mode form of
aarch64_sve_pred_mode.
(aarch64_secondary_reload): Handle partial modes in the same way
as full big-endian vectors.
(aarch64_vector_mode_supported_p): Allow partial SVE vectors.
(aarch64_autovectorize_vector_modes): Try unpacked SVE vectors,
merging with the Advanced SIMD modes.  If two modes have the
same size, try the Advanced SIMD mode first.
(aarch64_simd_valid_immediate): Use the container rather than
the element mode for INDEX constants.
(aarch64_simd_vector_alignment): Make the alignment of partial
SVE vector modes the same as their minimum size.
(aarch64_evpc_sel): Use the mode form of aarch64_sve_pred_mode.
* config/aarch64/aarch64-sve.md (mov): Extend to...
(mov): ...this.
(movmisalign): Extend to...
(movmisalign): ...this.
(*aarch64_sve_mov_le): Rename to...
(*aarch64_sve_mov_ldr_str): ...this.
(*aarch64_sve_mov_be): Rename and extend to...
(*aarch64_sve_mov_no_ldr_str): ...this.  Handle
partial modes regardless of endianness.
(aarch64_sve_reload_be): Rename to...
(aarch64_sve_reload_mem): ...this and enable for little-endian.
Use aarch64_sve_pred_mode to get the appropriate predicate mode.
(@aarch64_pred_mov): Extend to...
(@aarch64_pred_mov): ...this.
(*aarch64_sve_mov_subreg_be): Extend to...
(*aarch64_sve_mov_subreg_be): ...this.
(@aarch64_sve_reinterpret): Extend to...
(@aarch64_sve_reinterpret): ...this.
(*aarch64_sve_reinterpret): Extend to...
(*aarch64_sve_reinterpret): ...this.
(maskload): Extend to...
(maskload): ...this.
(maskstore): Extend to...
(maskstore): ...this.
(vec_duplicate): Extend to...
(vec_duplicate): ...this.
(*vec_duplicate_reg): Extend to...
(*vec_duplicate_reg): ...this.
(sve_ld1r): Extend to...
(sve_ld1r): ...this.
(vec_series): Extend to...
(vec_series): ...this.
(*vec_series_plus): Extend to...
(*vec_series_plus): ...this.
(@aarch64_pred_sxt): Avoid
new VPRED ambiguity.
(@aarch64_cond_sxt): Likewise.
(add3): Extend to...
(add3): ...this.
* config/aarch64/iterators.md (SVE_ALL, SVE_I): New mode iterators.
(Vetype, Vesize, VEL, Vel, vwcore): Handle partial SVE vector modes.
(VPRED, vpred): Likewise.
(Vctype): New iterator.
(vw): Remove SVE modes.

gcc/testsuite/
* gcc.target/aarch64/sve/mixed_size_1.c: New test.
* gcc.target/aarch64/sve/mixed_size_2.c: Likewise.
* gcc.target/aarch64/sve/mixed_size_3.c: Likewise.
* gcc.target/aarch64/sve/mixed_size_4.c: Likewise.
* gcc.target/aarch64/sve/mixed_size_5.c: Likewise.

Index: gcc/config/aarch64/aarch64-modes.def
===
--- gcc/config/aarch64/aarch64-modes.def2019-10-16 11:53:03.681148277 
+0100
+++ gcc/config/aarch64/aarch64-modes.def2019-11-16 10:59:20.722514516 
+
@@ -123,13 +123,18 @@ SVE_MODES (4, VNx64, VNx32, VNx16, VNx8)
 VECTOR_MODES_WITH_PREFIX (VNx, INT, 2, 1);
 VECTOR_MODES_WITH_PREFIX (VNx, INT, 4, 1);
 VECTOR_MODES_WITH_PREFIX (VNx, INT, 8, 1);
+VECTOR_MODES_WITH_PREFIX (VNx, FLOAT, 4, 1);
+VECTOR_MODES_WITH_PREFIX (VNx, FLOAT, 8, 1);
 
 ADJUST_NUNITS (VNx2QI, aarch64_sve_vg);
 ADJUST_NUNITS (VNx2HI, aarch64_sve_vg);
 ADJUST_NUNITS (VNx2SI, aarch64_sve_vg);
+ADJUST_NUNITS (VNx2HF, aarch64_sve_vg);
+ADJUST_NUNITS (VNx2SF, aarch64_sve_vg);

[committed][AArch64] Add sign and zero extension for partial SVE modes

[Richard Sandiford]

This patch adds support for extending from partial SVE modes
to both full vector modes and wider partial modes.

Some tests now need --param aarch64-sve-compare-costs=0 to force
the original full-vector code.

Tested on aarch64-linux-gnu and applied as r278342.

Richard


2019-11-16  Richard Sandiford  

gcc/
* config/aarch64/iterators.md (SVE_HSDI): New mode iterator.
(narrower_mask): Handle VNx4HI, VNx2HI and VNx2SI.
* config/aarch64/aarch64-sve.md
(2): New pattern.
(*2): Likewise.
(@aarch64_pred_sxt): Update
comment.  Avoid new narrower_mask ambiguity.
(@aarch64_cond_sxt): Likewise.
(*cond_uxt_2): Update comment.
(*cond_uxt_any): Likewise.

gcc/testsuite/
* gcc.target/aarch64/sve/cost_model_1.c: Expect the loop to be
vectorized with bytes stored in 32-bit containers.
* gcc.target/aarch64/sve/extend_1.c: New test.
* gcc.target/aarch64/sve/extend_2.c: New test.
* gcc.target/aarch64/sve/extend_3.c: New test.
* gcc.target/aarch64/sve/extend_4.c: New test.
* gcc.target/aarch64/sve/load_const_offset_3.c: Add
--param aarch64-sve-compare-costs=0.
* gcc.target/aarch64/sve/mask_struct_store_1.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_1_run.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_2.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_2_run.c: Likewise.
* gcc.target/aarch64/sve/unpack_unsigned_1.c: Likewise.
* gcc.target/aarch64/sve/unpack_unsigned_1_run.c: Likewise.

Index: gcc/config/aarch64/iterators.md
===
--- gcc/config/aarch64/iterators.md 2019-11-16 11:02:04.689360127 +
+++ gcc/config/aarch64/iterators.md 2019-11-16 11:04:07.924489895 +
@@ -359,6 +359,11 @@ (define_mode_iterator SVE_I [VNx16QI VNx
 VNx4SI VNx2SI
 VNx2DI])
 
+;; SVE integer vector modes whose elements are 16 bits or wider.
+(define_mode_iterator SVE_HSDI [VNx8HI VNx4HI VNx2HI
+   VNx4SI VNx2SI
+   VNx2DI])
+
 ;; Modes involved in extending or truncating SVE data, for 8 elements per
 ;; 128-bit block.
 (define_mode_iterator VNx8_NARROW [VNx8QI])
@@ -1364,9 +1369,10 @@ (define_mode_attr self_mask [(VNx8QI "0x
 (VNx2HI "0x22")
 (VNx2SI "0x24")])
 
-;; For full vector modes, the mask of narrower modes, encoded as above.
-(define_mode_attr narrower_mask [(VNx8HI "0x81")
-(VNx4SI "0x43")
+;; For SVE_HSDI vector modes, the mask of narrower modes, encoded as above.
+(define_mode_attr narrower_mask [(VNx8HI "0x81") (VNx4HI "0x41")
+(VNx2HI "0x21")
+(VNx4SI "0x43") (VNx2SI "0x23")
 (VNx2DI "0x27")])
 
 ;; The constraint to use for an SVE [SU]DOT, FMUL, FMLA or FMLS lane index.
Index: gcc/config/aarch64/aarch64-sve.md
===
--- gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:02:04.685360155 +
+++ gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:04:07.924489895 +
@@ -71,8 +71,7 @@
 ;; == Unary arithmetic
 ;;  [INT] General unary arithmetic corresponding to rtx codes
 ;;  [INT] General unary arithmetic corresponding to unspecs
-;;  [INT] Sign extension
-;;  [INT] Zero extension
+;;  [INT] Sign and zero extension
 ;;  [INT] Logical inverse
 ;;  [FP<-INT] General unary arithmetic that maps to unspecs
 ;;  [FP] General unary arithmetic corresponding to unspecs
@@ -2812,15 +2811,44 @@ (define_insn "@cond_"
 )
 
 ;; -
-;;  [INT] Sign extension
+;;  [INT] Sign and zero extension
 ;; -
 ;; Includes:
 ;; - SXTB
 ;; - SXTH
 ;; - SXTW
+;; - UXTB
+;; - UXTH
+;; - UXTW
 ;; -
 
-;; Predicated SXT[BHW].
+;; Unpredicated sign and zero extension from a narrower mode.
+(define_expand "2"
+  [(set (match_operand:SVE_HSDI 0 "register_operand")
+   (unspec:SVE_HSDI
+ [(match_dup 2)
+  (ANY_EXTEND:SVE_HSDI
+(match_operand:SVE_PARTIAL_I 1 "register_operand"))]
+ UNSPEC_PRED_X))]
+  "TARGET_SVE && (~ & ) == 0"
+  {
+operands[2] = aarch64_ptrue_reg (mode);
+  }
+)
+
+;; Predicated sign and zero extension from a narrower mode.
+(define_insn "*2"
+  [(set (match_operand:SVE_HSDI 0 "register_operand" "=w")
+   (unspec:SVE_HSDI
+ [(match_operand: 1 "register_operand" "Upl")
+  (ANY_EXTEND:SVE_HSDI
+(match_operand:SVE_PARTIAL_I 2 "register_operand" "w"))]
+ UNSPEC_PRED_X))]
+  "TARGET_SVE 

[committed][AArch64] Add truncation for partial SVE modes

[Richard Sandiford]

This patch adds support for "truncating" to a partial SVE vector from
either a full SVE vector or a wider partial vector.  This truncation is
actually a no-op and so should have zero cost in the vector cost model.

Tested on aarch64-linux-gnu and applied as r278344.

Richard


2019-11-16  Richard Sandiford  

gcc/
* config/aarch64/aarch64-sve.md
(trunc2): New pattern.
* config/aarch64/aarch64.c (aarch64_integer_truncation_p): New
function.
(aarch64_sve_adjust_stmt_cost): Call it.

gcc/testsuite/
* gcc.target/aarch64/sve/mask_struct_load_1.c: Add
--param aarch64-sve-compare-costs=0.
* gcc.target/aarch64/sve/mask_struct_load_2.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_3.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_4.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_5.c: Likewise.
* gcc.target/aarch64/sve/pack_1.c: Likewise.
* gcc.target/aarch64/sve/truncate_1.c: New test.

Index: gcc/config/aarch64/aarch64-sve.md
===
--- gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:11:42.929267513 +
+++ gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:13:24.236550470 +
@@ -72,6 +72,7 @@
 ;;  [INT] General unary arithmetic corresponding to rtx codes
 ;;  [INT] General unary arithmetic corresponding to unspecs
 ;;  [INT] Sign and zero extension
+;;  [INT] Truncation
 ;;  [INT] Logical inverse
 ;;  [FP<-INT] General unary arithmetic that maps to unspecs
 ;;  [FP] General unary arithmetic corresponding to unspecs
@@ -2889,6 +2890,29 @@ (define_insn "*cond_uxt_any"
 )
 
 ;; -
+;;  [INT] Truncation
+;; -
+;; The patterns in this section are synthetic.
+;; -
+
+;; Truncate to a partial SVE vector from either a full vector or a
+;; wider partial vector.  This is a no-op, because we can just ignore
+;; the unused upper bits of the source.
+(define_insn_and_split "trunc2"
+  [(set (match_operand:SVE_PARTIAL_I 0 "register_operand" "=w")
+   (truncate:SVE_PARTIAL_I
+ (match_operand:SVE_HSDI 1 "register_operand" "w")))]
+  "TARGET_SVE && (~ & ) == 0"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 0) (match_dup 1))]
+  {
+operands[1] = aarch64_replace_reg_mode (operands[1],
+   mode);
+  }
+)
+
+;; -
 ;;  [INT] Logical inverse
 ;; -
 ;; Includes:
Index: gcc/config/aarch64/aarch64.c
===
--- gcc/config/aarch64/aarch64.c2019-11-16 11:11:42.933267485 +
+++ gcc/config/aarch64/aarch64.c2019-11-16 11:13:24.236550470 +
@@ -12901,6 +12901,21 @@ aarch64_extending_load_p (stmt_vec_info
  && DR_IS_READ (STMT_VINFO_DATA_REF (def_stmt_info)));
 }
 
+/* Return true if STMT_INFO is an integer truncation.  */
+static bool
+aarch64_integer_truncation_p (stmt_vec_info stmt_info)
+{
+  gassign *assign = dyn_cast  (stmt_info->stmt);
+  if (!assign || !CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (assign)))
+return false;
+
+  tree lhs_type = TREE_TYPE (gimple_assign_lhs (assign));
+  tree rhs_type = TREE_TYPE (gimple_assign_rhs1 (assign));
+  return (INTEGRAL_TYPE_P (lhs_type)
+ && INTEGRAL_TYPE_P (rhs_type)
+ && TYPE_PRECISION (lhs_type) < TYPE_PRECISION (rhs_type));
+}
+
 /* STMT_COST is the cost calculated by aarch64_builtin_vectorization_cost
for STMT_INFO, which has cost kind KIND.  Adjust the cost as necessary
for SVE targets.  */
@@ -12919,6 +12934,11 @@ aarch64_sve_adjust_stmt_cost (vect_cost_
   if (kind == vector_stmt && aarch64_extending_load_p (stmt_info))
 stmt_cost = 0;
 
+  /* For similar reasons, vector_stmt integer truncations are a no-op,
+ because we can just ignore the unused upper bits of the source.  */
+  if (kind == vector_stmt && aarch64_integer_truncation_p (stmt_info))
+stmt_cost = 0;
+
   return stmt_cost;
 }
 
Index: gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_1.c
===
--- gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_1.c   2019-03-08 
18:14:29.768994780 +
+++ gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_1.c   2019-11-16 
11:13:24.236550470 +
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param 
aarch64-sve-compare-costs=0" } */
 
 #include 
 
Index: gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_2.c
===

[committed][AArch64] Add gather loads for partial SVE modes

[Richard Sandiford]

This patch adds support for gather loads of partial vectors,
where the vector base or offset elements can be wider than the
elements being loaded.

Tested on aarch64-linux-gnu and applied as r278345.

Richard


2019-11-16  Richard Sandiford  

gcc/
* config/aarch64/iterators.md (SVE_24, SVE_2, SVE_4): New mode
iterators.
* config/aarch64/aarch64-sve.md
(gather_load): Extend to...
(gather_load): ...this.
(mask_gather_load): Extend to...
(mask_gather_load): ...this.
(mask_gather_load): Extend to...
(mask_gather_load): ...this.
(*mask_gather_load_xtw_unpacked):
New pattern.
(*mask_gather_load_sxtw): Extend to...
(*mask_gather_load_sxtw): ...this.
Allow the nominal extension predicate to be different from the
load predicate.
(*mask_gather_load_uxtw): Extend to...
(*mask_gather_load_uxtw): ...this.

gcc/testsuite/
* gcc.target/aarch64/sve/gather_load_1.c (TEST_LOOP): Start at 0.
(TEST_ALL): Add tests for 8-bit and 16-bit elements.
* gcc.target/aarch64/sve/gather_load_2.c: Update accordingly.
* gcc.target/aarch64/sve/gather_load_3.c (TEST_LOOP): Start at 0.
(TEST_ALL): Add tests for 8-bit and 16-bit elements.
* gcc.target/aarch64/sve/gather_load_4.c: Update accordingly.
* gcc.target/aarch64/sve/gather_load_5.c (TEST_LOOP): Start at 0.
(TEST_ALL): Add tests for 8-bit, 16-bit and 32-bit elements.
* gcc.target/aarch64/sve/gather_load_6.c: Add
--param aarch64-sve-compare-costs=0.
(TEST_LOOP): Start at 0.
* gcc.target/aarch64/sve/gather_load_7.c: Add
--param aarch64-sve-compare-costs=0.
* gcc.target/aarch64/sve/gather_load_8.c: New test.
* gcc.target/aarch64/sve/gather_load_9.c: Likewise.
* gcc.target/aarch64/sve/mask_gather_load_6.c: Add
--param aarch64-sve-compare-costs=0.

Index: gcc/config/aarch64/iterators.md
===
--- gcc/config/aarch64/iterators.md 2019-11-16 11:07:13.355176271 +
+++ gcc/config/aarch64/iterators.md 2019-11-16 11:17:04.918989003 +
@@ -364,6 +364,16 @@ (define_mode_iterator SVE_HSDI [VNx8HI V
VNx4SI VNx2SI
VNx2DI])
 
+;; SVE modes with 2 or 4 elements.
+(define_mode_iterator SVE_24 [VNx2QI VNx2HI VNx2HF VNx2SI VNx2SF VNx2DI VNx2DF
+ VNx4QI VNx4HI VNx4HF VNx4SI VNx4SF])
+
+;; SVE modes with 2 elements.
+(define_mode_iterator SVE_2 [VNx2QI VNx2HI VNx2HF VNx2SI VNx2SF VNx2DI VNx2DF])
+
+;; SVE modes with 4 elements.
+(define_mode_iterator SVE_4 [VNx4QI VNx4HI VNx4HF VNx4SI VNx4SF])
+
 ;; Modes involved in extending or truncating SVE data, for 8 elements per
 ;; 128-bit block.
 (define_mode_iterator VNx8_NARROW [VNx8QI])
@@ -1113,6 +1123,31 @@ (define_mode_attr v_fp_equiv [(VNx8HI "v
  (VNx4SI "vnx4sf") (VNx4SF "vnx4sf")
  (VNx2DI "vnx2df") (VNx2DF "vnx2df")])
 
+;; Maps full and partial vector modes of any element type to a full-vector
+;; integer mode with the same number of units.
+(define_mode_attr V_INT_CONTAINER [(VNx16QI "VNx16QI") (VNx8QI "VNx8HI")
+  (VNx4QI "VNx4SI") (VNx2QI "VNx2DI")
+  (VNx8HI "VNx8HI") (VNx4HI "VNx4SI")
+  (VNx2HI "VNx2DI")
+  (VNx4SI "VNx4SI") (VNx2SI "VNx2DI")
+  (VNx2DI "VNx2DI")
+  (VNx8HF "VNx8HI") (VNx4HF "VNx4SI")
+  (VNx2HF "VNx2DI")
+  (VNx4SF "VNx4SI") (VNx2SF "VNx2SI")
+  (VNx2DF "VNx2DI")])
+
+;; Lower-case version of V_INT_CONTAINER.
+(define_mode_attr v_int_container [(VNx16QI "vnx16qi") (VNx8QI "vnx8hi")
+  (VNx4QI "vnx4si") (VNx2QI "vnx2di")
+  (VNx8HI "vnx8hi") (VNx4HI "vnx4si")
+  (VNx2HI "vnx2di")
+  (VNx4SI "vnx4si") (VNx2SI "vnx2di")
+  (VNx2DI "vnx2di")
+  (VNx8HF "vnx8hi") (VNx4HF "vnx4si")
+  (VNx2HF "vnx2di")
+  (VNx4SF "vnx4si") (VNx2SF "vnx2di")
+  (VNx2DF "vnx2di")])
+
 ;; Mode for vector conditional operations where the comparison has
 ;; different type from the lhs.
 (define_mode_attr V_cmp_mixed [(V2SI "V2SF") (V4SI "V4SF")
Index: gcc/config/aarch64/aarch64-sve.md
===
--- gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:14:47.103964052 +
+++ gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:17:04.918989003 +
@@ -13

[committed][AArch64] Pattern-match SVE extending gather loads

[Richard Sandiford]

This patch pattern-matches a partial gather load followed by a sign or
zero extension into an extending gather load.  (The partial gather load
is already an extending load; we just don't rely on the upper bits of
the elements.)

Tested on aarch64-linux-gnu and applied as r278346.

Richard


2019-11-16  Richard Sandiford  

gcc/
* config/aarch64/iterators.md (SVE_2BHSI, SVE_2HSDI, SVE_4BHI)
(SVE_4HSI): New mode iterators.
(ANY_EXTEND2): New code iterator.
* config/aarch64/aarch64-sve.md

(@aarch64_gather_load_):
Extend to...
(@aarch64_gather_load_):
...this, handling extension to partial modes as well as full modes.
Describe the extension as a predicated rather than unpredicated
extension.

(@aarch64_gather_load_):
Likewise extend to...

(@aarch64_gather_load_):
...this, making the same adjustments.

(*aarch64_gather_load__sxtw):
Likewise extend to...

(*aarch64_gather_load__sxtw)
...this, making the same adjustments.

(*aarch64_gather_load__uxtw):
Likewise extend to...

(*aarch64_gather_load__uxtw)
...this, making the same adjustments.

(*aarch64_gather_load__xtw_unpacked):
New pattern.
(*aarch64_ldff1_gather_sxtw): Canonicalize to a constant
extension predicate.

(@aarch64_ldff1_gather_)

(@aarch64_ldff1_gather_)

(*aarch64_ldff1_gather__uxtw):
Describe the extension as a predicated rather than unpredicated
extension.

(*aarch64_ldff1_gather__sxtw):
Likewise.  Canonicalize to a constant extension predicate.
* config/aarch64/aarch64-sve-builtins-base.cc
(svld1_gather_extend_impl::expand): Add an extra predicate for
the extension.
(svldff1_gather_extend_impl::expand): Likewise.

gcc/testsuite/
* gcc.target/aarch64/sve/gather_load_extend_1.c: New test.
* gcc.target/aarch64/sve/gather_load_extend_2.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_3.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_4.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_5.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_6.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_7.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_8.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_9.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_10.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_11.c: Likewise.
* gcc.target/aarch64/sve/gather_load_extend_12.c: Likewise.

Index: gcc/config/aarch64/iterators.md
===
--- gcc/config/aarch64/iterators.md 2019-11-16 11:20:23.477584640 +
+++ gcc/config/aarch64/iterators.md 2019-11-16 11:23:58.060071392 +
@@ -371,9 +371,21 @@ (define_mode_iterator SVE_24 [VNx2QI VNx
 ;; SVE modes with 2 elements.
 (define_mode_iterator SVE_2 [VNx2QI VNx2HI VNx2HF VNx2SI VNx2SF VNx2DI VNx2DF])
 
+;; SVE integer modes with 2 elements, excluding the widest element.
+(define_mode_iterator SVE_2BHSI [VNx2QI VNx2HI VNx2SI])
+
+;; SVE integer modes with 2 elements, excluding the narrowest element.
+(define_mode_iterator SVE_2HSDI [VNx2HI VNx2SI VNx2DI])
+
 ;; SVE modes with 4 elements.
 (define_mode_iterator SVE_4 [VNx4QI VNx4HI VNx4HF VNx4SI VNx4SF])
 
+;; SVE integer modes with 4 elements, excluding the widest element.
+(define_mode_iterator SVE_4BHI [VNx4QI VNx4HI])
+
+;; SVE integer modes with 4 elements, excluding the narrowest element.
+(define_mode_iterator SVE_4HSI [VNx4HI VNx4SI])
+
 ;; Modes involved in extending or truncating SVE data, for 8 elements per
 ;; 128-bit block.
 (define_mode_iterator VNx8_NARROW [VNx8QI])
@@ -1443,6 +1455,7 @@ (define_code_iterator NEG_NOT [neg not])
 
 ;; Code iterator for sign/zero extension
 (define_code_iterator ANY_EXTEND [sign_extend zero_extend])
+(define_code_iterator ANY_EXTEND2 [sign_extend zero_extend])
 
 ;; All division operations (signed/unsigned)
 (define_code_iterator ANY_DIV [div udiv])
Index: gcc/config/aarch64/aarch64-sve.md
===
--- gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:20:23.477584640 +
+++ gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:23:58.060071392 +
@@ -1446,93 +1446,150 @@ (define_insn "*mask_gather_load"
-  [(set (match_operand:VNx4_WIDE 0 "register_operand" "=w, w, w, w, w, w")
-   (ANY_EXTEND:VNx4_WIDE
- (unspec:VNx4_NARROW
-   [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, 
Upl, Upl")
-(match_operand:DI 1 
"aarch64_sve_gather_offset_" "Z, vg, 
rk, rk, rk, rk")
-(match_operand:VNx4_WIDE 2 "register_operand" "w, w, w, w, w, w")
-(match_operand:DI 3 "const_int_operand" "Ui1, Ui1, Z,

[committed][AArch64] Add scatter stores for partial SVE modes

[Richard Sandiford]

This patch adds support for scatter stores of partial vectors,
where the vector base or offset elements can be wider than the
elements being stored.

Tested on aarch64-linux-gnu and applied as r278347.

Richard


2019-11-16  Richard Sandiford  

gcc/
* config/aarch64/aarch64-sve.md
(scatter_store): Extend to...
(scatter_store): ...this.
(mask_scatter_store): Extend to...
(mask_scatter_store): ...this.
(mask_scatter_store): Extend to...
(mask_scatter_store): ...this.
(*mask_scatter_store_xtw_unpacked): New
pattern.
(*mask_scatter_store_sxtw): Extend to...
(*mask_scatter_store_sxtw): ...this.
(*mask_scatter_store_uxtw): Extend to...
(*mask_scatter_store_uxtw): ...this.

gcc/testsuite/
* gcc.target/aarch64/sve/scatter_store_1.c (TEST_LOOP): Start at 0.
(TEST_ALL): Add tests for 8-bit and 16-bit elements.
* gcc.target/aarch64/sve/scatter_store_2.c: Update accordingly.
* gcc.target/aarch64/sve/scatter_store_3.c (TEST_LOOP): Start at 0.
(TEST_ALL): Add tests for 8-bit and 16-bit elements.
* gcc.target/aarch64/sve/scatter_store_4.c: Update accordingly.
* gcc.target/aarch64/sve/scatter_store_5.c (TEST_LOOP): Start at 0.
(TEST_ALL): Add tests for 8-bit, 16-bit and 32-bit elements.
* gcc.target/aarch64/sve/scatter_store_8.c: New test.
* gcc.target/aarch64/sve/scatter_store_9.c: Likewise.

Index: gcc/config/aarch64/aarch64-sve.md
===
--- gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:26:06.895163107 +
+++ gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:28:29.386158694 +
@@ -2135,15 +2135,15 @@ (define_insn "@aarch64_stnt1"
 ;; -
 
 ;; Unpredicated scatter stores.
-(define_expand "scatter_store"
+(define_expand "scatter_store"
   [(set (mem:BLK (scratch))
(unspec:BLK
  [(match_dup 5)
   (match_operand:DI 0 "aarch64_sve_gather_offset_")
-  (match_operand: 1 "register_operand")
+  (match_operand: 1 "register_operand")
   (match_operand:DI 2 "const_int_operand")
   (match_operand:DI 3 "aarch64_gather_scale_operand_")
-  (match_operand:SVE_FULL_SD 4 "register_operand")]
+  (match_operand:SVE_24 4 "register_operand")]
  UNSPEC_ST1_SCATTER))]
   "TARGET_SVE"
   {
@@ -2153,48 +2153,74 @@ (define_expand "scatter_store"
+(define_insn "mask_scatter_store"
   [(set (mem:BLK (scratch))
(unspec:BLK
  [(match_operand:VNx4BI 5 "register_operand" "Upl, Upl, Upl, Upl, Upl, 
Upl")
-  (match_operand:DI 0 "aarch64_sve_gather_offset_w" "Z, vgw, rk, rk, 
rk, rk")
+  (match_operand:DI 0 "aarch64_sve_gather_offset_" "Z, vgw, 
rk, rk, rk, rk")
   (match_operand:VNx4SI 1 "register_operand" "w, w, w, w, w, w")
   (match_operand:DI 2 "const_int_operand" "Ui1, Ui1, Z, Ui1, Z, Ui1")
-  (match_operand:DI 3 "aarch64_gather_scale_operand_w" "Ui1, Ui1, Ui1, 
Ui1, i, i")
-  (match_operand:SVE_FULL_S 4 "register_operand" "w, w, w, w, w, w")]
+  (match_operand:DI 3 "aarch64_gather_scale_operand_" "Ui1, 
Ui1, Ui1, Ui1, i, i")
+  (match_operand:SVE_4 4 "register_operand" "w, w, w, w, w, w")]
  UNSPEC_ST1_SCATTER))]
   "TARGET_SVE"
   "@
-   st1w\t%4.s, %5, [%1.s]
-   st1w\t%4.s, %5, [%1.s, #%0]
-   st1w\t%4.s, %5, [%0, %1.s, sxtw]
-   st1w\t%4.s, %5, [%0, %1.s, uxtw]
-   st1w\t%4.s, %5, [%0, %1.s, sxtw %p3]
-   st1w\t%4.s, %5, [%0, %1.s, uxtw %p3]"
+   st1\t%4.s, %5, [%1.s]
+   st1\t%4.s, %5, [%1.s, #%0]
+   st1\t%4.s, %5, [%0, %1.s, sxtw]
+   st1\t%4.s, %5, [%0, %1.s, uxtw]
+   st1\t%4.s, %5, [%0, %1.s, sxtw %p3]
+   st1\t%4.s, %5, [%0, %1.s, uxtw %p3]"
 )
 
 ;; Predicated scatter stores for 64-bit elements.  The value of operand 2
 ;; doesn't matter in this case.
-(define_insn "mask_scatter_store"
+(define_insn "mask_scatter_store"
   [(set (mem:BLK (scratch))
(unspec:BLK
  [(match_operand:VNx2BI 5 "register_operand" "Upl, Upl, Upl, Upl")
-  (match_operand:DI 0 "aarch64_sve_gather_offset_d" "Z, vgd, rk, rk")
+  (match_operand:DI 0 "aarch64_sve_gather_offset_" "Z, vgd, 
rk, rk")
   (match_operand:VNx2DI 1 "register_operand" "w, w, w, w")
   (match_operand:DI 2 "const_int_operand")
-  (match_operand:DI 3 "aarch64_gather_scale_operand_d" "Ui1, Ui1, Ui1, 
i")
-  (match_operand:SVE_FULL_D 4 "register_operand" "w, w, w, w")]
+  (match_operand:DI 3 "aarch64_gather_scale_operand_" "Ui1, 
Ui1, Ui1, i")
+  (match_operand:SVE_2 4 "register_operand" "w, w, w, w")]
  UNSPEC_ST1_SCATTER))]
   "TARGET_SVE"
   "@
-   st1d\t%4.d, %5, [%1.d]
-   st1d\t%4.d, %5, [%1.d, #%0]
-   st1d\t%4.d, %5, [%0, %1.d]
-   st1d\t%4.d, %5, [%0, %1.d, lsl %p3]"
+   st1\t%4.d, %5, [%1.d]
+   st1\t%4.d, %5, [%1.d,

Re: [PATCH 0/4] Eliminate cc0 from m68k

[John Paul Adrian Glaubitz]

Hi Andreas!

> === g++ Summary ===
> 
> # of expected passes26803
> # of unexpected failures16
> # of expected failures  82
> # of unsupported tests  157
> /daten/aranym/gcc/gcc-20191116/Build/gcc/xg++  version 10.0.0 20191115 
> (experimental) [trunk revision 278320] (GCC)

Is this testsuite run with or without Bernd's patches?

If yes, I think it would be a good sign that the patches are good for 
submission.

I will try to get the patches backported to gcc-9 so that we can start building 
Debian
packages with a patched gcc-9 which may help finding more regressions.

Adrian

-- 
 .''`.  John Paul Adrian Glaubitz
: :' :  Debian Developer - glaub...@debian.org
`. `'   Freie Universitaet Berlin - glaub...@physik.fu-berlin.de
  `-GPG: 62FF 8A75 84E0 2956 9546  0006 7426 3B37 F5B5 F913

Re: [PATCH 0/4] Eliminate cc0 from m68k

[Bernd Schmidt]

On 11/16/19 9:18 AM, Andreas Schwab wrote:
> On Nov 16 2019, Bernd Schmidt wrote:
> 
>> Well, there has to be some difference between what you are doing and
>> what I am doing, because:
>>
>> Running /local/src/egcs/git/gcc/testsuite/g++.old-deja/old-deja.exp ...
>>
>>  === g++ Summary ===
>>
>> # of expected passes 26826
>> # of expected failures   82
>> # of unsupported tests   157
>> /local/src/egcs/bm68k-test/gcc/xg++  version 10.0.0 20191101
>> (experimental) (GCC)
> 
>   === g++ Summary ===
> 
> # of expected passes  170041
> # of unexpected failures  74
> # of expected failures708
> # of unresolved testcases 2
> # of unsupported tests7419
> /daten/aranym/gcc/gcc-20191115/Build/gcc/xg++  version 10.0.0 20191114 
> (experimental) [trunk revision 278266] (GCC) 

Once again, that doesn't help me track things down. A bug report without
instructions to reproduce is useless. Could you please provide me the
generated assembly files with -fverbose-asm that I asked for?


Bernd

[committed][AArch64] Robustify aarch64_wrffr

[Richard Sandiford]

This patch uses distinct values for the FFR and FFRT outputs of
aarch64_wrffr, so that a following aarch64_copy_ffr_to_ffrt has
an effect.  This is needed to avoid regressions with later patches.

The block comment at the head of the file already described
the pattern this way, and there was already an unspec for it.
Not sure what made me change it...

Tested on aarch64-linux-gnu and applied as r278356.

Richard


2019-11-16  Richard Sandiford  

gcc/
* config/aarch64/aarch64-sve.md (aarch64_wrffr): Wrap the FFRT
output in UNSPEC_WRFFR.

Index: gcc/config/aarch64/aarch64-sve.md
===
--- gcc/config/aarch64/aarch64-sve.md   2019-11-16 11:30:29.089315019 +
+++ gcc/config/aarch64/aarch64-sve.md   2019-11-16 13:31:11.590394198 +
@@ -984,7 +984,7 @@ (define_insn "aarch64_wrffr"
   [(set (reg:VNx16BI FFR_REGNUM)
(match_operand:VNx16BI 0 "aarch64_simd_reg_or_minus_one" "Dm, Upa"))
(set (reg:VNx16BI FFRT_REGNUM)
-   (match_dup 0))]
+   (unspec:VNx16BI [(match_dup 0)] UNSPEC_WRFFR))]
   "TARGET_SVE"
   "@
setffr

Handle VIEW_CONVERT_EXPR for variable-length vectors

[Richard Sandiford]

This patch handles VIEW_CONVERT_EXPRs of variable-length VECTOR_CSTs
by adding tree-level versions of native_decode_vector_rtx and
simplify_const_vector_subreg.  It uses the same code for fixed-length
vectors, both to get more coverage and because operating directly on
the compressed encoding should be more efficient for longer vectors
with a regular pattern.

The structure and comments are very similar between the tree and
rtx routines.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.  OK to install?

Richard


2019-11-15  Richard Sandiford  

gcc/
* fold-const.c (native_encode_vector): Turn into a wrapper function,
splitting the main code out into...
(native_encode_vector_part): ...this new function.
(native_decode_vector_tree): New function.
(fold_view_convert_vector_encoding): Likewise.
(fold_view_convert_expr): Use it for converting VECTOR_CSTs
to VECTOR_TYPEs.

gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/temporaries_1.c: New test.

Index: gcc/fold-const.c
===
--- gcc/fold-const.c2019-11-16 13:37:04.0 +
+++ gcc/fold-const.c2019-11-16 13:37:05.331910672 +
@@ -7715,22 +7715,18 @@ native_encode_complex (const_tree expr,
   return rsize + isize;
 }
 
-
-/* Subroutine of native_encode_expr.  Encode the VECTOR_CST
-   specified by EXPR into the buffer PTR of length LEN bytes.
-   Return the number of bytes placed in the buffer, or zero
-   upon failure.  */
+/* Like native_encode_vector, but only encode the first COUNT elements.
+   The other arguments are as for native_encode_vector.  */
 
 static int
-native_encode_vector (const_tree expr, unsigned char *ptr, int len, int off)
+native_encode_vector_part (const_tree expr, unsigned char *ptr, int len,
+  int off, unsigned HOST_WIDE_INT count)
 {
-  unsigned HOST_WIDE_INT i, count;
+  unsigned HOST_WIDE_INT i;
   int size, offset;
   tree itype, elem;
 
   offset = 0;
-  if (!VECTOR_CST_NELTS (expr).is_constant (&count))
-return 0;
   itype = TREE_TYPE (TREE_TYPE (expr));
   size = GET_MODE_SIZE (SCALAR_TYPE_MODE (itype));
   for (i = 0; i < count; i++)
@@ -7754,6 +7750,20 @@ native_encode_vector (const_tree expr, u
   return offset;
 }
 
+/* Subroutine of native_encode_expr.  Encode the VECTOR_CST
+   specified by EXPR into the buffer PTR of length LEN bytes.
+   Return the number of bytes placed in the buffer, or zero
+   upon failure.  */
+
+static int
+native_encode_vector (const_tree expr, unsigned char *ptr, int len, int off)
+{
+  unsigned HOST_WIDE_INT count;
+  if (!VECTOR_CST_NELTS (expr).is_constant (&count))
+return 0;
+  return native_encode_vector_part (expr, ptr, len, off, count);
+}
+
 
 /* Subroutine of native_encode_expr.  Encode the STRING_CST
specified by EXPR into the buffer PTR of length LEN bytes.
@@ -8049,6 +8059,113 @@ can_native_interpret_type_p (tree type)
 }
 }
 
+/* Read a vector of type TYPE from the target memory image given by BYTES,
+   starting at byte FIRST_BYTE.  The vector is known to be encodable using
+   NPATTERNS interleaved patterns with NELTS_PER_PATTERN elements each,
+   and BYTES is known to have enough bytes to supply NPATTERNS *
+   NELTS_PER_PATTERN vector elements.  Each element of BYTES contains
+   BITS_PER_UNIT bits and the bytes are in target memory order.
+
+   Return the vector on success, otherwise return null.  */
+
+static tree
+native_decode_vector_tree (tree type, vec bytes,
+  unsigned int first_byte, unsigned int npatterns,
+  unsigned int nelts_per_pattern)
+{
+  tree_vector_builder builder (type, npatterns, nelts_per_pattern);
+  tree elt_type = TREE_TYPE (type);
+  unsigned int elt_bits = tree_to_uhwi (TYPE_SIZE (elt_type));
+  if (VECTOR_BOOLEAN_TYPE_P (type) && elt_bits <= BITS_PER_UNIT)
+{
+  /* This is the only case in which elements can be smaller than a byte.
+Element 0 is always in the lsb of the containing byte.  */
+  elt_bits = TYPE_PRECISION (elt_type);
+  for (unsigned int i = 0; i < builder.encoded_nelts (); ++i)
+   {
+ unsigned int bit_index = first_byte * BITS_PER_UNIT + i * elt_bits;
+ unsigned int byte_index = bit_index / BITS_PER_UNIT;
+ unsigned int lsb = bit_index % BITS_PER_UNIT;
+ builder.quick_push (bytes[byte_index] & (1 << lsb)
+ ? build_all_ones_cst (elt_type)
+ : build_zero_cst (elt_type));
+   }
+}
+  else
+{
+  unsigned int elt_bytes = elt_bits / BITS_PER_UNIT;
+  for (unsigned int i = 0; i < builder.encoded_nelts (); ++i)
+   {
+ tree elt = native_interpret_expr (elt_type, &bytes[first_byte],
+   elt_bytes);
+ if (!elt)
+   return NULL_TREE;
+ builder.quick_push (elt);
+ first_byte += elt_bytes;
+

Two RTL CC tweaks for SVE pmore/plast conditions

[Richard Sandiford]

SVE has two composite conditions:

  pmore == at least one bit set && last bit clear
  plast == no bits set || last bit set

So in general we generate them from:

  A: CC = test bits
  B: reg1 = first condition
  C: CC = test bits
  D: reg2 = second condition
  E: result = (reg1 op reg2)   where op is || or &&

To fold all this into a single test, we need to be able to remove
the redundant C (the cse.c patch) and then fold B, D and E down to
a single condition (the simplify-rtx.c patch).

The underlying conditions are unsigned, so the simplify-rtx.c part needs
to support both unsigned comparisons and AND.  However, to avoid opening
the can of worms that is ANDing FP comparisons for unordered inputs,
I've restricted the new AND handling to cases in which NaNs can be
ignored.  I think this is still a strict extension of what we have now,
it just doesn't go as far as it could.  Going further would need an
entirely different set of testcases so I think would make more sense
as separate work.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.  OK to install?

Richard


2019-11-16  Richard Sandiford  

gcc/
* cse.c (cse_insn): Delete no-op register moves too.
* simplify-rtx.c (comparison_to_mask): Handle unsigned comparisons.
Take a second comparison to control the value for NE.
(mask_to_comparison): Handle unsigned comparisons.
(simplify_logical_relational_operation): Likewise.  Update call
to comparison_to_mask.  Handle AND if !HONOR_NANs.
(simplify_binary_operation_1): Call the above for AND too.

gcc/testsuite/
* gcc.target/aarch64/sve/acle/asm/ptest_pmore.c: New test.

Index: gcc/cse.c
===
--- gcc/cse.c   2019-11-16 13:42:09.0 +
+++ gcc/cse.c   2019-11-16 13:42:09.653773983 +
@@ -4625,7 +4625,7 @@ cse_insn (rtx_insn *insn)
   for (i = 0; i < n_sets; i++)
 {
   bool repeat = false;
-  bool mem_noop_insn = false;
+  bool noop_insn = false;
   rtx src, dest;
   rtx src_folded;
   struct table_elt *elt = 0, *p;
@@ -5324,17 +5324,17 @@ cse_insn (rtx_insn *insn)
}
 
  /* Similarly, lots of targets don't allow no-op
-(set (mem x) (mem x)) moves.  */
+(set (mem x) (mem x)) moves.  Even (set (reg x) (reg x))
+might be impossible for certain registers (like CC registers).  */
  else if (n_sets == 1
-  && MEM_P (trial)
-  && MEM_P (dest)
+  && (MEM_P (trial) || REG_P (trial))
   && rtx_equal_p (trial, dest)
   && !side_effects_p (dest)
   && (cfun->can_delete_dead_exceptions
   || insn_nothrow_p (insn)))
{
  SET_SRC (sets[i].rtl) = trial;
- mem_noop_insn = true;
+ noop_insn = true;
  break;
}
 
@@ -5562,8 +5562,8 @@ cse_insn (rtx_insn *insn)
  sets[i].rtl = 0;
}
 
-  /* Similarly for no-op MEM moves.  */
-  else if (mem_noop_insn)
+  /* Similarly for no-op moves.  */
+  else if (noop_insn)
{
  if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn))
cse_cfg_altered = true;
Index: gcc/simplify-rtx.c
===
--- gcc/simplify-rtx.c  2019-11-16 13:42:09.0 +
+++ gcc/simplify-rtx.c  2019-11-16 13:42:09.653773983 +
@@ -2125,12 +2125,17 @@ simplify_associative_operation (enum rtx
   return 0;
 }
 
-/* Return a mask describing the COMPARISON.  */
+/* Return a mask describing the COMPARISON.  Treat NE as unsigned
+   if OTHER_COMPARISON is.  */
 static int
-comparison_to_mask (enum rtx_code comparison)
+comparison_to_mask (rtx_code comparison, rtx_code other_comparison)
 {
   switch (comparison)
 {
+case LTU:
+  return 32;
+case GTU:
+  return 16;
 case LT:
   return 8;
 case GT:
@@ -2140,6 +2145,10 @@ comparison_to_mask (enum rtx_code compar
 case UNORDERED:
   return 1;
 
+case LEU:
+  return 34;
+case GEU:
+  return 18;
 case LTGT:
   return 12;
 case LE:
@@ -2156,7 +2165,10 @@ comparison_to_mask (enum rtx_code compar
 case ORDERED:
   return 14;
 case NE:
-  return 13;
+  return (other_comparison == LTU
+ || other_comparison == LEU
+ || other_comparison == GTU
+ || other_comparison == GEU ? 48 : 13);
 case UNLE:
   return 11;
 case UNGE:
@@ -2173,6 +2185,10 @@ mask_to_comparison (int mask)
 {
   switch (mask)
 {
+case 32:
+  return LTU;
+case 16:
+  return GTU;
 case 8:
   return LT;
 case 4:
@@ -2182,6 +2198,10 @@ mask_to_comparison (int mask)
 case 1:
   return UNORDERED;
 
+case 34:
+  return LEU;
+case 18:
+  return GEU;
 case 12:
   return LTGT;
 case 10:
@

Add an empty constructor shortcut to build_vector_from_ctor

[Richard Sandiford]

Empty vector constructors are equivalent to zero vectors.  If we handle
that case directly, we can support it for variable-length vectors and
can hopefully make things more efficient for fixed-length vectors.

This is needed by a later C++ patch.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.  OK to install?

Richard


2019-11-16  Richard Sandiford  

gcc/
* tree.c (build_vector_from_ctor): Directly return a zero vector for
empty constructors.

Index: gcc/tree.c
===
--- gcc/tree.c  2019-11-14 14:55:04.415447600 +
+++ gcc/tree.c  2019-11-16 13:53:28.609006588 +
@@ -1858,6 +1858,9 @@ make_vector (unsigned log2_npatterns,
 tree
 build_vector_from_ctor (tree type, vec *v)
 {
+  if (vec_safe_length (v) == 0)
+return build_zero_cst (type);
+
   unsigned HOST_WIDE_INT idx, nelts;
   tree value;
 

[C++] Pass type uses through the verify_type_context hook

[Richard Sandiford]

This patch makes the C++ frontend work with the verify_type_context hook
[https://gcc.gnu.org/ml/gcc-patches/2019-11/msg00942.html].  We need
some new type contexts for features that don't exist in C, but otherwise
the patch is very similar to the C one.

TCTX_CAPTURE_BY_COPY could really be treated as an instance of
TCTX_FIELD, but the error message is better if we split it out.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.  OK to install?

Richard


2019-11-16  Richard Sandiford  

gcc/
* target.h (TCTX_ALLOCATION, TCTX_DEALLOCATION, TCTX_EXCEPTIONS)
(TCTX_CAPTURE_BY_COPY): New type_context_kinds.
* config/aarch64/aarch64-sve-builtins.cc (verify_type_context):
Handle them.

gcc/cp/
* decl.c (start_decl_1): Use verify_type_context to check whether
the target allows variables of a particular type to have static
or thread-local storage duration.
(check_array_initializer): Use verify_type_context to check whether
the target allows a particular type to be used as an array element.
(create_array_type_for_decl): Likewise.
(cp_finish_decl): Use verify_type_context to check whether
the target allows static member variables of a particular type.
(grokdeclarator): Likewise.  Also use verify_type_context to check
whether the target allows non-static member variables of a particular
type.
* except.c: Include target.h.
(is_admissible_throw_operand_or_catch_parameter): Use
verify_type_context to check whether the target allows particular
types to be thrown and caught.
* typeck2.c (add_exception_specifier): Likewise.
* init.c (build_new_1): Use verify_type_context to check whether
the target allows particular types to be dynamically allocated.
(build_vec_delete_1, build_delete): Use verify_type_context to check
whether the target allows particular types to be deleted.
* lambda.c (add_capture): Use verify_type_context to check
whether the target allows particular types to be captured by copy.
* pt.c: Include target.h.
(instantiate_class_template_1): Use verify_type_context to check
whether the target allows non-static member variables of a particular
type.
* typeck.c (cxx_alignof_expr): Use verify_type_context to check
whether the target allows the alignment of a particular type
to be measured.
(pointer_diff, cp_build_unary_op): Use verify_type_context to check
whether the target allows arithmetic involving pointers to particular
types.

gcc/testsuite/
* g++.dg/ext/sve-sizeless-1.C: New test.
* g++.dg/ext/sve-sizeless-2.C: Likewise.

Index: gcc/target.h
===
--- gcc/target.h2019-11-16 14:03:08.992929894 +
+++ gcc/target.h2019-11-16 14:03:16.436877583 +
@@ -249,7 +249,19 @@ enum type_context_kind {
 
   /* Adding to or subtracting from a pointer to T, or computing the
  difference between two pointers when one of them is a pointer to T.  */
-  TCTX_POINTER_ARITH
+  TCTX_POINTER_ARITH,
+
+  /* Dynamically allocating objects of type T.  */
+  TCTX_ALLOCATION,
+
+  /* Dynamically deallocating objects of type T.  */
+  TCTX_DEALLOCATION,
+
+  /* Throwing or catching an object of type T.  */
+  TCTX_EXCEPTIONS,
+
+  /* Capturing objects of type T by value in a closure.  */
+  TCTX_CAPTURE_BY_COPY
 };
 
 extern bool verify_type_context (location_t, type_context_kind, const_tree,
Index: gcc/config/aarch64/aarch64-sve-builtins.cc
===
--- gcc/config/aarch64/aarch64-sve-builtins.cc  2019-11-16 14:03:08.972930034 
+
+++ gcc/config/aarch64/aarch64-sve-builtins.cc  2019-11-16 14:03:16.420877696 
+
@@ -3341,6 +3341,26 @@ verify_type_context (location_t loc, typ
   if (!silent_p)
error_at (loc, "array elements cannot have SVE type %qT", type);
   return false;
+
+case TCTX_ALLOCATION:
+  if (!silent_p)
+   error_at (loc, "cannot allocate objects with SVE type %qT", type);
+  return false;
+
+case TCTX_DEALLOCATION:
+  if (!silent_p)
+   error_at (loc, "cannot delete objects with SVE type %qT", type);
+  return false;
+
+case TCTX_EXCEPTIONS:
+  if (!silent_p)
+   error_at (loc, "cannot throw or catch SVE type %qT", type);
+  return false;
+
+case TCTX_CAPTURE_BY_COPY:
+  if (!silent_p)
+   error_at (loc, "capture by copy of SVE type %qT", type);
+  return false;
 }
   gcc_unreachable ();
 }
Index: gcc/cp/decl.c
===
--- gcc/cp/decl.c   2019-11-16 14:03:01.0 +
+++ gcc/cp/decl.c   2019-11-16 14:03:16.424877668 +
@@ -5464,6 +5464,13 @@ start_decl_1 (tree decl, bool initialize
   cp_apply_type_quals_to_dec

Re: Add an empty constructor shortcut to build_vector_from_ctor

[Jeff Law]

On 11/16/19 6:55 AM, Richard Sandiford wrote:
> Empty vector constructors are equivalent to zero vectors.  If we handle
> that case directly, we can support it for variable-length vectors and
> can hopefully make things more efficient for fixed-length vectors.
> 
> This is needed by a later C++ patch.
> 
> Tested on aarch64-linux-gnu and x86_64-linux-gnu.  OK to install?
> 
> Richard
> 
> 
> 2019-11-16  Richard Sandiford  
> 
> gcc/
>   * tree.c (build_vector_from_ctor): Directly return a zero vector for
>   empty constructors.
OK
jeff

Re: [Patch][Demangler] Fix for complex values

[Jeff Law]

On 10/29/19 10:26 AM, Miguel Saldivar wrote:
> There seems to be a small issue with the commit, somehow "float _Complex"
> turned into "Complex"
> within "demangle-expected", so the test now fails. Attached will be a fix
> for it. Thank you for committing
> the fix though.
patch is complaining that your patches are mangled.  I tried to apply
the first by hand and clearly goof'd it.  Hopefully I got it right this
time.

Thanks,
Jeff

Re: [PATCH] Refactor rust-demangle to be independent of C++ demangling.

[Jeff Law]

On 11/8/19 12:16 PM, Eduard-Mihai Burtescu wrote:
> 2019-10-22  Eduard-Mihai Burtescu  
> include/ChangeLog:
>   * demangle.h (rust_demangle_callback): Add.
> libiberty/ChangeLog:
>   * cplus-dem.c (cplus_demangle): Use rust_demangle directly.
>   (rust_demangle): Remove.
>   * rust-demangle.c (is_prefixed_hash): Rename to is_legacy_prefixed_hash.
>   (parse_lower_hex_nibble): Rename to decode_lower_hex_nibble.
>   (parse_legacy_escape): Rename to decode_legacy_escape.
>   (rust_is_mangled): Remove.
>   (struct rust_demangler): Add.
>   (peek): Add.
>   (next): Add.
>   (struct rust_mangled_ident): Add.
>   (parse_ident): Add.
>   (rust_demangle_sym): Remove.
>   (print_str): Add.
>   (PRINT): Add.
>   (print_ident): Add.
>   (rust_demangle_callback): Add.
>   (struct str_buf): Add.
>   (str_buf_reserve): Add.
>   (str_buf_append): Add.
>   (str_buf_demangle_callback): Add.
>   (rust_demangle): Add.
>   * rust-demangle.h: Remove.
THanks.  Installed.
jeff

Add optabs for accelerating RAW and WAR alias checks

[Richard Sandiford]

This patch adds optabs that check whether a read followed by a write
or a write followed by a read can be divided into interleaved byte
accesses without changing the dependencies between the bytes.
This is one of the uses of the SVE2 WHILERW and WHILEWR instructions.
(The instructions can also be used to limit the VF at runtime,
but that's future work.)

This applies on top of:

  https://gcc.gnu.org/ml/gcc-patches/2019-11/msg00787.html

Tested on aarch64-linux-gnu and x86_64-linux-gnu.  OK to install?

Richard


2019-11-16  Richard Sandiford  

gcc/
* doc/sourcebuild.texi (vect_check_ptrs): Document.
* optabs.def (check_raw_ptrs_optab, check_war_ptrs_optab): New optabs.
* doc/md.texi: Document them.
* internal-fn.def (IFN_CHECK_RAW_PTRS, IFN_CHECK_WAR_PTRS): New
internal functions.
* internal-fn.h (internal_check_ptrs_fn_supported_p): Declare.
* internal-fn.c (check_ptrs_direct): New macro.
(expand_check_ptrs_optab_fn): Likewise.
(direct_check_ptrs_optab_supported_p): Likewise.
(internal_check_ptrs_fn_supported_p): New fuction.
* tree-data-ref.c: Include internal-fn.h.
(create_ifn_alias_checks): New function.
(create_intersect_range_checks): Use it.
* config/aarch64/iterators.md (SVE2_WHILE_PTR): New int iterator.
(optab, cmp_op): Handle it.
(raw_war, unspec): New int attributes.
* config/aarch64/aarch64.md (UNSPEC_WHILERW, UNSPEC_WHILE_WR): New
constants.
* config/aarch64/predicates.md (aarch64_bytes_per_sve_vector_operand):
New predicate.
* config/aarch64/aarch64-sve2.md (check__ptrs): New
expander.
(@aarch64_sve2_while_ptest): New
pattern.

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_vect_check_ptrs):
New procedure.
* gcc.dg/vect/vect-alias-check-14.c: Expect IFN_CHECK_WAR to be
used, if available.
* gcc.dg/vect/vect-alias-check-15.c: Likewise.
* gcc.dg/vect/vect-alias-check-16.c: Likewise IFN_CHECK_RAW.
* gcc.target/aarch64/sve2/whilerw_1.c: New test.
* gcc.target/aarch64/sve2/whilewr_1.c: Likewise.
* gcc.target/aarch64/sve2/whilewr_2.c: Likewise.

Index: gcc/doc/sourcebuild.texi
===
--- gcc/doc/sourcebuild.texi2019-11-16 15:33:44.0 +
+++ gcc/doc/sourcebuild.texi2019-11-16 15:33:44.726783462 +
@@ -1487,6 +1487,10 @@ Target supports hardware vectors of @cod
 @item vect_long_long
 Target supports hardware vectors of @code{long long}.
 
+@item vect_check_ptrs
+Target supports the @code{check_raw_ptrs} and @code{check_war_ptrs}
+optabs on vectors.
+
 @item vect_fully_masked
 Target supports fully-masked (also known as fully-predicated) loops,
 so that vector loops can handle partial as well as full vectors.
Index: gcc/optabs.def
===
--- gcc/optabs.def  2019-11-16 15:33:44.0 +
+++ gcc/optabs.def  2019-11-16 15:33:44.730783434 +
@@ -429,6 +429,9 @@ OPTAB_D (atomic_xor_optab, "atomic_xor$I
 OPTAB_D (get_thread_pointer_optab, "get_thread_pointer$I$a")
 OPTAB_D (set_thread_pointer_optab, "set_thread_pointer$I$a")
 
+OPTAB_D (check_raw_ptrs_optab, "check_raw_ptrs$a")
+OPTAB_D (check_war_ptrs_optab, "check_war_ptrs$a")
+
 OPTAB_DC (vec_duplicate_optab, "vec_duplicate$a", VEC_DUPLICATE)
 OPTAB_DC (vec_series_optab, "vec_series$a", VEC_SERIES)
 OPTAB_D (vec_shl_insert_optab, "vec_shl_insert_$a")
Index: gcc/doc/md.texi
===
--- gcc/doc/md.texi 2019-11-16 15:33:44.0 +
+++ gcc/doc/md.texi 2019-11-16 15:33:44.726783462 +
@@ -5076,6 +5076,37 @@ for (i = 1; i < GET_MODE_NUNITS (@var{n}
   operand0[i] = operand0[i - 1] && (operand1 + i < operand2);
 @end smallexample
 
+@cindex @code{check_raw_ptrs@var{m}} instruction pattern
+@item @samp{check_raw_ptrs@var{m}}
+Check whether, given two pointers @var{a} and @var{b} and a length @var{len},
+a write of @var{len} bytes at @var{a} followed by a read of @var{len} bytes
+at @var{b} can be split into interleaved byte accesses
+@samp{@var{a}[0], @var{b}[0], @var{a}[1], @var{b}[1], @dots{}}
+without affecting the dependencies between the bytes.  Set operand 0
+to true if the split is possible and false otherwise.
+
+Operands 1, 2 and 3 provide the values of @var{a}, @var{b} and @var{len}
+respectively.  Operand 4 is a constant integer that provides the known
+common alignment of @var{a} and @var{b}.  All inputs have mode @var{m}.
+
+This split is possible if:
+
+@smallexample
+@var{a} == @var{b} || @var{a} + @var{len} <= @var{b} || @var{b} + @var{len} <= 
@var{a}
+@end smallexample
+
+You should only define this pattern if the target has a way of accelerating
+the test without having to do the individual comparisons.
+
+@cindex @code{check_wa

Re: [wwwdocs] readings.html - "Porting GCC for Dunces" is gone

[Hans-Peter Nilsson]

Ping.  I personally would prefer it being on gcc.gnu.org but
will arrange for an alternative, if that for some reason would
be inappropriate.  FWIW, the PDF weighs in at a whopping 474174
bytes.

> From: Hans-Peter Nilsson 
> Date: Mon, 11 Nov 2019 13:10:41 +0100
> 
> > From: Gerald Pfeifer 
> > Date: Sun, 10 Nov 2019 14:53:23 +0100
> 
> > Hi H-P,
> > 
> > it appears this download is gone. Do you have an alternate location?
> 
> Wha...?  No, not at the moment.
> 
> >http://ftp.axis.se/pub/users/hp/pgccfd/";>
> 
> While I could certainly enter a ticket and hope to get it
> reinstated that way, I guess it's time to just take the hint.
> 
> Can it be hosted on gcc.gnu.org?  From my point of view, that
> seems appropriate.
> 
> brgds, H-P
> 

Re: [PATCH] Fix slowness in demangler

[Jeff Law]

On 11/12/19 9:39 AM, Tim Rühsen wrote:
> On 11/12/19 4:15 PM, Ian Lance Taylor wrote:
>> On Tue, Nov 12, 2019 at 6:15 AM Tim Rühsen  wrote:
>>> this is a proposal to fix
>>> https://sourceware.org/bugzilla/show_bug.cgi?id=25180
>>>
>>> In short:
>>> cxxfilt
>>> _ZZ1_DO1z1Dclaa1D1VEE1VE2zo
>>>
>>> takes several minutes with 100% CPU before it comes back with a result.
>>>
>>> With this patch the result is returned immediately. The test suite in
>>> binutils-gdb/libiberty/ throws no error.
>>>
>>> I'd like to note that I am not subscribed to the list, so please add me
>>> to CC when replying. Thanks in advance.
>> This is OK with an appropriate ChangeLog entry.
> Thanks for feedback, Ian.
> 
> Attached is the patch with a ChangeLog entry.
> 
> Regards, Tim
> 
> 
> 0001-Fix-demangler-slowness-issue.patch
> 
> From 1311f0499ff0a5353e3201587e1e50c9b9cc58c2 Mon Sep 17 00:00:00 2001
> From: =?UTF-8?q?Tim=20R=C3=BChsen?= 
> Date: Tue, 12 Nov 2019 13:10:47 +0100
> Subject: [PATCH] Fix demangler slowness issue
> 
> Fixes #25180 (binutils bugtracker)
> 
> The demangler works with two passes. The first one is for counting
> certain items. It was missing the protection against traversing subtrees
> multiple times without reaching the recursion limit.  The second pass
> had this protection.
> Without the protection it was possible to craft input that excessively
> used the CPU.
> 
> The fix uses the same mechanism as pass 2 to counterfeit this kind
> of (malicious) input.
> ---
>  include/demangle.h  |  1 +
>  libiberty/ChangeLog | 18 ++
>  libiberty/cp-demangle.c | 15 +++
>  libiberty/cp-demint.c   |  3 +++
>  4 files changed, 33 insertions(+), 4 deletions(-)
> 
> diff --git a/include/demangle.h b/include/demangle.h
> index f5d9b9e8b5..3b00dbc31a 100644
> --- a/include/demangle.h
> +++ b/include/demangle.h
> @@ -481,6 +481,7 @@ struct demangle_component
>   Initialize to zero.  Private to d_print_comp.
>   All other fields are final after initialization.  */
>int d_printing;
> +  int d_counting;
>  
>union
>{
> diff --git a/libiberty/ChangeLog b/libiberty/ChangeLog
> index 95cb1525f2..c86b06f0bf 100644
> --- a/libiberty/ChangeLog
> +++ b/libiberty/ChangeLog
> @@ -1,3 +1,21 @@
> +2019-11-12  Tim Ruehsen  
> +
> + * ../include/demangle.h (struct demangle_component):
> + Add member d_counting.
> + * cp-demangle.c (d_print_init): Remove const from 4th param.
> + (cplus_demangle_fill_name): Initialize d->d_counting.
> + (cplus_demangle_fill_extended_operator): Likewise.
> + (cplus_demangle_fill_ctor): Likewise.
> + (cplus_demangle_fill_dtor): Likewise.
> + (d_make_empty): Likewise.
> + (d_count_templates_scopes): Remobe const from 3rd param,
> + Return on dc->d_counting > 1,
> + Increment dc->d_counting.
> +* cp-demint.c (cplus_demangle_fill_component): Initialize 
> d->d_counting.
> + (cplus_demangle_fill_builtin_type): Likewise.
> + (cplus_demangle_fill_operator): Likewise.
> + This fixes bug #25180 (binutils bugtracker)
THanks.  Installed after minor twiddling of the ChangeLog.

jeff

Re: [patch,avr] Add suport for devices from the 0-series.

[Jeff Law]

On 11/8/19 9:19 AM, Georg-Johann Lay wrote:
> Hi,
> 
> this patch adds support for a few more AVR devices.  Because the offset
> where flash is seen in RAM deviates from the settings for the family
> (and hence also from the linker script defaults), a new field in
> avr_mcu_t is needed to express this so that specs can be generated
> appropriately.
> 
> The AVR_MCU lines in avr-mcus.def are longer than 80 chars because it's
> easier to maintain 1 device = 1 line entries.  And it's easier to scan
> them with the awk scripts.
> 
> Ok for trunk?
> 
> Johann
> 
> Add support for AVR devices from the 0-series.
> 
> * config/avr/avr-arch.h (avr_mcu_t) : New field.
> * config/avr/avr-devices.c (avr_mcu_types): Adjust initializers.
> * config/avr/avr-mcus.def (AVR_MCU): Add respective field.
> * config/avr/specs.h (LINK_SPEC) <%(link_pm_base_address)>: Add.
> * config/avr/gen-avr-mmcu-specs.c (print_mcu)
> <*cpp, *cpp_mcu, *cpp_avrlibc, *link_pm_base_address>: Emit code
> for spec definitions.
> * doc/avr-mmcu.texi: Regenerate.
OK
jeff

[committed] Delete common/config/powerpcspe

[Segher Boessenkool]

I missed this part in r266961.  Various people have been editing it
since; I finally noticed.

Committed.


2019-11-16  Segher Boessenkool  

* common/config/powerpcspe: Delete.

[C++20 PATCH] Implement P1920R1, Missing feature-test macros 2017-2019

[Jakub Jelinek]

Hi!

This implements the core part of P1920R1, tested on x86_64-linux,
ok for trunk if it passes full bootstrap/regtest?

Jon, are you going to handle the libstdc++ side of this, assuming
there is something still not done where we have the corresponding
features implemented already?

2019-11-16  Jakub Jelinek  

Implement P1920R1, Missing feature-test macros 2017-2019.
* c-cppbuiltin.c (c_cpp_builtins): Bump __cpp_init_captures
and __cpp_generic_lambdas for -std=c++2a.  Define
__cpp_designated_initializers, __cpp_constexpr_in_decltype and
__cpp_consteval for -std=c++2a.  Remove a FIXME comment about
__cpp_concepts for -std=c++2a.

* g++.dg/cpp1z/feat-cxx1z.C: Only compile with -std=c++17.
* g++.dg/cpp2a/feat-cxx2a.C: Adjust for P1920R1 changes.
* g++.dg/cpp2a/desig15.C: New test.
* g++.dg/cpp2a/lambda-pack-init3.C: New test.
* g++.dg/cpp2a/lambda-generic6.C: New test.
* g++.dg/cpp2a/consteval15.C: New test.

--- gcc/c-family/c-cppbuiltin.c.jj  2019-11-13 19:13:15.490048963 +0100
+++ gcc/c-family/c-cppbuiltin.c 2019-11-16 18:30:02.338883062 +0100
@@ -952,8 +952,11 @@ c_cpp_builtins (cpp_reader *pfile)
{
  /* Set feature test macros for C++14.  */
  cpp_define (pfile, "__cpp_return_type_deduction=201304L");
- cpp_define (pfile, "__cpp_init_captures=201304L");
- cpp_define (pfile, "__cpp_generic_lambdas=201304L");
+ if (cxx_dialect <= cxx17)
+   {
+ cpp_define (pfile, "__cpp_init_captures=201304L");
+ cpp_define (pfile, "__cpp_generic_lambdas=201304L");
+   }
  if (cxx_dialect <= cxx14)
cpp_define (pfile, "__cpp_constexpr=201304L");
  cpp_define (pfile, "__cpp_decltype_auto=201304L");
@@ -990,7 +993,12 @@ c_cpp_builtins (cpp_reader *pfile)
   if (cxx_dialect > cxx17)
{
  /* Set feature test macros for C++2a.  */
+ cpp_define (pfile, "__cpp_init_captures=201803L");
+ cpp_define (pfile, "__cpp_generic_lambdas=201707L");
+ cpp_define (pfile, "__cpp_designated_initializers=201707L");
+ cpp_define (pfile, "__cpp_constexpr_in_decltype=201711L");
  cpp_define (pfile, "__cpp_conditional_explicit=201806L");
+ cpp_define (pfile, "__cpp_consteval=201811L");
  cpp_define (pfile, "__cpp_constinit=201907L");
  cpp_define (pfile, "__cpp_nontype_template_parameter_class=201806L");
  cpp_define (pfile, "__cpp_impl_destroying_delete=201806L");
@@ -1000,7 +1008,6 @@ c_cpp_builtins (cpp_reader *pfile)
   if (flag_concepts)
 {
   if (cxx_dialect >= cxx2a)
-/* FIXME: Update this to the value required by the IS.  */
 cpp_define (pfile, "__cpp_concepts=201907L");
   else
 cpp_define (pfile, "__cpp_concepts=201507L");
--- gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C.jj  2019-10-19 09:22:15.756879262 
+0200
+++ gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C 2019-11-16 18:34:08.045190225 
+0100
@@ -1,5 +1,5 @@
-// { dg-do compile { target c++17 } }
-// { dg-options "-I${srcdir}/g++.dg/cpp1y -I${srcdir}/g++.dg/cpp1y/testinc" }
+// { dg-do compile }
+// { dg-options "-std=c++17 -I${srcdir}/g++.dg/cpp1y 
-I${srcdir}/g++.dg/cpp1y/testinc" }
 
 //  C++98 features:
 
--- gcc/testsuite/g++.dg/cpp2a/feat-cxx2a.C.jj  2019-10-19 09:22:16.168872968 
+0200
+++ gcc/testsuite/g++.dg/cpp2a/feat-cxx2a.C 2019-11-16 18:42:37.817528261 
+0100
@@ -122,14 +122,14 @@
 
 #ifndef __cpp_init_captures
 #  error "__cpp_init_captures"
-#elif __cpp_init_captures != 201304
-#  error "__cpp_init_captures != 201304"
+#elif __cpp_init_captures != 201803
+#  error "__cpp_init_captures != 201803"
 #endif
 
 #ifndef __cpp_generic_lambdas
 #  error "__cpp_generic_lambdas"
-#elif __cpp_generic_lambdas != 201304
-#  error "__cpp_generic_lambdas != 201304"
+#elif __cpp_generic_lambdas != 201707
+#  error "__cpp_generic_lambdas != 201707"
 #endif
 
 #ifndef __cpp_constexpr
@@ -507,3 +507,27 @@
 #elif __cpp_char8_t != 201811
 #  error "__cpp_char8_t != 201811"
 #endif
+
+#ifndef __cpp_designated_initializers
+#  error "__cpp_designated_initializers"
+#elif __cpp_designated_initializers != 201707
+#  error "__cpp_designated_initializers != 201707"
+#endif
+
+#ifndef __cpp_constexpr_in_decltype
+#  error "__cpp_constexpr_in_decltype"
+#elif __cpp_constexpr_in_decltype != 201711
+#  error "__cpp_constexpr_in_decltype != 201711"
+#endif
+
+#ifndef __cpp_consteval
+#  error "__cpp_consteval"
+#elif __cpp_consteval != 201811
+#  error "__cpp_consteval != 201811"
+#endif
+
+#ifndef __cpp_concepts
+#  error "__cpp_concepts"
+#elif __cpp_concepts != 201907
+#  error "__cpp_concepts != 201907"
+#endif
--- gcc/testsuite/g++.dg/cpp2a/desig15.C.jj 2019-11-16 19:07:37.527982693 
+0100
+++ gcc/testsuite/g++.dg/cpp2a/desig15.C2019-11-16 19:09:25.630357282 
+0100
@@ -0,0 +1,27 @@
+// { dg-do run }
+// { dg-options "-peda

Re: [patch, fortran] Load scalar intent-in variables at the beginning of procedures

[Thomas Koenig]

Hello world,

here is an update to the patch.

I have now included variables where the user did not specify INTENT(IN)
by checking that the dummy variables to be replaced by temporaries
are not, indeed, assigned a value. This also includes being passed
as an actual argument to a non-INTENT(IN) dummy argument.

Extending this led to being able to catch a few more bugs.

I have addes one test case to check where the new temporaries are added.

Regression-tested. The only change I see in the testsuite now is

XPASS: gfortran.dg/goacc/kernels-loop-n.f95   -O   scan-tree-dump-times 
parloops1 "(?n)__attribute__\\(\\(oacc kernels parallelized, oacc 
function \\(, , \\), oacc kernels, omp target entrypoint\\)\\)" 1


So, OK for trunk?

Regards

Thomas

2019-11-11  Thomas Koenig  

PR fortran/67202
* dump-parse-tree.c (debug): Add for gfc_namespace.
(show_code_node): Add INIT_ on dumping EXEC_INIT_ASSIGN.
* frontent-passes.c (replace_intent_in): Add prototype.  New
function.
(optimize_namespace): Call it.
(sym_replacement): New struct.
(defined_code_callback): New function.
(defined_expr_callback): New function.
(replace_symbol_in_expr): New function.

2019-11-11  Thomas Koenig  

PR fortran/67202
* gfortran.dg/intent_optimize_3.f90: New test.
* gfortran.dg/intent_optimize_4.f90: New test.
* gfortran.dg/pr26246_2.f90: Add -fno-frontend-optimize to flags.


Index: fortran/dump-parse-tree.c
===
--- fortran/dump-parse-tree.c	(Revision 278025)
+++ fortran/dump-parse-tree.c	(Arbeitskopie)
@@ -57,6 +57,15 @@ static void show_attr (symbol_attribute *, const c
 /* Allow dumping of an expression in the debugger.  */
 void gfc_debug_expr (gfc_expr *);
 
+void debug (gfc_namespace *ns)
+{
+  FILE *tmp = dumpfile;
+  dumpfile = stderr;
+  show_namespace (ns);
+  fputc ('\n', dumpfile);
+  dumpfile = tmp;
+}
+
 void debug (symbol_attribute *attr)
 {
   FILE *tmp = dumpfile;
@@ -1889,6 +1898,9 @@ show_code_node (int level, gfc_code *c)
   break;
 
 case EXEC_INIT_ASSIGN:
+  fputs ("INIT_", dumpfile);
+  /* Fallthrough */
+
 case EXEC_ASSIGN:
   fputs ("ASSIGN ", dumpfile);
   show_expr (c->expr1);
Index: fortran/frontend-passes.c
===
--- fortran/frontend-passes.c	(Revision 278025)
+++ fortran/frontend-passes.c	(Arbeitskopie)
@@ -57,6 +57,7 @@ static int call_external_blas (gfc_code **, int *,
 static int matmul_temp_args (gfc_code **, int *,void *data);
 static int index_interchange (gfc_code **, int*, void *);
 static bool is_fe_temp (gfc_expr *e);
+static void replace_intent_in (gfc_namespace *);
 
 #ifdef CHECKING_P
 static void check_locus (gfc_namespace *);
@@ -1467,6 +1468,7 @@ optimize_namespace (gfc_namespace *ns)
 
   if (flag_frontend_optimize)
 {
+  replace_intent_in (ns);
   gfc_code_walker (&ns->code, simplify_io_impl_do, dummy_expr_callback, NULL);
   gfc_code_walker (&ns->code, convert_do_while, dummy_expr_callback, NULL);
   gfc_code_walker (&ns->code, convert_elseif, dummy_expr_callback, NULL);
@@ -4969,7 +4971,7 @@ gfc_expr_walker (gfc_expr **e, walk_expr_fn_t expr
 	if ((*e)->expr_type != EXPR_ARRAY)
 	  break;
 
-	/* Fall through to the variable case in order to walk the
+ 	/* Fall through to the variable case in order to walk the
 	   reference.  */
 	gcc_fallthrough ();
 
@@ -5503,3 +5505,330 @@ gfc_check_externals (gfc_namespace *ns)
 
   gfc_errors_to_warnings (false);
 }
+
+/*  For scalar INTENT(IN) variables or for variables where we know
+their value is not changed, we can replace them by an auxiliary
+variable whose value is set on procedure entry.  */
+
+typedef struct sym_replacement
+{
+  gfc_symbol *original;
+  gfc_symtree *replacement_symtree;
+  bool referenced;
+
+} sym_replace;
+
+/* Callback function - replace expression if possible, and set
+   sr->referenced if this was done (so we know we need to generate
+   the assignment statement).  */
+
+static int
+replace_symbol_in_expr (gfc_expr **e, int *walk_subtrees ATTRIBUTE_UNUSED,
+			void *data)
+{
+  gfc_expr *expr = *e;
+  sym_replacement *sr;
+
+  if (expr->expr_type != EXPR_VARIABLE || expr->symtree == NULL)
+return 0;
+
+  sr = (sym_replacement *) data;
+
+  if (expr->symtree->n.sym == sr->original)
+{
+  expr->symtree = sr->replacement_symtree;
+  sr->referenced = true;
+}
+
+  return 0;
+}
+
+/* Callback to check if the symbol passed as data could be redefined.
+   Return 1 if this is the case.  */
+
+#define CHECK_TAG(member,tag)		\
+  do \
+	{ \
+	  if (co->ext.member->tag && co->ext.member->tag->symtree	\
+	  && co->ext.member->tag->symtree->n.sym == sym)		\
+	  return 1;			\
+	} while (0)
+
+static gfc_exec_op last_readwrite;
+
+/* Callback to determine i

Re: [PATCH 00/49] RFC: Add a static analysis framework to GCC

[Thomas Schwinge]

Hi David!

On 2019-11-15T20:22:47-0500, David Malcolm  wrote:
> This patch kit

(I have not looked at the patches.)  ;-)

> introduces a static analysis pass for GCC that can diagnose
> various kinds of problems in C code at compile-time (e.g. double-free,
> use-after-free, etc).

Sounds great from the description!


Would it make sense to add to the wiki page
 a (high-level)
comparison to other static analyzers (Coverity, cppcheck,
clang-static-analyzer, others?), in terms of how they work, what their
respective benefits are, what their design goals are, etc.  (Of course
understanding that yours is much less mature at this point; talking about
high-level design rather than current implementation status.)

For example, why do we want that in GCC instead of an external tool -- in
part covered in your Rationale.  Can a compiler-side implementation
benefit from having more information available than an external tool?
GCC-side implementation is readily available (modulo GCC plugin
installation?) vs. external ones need to be installed/set up first.
GCC-side one only works with GCC-supported languages.  GCC-side one
analyzes actual code being compiled -- thinking about preprocessor-level
'#if' etc., which surely are problematic for external tools that are not
actually replicating a real build.  And so on.  (If you don't want to
spell out Coverity, cppcheck, clang-static-analyzer, etc., maybe just
compare yours to external tools.)

Just an idea, because I wondered about these things.


> The analyzer runs as an IPA pass on the gimple SSA representation.
> It associates state machines with data, with transitions at certain
> statements and edges.  It finds "interesting" interprocedural paths
> through the user's code, in which bogus state transitions happen.
>
> For example, given:
>
>free (ptr);
>free (ptr);
>
> at the first call, "ptr" transitions to the "freed" state, and
> at the second call the analyzer complains, since "ptr" is already in
> the "freed" state (unless "ptr" is NULL, in which case it stays in
> the NULL state for both calls).
>
> Specific state machines include:
> - a checker for malloc/free, for detecting double-free, resource leaks,
>   use-after-free, etc (sm-malloc.cc), and

I can immediately see how this can be useful for a bunch of
'malloc'/'free'-like etc. OpenACC Runtime Library calls as well as source
code directives.  ..., and this would've flagged existing code in the
libgomp OpenACC tests, which recently has given me some grief. Short
summary/examples:

In addition to host-side 'malloc'/'free', there is device-side (separate
memory space) 'acc_malloc'/'acc_free'.  Static checking example: don't
mix up host-side and device-side pointers.  (Both are normal C/C++
pointers.  Hmm, maybe such checking could easily be implemented even
outside of your checker by annotating the respective function
declarations with an attribute describing which in/out arguments are
host-side vs. device-side pointers.)

Then, there are functions to "map" host-side and device-side memory:
'acc_map_data'/'acc_unmap_data'.  Static checking example: you must not
'acc_free' memory spaces that are still mapped.

Then, there are functions like 'acc_create' (or equivalent directives
like '#pragma acc create') doing both 'acc_malloc', 'acc_map_data'
(plus/depending on internal reference counting).  Static checking
example: for a pointer returned by 'acc_create" etc., you must use
'acc_delete' etc. instead of 'acc_free', which first does
'acc_unmap_data' before interal 'acc_free' (..., and again all that
depending on reference counting).  (Might be "interesting" to teach your
checker about the reference counting -- if that is actually necessary;
needs further thought.)


> The checker is implemented as a GCC plugin.
>
> The patch kit adds support for "in-tree" plugins i.e. GCC plugins that
> would live in the GCC source tree and be shipped as part of the GCC tarball,
> with a new:
>   --enable-plugins=[LIST OF PLUGIN NAMES]
> configure option, analogous to --enable-languages (the Makefile/configure
> machinery for handling in-tree GCC plugins is adapted from how we support
> frontends).

I like that.  Implementing this as a plugin surely must help to either
document the GCC plugin interface as powerful/mature for such a task.  Or
make it so, if it isn't yet.  ;-)

> The default is for no such plugins to be enabled, so the default would
> be that the checker isn't built - you'd have to opt-in to building it,
> with --enable-plugins=analyzer

I'd favor a default of '--enable-plugins=default' which enables the
"usable" plugins.


> It's not clear to me whether I should focus on:
>
> (a) pruning the scope of the checker so that it works well on
> *intra*procedural C examples (and bail on anything more complex), perhaps
> targetting GCC 10 as an optional extra hidden behind
> --enable-plugins=analyzer, or
>
> (b) work on deeper interprocedural analysis (and fixin

[PATCH] libstdc++: Optimize std::jthread construction

[Jonathan Wakely]

This change avoids storing a copy of a stop_token object that isn't
needed and won't be passed to the callable object. This slightly reduces
memory usage when the callable doesn't use a stop_token. It also removes
indirection in the invocation of the callable in the new thread, as
there is no lambda and no additional calls to std::invoke.

It also adds some missing [[nodiscard]] attributes, and the non-member
swap overload for std::jthread.

* include/std/thread (jthread::jthread()): Use nostopstate constant.
(jthread::jthread(Callable&&, Args&&...)): Use helper function to
create std::thread instead of indirection through a lambda. Use
remove_cvref_t instead of decay_t.
(jthread::joinable(), jthread::get_id(), jthread::native_handle())
(jthread::hardware_concurrency()): Add nodiscard attribute.
(swap(jthread&. jthread&)): Define hidden friend.
(jthread::_S_create): New helper function for constructor.

Tested powerpc64le-linux, committed to trunk.

As discussed with Tom, we also plan to replace the use of shared_ptr
in stop_source and stop_token with something more lightweight, that
doesn't store a weak count and two copies of the pointer.

commit 650ad104007e2f3474d735ec642b7613886cfcfe
Author: Jonathan Wakely 
Date:   Sat Nov 16 21:32:05 2019 +

libstdc++: Optimize std::jthread construction

This change avoids storing a copy of a stop_token object that isn't
needed and won't be passed to the callable object. This slightly reduces
memory usage when the callable doesn't use a stop_token. It also removes
indirection in the invocation of the callable in the new thread, as
there is no lambda and no additional calls to std::invoke.

It also adds some missing [[nodiscard]] attributes, and the non-member
swap overload for std::jthread.

* include/std/thread (jthread::jthread()): Use nostopstate constant.
(jthread::jthread(Callable&&, Args&&...)): Use helper function to
create std::thread instead of indirection through a lambda. Use
remove_cvref_t instead of decay_t.
(jthread::joinable(), jthread::get_id(), jthread::native_handle())
(jthread::hardware_concurrency()): Add nodiscard attribute.
(swap(jthread&. jthread&)): Define hidden friend.
(jthread::_S_create): New helper function for constructor.

diff --git a/libstdc++-v3/include/std/thread b/libstdc++-v3/include/std/thread
index 93afa766d18..010921b2160 100644
--- a/libstdc++-v3/include/std/thread
+++ b/libstdc++-v3/include/std/thread
@@ -425,31 +425,17 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 using native_handle_type = std::thread::native_handle_type;
 
 jthread() noexcept
-: _M_stop_source{ nostopstate_t{ } }
+: _M_stop_source{nostopstate}
 { }
 
 template, jthread>>>
-explicit
-jthread(_Callable&& __f, _Args&&... __args)
-  : _M_thread{[](stop_token __token, auto&& __cb, auto&&... __args)
-  {
-if constexpr(std::is_invocable_v<_Callable, stop_token, 
_Args...>)
-  {
-std::invoke(std::forward(__cb),
-std::move(__token),
-std::forward(__args)...);
-  }
-else
-  {
-std::invoke(std::forward(__cb),
-std::forward(__args)...);
-  }
-  },
-  _M_stop_source.get_token(),
-  std::forward<_Callable>(__f),
-  std::forward<_Args>(__args)...}
-{ }
+typename = enable_if_t,
+  jthread>>>
+  explicit
+  jthread(_Callable&& __f, _Args&&... __args)
+  : _M_thread{_S_create(_M_stop_source, std::forward<_Callable>(__f),
+   std::forward<_Args>(__args)...)}
+  { }
 
 jthread(const jthread&) = delete;
 jthread(jthread&&) noexcept = default;
@@ -476,7 +462,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   std::swap(_M_thread, __other._M_thread);
 }
 
-bool
+[[nodiscard]] bool
 joinable() const noexcept
 {
   return _M_thread.joinable();
@@ -494,19 +480,19 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   _M_thread.detach();
 }
 
-id
+[[nodiscard]] id
 get_id() const noexcept
 {
   _M_thread.get_id();
 }
 
-native_handle_type
+[[nodiscard]] native_handle_type
 native_handle()
 {
   return _M_thread.native_handle();
 }
 
-static unsigned
+[[nodiscard]] static unsigned
 hardware_concurrency() noexcept
 {
   return std::thread::hardware_concurrency();
@@ -529,7 +515,24 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   return get_stop_source().request_stop();
 }
 
+friend void swap(jthread& __lhs, jthread& __r

[PATCH] Revert r278363 "Start work on header"

[Jonathan Wakely]

This was not meant to on the branch I committed r278364 from, as it is
not ready to commit yet.

* include/std/ranges: Revert accidentally committed changes.

Patch omitted, since it's just removing the broken code I committed a
few minutes ago, but I'll be committing to trunk shortly.

Re: [wwwdocs] readings.html - "Porting GCC for Dunces" is gone

[Gerald Pfeifer]

On Sat, 16 Nov 2019, Hans-Peter Nilsson wrote:
> Ping.  I personally would prefer it being on gcc.gnu.org but
> will arrange for an alternative, if that for some reason would
> be inappropriate.  FWIW, the PDF weighs in at a whopping 474174
> bytes.

I was first thinking where to upload it on ftp://gcc.gnu.org, but
there doesn't appear to be an ideal place there (and do we want/
need this to be mirrored)?

How about if you upload it to the Wiki and we use that link?

Gerald

New modref/ipa_modref optimization passes

[David Čepelík]

Dear GCC developers,

Below you may find a patch which implements two new optimization
passes, called "modref" and "ipa_modref", which operate on GIMPLE and
during WPO, respectively.

What the passes do is fairly simple: for each analyzed function, they
collect information about loads and stores performed by that function.
The GIMPLE pass collects alias sets. The IPA pass collects sequences of
types that make up each load/store. The IPA pass furthermore constructs
a transitive closure from the data (so that we have information about
loads/stores each function, and any function that it calls, performs).

The data is collected in a data structure called a "modref tree". That's
a really simple tree-like structure which is three levels deep; the
first level is indexed by the base of the access, the second level is
indexed by the ref of the access (using what seems to be standard GCC
terminology for the innermost and outermost type of a reference) and the
last is indexed by the range of the access (currently unused). The data
structure's primary function is to organize the data and be able to
quickly answer, given a load/store, whether any other load/store in the
tree may alias it.

The data structure has configurable limits on the size of each level and
attempts to degrade gracefully when the limit is reached (i.e., it tries
to keep as much information as possible without exceeding the limits).

There's a lot of work to be done, but I believe it should mostly be
refactoring and enhancing existing alias analysis by using the
information which these new analyses collect.

On the refactoring part: I need to rewrite the data structure to get rid
of the C++ template. Since the data structure is used for both the
GIMPLE pass and the IPA pass, which are indexed by alias sets and GIMPLE
trees, respectively, a C++ template seemed appropriate. Wrong.
Especially getting GC to work with a custom template was a nightmare,
not to mention it brought lots of funky C++ peculiarities which I prefer
to avoid.

In the end, I couldn't avoid code duplication anyway, so some functions
have a _tree and an _ipa version; I will address that as well.

The integration with the alias oracle will be done incrementally over a
series of patches which I will prepare with Honza Hubička. These
shouldn't require extensive changes, so I hope they're fine as part of
early stage3.

No doubt, there will be some coding style issues and other violations of
common sense which I have not yet learned.

Last, I need to apologize. The patch worked with bootstrapping and
passed all tests (except what was already broken in master). However,
I've rebased at the last minute which was a poor judgement. With current
master, I'm getting loads of warnings in stage2 with regard to unused
variables and a few other diagnostics. I won't be able to fix that
immediately as I need to discuss it with Honza first. It's therefore
possible that I broke something with my the rebase and clean-ups. Please
bear with me, I will fix this ASAP and send an updated version of the
patch, which will bootstrap and pass all tests again with current
master.


To summarize, this patch implements a new analysis to collect
information about loads/stores in functions. That can be used (and is
used already, for the GIMPLE part) in the alias oracle. In theory, this
should substantially improve alias analysis capabilities of GCC, leading
to many more disambiguations in the alias oracle (because there will be
much more information available about function's load/store refs). The
patch needs a good deal of cleaning up and some further plumbing is
required to get it to do some real work in the alias oracle. I think
this is doable as part of stage3. I would very much like to see this in
the upcoming release as I've spent quite some time with it.

I'd like to thank Honza Hubička (my advisor) who was instrumental in
putting this together. (But all bugs are mine.) Thanks go also to other
guys from SUSE and others who were helping me to debug some peculiar
issues with the garbage collector.

 Regards, David

From 7d63fa301c12455aa6e9ba1b68f72e2d93fc2d2d Mon Sep 17 00:00:00 2001
From: David Cepelik 
Date: Fri, 11 Oct 2019 21:15:23 +0200
Subject: [PATCH] Modref pass

---
 ChangeLog|   20 +
 gcc/ChangeLog|   22 ++
 gcc/Makefile.in  |4 +
 gcc/gengtype.c   |2 +-
 gcc/ipa-modref.c | 1012 ++
 gcc/ipa-modref.h |   43 +++
 gcc/lto-section-in.c |3 +-
 gcc/lto-streamer.h   |1 +
 gcc/modref-tree.c|  342 +
 gcc/modref-tree.h|  355 ++
 gcc/params.opt   |   12 +
 gcc/passes.def   |5 +
 gcc/timevar.def  |2 +
 gcc/tree-pass.h  |2 +
 gcc/tree-ssa-alias.c |  105 +-
 15 files changed, 1924 insertions(+), 6 deletions(-)
 create mode 100644 gcc/ipa-modref.c
 create mode 100644 gcc/ipa-modref.h
 create mode 100644

[C++ PATCH] c++/91353 - P1331R2: Allow trivial default init in constexpr contexts.

[Marek Polacek]

[ Working virtually on Baker Island. ]

This patch implements C++20 P1331, allowing trivial default initialization in
constexpr contexts.

I used Jakub's patch from the PR which allowed uninitialized variables in
constexpr contexts.  But the hard part was handling CONSTRUCTOR_NO_CLEARING
which is always cleared in cxx_eval_call_expression.  We need to set it in
the case a constexpr constructor doesn't initialize all the members, so that
we can give proper diagnostic instead of value-initializing.  A lot of my
attempts flopped but then I came up with this approach, which handles various
cases as tested in constexpr-init8.C, where S is initialized by a non-default
constexpr constructor, and constexpr-init9.C, using delegating constructors.
And the best part is that I didn't need any new cx_check_missing_mem_inits
calls!  Just save the information whether a constructor is missing an init
into constexpr_fundef_table and retrieve it when needed.

constexpr-init10.C demonstrates that we can now elide a constructor call,
this is caused by the walk_field_subobs hunk.  I hope that's OK.

(No attempts to fix DR 2256 were made.)

Bootstrapped/regtested on x86_64-linux, ok for trunk?

2019-11-16  Marek Polacek  
Jakub Jelinek  

PR c++/91353 - P1331R2: Allow trivial default init in constexpr 
contexts.
* c-cppbuiltin.c (c_cpp_builtins): Adjust the value of __cpp_constexpr.

* class.c (trivial_default_constructor_is_constexpr): Return true in
C++20.
* constexpr.c (constexpr_fundef): Add a bool member.
(retrieve_constexpr_fundef): Initialize it.
(cx_check_missing_mem_inits): New pointer-to-bool parameter, with a
default value NULL.  Allow missing field initializers in C++20.
(register_constexpr_fundef): Adjust a call to
cx_check_missing_mem_inits.  Set missing_init.
(cxx_eval_call_expression): Set CONSTRUCTOR_NO_CLEARING on a constexpr
constructor that doesn't initialize all the members.
* decl.c (check_for_uninitialized_const_var): Permit trivial default
initialization in constexpr.
* method.c (walk_field_subobs): Still consider a constructor that
doesn't initialize all the members constexpr.

* g++.dg/cpp0x/constexpr-array6.C: Adjust dg-error.
* g++.dg/cpp0x/constexpr-ctor.C: Likewise.
* g++.dg/cpp0x/constexpr-diag3.C: Likewise.
* g++.dg/cpp0x/constexpr-diag4.C: Likewise.
* g++.dg/cpp0x/constexpr-ex3.C: Likewise.
* g++.dg/cpp0x/constexpr-template2.C: Likewise.
* g++.dg/cpp0x/constexpr-union2.C: Likewise.
* g++.dg/cpp0x/lambda/lambda-mangle.C: Rip out a piece of code ...
* g++.dg/cpp0x/lambda/lambda-mangle6.C: ... and put it here.
* g++.dg/cpp0x/pr79118.C: Adjust dg-error.
* g++.dg/cpp1y/constexpr-83921-3.C: Likewise.
* g++.dg/cpp1y/constexpr-neg1.C: Likewise.
* g++.dg/cpp1z/constexpr-lambda12.C: Likewise.
* g++.dg/cpp1z/feat-cxx1z.C: Use -std=c++17.
* g++.dg/cpp2a/constexpr-init1.C: New test.
* g++.dg/cpp2a/constexpr-init2.C: New test.
* g++.dg/cpp2a/constexpr-init3.C: New test.
* g++.dg/cpp2a/constexpr-init4.C: New test.
* g++.dg/cpp2a/constexpr-init5.C: New test.
* g++.dg/cpp2a/constexpr-init6.C: New test.
* g++.dg/cpp2a/constexpr-init7.C: New test.
* g++.dg/cpp2a/constexpr-init8.C: New test.
* g++.dg/cpp2a/constexpr-init9.C: New test.
* g++.dg/cpp2a/constexpr-init10.C: New test.
* g++.dg/cpp2a/constexpr-try5.C: Adjust dg-error.
* g++.dg/cpp2a/feat-cxx2a.C: Test __cpp_constexpr.
* g++.dg/cpp2a/lambda-mangle.C: New test.
* g++.dg/debug/dwarf2/pr44641.C: Skip for c++2a.
* g++.dg/ext/stmtexpr21.C: Adjust dg-error.

diff --git gcc/c-family/c-cppbuiltin.c gcc/c-family/c-cppbuiltin.c
index 76d1e4a380e..9766d7f96c4 100644
--- gcc/c-family/c-cppbuiltin.c
+++ gcc/c-family/c-cppbuiltin.c
@@ -972,7 +972,8 @@ c_cpp_builtins (cpp_reader *pfile)
  cpp_define (pfile, "__cpp_fold_expressions=201603L");
  cpp_define (pfile, "__cpp_nontype_template_args=201411L");
  cpp_define (pfile, "__cpp_range_based_for=201603L");
- cpp_define (pfile, "__cpp_constexpr=201603L");
+ if (cxx_dialect <= cxx17)
+   cpp_define (pfile, "__cpp_constexpr=201603L");
  cpp_define (pfile, "__cpp_if_constexpr=201606L");
  cpp_define (pfile, "__cpp_capture_star_this=201603L");
  cpp_define (pfile, "__cpp_inline_variables=201606L");
@@ -991,6 +992,7 @@ c_cpp_builtins (cpp_reader *pfile)
{
  /* Set feature test macros for C++2a.  */
  cpp_define (pfile, "__cpp_conditional_explicit=201806L");
+ cpp_define (pfile, "__cpp_constexpr=201907L");
  cpp_define (pfile, "__cpp_constinit=201907L");
  cpp_define (pfile, "__cpp_nontype_template_parameter_class=201806L");
  cpp_define 

[C++ PATCH] Implement C++20 P1814R0, CTAD for alias templates.

[Jason Merrill]

This patch implements C++20 class template argument deduction for alias 
templates, which works by a moderately arcane transformation of the 
deduction guides for the underlying class template.  When implementing 
it, I found that I could simplify the rules in the draft a bit and get 
the same effect; I'll be emailing the committee to that effect soon.


While working on this I ran into various shortcomings in our handling of 
constrained alias templates (like B in the testcase), and fixed those in 
a separate patch.


Tested x86_64-pc-linux-gnu.  I'm going to clean this up a bit more 
before checking it in, but am sending this functional patch now before 
the end of stage 1.
commit dfa6229b66fa6186e67e3602a89a02e4f2b7ad27
Author: Jason Merrill 
Date:   Fri Nov 15 16:24:58 2019 -0500

Implement P1814R0, CTAD for alias templates.

* pt.c (rewrite_tparm_list): Factor out of build_deduction_guide.
(maybe_aggr_guide): Check for copy-init here.
(alias_ctad_tweaks): New.
(deduction_guides_for): Factor out of do_class_deduction.
(ctad_template_p): New.
* parser.c (cp_parser_simple_type_specifier): Use it.
* constraint.cc (append_constraint): New.

diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 2a626d6d1ac..e943400d978 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -6820,6 +6820,7 @@ extern tree make_constrained_auto		(tree, tree);
 extern tree make_constrained_decltype_auto	(tree, tree);
 extern tree make_template_placeholder		(tree);
 extern bool template_placeholder_p		(tree);
+extern bool ctad_template_p			(tree);
 extern tree do_auto_deduction   (tree, tree, tree,
  tsubst_flags_t
 		 = tf_warning_or_error,
diff --git a/gcc/cp/constraint.cc b/gcc/cp/constraint.cc
index c973d487245..3fe17f4a6ee 100644
--- a/gcc/cp/constraint.cc
+++ b/gcc/cp/constraint.cc
@@ -,6 +,20 @@ build_constraints (tree tr, tree dr)
   return (tree)ci;
 }
 
+/* Add constraint RHS to the end of CONSTRAINT_INFO ci.  */
+
+tree
+append_constraint (tree ci, tree rhs)
+{
+  tree dr = CI_DECLARATOR_REQS (ci);
+  dr = combine_constraint_expressions (dr, rhs);
+  CI_DECLARATOR_REQS (ci) = dr;
+  tree ac = CI_ASSOCIATED_CONSTRAINTS (ci);
+  ac = combine_constraint_expressions (ac, rhs);
+  CI_ASSOCIATED_CONSTRAINTS (ci) = ac;
+  return ci;
+}
+
 /* A mapping from declarations to constraint information.  */
 
 static GTY ((cache)) tree_cache_map *decl_constraints;
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index a80b4c818bb..a109fc17356 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -18072,8 +18072,7 @@ cp_parser_simple_type_specifier (cp_parser* parser,
 		 /*ambiguous_decls=*/NULL,
 		 token->location);
 	  if (tmpl && tmpl != error_mark_node
-		  && (DECL_CLASS_TEMPLATE_P (tmpl)
-		  || DECL_TEMPLATE_TEMPLATE_PARM_P (tmpl)))
+		  && ctad_template_p (tmpl))
 		type = make_template_placeholder (tmpl);
 	  else if (flag_concepts && tmpl && concept_definition_p (tmpl))
 		type = cp_parser_placeholder_type_specifier (parser, loc,
diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c
index 08b4713035b..75832ceabab 100644
--- a/gcc/cp/pt.c
+++ b/gcc/cp/pt.c
@@ -27747,6 +27747,29 @@ rewrite_template_parm (tree olddecl, unsigned index, unsigned level,
   return newdecl;
 }
 
+/* As rewrite_template_parm, but for the whole TREE_LIST representing a
+   template parameter.  */
+
+static tree
+rewrite_tparm_list (tree oldelt, unsigned index, unsigned level,
+		tree targs, unsigned targs_index, tsubst_flags_t complain)
+{
+  tree olddecl = TREE_VALUE (oldelt);
+  tree newdecl = rewrite_template_parm (olddecl, index, level,
+	targs, complain);
+  if (newdecl == error_mark_node)
+return error_mark_node;
+  tree newdef = tsubst_template_arg (TREE_PURPOSE (oldelt),
+ targs, complain, NULL_TREE);
+  tree list = build_tree_list (newdef, newdecl);
+  TEMPLATE_PARM_CONSTRAINTS (list)
+= tsubst_constraint_info (TEMPLATE_PARM_CONSTRAINTS (oldelt),
+			  targs, complain, NULL_TREE);
+  int depth = TMPL_ARGS_DEPTH (targs);
+  TMPL_ARG (targs, depth, targs_index) = template_parm_to_arg (list);
+  return list;
+}
+
 /* Returns a C++17 class deduction guide template based on the constructor
CTOR.  As a special case, CTOR can be a RECORD_TYPE for an implicit default
guide, REFERENCE_TYPE for an implicit copy/move guide, or TREE_LIST for an
@@ -27860,19 +27883,12 @@ build_deduction_guide (tree type, tree ctor, tree outer_args, tsubst_flags_t com
 	  unsigned index = i + clen;
 	  unsigned level = 1;
 	  tree oldelt = TREE_VEC_ELT (ftparms, i);
-	  tree olddecl = TREE_VALUE (oldelt);
-	  tree newdecl = rewrite_template_parm (olddecl, index, level,
-		tsubst_args, complain);
-	  if (newdecl == error_mark_node)
+	  tree newelt
+		= rewrite_tparm_list (oldelt, index, level,
+  tsubst_args, i, co

[PATCH] combine: Don't set the same thing twice in one parallel

[Segher Boessenkool]

Instead, make the second arm copy from the dest of the first set.  Most
of the time this copy will be optimized away later.

I am still testing this across many archs; will commit later if that
works out well.


Segher


2019-11-16  Segher Boessenkool  

* combine.c (try_combine): If we get a parallel setting the same value
to two locations, only set it once and copy that.

---
 gcc/combine.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/gcc/combine.c b/gcc/combine.c
index fdfa587..dec3c01 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -4122,6 +4122,22 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, 
rtx_insn *i0,
   rtx set0 = XVECEXP (newpat, 0, 0);
   rtx set1 = XVECEXP (newpat, 0, 1);
 
+  /* If both set the same value, do it once and copy it; the copy
+can usually be optimised away later.  */
+  if (rtx_equal_p (SET_SRC (set0), SET_SRC (set1))
+ && !modified_between_p (SET_SRC (set0), i2, i3)
+ && !(REG_P (SET_DEST (set0))
+  && find_reg_note (i2, REG_DEAD, SET_DEST (set0)))
+ && !(GET_CODE (SET_DEST (set0)) == SUBREG
+  && find_reg_note (i2, REG_DEAD, SUBREG_REG (SET_DEST (set0
+ && !modified_between_p (SET_DEST (set0), i2, i3)
+ && (!HAVE_cc0 || !reg_referenced_p (cc0_rtx, set1)))
+{
+ newi2pat = set0;
+ newpat = set1;
+ SUBST (SET_SRC (newpat), SET_DEST (newi2pat));
+   }
+  else
   /* Normally, it doesn't matter which of the two is done first,
 but the one that references cc0 can't be the second, and
 one which uses any regs/memory set in between i2 and i3 can't
-- 
1.8.3.1

[PATCH] rs6000: Allow mode GPR in cceq_{ior,rev}_compare

[Segher Boessenkool]

Also make it a parmeterized name: @cceq_{ior,rev}_compare_.

Committing to trunk.


Segher


2019-11-16  Segher Boessenkool  

* config/rs6000/rs6000.md (cceq_ior_compare): Rename to...
(@cceq_ior_compare_ for GPR): ... this.  Allow GPR instead of
just SI.
(cceq_rev_compare): Rename to...
(@cceq_rev_compare_ for GPR): ... this.  Allow GPR instead of
just SI.
(define_split for tf_): Add SImode first argument to
gen_cceq_ior_compare.

---
 gcc/config/rs6000/rs6000.md | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 040fc88..8dc0a29 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -12420,15 +12420,15 @@ (define_insn "*creturn"
 ; which are generated by the branch logic.
 ; Prefer destructive operations where BT = BB (for crXX BT,BA,BB)
 
-(define_insn "cceq_ior_compare"
+(define_insn "@cceq_ior_compare_"
   [(set (match_operand:CCEQ 0 "cc_reg_operand" "=y,?y")
-(compare:CCEQ (match_operator:SI 1 "boolean_operator"
-   [(match_operator:SI 2
+(compare:CCEQ (match_operator:GPR 1 "boolean_operator"
+   [(match_operator:GPR 2
  "branch_positive_comparison_operator"
  [(match_operand 3
  "cc_reg_operand" "y,y")
   (const_int 0)])
-(match_operator:SI 4
+(match_operator:GPR 4
  "branch_positive_comparison_operator"
  [(match_operand 5
  "cc_reg_operand" "0,y")
@@ -12460,9 +12460,9 @@ (define_insn "cceq_ior_compare_complement"
   [(set_attr "type" "cr_logical")
(set_attr "cr_logical_3op" "no,yes")])
 
-(define_insn "*cceq_rev_compare"
+(define_insn "@cceq_rev_compare_"
   [(set (match_operand:CCEQ 0 "cc_reg_operand" "=y,?y")
-   (compare:CCEQ (match_operator:SI 1
+   (compare:CCEQ (match_operator:GPR 1
  "branch_positive_comparison_operator"
  [(match_operand 2
  "cc_reg_operand" "0,y")
@@ -12897,7 +12897,7 @@ (define_split
 
   rtx andexpr = gen_rtx_AND (SImode, ctrcmpcc, cccmp);
   if (ispos)
- emit_insn (gen_cceq_ior_compare (operands[9], andexpr, ctrcmpcc,
+ emit_insn (gen_cceq_ior_compare (SImode, operands[9], andexpr, ctrcmpcc,
  operands[8], cccmp, ccin));
   else
  emit_insn (gen_cceq_ior_compare_complement (operands[9], andexpr, 
ctrcmpcc,
-- 
1.8.3.1

[PATCH] libstdc++: Define C++20 range utilities and range factories

[Jonathan Wakely]

This adds another chunk of the  header.

The changes from P1456R1 (Move-only views) and P1862R1 (Range adaptors
for non-copyable iterators) are included, but not the changes from
P1870R1 (forwarding-range is too subtle).

The tests for subrange and iota_view are poor and should be improved.

* include/bits/regex.h (match_results): Specialize __enable_view_impl.
* include/bits/stl_set.h (set): Likewise.
* include/bits/unordered_set.h (unordered_set, unordered_multiset):
Likewise.
* include/debug/multiset.h (__debug::multiset): Likewise.
* include/debug/set.h (__debug::set): Likewise.
* include/debug/unordered_set (__debug::unordered_set)
(__debug::unordered_multiset): Likewise.
* include/std/ranges (ranges::view, ranges::enable_view)
(ranges::view_interface, ranges::subrange, ranges::empty_view)
(ranges::single_view, ranges::views::single, ranges::iota_view)
(ranges::views::iota): Define for C++20.
* testsuite/std/ranges/empty_view.cc: New test.
* testsuite/std/ranges/iota_view.cc: New test.
* testsuite/std/ranges/single_view.cc: New test.
* testsuite/std/ranges/view.cc: New test.

Tested powerpc64le-linux, committed to trunk.

commit 6567feabca709d030a37e275de58a1186218cf36
Author: Jonathan Wakely 
Date:   Sun Nov 17 00:52:45 2019 +

libstdc++: Define C++20 range utilities and range factories

This adds another chunk of the  header.

The changes from P1456R1 (Move-only views) and P1862R1 (Range adaptors
for non-copyable iterators) are included, but not the changes from
P1870R1 (forwarding-range is too subtle).

The tests for subrange and iota_view are poor and should be improved.

* include/bits/regex.h (match_results): Specialize 
__enable_view_impl.
* include/bits/stl_set.h (set): Likewise.
* include/bits/unordered_set.h (unordered_set, unordered_multiset):
Likewise.
* include/debug/multiset.h (__debug::multiset): Likewise.
* include/debug/set.h (__debug::set): Likewise.
* include/debug/unordered_set (__debug::unordered_set)
(__debug::unordered_multiset): Likewise.
* include/std/ranges (ranges::view, ranges::enable_view)
(ranges::view_interface, ranges::subrange, ranges::empty_view)
(ranges::single_view, ranges::views::single, ranges::iota_view)
(ranges::views::iota): Define for C++20.
* testsuite/std/ranges/empty_view.cc: New test.
* testsuite/std/ranges/iota_view.cc: New test.
* testsuite/std/ranges/single_view.cc: New test.
* testsuite/std/ranges/view.cc: New test.

diff --git a/libstdc++-v3/include/bits/regex.h 
b/libstdc++-v3/include/bits/regex.h
index 7869c3fd1c1..49994369563 100644
--- a/libstdc++-v3/include/bits/regex.h
+++ b/libstdc++-v3/include/bits/regex.h
@@ -2056,9 +2056,18 @@ _GLIBCXX_BEGIN_NAMESPACE_CXX11
 match_results<_Bi_iter, _Alloc>& __rhs) noexcept
 { __lhs.swap(__rhs); }
 
-
 _GLIBCXX_END_NAMESPACE_CXX11
 
+#if __cplusplus > 201703L
+namespace ranges::__detail
+{
+  template inline constexpr bool __enable_view_impl;
+  template
+inline constexpr bool __enable_view_impl>
+  = false;
+} // namespace ranges::__detail
+#endif // C++20
+
   // [28.11.2] Function template regex_match
   /**
* @name Matching, Searching, and Replacing
diff --git a/libstdc++-v3/include/bits/stl_multiset.h 
b/libstdc++-v3/include/bits/stl_multiset.h
index 96fa14e2afa..9e34961f4a5 100644
--- a/libstdc++-v3/include/bits/stl_multiset.h
+++ b/libstdc++-v3/include/bits/stl_multiset.h
@@ -1039,6 +1039,16 @@ _GLIBCXX_END_NAMESPACE_CONTAINER
   { return __set._M_t; }
 };
 
+#if __cplusplus > 201703L
+namespace ranges::__detail
+{
+  template inline constexpr bool __enable_view_impl;
+  template
+inline constexpr bool
+  __enable_view_impl<_GLIBCXX_STD_C::multiset<_Key, _Compare, _Alloc>>
+   = false;
+} // namespace ranges::__detail
+#endif // C++20
 #endif // C++17
 
 _GLIBCXX_END_NAMESPACE_VERSION
diff --git a/libstdc++-v3/include/bits/stl_set.h 
b/libstdc++-v3/include/bits/stl_set.h
index 279b9705d78..135d57af496 100644
--- a/libstdc++-v3/include/bits/stl_set.h
+++ b/libstdc++-v3/include/bits/stl_set.h
@@ -1051,6 +1051,15 @@ _GLIBCXX_END_NAMESPACE_CONTAINER
   _S_get_tree(_GLIBCXX_STD_C::multiset<_Val, _Cmp2, _Alloc>& __set)
   { return __set._M_t; }
 };
+#if __cplusplus > 201703L
+namespace ranges::__detail
+{
+  template inline constexpr bool __enable_view_impl;
+  template
+inline constexpr bool
+  __enable_view_impl<_GLIBCXX_STD_C::set<_Key, _Compare, _Alloc>> = false;
+} // namespace ranges::__detail
+#endif // C++20
 #endif // C++17
 
 _GLIBCXX_END_NAMESPACE_VERSION
diff --git a/libstdc++-v3/include/bits/unordered_set.h 
b/libstdc++-v3/include/bits/unordered_set.h
index 8ebcaf40263..9894

Fwd: [PATCH,libstdc++] C++ constexpr tuple is broken.

[Ed Smith-Rowland via gcc-patches]

I missed a file in my recent patch for C++20 constexpr tuple. Bestrafe Mich.

Ed


2019-11-16  Edward Smith-Rowland  <3dw...@verizon.net>

	Repair the  part of C++20 p1032 Misc constexpr bits.
	* include/bits/uses_allocator.h (__uses_alloc0::_Sink::operaror=)
	(__use_alloc(const _Alloc&)) : Constexpr.


Index: include/bits/uses_allocator.h
===
--- include/bits/uses_allocator.h	(revision 278366)
+++ include/bits/uses_allocator.h	(working copy)
@@ -72,7 +72,7 @@
 
   struct __uses_alloc0 : __uses_alloc_base
   {
-struct _Sink { void operator=(const void*) { } } _M_a;
+struct _Sink { void _GLIBCXX20_CONSTEXPR operator=(const void*) { } } _M_a;
   };
 
   template
@@ -109,6 +109,7 @@
   __uses_alloc::value, _Tp, _Alloc, _Args...>;
 
   template
+_GLIBCXX20_CONSTEXPR
 inline __uses_alloc_t<_Tp, _Alloc, _Args...>
 __use_alloc(const _Alloc& __a)
 {

Re: [C++20 PATCH] Implement P1920R1, Missing feature-test macros 2017-2019

[Jonathan Wakely]

On 16/11/19 20:38 +0100, Jakub Jelinek wrote:

Hi!

This implements the core part of P1920R1, tested on x86_64-linux,
ok for trunk if it passes full bootstrap/regtest?

Jon, are you going to handle the libstdc++ side of this, assuming
there is something still not done where we have the corresponding
features implemented already?


I think it's mostly done already, but I'll check it next week.

Re: Fwd: [PATCH,libstdc++] C++ constexpr tuple is broken.

[Jonathan Wakely]

On 16/11/19 20:19 -0500, Ed Smith-Rowland via libstdc++ wrote:

I missed a file in my recent patch for C++20 constexpr tuple. Bestrafe Mich.

Ed




OK for trunk, thanks.



2019-11-16  Edward Smith-Rowland  <3dw...@verizon.net>

Repair the  part of C++20 p1032 Misc constexpr bits.
* include/bits/uses_allocator.h (__uses_alloc0::_Sink::operaror=)
(__use_alloc(const _Alloc&)) : Constexpr.





Index: include/bits/uses_allocator.h
===
--- include/bits/uses_allocator.h   (revision 278366)
+++ include/bits/uses_allocator.h   (working copy)
@@ -72,7 +72,7 @@

  struct __uses_alloc0 : __uses_alloc_base
  {
-struct _Sink { void operator=(const void*) { } } _M_a;
+struct _Sink { void _GLIBCXX20_CONSTEXPR operator=(const void*) { } } _M_a;
  };

  template
@@ -109,6 +109,7 @@
  __uses_alloc::value, _Tp, _Alloc, _Args...>;

  template
+_GLIBCXX20_CONSTEXPR
inline __uses_alloc_t<_Tp, _Alloc, _Args...>
__use_alloc(const _Alloc& __a)
{

Re: [C++ PATCH] Fix up spaceship diagnostics

[Jason Merrill]

Ok, thanks.

On Fri, Nov 15, 2019, 7:47 PM Jakub Jelinek  wrote:

> Hi!
>
> While working on the __builtin_source_location patch, I've noticed that
> these two messages are weird:
> spaceship-err3.C:11:12: error: ‘std::std::strong_ordering’ is not a type
> spaceship-err3.C:11:12: note: forming type of ‘operator<=>’
> spaceship-err3.C:13:14: error:
> ‘std::partial_ordering::std::partial_ordering::equivalent()’ is not a
> static data member
> spaceship-err3.C:13:14: note: determining value of ‘operator<=>’
> Note the doubled std:: in the first case and std::partial_ordering:: in the
> second case.  Most of the code that uses %<%T::%D%> elsewhere prints
> DECL_NAME rather than the actual decl, but in this case when it is a decl,
> there is no need to prefix it with anything.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> 2019-11-16  Jakub Jelinek  
>
> * method.c (lookup_comparison_result): Use %qD instead of
> %<%T::%D%>
> to print the decl.
> (lookup_comparison_category): Use %qD instead of % to
> print
> the decl.
>
> * g++.dg/cpp2a/spaceship-err3.C: New test.
>
> --- gcc/cp/method.c.jj  2019-11-13 19:13:12.059100901 +0100
> +++ gcc/cp/method.c 2019-11-16 00:07:56.080097451 +0100
> @@ -924,7 +924,7 @@ lookup_comparison_result (tree type, con
>   if (decl == error_mark_node || TREE_CODE (decl) == TREE_LIST)
> qualified_name_lookup_error (type, name, decl, input_location);
>   else
> -   error ("%<%T::%D%> is not a static data member", type, decl);
> +   error ("%qD is not a static data member", decl);
>   inform (input_location, "determining value of %qs",
> "operator<=>");
> }
>return error_mark_node;
> @@ -951,7 +951,7 @@ lookup_comparison_category (comp_cat_tag
>   if (decl == error_mark_node || TREE_CODE (decl) == TREE_LIST)
> qualified_name_lookup_error (std_node, name, decl,
> input_location);
>   else
> -   error ("% is not a type", decl);
> +   error ("%qD is not a type", decl);
>   inform (input_location, "forming type of %qs", "operator<=>");
> }
>return error_mark_node;
> --- gcc/testsuite/g++.dg/cpp2a/spaceship-err3.C.jj  2019-11-16
> 00:11:19.105048135 +0100
> +++ gcc/testsuite/g++.dg/cpp2a/spaceship-err3.C 2019-11-16
> 00:12:21.637108940 +0100
> @@ -0,0 +1,14 @@
> +// { dg-do compile { target c++2a } }
> +
> +namespace std
> +{
> +  int strong_ordering;
> +  struct partial_ordering {
> +static int equivalent ();
> +  };
> +}
> +
> +auto a = 1 <=> 2;  // { dg-error "'std::strong_ordering' is not a
> type" }
> +   // { dg-message "forming type of 'operator<=>'" ""
> { target *-*-* } .-1 }
> +auto b = 3.0 <=> 4.0;  // { dg-error
> "'std::partial_ordering::equivalent\\(\\)' is not a static data member" }
> +   // { dg-message "determining value of
> 'operator<=>'" "" { target *-*-* } .-1 }
>
> Jakub
>
>

[PATCH] libstdc++: add range constructor for std::string_view (P1391R4)

[Jonathan Wakely]

* include/std/string_view (basic_string_view(It, End)): Add range
constructor and deduction guide from P1391R4.
* testsuite/21_strings/basic_string_view/cons/char/range.cc: New test.

Tested powerpc64le-linux, committed to trunk.


commit e0c554e4da7310df83bb1dcc7b8e6c4c9c5a2a4f
Author: redi 
Date:   Sun Nov 17 01:32:55 2019 +

libstdc++: add range constructor for std::string_view (P1391R4)

* include/std/string_view (basic_string_view(It, End)): Add range
constructor and deduction guide from P1391R4.
* testsuite/21_strings/basic_string_view/cons/char/range.cc: New 
test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@278371 
138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/libstdc++-v3/include/std/string_view 
b/libstdc++-v3/include/std/string_view
index ff1c0c3f36f..9d2a8e8e0c2 100644
--- a/libstdc++-v3/include/std/string_view
+++ b/libstdc++-v3/include/std/string_view
@@ -130,6 +130,16 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   : _M_len{__len}, _M_str{__str}
   { }
 
+#if __cplusplus > 201703L && __cpp_lib_concepts
+  template _End>
+   requires same_as, _CharT>
+ && (!convertible_to<_End, size_type>)
+   constexpr
+   basic_string_view(_It __first, _End __last)
+   : _M_len(__last - __first), _M_str(std::to_address(__first))
+   { }
+#endif
+
   constexpr basic_string_view&
   operator=(const basic_string_view&) noexcept = default;
 
@@ -457,6 +467,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   const _CharT* _M_str;
 };
 
+#if __cplusplus > 201703L && __cpp_lib_concepts && __cpp_deduction_guides
+  template _End>
+basic_string_view(_It, _End) -> basic_string_view>;
+#endif
+
   // [string.view.comparison], non-member basic_string_view comparison function
 
   // Several of these functions use type_identity_t to create a non-deduced
diff --git 
a/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range.cc 
b/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range.cc
new file mode 100644
index 000..d554b77c874
--- /dev/null
+++ b/libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/range.cc
@@ -0,0 +1,42 @@
+// Copyright (C) 2019 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// .
+
+// { dg-options "-std=gnu++2a" }
+// { dg-do run { target c++2a } }
+
+#include 
+#include 
+#include 
+
+constexpr char str[] = "abcdefg";
+constexpr std::basic_string_view s(std::begin(str), std::cend(str) - 1);
+static_assert( s == str );
+static_assert( s.data() == str );
+
+void
+test01()
+{
+  std::vector v{'a', 'b', 'c'};
+  std::basic_string_view s(v.begin(), v.end());
+  VERIFY( s.data() == v.data() );
+}
+
+int
+main()
+{
+  test01();
+}