Re: [PATCH][debug] Fix pre_dec handling in vartrack

[Jakub Jelinek]

On Sun, Jul 15, 2018 at 11:21:56PM +0200, Tom de Vries wrote:
> 2018-07-15  Tom de Vries  
> 
>   * var-tracking.c (vt_initialize): Fix pre_dec handling.  Print adjusted
>   insn slim if dump_flags request TDF_SLIM.
> 
>   * gcc.target/i386/vartrack-1.c: New test.
> 
> ---
> --- a/gcc/var-tracking.c
> +++ b/gcc/var-tracking.c
> @@ -115,6 +115,7 @@
>  #include "tree-pretty-print.h"
>  #include "rtl-iter.h"
>  #include "fibonacci_heap.h"
> +#include "print-rtl.h"
>  
>  typedef fibonacci_heap  bb_heap_t;
>  typedef fibonacci_node  bb_heap_node_t;
> @@ -10208,12 +10209,17 @@ vt_initialize (void)
>   log_op_type (PATTERN (insn), bb, insn,
>MO_ADJUST, dump_file);
> VTI (bb)->mos.safe_push (mo);
> -   VTI (bb)->out.stack_adjust += pre;
>   }
>   }
>  
> cselib_hook_called = false;
> adjust_insn (bb, insn);
> +
> +   if (!frame_pointer_needed)
> + {
> +   if (pre)
> + VTI (bb)->out.stack_adjust += pre;
> + }

That is certainly unexpected.  For the pre side-effects, they should be
applied before adjusting the insn, not after that.
I'll want to see this under the debugger.

> if (DEBUG_MARKER_INSN_P (insn))
>   {
> reemit_marker_as_note (insn);
> @@ -10227,7 +10233,10 @@ vt_initialize (void)
> cselib_process_insn (insn);
> if (dump_file && (dump_flags & TDF_DETAILS))
>   {
> -   print_rtl_single (dump_file, insn);
> +   if (dump_flags & TDF_SLIM)
> + dump_insn_slim (dump_file, insn);
> +   else
> + print_rtl_single (dump_file, insn);
> dump_cselib_table (dump_file);
>   }
>   }

This part is certainly ok.

Jakub

Re: [PATCH] Fix part of PR86389

[Richard Biener]

On Fri, 13 Jul 2018, Sandra Loosemore wrote:

> On 07/03/2018 07:55 AM, Richard Biener wrote:
> > 
> > Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
> > 
> > Richard.
> > 
> >  From 52aad98947e5cfcb5624ff24f0c557d0029c34fe Mon Sep 17 00:00:00 2001
> > From: Richard Guenther 
> > Date: Tue, 3 Jul 2018 14:04:01 +0200
> > Subject: [PATCH] fix-pr86389
> > 
> > 2018-07-03  Richard Biener  
> > 
> > PR ipa/86389
> > * tree-ssa-structalias.c (find_func_clobbers): Properly
> > handle indirect calls.
> > 
> > * gcc.dg/torture/pr86389.c: New testcase.
> 
> FYI, it looks like this new testcase requires
> 
> /* { dg-require-effective-target trampolines } */
> 
> as it is failing on a target without nested function support. Alternatively,
> maybe the testcase could be rewritten not to use a nested function?  I'm not
> sure if nested-ness is required to test the bug this issue was for.

Fixed.

Richard.

2018-07-16  Richard Biener  

PR ipa/86389
* gcc.dg/torture/pr86389.c: Require trampolines.

Index: gcc/testsuite/gcc.dg/torture/pr86389.c
===
--- gcc/testsuite/gcc.dg/torture/pr86389.c  (revision 262676)
+++ gcc/testsuite/gcc.dg/torture/pr86389.c  (working copy)
@@ -1,4 +1,5 @@
 /* { dg-do run } */
+/* { dg-require-effective-target trampolines } */
 /* { dg-additional-options "-fipa-pta" } */
 
 void callme (void (*callback) (void));

[PATCH, S/390] Improved support for the Linux kernel Ftrace

[Ilya Leoshkevich]

This is the counterpart of the i386 feature introduced by
39a5a6a4: Add direct support for Linux kernel __fentry__ patching.

[PATCH 2/3] S/390: Implement -mrecord-mcount

[Ilya Leoshkevich]

This is the counterpart of the i386 feature introduced by
39a5a6a4: Add direct support for Linux kernel __fentry__ patching.

* gcc/config/s390/s390.c (s390_function_profiler): Generate
__mcount_loc section.
* gcc/config/s390/s390.opt: Add the new option.
* gcc/testsuite/gcc.target/s390/mrecord-mcount.c:
New testcase.
---
 gcc/config/s390/s390.c | 10 ++
 gcc/config/s390/s390.opt   |  4 
 gcc/testsuite/gcc.target/s390/mrecord-mcount.c | 10 ++
 3 files changed, 24 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/s390/mrecord-mcount.c

diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 3a406b955a0..600501c1e27 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -13151,6 +13151,9 @@ s390_function_profiler (FILE *file, int labelno)
   op[4] = gen_rtx_CONST (Pmode, op[4]);
 }
 
+  if (flag_record_mcount)
+fprintf (file, "1:\n");
+
   if (flag_fentry)
 {
   if (cfun->static_chain_decl)
@@ -13204,6 +13207,13 @@ s390_function_profiler (FILE *file, int labelno)
   output_asm_insn ("basr\t%0,%0", op);
   output_asm_insn ("l\t%0,%1", op);
 }
+
+  if (flag_record_mcount)
+{
+  fprintf (file, "\t.section __mcount_loc, \"a\",@progbits\n");
+  fprintf (file, "\t.%s 1b\n", TARGET_64BIT ? "quad" : "long");
+  fprintf (file, "\t.previous\n");
+}
 }
 
 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
diff --git a/gcc/config/s390/s390.opt b/gcc/config/s390/s390.opt
index 59e97d031b4..9a3ed651450 100644
--- a/gcc/config/s390/s390.opt
+++ b/gcc/config/s390/s390.opt
@@ -298,3 +298,7 @@ mfentry
 Target Report Var(flag_fentry)
 Emit profiling counter call at function entry before prologue. The compiled
 code will require a 64-bit CPU and glibc 2.29 or newer to run.
+
+mrecord-mcount
+Target Report Var(flag_record_mcount)
+Generate __mcount_loc section with all _mcount and __fentry__ calls.
diff --git a/gcc/testsuite/gcc.target/s390/mrecord-mcount.c 
b/gcc/testsuite/gcc.target/s390/mrecord-mcount.c
new file mode 100644
index 000..d8a23ffdca4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/mrecord-mcount.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-pg -mrecord-mcount" } */
+
+void
+profileme (void)
+{
+  /* { dg-final { scan-assembler ".section __mcount_loc, \"a\",@progbits" } } 
*/
+  /* { dg-final { scan-assembler ".quad 1b" } } */
+  /* { dg-final { scan-assembler ".previous" } } */
+}
-- 
2.17.1

[PATCH 3/3] S/390: Implement -mnop-mcount

[Ilya Leoshkevich]

This is the counterpart of the i386 feature introduced by
39a5a6a4: Add direct support for Linux kernel __fentry__ patching.

On i386 the profiler call sequence always consists of 1 call
instruction, so -mnop-mcount generates a single nop with the same
length as a call. For S/390 longer sequences may be used in some
cases, so -mnop-mcount generates the corresponding amount of nops.

* gcc/config/s390/s390.c (s390_function_profiler): Generate
nops instead of profiler call sequences.
* gcc/config/s390/s390.opt: Add the new option.
* gcc/testsuite/gcc.target/s390/mnop-mcount-m31-fpic.c:
New testcase.
* gcc/testsuite/gcc.target/s390/mnop-mcount-m31-mzarch.c
New testcase.
* gcc/testsuite/gcc.target/s390/mnop-mcount-m31.c
New testcase.
* gcc/testsuite/gcc.target/s390/mnop-mcount-m64-mfentry.c
New testcase.
* gcc/testsuite/gcc.target/s390/mnop-mcount-m64.c
New testcase.
---
 gcc/config/s390/s390.c| 113 +-
 gcc/config/s390/s390.opt  |   5 +
 .../gcc.target/s390/mnop-mcount-m31-fpic.c|   8 ++
 .../gcc.target/s390/mnop-mcount-m31-mzarch.c  |   8 ++
 .../gcc.target/s390/mnop-mcount-m31.c |   8 ++
 .../gcc.target/s390/mnop-mcount-m64-mfentry.c |   8 ++
 .../gcc.target/s390/mnop-mcount-m64.c |   8 ++
 7 files changed, 129 insertions(+), 29 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/s390/mnop-mcount-m31-fpic.c
 create mode 100644 gcc/testsuite/gcc.target/s390/mnop-mcount-m31-mzarch.c
 create mode 100644 gcc/testsuite/gcc.target/s390/mnop-mcount-m31.c
 create mode 100644 gcc/testsuite/gcc.target/s390/mnop-mcount-m64-mfentry.c
 create mode 100644 gcc/testsuite/gcc.target/s390/mnop-mcount-m64.c

diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 600501c1e27..ba18cb1c39a 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -13123,6 +13123,30 @@ s390_trampoline_init (rtx m_tramp, tree fndecl, rtx 
cxt)
   emit_move_insn (mem, fnaddr);
 }
 
+static void
+output_asm_nops (const char *user, int hw)
+{
+  asm_fprintf (asm_out_file, "\t# NOPs for %s (%d halfwords)\n", user, hw);
+  while (hw > 0)
+{
+  if (TARGET_CPU_ZARCH && hw >= 3)
+{
+  output_asm_insn ("brcl\t0,0", NULL);
+  hw -= 3;
+}
+  else if (hw >= 2)
+{
+  output_asm_insn ("bc\t0,0", NULL);
+  hw -= 2;
+}
+  else
+{
+  output_asm_insn ("bcr\t0,0", NULL);
+  hw -= 1;
+}
+}
+}
+
 /* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry.  */
 
@@ -13156,7 +13180,9 @@ s390_function_profiler (FILE *file, int labelno)
 
   if (flag_fentry)
 {
-  if (cfun->static_chain_decl)
+  if (flag_nop_mcount)
+output_asm_nops ("-mnop-mcount", /* brasl */ 3);
+  else if (cfun->static_chain_decl)
 warning (OPT_Wcannot_profile, "nested functions cannot be profiled "
  "with -mfentry on s390");
   else
@@ -13164,48 +13190,77 @@ s390_function_profiler (FILE *file, int labelno)
 }
   else if (TARGET_64BIT)
 {
-  output_asm_insn ("stg\t%0,%1", op);
-  output_asm_insn ("larl\t%2,%3", op);
-  output_asm_insn ("brasl\t%0,%4", op);
-  output_asm_insn ("lg\t%0,%1", op);
+  if (flag_nop_mcount)
+output_asm_nops ("-mnop-mcount", /* stg */ 3 + /* larl */ 3 +
+ /* brasl */ 3 + /* lg */ 3);
+  else
+{
+  output_asm_insn ("stg\t%0,%1", op);
+  output_asm_insn ("larl\t%2,%3", op);
+  output_asm_insn ("brasl\t%0,%4", op);
+  output_asm_insn ("lg\t%0,%1", op);
+}
 }
   else if (TARGET_CPU_ZARCH)
 {
-  output_asm_insn ("st\t%0,%1", op);
-  output_asm_insn ("larl\t%2,%3", op);
-  output_asm_insn ("brasl\t%0,%4", op);
-  output_asm_insn ("l\t%0,%1", op);
+  if (flag_nop_mcount)
+output_asm_nops ("-mnop-mcount", /* st */ 2 + /* larl */ 3 +
+ /* brasl */ 3 + /* l */ 2);
+  else
+{
+  output_asm_insn ("st\t%0,%1", op);
+  output_asm_insn ("larl\t%2,%3", op);
+  output_asm_insn ("brasl\t%0,%4", op);
+  output_asm_insn ("l\t%0,%1", op);
+}
 }
   else if (!flag_pic)
 {
   op[6] = gen_label_rtx ();
 
-  output_asm_insn ("st\t%0,%1", op);
-  output_asm_insn ("bras\t%2,%l6", op);
-  output_asm_insn (".long\t%4", op);
-  output_asm_insn (".long\t%3", op);
-  targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
-  output_asm_insn ("l\t%0,0(%2)", op);
-  output_asm_insn ("l\t%2,4(%2)", op);
-  output_asm_insn ("basr\t%0,%0", op);
-  output_asm_insn ("l\t%0,%1", op);
+  if (flag_nop_mcount)
+output_asm_nops ("-mnop-mcount", /* st */ 2 + /* bras */ 2 +
+ /* .long *

[PATCH 1/3] S/390: Implement -mfentry

[Ilya Leoshkevich]

This is the counterpart of the i386 feature introduced by
39a5a6a4: Add direct support for Linux kernel __fentry__ patching.

On i386, the difference between mcount and fentry is that fentry
comes before the prolog. On s390 mcount already comes before the
prolog, but takes 4 instructions. This patch introduces the more
efficient implementation (just 1 instruction) and puts it under
-mfentry flag.

The produced code is compatible only with newer glibc versions,
which provide the __fentry__ symbol and do not clobber %r0 when
resolving lazily bound functions. Because 31-bit PLT stubs assume
%r12 contains GOT address, which is not the case when the code runs
before the prolog, -mfentry is allowed only for 64-bit code.

Also, code compiled with -mfentry cannot be used for the nested C
functions, since they both use %r0. In this case instrumentation is
not insterted, and a new warning is issued for each affected nested
function.

* gcc/common.opt: Add the new warning.
* gcc/config/s390/s390.c (s390_function_profiler): Emit
"brasl %r0,__fentry__" when -mfentry is specified.
(s390_option_override_internal): Disallow -mfentry for
31-bit CPUs.
* gcc/config/s390/s390.opt: Add the new option.
* gcc/testsuite/gcc.target/s390/mfentry-m64.c:
New testcase.
---
 gcc/common.opt  |  5 +
 gcc/config/s390/s390.c  | 18 --
 gcc/config/s390/s390.opt|  5 +
 gcc/testsuite/gcc.target/s390/mfentry-m64.c |  8 
 4 files changed, 34 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/s390/mfentry-m64.c

diff --git a/gcc/common.opt b/gcc/common.opt
index c29abdb5cb1..4d031e81b09 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -571,6 +571,11 @@ Wattribute-alias
 Common Var(warn_attributes) Init(1) Warning
 Warn about type safety and similar errors in attribute alias and related.
 
+Wcannot-profile
+Common Var(warn_cannot_profile) Init(1) Warning
+Warn when profiling instrumentation was requested, but could not be applied to
+a certain function.
+
 Wcast-align
 Common Var(warn_cast_align) Warning
 Warn about pointer casts which increase alignment.
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 23c3f3db621..3a406b955a0 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -13144,14 +13144,22 @@ s390_function_profiler (FILE *file, int labelno)
   op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
   SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
 
-  op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
+  op[4] = gen_rtx_SYMBOL_REF (Pmode, flag_fentry ? "__fentry__" : "_mcount");
   if (flag_pic)
 {
   op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
   op[4] = gen_rtx_CONST (Pmode, op[4]);
 }
 
-  if (TARGET_64BIT)
+  if (flag_fentry)
+{
+  if (cfun->static_chain_decl)
+warning (OPT_Wcannot_profile, "nested functions cannot be profiled "
+ "with -mfentry on s390");
+  else
+output_asm_insn ("brasl\t0,%4", op);
+}
+  else if (TARGET_64BIT)
 {
   output_asm_insn ("stg\t%0,%1", op);
   output_asm_insn ("larl\t%2,%3", op);
@@ -15562,6 +15570,12 @@ s390_option_override_internal (bool main_args_p,
   /* Call target specific restore function to do post-init work.  At the 
moment,
  this just sets opts->x_s390_cost_pointer.  */
   s390_function_specific_restore (opts, NULL);
+
+  /* Check whether -mfentry is supported. It cannot be used in 31-bit mode,
+ because 31-bit PLT stubs assume that %r12 contains GOT address, which is
+ not the case when the code runs before the prolog. */
+  if (opts->x_flag_fentry && !TARGET_64BIT)
+error ("-mfentry is supported only for 64-bit CPUs");
 }
 
 static void
diff --git a/gcc/config/s390/s390.opt b/gcc/config/s390/s390.opt
index eb16f9c821f..59e97d031b4 100644
--- a/gcc/config/s390/s390.opt
+++ b/gcc/config/s390/s390.opt
@@ -293,3 +293,8 @@ locations which have been patched as part of using one of 
the
 -mindirect-branch* or -mfunction-return* options.  The sections
 consist of an array of 32 bit elements. Each entry holds the offset
 from the entry to the patched location.
+
+mfentry
+Target Report Var(flag_fentry)
+Emit profiling counter call at function entry before prologue. The compiled
+code will require a 64-bit CPU and glibc 2.29 or newer to run.
diff --git a/gcc/testsuite/gcc.target/s390/mfentry-m64.c 
b/gcc/testsuite/gcc.target/s390/mfentry-m64.c
new file mode 100644
index 000..aa3fc81248f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/mfentry-m64.c
@@ -0,0 +1,8 @@
+/* { dg-do compile { target { lp64 } } } */
+/* { dg-options "-pg -mfentry" } */
+
+void
+profileme (void)
+{
+  /* { dg-final { scan-assembler "brasl\t0,__fentry__" } } */
+}
-- 
2.17.1

[patch] Fix PR tree-optimization/86514

[Eric Botcazou]

Hi,

this is a regression present on the mainline and 8 branch in the form of wrong 
code generated for an Ada program manipulating bit-packed boolean array types.

The problem is in the new range optimization code of the reassoc pass: from

  _64 = _63 | 4;
  _73 = _64 & 191;
  _76 = _64 >> 6;
  _77 = (boolean) _76;
  _78 = (boolean) _64;
  _79 = _77 | _78;

it deduces:

Optimizing range tests _76 +[0, 0] and _64 +[0, 0]
|...]
  _64 = _63 | 4;
  _73 = _64 & 191;
  _76 = _64 >> 6;
  _90 = _76 | _64;
  _19 = _90 != 0;
  _77 = (boolean) _76;
  _78 = (boolean) _64;
  _79 = _19;

which is not equivalent.  The proposed fix is to avoid bypassing a conversion 
to a boolean type from a type with greater precision in init_range_entry.

Tested on x86_64-suse-linux, OK for the mainline?


2018-07-16  Eric Botcazou  

PR tree-optimization/86514
* tree-ssa-reassoc.c (init_range_entry) : Return for a
conversion to a boolean type from a type with greater precision.


2018-07-16  Eric Botcazou  

* gnat.dg/opt73.adb: New test.

-- 
Eric BotcazouIndex: tree-ssa-reassoc.c
===
--- tree-ssa-reassoc.c	(revision 262658)
+++ tree-ssa-reassoc.c	(working copy)
@@ -2168,8 +2168,13 @@ init_range_entry (struct range_entry *r,
 	  continue;
 	CASE_CONVERT:
 	  if (is_bool)
-	goto do_default;
-	  if (TYPE_PRECISION (TREE_TYPE (arg0)) == 1)
+	{
+	  if ((TYPE_PRECISION (exp_type) == 1
+		   || TREE_CODE (exp_type) == BOOLEAN_TYPE)
+		  && TYPE_PRECISION (TREE_TYPE (arg0)) > 1)
+		return;
+	}
+	  else if (TYPE_PRECISION (TREE_TYPE (arg0)) == 1)
 	{
 	  if (TYPE_UNSIGNED (TREE_TYPE (arg0)))
 		is_bool = true;
-- { dg-do run }
-- { dg-options "-O" }

procedure Opt73 is

   type Terminal_Set_Indexed_By_Non_Terminal is
 array (Natural range <>, Natural  range <>) of Boolean with Pack;

   type Terminal_Set_Per_Non_Terminal
 (Last_Terminal : Natural;
  Last_Non_Terminal : Natural) is
   record
  Map : Terminal_Set_Indexed_By_Non_Terminal
(1 .. Last_Non_Terminal, 0 .. Last_Terminal);
   end record;

   Follow : Terminal_Set_Per_Non_Terminal (5, 4);
   Expect : Terminal_Set_Per_Non_Terminal :=
 (5, 4, (1 => (2 => True, others => False),
 others => (others => False)));

   procedure Get_Follow (Value : out Terminal_Set_Per_Non_Terminal) is
   begin
  Value.Map := (others => (others => False));
  Value.Map (1, 2) := True;
  Value.Map (2, 0) := Value.Map (2, 0) or Value.Map (1, 0);
   end;

begin
   Get_Follow (Follow);
   if Follow /= Expect then
  raise Program_Error;
   end if;
end;

Re: [PATCH] S/390: libstdc++: 64 and 32 bit baseline update

[Andreas Krebbel]

On 07/13/2018 04:58 PM, Andreas Schwab wrote:
> On Jul 13 2018, Andreas Krebbel  wrote:
> 
>> @@ -5645,3 +5657,5 @@ OBJECT:8:_ZTTSi@@GLIBCXX_3.4
>>  OBJECT:8:_ZTTSo@@GLIBCXX_3.4
>>  OBJECT:8:_ZTTSt13basic_istreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
>>  OBJECT:8:_ZTTSt13basic_ostreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
>> +TLS:4:_ZSt11__once_call@@GLIBCXX_3.4.11
>> +TLS:4:_ZSt15__once_callable@@GLIBCXX_3.4.11
> 
> You should not have any TLS entries.

Ok, thanks. I've committed the patch with these entries removed.

Andreas

Re: [Patch, Fortran] PR 85599: warn about short-circuiting of logical expressions for non-pure functions

[Janus Weil]

Hi Thomas,

>> I tested it on a fairly large code base and found no further false
>> positives. Also it still regtests cleanly. Ok for trunk?
>
>
> while I still disagree with this on principle, I will not stand
> in the way.

IIUC you disagree in the sense that you would like gfortran to have
more such optimizations (with more corresponding warnings). Is that
correct?

I hope you can at least agree that the warnings I'm adding in the
patch are a) useful and b) sufficient for the current state of
optimizations?

Modifying gfortran's runtime behavior is really a separate question
that we can continue to discuss later, probably with some amount of
controversy. But before we even go there, I would really like to have
warnings for the optimizations we have now ...


> However, one point: I think that the warning should be under a separate
> warning, which should then be enabled by -Wextra.
> -Waggressive-function-elimination, could be reused for this,
> or something else

I don't actually see such a flag in the manual.

I do see "-faggressive-function-elimination"
(https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html), but
that is about changing runtime behavior, not about throwing warnings.

Do you propose to couple the warning to
-faggressive-function-elimination (and also the short-circuiting
behavior itself)?
Or do you propose to add a flag named -Waggressive-function-elimination?

Cheers,
Janus

Re: [patch] Fix PR tree-optimization/86514

[Richard Biener]

On Mon, Jul 16, 2018 at 9:52 AM Eric Botcazou  wrote:
>
> Hi,
>
> this is a regression present on the mainline and 8 branch in the form of wrong
> code generated for an Ada program manipulating bit-packed boolean array types.
>
> The problem is in the new range optimization code of the reassoc pass: from
>
>   _64 = _63 | 4;
>   _73 = _64 & 191;
>   _76 = _64 >> 6;
>   _77 = (boolean) _76;
>   _78 = (boolean) _64;
>   _79 = _77 | _78;
>
> it deduces:
>
> Optimizing range tests _76 +[0, 0] and _64 +[0, 0]
> |...]
>   _64 = _63 | 4;
>   _73 = _64 & 191;
>   _76 = _64 >> 6;
>   _90 = _76 | _64;
>   _19 = _90 != 0;
>   _77 = (boolean) _76;
>   _78 = (boolean) _64;
>   _79 = _19;
>
> which is not equivalent.  The proposed fix is to avoid bypassing a conversion
> to a boolean type from a type with greater precision in init_range_entry.
>
> Tested on x86_64-suse-linux, OK for the mainline?

OK for trunk and branch.

Thanks,
Richard.

>
> 2018-07-16  Eric Botcazou  
>
> PR tree-optimization/86514
> * tree-ssa-reassoc.c (init_range_entry) : Return for a
> conversion to a boolean type from a type with greater precision.
>
>
> 2018-07-16  Eric Botcazou  
>
> * gnat.dg/opt73.adb: New test.
>
> --
> Eric Botcazou

Re: [PATCH, middle-end]: Fix PR86511, traps are generated for non-trapping compares

[Richard Biener]

On Fri, Jul 13, 2018 at 5:40 PM Uros Bizjak  wrote:
>
> As demonstrated in the PR, middle-end changes the trappines of the
> compare by expanding non-trapping compare to a combination of
> setcc/cmove branchless code, e.g. UNLT is split to UNORDERED setcc and
> LT cmove.
>
> The above conversion is invalid w.r.t traps, since UNLT doesn't trap
> on NaNs, while LT does.
>
> The solution is to avoid the above expansion for compares that would
> change their trappines and emit jumps around
>
> 2018-07-13  Uros Bizjak  
>
> PR target/86511
> * expmed.c (emit_store_flag): Do not emit setcc followed by a
> conditional move when trapping comparison was split to a
> non-trapping one (and vice versa).
>
> Patch was bootstrapped and regression tested on x86_64-linux-gnu
> {,-m32}, regression tests on alphaev68-linux-gnu are still running.
>
> OK for mainline and branch?

OK.

Thanks,
Richard.

> Uros.

[PATCH 3/4] Define MAX_CODE_ALIGN globally.

[marxin]

gcc/ChangeLog:

2018-07-11  Martin Liska  

* align.h (MAX_CODE_ALIGN): New.
(MAX_CODE_ALIGN_VALUE): New.
* common/config/i386/i386-common.c (ix86_handle_option):
(MAX_CODE_ALIGN): Moved to align.h.
* final.c (MAX_CODE_ALIGN): Likewise.
* opts.c (parse_and_check_align_values):
(MAX_CODE_ALIGN): Likewise.
(MAX_CODE_ALIGN_VALUE): Likewise.
---
 gcc/align.h  | 4 
 gcc/common/config/i386/i386-common.c | 3 ---
 gcc/final.c  | 1 -
 gcc/opts.c   | 4 
 4 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/gcc/align.h b/gcc/align.h
index 5a5d6c752a3..9acce47cf9b 100644
--- a/gcc/align.h
+++ b/gcc/align.h
@@ -74,3 +74,7 @@ struct align_flags
 
   align_flags_tuple levels[2];
 };
+
+/* Define maximum supported code alignment.  */
+#define MAX_CODE_ALIGN 16
+#define MAX_CODE_ALIGN_VALUE (1 << MAX_CODE_ALIGN)
diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c
index 277ee55a093..70b3c3f2fc3 100644
--- a/gcc/common/config/i386/i386-common.c
+++ b/gcc/common/config/i386/i386-common.c
@@ -1318,9 +1318,6 @@ ix86_handle_option (struct gcc_options *opts,
   return true;
 
 
-  /* Comes from final.c -- no real reason to change it.  */
-#define MAX_CODE_ALIGN 16
-
 case OPT_malign_loops_:
   warning_at (loc, 0, "-malign-loops is obsolete, use -falign-loops");
   if (value > MAX_CODE_ALIGN)
diff --git a/gcc/final.c b/gcc/final.c
index 59eb75c3d63..445a3fe938a 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -842,7 +842,6 @@ shorten_branches (rtx_insn *first)
   rtx_insn *insn;
   int max_uid;
   int i;
-#define MAX_CODE_ALIGN 16
   rtx_insn *seq;
   int something_changed = 1;
   char *varying_length;
diff --git a/gcc/opts.c b/gcc/opts.c
index e536607fe79..0625b15b27b 100644
--- a/gcc/opts.c
+++ b/gcc/opts.c
@@ -1805,10 +1805,6 @@ parse_and_check_align_values (const char *flag,
   return false;
 }
 
-  /* Comes from final.c -- no real reason to change it.  */
-#define MAX_CODE_ALIGN 16
-#define MAX_CODE_ALIGN_VALUE (1 << MAX_CODE_ALIGN)
-
   for (unsigned i = 0; i < result_values.length (); i++)
 if (result_values[i] > MAX_CODE_ALIGN_VALUE)
   {

[PATCH 2/4] Fix coding style of ASM_OUTPUT_ALIGN.

[marxin]

gcc/ChangeLog:

2018-07-11  Martin Liska  

* config/i386/att.h (ASM_OUTPUT_ALIGN): Fix spacing
in order to fulfil coding style.
* config/i386/cygming.h (ASM_OUTPUT_ALIGN): Likewise.
* config/i386/gas.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Likewise.
* config/i386/x86-64.h (ASM_OUTPUT_MAX_SKIP_PAD): Likewise.
* config/iq2000/iq2000.h (ASM_OUTPUT_ALIGN): Likewise.
* config/pa/pa.h (ASM_OUTPUT_ALIGN): Likewise.
* config/sparc/sol2.h (ASM_OUTPUT_ALIGN_WITH_NOP): Likewise.
* config/sparc/sparc.h (ASM_OUTPUT_ALIGN): Likewise.
* config/visium/visium.h (ASM_OUTPUT_ALIGN): Likewise.
(ASM_OUTPUT_MAX_SKIP_ALIGN): Likewise.
---
 gcc/config/i386/att.h  | 2 +-
 gcc/config/i386/cygming.h  | 2 +-
 gcc/config/i386/gas.h  | 2 +-
 gcc/config/i386/x86-64.h   | 2 +-
 gcc/config/iq2000/iq2000.h | 2 +-
 gcc/config/pa/pa.h | 2 +-
 gcc/config/sparc/sol2.h| 2 +-
 gcc/config/sparc/sparc.h   | 2 +-
 gcc/config/visium/visium.h | 4 ++--
 9 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/gcc/config/i386/att.h b/gcc/config/i386/att.h
index 8e4bc2e8d94..7dd359b9001 100644
--- a/gcc/config/i386/att.h
+++ b/gcc/config/i386/att.h
@@ -57,7 +57,7 @@ do\
to a multiple of 2**LOG bytes.  */
 
 #define ASM_OUTPUT_ALIGN(FILE,LOG)	\
-if ((LOG)!=0) fprintf ((FILE), "\t.align %d\n", 1<<(LOG))
+if ((LOG) != 0) fprintf ((FILE), "\t.align %d\n", 1 << (LOG))
 
 /* This is how to output an assembler line
that says to advance the location counter by SIZE bytes.  */
diff --git a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
index 80a0a37e308..cfe563f47af 100644
--- a/gcc/config/i386/cygming.h
+++ b/gcc/config/i386/cygming.h
@@ -290,7 +290,7 @@ do {		\
 
 #undef ASM_OUTPUT_ALIGN
 #define ASM_OUTPUT_ALIGN(FILE,LOG)	\
-if ((LOG)!=0) fprintf ((FILE), "\t.align %d\n", 1<<(LOG))
+if ((LOG) != 0) fprintf ((FILE), "\t.align %d\n", 1 << (LOG))
 
 /* Windows uses explicit import from shared libraries.  */
 #define MULTIPLE_SYMBOL_SPACES 1
diff --git a/gcc/config/i386/gas.h b/gcc/config/i386/gas.h
index e149ab1360c..eb30db5d326 100644
--- a/gcc/config/i386/gas.h
+++ b/gcc/config/i386/gas.h
@@ -69,7 +69,7 @@ along with GCC; see the file COPYING3.  If not see
 #ifdef HAVE_GAS_MAX_SKIP_P2ALIGN
 #  define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE,LOG,MAX_SKIP) \
 if ((LOG) != 0) { \
-  if ((MAX_SKIP) == 0 || (MAX_SKIP) >= (1<<(LOG))-1)		\
+  if ((MAX_SKIP) == 0 || (MAX_SKIP) >= (1 << (LOG)) - 1)		\
 	fprintf ((FILE), "\t.p2align %d\n", (LOG));			\
   else\
 	fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP));	\
diff --git a/gcc/config/i386/x86-64.h b/gcc/config/i386/x86-64.h
index 66bbd5edc59..bc97454d2f6 100644
--- a/gcc/config/i386/x86-64.h
+++ b/gcc/config/i386/x86-64.h
@@ -77,7 +77,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 #define ASM_OUTPUT_MAX_SKIP_PAD(FILE, LOG, MAX_SKIP)			\
   if ((LOG) != 0)			\
 {	\
-  if ((MAX_SKIP) == 0 || (MAX_SKIP) >= (1<<(LOG))-1)		\
+  if ((MAX_SKIP) == 0 || (MAX_SKIP) >= (1 << (LOG)) - 1)		\
 fprintf ((FILE), "\t.p2align %d\n", (LOG));			\
   else\
 fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP));	\
diff --git a/gcc/config/iq2000/iq2000.h b/gcc/config/iq2000/iq2000.h
index 87c4114b409..1dff91f6c0f 100644
--- a/gcc/config/iq2000/iq2000.h
+++ b/gcc/config/iq2000/iq2000.h
@@ -489,7 +489,7 @@ while (0)
 
 #define ASM_OUTPUT_ALIGN(STREAM,LOG)	\
   if ((LOG) != 0)   \
-fprintf (STREAM, "\t.balign %d\n", 1<<(LOG))
+fprintf (STREAM, "\t.balign %d\n", 1 << (LOG))
 
 
 /* Macros Affecting all Debug Formats.  */
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 67b3c714ea8..024e7b831ec 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -1187,7 +1187,7 @@ do {	 \
location counter to a multiple of 2**LOG bytes.  */
 
 #define ASM_OUTPUT_ALIGN(FILE,LOG)	\
-fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
+fprintf (FILE, "\t.align %d\n", (1 << (LOG)))
 
 #define ASM_OUTPUT_SKIP(FILE,SIZE)  \
   fprintf (FILE, "\t.blockz " HOST_WIDE_INT_PRINT_UNSIGNED"\n",		\
diff --git a/gcc/config/sparc/sol2.h b/gcc/config/sparc/sol2.h
index b84f218c811..1bd4d61b2f3 100644
--- a/gcc/config/sparc/sol2.h
+++ b/gcc/config/sparc/sol2.h
@@ -413,7 +413,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
with GNU as. */
 #define ASM_OUTPUT_ALIGN_WITH_NOP(FILE,LOG)   \
   if ((LOG) != 0) \
-fprintf (FILE, "\t.align %d,0x100\n", (1<<(LOG)))
+fprintf (FILE, "\t.align %d,0x100\n", (1 << (LOG)))
 
 /* Use Solaris ELF section syntax with Sun as.  */
 #undef TARGET_ASM_NAMED_SECTION
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 419995431e2..032a91d467a 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1659,7 +1659,7 @@

[PATCH 1/4] Clean up of new format of -falign-FOO.

[marxin]

gcc/ChangeLog:

2018-07-11  Martin Liska  

* align.h: New file.
* config/alpha/alpha.c (alpha_align_insns_1): Use align_functions 
directly.
* config/i386/i386.c (ix86_avoid_jump_mispredicts): Use new return type
align_flags of label_to_alignment.
* config/m32r/m32r.h (LOOP_ALIGN): Wrap returned values into align_flags
class.
* config/m68k/m68k.c: Do not use removed align_labels_value and
align_loops_value.
* config/nds32/nds32.h (JUMP_ALIGN): Wrap result into align_flags class.
(LOOP_ALIGN): Likewise.
(LABEL_ALIGN): Likewise.
* config/powerpcspe/powerpcspe.c (TARGET_ASM_LOOP_ALIGN_MAX_SKIP):
Remove not used macro.
(rs6000_loop_align): Change return type to align_flags.
(rs6000_loop_align_max_skip): Remove.
* config/rs6000/rs6000-protos.h (rs6000_loop_align):
Change return type to align_flags.
* config/rs6000/rs6000.c (TARGET_ASM_LOOP_ALIGN_MAX_SKIP):
Remove not used macro.
(rs6000_loop_align):  Change return type to align_flags.
(rs6000_loop_align_max_skip): Remove.
* config/rx/rx.h (JUMP_ALIGN): Wrap integer values
* config/rx/rx-protos.h (rx_align_for_label): Make it
static function.
* config/rx/rx.c (rx_align_for_label): Change return type
to align_flags.
(rx_max_skip_for_label): Remove TARGET_ASM_*_ALIGN_MAX_SKIP
macro definitions.
into align_flags class.
(LABEL_ALIGN): Likewise.
(LOOP_ALIGN): Likewise.
* config/s390/s390.c (s390_label_align): Use align_flags
class member.
(s390_asm_output_function_label): Likewise.
* config/sh/sh.c (sh_override_options_after_change):
Use align_flags class directly without macros.
(find_barrier): Likewise.
(barrier_align): Likewise.
(sh_loop_align): Likewise.
* config/spu/spu.c (spu_option_override):
Use align_flags_tuple::get_value instead of removed macros.
(spu_sched_init): Likewise.
* config/spu/spu.h (GTY): Likewise.
* config/visium/visium.c (visium_option_override):
Set "8" as default secondary alignment.
* config/visium/visium.h (SUBALIGN_LOG): Define to 3
in order to guarantee secondary alignment of 8.
* coretypes.h: Include align.h header file.
* doc/tm.texi: Remove TARGET_ASM_JUMP_ALIGN_MAX_SKIP,
TARGET_ASM_LOOP_ALIGN_MAX_SKIP, TARGET_ASM_LABEL_ALIGN_MAX_SKIP
and TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP macros.
* doc/tm.texi.in: Likewise.
* final.c (struct label_alignment): Remove not used structure.
(LABEL_ALIGN): Change type to align_flags.
(LOOP_ALIGN): Likewise.
(JUMP_ALIGN): Likewise.
(default_loop_align_max_skip): Remove.
(default_label_align_max_skip): Likewise.
(default_jump_align_max_skip): Likewise.
(default_label_align_after_barrier_max_skip):
(LABEL_TO_ALIGNMENT): Change to access label_align vector.
(LABEL_TO_MAX_SKIP): Remove.
(label_to_alignment): Return align_flags type instead of integer.
(label_to_max_skip): Remove.
(align_fuzz): Use align_flags type.
(compute_alignments): Use align_flags type and use align_flags::max
to combine multiple alignments.
(grow_label_align): Grow vec instead of C array.
(update_alignments): Assign just LABEL_TO_ALIGNMENT.
(shorten_branches):  Use align_flags type and use align_flags::max
to combine multiple alignments.
(final_scan_insn_1): Remove usage of secondary alignment that comes
from label alignment, but instead use proper secondary alignment
which is computed in grow_label_align.
* flags.h (struct align_flags_tuple): Move to align.h.
(struct align_flags): Likewise.
(state_align_loops): Rename to align_loops.
(state_align_jumps): Rename to align_jumps.
(state_align_labels): Rename to align_labels.
(state_align_functions): Rename to align_functions.
(align_loops_log): Remove.
(align_jumps_log): Remove.
(align_labels_log): Remove.
(align_functions_log): Remove.
(align_loops_max_skip): Remove.
(align_jumps_max_skip): Remove.
(align_labels_max_skip): Remove.
(align_functions_max_skip): Remove.
(align_loops_value): Remove.
(align_jumps_value): Remove.
(align_labels_value): Remove.
(align_functions_value): Remove.
* output.h (label_to_alignment): Change return type to align_flags.
(label_to_max_skip): Remove.
* target.def: Remove loop_align_max_skip, label_align_max_skip,
jump_align_max_skip macros.
* targhooks.h (default_loop_align_max_skip): Remove.
(default_label_align_max_skip): Likewise.
(default_jump_align_max_skip): Likew

[PATCH 4/4] Do not enable OPT_falign_* for -Os.

[marxin]

gcc/ChangeLog:

2018-07-12  Martin Liska  

* opts.c: Do not enable OPT_falign_* for -Os.
---
 gcc/opts.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/opts.c b/gcc/opts.c
index 0625b15b27b..b8ae8756b4f 100644
--- a/gcc/opts.c
+++ b/gcc/opts.c
@@ -510,10 +510,10 @@ static const struct default_options default_options_table[] =
 { OPT_LEVELS_2_PLUS, OPT_fdevirtualize, NULL, 1 },
 { OPT_LEVELS_2_PLUS, OPT_fdevirtualize_speculatively, NULL, 1 },
 { OPT_LEVELS_2_PLUS, OPT_fipa_sra, NULL, 1 },
-{ OPT_LEVELS_2_PLUS, OPT_falign_loops, NULL, 1 },
-{ OPT_LEVELS_2_PLUS, OPT_falign_jumps, NULL, 1 },
-{ OPT_LEVELS_2_PLUS, OPT_falign_labels, NULL, 1 },
-{ OPT_LEVELS_2_PLUS, OPT_falign_functions, NULL, 1 },
+{ OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_falign_loops, NULL, 1 },
+{ OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_falign_jumps, NULL, 1 },
+{ OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_falign_labels, NULL, 1 },
+{ OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_falign_functions, NULL, 1 },
 { OPT_LEVELS_2_PLUS, OPT_ftree_tail_merge, NULL, 1 },
 { OPT_LEVELS_2_PLUS, OPT_fvect_cost_model_, NULL, VECT_COST_MODEL_CHEAP },
 { OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_foptimize_strlen, NULL, 1 },

[PATCH 0/4] Alignment option enhancements

[marxin]

Hi.

As you probably noticed, current trunk accepts extended format
of -falign-FOO options.
However there are some limitations that are addressed in the patchset:

1) E.g. align_labels_max_skip and align_labels_log are separate
   values and targets can override them via LABEL_ALIGN and
   LABEL_ALIGN_MAX_SKIP.  If you take a look at code in final.c:

 if (max_log < log)
{
  max_log = log;
  max_skip = targetm.asm_out.label_align_max_skip (label);
}

   It improves alignment, but max_skip can be zero and then we end up
   with no alignment.  Thus I see it saner to provide just a single hook
   and return align_flags class instance.

2) In final.c we mix label, jump and loop alignments. I believe when
   combining them together, one should do maximum and not rely on:

 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
  ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
  /* Above, we don't know whether a label, jump or loop
 alignment was used.  Conservatively apply
 label subalignment, not jump or loop
 subalignment (they are almost always larger).  */

   That's implemented in align_flags::max function. When combining
   for instance -falign-labels=1000 and -falign-jumps=2000, I hope
   using alignment of 2000 is the right choice.

3) I removed various align_* defines and use directly
   align_{*}.

4) I ported visium target to provide always secondary alignment of 8B.
   That's the same what x86_64 does and was factored out in previous commits
   I did.
  
5) Globally MAX_CODE_ALIGN is introduced.

6) Various coding styles are fixes in target code.

7) OPT_falign_* is not set with -Os. Then --help=common -Q reports proper 
values.

I tested that on x86_64-linux-gnu and ppc64le-linux. And also I tested all 
targets
that I touched, these should provide equal results.

Martin

marxin (4):
  Clean up of new format of -falign-FOO.
  Fix coding style of ASM_OUTPUT_ALIGN.
  Define MAX_CODE_ALIGN globally.
  Do not enable OPT_falign_* for -Os.

 gcc/align.h  |  80 
 gcc/common/config/i386/i386-common.c |   3 -
 gcc/config/alpha/alpha.c |   5 +-
 gcc/config/i386/att.h|   2 +-
 gcc/config/i386/cygming.h|   2 +-
 gcc/config/i386/gas.h|   2 +-
 gcc/config/i386/i386.c   |   5 +-
 gcc/config/i386/x86-64.h |   2 +-
 gcc/config/iq2000/iq2000.h   |   2 +-
 gcc/config/m32r/m32r.h   |   3 +-
 gcc/config/m68k/m68k.c   |  10 +-
 gcc/config/nds32/nds32.h |   9 +-
 gcc/config/pa/pa.h   |   2 +-
 gcc/config/powerpcspe/powerpcspe.c   |  18 +--
 gcc/config/rs6000/rs6000-protos.h|   2 +-
 gcc/config/rs6000/rs6000.c   |  18 +--
 gcc/config/rx/rx-protos.h|   2 +-
 gcc/config/rx/rx.c   |  59 +
 gcc/config/rx/rx.h   |   6 +-
 gcc/config/s390/s390.c   |   9 +-
 gcc/config/sh/sh.c   |  19 +--
 gcc/config/sparc/sol2.h  |   2 +-
 gcc/config/sparc/sparc.h |   2 +-
 gcc/config/spu/spu.c |   6 +-
 gcc/config/spu/spu.h |   2 +-
 gcc/config/visium/visium.c   |   2 +-
 gcc/config/visium/visium.h   |  17 +--
 gcc/coretypes.h  |   1 +
 gcc/doc/tm.texi  |  24 
 gcc/doc/tm.texi.in   |   8 --
 gcc/final.c  | 189 ---
 gcc/flags.h  |  38 +-
 gcc/opts.c   |  12 +-
 gcc/output.h |   6 +-
 gcc/system.h |   2 -
 gcc/target.def   |  40 --
 gcc/targhooks.h  |   4 -
 gcc/toplev.c |  44 ++-
 gcc/varasm.c |  14 +-
 39 files changed, 262 insertions(+), 411 deletions(-)
 create mode 100644 gcc/align.h

-- 
2.18.0

Re: [PATCH][debug] Fix pre_dec handling in vartrack

[Jakub Jelinek]

On Mon, Jul 16, 2018 at 09:24:10AM +0200, Jakub Jelinek wrote:
> On Sun, Jul 15, 2018 at 11:21:56PM +0200, Tom de Vries wrote:
> > 2018-07-15  Tom de Vries  
> > 
> > * var-tracking.c (vt_initialize): Fix pre_dec handling.  Print adjusted
> > insn slim if dump_flags request TDF_SLIM.
> > 
> > * gcc.target/i386/vartrack-1.c: New test.
> > 
> > ---
> > --- a/gcc/var-tracking.c
> > +++ b/gcc/var-tracking.c
> > @@ -115,6 +115,7 @@
> >  #include "tree-pretty-print.h"
> >  #include "rtl-iter.h"
> >  #include "fibonacci_heap.h"
> > +#include "print-rtl.h"
> >  
> >  typedef fibonacci_heap  bb_heap_t;
> >  typedef fibonacci_node  bb_heap_node_t;
> > @@ -10208,12 +10209,17 @@ vt_initialize (void)
> > log_op_type (PATTERN (insn), bb, insn,
> >  MO_ADJUST, dump_file);
> >   VTI (bb)->mos.safe_push (mo);
> > - VTI (bb)->out.stack_adjust += pre;
> > }
> > }
> >  
> >   cselib_hook_called = false;
> >   adjust_insn (bb, insn);
> > +
> > + if (!frame_pointer_needed)
> > +   {
> > + if (pre)
> > +   VTI (bb)->out.stack_adjust += pre;
> > +   }
> 
> That is certainly unexpected.  For the pre side-effects, they should be
> applied before adjusting the insn, not after that.
> I'll want to see this under the debugger.

You're right, adjust_mems takes the PRE_INC/PRE_DEC/PRE_MODIFY into account
too, so by adjusting stack_adjust before adjust_insn the effects happen
twice:
case PRE_INC:
case PRE_DEC:
  size = GET_MODE_SIZE (amd->mem_mode);
  addr = plus_constant (GET_MODE (loc), XEXP (loc, 0),
GET_CODE (loc) == PRE_INC ? size : -size);
Unless we have instructions where we e.g. pre_dec sp on the lhs and
use some mem based on sp on the rhs, but I'd hope that should be invalid
RTL, because it is ambiguous what value would sp on the rhs have.

Please change the above patch to do:
  adjust_insn (bb, insn);
+
+ if (!frame_pointer_needed && pre)
+   VTI (bb)->out.stack_adjust += pre;

Ok for trunk with that change.

> 
> >   if (DEBUG_MARKER_INSN_P (insn))
> > {
> >   reemit_marker_as_note (insn);
> > @@ -10227,7 +10233,10 @@ vt_initialize (void)
> >   cselib_process_insn (insn);
> >   if (dump_file && (dump_flags & TDF_DETAILS))
> > {
> > - print_rtl_single (dump_file, insn);
> > + if (dump_flags & TDF_SLIM)
> > +   dump_insn_slim (dump_file, insn);
> > + else
> > +   print_rtl_single (dump_file, insn);
> >   dump_cselib_table (dump_file);
> > }
> > }
> 
> This part is certainly ok.

Jakub

Re: [PATCH] Properly unshare TYPE_SIZE_UNIT/DECL_FIELD_OFFSET (PR86216)

[Eric Botcazou]

> Thanks. In that light the unsharing at the places the FE builds expressions
> using TYPE_SIZE and friends looks like the way to go.

Probably, yes.

> I still wonder why unsharing in gimplify_one_sizepos is necessary though.
> Ist that because even deep unsharing doesn't walk types?

walk_tree walks the DECL_EXPR of TYPE_DECL.  I think that it's an old band-aid 
for types defined at library level in Ada.  Let me experiment a bit with that.

-- 
Eric Botcazou

Re: [PATCH] Properly unshare TYPE_SIZE_UNIT/DECL_FIELD_OFFSET (PR86216)

[Richard Biener]

On Mon, 16 Jul 2018, Eric Botcazou wrote:

> > Thanks. In that light the unsharing at the places the FE builds expressions
> > using TYPE_SIZE and friends looks like the way to go.
> 
> Probably, yes.

OK, let's see what C family maintainers decide on ultimatively.

> > I still wonder why unsharing in gimplify_one_sizepos is necessary though.
> > Ist that because even deep unsharing doesn't walk types?
> 
> walk_tree walks the DECL_EXPR of TYPE_DECL.  I think that it's an old 
> band-aid 
> for types defined at library level in Ada.  Let me experiment a bit with that.

I do see extra ICEs in the C testsuite with removing the unsharing as well
though (without the unsharing fix from above).  At least it bootstraps
though.

Richard.

[PATCH] [v3][aarch64] Avoid tag collisions for loads falkor

[Siddhesh Poyarekar]

Hi,

This is a rewrite of the tag collision avoidance patch that Kugan had
written as a machine reorg pass back in February.

The falkor hardware prefetching system uses a combination of the
source, destination and offset to decide which prefetcher unit to
train with the load.  This is great when loads in a loop are
sequential but sub-optimal if there are unrelated loads in a loop that
tag to the same prefetcher unit.

This pass attempts to rename the desination register of such colliding
loads using routines available in regrename.c so that their tags do
not collide.  This shows some performance gains with mcf and xalancbmk
(~5% each) and will be tweaked further.  The pass is placed near the
fag end of the pass list so that subsequent passes don't inadvertantly
end up undoing the renames.

A full gcc bootstrap and testsuite ran successfully on aarch64, i.e. it
did not introduce any new regressions.  I also did a make-check with
-mcpu=falkor to ensure that there were no regressions.  The couple of
regressions I found were target-specific and were related to scheduling
and cost differences and are not correctness issues.

Changes from v2:
- Ignore SVE instead of asserting that falkor does not support sve

Changes from v1:

- Fixed up issues pointed out by Kyrill
- Avoid renaming R0/V0 since they could be return values
- Fixed minor formatting issues.

2018-07-02  Siddhesh Poyarekar  
Kugan Vivekanandarajah  

* config/aarch64/falkor-tag-collision-avoidance.c: New file.
* config.gcc (extra_objs): Build it.
* config/aarch64/t-aarch64 (falkor-tag-collision-avoidance.o):
Likewise.
* config/aarch64/aarch64-passes.def
(pass_tag_collision_avoidance): New pass.
* config/aarch64/aarch64.c (qdf24xx_tunings): Add
AARCH64_EXTRA_TUNE_RENAME_LOAD_REGS to tuning_flags.
(aarch64_classify_address): Remove static qualifier.
(aarch64_address_info, aarch64_address_type): Move to...
* config/aarch64/aarch64-protos.h: ... here.
(make_pass_tag_collision_avoidance): New function.
* config/aarch64/aarch64-tuning-flags.def (rename_load_regs):
New tuning flag.

CC: james.greenha...@arm.com
CC: kyrylo.tkac...@foss.arm.com
---
 gcc/config.gcc|   2 +-
 gcc/config/aarch64/aarch64-passes.def |   1 +
 gcc/config/aarch64/aarch64-protos.h   |  49 +
 gcc/config/aarch64/aarch64-tuning-flags.def   |   2 +
 gcc/config/aarch64/aarch64.c  |  48 +-
 .../aarch64/falkor-tag-collision-avoidance.c  | 857 ++
 gcc/config/aarch64/t-aarch64  |   9 +
 7 files changed, 922 insertions(+), 46 deletions(-)
 create mode 100644 gcc/config/aarch64/falkor-tag-collision-avoidance.c

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 63162aab676..c66dda0770e 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -304,7 +304,7 @@ aarch64*-*-*)
extra_headers="arm_fp16.h arm_neon.h arm_acle.h"
c_target_objs="aarch64-c.o"
cxx_target_objs="aarch64-c.o"
-   extra_objs="aarch64-builtins.o aarch-common.o cortex-a57-fma-steering.o"
+   extra_objs="aarch64-builtins.o aarch-common.o cortex-a57-fma-steering.o 
falkor-tag-collision-avoidance.o"
target_gtfiles="\$(srcdir)/config/aarch64/aarch64-builtins.c"
target_has_targetm_common=yes
;;
diff --git a/gcc/config/aarch64/aarch64-passes.def 
b/gcc/config/aarch64/aarch64-passes.def
index 87747b420b0..f61a8870aa1 100644
--- a/gcc/config/aarch64/aarch64-passes.def
+++ b/gcc/config/aarch64/aarch64-passes.def
@@ -19,3 +19,4 @@
.  */
 
 INSERT_PASS_AFTER (pass_regrename, 1, pass_fma_steering);
+INSERT_PASS_AFTER (pass_machine_reorg, 1, pass_tag_collision_avoidance);
diff --git a/gcc/config/aarch64/aarch64-protos.h 
b/gcc/config/aarch64/aarch64-protos.h
index 87c6ae20278..0a4558c2023 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -283,6 +283,49 @@ struct tune_params
   const struct cpu_prefetch_tune *prefetch;
 };
 
+/* Classifies an address.
+
+   ADDRESS_REG_IMM
+   A simple base register plus immediate offset.
+
+   ADDRESS_REG_WB
+   A base register indexed by immediate offset with writeback.
+
+   ADDRESS_REG_REG
+   A base register indexed by (optionally scaled) register.
+
+   ADDRESS_REG_UXTW
+   A base register indexed by (optionally scaled) zero-extended register.
+
+   ADDRESS_REG_SXTW
+   A base register indexed by (optionally scaled) sign-extended register.
+
+   ADDRESS_LO_SUM
+   A LO_SUM rtx with a base register and "LO12" symbol relocation.
+
+   ADDRESS_SYMBOLIC:
+   A constant symbolic address, in pc-relative literal pool.  */
+
+enum aarch64_address_type {
+  ADDRESS_REG_IMM,
+  ADDRESS_REG_WB,
+  ADDRESS_REG_REG,
+  ADDRESS_REG_UXTW,
+  ADDRESS_REG_SXTW,
+  ADDRESS_LO_SUM,
+  ADDRESS_SYMBOLIC
+};
+
+/* Address information.  */
+struct aarch64_a

RE: [PATCH] [ARC] Add support for HS4x cpus.

[Claudiu Zissulescu]

Committed,
Claudiu

From: Andrew Burgess [andrew.burg...@embecosm.com]
Sent: Saturday, July 07, 2018 12:21 AM
To: Claudiu Zissulescu
Cc: gcc-patches@gcc.gnu.org; francois.bed...@synopsys.com; Claudiu Zissulescu
Subject: Re: [PATCH] [ARC] Add support for HS4x cpus.

* Claudiu Zissulescu  [2018-06-13 12:09:18 +0300]:

> From: Claudiu Zissulescu 
>
> This patch adds support for two ARCHS variations.
>
> Ok to apply?
> Claudiu

Sorry for the delay, this looks fine.

Thanks,
Andrew



>
> gcc/
> 2017-03-10  Claudiu Zissulescu  
>
>   * config/arc/arc-arch.h (arc_tune_attr): Add new tune parameters
>   for ARCHS4x.
>   * config/arc/arc-cpus.def (hs4x): New cpu.
>   (hs4xd): Likewise.
>   * config/arc/arc-tables.opt: Regenerate.
>   * config/arc/arc.c (arc_sched_issue_rate): New function.
>   (TARGET_SCHED_ISSUE_RATE): Define.
>   (TARGET_SCHED_EXPOSED_PIPELINE): Likewise.
>   * config/arc/arc.md (attr type): Add fpu_fuse, fpu_sdiv, fpu_ddiv,
>   fpu_cvt.
>   (attr tune): Add ARCHS4x tune values.
>   (attr tune_dspmpy): Define.
>   (*tst): Correct instruction type.
>   * config/arc/arcHS.md: Don't use this automaton for ARCHS4x cpus.
>   * config/arc/arcHS4x.md: New file.
>   * config/arc/fpu.md: Update instruction type attributes.
>   * config/arc/t-multilib: Regenerate.
> ---
>  gcc/config/arc/arc-arch.h |   5 +-
>  gcc/config/arc/arc-cpus.def   |   8 +-
>  gcc/config/arc/arc-tables.opt |   6 +
>  gcc/config/arc/arc.c  |  19 +++
>  gcc/config/arc/arc.md |  24 +++-
>  gcc/config/arc/arcHS.md   |   6 +
>  gcc/config/arc/arcHS4x.md | 221 ++
>  gcc/config/arc/fpu.md |  16 +--
>  8 files changed, 289 insertions(+), 16 deletions(-)
>  create mode 100644 gcc/config/arc/arcHS4x.md
>
> diff --git a/gcc/config/arc/arc-arch.h b/gcc/config/arc/arc-arch.h
> index 64866dd529b..01f95946623 100644
> --- a/gcc/config/arc/arc-arch.h
> +++ b/gcc/config/arc/arc-arch.h
> @@ -73,7 +73,10 @@ enum arc_tune_attr
>  ARC_TUNE_ARC600,
>  ARC_TUNE_ARC700_4_2_STD,
>  ARC_TUNE_ARC700_4_2_XMAC,
> -ARC_TUNE_CORE_3
> +ARC_TUNE_CORE_3,
> +ARC_TUNE_ARCHS4X,
> +ARC_TUNE_ARCHS4XD,
> +ARC_TUNE_ARCHS4XD_SLOW
>};
>
>  /* CPU specific properties.  */
> diff --git a/gcc/config/arc/arc-cpus.def b/gcc/config/arc/arc-cpus.def
> index 1fce81f6933..4aa422f1a39 100644
> --- a/gcc/config/arc/arc-cpus.def
> +++ b/gcc/config/arc/arc-cpus.def
> @@ -59,10 +59,12 @@ ARC_CPU (archs,hs, FL_MPYOPT_2|FL_DIVREM|FL_LL64, 
> NONE)
>  ARC_CPU (hs34,hs, FL_MPYOPT_2, NONE)
>  ARC_CPU (hs38,hs, FL_MPYOPT_9|FL_DIVREM|FL_LL64, NONE)
>  ARC_CPU (hs38_linux, hs, FL_MPYOPT_9|FL_DIVREM|FL_LL64|FL_FPU_FPUD_ALL, NONE)
> +ARC_CPU (hs4x,  hs, FL_MPYOPT_9|FL_DIVREM|FL_LL64, ARCHS4X)
> +ARC_CPU (hs4xd, hs, FL_MPYOPT_9|FL_DIVREM|FL_LL64, ARCHS4XD)
>
> -ARC_CPU (arc600,   6xx, FL_BS, ARC600)
> -ARC_CPU (arc600_norm,  6xx, FL_BS|FL_NORM, ARC600)
> -ARC_CPU (arc600_mul64, 6xx, FL_BS|FL_NORM|FL_MUL64, ARC600)
> +ARC_CPU (arc600,  6xx, FL_BS, ARC600)
> +ARC_CPU (arc600_norm, 6xx, FL_BS|FL_NORM, ARC600)
> +ARC_CPU (arc600_mul64,6xx, FL_BS|FL_NORM|FL_MUL64, ARC600)
>  ARC_CPU (arc600_mul32x16, 6xx, FL_BS|FL_NORM|FL_MUL32x16, ARC600)
>  ARC_CPU (arc601,   6xx, 0, ARC600)
>  ARC_CPU (arc601_norm,  6xx, FL_NORM, ARC600)
> diff --git a/gcc/config/arc/arc-tables.opt b/gcc/config/arc/arc-tables.opt
> index 3b17b3de7d5..2afaf5bd83c 100644
> --- a/gcc/config/arc/arc-tables.opt
> +++ b/gcc/config/arc/arc-tables.opt
> @@ -63,6 +63,12 @@ Enum(processor_type) String(hs38) Value(PROCESSOR_hs38)
>  EnumValue
>  Enum(processor_type) String(hs38_linux) Value(PROCESSOR_hs38_linux)
>
> +EnumValue
> +Enum(processor_type) String(hs4x) Value(PROCESSOR_hs4x)
> +
> +EnumValue
> +Enum(processor_type) String(hs4xd) Value(PROCESSOR_hs4xd)
> +
>  EnumValue
>  Enum(processor_type) String(arc600) Value(PROCESSOR_arc600)
>
> diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
> index 2bedc9af37e..03a2f4223c0 100644
> --- a/gcc/config/arc/arc.c
> +++ b/gcc/config/arc/arc.c
> @@ -483,6 +483,22 @@ arc_autovectorize_vector_sizes (vector_sizes *sizes)
>  }
>  }
>
> +
> +/* Implements target hook TARGET_SCHED_ISSUE_RATE.  */
> +static int
> +arc_sched_issue_rate (void)
> +{
> +  switch (arc_tune)
> +{
> +case TUNE_ARCHS4X:
> +case TUNE_ARCHS4XD:
> +  return 3;
> +default:
> +  break;
> +}
> +  return 1;
> +}
> +
>  /* TARGET_PRESERVE_RELOAD_P is still awaiting patch re-evaluation / review.  
> */
>  static bool arc_preserve_reload_p (rtx in) ATTRIBUTE_UNUSED;
>  static rtx arc_delegitimize_address (rtx);
> @@ -565,6 +581,9 @@ static rtx arc_legitimize_address_0 (rtx, rtx, 
> machine_mode mode);
>  #undef  TARGET_SCHED_ADJUST_PRIORITY
>  #define TARGET_SCHED_ADJUST_PRIORITY arc_sched_adjust_priority
>
> +#und

Re: [GCC][PATCH][Aarch64] Exploiting BFXIL when OR-ing two AND-operations with appropriate bitmasks

[Sudakshina Das]

Hi Sam

On 13/07/18 17:09, Sam Tebbs wrote:

Hi all,

This patch adds an optimisation that exploits the AArch64 BFXIL instruction
when or-ing the result of two bitwise and operations with non-overlapping
bitmasks (e.g. (a & 0x) | (b & 0x)).

Example:

unsigned long long combine(unsigned long long a, unsigned long long b) {
   return (a & 0xll) | (b & 0xll);
}

void read2(unsigned long long a, unsigned long long b, unsigned long long *c,
   unsigned long long *d) {
   *c = combine(a, b); *d = combine(b, a);
}

When compiled with -O2, read2 would result in:

read2:
   and   x5, x1, #0x
   and   x4, x0, #0x
   orr   x4, x4, x5
   and   x1, x1, #0x
   and   x0, x0, #0x
   str   x4, [x2]
   orr   x0, x0, x1
   str   x0, [x3]
   ret

But with this patch results in:

read2:
   mov   x4, x1
   bfxil x4, x0, 0, 32
   str   x4, [x2]
   bfxil x0, x1, 0, 32
   str   x0, [x3]
   ret
   
Bootstrapped and regtested on aarch64-none-linux-gnu and aarch64-none-elf with no regressions.


I am not a maintainer but I have a question about this patch. I may be 
missing something or reading

it wrong. So feel free to point it out:

+(define_insn "*aarch64_bfxil"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+    (ior:DI (and:DI (match_operand:DI 1 "register_operand" "r")
+            (match_operand 3 "const_int_operand"))
+        (and:DI (match_operand:DI 2 "register_operand" "0")
+            (match_operand 4 "const_int_operand"]
+  "INTVAL (operands[3]) == ~INTVAL (operands[4])
+    && aarch64_is_left_consecutive (INTVAL (operands[3]))"
+  {
+    HOST_WIDE_INT op4 = INTVAL (operands[4]);
+    operands[3] = GEN_INT (64 - ceil_log2 (op4));
+    output_asm_insn ("bfxil\\t%0, %1, 0, %3", operands);

In the BFXIL you are reading %3 LSB bits from operand 1 and putting it 
in the LSBs of %0.

This means that the pattern should be masking the 32-%3 MSB of %0 and
%3 LSB of %1. So shouldn't operand 4 is LEFT_CONSECUTIVE>

Can you please compare a simpler version of the above example you gave to
make sure the generated assembly is equivalent before and after the patch:

void read2(unsigned long long a, unsigned long long b, unsigned long long *c) {
  *c = combine(a, b);
}


From the above text

read2:
  and   x5, x1, #0x
  and   x4, x0, #0x
  orr   x4, x4, x5

read2:
  mov   x4, x1
  bfxil x4, x0, 0, 32

This does not seem equivalent to me.

Thanks
Sudi

+    return "";
+  }
+  [(set_attr "type" "bfx")]
+)

gcc/
2018-07-11  Sam Tebbs  

     * config/aarch64/aarch64.md (*aarch64_bfxil, *aarch64_bfxil_alt):
     Define.
     * config/aarch64/aarch64-protos.h (aarch64_is_left_consecutive):
     Define.
     * config/aarch64/aarch64.c (aarch64_is_left_consecutive): New function.

gcc/testsuite
2018-07-11  Sam Tebbs  

     * gcc.target/aarch64/combine_bfxil.c: New file.
     * gcc.target/aarch64/combine_bfxil_2.c: New file.

[PATCH, S390] Avoid LA with base and index on z13

[Robin Dapp]

> But on zEC12 LA works pretty much the same as on z13/z14, it is
> indeed not cracked, but still a 2-cycle instruction when using
> an index register.  So I guess the change really should apply
> to zEC12 as well, and this could be as simple as changing the
> above line to:
> 
>   if (addr.indx && s390_tune >= PROCESSOR_2817_Z196)
> 
> (Note that "addr.base && addr.indx" is the same as just checking
> for addr.indx, since s390_decompose_address will never fill in
> *just* an index.)

Good point, I adapted the patch and changed the comment.

Regards
 Robin

--

gcc/ChangeLog:

2018-07-16  Robin Dapp  

* config/s390/s390.c (preferred_la_operand_p): Do not use
LA with index register on z196 or later.

diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 23c3f3db621..d8b47c6fe67 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -4623,11 +4623,11 @@ preferred_la_operand_p (rtx op1, rtx op2)
   if (addr.indx && !REGNO_OK_FOR_INDEX_P (REGNO (addr.indx)))
 return false;
 
-  /* Avoid LA instructions with index register on z196; it is
- preferable to use regular add instructions when possible.
- Starting with zEC12 the la with index register is "uncracked"
- again.  */
-  if (addr.indx && s390_tune == PROCESSOR_2817_Z196)
+  /* Avoid LA instructions with index (and base) register on z196 or
+ later; it is preferable to use regular add instructions when
+ possible.  Starting with zEC12 the la with index register is
+ "uncracked" again but still slower than a regular add.  */
+  if (addr.indx && s390_tune >= PROCESSOR_2817_Z196)
 return false;
 
   if (!TARGET_64BIT && !addr.pointer)

Re: [patch, fortran] Asynchronous I/O, take 3

[Dominique d'Humières]

> Le 15 juil. 2018 à 21:35, Rainer Orth  a écrit 
> :
> 
> Hi Jerry,
> 
>> On 07/15/2018 11:46 AM, Rainer Orth wrote:
>>> Hi Jerry,
>>> 
 Hmm, interesting. Which linux are you using?
>>> 
>>> Fedora 27.
>> 
>> Works for me. Fedora 28. Do not know for other OS's
> 
> just tried Solaris 11/x86: works just as well.  I could try Mac OS X
> 10.7, but that build would take quite a while…

Works on OSX.

Dominique

> 
>   Rainer
> 
> -- 
> -
> Rainer Orth, Center for Biotechnology, Bielefeld University

[C++ Patch] Check permerror return value

[Paolo Carlini]

Hi,

over the last weeks, while working on various diagnostic issues, I 
noticed a few defective permerror + inform pairs. Tested x86_64-linux.


Thanks, Paolo.



/cp
2018-07-16  Paolo Carlini  

* class.c (resolve_address_of_overloaded_function): Don't emit an
inform if the matching permerror returns false.
* pt.c (check_specialization_namespace): Likewise.

/testsuite
2018-07-16  Paolo Carlini  

* g++.dg/template/spec40.C: New.
* g++.dg/parse/ptrmem8.C: Likewise.
Index: cp/class.c
===
--- cp/class.c  (revision 262687)
+++ cp/class.c  (working copy)
@@ -7919,10 +7919,11 @@ resolve_address_of_overloaded_function (tree targe
   if (!(complain & tf_error))
return error_mark_node;
 
-  permerror (input_location, "assuming pointer to member %qD", fn);
-  if (!explained)
+  if (permerror (input_location, "assuming pointer to member %qD", fn)
+ && !explained)
{
- inform (input_location, "(a pointer to member can only be formed with 
%<&%E%>)", fn);
+ inform (input_location, "(a pointer to member can only be "
+ "formed with %<&%E%>)", fn);
  explained = 1;
}
 }
Index: cp/pt.c
===
--- cp/pt.c (revision 262687)
+++ cp/pt.c (working copy)
@@ -800,10 +800,10 @@ check_specialization_namespace (tree tmpl)
 return true;
   else
 {
-  permerror (input_location,
-"specialization of %qD in different namespace", tmpl);
-  inform (DECL_SOURCE_LOCATION (tmpl),
- "  from definition of %q#D", tmpl);
+  if (permerror (input_location,
+"specialization of %qD in different namespace", tmpl))
+   inform (DECL_SOURCE_LOCATION (tmpl),
+   "  from definition of %q#D", tmpl);
   return false;
 }
 }
Index: testsuite/g++.dg/template/spec40.C
===
--- testsuite/g++.dg/template/spec40.C  (nonexistent)
+++ testsuite/g++.dg/template/spec40.C  (working copy)
@@ -0,0 +1,12 @@
+// { dg-options "-fpermissive -w" }
+
+namespace N {
+  template 
+  struct S {
+void f() {}  // { dg-bogus "from definition" }
+  };
+}
+
+namespace K {
+  template <> void N::S::f() {}
+}
Index: testsuite/g++.dg/parse/ptrmem8.C
===
--- testsuite/g++.dg/parse/ptrmem8.C(nonexistent)
+++ testsuite/g++.dg/parse/ptrmem8.C(working copy)
@@ -0,0 +1,15 @@
+// { dg-options "-fpermissive -w" }
+
+struct A
+{
+  template void foo()
+  {
+void (A::* fp)();
+fp = A::foo<0>;  // { dg-bogus "pointer to member" }
+  }
+};
+
+void bar()
+{
+  A().foo<0>();
+}

[PATCH 1/4] [ARC] Add more additional register names

[Claudiu Zissulescu]

From: claziss 

gcc/
2017-06-14  Claudiu Zissulescu  

* config/arc/arc.h (ADDITIONAL_REGISTER_NAMES): Add additional
register names.
---
 gcc/config/arc/arc.h | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 1780034aabe..3648314eaca 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -1215,7 +1215,15 @@ extern char rname56[], rname57[], rname58[], rname59[];
 {  \
   {"ilink",  29},  \
   {"r29",29},  \
-  {"r30",30}   \
+  {"r30",30},  \
+  {"r40",40},  \
+  {"r41",41},  \
+  {"r42",42},  \
+  {"r43",43},  \
+  {"r56",56},  \
+  {"r57",57},  \
+  {"r58",58},  \
+  {"r59",59}   \
 }
 
 /* Entry to the insn conditionalizer.  */
-- 
2.17.1

[PATCH 3/4] [ARC] Improve instruction selection for fp moves.

[Claudiu Zissulescu]

Improve selection of short instruction for fp-moves.

gcc/
2018-05-17  Claudiu Zissulescu  

* config/arc/arc.md (movsf_insn): Add short instruction selection.
* config/arc/constraints.md (CfZ): New constraint.
* config/arc/fpu.md (addssf3_fpu): Use CfZ constraint.
(subsf3_fpu): Likewise.
(cmpsf_fpu): Likewise.
(cmpsf_fpu_uneq): Likewise.
---
 gcc/config/arc/arc.md | 25 +--
 gcc/config/arc/constraints.md |  6 
 gcc/config/arc/fpu.md | 59 +--
 3 files changed, 50 insertions(+), 40 deletions(-)

diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 26aa3b31649..8f27c0f2c05 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -1294,19 +1294,24 @@ archs4x, archs4xd, archs4xd_slow"
   "if (prepare_move_operands (operands, SFmode)) DONE;")
 
 (define_insn "*movsf_insn"
-  [(set (match_operand:SF 0 "move_dest_operand""=h,w,w,r,m")
-   (match_operand:SF 1 "move_src_operand"   "hCm1,c,E,m,c"))]
+  [(set (match_operand:SF 0 "move_dest_operand"   "=h,h,   r,r,  q,S,Usc,r,m")
+   (match_operand:SF 1 "move_src_operand"  "hCfZ,E,rCfZ,E,Uts,q,  E,m,r"))]
   "register_operand (operands[0], SFmode)
|| register_operand (operands[1], SFmode)"
   "@
-   mov%? %0,%1
-   mov%? %0,%1
-   mov%? %0,%1 ; %A1
-   ld%U1%V1 %0,%1
-   st%U0%V0 %1,%0"
-  [(set_attr "type" "move,move,move,load,store")
-   (set_attr "predicable" "no,yes,yes,no,no")
-   (set_attr "iscompact" "true,false,false,false,false")])
+   mov%?\\t%0,%1
+   mov%?\\t%0,%1 ; %A1
+   mov%?\\t%0,%1
+   mov%?\\t%0,%1 ; %A1
+   ld%?%U1\\t%0,%1
+   st%?\\t%1,%0
+   st%U0%V0\\t%1,%0
+   ld%U1%V1\\t%0,%1
+   st%U0%V0\\t%1,%0"
+  [(set_attr "type" "move,move,move,move,load,store,store,load,store")
+   (set_attr "predicable" "no,no,yes,yes,no,no,no,no,no")
+   (set_attr "length" "*,*,4,*,*,*,*,*,*")
+   (set_attr "iscompact" 
"true,true_limm,false,false,true,true,false,false,false")])
 
 (define_expand "movdf"
   [(set (match_operand:DF 0 "move_dest_operand" "")
diff --git a/gcc/config/arc/constraints.md b/gcc/config/arc/constraints.md
index c304d535ad8..f9ef3f94dfe 100644
--- a/gcc/config/arc/constraints.md
+++ b/gcc/config/arc/constraints.md
@@ -314,6 +314,12 @@
   (and (match_code "const_double")
(match_test "1")))
 
+(define_constraint "CfZ"
+  "@internal
+   Match a floating-point zero"
+  (and (match_code "const_double")
+   (match_test "op == CONST0_RTX (SFmode)")))
+
 ;; Memory constraints
 (define_memory_constraint "T"
   "@internal
diff --git a/gcc/config/arc/fpu.md b/gcc/config/arc/fpu.md
index 9457922667e..6289e9c3f59 100644
--- a/gcc/config/arc/fpu.md
+++ b/gcc/config/arc/fpu.md
@@ -6,34 +6,34 @@
 
 ;; Addition
 (define_insn "*addsf3_fpu"
-  [(set (match_operand:SF 0 "register_operand"   "=r,r,r,r,r")
-   (plus:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,0,r,F")
-(match_operand:SF 2 "nonmemory_operand"  "r,r,F,F,r")))]
+  [(set (match_operand:SF 0 "register_operand"   "=r,r,  r,r,r,r")
+   (plus:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,  r,0,r,F")
+(match_operand:SF 2 "nonmemory_operand"  "r,r,CfZ,F,F,r")))]
   "TARGET_FP_SP_BASE
&& (register_operand (operands[1], SFmode)
|| register_operand (operands[2], SFmode))"
-  "fsadd%? %0,%1,%2"
-  [(set_attr "length" "4,4,8,8,8")
+  "fsadd%?\\t%0,%1,%2"
+  [(set_attr "length" "4,4,4,8,8,8")
(set_attr "iscompact" "false")
(set_attr "type" "fpu")
-   (set_attr "predicable" "yes,no,yes,no,no")
-   (set_attr "cond" "canuse,nocond,canuse_limm,nocond,nocond")
+   (set_attr "predicable" "yes,no,no,yes,no,no")
+   (set_attr "cond" "canuse,nocond,nocond,canuse_limm,nocond,nocond")
])
 
 ;; Subtraction
 (define_insn "*subsf3_fpu"
-  [(set (match_operand:SF 0 "register_operand"   "=r,r,r,r,r")
-   (minus:SF (match_operand:SF 1 "nonmemory_operand" "0,r,0,r,F")
- (match_operand:SF 2 "nonmemory_operand" "r,r,F,F,r")))]
+  [(set (match_operand:SF 0 "register_operand"   "=r,r,  r,r,r,r")
+   (minus:SF (match_operand:SF 1 "nonmemory_operand" "0,r,  r,0,r,F")
+ (match_operand:SF 2 "nonmemory_operand" "r,r,CfZ,F,F,r")))]
   "TARGET_FP_SP_BASE
&& (register_operand (operands[1], SFmode)
|| register_operand (operands[2], SFmode))"
-  "fssub%? %0,%1,%2"
-  [(set_attr "length" "4,4,8,8,8")
+  "fssub%?\\t%0,%1,%2"
+  [(set_attr "length" "4,4,4,8,8,8")
(set_attr "iscompact" "false")
(set_attr "type" "fpu")
-   (set_attr "predicable" "yes,no,yes,no,no")
-   (set_attr "cond" "canuse,nocond,canuse_limm,nocond,nocond")
+   (set_attr "predicable" "yes,no,no,yes,no,no")
+   (set_attr "cond" "canuse,nocond,nocond,canuse_limm,nocond,nocond")
])
 
 ;; Multiplication
@@ -44,7 +44,7 @@
   "TARGET_FP_SP_BASE
&& (register_operand (operands[1], SFmode)
|| register_operand (operands[2], SFmode))"
-  "fsmul%? %0,%1,%2"
+ 

[PATCH 2/4] [ARX][FIX] Fix uncache attribute.

[Claudiu Zissulescu]

gcc/
2018-05-09  Claudiu Zissulescu  

* config/arc/arc.c (compact_memory_operand_p): Check for uncached
accesses as well.
(arc_is_uncached_mem_p): uncached applies to both the variable and
the pointer.

testsuite/
2018-05-09  Claudiu Zissulescu  

* gcc.target/arc/uncached-1.c: New test.
* gcc.target/arc/uncached-2.c: Likewise.
---
 gcc/config/arc/arc.c  | 40 +++
 gcc/testsuite/gcc.target/arc/uncached-1.c | 11 +++
 gcc/testsuite/gcc.target/arc/uncached-2.c |  9 +
 3 files changed, 46 insertions(+), 14 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/arc/uncached-1.c
 create mode 100644 gcc/testsuite/gcc.target/arc/uncached-2.c

diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index f36f88f920b..bf719eab115 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -10450,6 +10450,10 @@ compact_memory_operand_p (rtx op, machine_mode mode,
   if (MEM_VOLATILE_P (op) && !TARGET_VOLATILE_CACHE_SET)
 return false;
 
+  /* likewise for uncached types.  */
+  if (arc_is_uncached_mem_p (op))
+return false;
+
   if (mode == VOIDmode)
 mode = GET_MODE (op);
 
@@ -10733,28 +10737,36 @@ arc_handle_uncached_attribute (tree *node,
 bool
 arc_is_uncached_mem_p (rtx pat)
 {
-  tree attrs;
-  tree ttype;
-  struct mem_attrs *refattrs;
+  tree attrs = NULL_TREE;
+  tree addr;
 
   if (!MEM_P (pat))
 return false;
 
   /* Get the memory attributes.  */
-  refattrs = MEM_ATTRS (pat);
-  if (!refattrs
-  || !refattrs->expr)
+  addr = MEM_EXPR (pat);
+  if (!addr)
 return false;
 
-  /* Get the type declaration.  */
-  ttype = TREE_TYPE (refattrs->expr);
-  if (!ttype)
-return false;
+  /* Get the attributes.  */
+  if (TREE_CODE (addr) == MEM_REF)
+{
+  attrs = TYPE_ATTRIBUTES (TREE_TYPE (addr));
+  if (lookup_attribute ("uncached", attrs))
+   return true;
 
-  /* Get the type attributes.  */
-  attrs = TYPE_ATTRIBUTES (ttype);
-  if (lookup_attribute ("uncached", attrs))
-return true;
+  attrs = TYPE_ATTRIBUTES (TREE_TYPE (TREE_OPERAND (addr, 0)));
+  if (lookup_attribute ("uncached", attrs))
+   return true;
+}
+
+  /* For COMPONENT_REF, use the FIELD_DECL from tree operand 1.  */
+  if (TREE_CODE (addr) == COMPONENT_REF)
+{
+  attrs = TYPE_ATTRIBUTES (TREE_TYPE (TREE_OPERAND (addr, 1)));
+  if (lookup_attribute ("uncached", attrs))
+   return true;
+}
   return false;
 }
 
diff --git a/gcc/testsuite/gcc.target/arc/uncached-1.c 
b/gcc/testsuite/gcc.target/arc/uncached-1.c
new file mode 100644
index 000..7a6bade81c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/uncached-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+
+volatile __attribute__((uncached))  int * status =
+  (volatile __attribute__((uncached)) int *) 0x04 ;
+
+int get_stat (void)
+{
+  return *status;
+}
+
+/* { dg-final { scan-assembler-times "ld\.di" 1 } } */
diff --git a/gcc/testsuite/gcc.target/arc/uncached-2.c 
b/gcc/testsuite/gcc.target/arc/uncached-2.c
new file mode 100644
index 000..89eed326e01
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/uncached-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+
+void clkgen_switch(unsigned int base, unsigned int offset, int val)
+{
+  volatile  unsigned int __attribute__ ((uncached)) *dest =
+(volatile unsigned int __attribute__ ((uncached)) *) (base + offset);
+  *dest = val;
+}
+/* { dg-final { scan-assembler-times "st\.di" 1 } } */
-- 
2.17.1

[PATCH 4/4] [ARC] Update default optimizations for size.

[Claudiu Zissulescu]

Update the list of default optimizations used for size compilations.

gcc/
2018-07-10  Claudiu Zissulescu  

* common/config/arc/arc-common.c (arc_option_optimization_table):
Update default optimizations for size.
---
 gcc/common/config/arc/arc-common.c | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/gcc/common/config/arc/arc-common.c 
b/gcc/common/config/arc/arc-common.c
index f866a0ad523..578431a279d 100644
--- a/gcc/common/config/arc/arc-common.c
+++ b/gcc/common/config/arc/arc-common.c
@@ -46,17 +46,22 @@ arc_option_init_struct (struct gcc_options *opts)
 #define OPT_LEVELS_3_PLUS_SPEED_ONLY OPT_LEVELS_3_PLUS
 static const struct default_options arc_option_optimization_table[] =
   {
-{ OPT_LEVELS_SIZE, OPT_fsection_anchors, NULL, 1 },
 { OPT_LEVELS_ALL, OPT_mRcq, NULL, 1 },
 { OPT_LEVELS_ALL, OPT_mRcw, NULL, 1 },
 { OPT_LEVELS_ALL, OPT_msize_level_, NULL, 1 },
-{ OPT_LEVELS_3_PLUS_SPEED_ONLY, OPT_msize_level_, NULL, 0 },
-{ OPT_LEVELS_SIZE, OPT_msize_level_, NULL, 3 },
-{ OPT_LEVELS_3_PLUS_SPEED_ONLY, OPT_malign_call, NULL, 1 },
 { OPT_LEVELS_ALL, OPT_mearly_cbranchsi, NULL, 1 },
 { OPT_LEVELS_ALL, OPT_mbbit_peephole, NULL, 1 },
+{ OPT_LEVELS_SIZE, OPT_ftree_loop_optimize, NULL, 0},
+{ OPT_LEVELS_SIZE, OPT_fmove_loop_invariants, NULL, 0},
+{ OPT_LEVELS_SIZE, OPT_fbranch_count_reg, NULL, 0},
+{ OPT_LEVELS_SIZE, OPT_fdelayed_branch, NULL, 0 },
+{ OPT_LEVELS_SIZE, OPT_fsection_anchors, NULL, 1 },
 { OPT_LEVELS_SIZE, OPT_mq_class, NULL, 1 },
 { OPT_LEVELS_SIZE, OPT_mcase_vector_pcrel, NULL, 1 },
+{ OPT_LEVELS_SIZE, OPT_msize_level_, NULL, 3 },
+{ OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
+{ OPT_LEVELS_3_PLUS_SPEED_ONLY, OPT_msize_level_, NULL, 0 },
+{ OPT_LEVELS_3_PLUS_SPEED_ONLY, OPT_malign_call, NULL, 1 },
 { OPT_LEVELS_NONE, 0, NULL, 0 }
   };
 
-- 
2.17.1

cleanup cross product code in VRP

[Aldy Hernandez]

Howdy!

I've abstracted out the cross product calculations into its own 
function, and have adapted it to deal with wide ints so it's more 
reusable.  It required some shuffling around, and implementing things a 
bit different, but things should be behave as before.


I also renamed vrp_int_const_binop to make its intent clearer, 
especially now that it's really just a wrapper to wide_int_binop that 
deals with overflow.


(If wide_int_binop_overflow is generally useful, perhaps we could merge 
it with wide_int_overflow.)


Tested on x86-64 Linux.

OK?
commit eb55ab7557efb23bc6dc34d00eadabf2a73a4995
Author: Aldy Hernandez 
Date:   Mon Jul 16 14:15:37 2018 +0200

* tree-vrp.c (wide_int_binop_overflow): Rename from
vrp_int_const_binop.
Rewrite to work on trees.
(extract_range_from_multiplicative_op_1): Abstract code to...
(wide_int_range_min_max): ...here.
(wide_int_range_cross_product): ...and here.
* tree-vrp.h (wide_int_range_cross_product): New.

diff --git a/gcc/tree-vrp.c b/gcc/tree-vrp.c
index 2e1ee86a161..36349228c10 100644
--- a/gcc/tree-vrp.c
+++ b/gcc/tree-vrp.c
@@ -968,64 +968,43 @@ value_range_constant_singleton (value_range *vr)
indeterminate.  */
 
 static bool
-vrp_int_const_binop (enum tree_code code, tree val1, tree val2, wide_int *res)
+wide_int_binop_overflow (wide_int &res,
+			 enum tree_code code,
+			 const wide_int &w0, const wide_int &w1,
+			 signop sign, bool overflow_undefined)
 {
-  wi::overflow_type overflow = wi::OVF_NONE;
-  signop sign = TYPE_SIGN (TREE_TYPE (val1));
-  wide_int w1 = wi::to_wide (val1);
-  wide_int w2 = wi::to_wide (val2);
-
-  switch (code)
-{
-case RSHIFT_EXPR:
-case LSHIFT_EXPR:
-  w2 = wi::to_wide (val2, TYPE_PRECISION (TREE_TYPE (val1)));
-  /* FALLTHRU */
-case MULT_EXPR:
-case TRUNC_DIV_EXPR:
-case EXACT_DIV_EXPR:
-case FLOOR_DIV_EXPR:
-case CEIL_DIV_EXPR:
-case ROUND_DIV_EXPR:
-  if (!wide_int_binop (*res, code, w1, w2, sign, &overflow))
-	return false;
-  break;
-
-default:
-  gcc_unreachable ();
-}
+  wi::overflow_type overflow;
+  if (!wide_int_binop (res, code, w0, w1, sign, &overflow))
+return false;
 
   /* If the operation overflowed return -INF or +INF depending on the
  operation and the combination of signs of the operands.  */
-  if (overflow
-  && TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (val1)))
-{
-  int sign1 = tree_int_cst_sgn (val1);
-  int sign2 = tree_int_cst_sgn (val2);
-
-  /* Notice that we only need to handle the restricted set of
-	 operations handled by extract_range_from_binary_expr.
-	 Among them, only multiplication, addition and subtraction
-	 can yield overflow without overflown operands because we
-	 are working with integral types only... except in the
-	 case VAL1 = -INF and VAL2 = -1 which overflows to +INF
-	 for division too.  */
-
-  /* For multiplication, the sign of the overflow is given
-	 by the comparison of the signs of the operands.  */
-  if ((code == MULT_EXPR && sign1 == sign2)
+  if (overflow && overflow_undefined)
+{
+  switch (code)
+	{
+	case MULT_EXPR:
+	  /* For multiplication, the sign of the overflow is given
+	 by the comparison of the signs of the operands.  */
+	  if (sign == UNSIGNED || w0.sign_mask () == w1.sign_mask ())
+	res = wi::max_value (w0.get_precision (), sign);
+	  else
+	res = wi::min_value (w0.get_precision (), sign);
+	  return true;
+
+	case TRUNC_DIV_EXPR:
+	case FLOOR_DIV_EXPR:
+	case CEIL_DIV_EXPR:
+	case EXACT_DIV_EXPR:
+	case ROUND_DIV_EXPR:
 	  /* For division, the only case is -INF / -1 = +INF.  */
-	  || code == TRUNC_DIV_EXPR
-	  || code == FLOOR_DIV_EXPR
-	  || code == CEIL_DIV_EXPR
-	  || code == EXACT_DIV_EXPR
-	  || code == ROUND_DIV_EXPR)
-	*res = wi::max_value (TYPE_PRECISION (TREE_TYPE (val1)), sign);
-  else
-	*res = wi::min_value (TYPE_PRECISION (TREE_TYPE (val1)), sign);
-  return true;
-}
+	  res = wi::max_value (w0.get_precision (), sign);
+	  return true;
 
+	default:
+	  gcc_unreachable ();
+	}
+}
   return !overflow;
 }
 
@@ -1127,6 +1106,72 @@ ranges_from_anti_range (value_range *ar,
   return vr0->type != VR_UNDEFINED;
 }
 
+/* Order 2 sets of wide int ranges (w0/w1, w2/w3) and set MIN/MAX
+   accordingly.  */
+
+static void
+wide_int_range_min_max (wide_int &min, wide_int &max,
+			wide_int &w0, wide_int &w1, wide_int &w2, wide_int &w3,
+			signop sign)
+{
+  /* Order pairs w0,w1 and w2,w3.  */
+  if (wi::gt_p (w0, w1, sign))
+std::swap (w0, w1);
+  if (wi::gt_p (w2, w3, sign))
+std::swap (w2, w3);
+
+  /* Choose min and max from the ordered pairs.  */
+  min = wi::min (w0, w2, sign);
+  max = wi::max (w1, w3, sign);
+}
+
+/* Calculate the cross product of two sets of ranges (VR0 and VR1) and
+   store the result in [RES_LB, RES_UB].
+
+   CODE is the operation to perform with sign SIGN.
+
+   OVERFLOW_UNDEFINED is set if overfl

[RFC][debug] Add -fadd-debug-nops

[Tom de Vries]

Hi,

this is an idea that I'm currently playing around with: adding nops in
an optimized application with debug info can improve the debug info.


Consider f.i. this gdb session in foo of pr54200-2.c (using -Os):
...
(gdb) n
26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
(gdb) p a
'a' has unknown type; cast it to its declared type
(gdb) n
main () at pr54200-2.c:34
34return 0;
...

The problem is that the scope in which a is declared ends at .LBE7, and the
statement .loc for line 26 ends up attached to the ret insn:
...
.loc 1 24 11
addl%edx, %eax
.LVL1:
# DEBUG a => ax
.loc 1 26 7 is_stmt 1
.LBE7:
.loc 1 28 1 is_stmt 0
ret
.cfi_endproc
...

This patch fixes the problem (for Og and Os, the 'DEBUG a => ax' is missing
for O1 and higher) by adding a nop before the ret insn:
...
.loc 1 24 11
addl%edx, %eax
 .LVL1:
# DEBUG a => ax
.loc 1 26 7 is_stmt 1
+   nop
 .LBE7:
.loc 1 28 1 is_stmt 0
ret
.cfi_endproc
...

and instead we have:
...
(gdb) n
26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
(gdb) p a
$1 = 6
(gdb) n
main () at pr54200-2.c:34
34return 0;
...

Any comments?

Thanks,
- Tom

[debug] Add -fadd-debug-nops

---
 gcc/common.opt   |  4 
 gcc/testsuite/gcc.dg/guality/pr54200-2.c | 37 
 gcc/var-tracking.c   | 16 ++
 3 files changed, 57 insertions(+)

diff --git a/gcc/common.opt b/gcc/common.opt
index c29abdb5cb1..8e2876d2b8e 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -1504,6 +1504,10 @@ Common Report Var(flag_hoist_adjacent_loads) Optimization
 Enable hoisting adjacent loads to encourage generating conditional move
 instructions.
 
+fadd-debug-nops
+Common Report Var(flag_add_debug_nops) Optimization
+Add nops if that improves debugging of optimized code
+
 fkeep-gc-roots-live
 Common Undocumented Report Var(flag_keep_gc_roots_live) Optimization
 ; Always keep a pointer to a live memory block
diff --git a/gcc/testsuite/gcc.dg/guality/pr54200-2.c 
b/gcc/testsuite/gcc.dg/guality/pr54200-2.c
new file mode 100644
index 000..2694f7401e2
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/guality/pr54200-2.c
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-skip-if "" { *-*-* }  { "*" } { "-Og" "-Os" "-O0" } } */
+/* { dg-options "-g -fadd-debug-nops -DMAIN" } */
+
+#include "prevent-optimization.h"
+
+int o ATTRIBUTE_USED;
+
+void
+bar (void)
+{
+  o = 2;
+}
+
+int __attribute__((noinline,noclone))
+foo (int z, int x, int b)
+{
+  if (x == 1)
+{
+  bar ();
+  return z;
+}
+  else
+{
+  int a = (x + z) + b;
+  /* Add cast to prevent unsupported.  */
+  return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
+}
+}
+
+#ifdef MAIN
+int main ()
+{
+  foo (3, 2, 1);
+  return 0;
+}
+#endif
diff --git a/gcc/var-tracking.c b/gcc/var-tracking.c
index 5537fa64085..230845a38a0 100644
--- a/gcc/var-tracking.c
+++ b/gcc/var-tracking.c
@@ -9994,6 +9994,15 @@ reemit_marker_as_note (rtx_insn *insn)
 }
 }
 
+static void
+emit_nop_before (rtx_insn *insn)
+{
+  rtx_insn *insert_after = PREV_INSN (insn);
+  while (INSN_LOCATION (insert_after) == INSN_LOCATION (insn))
+insert_after = PREV_INSN (insert_after);
+  emit_insn_after (gen_nop (), insert_after);
+}
+
 /* Allocate and initialize the data structures for variable tracking
and parse the RTL to get the micro operations.  */
 
@@ -10224,6 +10233,13 @@ vt_initialize (void)
  continue;
}
 
+ /* Add debug nops before ret insn.  */
+ if (optimize
+ && flag_add_debug_nops
+ && cfun->debug_nonbind_markers
+ && returnjump_p (insn))
+   emit_nop_before (insn);
+
  if (MAY_HAVE_DEBUG_BIND_INSNS)
{
  if (CALL_P (insn))

[PATCH] Revert one more symbol_summary::get to ::get_create (PR ipa/86529).

[Martin Liška]

Hi.

This is one more revert related to symbol_summary.
Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
I'm going to install the patch.

Martin

gcc/ChangeLog:

2018-07-16  Martin Liska  

PR ipa/86529
* ipa-pure-const.c (malloc_candidate_p): Revert ::get
to ::get_create.

gcc/testsuite/ChangeLog:

2018-07-16  Martin Liska  

PR ipa/86529
* g++.dg/ipa/pr86529.C: New test.
---
 gcc/ipa-pure-const.c   |  3 +-
 gcc/testsuite/g++.dg/ipa/pr86529.C | 44 ++
 2 files changed, 45 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/g++.dg/ipa/pr86529.C


diff --git a/gcc/ipa-pure-const.c b/gcc/ipa-pure-const.c
index dede783bd5f..a9a8863d907 100644
--- a/gcc/ipa-pure-const.c
+++ b/gcc/ipa-pure-const.c
@@ -958,8 +958,7 @@ malloc_candidate_p (function *fun, bool ipa)
 	  cgraph_edge *cs = node->get_edge (call_stmt);
 	  if (cs)
 		{
-		  ipa_call_summary *es = ipa_call_summaries->get (cs);
-		  gcc_assert (es);
+		  ipa_call_summary *es = ipa_call_summaries->get_create (cs);
 		  es->is_return_callee_uncaptured = true;
 		}
 	}
diff --git a/gcc/testsuite/g++.dg/ipa/pr86529.C b/gcc/testsuite/g++.dg/ipa/pr86529.C
new file mode 100644
index 000..d753295b0a4
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ipa/pr86529.C
@@ -0,0 +1,44 @@
+// { dg-do compile }
+// { dg-options "-fipa-pure-const -std=c++11" }
+
+namespace std {
+class type_info {
+public:
+  bool operator==(type_info);
+};
+class c {
+public:
+  c(int) {}
+  type_info b;
+  virtual void *d() {
+if (b == typeid(int))
+  return e();
+return nullptr;
+  }
+  int *e() noexcept;
+};
+class h {
+public:
+  template  h(g, f j) { new c(j); }
+};
+class k {
+protected:
+  int n;
+  k() : i(0, n) {}
+  h i;
+};
+class F : k {
+  public:
+  F(int, int) {}
+  template  friend F l(const f &);
+};
+template  F l(const f &p1) { F x(int(), p1); return x; }
+template  F m() { l(int()); return F(0, 0); }
+class D {
+  F p;
+
+public:
+  D() : p(m()) {}
+};
+} // namespace std
+std::D a;

Re: [RFC][debug] Add -fadd-debug-nops

[Jakub Jelinek]

On Mon, Jul 16, 2018 at 03:29:10PM +0200, Tom de Vries wrote:
> this is an idea that I'm currently playing around with: adding nops in
> an optimized application with debug info can improve the debug info.
>
> Consider f.i. this gdb session in foo of pr54200-2.c (using -Os):
> ...
> (gdb) n
> 26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
> (gdb) p a
> 'a' has unknown type; cast it to its declared type
> (gdb) n
> main () at pr54200-2.c:34
> 34return 0;
> ...
> 
> The problem is that the scope in which a is declared ends at .LBE7, and the
> statement .loc for line 26 ends up attached to the ret insn:
> ...
> .loc 1 24 11
> addl%edx, %eax
> .LVL1:
> # DEBUG a => ax
> .loc 1 26 7 is_stmt 1
> .LBE7:
> .loc 1 28 1 is_stmt 0
> ret
> .cfi_endproc
> ...
> 
> This patch fixes the problem (for Og and Os, the 'DEBUG a => ax' is missing
> for O1 and higher) by adding a nop before the ret insn:
> ...
> .loc 1 24 11
> addl%edx, %eax
>  .LVL1:
> # DEBUG a => ax
> .loc 1 26 7 is_stmt 1
> +   nop
>  .LBE7:
> .loc 1 28 1 is_stmt 0
> ret
> .cfi_endproc
> ...
> 
> and instead we have:
> ...
> (gdb) n
> 26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
> (gdb) p a
> $1 = 6
> (gdb) n
> main () at pr54200-2.c:34
> 34return 0;
> ...
> 
> Any comments?

So is this essentially a workaround for GDB not supporting the statement
frontiers?  Isn't the right fix just to add that support instead and then
users can choose how exactly they want to step through the function in the
debugger.

Jakub

Re: [PATCH, S390] Avoid LA with base and index on z13

[Andreas Krebbel]

On 07/16/2018 01:02 PM, Robin Dapp wrote:
>> But on zEC12 LA works pretty much the same as on z13/z14, it is
>> indeed not cracked, but still a 2-cycle instruction when using
>> an index register.  So I guess the change really should apply
>> to zEC12 as well, and this could be as simple as changing the
>> above line to:
>>
>>   if (addr.indx && s390_tune >= PROCESSOR_2817_Z196)
>>
>> (Note that "addr.base && addr.indx" is the same as just checking
>> for addr.indx, since s390_decompose_address will never fill in
>> *just* an index.)
> 
> Good point, I adapted the patch and changed the comment.
> 
> Regards
>  Robin
> 
> --
> 
> gcc/ChangeLog:
> 
> 2018-07-16  Robin Dapp  
> 
>   * config/s390/s390.c (preferred_la_operand_p): Do not use
>   LA with index register on z196 or later.
> 

Ok to apply. Thanks!

Andreas

Re: [RFC][debug] Add -fadd-debug-nops

[Richard Biener]

On Mon, 16 Jul 2018, Tom de Vries wrote:

> Hi,
> 
> this is an idea that I'm currently playing around with: adding nops in
> an optimized application with debug info can improve the debug info.
> 
> 
> Consider f.i. this gdb session in foo of pr54200-2.c (using -Os):
> ...
> (gdb) n
> 26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
> (gdb) p a
> 'a' has unknown type; cast it to its declared type
> (gdb) n
> main () at pr54200-2.c:34
> 34return 0;
> ...
> 
> The problem is that the scope in which a is declared ends at .LBE7, and the
> statement .loc for line 26 ends up attached to the ret insn:
> ...
> .loc 1 24 11
> addl%edx, %eax
> .LVL1:
> # DEBUG a => ax
> .loc 1 26 7 is_stmt 1
> .LBE7:
> .loc 1 28 1 is_stmt 0
> ret
> .cfi_endproc
> ...
> 
> This patch fixes the problem (for Og and Os, the 'DEBUG a => ax' is missing
> for O1 and higher) by adding a nop before the ret insn:
> ...
> .loc 1 24 11
> addl%edx, %eax
>  .LVL1:
> # DEBUG a => ax
> .loc 1 26 7 is_stmt 1
> +   nop
>  .LBE7:
> .loc 1 28 1 is_stmt 0
> ret
> .cfi_endproc
> ...
> 
> and instead we have:
> ...
> (gdb) n
> 26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
> (gdb) p a
> $1 = 6
> (gdb) n
> main () at pr54200-2.c:34
> 34return 0;
> ...
> 
> Any comments?

Interesting idea.  I wonder if that should be generalized
to other places and how we can avoid compare-debug failures
(var-tracking usually doesn't change code-generation).

Richard.

> Thanks,
> - Tom
> 
> [debug] Add -fadd-debug-nops
> 
> ---
>  gcc/common.opt   |  4 
>  gcc/testsuite/gcc.dg/guality/pr54200-2.c | 37 
> 
>  gcc/var-tracking.c   | 16 ++
>  3 files changed, 57 insertions(+)
> 
> diff --git a/gcc/common.opt b/gcc/common.opt
> index c29abdb5cb1..8e2876d2b8e 100644
> --- a/gcc/common.opt
> +++ b/gcc/common.opt
> @@ -1504,6 +1504,10 @@ Common Report Var(flag_hoist_adjacent_loads) 
> Optimization
>  Enable hoisting adjacent loads to encourage generating conditional move
>  instructions.
>  
> +fadd-debug-nops
> +Common Report Var(flag_add_debug_nops) Optimization
> +Add nops if that improves debugging of optimized code
> +
>  fkeep-gc-roots-live
>  Common Undocumented Report Var(flag_keep_gc_roots_live) Optimization
>  ; Always keep a pointer to a live memory block
> diff --git a/gcc/testsuite/gcc.dg/guality/pr54200-2.c 
> b/gcc/testsuite/gcc.dg/guality/pr54200-2.c
> new file mode 100644
> index 000..2694f7401e2
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/guality/pr54200-2.c
> @@ -0,0 +1,37 @@
> +/* { dg-do run } */
> +/* { dg-skip-if "" { *-*-* }  { "*" } { "-Og" "-Os" "-O0" } } */
> +/* { dg-options "-g -fadd-debug-nops -DMAIN" } */
> +
> +#include "prevent-optimization.h"
> +
> +int o ATTRIBUTE_USED;
> +
> +void
> +bar (void)
> +{
> +  o = 2;
> +}
> +
> +int __attribute__((noinline,noclone))
> +foo (int z, int x, int b)
> +{
> +  if (x == 1)
> +{
> +  bar ();
> +  return z;
> +}
> +  else
> +{
> +  int a = (x + z) + b;
> +  /* Add cast to prevent unsupported.  */
> +  return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
> +}
> +}
> +
> +#ifdef MAIN
> +int main ()
> +{
> +  foo (3, 2, 1);
> +  return 0;
> +}
> +#endif
> diff --git a/gcc/var-tracking.c b/gcc/var-tracking.c
> index 5537fa64085..230845a38a0 100644
> --- a/gcc/var-tracking.c
> +++ b/gcc/var-tracking.c
> @@ -9994,6 +9994,15 @@ reemit_marker_as_note (rtx_insn *insn)
>  }
>  }
>  
> +static void
> +emit_nop_before (rtx_insn *insn)
> +{
> +  rtx_insn *insert_after = PREV_INSN (insn);
> +  while (INSN_LOCATION (insert_after) == INSN_LOCATION (insn))
> +insert_after = PREV_INSN (insert_after);
> +  emit_insn_after (gen_nop (), insert_after);
> +}
> +
>  /* Allocate and initialize the data structures for variable tracking
> and parse the RTL to get the micro operations.  */
>  
> @@ -10224,6 +10233,13 @@ vt_initialize (void)
> continue;
>   }
>  
> +   /* Add debug nops before ret insn.  */
> +   if (optimize
> +   && flag_add_debug_nops
> +   && cfun->debug_nonbind_markers
> +   && returnjump_p (insn))
> + emit_nop_before (insn);
> +
> if (MAY_HAVE_DEBUG_BIND_INSNS)
>   {
> if (CALL_P (insn))
> 
> 

-- 
Richard Biener 
SUSE LINUX GmbH, GF: Felix Imendoerffer, Jane Smithard, Graham Norton, HRB 
21284 (AG Nuernberg)

Re: [PATCH][GCC][AArch64] Updated stack-clash implementation supporting 64k probes. [patch (1/6)]

[Tamar Christina]

The 07/13/2018 17:46, Jeff Law wrote:
> On 07/12/2018 11:39 AM, Tamar Christina wrote:
> >>> +
> >>> +  /* Round size to the nearest multiple of guard_size, and calculate the
> >>> + residual as the difference between the original size and the rounded
> >>> + size. */
> >>> +  HOST_WIDE_INT rounded_size = size & -guard_size;
> >>> +  HOST_WIDE_INT residual = size - rounded_size;
> >>> +
> >>> +  /* We can handle a small number of allocations/probes inline.  
> >>> Otherwise
> >>> + punt to a loop.  */
> >>> +  if (rounded_size <= STACK_CLASH_MAX_UNROLL_PAGES * guard_size)
> >>> +{
> >>> +  for (HOST_WIDE_INT i = 0; i < rounded_size; i += guard_size)
> >>> + {
> >>> +   aarch64_sub_sp (NULL, temp2, guard_size, true);
> >>> +   emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx,
> >>> +STACK_CLASH_CALLER_GUARD));
> >>> + }
> >> So the only concern with this code is that it'll be inefficient and
> >> possibly incorrect for probe sizes larger than ARITH_FACTOR.
> >> Ultimately, that's a case I don't think we really care that much about.
> >> I wouldn't lose sleep if the port clamped the requested probing interval
> >> at ARITH_FACTOR.
> >>
> > I'm a bit confused here, the ARITH_FACTOR seems to have to do with the Ada
> > stack probing implementation, which isn't used by this new code aside
> > from the part that emits the actual probe when doing a variable or large
> > allocation in aarch64_output_probe_stack_range.
> > 
> > Clamping the probing interval at ARITH_FACTOR means we can't do 64KB
> > probing intervals. 
> It may have been a misunderstanding on my part.  My understanding is
> that ARITH_FACTOR represents the largest immediate constant we could
> handle in this code using a single insn.  Anything above ARITH_FACTOR
> needed a scratch register and I couldn't convince myself that we had a
> suitable scratch register available.
> 
> But I'm really not well versed on the aarch64 architecture or the
> various implementation details in aarch64.c.  So I'm happy to defer to
> you and others @ ARM on what's best to do here.

Ah no, that 12 bit immediate for str offset is unscaled. Scaled it's 15 bits 
for the 64bit store case.
So the actual limit is 32760, so it's quite a bit larger than ARITH_FACTOR.

The value of STACK_CLASH_CALLER_GUARD is fixed in the back-end and can't be
changed, and if it's made too big will just give a compile error.

> 
> 
> >> That can be problematical in a couple cases.  First it can run afoul of
> >> combine-stack-adjustments.  Essentially that pass will combine a series
> >> of stack adjustments into a single insn so your unrolled probing turns
> >> into something like this:
> >>
> >>   multi-page stack adjust
> >>   probe first page
> >>   probe second page
> >>   probe third page
> >>   and so on..
> >>
> > This is something we actually do want, particularly in the case of 4KB pages
> > as the immediates would fit in the store.  It's one of the things we were
> > thinking about for future improvements.
> > 
> >> That violates the design constraint that we never allocate more than a
> >> page at a time.
> > Would there be a big issue here if we didn't adhere to this constraint?
> Yes, because it enlarges a window for exploitation.  Consider signal
> delivery occurring after the adjustment but before the probes.  The
> signal handler could then be running on a clashed heap/stack.
> 

Ah, you're quite right.. I didn't factor in asynchronous events during the stack
probing.  I have restored the barriers and added some documentation on why 
they're
needed.

> > 
> >> Do you happen to have a libc.so and ld.so compiled with this code?  I've
> >> got a scanner here which will look at a DSO and flag obviously invalid
> >> stack allocations.  If you've got a suitable libc.so and ld.so I can run
> >> them through the scanner.
> >>
> >>
> >> Along similar lines, have you run the glibc testsuite with this stuff
> >> enabled by default.  That proved useful to find codegen issues,
> >> particularly with the register inheritance in the epilogue.
> >>
> > I'm running one now, I'll send the two binaries once I get the results back
> > from the run. Thanks!
> Great.  Looking forward getting those  .so files I can can throw them
> into the scanner.

I have finished running the glibc testsuite and there were no new regressions.

Thanks,
Tamar

> 
> >>> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> >>> index 
> >>> 830f97603487d6ed07c4dc854a7898c4d17894d1..d1ed54c7160ab682c78d5950947608244d293025
> >>>  100644
> >>> --- a/gcc/config/aarch64/aarch64.md
> >>> +++ b/gcc/config/aarch64/aarch64.md
> >>> @@ -3072,7 +3072,7 @@
> >>>  
> >>>  (define_insn "cmp"
> >>>[(set (reg:CC CC_REGNUM)
> >>> - (compare:CC (match_operand:GPI 0 "register_operand" "r,r,r")
> >>> + (compare:CC (match_operand:GPI 0 "register_operand" "rk,r,r")
> >>>   (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
> >>>   

[PATCH] Fix PR86523

[Richard Biener]

The following fixes PR86523, we failed to assing DIE parents to some
function-local entities with the idea scope vars would pick them up
but that's not true for some of them.

Bootstrapped and tested on x86_64-unknown-linux-gnu, LTO bootstrapped
on the GCC 8 branch (it's said LTO bootstrap is broken on trunk).

Applied to trunk.

Richard.

2018-07-16  Richard Biener  

PR lto/86523
* dwarf2out.c (dwarf2out_register_external_die): Assign DIE parents
for function-local FUNCTION_DECL and RESULT_DECL immediately.

* g++.dg/lto/pr86523-1_0.C: New testcase.
* g++.dg/lto/pr86523-2_0.C: Likewise.

diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index ba5c63eaf0b..1e33cf07f09 100644
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -5959,7 +5959,9 @@ dwarf2out_register_external_die (tree decl, const char 
*sym,
   imports the original CUs.  */
parent = comp_unit_die ();
   else if (TREE_CODE (ctx) == FUNCTION_DECL
+  && TREE_CODE (decl) != FUNCTION_DECL
   && TREE_CODE (decl) != PARM_DECL
+  && TREE_CODE (decl) != RESULT_DECL
   && TREE_CODE (decl) != BLOCK)
/* Leave function local entities parent determination to when
   we process scope vars.  */
diff --git a/gcc/testsuite/g++.dg/lto/pr86523-1_0.C 
b/gcc/testsuite/g++.dg/lto/pr86523-1_0.C
new file mode 100644
index 000..3f75cdd9d27
--- /dev/null
+++ b/gcc/testsuite/g++.dg/lto/pr86523-1_0.C
@@ -0,0 +1,21 @@
+// { dg-lto-do link }
+// { dg-lto-options {{-O2 -flto -g -shared}} }
+namespace {
+class a typedef b;
+class a {};
+} // namespace
+class c {
+struct C {
+   b d;
+};
+C e() const;
+};
+c::C c::e() const {
+C g;
+struct h {
+   C g;
+   h(C *) {}
+} f(&g);
+return g;
+}
+
diff --git a/gcc/testsuite/g++.dg/lto/pr86523-2_0.C 
b/gcc/testsuite/g++.dg/lto/pr86523-2_0.C
new file mode 100644
index 000..f156230827e
--- /dev/null
+++ b/gcc/testsuite/g++.dg/lto/pr86523-2_0.C
@@ -0,0 +1,18 @@
+// { dg-lto-do link }
+// { dg-lto-options {{-O2 -flto -g -shared}} }
+class a typedef b;
+class a {};
+class c {
+struct C {
+   b d;
+};
+C e() const;
+};
+c::C c::e() const {
+C g;
+struct h {
+   C g;
+   h(C *) {}
+} f(&g);
+return g;
+}

Re: [PATCH 0/4] Alignment option enhancements

[Richard Biener]

On Mon, Jul 16, 2018 at 10:54 AM marxin  wrote:
>
> Hi.
>
> As you probably noticed, current trunk accepts extended format
> of -falign-FOO options.
> However there are some limitations that are addressed in the patchset:
>
> 1) E.g. align_labels_max_skip and align_labels_log are separate
>values and targets can override them via LABEL_ALIGN and
>LABEL_ALIGN_MAX_SKIP.  If you take a look at code in final.c:
>
>  if (max_log < log)
> {
>   max_log = log;
>   max_skip = targetm.asm_out.label_align_max_skip (label);
> }
>
>It improves alignment, but max_skip can be zero and then we end up
>with no alignment.  Thus I see it saner to provide just a single hook
>and return align_flags class instance.
>
> 2) In final.c we mix label, jump and loop alignments. I believe when
>combining them together, one should do maximum and not rely on:
>
>  #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
>   ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
>   /* Above, we don't know whether a label, jump or loop
>  alignment was used.  Conservatively apply
>  label subalignment, not jump or loop
>  subalignment (they are almost always larger).  */
>
>That's implemented in align_flags::max function. When combining
>for instance -falign-labels=1000 and -falign-jumps=2000, I hope
>using alignment of 2000 is the right choice.

It's documented that way btw.

>
> 3) I removed various align_* defines and use directly
>align_{*}.
>
> 4) I ported visium target to provide always secondary alignment of 8B.
>That's the same what x86_64 does and was factored out in previous commits
>I did.
>
> 5) Globally MAX_CODE_ALIGN is introduced.
>
> 6) Various coding styles are fixes in target code.
>
> 7) OPT_falign_* is not set with -Os. Then --help=common -Q reports proper 
> values.
>
> I tested that on x86_64-linux-gnu and ppc64le-linux. And also I tested all 
> targets
> that I touched, these should provide equal results.
>
> Martin
>
> marxin (4):
>   Clean up of new format of -falign-FOO.
>   Fix coding style of ASM_OUTPUT_ALIGN.
>   Define MAX_CODE_ALIGN globally.
>   Do not enable OPT_falign_* for -Os.
>
>  gcc/align.h  |  80 
>  gcc/common/config/i386/i386-common.c |   3 -
>  gcc/config/alpha/alpha.c |   5 +-
>  gcc/config/i386/att.h|   2 +-
>  gcc/config/i386/cygming.h|   2 +-
>  gcc/config/i386/gas.h|   2 +-
>  gcc/config/i386/i386.c   |   5 +-
>  gcc/config/i386/x86-64.h |   2 +-
>  gcc/config/iq2000/iq2000.h   |   2 +-
>  gcc/config/m32r/m32r.h   |   3 +-
>  gcc/config/m68k/m68k.c   |  10 +-
>  gcc/config/nds32/nds32.h |   9 +-
>  gcc/config/pa/pa.h   |   2 +-
>  gcc/config/powerpcspe/powerpcspe.c   |  18 +--
>  gcc/config/rs6000/rs6000-protos.h|   2 +-
>  gcc/config/rs6000/rs6000.c   |  18 +--
>  gcc/config/rx/rx-protos.h|   2 +-
>  gcc/config/rx/rx.c   |  59 +
>  gcc/config/rx/rx.h   |   6 +-
>  gcc/config/s390/s390.c   |   9 +-
>  gcc/config/sh/sh.c   |  19 +--
>  gcc/config/sparc/sol2.h  |   2 +-
>  gcc/config/sparc/sparc.h |   2 +-
>  gcc/config/spu/spu.c |   6 +-
>  gcc/config/spu/spu.h |   2 +-
>  gcc/config/visium/visium.c   |   2 +-
>  gcc/config/visium/visium.h   |  17 +--
>  gcc/coretypes.h  |   1 +
>  gcc/doc/tm.texi  |  24 
>  gcc/doc/tm.texi.in   |   8 --
>  gcc/final.c  | 189 ---
>  gcc/flags.h  |  38 +-
>  gcc/opts.c   |  12 +-
>  gcc/output.h |   6 +-
>  gcc/system.h |   2 -
>  gcc/target.def   |  40 --
>  gcc/targhooks.h  |   4 -
>  gcc/toplev.c |  44 ++-
>  gcc/varasm.c |  14 +-
>  39 files changed, 262 insertions(+), 411 deletions(-)
>  create mode 100644 gcc/align.h
>
> --
> 2.18.0
>

[Ada] Adjust growth factor from 1/32 to 1/2 for Unbounded_String

[Pierre-Marie de Rodat]

This will reduce significantly the number of allocations done when
doing consecutive append operations.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Nicolas Roche  

gcc/ada/

* libgnat/a-strunb.adb, libgnat/a-strunb__shared.adb: Adjust growth
factor from 1/32 to 1/2 for Unbounded_String.--- gcc/ada/libgnat/a-strunb.adb
+++ gcc/ada/libgnat/a-strunb.adb
@@ -763,13 +763,13 @@ package body Ada.Strings.Unbounded is
  (Source : in out Unbounded_String;
   Chunk_Size : Natural)
is
-  Growth_Factor : constant := 32;
+  Growth_Factor : constant := 2;
   --  The growth factor controls how much extra space is allocated when
   --  we have to increase the size of an allocated unbounded string. By
   --  allocating extra space, we avoid the need to reallocate on every
   --  append, particularly important when a string is built up by repeated
   --  append operations of small pieces. This is expressed as a factor so
-  --  32 means add 1/32 of the length of the string as growth space.
+  --  2 means add 1/2 of the length of the string as growth space.
 
   Min_Mul_Alloc : constant := Standard'Maximum_Alignment;
   --  Allocation will be done by a multiple of Min_Mul_Alloc This causes

--- gcc/ada/libgnat/a-strunb__shared.adb
+++ gcc/ada/libgnat/a-strunb__shared.adb
@@ -36,13 +36,13 @@ package body Ada.Strings.Unbounded is
 
use Ada.Strings.Maps;
 
-   Growth_Factor : constant := 32;
+   Growth_Factor : constant := 2;
--  The growth factor controls how much extra space is allocated when
--  we have to increase the size of an allocated unbounded string. By
--  allocating extra space, we avoid the need to reallocate on every
--  append, particularly important when a string is built up by repeated
--  append operations of small pieces. This is expressed as a factor so
-   --  32 means add 1/32 of the length of the string as growth space.
+   --  2 means add 1/2 of the length of the string as growth space.
 
Min_Mul_Alloc : constant := Standard'Maximum_Alignment;
--  Allocation will be done by a multiple of Min_Mul_Alloc. This causes

[Ada] Illegal deferred constant causes stack overflow

[Pierre-Marie de Rodat]

This patch prevents the compiler from entering infinite recursion when
processing an illegal deferred constant.


-- Source --


--  types.ads

package Types is
   type Enum is (One, Two);
end Types;

--  types2.ads

with Types;

package Types2 is
   type Enum is private;
   One : constant Enum;
   Two : constant Enum;

private
   type Enum is new Types.Enum;
   One : constant Enum := One;
   Two : constant Enum := Two;

end Types2;


-- Compilation and output --


$ gcc -c types2.ads
types2.ads:10:04: full constant declaration appears too late
types2.ads:11:04: full constant declaration appears too late

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Hristian Kirtchev  

gcc/ada/

* sem_eval.adb (Compile_Time_Known_Value): Add a guard which prevents
the compiler from entering infinite recursion when trying to determine
whether a deferred constant has a compile time known value, and the
initialization expression of the constant is a reference to the
constant itself.--- gcc/ada/sem_eval.adb
+++ gcc/ada/sem_eval.adb
@@ -1705,29 +1705,46 @@ package body Sem_Eval is
   end if;
 
   --  If we have an entity name, then see if it is the name of a constant
-  --  and if so, test the corresponding constant value, or the name of
-  --  an enumeration literal, which is always a constant.
+  --  and if so, test the corresponding constant value, or the name of an
+  --  enumeration literal, which is always a constant.
 
   if Present (Etype (Op)) and then Is_Entity_Name (Op) then
  declare
-E : constant Entity_Id := Entity (Op);
-V : Node_Id;
+Ent : constant Entity_Id := Entity (Op);
+Val : Node_Id;
 
  begin
---  Never known at compile time if it is a packed array value.
---  We might want to try to evaluate these at compile time one
---  day, but we do not make that attempt now.
+--  Never known at compile time if it is a packed array value. We
+--  might want to try to evaluate these at compile time one day,
+--  but we do not make that attempt now.
 
 if Is_Packed_Array_Impl_Type (Etype (Op)) then
return False;
-end if;
 
-if Ekind (E) = E_Enumeration_Literal then
+elsif Ekind (Ent) = E_Enumeration_Literal then
return True;
 
-elsif Ekind (E) = E_Constant then
-   V := Constant_Value (E);
-   return Present (V) and then Compile_Time_Known_Value (V);
+elsif Ekind (Ent) = E_Constant then
+   Val := Constant_Value (Ent);
+
+   if Present (Val) then
+
+  --  Guard against an illegal deferred constant whose full
+  --  view is initialized with a reference to itself. Treat
+  --  this case as value not known at compile time.
+
+  if Is_Entity_Name (Val) and then Entity (Val) = Ent then
+ return False;
+  else
+ return Compile_Time_Known_Value (Val);
+  end if;
+
+   --  Otherwise the constant does not have a compile time known
+   --  value.
+
+   else
+  return False;
+   end if;
 end if;
  end;
 

[Ada] Violation of No_Standard_Allocators_After_Elaboration not detected

[Pierre-Marie de Rodat]

The compiler fails to generate a call to detect allocators executed after
elaboration in cases where the allocator is associated with Global_Pool_Object.
The fix is to test for this associated storage pool as part of the condition
for generating a call to System.Elaboration_Allocators.Check_Standard_Alloctor.
Also, the exception Storage_Error is now generated instead of Program_Error
for such a run-time violation, as required by the Ada RM in D.7.

The following test must compile and execute quietly:

-- Put the pragma in gnat.adc:
pragma Restrictions (No_Standard_Allocators_After_Elaboration);

package Pkg_With_Allocators is

   type Priv is private;

   procedure Allocate
 (Use_Global_Allocator : Boolean;
  During_Elaboration   : Boolean);

private

   type Rec is record
  Int : Integer;
   end record;

   type Priv is access Rec;

end Pkg_With_Allocators;

package body Pkg_With_Allocators is

   Ptr : Priv;

   procedure Allocate
 (Use_Global_Allocator : Boolean;
  During_Elaboration   : Boolean)
   is
  type Local_Acc is access Rec;

  Local_Ptr : Local_Acc;

   begin
  if Use_Global_Allocator then
 Ptr := new Rec;  -- Raise Storage_Error if after elaboration
 Ptr.Int := 1;
  else
 Local_Ptr := new Rec;  -- Raise Storage_Error if after elaboration
 Local_Ptr.Int := 1;
  end if;

  if not During_Elaboration then
 raise Program_Error;  -- No earlier exception: FAIL
  end if;

   exception
  when Storage_Error =>
 if During_Elaboration then
raise Program_Error;  -- No exception expected: FAIL
 else
null; -- Expected Storage_Error: PASS
 end if;
  when others =>
 raise Program_Error;  -- Unexpected exception: FAIL
   end Allocate;

begin
   Allocate (Use_Global_Allocator => True, During_Elaboration => True);

   Allocate (Use_Global_Allocator => False, During_Elaboration => True);
end Pkg_With_Allocators;

with Pkg_With_Allocators;

procedure Alloc_Restriction_Main is
begin
   Pkg_With_Allocators.Allocate
 (Use_Global_Allocator => True,
  During_Elaboration   => False);

   Pkg_With_Allocators.Allocate
 (Use_Global_Allocator => False,
  During_Elaboration   => False);
end Alloc_Restriction_Main;

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Gary Dismukes  

gcc/ada/

* exp_ch4.adb (Expand_N_Allocator): Test for Storage_Pool being RTE in
addition to the existing test for no Storage_Pool as a condition
enabling generation of the call to Check_Standard_Allocator when the
restriction No_Standard_Allocators_After_Elaboration is active.
* libgnat/s-elaall.ads (Check_Standard_Allocator): Correct comment to
say that Storage_Error will be raised (rather than Program_Error).
* libgnat/s-elaall.adb (Check_Standard_Allocator): Raise Storage_Error
rather than Program_Error when Elaboration_In_Progress is False.--- gcc/ada/exp_ch4.adb
+++ gcc/ada/exp_ch4.adb
@@ -4561,12 +4561,14 @@ package body Exp_Ch4 is
  end if;
   end if;
 
-  --  If no storage pool has been specified and we have the restriction
+  --  If no storage pool has been specified, or the storage pool
+  --  is System.Pool_Global.Global_Pool_Object, and the restriction
   --  No_Standard_Allocators_After_Elaboration is present, then generate
   --  a call to Elaboration_Allocators.Check_Standard_Allocator.
 
   if Nkind (N) = N_Allocator
-and then No (Storage_Pool (N))
+and then (No (Storage_Pool (N))
+   or else Is_RTE (Storage_Pool (N), RE_Global_Pool_Object))
 and then Restriction_Active (No_Standard_Allocators_After_Elaboration)
   then
  Insert_Action (N,

--- gcc/ada/libgnat/s-elaall.adb
+++ gcc/ada/libgnat/s-elaall.adb
@@ -45,7 +45,7 @@ package body System.Elaboration_Allocators is
procedure Check_Standard_Allocator is
begin
   if not Elaboration_In_Progress then
- raise Program_Error with
+ raise Storage_Error with
"standard allocator after elaboration is complete is not allowed "
& "(No_Standard_Allocators_After_Elaboration restriction active)";
   end if;

--- gcc/ada/libgnat/s-elaall.ads
+++ gcc/ada/libgnat/s-elaall.ads
@@ -51,7 +51,7 @@ package System.Elaboration_Allocators is
procedure Check_Standard_Allocator;
--  Called as part of every allocator in a program for which the restriction
--  No_Standard_Allocators_After_Elaboration is active. This will raise an
-   --  exception (Program_Error with an appropriate message) if it is called
+   --  exception (Storage_Error with an appropriate message) if it is called
--  after the call to Mark_End_Of_Elaboration.
 
 end System.Elaboration_Allocators;

[Ada] Adjust inlining in GNATprove mode for predicate/invariant/DIC

[Pierre-Marie de Rodat]

The frontend generates special functions for checking subtype predicates,
type invariants and Default_Initial_Condition aspect. These are translated
as predicates in GNATprove, and as such should no call inside these
functions should be inlined. This is similar to the existing handling of
calls inside expression functions.

There is no impact on compilation.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Yannick Moy  

gcc/ada/

* sem_res.adb (Resolve_Call): Do not inline calls inside
compiler-generated functions translated as predicates in GNATprove.--- gcc/ada/sem_res.adb
+++ gcc/ada/sem_res.adb
@@ -5374,7 +5374,7 @@ package body Sem_Res is
 
  --  A universal real conditional expression can appear in a fixed-type
  --  context and must be resolved with that context to facilitate the
- --  code generation to the backend.
+ --  code generation in the back end.
 
  elsif Nkind_In (N, N_Case_Expression, N_If_Expression)
and then Etype (N) = Universal_Real
@@ -6685,22 +6685,43 @@ package body Sem_Res is
 
 elsif Full_Analysis then
 
-   --  Do not inline calls inside expression functions, as this
+   --  Do not inline calls inside expression functions or functions
+   --  generated by the front end for subtype predicates, as this
--  would prevent interpreting them as logical formulas in
--  GNATprove. Only issue a message when the body has been seen,
--  otherwise this leads to spurious messages on callees that
--  are themselves expression functions.
 
if Present (Current_Subprogram)
- and then Is_Expression_Function_Or_Completion
-(Current_Subprogram)
+ and then
+   (Is_Expression_Function_Or_Completion (Current_Subprogram)
+ or else Is_Predicate_Function (Current_Subprogram)
+ or else Is_Invariant_Procedure (Current_Subprogram)
+ or else Is_DIC_Procedure (Current_Subprogram))
then
   if Present (Body_Id)
 and then Present (Body_To_Inline (Nam_Decl))
   then
- Cannot_Inline
-   ("cannot inline & (inside expression function)?",
-N, Nam_UA);
+ if Is_Predicate_Function (Current_Subprogram) then
+Cannot_Inline
+  ("cannot inline & (inside predicate)?",
+   N, Nam_UA);
+
+ elsif Is_Invariant_Procedure (Current_Subprogram) then
+Cannot_Inline
+  ("cannot inline & (inside invariant)?",
+   N, Nam_UA);
+
+ elsif Is_DIC_Procedure (Current_Subprogram) then
+Cannot_Inline
+("cannot inline & (inside Default_Initial_Condition)?",
+ N, Nam_UA);
+
+ else
+Cannot_Inline
+  ("cannot inline & (inside expression function)?",
+   N, Nam_UA);
+ end if;
   end if;
 
--  With the one-pass inlining technique, a call cannot be
@@ -11854,7 +11875,7 @@ package body Sem_Res is
 Analyze_And_Resolve (String_Literal_Low_Bound (Subtype_Id));
 
 --  Build bona fide subtype for the string, and wrap it in an
---  unchecked conversion, because the backend expects the
+--  unchecked conversion, because the back end expects the
 --  String_Literal_Subtype to have a static lower bound.
 
 Index_Subtype :=
@@ -11864,7 +11885,7 @@ package body Sem_Res is
 Set_Parent (Drange, N);
 Analyze_And_Resolve (Drange, Index_Type);
 
---  In the context, the Index_Type may already have a constraint,
+--  In this context, the Index_Type may already have a constraint,
 --  so use common base type on string subtype. The base type may
 --  be used when generating attributes of the string, for example
 --  in the context of a slice assignment.

[Ada] Bit_Order cannot be defined for record extensions

[Pierre-Marie de Rodat]

This patch allows the compiler to report an error on Bit_Order when
defined for a record extension.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Javier Miranda  

gcc/ada/

* sem_ch13.adb (Analyze_Attribute_Definition_Clause): Report an error
on Bit_Order when defined for a record extension.

gcc/testsuite/

* gnat.dg/bit_order1.adb: New testcase.--- gcc/ada/sem_ch13.adb
+++ gcc/ada/sem_ch13.adb
@@ -5331,6 +5331,12 @@ package body Sem_Ch13 is
Error_Msg_N
  ("Bit_Order can only be defined for record type", Nam);
 
+elsif Is_Tagged_Type (U_Ent)
+   and then Is_Derived_Type (U_Ent)
+then
+   Error_Msg_N
+ ("Bit_Order cannot be defined for record extensions", Nam);
+
 elsif Duplicate_Clause then
null;
 

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/bit_order1.adb
@@ -0,0 +1,18 @@
+--  { dg-do compile }
+
+with System;
+
+procedure Bit_Order1 is
+
+   type Sample_Ttype is tagged record
+  Data : Natural;
+   end record;
+
+   type Other_Type is new Sample_Ttype with record
+  Other_Data : String (1 .. 100);
+   end record;
+
+   for Other_Type'Bit_Order use System.High_Order_First; --  { dg-error "Bit_Order cannot be defined for record extensions" }
+begin
+   null;
+end;

[Ada] Crash processing sources under GNATprove debug mode

[Pierre-Marie de Rodat]

Processing sources under -gnatd.F the frontend may crash on
an iterator of the form 'for X of ...' over an array if the
iterator is located in an inlined subprogram.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Javier Miranda  

gcc/ada/

* exp_ch5.adb (Expand_Iterator_Loop_Over_Array): Code cleanup. Required
to avoid generating an ill-formed tree that confuses gnatprove causing
it to blowup.

gcc/testsuite/

* gnat.dg/iter2.adb, gnat.dg/iter2.ads: New testcase.--- gcc/ada/exp_ch5.adb
+++ gcc/ada/exp_ch5.adb
@@ -3711,9 +3711,14 @@ package body Exp_Ch5 is
 
   Ind_Comp :=
 Make_Indexed_Component (Loc,
-  Prefix  => Relocate_Node (Array_Node),
+  Prefix  => New_Copy_Tree (Array_Node),
   Expressions => New_List (New_Occurrence_Of (Iterator, Loc)));
 
+  --  Propagate the original node to the copy since the analysis of the
+  --  following object renaming declaration relies on the original node.
+
+  Set_Original_Node (Prefix (Ind_Comp), Original_Node (Array_Node));
+
   Prepend_To (Stats,
 Make_Object_Renaming_Declaration (Loc,
   Defining_Identifier => Id,
@@ -3755,7 +3760,7 @@ package body Exp_Ch5 is
   Defining_Identifier => Iterator,
   Discrete_Subtype_Definition =>
 Make_Attribute_Reference (Loc,
-  Prefix => Relocate_Node (Array_Node),
+  Prefix => New_Copy_Tree (Array_Node),
   Attribute_Name => Name_Range,
   Expressions=> New_List (
 Make_Integer_Literal (Loc, Dim1))),
@@ -3792,7 +3797,7 @@ package body Exp_Ch5 is
 Defining_Identifier => Iterator,
 Discrete_Subtype_Definition =>
   Make_Attribute_Reference (Loc,
-Prefix => Relocate_Node (Array_Node),
+Prefix => New_Copy_Tree (Array_Node),
 Attribute_Name => Name_Range,
 Expressions=> New_List (
   Make_Integer_Literal (Loc, Dim1))),

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/iter2.adb
@@ -0,0 +1,28 @@
+--  { dg-do compile }
+--  { dg-options "-gnatd.F -gnatws" }
+
+package body Iter2
+   with SPARK_Mode
+is
+   function To_String (Name : String) return String
+   is
+  procedure Append (Result : in out String;
+Data   :String)
+with Inline_Always;
+  procedure Append (Result : in out String;
+Data   :String)
+  is
+  begin
+ for C of Data
+ loop
+Result (1) := C;
+ end loop;
+  end Append;
+
+  Result : String (1 .. 3);
+   begin
+  Append (Result, "");
+  return Result;
+   end To_String;
+
+end Iter2;

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/iter2.ads
@@ -0,0 +1,5 @@
+package Iter2
+   with SPARK_Mode
+is
+   function To_String (Name : String) return String;
+end Iter2;

[Ada] Segmentation_Fault with Integer'Wide_Wide_Value

[Pierre-Marie de Rodat]

This patch updates the routines which produce Wide_String and Wide_Wide_String
from a String to construct a result of the proper maximum size which is later
sliced.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Hristian Kirtchev  

gcc/ada/

* libgnat/s-wchwts.adb (Wide_String_To_String): Use the appropriate
longest sequence factor. Code clean up.
(Wide_Wide_String_To_String): Use the appropriate longest sequence
factor.  Code clean up.

gcc/testsuite/

* gnat.dg/wide_wide_value1.adb: New testcase.--- gcc/ada/libgnat/s-wchwts.adb
+++ gcc/ada/libgnat/s-wchwts.adb
@@ -86,16 +86,23 @@ package body System.WCh_WtS is
  (S  : Wide_String;
   EM : WC_Encoding_Method) return String
is
-  R  : String (S'First .. S'First + 5 * S'Length); -- worst case length
-  RP : Natural;
+  Max_Chars : constant Natural := WC_Longest_Sequences (EM);
+
+  Result : String (S'First .. S'First + Max_Chars * S'Length);
+  Result_Idx : Natural;
 
begin
-  RP := R'First - 1;
-  for SP in S'Range loop
- Store_UTF_32_Character (Wide_Character'Pos (S (SP)), R, RP, EM);
+  Result_Idx := Result'First - 1;
+
+  for S_Idx in S'Range loop
+ Store_UTF_32_Character
+   (U  => Wide_Character'Pos (S (S_Idx)),
+S  => Result,
+P  => Result_Idx,
+EM => EM);
   end loop;
 
-  return R (R'First .. RP);
+  return Result (Result'First .. Result_Idx);
end Wide_String_To_String;
 

@@ -106,17 +113,23 @@ package body System.WCh_WtS is
  (S  : Wide_Wide_String;
   EM : WC_Encoding_Method) return String
is
-  R  : String (S'First .. S'First + 7 * S'Length); -- worst case length
-  RP : Natural;
+  Max_Chars : constant Natural := WC_Longest_Sequences (EM);
 
-   begin
-  RP := R'First - 1;
+  Result : String (S'First .. S'First + Max_Chars * S'Length);
+  Result_Idx : Natural;
 
-  for SP in S'Range loop
- Store_UTF_32_Character (Wide_Wide_Character'Pos (S (SP)), R, RP, EM);
+   begin
+  Result_Idx := Result'First - 1;
+
+  for S_Idx in S'Range loop
+ Store_UTF_32_Character
+   (U  => Wide_Wide_Character'Pos (S (S_Idx)),
+S  => Result,
+P  => Result_Idx,
+EM => EM);
   end loop;
 
-  return R (R'First .. RP);
+  return Result (Result'First .. Result_Idx);
end Wide_Wide_String_To_String;
 
 end System.WCh_WtS;

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/wide_wide_value1.adb
@@ -0,0 +1,60 @@
+--  { dg-do run }
+
+with Ada.Text_IO; use Ada.Text_IO;
+
+procedure Wide_Wide_Value1 is
+begin
+   begin
+  declare
+ Str : constant Wide_Wide_String :=
+ Wide_Wide_Character'Val (16#0411#) &
+ Wide_Wide_Character'Val (16#043e#) &
+ Wide_Wide_Character'Val (16#0434#) &
+ Wide_Wide_Character'Val (16#0430#) &
+ Wide_Wide_Character'Val (16#0443#) &
+ Wide_Wide_Character'Val (16#0431#) &
+ Wide_Wide_Character'Val (16#0430#) &
+ Wide_Wide_Character'Val (16#0435#) &
+ Wide_Wide_Character'Val (16#0432#) &
+ Wide_Wide_Character'Val (16#0416#) &
+ Wide_Wide_Character'Val (16#0443#) &
+ Wide_Wide_Character'Val (16#043c#) &
+ Wide_Wide_Character'Val (16#0430#) &
+ Wide_Wide_Character'Val (16#0442#) &
+ Wide_Wide_Character'Val (16#041c#) &
+ Wide_Wide_Character'Val (16#0430#) &
+ Wide_Wide_Character'Val (16#0440#) &
+ Wide_Wide_Character'Val (16#0430#) &
+ Wide_Wide_Character'Val (16#0442#) &
+ Wide_Wide_Character'Val (16#043e#) &
+ Wide_Wide_Character'Val (16#0432#) &
+ Wide_Wide_Character'Val (16#0438#) &
+ Wide_Wide_Character'Val (16#0447#);
+
+ Val : constant Integer := Integer'Wide_Wide_Value (Str);
+  begin
+ Put_Line ("ERROR: 1: Constraint_Error not raised");
+  end;
+   exception
+  when Constraint_Error =>
+ null;
+  when others =>
+ Put_Line ("ERROR: 1: unexpected exception");
+   end;
+
+   begin
+  declare
+ Str : Wide_Wide_String (1 .. 128) :=
+ (others => Wide_Wide_Character'Val (16#0FFF#));
+
+ Val : constant Integer := Integer'Wide_Wide_Value (Str);
+  begin
+ Put_Line ("ERROR: 1: Constraint_Error not raised");
+  end;
+   exception
+  when Constraint_Error =>
+ null;
+  when others =>
+ Put_Line ("ERROR: 1: unexpected exception");
+   end;
+end Wide_Wide_Value1;

[Ada] Code cleanup on functions inlining

[Pierre-Marie de Rodat]

This patch is preventive: it improves checks on inline functions that
return unconstrained type. It does not change the functionality of
the compiler.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Javier Miranda  

gcc/ada/

* inline.adb (Build_Body_To_Inline): Minor code reorganization that
ensures that calls to function Has_Single_Return() pass a decorated
tree.
(Has_Single_Return.Check_Return): Peform checks on entities (instead on
relying on their characters).--- gcc/ada/inline.adb
+++ gcc/ada/inline.adb
@@ -1085,33 +1085,9 @@ package body Inline is
  Cannot_Inline ("cannot inline & (multiple returns)?", N, Spec_Id);
  return;
 
-  --  Functions that return unconstrained composite types require
-  --  secondary stack handling, and cannot currently be inlined, unless
-  --  all return statements return a local variable that is the first
-  --  local declaration in the body.
-
-  elsif Ekind (Spec_Id) = E_Function
-and then not Is_Scalar_Type (Etype (Spec_Id))
-and then not Is_Access_Type (Etype (Spec_Id))
-and then not Is_Constrained (Etype (Spec_Id))
-  then
- if not Has_Single_Return (N)
-
-   --  Skip inlining if the function returns an unconstrained type
-   --  using an extended return statement, since this part of the
-   --  new inlining model is not yet supported by the current
-   --  implementation. ???
-
-   or else (Returns_Unconstrained_Type (Spec_Id)
- and then Has_Extended_Return)
- then
-Cannot_Inline
-  ("cannot inline & (unconstrained return type)?", N, Spec_Id);
-return;
- end if;
-
-  --  Ditto for functions that return controlled types, where controlled
-  --  actions interfere in complex ways with inlining.
+  --  Functions that return controlled types cannot currently be inlined
+  --  because they require secondary stack handling; controlled actions
+  --  may also interfere in complex ways with inlining.
 
   elsif Ekind (Spec_Id) = E_Function
 and then Needs_Finalization (Etype (Spec_Id))
@@ -1234,10 +1210,37 @@ package body Inline is
  Restore_Env;
   end if;
 
+  --  Functions that return unconstrained composite types require
+  --  secondary stack handling, and cannot currently be inlined, unless
+  --  all return statements return a local variable that is the first
+  --  local declaration in the body. We had to delay this check until
+  --  the body of the function is analyzed since Has_Single_Return()
+  --  requires a minimum decoration.
+
+  if Ekind (Spec_Id) = E_Function
+and then not Is_Scalar_Type (Etype (Spec_Id))
+and then not Is_Access_Type (Etype (Spec_Id))
+and then not Is_Constrained (Etype (Spec_Id))
+  then
+ if not Has_Single_Return (Body_To_Analyze)
+
+   --  Skip inlining if the function returns an unconstrained type
+   --  using an extended return statement, since this part of the
+   --  new inlining model is not yet supported by the current
+   --  implementation. ???
+
+   or else (Returns_Unconstrained_Type (Spec_Id)
+ and then Has_Extended_Return)
+ then
+Cannot_Inline
+  ("cannot inline & (unconstrained return type)?", N, Spec_Id);
+return;
+ end if;
+
   --  If secondary stack is used, there is no point in inlining. We have
   --  already issued the warning in this case, so nothing to do.
 
-  if Uses_Secondary_Stack (Body_To_Analyze) then
+  elsif Uses_Secondary_Stack (Body_To_Analyze) then
  return;
   end if;
 
@@ -3904,17 +3907,23 @@ package body Inline is
 if Present (Expression (N))
   and then Is_Entity_Name (Expression (N))
 then
+   pragma Assert (Present (Entity (Expression (N;
+
if No (Return_Statement) then
   Return_Statement := N;
   return OK;
 
-   elsif Chars (Expression (N)) =
- Chars (Expression (Return_Statement))
-   then
-  return OK;
-
else
-  return Abandon;
+  pragma Assert
+(Present (Entity (Expression (Return_Statement;
+
+  if Entity (Expression (N)) =
+   Entity (Expression (Return_Statement))
+  then
+ return OK;
+  else
+ return Abandon;
+  end if;
end if;
 
 --  A return statement within an extended return is a noop
@@ -3963,8 +3972,8 @@ package body Inline is
   else
  return Present (Declarations (N))
and then Present (First (Declar

[Ada] Spurious possible contraint error warning with No_Exception_Propagation

[Pierre-Marie de Rodat]

This patch corrects an issue whereby spurious unhandled exception warnings on
integer literals within static if and case expressions would be emitted when
the restriction No_Exception_Propagation is enabled.


-- Source --


--  gnat.adc

pragma Restrictions (No_Exception_Propagation);
pragma SPARK_Mode (On);

--  pack.ads

package Pack is
   procedure Filter (Ret : out Integer);
end Pack;

--  pack.adb

package body Pack is

   subtype Nat is Integer range 0 .. 10;

   Default   : constant Nat := 1;
   User_Override : constant Integer := -1;

   procedure Filter (Ret : out Integer) is
  Val : constant Nat :=
  (if User_Override in Nat then
  User_Override
   else
  Default);
   begin
  Ret := Val;
   end Filter;
end Pack;


-- Compilation and output --


& gcc -c -gnatp -gnatwa pack.adb

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Justin Squirek  

gcc/ada/

* sem_eval.adb (Eval_Integer_Literal): Add exception for avoiding
checks on expanded literals within if and case expressions.--- gcc/ada/sem_eval.adb
+++ gcc/ada/sem_eval.adb
@@ -2720,16 +2720,23 @@ package body Sem_Eval is
--  Start of processing for Eval_Integer_Literal
 
begin
-
   --  If the literal appears in a non-expression context, then it is
   --  certainly appearing in a non-static context, so check it. This is
   --  actually a redundant check, since Check_Non_Static_Context would
   --  check it, but it seems worthwhile to optimize out the call.
 
-  --  An exception is made for a literal in an if or case expression
+  --  Additionally, when the literal appears within an if or case
+  --  expression it must be checked as well. However, due to the literal
+  --  appearing within a conditional statement, expansion greatly changes
+  --  the nature of its context and performing some of the checks within
+  --  Check_Non_Static_Context on an expanded literal may lead to spurious
+  --  and misleading warnings.
 
   if (Nkind_In (Parent (N), N_If_Expression, N_Case_Expression_Alternative)
or else Nkind (Parent (N)) not in N_Subexpr)
+and then (not Nkind_In (Parent (N), N_If_Expression,
+ N_Case_Expression_Alternative)
+   or else Comes_From_Source (N))
 and then not In_Any_Integer_Context
   then
  Check_Non_Static_Context (N);

[Ada] Crash on Indefinite_Hashed_Maps with -gnata -gnateV

[Pierre-Marie de Rodat]

This patch corrects the generation of helper functions which verify the
validity of record type scalar discriminants and scalar components when
switches -gnata (assertions enabled) and -gnateV (validity checks on
subprogram parameters) are in effect.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Hristian Kirtchev  

gcc/ada/

* exp_attr.adb (Build_Record_VS_Func): Handle corner cases dealing with
class-wide types and record extensions.

gcc/testsuite/

* gnat.dg/validity_check3.adb, gnat.dg/validity_check3.ads: New
testcase.--- gcc/ada/exp_attr.adb
+++ gcc/ada/exp_attr.adb
@@ -724,13 +724,44 @@ package body Exp_Attr is
 
   Func_Id  : constant Entity_Id := Make_Temporary (Loc, 'V');
   Obj_Id   : constant Entity_Id := Make_Temporary (Loc, 'R');
-  Rec_Decl : constant Node_Id   := Declaration_Node (Rec_Typ);
-  Rec_Def  : constant Node_Id   := Type_Definition (Rec_Decl);
+  Comps: Node_Id;
   Stmts: List_Id;
+  Typ  : Entity_Id;
+  Typ_Decl : Node_Id;
+  Typ_Def  : Node_Id;
+  Typ_Ext  : Node_Id;
 
--  Start of processing for Build_Record_VS_Func
 
begin
+  Typ := Rec_Typ;
+
+  --  Use the root type when dealing with a class-wide type
+
+  if Is_Class_Wide_Type (Typ) then
+ Typ := Root_Type (Typ);
+  end if;
+
+  Typ_Decl := Declaration_Node (Typ);
+  Typ_Def  := Type_Definition (Typ_Decl);
+
+  --  The components of a derived type are located in the extension part
+
+  if Nkind (Typ_Def) = N_Derived_Type_Definition then
+ Typ_Ext := Record_Extension_Part (Typ_Def);
+
+ if Present (Typ_Ext) then
+Comps := Component_List (Typ_Ext);
+ else
+Comps := Empty;
+ end if;
+
+  --  Otherwise the components are available in the definition
+
+  else
+ Comps := Component_List (Typ_Def);
+  end if;
+
   --  The code generated by this routine is as follows:
   --
   --function Func_Id (Obj_Id : Formal_Typ) return Boolean is
@@ -774,7 +805,7 @@ package body Exp_Attr is
   if not Is_Unchecked_Union (Rec_Typ) then
  Validate_Fields
(Obj_Id => Obj_Id,
-Fields => Discriminant_Specifications (Rec_Decl),
+Fields => Discriminant_Specifications (Typ_Decl),
 Stmts  => Stmts);
   end if;
 
@@ -782,7 +813,7 @@ package body Exp_Attr is
 
   Validate_Component_List
 (Obj_Id=> Obj_Id,
- Comp_List => Component_List (Rec_Def),
+ Comp_List => Comps,
  Stmts => Stmts);
 
   --  Generate:

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/validity_check3.adb
@@ -0,0 +1,96 @@
+--  { dg-do compile }
+--  { dg-options "-gnata -gnateV" }
+
+package body Validity_Check3 is
+   procedure Proc_Priv_CW_1 (Param : Tag_1'Class) is begin null; end;
+   procedure Proc_Priv_CW_2 (Param : Tag_2'Class) is begin null; end;
+   procedure Proc_Priv_CW_3 (Param : Tag_3'Class) is begin null; end;
+   procedure Proc_Priv_CW_4 (Param : Tag_4'Class) is begin null; end;
+   procedure Proc_Priv_CW_5 (Param : Tag_5'Class) is begin null; end;
+   procedure Proc_Priv_CW_6 (Param : Tag_6'Class) is begin null; end;
+
+   procedure Proc_Priv_Rec_1 (Param : Rec_1) is begin null; end;
+   procedure Proc_Priv_Rec_2 (Param : Rec_2) is begin null; end;
+   procedure Proc_Priv_Rec_3 (Param : Rec_3) is begin null; end;
+   procedure Proc_Priv_Rec_4 (Param : Rec_4) is begin null; end;
+
+   procedure Proc_Priv_Tag_1 (Param : Tag_1) is begin null; end;
+   procedure Proc_Priv_Tag_2 (Param : Tag_2) is begin null; end;
+   procedure Proc_Priv_Tag_3 (Param : Tag_3) is begin null; end;
+   procedure Proc_Priv_Tag_4 (Param : Tag_4) is begin null; end;
+   procedure Proc_Priv_Tag_5 (Param : Tag_5) is begin null; end;
+   procedure Proc_Priv_Tag_6 (Param : Tag_6) is begin null; end;
+
+   procedure Proc_Vis_CW_1 (Param : Tag_1'Class) is begin null; end;
+   procedure Proc_Vis_CW_2 (Param : Tag_2'Class) is begin null; end;
+   procedure Proc_Vis_CW_3 (Param : Tag_3'Class) is begin null; end;
+   procedure Proc_Vis_CW_4 (Param : Tag_4'Class) is begin null; end;
+   procedure Proc_Vis_CW_5 (Param : Tag_5'Class) is begin null; end;
+   procedure Proc_Vis_CW_6 (Param : Tag_6'Class) is begin null; end;
+
+   procedure Proc_Vis_Rec_1 (Param : Rec_1) is begin null; end;
+   procedure Proc_Vis_Rec_2 (Param : Rec_2) is begin null; end;
+   procedure Proc_Vis_Rec_3 (Param : Rec_3) is begin null; end;
+   procedure Proc_Vis_Rec_4 (Param : Rec_4) is begin null; end;
+
+   procedure Proc_Vis_Tag_1 (Param : Tag_1) is begin null; end;
+   procedure Proc_Vis_Tag_2 (Param : Tag_2) is begin null; end;
+   procedure Proc_Vis_Tag_3 (Param : Tag_3) is begin null; end;
+   procedure Proc_Vis_Tag_4 (Param : Tag_4) is begin null; end;
+   procedure Proc_Vis_Tag_5 (Param : Tag_5) is begin null; end;
+   procedure Proc_Vis_Tag_6 (Param : Tag_6) is begin n

[Ada] Deconstruct always-false calls to Withed_Body in Walk_Library_Items

[Pierre-Marie de Rodat]

We previously removed the calls to Set_Withed_Body; this commit deconstructs
calls to Withed_Body, which always returned False.

The Set_Withed_Body/Withed_Body were helping the Walk_Library_Items routine
traverse the AST of several compilation units such that declarations are
visited before references. However, this never worked as it should and there is
no point to keep the code more complicated than necessary.

No test provided, because thie removed code was ineffective (and only used in
the non-compiler backends, i.e. CodePeer and GNATprove).

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Piotr Trojanek  

gcc/ada/

* sem.adb (Walk_Library_Items): Deconstruct dead code.--- gcc/ada/sem.adb
+++ gcc/ada/sem.adb
@@ -36,7 +36,6 @@ with Nlists;use Nlists;
 with Output;use Output;
 with Restrict;  use Restrict;
 with Sem_Attr;  use Sem_Attr;
-with Sem_Aux;   use Sem_Aux;
 with Sem_Ch2;   use Sem_Ch2;
 with Sem_Ch3;   use Sem_Ch3;
 with Sem_Ch4;   use Sem_Ch4;
@@ -1705,7 +1704,7 @@ package body Sem is
   --  The main unit and its spec may depend on bodies that contain generics
   --  that are instantiated in them. Iterate through the corresponding
   --  contexts before processing main (spec/body) itself, to process bodies
-  --  that may be present, together with their  context. The spec of main
+  --  that may be present, together with their context. The spec of main
   --  is processed wherever it appears in the list of units, while the body
   --  is processed as the last unit in the list.
 
@@ -2020,8 +2019,7 @@ package body Sem is
if Present (Body_CU)
  and then Body_CU /= Cunit (Main_Unit)
  and then Nkind (Unit (Body_CU)) /= N_Subprogram_Body
- and then (Nkind (Unit (Comp)) /= N_Package_Declaration
- or else Present (Withed_Body (Clause)))
+ and then Nkind (Unit (Comp)) /= N_Package_Declaration
then
   Body_U := Get_Cunit_Unit_Number (Body_CU);
 
@@ -2335,7 +2333,6 @@ package body Sem is
 
   Context_Item : Node_Id;
   Lib_Unit : Node_Id;
-  Body_CU  : Node_Id;
 
begin
   Context_Item := First (Context_Items (CU));
@@ -2346,30 +2343,6 @@ package body Sem is
  then
 Lib_Unit := Library_Unit (Context_Item);
 Action (Lib_Unit);
-
---  If the context item indicates that a package body is needed
---  because of an instantiation in CU, traverse the body now, even
---  if CU is not related to the main unit. If the generic itself
---  appears in a package body, the context item is this body, and
---  it already appears in the traversal order, so we only need to
---  examine the case of a context item being a package declaration.
-
-if Present (Withed_Body (Context_Item))
-  and then Nkind (Unit (Lib_Unit)) = N_Package_Declaration
-  and then Present (Corresponding_Body (Unit (Lib_Unit)))
-then
-   Body_CU :=
- Parent
-   (Unit_Declaration_Node
- (Corresponding_Body (Unit (Lib_Unit;
-
-   --  A body may have an implicit with on its own spec, in which
-   --  case we must ignore this context item to prevent looping.
-
-   if Unit (CU) /= Unit (Body_CU) then
-  Action (Body_CU);
-   end if;
-end if;
  end if;
 
  Context_Item := Next (Context_Item);

[Ada] Spurious error with null Abstract_State

[Pierre-Marie de Rodat]

This patch corrects the mechanism which ensures that a package with a null
Abstract_State does not introduce hidden state, by ignoring internal states
and variables because they do not represent the "source" hidden state.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Hristian Kirtchev  

gcc/ada/

* sem_util.adb (Check_No_Hidden_State): Ignore internally-generated
states and variables.

gcc/testsuite/

* gnat.dg/abstract_state1.adb, gnat.dg/abstract_state1.ads: New
testcase.--- gcc/ada/sem_util.adb
+++ gcc/ada/sem_util.adb
@@ -3228,6 +3228,13 @@ package body Sem_Util is
begin
   pragma Assert (Ekind_In (Id, E_Abstract_State, E_Variable));
 
+  --  Nothing to do for internally-generated abstract states and variables
+  --  because they do not represent the hidden state of the source unit.
+
+  if not Comes_From_Source (Id) then
+ return;
+  end if;
+
   --  Find the proper context where the object or state appears
 
   Scop := Scope (Id);

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/abstract_state1.adb
@@ -0,0 +1,5 @@
+--  { dg-do compile }
+
+package body Abstract_State1 is
+   procedure Foo is null;
+end Abstract_State1;

--- /dev/null
new file mode 100644
+++ gcc/testsuite/gnat.dg/abstract_state1.ads
@@ -0,0 +1,24 @@
+package Abstract_State1
+  with Abstract_State => null,
+   Initializes=> null
+is
+   type Complex (B : Boolean) is tagged private;
+   type No_F is tagged private;
+   X : constant No_F;
+
+   procedure Foo;
+
+private
+   type Complex (B : Boolean) is tagged record
+  G : Integer;
+  case B is
+ when True =>
+F : Integer;
+ when False =>
+null;
+  end case;
+   end record;
+
+   type No_F is new Complex (False) with null record;
+   X : constant No_F := (B => False, G => 7);
+end Abstract_State1;

[Ada] Avoid crash when traversing units with -gnatd.WW debug switch

[Pierre-Marie de Rodat]

The debug switch -gnatd.WW enables extra info when traversing library units
with Walk_Library_Items, which is used in the CodePeer and GNATprove. This
routine was crashing when trying to print info about a unit with configuration
pragmas (typically an .adc file). Now fixed.

No test, as the crash only happens when a GNATprove backend is manually called
with -gnatd.WW switch. Frontend is not affected.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Piotr Trojanek  

gcc/ada/

* sem.adb (Walk_Library_Items): Skip units with configuration pragmas
when printing debug info.--- gcc/ada/sem.adb
+++ gcc/ada/sem.adb
@@ -2242,8 +2242,14 @@ package body Sem is
 
 for Unit_Num in Done'Range loop
if not Done (Unit_Num) then
-  Write_Unit_Info
-(Unit_Num, Unit (Cunit (Unit_Num)), Withs => True);
+
+  --  Units with configuration pragmas (.ads files) have empty
+  --  compilation-unit nodes; skip printing info about them.
+
+  if Present (Cunit (Unit_Num)) then
+ Write_Unit_Info
+   (Unit_Num, Unit (Cunit (Unit_Num)), Withs => True);
+  end if;
end if;
 end loop;
 

[Ada] Deconstruct unused Withed_Body filed of N_With_Clause node

[Pierre-Marie de Rodat]

The Withed_Body field was added to N_With_Clause node to help the
Walk_Library_Items routine, which was created for the CodePeer backend
and later adopted by the GNATprove.

This routine is meant to traverse all library units, such that declarations
are visited before references. However, for complex units (in particular,
with generics and child packages) it never worked reliably and backends
developed their own workarounds. This patch deconstructs the field, as it
hasn't been used for years.

Semantics unaffected; no test provided.

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Piotr Trojanek  

gcc/ada/

* sinfo.ads, sinfo.adb (Withed_Body): Remove.
(Set_Withed_Body): Remove.--- gcc/ada/sinfo.adb
+++ gcc/ada/sinfo.adb
@@ -3522,14 +3522,6 @@ package body Sinfo is
   return Flag13 (N);
end Was_Originally_Stub;
 
-   function Withed_Body
-  (N : Node_Id) return Node_Id is
-   begin
-  pragma Assert (False
-or else NT (N).Nkind = N_With_Clause);
-  return Node1 (N);
-   end Withed_Body;
-
--
-- Field Set Procedures --
--
@@ -6990,14 +6982,6 @@ package body Sinfo is
   Set_Flag13 (N, Val);
end Set_Was_Originally_Stub;
 
-   procedure Set_Withed_Body
- (N : Node_Id; Val : Node_Id) is
-   begin
-  pragma Assert (False
-or else NT (N).Nkind = N_With_Clause);
-  Set_Node1 (N, Val);
-   end Set_Withed_Body;
-
-
-- Iterator Procedures --
-

--- gcc/ada/sinfo.ads
+++ gcc/ada/sinfo.ads
@@ -2504,12 +2504,6 @@ package Sinfo is
--Original_Node here because of the case of nested instantiations where
--the substituted node can be copied.
 
-   --  Withed_Body (Node1-Sem)
-   --Present in N_With_Clause nodes. Set if the unit in whose context
-   --the with_clause appears instantiates a generic contained in the
-   --library unit of the with_clause and as a result loads its body.
-   --Used for a more precise unit traversal for CodePeer.
-
--
-- Note on Use of End_Label and End_Span Fields --
--
@@ -6743,7 +6737,6 @@ package Sinfo is
 
   --  N_With_Clause
   --  Sloc points to first token of library unit name
-  --  Withed_Body (Node1-Sem)
   --  Name (Node2)
   --  Private_Present (Flag15) set if with_clause has private keyword
   --  Limited_Present (Flag17) set if LIMITED is present
@@ -10307,9 +10300,6 @@ package Sinfo is
function Was_Originally_Stub
  (N : Node_Id) return Boolean;-- Flag13
 
-   function Withed_Body
- (N : Node_Id) return Node_Id;-- Node1
-
--  End functions (note used by xsinfo utility program to end processing)
 

@@ -11408,9 +11398,6 @@ package Sinfo is
procedure Set_Was_Originally_Stub
  (N : Node_Id; Val : Boolean := True);-- Flag13
 
-   procedure Set_Withed_Body
- (N : Node_Id; Val : Node_Id);-- Node1
-
-
-- Iterator Procedures --
-
@@ -13613,7 +13600,6 @@ package Sinfo is
pragma Inline (Was_Attribute_Reference);
pragma Inline (Was_Expression_Function);
pragma Inline (Was_Originally_Stub);
-   pragma Inline (Withed_Body);
 
pragma Inline (Set_Abort_Present);
pragma Inline (Set_Abortable_Part);
@@ -13975,6 +13961,5 @@ package Sinfo is
pragma Inline (Set_Was_Attribute_Reference);
pragma Inline (Set_Was_Expression_Function);
pragma Inline (Set_Was_Originally_Stub);
-   pragma Inline (Set_Withed_Body);
 
 end Sinfo;

[Ada] Missing error on hidden state in instantiation

[Pierre-Marie de Rodat]

This patch modifies the analysis of package contracts to split processing
which is specific to package instantiations on its own. As a result, the
lack of indicator Part_Of can now be properly assessed.


-- Source --


--  gen_pack.ads

generic
package Gen_Pack is
   Pack_Var : Integer := 1;
end Gen_Pack;

--  gen_wrap.ads

with Gen_Pack;

generic
package Gen_Wrap is
   Wrap_Var : Integer := 1;

   package Inst is new Gen_Pack;
end Gen_Wrap;

--  pack.ads

with Gen_Pack;
with Gen_Wrap;

package Pack
  with SPARK_Mode => On,
   Abstract_State => State
is
   procedure Force_Body;

private
   package OK_Inst_1 is new Gen_Pack --  OK
 with Part_Of => State;  --  OK

   package OK_Inst_2 is new Gen_Pack;--  OK
   pragma Part_Of (State);   --  OK

   package OK_Inst_3 is new Gen_Wrap --  OK
 with Part_Of => State;  --  OK

   package OK_Inst_4 is new Gen_Wrap;--  OK
   pragma Part_Of (State);

   package Error_Inst_1 is new Gen_Pack; --  Error
   package Error_Inst_2 is new Gen_Wrap; --  Error
end Pack;

--  pack.adb

package body Pack
  with SPARK_Mode=> On,
   Refined_State =>
 (State => (OK_Inst_1.Pack_Var, OK_Inst_2.Pack_Var,
OK_Inst_3.Wrap_Var, OK_Inst_3.Inst.Pack_Var,
OK_Inst_4.Wrap_Var, OK_Inst_4.Inst.Pack_Var))
is
   procedure Force_Body is null;
end Pack;


-- Compilation and output --


$ gcc -c pack.adb
pack.ads:23:12: indicator Part_Of is required in this context (SPARK RM
  7.2.6(2))
pack.ads:23:12: "Error_Inst_1" is declared in the private part of package
  "Pack"
pack.ads:24:12: indicator Part_Of is required in this context (SPARK RM
  7.2.6(2))
pack.ads:24:12: "Error_Inst_2" is declared in the private part of package
  "Pack"

Tested on x86_64-pc-linux-gnu, committed on trunk

2018-07-16  Hristian Kirtchev  

gcc/ada/

* contracts.adb (Analyze_Contracts): Add specialized processing for
package instantiation contracts.
(Analyze_Package_Contract): Remove the verification of a missing
Part_Of indicator.
(Analyze_Package_Instantiation_Contract): New routine.
* contracts.ads (Analyze_Package_Contract): Update the comment on
usage.
* sem_prag.adb (Check_Missing_Part_Of): Ensure that the entity of the
instance is being examined when trying to determine whether a package
instantiation needs a Part_Of indicator.--- gcc/ada/contracts.adb
+++ gcc/ada/contracts.adb
@@ -53,6 +53,13 @@ with Tbuild;   use Tbuild;
 
 package body Contracts is
 
+   procedure Analyze_Package_Instantiation_Contract (Inst_Id : Entity_Id);
+   --  Analyze all delayed pragmas chained on the contract of package
+   --  instantiation Inst_Id as if they appear at the end of a declarative
+   --  region. The pragmas in question are:
+   --
+   --Part_Of
+
procedure Build_And_Analyze_Contract_Only_Subprograms (L : List_Id);
--  (CodePeer): Subsidiary procedure to Analyze_Contracts which builds the
--  contract-only subprogram body of eligible subprograms found in L, adds
@@ -386,6 +393,11 @@ package body Contracts is
  elsif Nkind (Decl) = N_Object_Declaration then
 Analyze_Object_Contract (Defining_Entity (Decl));
 
+ --  Package instantiation
+
+ elsif Nkind (Decl) = N_Package_Instantiation then
+Analyze_Package_Instantiation_Contract (Defining_Entity (Decl));
+
  --  Protected units
 
  elsif Nkind_In (Decl, N_Protected_Type_Declaration,
@@ -1074,17 +1086,6 @@ package body Contracts is
  end if;
   end if;
 
-  --  Check whether the lack of indicator Part_Of agrees with the placement
-  --  of the package instantiation with respect to the state space.
-
-  if Is_Generic_Instance (Pack_Id) then
- Prag := Get_Pragma (Pack_Id, Pragma_Part_Of);
-
- if No (Prag) then
-Check_Missing_Part_Of (Pack_Id);
- end if;
-  end if;
-
   --  Restore the SPARK_Mode of the enclosing context after all delayed
   --  pragmas have been analyzed.
 
@@ -1100,6 +1101,62 @@ package body Contracts is
   end if;
end Analyze_Package_Contract;
 
+   
+   -- Analyze_Package_Instantiation_Contract --
+   
+
+   --  WARNING: This routine manages SPARK regions. Return statements must be
+   --  replaced by gotos which jump to the end of the routine and restore the
+   --  SPARK mode.
+
+   procedure Analyze_Package_Instantiation_Contract (Inst_Id : Entity_Id) is
+  Inst_Spec : constant Node_Id :

Re: [RFC][debug] Add -fadd-debug-nops

[Tom de Vries]

On 07/16/2018 03:34 PM, Jakub Jelinek wrote:
> On Mon, Jul 16, 2018 at 03:29:10PM +0200, Tom de Vries wrote:
>> this is an idea that I'm currently playing around with: adding nops in
>> an optimized application with debug info can improve the debug info.
>>
>> Consider f.i. this gdb session in foo of pr54200-2.c (using -Os):
>> ...
>> (gdb) n
>> 26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
>> (gdb) p a
>> 'a' has unknown type; cast it to its declared type
>> (gdb) n
>> main () at pr54200-2.c:34
>> 34return 0;
>> ...
>>
>> The problem is that the scope in which a is declared ends at .LBE7, and the
>> statement .loc for line 26 ends up attached to the ret insn:
>> ...
>> .loc 1 24 11
>> addl%edx, %eax
>> .LVL1:
>> # DEBUG a => ax
>> .loc 1 26 7 is_stmt 1
>> .LBE7:
>> .loc 1 28 1 is_stmt 0
>> ret
>> .cfi_endproc
>> ...
>>
>> This patch fixes the problem (for Og and Os, the 'DEBUG a => ax' is missing
>> for O1 and higher) by adding a nop before the ret insn:
>> ...
>> .loc 1 24 11
>> addl%edx, %eax
>>  .LVL1:
>> # DEBUG a => ax
>> .loc 1 26 7 is_stmt 1
>> +   nop
>>  .LBE7:
>> .loc 1 28 1 is_stmt 0
>> ret
>> .cfi_endproc
>> ...
>>
>> and instead we have:
>> ...
>> (gdb) n
>> 26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
>> (gdb) p a
>> $1 = 6
>> (gdb) n
>> main () at pr54200-2.c:34
>> 34return 0;
>> ...
>>
>> Any comments?
> 
> So is this essentially a workaround for GDB not supporting the statement
> frontiers?

AFAIU now, the concept of location views addresses this problem, so yes.

> Isn't the right fix just to add that support instead and then
> users can choose how exactly they want to step through the function in the
> debugger.

Right, but in the mean time I don't mind having an option that lets me
filter out noise in guality test results.

Thanks,
- Tom

Re: [PATCH 1/3] S/390: Implement -mfentry

[Andreas Krebbel]

On 07/16/2018 09:48 AM, Ilya Leoshkevich wrote:
> This is the counterpart of the i386 feature introduced by
> 39a5a6a4: Add direct support for Linux kernel __fentry__ patching.
> 
> On i386, the difference between mcount and fentry is that fentry
> comes before the prolog. On s390 mcount already comes before the
> prolog, but takes 4 instructions. This patch introduces the more
> efficient implementation (just 1 instruction) and puts it under
> -mfentry flag.
> 
> The produced code is compatible only with newer glibc versions,
> which provide the __fentry__ symbol and do not clobber %r0 when
> resolving lazily bound functions. Because 31-bit PLT stubs assume
> %r12 contains GOT address, which is not the case when the code runs
> before the prolog, -mfentry is allowed only for 64-bit code.
> 
> Also, code compiled with -mfentry cannot be used for the nested C
> functions, since they both use %r0. In this case instrumentation is
> not insterted, and a new warning is issued for each affected nested
> function.
> 
> * gcc/common.opt: Add the new warning.
> * gcc/config/s390/s390.c (s390_function_profiler): Emit
> "brasl %r0,__fentry__" when -mfentry is specified.
> (s390_option_override_internal): Disallow -mfentry for
> 31-bit CPUs.
> * gcc/config/s390/s390.opt: Add the new option.
> * gcc/testsuite/gcc.target/s390/mfentry-m64.c:
> New testcase.

Thanks! I've committed your patch with a modified changelog entry.

There are several ChangeLog files in the GCC source tree.  Paths have to be 
relative to these. There
is e.g. a separate ChangeLog file for the testsuite.

Bye,

Andreas


> ---
>  gcc/common.opt  |  5 +
>  gcc/config/s390/s390.c  | 18 --
>  gcc/config/s390/s390.opt|  5 +
>  gcc/testsuite/gcc.target/s390/mfentry-m64.c |  8 
>  4 files changed, 34 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/s390/mfentry-m64.c
> 
> diff --git a/gcc/common.opt b/gcc/common.opt
> index c29abdb5cb1..4d031e81b09 100644
> --- a/gcc/common.opt
> +++ b/gcc/common.opt
> @@ -571,6 +571,11 @@ Wattribute-alias
>  Common Var(warn_attributes) Init(1) Warning
>  Warn about type safety and similar errors in attribute alias and related.
>  
> +Wcannot-profile
> +Common Var(warn_cannot_profile) Init(1) Warning
> +Warn when profiling instrumentation was requested, but could not be applied 
> to
> +a certain function.
> +
>  Wcast-align
>  Common Var(warn_cast_align) Warning
>  Warn about pointer casts which increase alignment.
> diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
> index 23c3f3db621..3a406b955a0 100644
> --- a/gcc/config/s390/s390.c
> +++ b/gcc/config/s390/s390.c
> @@ -13144,14 +13144,22 @@ s390_function_profiler (FILE *file, int labelno)
>op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
>SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
>  
> -  op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
> +  op[4] = gen_rtx_SYMBOL_REF (Pmode, flag_fentry ? "__fentry__" : "_mcount");
>if (flag_pic)
>  {
>op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
>op[4] = gen_rtx_CONST (Pmode, op[4]);
>  }
>  
> -  if (TARGET_64BIT)
> +  if (flag_fentry)
> +{
> +  if (cfun->static_chain_decl)
> +warning (OPT_Wcannot_profile, "nested functions cannot be profiled "
> + "with -mfentry on s390");
> +  else
> +output_asm_insn ("brasl\t0,%4", op);
> +}
> +  else if (TARGET_64BIT)
>  {
>output_asm_insn ("stg\t%0,%1", op);
>output_asm_insn ("larl\t%2,%3", op);
> @@ -15562,6 +15570,12 @@ s390_option_override_internal (bool main_args_p,
>/* Call target specific restore function to do post-init work.  At the 
> moment,
>   this just sets opts->x_s390_cost_pointer.  */
>s390_function_specific_restore (opts, NULL);
> +
> +  /* Check whether -mfentry is supported. It cannot be used in 31-bit mode,
> + because 31-bit PLT stubs assume that %r12 contains GOT address, which is
> + not the case when the code runs before the prolog. */
> +  if (opts->x_flag_fentry && !TARGET_64BIT)
> +error ("-mfentry is supported only for 64-bit CPUs");
>  }
>  
>  static void
> diff --git a/gcc/config/s390/s390.opt b/gcc/config/s390/s390.opt
> index eb16f9c821f..59e97d031b4 100644
> --- a/gcc/config/s390/s390.opt
> +++ b/gcc/config/s390/s390.opt
> @@ -293,3 +293,8 @@ locations which have been patched as part of using one of 
> the
>  -mindirect-branch* or -mfunction-return* options.  The sections
>  consist of an array of 32 bit elements. Each entry holds the offset
>  from the entry to the patched location.
> +
> +mfentry
> +Target Report Var(flag_fentry)
> +Emit profiling counter call at function entry before prologue. The compiled
> +code will require a 64-bit CPU and glibc 2.29 or newer to run.
> diff --git a/gcc/testsuite/gcc.target/s390

Re: [PATCH 2/3] S/390: Implement -mrecord-mcount

[Andreas Krebbel]

On 07/16/2018 09:48 AM, Ilya Leoshkevich wrote:
> This is the counterpart of the i386 feature introduced by
> 39a5a6a4: Add direct support for Linux kernel __fentry__ patching.
> 
> * gcc/config/s390/s390.c (s390_function_profiler): Generate
> __mcount_loc section.
> * gcc/config/s390/s390.opt: Add the new option.
> * gcc/testsuite/gcc.target/s390/mrecord-mcount.c:
> New testcase.

Applied. Thanks!

Andreas

Re: [PATCH 3/3] S/390: Implement -mnop-mcount

[Andreas Krebbel]

On 07/16/2018 09:48 AM, Ilya Leoshkevich wrote:
> This is the counterpart of the i386 feature introduced by
> 39a5a6a4: Add direct support for Linux kernel __fentry__ patching.
> 
> On i386 the profiler call sequence always consists of 1 call
> instruction, so -mnop-mcount generates a single nop with the same
> length as a call. For S/390 longer sequences may be used in some
> cases, so -mnop-mcount generates the corresponding amount of nops.
> 
> * gcc/config/s390/s390.c (s390_function_profiler): Generate
> nops instead of profiler call sequences.
> * gcc/config/s390/s390.opt: Add the new option.
> * gcc/testsuite/gcc.target/s390/mnop-mcount-m31-fpic.c:
> New testcase.
> * gcc/testsuite/gcc.target/s390/mnop-mcount-m31-mzarch.c
> New testcase.
> * gcc/testsuite/gcc.target/s390/mnop-mcount-m31.c
> New testcase.
> * gcc/testsuite/gcc.target/s390/mnop-mcount-m64-mfentry.c
> New testcase.
> * gcc/testsuite/gcc.target/s390/mnop-mcount-m64.c
> New testcase.

Applied. Thanks!

Andreas

Re: [PATCH] S/390: libstdc++: 64 and 32 bit baseline update

[Jonathan Wakely]

On 16/07/18 09:58 +0200, Andreas Krebbel wrote:

On 07/13/2018 04:58 PM, Andreas Schwab wrote:

On Jul 13 2018, Andreas Krebbel  wrote:


@@ -5645,3 +5657,5 @@ OBJECT:8:_ZTTSi@@GLIBCXX_3.4
 OBJECT:8:_ZTTSo@@GLIBCXX_3.4
 OBJECT:8:_ZTTSt13basic_istreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
 OBJECT:8:_ZTTSt13basic_ostreamIwSt11char_traitsIwEE@@GLIBCXX_3.4
+TLS:4:_ZSt11__once_call@@GLIBCXX_3.4.11
+TLS:4:_ZSt15__once_callable@@GLIBCXX_3.4.11


You should not have any TLS entries.


Ok, thanks. I've committed the patch with these entries removed.


Thanks!

Re: [RFC][debug] Add -fadd-debug-nops

[Tom de Vries]

On 07/16/2018 03:50 PM, Richard Biener wrote:
> On Mon, 16 Jul 2018, Tom de Vries wrote:
> 
>> Hi,
>>
>> this is an idea that I'm currently playing around with: adding nops in
>> an optimized application with debug info can improve the debug info.
>>
>>
>> Consider f.i. this gdb session in foo of pr54200-2.c (using -Os):
>> ...
>> (gdb) n
>> 26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
>> (gdb) p a
>> 'a' has unknown type; cast it to its declared type
>> (gdb) n
>> main () at pr54200-2.c:34
>> 34return 0;
>> ...
>>
>> The problem is that the scope in which a is declared ends at .LBE7, and the
>> statement .loc for line 26 ends up attached to the ret insn:
>> ...
>> .loc 1 24 11
>> addl%edx, %eax
>> .LVL1:
>> # DEBUG a => ax
>> .loc 1 26 7 is_stmt 1
>> .LBE7:
>> .loc 1 28 1 is_stmt 0
>> ret
>> .cfi_endproc
>> ...
>>
>> This patch fixes the problem (for Og and Os, the 'DEBUG a => ax' is missing
>> for O1 and higher) by adding a nop before the ret insn:
>> ...
>> .loc 1 24 11
>> addl%edx, %eax
>>  .LVL1:
>> # DEBUG a => ax
>> .loc 1 26 7 is_stmt 1
>> +   nop
>>  .LBE7:
>> .loc 1 28 1 is_stmt 0
>> ret
>> .cfi_endproc
>> ...
>>
>> and instead we have:
>> ...
>> (gdb) n
>> 26return a; /* { dg-final { gdb-test . "(int)a" "6" } } */
>> (gdb) p a
>> $1 = 6
>> (gdb) n
>> main () at pr54200-2.c:34
>> 34return 0;
>> ...
>>
>> Any comments?
> 
> Interesting idea.  I wonder if that should be generalized
> to other places

I kept the option name general, to allow for that.

And indeed, this is a point-fix patch. I've been playing around with a
more generic patch that adds nops such that each is_stmt .loc is
associated with a unique insn, but that was embedded in an
fkeep-vars-live branch, so this patch is minimally addressing the first
problem I managed to reproduce on trunk.

> and how we can avoid compare-debug failures
> (var-tracking usually doesn't change code-generation).
> 

I could remove the cfun->debug_nonbind_markers test and move the
nop-insertion to a separate pass or some such.

Thanks,
- Tom

[PATCH] Fix middle-end/86528

[Bernd Edlinger]

Hi,

this fixes PR middle-end/86528.


Bootstrapped and reg-tested on x86_64-pc-linux-gnu.
Is it OK for trunk?


Thanks
Bernd.
gcc:
2018-07-04  Bernd Edlinger  

	PR middle-end/86528
	* builtins.c (check_access): Bail out if range[0] is no INTEGER_CST.
	* expr.c (string_constant): Fix the element size of ARRAY_TYPE.

testsuite:
2018-07-04  Bernd Edlinger  

	PR middle-end/86528
	* gcc.c-torture/execute/pr86528.c: New test.
	* gcc.dg/Wrestrict-10.c (test_arr_strcat_2): Fix typo.

--- /dev/null	2018-07-02 16:09:41.095282291 +0200
+++ gcc/testsuite/gcc.c-torture/execute/pr86528.c	2018-07-16 14:32:24.555426245 +0200
@@ -0,0 +1,20 @@
+/* PR middle-end/86528 */
+
+void __attribute__((noinline, noclone))
+test(char *data, __SIZE_TYPE__ len)
+{
+static char const appended[] = "/./";
+char *buf = __builtin_alloca (len + sizeof appended);
+__builtin_memcpy (buf, data, len);
+__builtin_strcpy (buf + len, &appended[data[len - 1] == '/']);
+if (__builtin_strcmp(buf, "test1234/./"))
+__builtin_abort();
+}
+
+int
+main()
+{
+   char *arg = "test1234/";
+   test(arg, __builtin_strlen(arg));
+   return 0;
+}
--- gcc/testsuite/gcc.dg/Wrestrict-10.c.jj	2018-05-16 04:30:38.0 +0200
+++ gcc/testsuite/gcc.dg/Wrestrict-10.c	2018-07-16 16:06:13.250852255 +0200
@@ -39,8 +39,7 @@ test_arr_strcat_1 (void)
 void __attribute__ ((noclone, noinline))
 test_arr_strcat_2 (void)
 {
-  /* This probably deserves a warning.  */
-  strcpy (b.a, &b.a[i]);
+  strcat (b.a, &b.a[i]);/* { dg-warning "\\\[-Wrestrict" } */
 }
 
 void __attribute__ ((noclone, noinline))
--- gcc/builtins.c.jj	2018-07-13 16:10:45.0 +0200
+++ gcc/builtins.c	2018-07-16 12:48:18.880896706 +0200
@@ -3192,6 +3192,10 @@ check_access (tree exp, tree, tree, tree
   if (dstwrite)
 get_size_range (dstwrite, range);
 
+  /* This can happen at -O0.  */
+  if (range[0] && TREE_CODE (range[0]) != INTEGER_CST)
+return false;
+
   tree func = get_callee_fndecl (exp);
 
   /* First check the number of bytes to be written against the maximum
--- gcc/expr.c.jj	2018-07-09 22:33:48.0 +0200
+++ gcc/expr.c	2018-07-16 13:18:03.433353514 +0200
@@ -11341,7 +11341,9 @@ string_constant (tree arg, tree *ptr_off
   tree offset = wide_int_to_tree (sizetype, base_off);
   if (varidx)
 {
-  if (tree eltsize = TYPE_SIZE_UNIT (TREE_TYPE (array)))
+  if (TREE_CODE (TREE_TYPE (array)) != ARRAY_TYPE)
+	return NULL_TREE;
+  if (tree eltsize = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
 	{
 	  /* Add the scaled variable index to the constant offset.  */
 	  tree eltoff = fold_build2 (MULT_EXPR, TREE_TYPE (offset),

Targetted B2B companies contact list

[laruel . horton]

Hi,

Would you be interested in Bentley Systems Users List for your sales and  
marketing campaigns?


We can provide you Database from North America, Latin America, EMEA, and  
APAC.


Information Fields – Name, Title, Email, Phone Numbers, Company Name, and  
Company Details like Physical Address, Web Address, Revenue Size, Employee  
Size and industry.


Below are the few targeted lists you might be interested: Autodesk,  
Keynote, Intergraph, Oracle, Jasper soft, SAP Business Objects, IBM Cognos,  
TIBCO Spotfire, Hadoop, Oracle BI, Sisense and Many more.


Bentley Systems Specialties: Bentley MXROAD, Bentley Architecture, Bentley  
Map, Bentley InRoads, CulvertMaster,


Please review and let me know if you are interested and I will get back to  
you with more information for the same.


Regards,

Laruel Horton
Demand Generation-Database Coordinator

To opt-out response ‘Remove’ in the subject line.

Re: [2/2] Add AddressSanitizer annotations to std::string.

[Mikhail Kashkarov]

Rebased and update patch (typos, add missing annotations),
add ASan teststo verify string annotation.


On 06/28/2018 11:09 AM, Mikhail Kashkarov wrote:
> ^ gentle ping.
>
>
> On 06/08/2018 05:54 PM, Mikhail Kashkarov wrote:
>> Hello,
>>
>> I've updated patches for std::string sanitization and disabling CXX11
>> string SSO usage for correct sanitization.
>>
>>>>       _M_destroy(_M_allocated_capacity);
>>>>+    else
>>>>+      __annotate_delete();
>>>
>>>Do these calls definitely optimize away completely when not
>>>sanitizing? Even for -O1, -Os and -Og?
>>>
>>>For std::vector annotation I used macros to add these annotations, so
>>>there is no change to the generated code when annotations are
>>>disabled. But it makes the code quite ugly.
>>
>> I've checked asm code for string-inst.o and it looks like this calls are
>> optimized away, but there are some light changes after patch fir .
>>
>>> Right, I was wondering specifically about the 
>>> instantiations. I could be wrong but I don't think anything in
>>>  creates, destroys or modifies a std::basic_string.
>>
>> I was confused by reinterpret_cast's on strings in fstream.tcc, looks
>> like this is not needed, you are right.
>>
>>>>   // calling 4.0.x+ _S_create.
>>>>   __p->_M_set_sharable();
>>>>+#if _GLIBCXX_SANITIZER_ANNOTATE_STRING
>>>>+  __p->_M_length = 0;
>>>>+#endif
>>>
>>> Why is this needed? I think a comment explaining it would help (like
>>> the one above explaining why calling _M_set_sharable() is needed).
>>
>> Checked current version without this change, looks like now it works,
>> reverted.
>>
>> Short summary:
>> The reason for changing strings layout under sanitization is to place string
>> char buffer on heap for correct aligning in 32-bit environments,
>> both pre-CXX11 and CXX11 strings ABI.
>>
>> | Sanitize string | string type | ABI is changed? | 32-bit | 64-bit |
>> |-+-+-++|
>> | FULL    | SSO-string  | yes | +  | +  |
>> | | COW-string  | yes | +  | +  |
>> |-+-+-++|
>> | PARTIAL | SSO-string  | no  | -+(*)  | +  |
>> | | COW-string  | no  | -  | +  |
>> *only longs strings are sanitized for 32-bit
>>
>> Some functions with new define looks a bit messy without changing internal
>> functions(operator=), I'm also not sure if disabling string SSO usage define
>> should also affects other parts that relies on basic_string class size
>> (checks
>> with static_assert in exceptions/shim-facets).
>>
>>
>> Any thoughts?
>>
>> On 05/29/2018 06:55 PM, Jonathan Wakely wrote:
>>> On 29/05/18 18:18 +0300, Kashkarov Mikhail wrote:
 Jonathan Wakely  writes:
>> --- a/libstdc++-v3/include/bits/fstream.tcc
>> +++ b/libstdc++-v3/include/bits/fstream.tcc
>> @@ -1081,6 +1081,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
>>
>>     // Inhibit implicit instantiations for required instantiations,
>>     // which are defined via explicit instantiations elsewhere.
>> +#if !_GLIBCXX_SANITIZE_STRING
>> #if _GLIBCXX_EXTERN_TEMPLATE
>>     extern template class basic_filebuf;
>>     extern template class basic_ifstream;
>> @@ -1094,6 +1095,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
>>     extern template class basic_fstream;
>> #endif
>> #endif
>> +#endif // !_GLIBCXX_SANITIZE_STRING
> Why do we need to disable these explicit instantiation declarations?
> Are they affected by the std::string layout changes? Is that just
> because of the constructors taking std::string, or something else?
 Libstdc++ build is not sanitized, so macroses that requires
 AddressSanitizer support will not applied and these templates will be
 instantate without support for ASan annotations.
>>> Right, I was wondering specifically about the 
>>> instantiations. I could be wrong but I don't think anything in
>>>  creates, destroys or modifies a std::basic_string.
>>>
>>>
>>>
>>>
>>>

-- 
Best regards,
Kashkarov Mikhail
Samsung R&D Institute Russia

From c08b3073e8d7d785425e972a0381cbbb9e3c2f58 Mon Sep 17 00:00:00 2001
From: Mikhail Kashkarov 
Date: Fri, 8 Jun 2018 14:11:11 +0300
Subject: [PATCH 2/3] Add AddressSanitizer annotations to std::string.

	* include/bits/c++config: define
	(_GLIBCXX_SANITIZE_STRING_PARTIAL, _GLIBCXX_SANITIZE_STRING_FULL)
	(_GLIBCXX_SANTIZE_STRING, _GLIBCXX_SANITIZER_ANNOTATE_STRING)
	(_GLIBCXX_SANITIZER_DISABLE_LOCAL_STRING_ANNOTATION)
	(_GLIBCXX_SANITIZER_ALIGN_COW_STRING)
	* doc/xml/manual/using.xml: document GLIBCXX_SANITIZE_STRING_PARTIAL,
	_GLIBCXX_SANITIZE_STRING_FULL
	* include/bits/basic_string.h [_GLIBCXX_USE_DUAL_ABI]
	(_asan_traits<_CharT, _Alloc>, _asan_traits<_CharT, allocator<_CharT>)
	(_asan_traits::__annotate_delete, _asan_traits::__

Re: [PATCH] [v3][aarch64] Avoid tag collisions for loads falkor

[Kyrill Tkachov]

Hi Siddhesh,

On 16/07/18 11:00, Siddhesh Poyarekar wrote:

Hi,

This is a rewrite of the tag collision avoidance patch that Kugan had
written as a machine reorg pass back in February.

The falkor hardware prefetching system uses a combination of the
source, destination and offset to decide which prefetcher unit to
train with the load.  This is great when loads in a loop are
sequential but sub-optimal if there are unrelated loads in a loop that
tag to the same prefetcher unit.

This pass attempts to rename the desination register of such colliding
loads using routines available in regrename.c so that their tags do
not collide.  This shows some performance gains with mcf and xalancbmk
(~5% each) and will be tweaked further.  The pass is placed near the
fag end of the pass list so that subsequent passes don't inadvertantly
end up undoing the renames.

A full gcc bootstrap and testsuite ran successfully on aarch64, i.e. it
did not introduce any new regressions.  I also did a make-check with
-mcpu=falkor to ensure that there were no regressions.  The couple of
regressions I found were target-specific and were related to scheduling
and cost differences and are not correctness issues.

Changes from v2:
- Ignore SVE instead of asserting that falkor does not support sve

Changes from v1:

- Fixed up issues pointed out by Kyrill
- Avoid renaming R0/V0 since they could be return values
- Fixed minor formatting issues.

2018-07-02  Siddhesh Poyarekar  
Kugan Vivekanandarajah  

* config/aarch64/falkor-tag-collision-avoidance.c: New file.
* config.gcc (extra_objs): Build it.
* config/aarch64/t-aarch64 (falkor-tag-collision-avoidance.o):
Likewise.
* config/aarch64/aarch64-passes.def
(pass_tag_collision_avoidance): New pass.
* config/aarch64/aarch64.c (qdf24xx_tunings): Add
AARCH64_EXTRA_TUNE_RENAME_LOAD_REGS to tuning_flags.
(aarch64_classify_address): Remove static qualifier.
(aarch64_address_info, aarch64_address_type): Move to...
* config/aarch64/aarch64-protos.h: ... here.
(make_pass_tag_collision_avoidance): New function.
* config/aarch64/aarch64-tuning-flags.def (rename_load_regs):
New tuning flag.


I think this looks ok now. You'll still need a maintainer to approve it though.

Thanks for iterating on this,
Kyrill


CC: james.greenha...@arm.com
CC: kyrylo.tkac...@foss.arm.com
---
  gcc/config.gcc|   2 +-
  gcc/config/aarch64/aarch64-passes.def |   1 +
  gcc/config/aarch64/aarch64-protos.h   |  49 +
  gcc/config/aarch64/aarch64-tuning-flags.def   |   2 +
  gcc/config/aarch64/aarch64.c  |  48 +-
  .../aarch64/falkor-tag-collision-avoidance.c  | 857 ++
  gcc/config/aarch64/t-aarch64  |   9 +
  7 files changed, 922 insertions(+), 46 deletions(-)
  create mode 100644 gcc/config/aarch64/falkor-tag-collision-avoidance.c

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 63162aab676..c66dda0770e 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -304,7 +304,7 @@ aarch64*-*-*)
extra_headers="arm_fp16.h arm_neon.h arm_acle.h"
c_target_objs="aarch64-c.o"
cxx_target_objs="aarch64-c.o"
-   extra_objs="aarch64-builtins.o aarch-common.o cortex-a57-fma-steering.o"
+   extra_objs="aarch64-builtins.o aarch-common.o cortex-a57-fma-steering.o 
falkor-tag-collision-avoidance.o"
target_gtfiles="\$(srcdir)/config/aarch64/aarch64-builtins.c"
target_has_targetm_common=yes
;;
diff --git a/gcc/config/aarch64/aarch64-passes.def 
b/gcc/config/aarch64/aarch64-passes.def
index 87747b420b0..f61a8870aa1 100644
--- a/gcc/config/aarch64/aarch64-passes.def
+++ b/gcc/config/aarch64/aarch64-passes.def
@@ -19,3 +19,4 @@
 .  */
  
  INSERT_PASS_AFTER (pass_regrename, 1, pass_fma_steering);

+INSERT_PASS_AFTER (pass_machine_reorg, 1, pass_tag_collision_avoidance);
diff --git a/gcc/config/aarch64/aarch64-protos.h 
b/gcc/config/aarch64/aarch64-protos.h
index 87c6ae20278..0a4558c2023 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -283,6 +283,49 @@ struct tune_params
const struct cpu_prefetch_tune *prefetch;
  };
  
+/* Classifies an address.

+
+   ADDRESS_REG_IMM
+   A simple base register plus immediate offset.
+
+   ADDRESS_REG_WB
+   A base register indexed by immediate offset with writeback.
+
+   ADDRESS_REG_REG
+   A base register indexed by (optionally scaled) register.
+
+   ADDRESS_REG_UXTW
+   A base register indexed by (optionally scaled) zero-extended register.
+
+   ADDRESS_REG_SXTW
+   A base register indexed by (optionally scaled) sign-extended register.
+
+   ADDRESS_LO_SUM
+   A LO_SUM rtx with a base register and "LO12" symbol relocation.
+
+   ADDRESS_SYMBOLIC:
+   A constant symbolic address, in pc-relative literal pool.  */
+
+enum aarch64_address_

Re: [C++ Patch] Check permerror return value

[Nathan Sidwell]

On 07/16/2018 07:46 AM, Paolo Carlini wrote:

Hi,

over the last weeks, while working on various diagnostic issues, I 
noticed a few defective permerror + inform pairs. Tested x86_64-linux.




ok, thanks


--
Nathan Sidwell

Re: [PATCH][GCC][AArch64] Updated stack-clash implementation supporting 64k probes. [patch (1/6)]

[Jeff Law]

On 07/16/2018 07:54 AM, Tamar Christina wrote:
> The 07/13/2018 17:46, Jeff Law wrote:
>> On 07/12/2018 11:39 AM, Tamar Christina wrote:
> +
> +  /* Round size to the nearest multiple of guard_size, and calculate the
> + residual as the difference between the original size and the rounded
> + size. */
> +  HOST_WIDE_INT rounded_size = size & -guard_size;
> +  HOST_WIDE_INT residual = size - rounded_size;
> +
> +  /* We can handle a small number of allocations/probes inline.  
> Otherwise
> + punt to a loop.  */
> +  if (rounded_size <= STACK_CLASH_MAX_UNROLL_PAGES * guard_size)
> +{
> +  for (HOST_WIDE_INT i = 0; i < rounded_size; i += guard_size)
> + {
> +   aarch64_sub_sp (NULL, temp2, guard_size, true);
> +   emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx,
> +STACK_CLASH_CALLER_GUARD));
> + }
 So the only concern with this code is that it'll be inefficient and
 possibly incorrect for probe sizes larger than ARITH_FACTOR.
 Ultimately, that's a case I don't think we really care that much about.
 I wouldn't lose sleep if the port clamped the requested probing interval
 at ARITH_FACTOR.

>>> I'm a bit confused here, the ARITH_FACTOR seems to have to do with the Ada
>>> stack probing implementation, which isn't used by this new code aside
>>> from the part that emits the actual probe when doing a variable or large
>>> allocation in aarch64_output_probe_stack_range.
>>>
>>> Clamping the probing interval at ARITH_FACTOR means we can't do 64KB
>>> probing intervals. 
>> It may have been a misunderstanding on my part.  My understanding is
>> that ARITH_FACTOR represents the largest immediate constant we could
>> handle in this code using a single insn.  Anything above ARITH_FACTOR
>> needed a scratch register and I couldn't convince myself that we had a
>> suitable scratch register available.
>>
>> But I'm really not well versed on the aarch64 architecture or the
>> various implementation details in aarch64.c.  So I'm happy to defer to
>> you and others @ ARM on what's best to do here.
> 
> Ah no, that 12 bit immediate for str offset is unscaled. Scaled it's 15 bits 
> for the 64bit store case.
> So the actual limit is 32760, so it's quite a bit larger than ARITH_FACTOR.
> 
> The value of STACK_CLASH_CALLER_GUARD is fixed in the back-end and can't be
> changed, and if it's made too big will just give a compile error.
ACK.  Thanks for explaining.


> 
>>
>>
 That can be problematical in a couple cases.  First it can run afoul of
 combine-stack-adjustments.  Essentially that pass will combine a series
 of stack adjustments into a single insn so your unrolled probing turns
 into something like this:

   multi-page stack adjust
   probe first page
   probe second page
   probe third page
   and so on..

>>> This is something we actually do want, particularly in the case of 4KB pages
>>> as the immediates would fit in the store.  It's one of the things we were
>>> thinking about for future improvements.
>>>
 That violates the design constraint that we never allocate more than a
 page at a time.
>>> Would there be a big issue here if we didn't adhere to this constraint?
>> Yes, because it enlarges a window for exploitation.  Consider signal
>> delivery occurring after the adjustment but before the probes.  The
>> signal handler could then be running on a clashed heap/stack.
>>
> 
> Ah, you're quite right.. I didn't factor in asynchronous events during the 
> stack
> probing.  I have restored the barriers and added some documentation on why 
> they're
> needed.
Sounds good.


> 
>>>
 Do you happen to have a libc.so and ld.so compiled with this code?  I've
 got a scanner here which will look at a DSO and flag obviously invalid
 stack allocations.  If you've got a suitable libc.so and ld.so I can run
 them through the scanner.


 Along similar lines, have you run the glibc testsuite with this stuff
 enabled by default.  That proved useful to find codegen issues,
 particularly with the register inheritance in the epilogue.

>>> I'm running one now, I'll send the two binaries once I get the results back
>>> from the run. Thanks!
>> Great.  Looking forward getting those  .so files I can can throw them
>> into the scanner.
> 
> I have finished running the glibc testsuite and there were no new regressions.
Great.  And as mentioned privately, scanning looks reasonable.

So I've got no concerns at this point.  If the aarch64 maintainers are
OK with the changes this stuff can go in.

jeff

Re: [GCC][PATCH][Aarch64] Exploiting BFXIL when OR-ing two AND-operations with appropriate bitmasks

[Sam Tebbs]

Hi Sudi,

Thanks for noticing that, I have attached an improved patch file that 
fixes this issue.


Below is an updated description and changelog:

This patch adds an optimisation that exploits the AArch64 BFXIL instruction
when or-ing the result of two bitwise and operations with non-overlapping
bitmasks (e.g. (a & 0x) | (b & 0x)).

Example:

unsigned long long combine(unsigned long long a, unsigned long long b) {
  return (a & 0xll) | (b & 0xll);
}

void read(unsigned long long a, unsigned long long b, unsigned long long 
*c) {

  *c = combine(a, b);
}

When compiled with -O2, read would result in:

read:
  and   x5, x1, #0x
  and   x4, x0, #0x
  orr   x4, x4, x5
  str   x4, [x2]
  ret

But with this patch results in:

read:
  mov    x4, x0
  bfxil    x4, x1, 0, 32
  str    x4, [x2]
  ret

Bootstrapped and regtested on aarch64-none-linux-gnu and 
aarch64-none-elf with no regressions.



gcc/
2018-07-11  Sam Tebbs  

    * config/aarch64/aarch64.md (*aarch64_bfxil, *aarch64_bfxil_alt):
    Define.
    * config/aarch64/aarch64-protos.h (aarch64_is_left_consecutive):
    Define.
    * config/aarch64/aarch64.c (aarch64_is_left_consecutive): New 
function.


gcc/testsuite
2018-07-11  Sam Tebbs  

    * gcc.target/aarch64/combine_bfxil.c: New file.
    * gcc.target/aarch64/combine_bfxil_2.c: New file.


On 07/16/2018 11:54 AM, Sudakshina Das wrote:

Hi Sam

On 13/07/18 17:09, Sam Tebbs wrote:

Hi all,

This patch adds an optimisation that exploits the AArch64 BFXIL 
instruction
when or-ing the result of two bitwise and operations with 
non-overlapping

bitmasks (e.g. (a & 0x) | (b & 0x)).

Example:

unsigned long long combine(unsigned long long a, unsigned long long b) {
   return (a & 0xll) | (b & 0xll);
}

void read2(unsigned long long a, unsigned long long b, unsigned long 
long *c,

   unsigned long long *d) {
   *c = combine(a, b); *d = combine(b, a);
}

When compiled with -O2, read2 would result in:

read2:
   and   x5, x1, #0x
   and   x4, x0, #0x
   orr   x4, x4, x5
   and   x1, x1, #0x
   and   x0, x0, #0x
   str   x4, [x2]
   orr   x0, x0, x1
   str   x0, [x3]
   ret

But with this patch results in:

read2:
   mov   x4, x1
   bfxil x4, x0, 0, 32
   str   x4, [x2]
   bfxil x0, x1, 0, 32
   str   x0, [x3]
   ret
   Bootstrapped and regtested on aarch64-none-linux-gnu and 
aarch64-none-elf with no regressions.


I am not a maintainer but I have a question about this patch. I may be 
missing something or reading

it wrong. So feel free to point it out:

+(define_insn "*aarch64_bfxil"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+    (ior:DI (and:DI (match_operand:DI 1 "register_operand" "r")
+            (match_operand 3 "const_int_operand"))
+        (and:DI (match_operand:DI 2 "register_operand" "0")
+            (match_operand 4 "const_int_operand"]
+  "INTVAL (operands[3]) == ~INTVAL (operands[4])
+    && aarch64_is_left_consecutive (INTVAL (operands[3]))"
+  {
+    HOST_WIDE_INT op4 = INTVAL (operands[4]);
+    operands[3] = GEN_INT (64 - ceil_log2 (op4));
+    output_asm_insn ("bfxil\\t%0, %1, 0, %3", operands);

In the BFXIL you are reading %3 LSB bits from operand 1 and putting it 
in the LSBs of %0.

This means that the pattern should be masking the 32-%3 MSB of %0 and
%3 LSB of %1. So shouldn't operand 4 is LEFT_CONSECUTIVE>

Can you please compare a simpler version of the above example you gave to
make sure the generated assembly is equivalent before and after the 
patch:


void read2(unsigned long long a, unsigned long long b, unsigned long 
long *c) {

  *c = combine(a, b);
}


From the above text

read2:
  and   x5, x1, #0x
  and   x4, x0, #0x
  orr   x4, x4, x5

read2:
  mov   x4, x1
  bfxil x4, x0, 0, 32

This does not seem equivalent to me.

Thanks
Sudi

+    return "";
+  }
+  [(set_attr "type" "bfx")]
+)

gcc/
2018-07-11  Sam Tebbs  

 * config/aarch64/aarch64.md (*aarch64_bfxil, 
*aarch64_bfxil_alt):

 Define.
 * config/aarch64/aarch64-protos.h 
(aarch64_is_left_consecutive):

 Define.
 * config/aarch64/aarch64.c (aarch64_is_left_consecutive): 
New function.


gcc/testsuite
2018-07-11  Sam Tebbs  

 * gcc.target/aarch64/combine_bfxil.c: New file.
 * gcc.target/aarch64/combine_bfxil_2.c: New file.






diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index 514ddc4..b025cd6 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -558,4 +558,6 @@ rtl_opt_pass *make_pass_fma_steering (gcc::context *ctxt);
 
 poly_uint64 aarch64_regmode_natural_size (machine_mode);
 
+bool aarch64_is_left_consecutive (HOST_WIDE_INT);
+
 #endif /* GCC_AARCH64_PROTOS_H */
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
ind

[PATCH] PR libstdc++/86537 remove less> partial specialization

[Jonathan Wakely]

The standard doesn't specify this partial specialization (it was
required after the changes in N2637 but then should have been removed
following LWG 1262). Its presence is observable because it causes
different results when operator< has been overloaded for a shared_ptr
specialization.

PR libstdc++/86537
* include/bits/shared_ptr.h (less>): Remove
non-standard partial specialization.
* include/bits/shared_ptr_base.h (_Sp_less): Remove class definition.
(less<__shared_ptr<_Tp, _Lp>): Remove partial specialization.
* testsuite/20_util/shared_ptr/comparison/86537.cc: New test.

Tested powerpc64le-linux, committed to trunk.


commit 1c48999500e277c2ff1e742214857faef842f80c
Author: Jonathan Wakely 
Date:   Mon Jul 16 16:52:19 2018 +0100

PR libstdc++/86537 remove less> partial specialization

The standard doesn't specify this partial specialization (it was
required after the changes in N2637 but then should have been removed
following LWG 1262). Its presence is observable because it causes
different results when operator< has been overloaded for a shared_ptr
specialization.

PR libstdc++/86537
* include/bits/shared_ptr.h (less>): Remove
non-standard partial specialization.
* include/bits/shared_ptr_base.h (_Sp_less): Remove class 
definition.
(less<__shared_ptr<_Tp, _Lp>): Remove partial specialization.
* testsuite/20_util/shared_ptr/comparison/86537.cc: New test.

diff --git a/libstdc++-v3/include/bits/shared_ptr.h 
b/libstdc++-v3/include/bits/shared_ptr.h
index 2a54145083d..2a82f186328 100644
--- a/libstdc++-v3/include/bits/shared_ptr.h
+++ b/libstdc++-v3/include/bits/shared_ptr.h
@@ -480,10 +480,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 operator>=(nullptr_t, const shared_ptr<_Tp>& __a) noexcept
 { return !(nullptr < __a); }
 
-  template
-struct less> : public _Sp_less>
-{ };
-
   // 20.7.2.2.8 shared_ptr specialized algorithms.
   template
 inline void
diff --git a/libstdc++-v3/include/bits/shared_ptr_base.h 
b/libstdc++-v3/include/bits/shared_ptr_base.h
index 887edbd7879..f3994da158f 100644
--- a/libstdc++-v3/include/bits/shared_ptr_base.h
+++ b/libstdc++-v3/include/bits/shared_ptr_base.h
@@ -1502,22 +1502,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 operator>=(nullptr_t, const __shared_ptr<_Tp, _Lp>& __a) noexcept
 { return !(nullptr < __a); }
 
-  template
-struct _Sp_less : public binary_function<_Sp, _Sp, bool>
-{
-  bool
-  operator()(const _Sp& __lhs, const _Sp& __rhs) const noexcept
-  {
-   typedef typename _Sp::element_type element_type;
-   return std::less()(__lhs.get(), __rhs.get());
-  }
-};
-
-  template
-struct less<__shared_ptr<_Tp, _Lp>>
-: public _Sp_less<__shared_ptr<_Tp, _Lp>>
-{ };
-
   // 20.7.2.2.8 shared_ptr specialized algorithms.
   template
 inline void
diff --git a/libstdc++-v3/testsuite/20_util/shared_ptr/comparison/86537.cc 
b/libstdc++-v3/testsuite/20_util/shared_ptr/comparison/86537.cc
new file mode 100644
index 000..c8440a38ad0
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/shared_ptr/comparison/86537.cc
@@ -0,0 +1,69 @@
+// Copyright (C) 2018 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// .
+
+// { dg-do run { target c++11 } }
+
+#include 
+#include 
+
+struct Should_not_happen { };
+
+struct X { };
+
+namespace std {
+  template<> struct less {
+bool operator()(X*, X*) const { throw Should_not_happen(); }
+  };
+}
+
+bool custom_op_called = false;
+
+bool
+operator<(const std::shared_ptr&, const std::shared_ptr&)
+{
+  custom_op_called = true;
+  return false;
+}
+
+void
+test01()
+{
+  const std::shared_ptr sp;
+  bool b = sp < sp;
+  VERIFY( !b );
+  VERIFY( custom_op_called );
+
+  std::less> lt;
+  custom_op_called = false;
+  b = lt(sp, sp);
+  VERIFY( !b );
+  VERIFY( custom_op_called ); // PR libstdc++/86537 and LWG DR 1262
+
+#if __cplusplus >= 201402L
+  std::less<> ltv;
+  custom_op_called = false;
+  b = ltv(sp, sp);
+  VERIFY( !b );
+  VERIFY( custom_op_called );
+#endif
+}
+
+int
+main()
+{
+  test01();
+}

[PATCH] scripts/create_testsuite_files: Fix typo in comment.

[Jonathan Wakely]

Committed to trunk.


commit 2a123b20c5bbb6b54d157281e2dbe546a28086f5
Author: Jonathan Wakely 
Date:   Mon Jul 16 18:41:31 2018 +0100

* scripts/create_testsuite_files: Fix typo in comment.

diff --git a/libstdc++-v3/scripts/create_testsuite_files 
b/libstdc++-v3/scripts/create_testsuite_files
index 2686c87273d..156304c2ad2 100755
--- a/libstdc++-v3/scripts/create_testsuite_files
+++ b/libstdc++-v3/scripts/create_testsuite_files
@@ -11,7 +11,7 @@
 # existing files are listed in "testsuite_files" in the output
 # directory.  Subsequent runs pull the list from that file, allowing
 # users to trim the list down to problematic tests, or just run
-# paticular directories or sub-directories of tests.
+# particular directories or sub-directories of tests.
 #
 # Selecting individual tests can also be done with RUNTESTFLAGS, but
 # that doesn't really do all that we are trying to accomplish here.

Re: [PATCH] Fix middle-end/86528

[Martin Sebor]

On 07/16/2018 09:36 AM, Bernd Edlinger wrote:

Hi,

this fixes PR middle-end/86528.


Bootstrapped and reg-tested on x86_64-pc-linux-gnu.
Is it OK for trunk?


Thanks -- the string_constant change also fixes bug 86532.

There is another problem in the subsequent handling of
the CONSTRUCTOR -- it ignores the non-constant VARIDX.  Fixing
that is easy but unfortunately prevents many strlen calls that
could be folded from folding (and makes the newly added tests
fail). For instance:

  static const char a[2][3] = { "1", "12" };
  if (strlen (&a[1][i]) > 2)
abort ();

That needs some other changes to handle.  Let me take care of
that.

Martin

Re: [PATCH] Fix middle-end/86528

[Richard Biener]

On July 16, 2018 5:36:22 PM GMT+02:00, Bernd Edlinger 
 wrote:
>Hi,
>
>this fixes PR middle-end/86528.
>
>
>Bootstrapped and reg-tested on x86_64-pc-linux-gnu.
>Is it OK for trunk?

OK. 

Richard. 

>
>Thanks
>Bernd.

Re: [RFC] Induction variable candidates not sufficiently general

[Kelvin Nilsen]

eturn len;
}

int main (int argc, char *argv[]) {

  char *text_input = "this is some text that should be longer";
  unsigned long long int len_limit = strlen (text_input);
  int pos = 0;

  int cur_match = 0;
  int depth = 0;

  int result = bt_skip_func(len_limit, text_input + 3, (long long) 3, 
(unsigned long long) 1);
}
.file   "ivsimple.long.c"
.abiversion 2
.section".text"
.align 2
.p2align 4,,15
.globl bt_skip_func
.type   bt_skip_func, @function
bt_skip_func:
.LFB22:
.cfi_startproc
subf 5,5,4   # 13   [c=4 l=4]  *subfdi3
std 28,-32(1)# 107  [c=4 l=4]  *movdi_internal64/0
std 29,-24(1)# 108  [c=4 l=4]  *movdi_internal64/0
addi 8,6,1   # 14   [c=4 l=4]  *adddi3/1
std 30,-16(1)# 109  [c=4 l=4]  *movdi_internal64/0
std 31,-8(1) # 110  [c=4 l=4]  *movdi_internal64/0
.cfi_offset 28, -32
.cfi_offset 29, -24
.cfi_offset 30, -16
.cfi_offset 31, -8
addi 12,5,1  # 18   [c=4 l=4]  *adddi3/1
addi 30,5,2  # 29   [c=4 l=4]  *adddi3/1
addi 28,5,3  # 40   [c=4 l=4]  *adddi3/1
addi 11,4,1  # 19   [c=4 l=4]  *adddi3/1
addi 31,4,2  # 30   [c=4 l=4]  *adddi3/1
addi 29,4,3  # 41   [c=4 l=4]  *adddi3/1
b .L2# 153  [c=4 l=4]  jump
.p2align 4,,15
.L4:
lbzx 10,12,6 # 20   [c=8 l=4]  zero_extendqisi2/0
lbzx 7,11,6  # 21   [c=8 l=4]  zero_extendqisi2/0
cmpw 7,10,7  # 22   [c=4 l=4]  *cmpsi_signed
bne 7,.L5# 23   [c=4 l=4]  *rs6000.md:12311
beq 5,.L3# 27   [c=4 l=4]  *rs6000.md:12311
lbzx 10,30,6 # 31   [c=8 l=4]  zero_extendqisi2/0
lbzx 7,31,6  # 32   [c=8 l=4]  zero_extendqisi2/0
addi 8,8,4   # 51   [c=4 l=4]  *adddi3/1
cmpw 7,10,7  # 33   [c=4 l=4]  *cmpsi_signed
bne 7,.L3# 34   [c=4 l=4]  *rs6000.md:12311
addi 9,6,3   # 36   [c=4 l=4]  *adddi3/1
cmpld 7,3,9  # 37   [c=4 l=4]  *cmpdi_unsigned
beq 7,.L3# 38   [c=4 l=4]  *rs6000.md:12311
lbzx 10,28,6 # 42   [c=8 l=4]  zero_extendqisi2/0
lbzx 7,29,6  # 43   [c=8 l=4]  zero_extendqisi2/0
addi 6,6,4   # 47   [c=4 l=4]  *adddi3/1
cmpld 5,3,6  # 48   [c=4 l=4]  *cmpdi_unsigned
cmpw 7,10,7  # 44   [c=4 l=4]  *cmpsi_signed
bne 7,.L3# 45   [c=4 l=4]  *rs6000.md:12311
beq 5,.L6# 49   [c=4 l=4]  *rs6000.md:12311
lbzx 9,5,6   # 52   [c=8 l=4]  zero_extendqisi2/0
lbzx 10,4,6  # 53   [c=8 l=4]  zero_extendqisi2/0
cmpw 7,9,10  # 54   [c=4 l=4]  *cmpsi_signed
bne 7,.L7# 55   [c=4 l=4]  *rs6000.md:12311
.L2:
cmpld 7,3,8  # 59   [c=4 l=4]  *cmpdi_unsigned
addi 9,6,2   # 25   [c=4 l=4]  *adddi3/1
cmpld 5,3,9  # 26   [c=4 l=4]  *cmpdi_unsigned
bne 7,.L4# 60   [c=4 l=4]  *rs6000.md:12311
.L6:
mr 9,3   # 7[c=4 l=4]  *movdi_internal64/2
.L3:
ld 28,-32(1) # 113  [c=8 l=4]  *movdi_internal64/1
ld 29,-24(1) # 114  [c=8 l=4]  *movdi_internal64/1
ld 30,-16(1) # 115  [c=8 l=4]  *movdi_internal64/1
ld 31,-8(1)  # 116  [c=8 l=4]  *movdi_internal64/1
extsw 3,9# 69   [c=4 l=4]  extendsidi2/1
.cfi_remember_state
.cfi_restore 31
.cfi_restore 30
.cfi_restore 29
.cfi_restore 28
blr  # 118  [c=4 l=4]  simple_return
.p2align 4,,15
.L5:
.cfi_restore_state
ld 28,-32(1) # 131  [c=8 l=4]  *movdi_internal64/1
ld 29,-24(1) # 132  [c=8 l=4]  *movdi_internal64/1
ld 30,-16(1) # 133  [c=8 l=4]  *movdi_internal64/1
ld 31,-8(1)  # 134  [c=8 l=4]  *movdi_internal64/1
mr 9,8   # 8[c=4 l=4]  *movdi_internal64/2
extsw 3,9# 128  [c=4 l=4]  extendsidi2/1
.cfi_remember_state
.cfi_restore 31
.cfi_restore 30
.cfi_restore 29
.cfi_restore 28
blr  # 136  [c=4 l=4]  simple_return
.p2align 4,,15
.L7:
.cfi_restore_state
ld 28,-32(1) # 144  [c=8 l=4]  *movdi_internal64/1
ld 29,-24(1) # 145  [c=8 l=4]  *movdi_internal64/1
ld 30,-16(1) # 146  [c=8 l=4]  *movdi_internal64/1
ld 31,-8(1)  # 147  [c=8 l=4]  *movdi_internal64/1
mr 9,6   # 9[c=4 l=4]  *movdi_internal64/2
extsw 3,9# 141  [c=4 l=4]  extendsidi2/1
.cfi_restore 31
.cfi_restore 30
.cfi_restore 29
.cfi_restore 28
blr  # 149  [c=4 l=4]  simple_return
.long 0
.byte 0,0,0,0,0,4,0,0
.cfi_endproc
.LFE22:
.size 

[PATCH, cvs] Clarify that powerpc64le-linux-gnu is a primary platform

[Bill Schmidt]

Hi,

I occasionally get questions about powerpc64le-linux-gnu being a primary 
platform
for GCC, since the release criteria don't specifically call it out (see
https://gcc.gnu.org/gcc-8/criteria.html).  Currently powerpc64-linux-gnu (for
big-endian) is listed instead, which is misleading.  I wonder if we could make
it clearer that both endianness flavors are considered primary platforms.  One
possibility is below, but I'd be happy with any other way of getting this 
across.

Thanks for considering!

Bill


Index: criteria.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/criteria.html,v
retrieving revision 1.2
diff -r1.2 criteria.html
110c110
< powerpc64-unknown-linux-gnu
---
> powerpc64{,le}-unknown-linux-gnu

Re: [PATCH, cvs] Clarify that powerpc64le-linux-gnu is a primary platform

[Jeff Law]

On 07/16/2018 12:30 PM, Bill Schmidt wrote:
> Hi,
> 
> I occasionally get questions about powerpc64le-linux-gnu being a primary 
> platform
> for GCC, since the release criteria don't specifically call it out (see
> https://gcc.gnu.org/gcc-8/criteria.html).  Currently powerpc64-linux-gnu (for
> big-endian) is listed instead, which is misleading.  I wonder if we could make
> it clearer that both endianness flavors are considered primary platforms.  One
> possibility is below, but I'd be happy with any other way of getting this 
> across.
> 
> Thanks for considering!
I think given the clearly stated direction for linux on power that we
should make ppc64le the primary target per your patch.

jeff

[PATCH] Make function clone name numbering independent.

[Michael Ploujnikov]

Hi,

This patch is a small part of the work I'm doing to make function 
codegen/assembly independent from one another as mentioned in: 
https://gcc.gnu.org/ml/gcc/2018-07/msg00210.html. It deals with clone_fn_id_num 
rather than object UIDs and I figured it's better to make my first submission 
with a smaller, simpler and self-contained patch.

This changes clone_function_name_1 such that clone names are based on a 
per-function rather than a global counter so that the number of clones of one 
function doesn't affect the numbering of clone names of other functions.

This should have minimal impact as the only user of the clone names that I 
found (https://gcc.gnu.org/ml/gcc/2013-03/msg00268.html) doesn't actually care 
about the specific numeric values.


Thanks
- Michael

gcc:
2018-07-16  Michael Ploujnikov  

   Make function clone name numbering independent.
   * cgraphclones.c: Replace clone_fn_id_num with clone_fn_ids.
   (clone_function_name_1): Use it.

testsuite:
2018-07-16  Michael Ploujnikov  

Clone id counters should be completely independent from one another.
* gcc/testsuite/gcc.dg/independent-cloneids-1.c: New test.


---
 gcc/cgraphclones.c| 11 ++--
 gcc/testsuite/gcc.dg/independent-cloneids-1.c | 38 +++
 2 files changed, 47 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/independent-cloneids-1.c

diff --git gcc/cgraphclones.c gcc/cgraphclones.c
index 69572b9..c5a40bd 100644
--- gcc/cgraphclones.c
+++ gcc/cgraphclones.c
@@ -528,7 +528,7 @@ cgraph_node::create_clone (tree new_decl, gcov_type 
gcov_count, int freq,
   return new_node;
 }
 
-static GTY(()) unsigned int clone_fn_id_num;
+static GTY(()) hash_map *clone_fn_ids;
 
 /* Return a new assembler name for a clone with SUFFIX of a decl named
NAME.  */
@@ -543,7 +543,14 @@ clone_function_name_1 (const char *name, const char 
*suffix)
   memcpy (prefix, name, len);
   strcpy (prefix + len + 1, suffix);
   prefix[len] = symbol_table::symbol_suffix_separator ();
-  ASM_FORMAT_PRIVATE_NAME (tmp_name, prefix, clone_fn_id_num++);
+  unsigned int *suffix_counter;
+  if (!clone_fn_ids) {
+/* Initialize the per-function counter hash table if this is the first 
call */
+clone_fn_ids = hash_map::create_ggc (1000);
+  }
+  suffix_counter = &clone_fn_ids->get_or_insert(name);
+  ASM_FORMAT_PRIVATE_NAME (tmp_name, prefix, *suffix_counter);
+  *suffix_counter = *suffix_counter + 1;
   return get_identifier (tmp_name);
 }
 
diff --git gcc/testsuite/gcc.dg/independent-cloneids-1.c 
gcc/testsuite/gcc.dg/independent-cloneids-1.c
new file mode 100644
index 000..d723e20
--- /dev/null
+++ gcc/testsuite/gcc.dg/independent-cloneids-1.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -fipa-cp -fipa-cp-clone -fdump-ipa-cp"  } */
+
+extern int printf (const char *, ...);
+
+static int __attribute__ ((noinline))
+foo (int arg)
+{
+  return 7 * arg;
+}
+
+static int __attribute__ ((noinline))
+bar (int arg)
+{
+  return arg * arg;
+}
+
+int
+baz (int arg)
+{
+  printf("%d\n", bar (3));
+  printf("%d\n", bar (4));
+  printf("%d\n", foo (5));
+  printf("%d\n", foo (6));
+  /* adding or removing the following call should not affect foo
+ function's clone numbering */
+  printf("%d\n", bar (7));
+  return foo (8);
+}
+
+/* { dg-final { scan-ipa-dump "Function bar.constprop.0" "cp" } } */
+/* { dg-final { scan-ipa-dump "Function bar.constprop.1" "cp" } } */
+/* { dg-final { scan-ipa-dump "Function bar.constprop.3" "cp" } } */
+/* { dg-final { scan-ipa-dump "Function foo.constprop.0" "cp" } } */
+/* { dg-final { scan-ipa-dump "Function foo.constprop.1" "cp" } } */
+/* { dg-final { scan-ipa-dump "Function foo.constprop.2" "cp" } } */
+/* { dg-final { scan-ipa-dump-not "Function foo.constprop.3" "cp" } } */
+/* { dg-final { scan-ipa-dump-not "Function foo.constprop.4" "cp" } } */
-- 
2.7.4



signature.asc
Description: OpenPGP digital signature

Re: [Patch, Fortran] PR 85599: warn about short-circuiting of logical expressions for non-pure functions

[Thomas Koenig]

Am 16.07.2018 um 10:06 schrieb Janus Weil:

However, one point: I think that the warning should be under a separate
warning, which should then be enabled by -Wextra.
-Waggressive-function-elimination, could be reused for this,
or something else

I don't actually see such a flag in the manual.


Ah, sorry, I misremembered the option, it is actually
-Wfunction-elimination.

What I would suggest is to enable -Wfunction-eliminiation with
-Wextra and also use that for your new warning.

(I would also suggest to enable -faggressive-function-elimination
at least for -Ofast, but that is another matter).

Regards

Thomas

Re: [PATCH 1/4] Clean up of new format of -falign-FOO.

[Pat Haugen]

testsuite/gcc.target/powerpc/loop_align.c fails with this patch. It just needs 
a simple tweak to the scan-assembler line since we're no longer generating the 
",,31" portion on the .p2align.

-Pat

Re: [PATCH, rs6000] Fix AIX test case failures

[Segher Boessenkool]

On Fri, Jul 13, 2018 at 04:15:26PM -0700, Carl Love wrote:
> Segher, David:
> 
> I reworked the patch per the first option that David gave.  The tests
> divkc3-2.c, divkc3-3.c, mulkc3-2.c and mulkc3-3.c pass on Power 9 Linux
> as they did before.  The tests are unsupported on Power8 Linux as they
> were before.  Now, the tests are reported as unsupported on AIX rather
> then failing on AIX.
> 
> Please let me know if you both approve the updated patch below.  Thanks
> for the input and help on this.

You need only one approval ;-)

(The patch is fine.  Thanks!)


Segher



> 2018-07-13  Carl Love  
> 
>   * gcc.target/powerpc/divkc3-2.c: Add dg-require-effective-target
>   longdouble128.
>   * gcc.target/powerpc/divkc3-3.c: Ditto.
>   * gcc.target/powerpc/mulkc3-2.c: Ditto.
>   * gcc.target/powerpc/mulkc3-3.c: Ditto.
>   * gcc.target/powerpc/fold-vec-mergehl-double.c: Update counts.
>   * gcc.target/powerpc/pr85456.c: Make check Linux and AIX specific.

[PATCH] Fix inline memcpy ICE (PR tree-optimization/86526)

[Jakub Jelinek]

Hi!

builtin_memcpy_read_str is a function meant to be called just as a callback
and verifies that we don't cross a '\0' boundary in the string.  For
inline_string_cmp, we've checked that the length returned from c_getstr
is fine, so we can cross as many embedded NULs as there are within the
TREE_STRING_LENGTH.

The rest of the patch is just a temporary to avoid using as_a twice in
each loop iteration, and lots of formatting fixes, mostly to avoid trailing
whitespace.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2018-07-16  Jakub Jelinek  

PR tree-optimization/86526
* builtins.c (expand_builtin_memcmp): Formatting fixes.
(inline_expand_builtin_string_cmp): Likewise.
(inline_string_cmp): Likewise.  Use c_readstr instead of
builtin_memcpy_read_str.  Add unit_mode temporary.

* gcc.c-torture/compile/pr86526.c: New test.

--- gcc/builtins.c.jj   2018-07-16 09:42:25.743985945 +0200
+++ gcc/builtins.c  2018-07-16 11:47:46.535014889 +0200
@@ -4454,19 +4454,19 @@ expand_builtin_memcmp (tree exp, rtx tar
   no_overflow = check_access (exp, /*dst=*/NULL_TREE, /*src=*/NULL_TREE,
  len, /*maxread=*/NULL_TREE, size,
  /*objsize=*/NULL_TREE);
-  if (no_overflow) 
+  if (no_overflow)
 {
   size = compute_objsize (arg2, 0);
   no_overflow = check_access (exp, /*dst=*/NULL_TREE, /*src=*/NULL_TREE,
  len,  /*maxread=*/NULL_TREE, size,
  /*objsize=*/NULL_TREE);
-} 
+}
 
-  /* Due to the performance benefit, always inline the calls first 
+  /* Due to the performance benefit, always inline the calls first
  when result_eq is false.  */
   rtx result = NULL_RTX;
-   
-  if (!result_eq && fcode != BUILT_IN_BCMP && no_overflow) 
+
+  if (!result_eq && fcode != BUILT_IN_BCMP && no_overflow)
 {
   result = inline_expand_builtin_string_cmp (exp, target, true);
   if (result)
@@ -6748,7 +6748,7 @@ expand_builtin_goacc_parlevel_id_size (t
   return target;
 }
 
-/* Expand a string compare operation using a sequence of char comparison 
+/* Expand a string compare operation using a sequence of char comparison
to get rid of the calling overhead, with result going to TARGET if
that's convenient.
 
@@ -6757,7 +6757,7 @@ expand_builtin_goacc_parlevel_id_size (t
LENGTH is the number of chars to compare;
CONST_STR_N indicates which source string is the constant string;
IS_MEMCMP indicates whether it's a memcmp or strcmp.
-   
+  
to: (assume const_str_n is 2, i.e., arg2 is a constant string)
 
target = var_str[0] - const_str[0];
@@ -6772,41 +6772,38 @@ expand_builtin_goacc_parlevel_id_size (t
   */
 
 static rtx
-inline_string_cmp (rtx target, tree var_str, const char* const_str, 
+inline_string_cmp (rtx target, tree var_str, const char *const_str,
   unsigned HOST_WIDE_INT length,
   int const_str_n, machine_mode mode,
-  bool is_memcmp) 
+  bool is_memcmp)
 {
   HOST_WIDE_INT offset = 0;
-  rtx var_rtx_array 
+  rtx var_rtx_array
 = get_memory_rtx (var_str, build_int_cst (unsigned_type_node,length));
   rtx var_rtx = NULL_RTX;
-  rtx const_rtx = NULL_RTX; 
-  rtx result = target ? target : gen_reg_rtx (mode); 
-  rtx_code_label *ne_label = gen_label_rtx ();  
+  rtx const_rtx = NULL_RTX;
+  rtx result = target ? target : gen_reg_rtx (mode);
+  rtx_code_label *ne_label = gen_label_rtx ();
   tree unit_type_node = is_memcmp ? unsigned_char_type_node : char_type_node;
+  scalar_int_mode unit_mode
+= as_a  TYPE_MODE (unit_type_node);
 
   start_sequence ();
 
   for (unsigned HOST_WIDE_INT i = 0; i < length; i++)
 {
-  var_rtx 
+  var_rtx
= adjust_address (var_rtx_array, TYPE_MODE (unit_type_node), offset);
-  const_rtx 
-   = builtin_memcpy_read_str (CONST_CAST (char *, const_str),
-  offset,
-  as_a  
-  TYPE_MODE (unit_type_node));
+  const_rtx = c_readstr (const_str + offset, unit_mode);
   rtx op0 = (const_str_n == 1) ? const_rtx : var_rtx;
   rtx op1 = (const_str_n == 1) ? var_rtx : const_rtx;
-  
-  result = expand_simple_binop (mode, MINUS, op0, op1, 
-   result, is_memcmp ? 1 : 0, OPTAB_WIDEN);
-  if (i < length - 1) 
-emit_cmp_and_jump_insns (result, CONST0_RTX (mode), NE, NULL_RTX,
-mode, true, ne_label);
-  offset 
-   += GET_MODE_SIZE (as_a  TYPE_MODE (unit_type_node));
+
+  result = expand_simple_binop (mode, MINUS, op0, op1,
+   result, is_memcmp ? 1 : 0, OPTAB_WIDEN);
+  if (i < length - 1)
+   emit_cmp_and_jump_insns (result, CONST0_RTX (mode), NE, NULL_RTX,
+mode, true, ne_label);
+  offset += GET_M

Re: [PATCH] Fix inline memcpy ICE (PR tree-optimization/86526)

[Jeff Law]

On 07/16/2018 02:41 PM, Jakub Jelinek wrote:
> Hi!
> 
> builtin_memcpy_read_str is a function meant to be called just as a callback
> and verifies that we don't cross a '\0' boundary in the string.  For
> inline_string_cmp, we've checked that the length returned from c_getstr
> is fine, so we can cross as many embedded NULs as there are within the
> TREE_STRING_LENGTH.
> 
> The rest of the patch is just a temporary to avoid using as_a twice in
> each loop iteration, and lots of formatting fixes, mostly to avoid trailing
> whitespace.
> 
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
> 
> 2018-07-16  Jakub Jelinek  
> 
>   PR tree-optimization/86526
>   * builtins.c (expand_builtin_memcmp): Formatting fixes.
>   (inline_expand_builtin_string_cmp): Likewise.
>   (inline_string_cmp): Likewise.  Use c_readstr instead of
>   builtin_memcpy_read_str.  Add unit_mode temporary.
> 
>   * gcc.c-torture/compile/pr86526.c: New test.
OK.

This looks like it'll fix the m68k linux kernel build failure I saw over
the weekend as well.

jeff

Re: [PATCH 1/4] Clean up of new format of -falign-FOO.

[Jeff Law]

On 07/04/2018 04:23 AM, marxin wrote:
> gcc/ChangeLog:
> 
> 2018-07-11  Martin Liska  
> 
>   * align.h: New file.
>   * config/alpha/alpha.c (alpha_align_insns_1): Use align_functions 
> directly.
>   * config/i386/i386.c (ix86_avoid_jump_mispredicts): Use new return type
>   align_flags of label_to_alignment.
>   * config/m32r/m32r.h (LOOP_ALIGN): Wrap returned values into align_flags
>   class.
>   * config/m68k/m68k.c: Do not use removed align_labels_value and
>   align_loops_value.
>   * config/nds32/nds32.h (JUMP_ALIGN): Wrap result into align_flags class.
>   (LOOP_ALIGN): Likewise.
>   (LABEL_ALIGN): Likewise.
>   * config/powerpcspe/powerpcspe.c (TARGET_ASM_LOOP_ALIGN_MAX_SKIP):
>   Remove not used macro.
>   (rs6000_loop_align): Change return type to align_flags.
>   (rs6000_loop_align_max_skip): Remove.
>   * config/rs6000/rs6000-protos.h (rs6000_loop_align):
>   Change return type to align_flags.
>   * config/rs6000/rs6000.c (TARGET_ASM_LOOP_ALIGN_MAX_SKIP):
>   Remove not used macro.
>   (rs6000_loop_align):  Change return type to align_flags.
>   (rs6000_loop_align_max_skip): Remove.
>   * config/rx/rx.h (JUMP_ALIGN): Wrap integer values
>   * config/rx/rx-protos.h (rx_align_for_label): Make it
> static function.
>   * config/rx/rx.c (rx_align_for_label): Change return type
> to align_flags.
>   (rx_max_skip_for_label): Remove TARGET_ASM_*_ALIGN_MAX_SKIP
> macro definitions.
>   into align_flags class.
>   (LABEL_ALIGN): Likewise.
>   (LOOP_ALIGN): Likewise.
>   * config/s390/s390.c (s390_label_align): Use align_flags
>   class member.
>   (s390_asm_output_function_label): Likewise.
>   * config/sh/sh.c (sh_override_options_after_change):
>   Use align_flags class directly without macros.
>   (find_barrier): Likewise.
>   (barrier_align): Likewise.
>   (sh_loop_align): Likewise.
>   * config/spu/spu.c (spu_option_override):
>   Use align_flags_tuple::get_value instead of removed macros.
>   (spu_sched_init): Likewise.
>   * config/spu/spu.h (GTY): Likewise.
>   * config/visium/visium.c (visium_option_override):
>   Set "8" as default secondary alignment.
>   * config/visium/visium.h (SUBALIGN_LOG): Define to 3
>   in order to guarantee secondary alignment of 8.
>   * coretypes.h: Include align.h header file.
>   * doc/tm.texi: Remove TARGET_ASM_JUMP_ALIGN_MAX_SKIP,
>   TARGET_ASM_LOOP_ALIGN_MAX_SKIP, TARGET_ASM_LABEL_ALIGN_MAX_SKIP
> and TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP macros.
>   * doc/tm.texi.in: Likewise.
>   * final.c (struct label_alignment): Remove not used structure.
>   (LABEL_ALIGN): Change type to align_flags.
>   (LOOP_ALIGN): Likewise.
>   (JUMP_ALIGN): Likewise.
>   (default_loop_align_max_skip): Remove.
>   (default_label_align_max_skip): Likewise.
>   (default_jump_align_max_skip): Likewise.
>   (default_label_align_after_barrier_max_skip):
>   (LABEL_TO_ALIGNMENT): Change to access label_align vector.
>   (LABEL_TO_MAX_SKIP): Remove.
>   (label_to_alignment): Return align_flags type instead of integer.
>   (label_to_max_skip): Remove.
>   (align_fuzz): Use align_flags type.
>   (compute_alignments): Use align_flags type and use align_flags::max
>   to combine multiple alignments.
>   (grow_label_align): Grow vec instead of C array.
>   (update_alignments): Assign just LABEL_TO_ALIGNMENT.
>   (shorten_branches):  Use align_flags type and use align_flags::max
>   to combine multiple alignments.
>   (final_scan_insn_1): Remove usage of secondary alignment that comes
>   from label alignment, but instead use proper secondary alignment
>   which is computed in grow_label_align.
>   * flags.h (struct align_flags_tuple): Move to align.h.
>   (struct align_flags): Likewise.
>   (state_align_loops): Rename to align_loops.
>   (state_align_jumps): Rename to align_jumps.
>   (state_align_labels): Rename to align_labels.
>   (state_align_functions): Rename to align_functions.
>   (align_loops_log): Remove.
>   (align_jumps_log): Remove.
>   (align_labels_log): Remove.
>   (align_functions_log): Remove.
>   (align_loops_max_skip): Remove.
>   (align_jumps_max_skip): Remove.
>   (align_labels_max_skip): Remove.
>   (align_functions_max_skip): Remove.
>   (align_loops_value): Remove.
>   (align_jumps_value): Remove.
>   (align_labels_value): Remove.
>   (align_functions_value): Remove.
>   * output.h (label_to_alignment): Change return type to align_flags.
>   (label_to_max_skip): Remove.
>   * target.def: Remove loop_align_max_skip, label_align_max_skip,
>   jump_align_max_skip macros.
>   * targhooks.h (default_loop_align_max_skip): Remove.
>   (default_label_align_max_skip):

Re: [PATCH, ARM] PR85434: Prevent spilling of stack protector guard's address on ARM

[Jeff Law]

On 07/05/2018 08:48 AM, Thomas Preudhomme wrote:
> In case of high register pressure in PIC mode, address of the stack
> protector's guard can be spilled on ARM targets as shown in PR85434,
> thus allowing an attacker to control what the canary would be compared
> against. ARM does lack stack_protect_set and stack_protect_test insn
> patterns, defining them does not help as the address is expanded
> regularly and the patterns only deal with the copy and test of the
> guard with the canary.
> 
> This problem does not occur for x86 targets because the PIC access and
> the test can be done in the same instruction. Aarch64 is exempt too
> because PIC access insn pattern are mov of UNSPEC which prevents it from
> the second access in the epilogue being CSEd in cse_local pass with the
> first access in the prologue.
> 
> The approach followed here is to create new "combined" set and test
> standard pattern names that take the unexpanded guard and do the set or
> test. This allows the target to use an opaque pattern (eg. using UNSPEC)
> to hide the individual instructions being generated to the compiler and
> split the pattern into generic load, compare and branch instruction
> after register allocator, therefore avoiding any spilling. This is here
> implemented for the ARM targets. For targets not implementing these new
> standard pattern names, the existing stack_protect_set and
> stack_protect_test pattern names are used.
> 
> To be able to split PIC access after register allocation, the functions
> had to be augmented to force a new PIC register load and to control
> which register it loads into. This is because sharing the PIC register
> between prologue and epilogue could lead to spilling due to CSE again
> which an attacker could use to control what the canary gets compared
> against.
> 
> ChangeLog entries are as follows:
> 
> *** gcc/ChangeLog ***
> 
> 2018-07-05  Thomas Preud'homme  
> 
> PR target/85434
> * target-insns.def (stack_protect_combined_set): Define new standard
> pattern name.
> (stack_protect_combined_test): Likewise.
> * cfgexpand.c (stack_protect_prologue): Try new
> stack_protect_combined_set pattern first.
> * function.c (stack_protect_epilogue): Try new
> stack_protect_combined_test pattern first.
> * config/arm/arm.c (require_pic_register): Add pic_reg and compute_now
> parameters to control which register to use as PIC register and force
> reloading PIC register respectively.
> (legitimize_pic_address): Expose above new parameters in prototype and
> adapt recursive calls accordingly.
> (arm_legitimize_address): Adapt to new legitimize_pic_address
> prototype.
> (thumb_legitimize_address): Likewise.
> (arm_emit_call_insn): Adapt to new require_pic_register prototype.
> * config/arm/arm-protos.h (legitimize_pic_address): Adapt to prototype
> change.
> * config/arm/arm.md (movsi expander): Adapt to legitimize_pic_address
> prototype change.
> (stack_protect_combined_set): New insn_and_split pattern.
> (stack_protect_set): New insn pattern.
> (stack_protect_combined_test): New insn_and_split pattern.
> (stack_protect_test): New insn pattern.
> * config/arm/unspecs.md (UNSPEC_SP_SET): New unspec.
> (UNSPEC_SP_TEST): Likewise.
> * doc/md.texi (stack_protect_combined_set): Document new standard
> pattern name.
> (stack_protect_set): Clarify that the operand for guard's address is
> legal.
> (stack_protect_combined_test): Document new standard pattern name.
> (stack_protect_test): Clarify that the operand for guard's address is
> legal.
> 
> *** gcc/testsuite/ChangeLog ***
> 
> 2018-07-05  Thomas Preud'homme  
> 
> PR target/85434
> * gcc.target/arm/pr85434.c: New test.
> 
> Testing: Bootstrapped on ARM in both Arm and Thumb-2 mode as well as on
> Aarch64. Testsuite shows no regression on these 3 variants either both
> with default flags and with -fstack-protector-all.
> 
> Is this ok for trunk? If yes, would this be acceptable as a backport to
> GCC 6, 7 and 8 provided that no regression is found?
> 
> Best regards,
> 
> Thomas
> 
> 
> 0001-PR85434-Prevent-spilling-of-stack-protector-guard-s-.patch
> 
> 
> From d917d48c2005e46154383589f203d06f3c6167e0 Mon Sep 17 00:00:00 2001
> From: Thomas Preud'homme 
> Date: Tue, 8 May 2018 15:47:05 +0100
> Subject: [PATCH] PR85434: Prevent spilling of stack protector guard's address
>  on ARM
> 
> In case of high register pressure in PIC mode, address of the stack
> protector's guard can be spilled on ARM targets as shown in PR85434,
> thus allowing an attacker to control what the canary would be compared
> against. ARM does lack stack_protect_set and stack_protect_test insn
> patterns, defining them does not help as the address is expanded
> regularly and the patterns only deal with the copy and test of the
> guard with the canary.
> 
> This problem does not occur for x86 targets because the PIC access and
> t

[PATCH 0/6] rs6000: Test all rs6000 floating point conversions

[Segher Boessenkool]

This series adds new codegen tests for converting any of our seven
floating point modes to any of those seven.  It also fixes a bunch of
bugs so that these testcases pass.

Tested on powerpc64-linux {-m32,-m64} (a power7); on powerpc64le-linux,
both on power8 and on power9; and on AIX.

Also tested the new testcases with options
{-mlong-double-64,-mlong-double-128}
{-mabi=ibmlongdouble,-mabi=ieeelongdouble}
{-mcpu=power4,-mcpu=970,-mcpu=power6,-mcpu=power7,-mcpu=power9}
{-mabi=elfv1/-mbig,-mabi=elfv2/-mlittle}
{-m32,-m64}
(but not -mabi=ieeelongdouble before power7 because that is not
supported).

Committing to trunk.


Segher


Segher Boessenkool (6):
  rs6000: Use more correct names for some trunc/extend libcalls
  rs6000: Use correct names for some trunc/extend libcalls
  rs6000: Improve truncifsf2
  rs6000: Fix testsuite bug in check_ppc_float128_hw_available
  rs6000: New testsuite selectors
  rs6000: New testcase fp-convert.c

 gcc/config/rs6000/rs6000.c| 24 +++---
 gcc/config/rs6000/rs6000.md   | 23 ++
 gcc/testsuite/gcc.target/powerpc/convert-fp-128.c | 99 +++
 gcc/testsuite/gcc.target/powerpc/convert-fp-64.c  | 61 ++
 gcc/testsuite/lib/target-supports.exp | 41 +-
 5 files changed, 217 insertions(+), 31 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/convert-fp-128.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/convert-fp-64.c

-- 
1.8.3.1

[PATCH 4/6] rs6000: Fix testsuite bug in check_ppc_float128_hw_available

[Segher Boessenkool]

The test program for ppc_float128_hw_available would always return
false, since there is a syntax error in that test program.


2018-07-16  Segher Boessenkool  

gcc/testsuite/
* lib/target-supports.exp (check_ppc_float128_hw_available): Fix
syntax error.

---
 gcc/testsuite/lib/target-supports.exp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index 99613fd..ec4a35d 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2182,7 +2182,7 @@ proc check_ppc_float128_hw_available { } {
__float128 w = -1.0q;
 
__asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
-   return ((z != 3.0q) || (z != w);
+   return ((z != 3.0q) || (z != w));
}
} $options
}
-- 
1.8.3.1

[PATCH 2/6] rs6000: Use correct names for some trunc/extend libcalls

[Segher Boessenkool]

The libcalls for trunc and extend of a decimal float to a binary float,
and vice versa, do not have "2" in the name, although all other such
conversions do.


2018-07-16  Segher Boessenkool  

* config/rs6000/rs6000.c (init_float128_ibm): Use the correct names
for conversions between IFmode and the decimal floating point modes.
(init_float128_ieee): Use the correct names for conversions between
KFmode and the decimal floating point modes.

---
 gcc/config/rs6000/rs6000.c | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index f95aa59..62b8ea3 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -17847,12 +17847,12 @@ init_float128_ibm (machine_mode mode)
  names.  */
   if (mode == IFmode)
 {
-  set_conv_libfunc (sext_optab, mode, SDmode, "__dpd_extendsdtf2");
-  set_conv_libfunc (sext_optab, mode, DDmode, "__dpd_extendddtf2");
-  set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunctdtf2");
-  set_conv_libfunc (trunc_optab, SDmode, mode, "__dpd_trunctfsd2");
-  set_conv_libfunc (trunc_optab, DDmode, mode, "__dpd_trunctfdd2");
-  set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendtftd2");
+  set_conv_libfunc (sext_optab, mode, SDmode, "__dpd_extendsdtf");
+  set_conv_libfunc (sext_optab, mode, DDmode, "__dpd_extendddtf");
+  set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunctdtf");
+  set_conv_libfunc (trunc_optab, SDmode, mode, "__dpd_trunctfsd");
+  set_conv_libfunc (trunc_optab, DDmode, mode, "__dpd_trunctfdd");
+  set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendtftd");
 
   if (TARGET_POWERPC64)
{
@@ -17951,12 +17951,12 @@ init_float128_ieee (machine_mode mode)
   if (mode != TFmode && FLOAT128_IBM_P (TFmode))
set_conv_libfunc (trunc_optab, TFmode, mode, "__extendkftf2");
 
-  set_conv_libfunc (sext_optab, mode, SDmode, "__dpd_extendsdkf2");
-  set_conv_libfunc (sext_optab, mode, DDmode, "__dpd_extendddkf2");
-  set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunctdkf2");
-  set_conv_libfunc (trunc_optab, SDmode, mode, "__dpd_trunckfsd2");
-  set_conv_libfunc (trunc_optab, DDmode, mode, "__dpd_trunckfdd2");
-  set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendkftd2");
+  set_conv_libfunc (sext_optab, mode, SDmode, "__dpd_extendsdkf");
+  set_conv_libfunc (sext_optab, mode, DDmode, "__dpd_extendddkf");
+  set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunctdkf");
+  set_conv_libfunc (trunc_optab, SDmode, mode, "__dpd_trunckfsd");
+  set_conv_libfunc (trunc_optab, DDmode, mode, "__dpd_trunckfdd");
+  set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendkftd");
 
   set_conv_libfunc (sfix_optab, SImode, mode, "__fixkfsi");
   set_conv_libfunc (ufix_optab, SImode, mode, "__fixunskfsi");
-- 
1.8.3.1

[PATCH 3/6] rs6000: Improve truncifsf2

[Segher Boessenkool]

The current implementation leaves an unnecessary register move.  It is
easier to just expand things in the expander already.  This patch does
that.


2018-07-16  Segher Boessenkool  

* config/rs6000/rs6000.md (truncsf2): Expand truncates of
double-double modes to SFmode directly directly.
(truncsf2_fprs): Delete.

---
 gcc/config/rs6000/rs6000.md | 23 +--
 1 file changed, 5 insertions(+), 18 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 44d32d9..94a0f7d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -7702,28 +7702,15 @@ (define_expand "truncsf2"
 {
   if (FLOAT128_IEEE_P (mode))
 rs6000_expand_float128_convert (operands[0], operands[1], false);
-  else if (mode == TFmode)
-emit_insn (gen_trunctfsf2_fprs (operands[0], operands[1]));
-  else if (mode == IFmode)
-emit_insn (gen_truncifsf2_fprs (operands[0], operands[1]));
   else
-gcc_unreachable ();
+{
+  rtx tmp = gen_reg_rtx (DFmode);
+  emit_insn (gen_truncdf2 (tmp, operands[1]));
+  emit_insn (gen_truncdfsf2 (operands[0], tmp));
+}
   DONE;
 })
 
-(define_insn_and_split "truncsf2_fprs"
-  [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
-   (float_truncate:SF (match_operand:IBM128 1 "gpc_reg_operand" "d")))
-   (clobber (match_scratch:DF 2 "=d"))]
-  "TARGET_HARD_FLOAT && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (mode)"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 2)
-   (float_truncate:DF (match_dup 1)))
-   (set (match_dup 0)
-   (float_truncate:SF (match_dup 2)))]
-  "")
-
 (define_expand "floatsi2"
   [(parallel [(set (match_operand:FLOAT128 0 "gpc_reg_operand")
   (float:FLOAT128 (match_operand:SI 1 "gpc_reg_operand")))
-- 
1.8.3.1

[PATCH 5/6] rs6000: New testsuite selectors

[Segher Boessenkool]

This introduces four new selectors for use with Power testcases:
longdouble64, ppc_float128, ppc_float128_insns, powerpc_vsx.


2018-07-16  Segher Boessenkool  

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_longdouble64,
check_effective_target_ppc_float128,
check_effective_target_ppc_float128_insns,
check_effective_target_powerpc_vsx): New.

---
 gcc/testsuite/lib/target-supports.exp | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index ec4a35d..c2d814c 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2684,6 +2684,15 @@ proc check_effective_target_longdouble128 { } {
 }]
 }
 
+# Return 1 if the target supports long double of 64 bits,
+# 0 otherwise.
+
+proc check_effective_target_longdouble64 { } {
+return [check_no_compiler_messages longdouble64 object {
+   int dummy[sizeof(long double) == 8 ? 1 : -1];
+}]
+}
+
 # Return 1 if the target supports double of 64 bits,
 # 0 otherwise.
 
@@ -5141,6 +5150,36 @@ proc check_effective_target_powerpc_float128_hw_ok { } {
 }
 }
 
+# Return 1 if current options define float128, 0 otherwise.
+
+proc check_effective_target_ppc_float128 { } {
+return [check_no_compiler_messages_nocache ppc_float128 object {
+   #ifndef __FLOAT128__
+ nope no good
+   #endif
+}]
+}
+
+# Return 1 if current options generate float128 insns, 0 otherwise.
+
+proc check_effective_target_ppc_float128_insns { } {
+return [check_no_compiler_messages_nocache ppc_float128 object {
+   #ifndef __FLOAT128_HARDWARE__
+ nope no good
+   #endif
+}]
+}
+
+# Return 1 if current options generate VSX instructions, 0 otherwise.
+
+proc check_effective_target_powerpc_vsx { } {
+return [check_no_compiler_messages_nocache powerpc_vsx object {
+   #ifndef __VSX__
+ nope no vsx
+   #endif
+}]
+}
+
 # Return 1 if this is a PowerPC target supporting -mvsx
 
 proc check_effective_target_powerpc_vsx_ok { } {
-- 
1.8.3.1

[PATCH 1/6] rs6000: Use more correct names for some trunc/extend libcalls

[Segher Boessenkool]

They had source and destination swapped in the name.


2018-07-16  Segher Boessenkool  

* config/rs6000/rs6000.c (init_float128_ibm): Use more correct names
for the conversions between TDmode and IFmode.
(init_float128_ieee): Use more correct names for the conversions
between TDmode and KFmode.

---
 gcc/config/rs6000/rs6000.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 1976072..f95aa59 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -17849,10 +17849,10 @@ init_float128_ibm (machine_mode mode)
 {
   set_conv_libfunc (sext_optab, mode, SDmode, "__dpd_extendsdtf2");
   set_conv_libfunc (sext_optab, mode, DDmode, "__dpd_extendddtf2");
-  set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunctftd2");
+  set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunctdtf2");
   set_conv_libfunc (trunc_optab, SDmode, mode, "__dpd_trunctfsd2");
   set_conv_libfunc (trunc_optab, DDmode, mode, "__dpd_trunctfdd2");
-  set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendtdtf2");
+  set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendtftd2");
 
   if (TARGET_POWERPC64)
{
@@ -17953,10 +17953,10 @@ init_float128_ieee (machine_mode mode)
 
   set_conv_libfunc (sext_optab, mode, SDmode, "__dpd_extendsdkf2");
   set_conv_libfunc (sext_optab, mode, DDmode, "__dpd_extendddkf2");
-  set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunckftd2");
+  set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunctdkf2");
   set_conv_libfunc (trunc_optab, SDmode, mode, "__dpd_trunckfsd2");
   set_conv_libfunc (trunc_optab, DDmode, mode, "__dpd_trunckfdd2");
-  set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendtdkf2");
+  set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendkftd2");
 
   set_conv_libfunc (sfix_optab, SImode, mode, "__fixkfsi");
   set_conv_libfunc (ufix_optab, SImode, mode, "__fixunskfsi");
-- 
1.8.3.1

[PATCH 6/6] rs6000: New testcase fp-convert.c

[Segher Boessenkool]

This tests the generated code for all conversions between floating point
point types, binary and decimal.


2018-07-16  Segher Boessenkool  

gcc/testsuite/
* gcc.target/powerpc/convert-fp-128.c: New testcase.
* gcc.target/powerpc/convert-fp-64.c: New testcase.

---
 gcc/testsuite/gcc.target/powerpc/convert-fp-128.c | 99 +++
 gcc/testsuite/gcc.target/powerpc/convert-fp-64.c  | 61 ++
 2 files changed, 160 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/convert-fp-128.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/convert-fp-64.c

diff --git a/gcc/testsuite/gcc.target/powerpc/convert-fp-128.c 
b/gcc/testsuite/gcc.target/powerpc/convert-fp-128.c
new file mode 100644
index 000..67896d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/convert-fp-128.c
@@ -0,0 +1,99 @@
+/* { dg-options "-O2" } */
+/* { dg-require-effective-target longdouble128 } */
+/* { dg-require-effective-target dfp } */
+
+#define conv(M,N) mode_##N conv##M##N(mode_##M x) { return x; }
+
+#define mode_sf float
+#define mode_df double
+typedef float __attribute__((mode(IF))) mode_if;
+typedef float __attribute__((mode(KF))) mode_kf;
+#define mode_sd _Decimal32
+#define mode_dd _Decimal64
+#define mode_td _Decimal128
+
+#ifdef __FLOAT128_TYPE__
+#define conv1(M) \
+   conv(M,sf) conv(M,df) conv(M,if) conv(M,kf) \
+   conv(M,sd) conv(M,dd) conv(M,td)
+#define conv2 \
+   conv1(sf) conv1(df) conv1(if) conv1(kf) \
+   conv1(sd) conv1(dd) conv1(td)
+#else
+#define conv1(M) \
+   conv(M,sf) conv(M,df) conv(M,if) \
+   conv(M,sd) conv(M,dd) conv(M,td)
+#define conv2 \
+   conv1(sf) conv1(df) conv1(if) \
+   conv1(sd) conv1(dd) conv1(td)
+#endif
+
+conv2
+
+
+
+/* { dg-final { scan-assembler-times {\mbl\M} 24 { target { ! hard_dfp } } } } 
*/
+/* { dg-final { scan-assembler-times {\mbl\M} 19 { target { hard_dfp && { ! 
ppc_float128 } } } } } */
+/* { dg-final { scan-assembler-times {\mbl\M} 31 { target { hard_dfp && { 
ppc_float128 && { ! ppc_float128_insns } } } } } } */
+/* { dg-final { scan-assembler-times {\mbl\M} 27 { target { hard_dfp && { 
ppc_float128 && { ppc_float128_insns } } } } } } */
+
+
+/* { dg-final { scan-assembler-times {\mbl __extendsfkf2\M} 1 { target { 
ppc_float128 && { ! ppc_float128_insns } } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendsfsd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendsfdd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendsftd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __extenddfkf2\M} 1 { target { 
ppc_float128 && { ! ppc_float128_insns } } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_truncdfsd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extenddfdd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extenddftd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __trunctfkf2\M} 1 { target { 
ppc_float128 } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_trunctfsd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_trunctfdd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendtftd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __trunckfsf2\M} 1 { target { 
ppc_float128 && { ! ppc_float128_insns } } } } } */
+/* { dg-final { scan-assembler-times {\mbl __trunckfdf2\M} 1 { target { 
ppc_float128 && { ! ppc_float128_insns } } } } } */
+/* { dg-final { scan-assembler-times {\mbl __extendkftf2\M} 1 { target { 
ppc_float128 } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_trunckfsd\M} 1 { target { 
ppc_float128 } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_trunckfdd\M} 1 { target { 
ppc_float128 } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendkftd\M} 1 { target { 
ppc_float128 } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_truncsdsf\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendsddf\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendsdtf\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendsdkf\M} 1 { target { 
ppc_float128 } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendsddd2\M} 1 { target { ! 
dfp } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendsdtd2\M} 1 { target { ! 
dfp } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_truncddsf\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_truncdddf\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendddtf\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendddkf\M} 1 { target { 
ppc_float128 } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_truncddsd2\M} 1 { target { ! 
dfp } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_extendddtd2\M} 1 { target { ! 
dfp } } } } */
+/* { dg-final { scan-assembler-times {\mbl __dpd_trunctdsf\M} 1 } } */
+/* { dg-final { scan-assembler-tim

Re: [PATCH] Add baseline symbols for riscv64-linux-gnu

[Jim Wilson]

On Mon, Jul 16, 2018 at 3:24 AM, Andreas Schwab  wrote:
> * config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: New file.
>

I'm not familiar with the details of these baseline symbol files.

When I try running "make new-abi-baseline" on my Fedora riscv64-linux
system using top of tree, I get 35 extra lines in the
baseline_symbols.txt.new file.  It looks like 33 of them are because I
have
OBJECT:0:GLIBCXX_3.4.26
and yours only goes up to 3.4.25.  The other two are TLS entries.
> TLS:8:_ZSt11__once_call@@GLIBCXX_3.4.11
> TLS:8:_ZSt15__once_callable@@GLIBCXX_3.4.11
Not sure why there are no TLS entries in your file, and two in mine.
The testsuite does pass with a message about 33 added symbols and 2
undesignated symbols which are the TLS symbols.

Anyways, it passed, so your patch is OK.

Jim

Re: [PATCH] Add baseline symbols for riscv64-linux-gnu

[Jonathan Wakely]

On 16/07/18 16:37 -0700, Jim Wilson wrote:

On Mon, Jul 16, 2018 at 3:24 AM, Andreas Schwab  wrote:

* config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: New file.



I'm not familiar with the details of these baseline symbol files.

When I try running "make new-abi-baseline" on my Fedora riscv64-linux
system using top of tree, I get 35 extra lines in the
baseline_symbols.txt.new file.  It looks like 33 of them are because I
have
OBJECT:0:GLIBCXX_3.4.26
and yours only goes up to 3.4.25.  The other two are TLS entries.

TLS:8:_ZSt11__once_call@@GLIBCXX_3.4.11
TLS:8:_ZSt15__once_callable@@GLIBCXX_3.4.11

Not sure why there are no TLS entries in your file, and two in mine.


I don't know about RISC-V but for other GNU/Linux targets those
symbols are not always present, so should not be listed in the
baseline (otherwise when they're absent you get errors about missing
symbols).


The testsuite does pass with a message about 33 added symbols and 2
undesignated symbols which are the TLS symbols.


The added symbols all have the new GLIBCXX_3.4.26 symbol version, so
are allowed as additions on top of the GLIBCXX_3.4.25 baseline defined
by the baseline_symbols.txt file.

The 3.4.26 version is still "open" and having new symbols added to it,
so it makes sense for the baseline to only go up to 3.4.25 for now.

Re: [RFC][debug] Add -fadd-debug-nops

[Alexandre Oliva]

On Jul 16, 2018, Tom de Vries  wrote:

> On 07/16/2018 03:34 PM, Jakub Jelinek wrote:
>> So is this essentially a workaround for GDB not supporting the statement
>> frontiers?

> AFAIU now, the concept of location views addresses this problem, so yes.

Nice!  A preview for what can be obtained with LVu support in the
debugger!

> Right, but in the mean time I don't mind having an option that lets me
> filter out noise in guality test results.

FWIW, I'm a bit concerned about working around legitimate problems, as
in modifying testcases so that they pass.  This hides actual problems,
that we'd like to fix eventually by adjusting the compiler, not the
testcases.

That said, thank you for the attention you've given to the guality
testsuite recently.  It's appreciated.

-- 
Alexandre Oliva, freedom fighter   https://FSFLA.org/blogs/lxo
Be the change, be Free! FSF Latin America board member
GNU Toolchain EngineerFree Software Evangelist

[PATCH] haiku: Initial build support

[Alexander von Gluck IV]

* We have been dragging these around since gcc 4.x.
* Some tweaks will likely be needed, but this gets our foot
  in the door.

Authors:
  Fredrik Holmqvist
  Jerome Duval
  Augustin Cavalier
  François Revol
  Simon South
  Jessica Hamilton
  Ithamar R. Adema
  Oliver Tappe
  Jonathan Schleifer
  .. and maybe more!
---
 config.rpath  |   2 +
 config/acx.m4 |  36 ++-
 configure |  53 ++--
 configure.ac  |  60 ++--
 gcc/config.gcc|  49 +++-
 gcc/config.host   |  10 +-
 gcc/config/arm/haiku.h|  80 ++
 gcc/config/arm/t-haiku|  21 ++
 gcc/config/haiku-spec.h   |  38 +++
 gcc/config/haiku-stdint.h |  55 
 gcc/config/haiku.h| 217 ++
 gcc/config/i386/haiku.h   |  77 +
 gcc/config/i386/haiku64.h | 135 +
 gcc/config/i386/t-haiku64 |  16 ++
 gcc/config/m68k/haiku.h   | 268 ++
 gcc/config/mips/haiku.h   |  44 +++
 gcc/config/rs6000/haiku.h |  56 
 gcc/config/t-haiku|   4 +
 gcc/configure |  22 +-
 libgcc/config.host|  22 ++
 libgcc/config/t-haiku |   3 +
 libstdc++-v3/config/os/haiku/ctype_base.h |  61 
 .../config/os/haiku/ctype_configure_char.cc   |  99 +++
 libstdc++-v3/config/os/haiku/ctype_inline.h   | 168 +++
 .../config/os/haiku/error_constants.h | 178 
 libstdc++-v3/config/os/haiku/os_defines.h |  48 
 libstdc++-v3/configure|  85 +-
 libstdc++-v3/configure.host   |   2 +-
 libstdc++-v3/crossconfig.m4   |  40 +++
 libtool.m4|   8 +-
 30 files changed, 1883 insertions(+), 74 deletions(-)
 create mode 100644 gcc/config/arm/haiku.h
 create mode 100644 gcc/config/arm/t-haiku
 create mode 100644 gcc/config/haiku-spec.h
 create mode 100644 gcc/config/haiku-stdint.h
 create mode 100644 gcc/config/haiku.h
 create mode 100644 gcc/config/i386/haiku.h
 create mode 100644 gcc/config/i386/haiku64.h
 create mode 100644 gcc/config/i386/t-haiku64
 create mode 100644 gcc/config/m68k/haiku.h
 create mode 100644 gcc/config/mips/haiku.h
 create mode 100644 gcc/config/rs6000/haiku.h
 create mode 100644 gcc/config/t-haiku
 create mode 100644 libgcc/config/t-haiku
 create mode 100644 libstdc++-v3/config/os/haiku/ctype_base.h
 create mode 100644 libstdc++-v3/config/os/haiku/ctype_configure_char.cc
 create mode 100644 libstdc++-v3/config/os/haiku/ctype_inline.h
 create mode 100644 libstdc++-v3/config/os/haiku/error_constants.h
 create mode 100644 libstdc++-v3/config/os/haiku/os_defines.h

diff --git a/config.rpath b/config.rpath
index 4dea75957c2..5bcc5be17e4 100755
--- a/config.rpath
+++ b/config.rpath
@@ -161,6 +161,8 @@ if test "$with_gnu_ld" = yes; then
   ;;
 netbsd*)
   ;;
+haiku*)
+  ;;
 solaris* | sysv5*)
   if $LD -v 2>&1 | egrep 'BFD 2\.8' > /dev/null; then
 ld_shlibs=no
diff --git a/config/acx.m4 b/config/acx.m4
index 87c1b5e2932..7a511a9a1c0 100644
--- a/config/acx.m4
+++ b/config/acx.m4
@@ -428,24 +428,30 @@ dnl for the parameter format "cmp file1 file2 skip1 
skip2" which is
 dnl accepted by cmp on some systems.
 AC_DEFUN([ACX_PROG_CMP_IGNORE_INITIAL],
 [AC_CACHE_CHECK([how to compare bootstrapped objects], gcc_cv_prog_cmp_skip,
-[ echo abfoo >t1
-  echo cdfoo >t2
-  gcc_cv_prog_cmp_skip='tail -c +17 $$f1 > tmp-foo1; tail -c +17 $$f2 > 
tmp-foo2; cmp tmp-foo1 tmp-foo2'
-  if cmp t1 t2 2 2 > /dev/null 2>&1; then
-if cmp t1 t2 1 1 > /dev/null 2>&1; then
-  :
-else
-  gcc_cv_prog_cmp_skip='cmp $$f1 $$f2 16 16'
+[# comparing object files via cmp doesn't work on haiku (files will seemingly
+  # always differ), so we disassemble both files and compare the results:
+  if uname -o | grep -iq haiku; then
+gcc_cv_prog_cmp_skip='objdump -Dz $$f1 | tail +6 >tmp-foo1; objdump -Dz 
$$f2 | tail +6 >tmp-foo2; cmp tmp-foo1 tmp-foo2'
+  else
+echo abfoo >t1
+echo cdfoo >t2
+gcc_cv_prog_cmp_skip='tail -c +17 $$f1 > tmp-foo1; tail -c +17 $$f2 > 
tmp-foo2; cmp tmp-foo1 tmp-foo2'
+if cmp t1 t2 2 2 > /dev/null 2>&1; then
+  if cmp t1 t2 1 1 > /dev/null 2>&1; then
+:
+  else
+gcc_cv_prog_cmp_skip='cmp $$f1 $$f2 16 16'
+  fi
 fi
-  fi
-  if cmp --ignore-initial=2 t1 t2 > /dev/null 2>&1; then
-if cmp --ignore-initial=1 t1 t2 > /dev/null 2>&1; then
-  :
-else
-  gcc_cv_prog_cmp_skip='cmp --ignore-initial=16 $$f1 $$f2'
+if cmp --ignore-initial=2 t1 t2 > /dev/null 2>&1; then
+  if cmp --ignore-initial=

Re: [GCC][PATCH][Aarch64] Exploiting BFXIL when OR-ing two AND-operations with appropriate bitmasks

[Richard Henderson]

On 07/16/2018 10:10 AM, Sam Tebbs wrote:
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -1439,6 +1439,14 @@ aarch64_hard_regno_caller_save_mode (unsigned regno, 
> unsigned,
>  return SImode;
>  }
>  
> +/* Implement IS_LEFT_CONSECUTIVE.  Check if an integer's bits are consecutive
> +   ones from the MSB.  */
> +bool
> +aarch64_is_left_consecutive (HOST_WIDE_INT i)
> +{
> +  return (i | (i - 1)) == HOST_WIDE_INT_M1;
> +}
> +
...
> +(define_insn "*aarch64_bfxil"
> +  [(set (match_operand:DI 0 "register_operand" "=r")
> +(ior:DI (and:DI (match_operand:DI 1 "register_operand" "r")
> + (match_operand 3 "const_int_operand"))
> + (and:DI (match_operand:DI 2 "register_operand" "0")
> + (match_operand 4 "const_int_operand"]
> +  "INTVAL (operands[3]) == ~INTVAL (operands[4])
> +&& aarch64_is_left_consecutive (INTVAL (operands[4]))"

Better is to use a define_predicate to merge both that second test and the
const_int_operand.

(I'm not sure about the "left_consecutive" language either.
Isn't it more descriptive to say that op3 is a power of 2 minus 1?)

(define_predicate "pow2m1_operand"
  (and (match_code "const_int")
   (match_test "exact_pow2 (INTVAL(op) + 1) > 0")))

and use

  (match_operand:DI 3 "pow2m1_operand")

and then just the

  INTVAL (operands[3]) == ~INTVAL (operands[4])

test.

Also, don't omit the modes for the constants.
Also, there's no reason this applies only to DI mode;
use the GPI iterator and % in the output template.

> +HOST_WIDE_INT op3 = INTVAL (operands[3]);
> +operands[3] = GEN_INT (ceil_log2 (op3));
> +output_asm_insn ("bfxil\\t%0, %1, 0, %3", operands);
> +return "";

You can just return the string that you passed to output_asm_insn.

> +  }
> +  [(set_attr "type" "bfx")]

The other aliases of the BFM insn use type "bfm";
"bfx" appears to be aliases of UBFM and SBFM.
Not that it appears to matter to the scheduling
descriptions, but it is inconsistent.


r~

PING #3 [PATCH] specify large command line option arguments (PR 82063)

[Martin Sebor]

Ping #3: https://gcc.gnu.org/ml/gcc-patches/2018-06/msg01509.html

On 07/09/2018 09:13 PM, Martin Sebor wrote:

Ping #2: https://gcc.gnu.org/ml/gcc-patches/2018-06/msg01509.html

On 07/03/2018 08:12 PM, Martin Sebor wrote:

Ping: https://gcc.gnu.org/ml/gcc-patches/2018-06/msg01509.html

On 06/24/2018 03:05 PM, Martin Sebor wrote:

Storing integer command line option arguments in type int
limits options such as -Wlarger-than= or -Walloca-larger-than
to at most INT_MAX (see bug 71905).  Larger values wrap around
zero.  The value zero is considered to disable the option,
making it impossible to specify a zero limit.

To get around these limitations, the -Walloc-size-larger-than=
option accepts a string argument that it then parses itself
and interprets as HOST_WIDE_INT.  The option also accepts byte
size suffixes like KB, MB, GiB, etc. to make it convenient to
specify very large limits.

The int limitation is obviously less than ideal in a 64-bit
world.  The treatment of zero as a toggle is just a minor wart.
The special treatment to make it work for just a single option
makes option handling inconsistent.  It should be possible for
any option that takes an integer argument to use the same logic.

The attached patch enhances GCC option processing to do that.
It changes the storage type of option arguments from int to
HOST_WIDE_INT and extends the existing (although undocumented)
option property Host_Wide_Int to specify wide option arguments.
It also introduces the ByteSize property for options for which
specifying the byte-size suffix makes sense.

To make it possible to consider zero as a meaningful argument
value rather than a flag indicating that an option is disabled
the patch also adds a CLVC_SIZE enumerator to the cl_var_type
enumeration, and modifies how options of the kind are handled.

Warning options that take large byte-size arguments can be
disabled by specifying a value equal to or greater than
HOST_WIDE_INT_M1U.  For convenience, aliases in the form of
-Wno-xxx-larger-than have been provided for all the affected
options.

In the patch all the existing -larger-than options are set
to PTRDIFF_MAX.  This makes them effectively enabled, but
because the setting is exceedingly permissive, and because
some of the existing warnings are already set to the same
value and some other checks detect and reject such exceedingly
large values with errors, this change shouldn't noticeably
affect what constructs are diagnosed.

Although all the options are set to PTRDIFF_MAX, I think it
would make sense to consider setting some of them lower, say
to PTRDIFF_MAX / 2.  I'd like to propose that in a followup
patch.

To minimize observable changes the -Walloca-larger-than and
-Wvla-larger-than warnings required more extensive work to
make of the new mechanism because of the "unbounded" argument
handling (the warnings trigger for arguments that are not
visibly constrained), and because of the zero handling
(the warnings also trigger


Martin

Re: [PATCH] [v3][aarch64] Avoid tag collisions for loads falkor

[Siddhesh Poyarekar]

On 07/16/2018 09:59 PM, Kyrill Tkachov wrote:
I think this looks ok now. You'll still need a maintainer to approve it 
though.


Thank you for the review Kyrill, but also apologies for wasting your 
time on it.  I just found that the patch breaks a test so I'm currently 
reviewing it to see what's going on and post an update.  I thought I 
should mention it early here to avoid wasting James' time as well on 
this iteration.


Siddhesh

Re: [Patch, Fortran] PR 85599: warn about short-circuiting of logical expressions for non-pure functions

[Janus Weil]

2018-07-16 21:50 GMT+02:00 Thomas Koenig :
> Am 16.07.2018 um 10:06 schrieb Janus Weil:
>>>
>>> However, one point: I think that the warning should be under a separate
>>> warning, which should then be enabled by -Wextra.
>>> -Waggressive-function-elimination, could be reused for this,
>>> or something else
>>
>> I don't actually see such a flag in the manual.
>
> Ah, sorry, I misremembered the option, it is actually
> -Wfunction-elimination.
>
> What I would suggest is to enable -Wfunction-eliminiation with
> -Wextra and also use that for your new warning.

Thanks for the comments. Makes sense. Updated patch attached.

I'll wait two more days to allow for further comments and will commit
this to trunk on Thursday if I hear no further complaints.

Cheers,
Janus
Index: gcc/fortran/dump-parse-tree.c
===
--- gcc/fortran/dump-parse-tree.c	(revision 262563)
+++ gcc/fortran/dump-parse-tree.c	(working copy)
@@ -716,6 +716,8 @@ show_attr (symbol_attribute *attr, const char * mo
 fputs (" ELEMENTAL", dumpfile);
   if (attr->pure)
 fputs (" PURE", dumpfile);
+  if (attr->implicit_pure)
+fputs (" IMPLICIT_PURE", dumpfile);
   if (attr->recursive)
 fputs (" RECURSIVE", dumpfile);
 
Index: gcc/fortran/gfortran.texi
===
--- gcc/fortran/gfortran.texi	(revision 262563)
+++ gcc/fortran/gfortran.texi	(working copy)
@@ -1177,6 +1177,7 @@ might in some way or another become visible to the
 @menu
 * KIND Type Parameters::
 * Internal representation of LOGICAL variables::
+* Evaluation of logical expressions::
 * Thread-safety of the runtime library::
 * Data consistency and durability::
 * Files opened without an explicit ACTION= specifier::
@@ -1251,6 +1252,19 @@ values: @code{1} for @code{.TRUE.} and @code{0} fo
 See also @ref{Argument passing conventions} and @ref{Interoperability with C}.
 
 
+@node Evaluation of logical expressions
+@section Evaluation of logical expressions
+
+The Fortran standard does not require the compiler to evaluate all parts of an
+expression, if they do not contribute to the final result. For logical
+expressions with @code{.AND.} or @code{.OR.} operators, in particular, GNU
+Fortran will optimize out function calls (even to impure functions) if the
+result of the expression can be established without them. However, since not
+all compilers do that, and such an optimization can potentially modify the
+program flow and subsequent results, GNU Fortran throws warnings for such
+situations with the @option{-Wfunction-elimination} flag.
+
+
 @node Thread-safety of the runtime library
 @section Thread-safety of the runtime library
 @cindex thread-safety, threads
Index: gcc/fortran/invoke.texi
===
--- gcc/fortran/invoke.texi	(revision 262563)
+++ gcc/fortran/invoke.texi	(working copy)
@@ -1058,6 +1058,7 @@ off via @option{-Wno-align-commons}. See also @opt
 @cindex warnings, function elimination
 Warn if any calls to functions are eliminated by the optimizations
 enabled by the @option{-ffrontend-optimize} option.
+This option is implied by @option{-Wextra}.
 
 @item -Wrealloc-lhs
 @opindex @code{Wrealloc-lhs}
Index: gcc/fortran/lang.opt
===
--- gcc/fortran/lang.opt	(revision 262563)
+++ gcc/fortran/lang.opt	(working copy)
@@ -250,7 +250,7 @@ Fortran Var(flag_warn_frontend_loop_interchange)
 Warn if loops have been interchanged.
 
 Wfunction-elimination
-Fortran Warning Var(warn_function_elimination)
+Fortran Warning Var(warn_function_elimination) LangEnabledBy(Fortran,Wextra)
 Warn about function call elimination.
 
 Wimplicit-interface
Index: gcc/fortran/resolve.c
===
--- gcc/fortran/resolve.c	(revision 262563)
+++ gcc/fortran/resolve.c	(working copy)
@@ -2982,6 +2982,21 @@ pure_function (gfc_expr *e, const char **name)
 }
 
 
+/* Check if the expression is a reference to an implicitly pure function.  */
+
+static int
+implicit_pure_function (gfc_expr *e)
+{
+  gfc_component *comp = gfc_get_proc_ptr_comp (e);
+  if (comp)
+return gfc_implicit_pure (comp->ts.interface);
+  else if (e->value.function.esym)
+return gfc_implicit_pure (e->value.function.esym);
+  else
+return 0;
+}
+
+
 static bool
 impure_stmt_fcn (gfc_expr *e, gfc_symbol *sym,
 		 int *f ATTRIBUTE_UNUSED)
@@ -3034,7 +3049,8 @@ static bool check_pure_function (gfc_expr *e)
 		 "within a PURE procedure", name, &e->where);
 	  return false;
 	}
-  gfc_unset_implicit_pure (NULL);
+  if (!implicit_pure_function (e))
+	gfc_unset_implicit_pure (NULL);
 }
   return true;
 }
@@ -3822,6 +3838,40 @@ lookup_uop_fuzzy (const char *op, gfc_symtree *uop
 }
 
 
+/* Callback finding an impure function as an operand to an .and. or
+   .or.  expression.  Remember the last function warned about to
+ 

Re: [PATCH] Make function clone name numbering independent.

[Bernhard Reutner-Fischer]

On 16 July 2018 21:38:36 CEST, Michael Ploujnikov 
 wrote:
>Hi,
>

>+clone_fn_ids = hash_map::create_ggc
>(1000);

Isn't 1000 a bit excessive? What about 64 or thereabouts? 

thanks,