Re: [committed] Add gnu::unique_ptr

2017-10-22 Thread Gerald Pfeifer 
On Thu, 19 Oct 2017, David Malcolm wrote:
>> In file included from 
>> /scratch/tmp/gerald/gcc-HEAD/gcc/unique-ptr-tests.cc:23:
>> In file included from 
>> /scratch/tmp/gerald/gcc-HEAD/gcc/../include/unique-ptr.h:77:
>> In file included from /usr/include/c++/v1/memory:629:
>> /usr/include/c++/v1/typeinfo:199:2: error: no member named
>> 'fancy_abort' in namespace 'std::__1'; did you mean simply 'fancy_abort'?
>> _VSTD::abort();
>> ^~~
>> /usr/include/c++/v1/__config:390:15: note: expanded from macro '_VSTD'
>> #define _VSTD std::_LIBCPP_NAMESPACE
> There seem to have been similar problems on OS X:
>   https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82610

Yes, I believe it's the same actually (unearthed by clang as system
compiler).

> The proposed fix there is to include  in system.h, which
> presumably would fix this also.

That appears to work around the bootstrap failure on my tester as
well.

How can we go about fixing this in the tree?

Gerald

Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation

2017-10-22 Thread Andreas Schwab 
FAIL: c-c++-common/attr-nocf-check-1a.c  -Wc++-compat   (test for warnings, lin\
e 17)
FAIL: c-c++-common/attr-nocf-check-1a.c  -Wc++-compat  (test for excess errors)
Excess errors:
xgcc: error: unrecognized command line option '-mcet'
FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat   (test for warnings, 
line 15)
FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat   (test for warnings, 
line 25)
FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat  (test for excess errors)
Excess errors:
xgcc: error: unrecognized command line option '-mcet'

Andreas.

-- 
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation

2017-10-22 Thread H.J. Lu 
On Fri, Oct 13, 2017 at 3:56 AM, Tsimbalist, Igor V
 wrote:
>> -Original Message-
>> From: Uros Bizjak [mailto:ubiz...@gmail.com]
>> Sent: Friday, October 13, 2017 10:02 AM
>> To: Tsimbalist, Igor V 
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
>>
>> On Thu, Oct 12, 2017 at 8:54 PM, Tsimbalist, Igor V
>>  wrote:
>> > Attached is an updated patch according to your comments. New tests are
>> > added to test ICF optimization in presence of nocf_check attribute.
>> --- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
>> @@ -1,4 +1,4 @@
>>  /* { dg-do compile } */
>>  /* { dg-options "-fcf-protection=branch" } */
>> -/* { dg-error "'-fcf-protection=branch' is not supported for this target" 
>> "" {
>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>> +/* { dg-error "'-fcf-protection=branch' requires CET support on this
>> target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" { 
>> target {
>> "i?86-*-* x86_64-*-*" } } 0 } */
>>
>> Checking for "-fcf-protection=branch' requires CET support on this target"
>> should be enough. No need to check the whole message here and in other
>> tests.
>
> Fixed as you suggested. Also shortened the checking string for ignoring the
> attribute in attr-nocf-check-1.c and attr-nocf-check-3.c.
>
>>  /* { dg-error "'-fcf-protection=branch' is not supported for this target" 
>> "" {
>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>> common/fcf-protection-3.c
>> b/gcc/testsuite/c-c++-common/fcf-protection-3.c
>>
>>
>> --- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
>> +++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
>> @@ -1,4 +1,4 @@
>>  /* { dg-do compile } */
>>  /* { dg-options "-fcf-protection=none" } */
>> -/* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>> target { "i?86-*-* x86_64-*-*" } } 0 } */
>> +/* { dg-bogus "'-fcf-protection=none' res CET support on this target.
>> Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target { 
>> "i?86-
>> *-* x86_64-*-*" } } 0 } */
>>  /* { dg-bogus "'-fcf-protection=none' is not supported for this target" "" {
>> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git a/gcc/testsuite/c-c++-
>> common/fcf-protection-5.c
>> b/gcc/testsuite/c-c++-common/fcf-protection-5.c
>>
>> The above test checks for bogus messages? -fcf-protection=none option
>> should not generate any messages. So, the test should check that -fcf-
>> protection=none doesn't generate any error. (And, there is a typo in the
>> message, /s/res/requires.)
>
> The gcc documentation says about dg-bogus
>
> This DejaGnu directive appears on a source line that should not get a message
> matching regexp...
>
> I decided to use dg-bogus to check the absence of the error. Now I removed 
> both
> lines as any additional messages should be caught as an extra messages. 
> Actually
> I will update the fcf-protection-4.c test in the generic patch.
>
> Updated patch is attached.
>

ChangeLog has

* gcc.target/i386/cet-intrin-1.c: Likewise.
* gcc.target/i386/cet-intrin-10.c: Likewise.
* gcc.target/i386/cet-intrin-2.c: Likewise.
* gcc.target/i386/cet-intrin-3.c: Likewise.
* gcc.target/i386/cet-intrin-4.c: Likewise.
* gcc.target/i386/cet-intrin-5.c: Likewise.
* gcc.target/i386/cet-intrin-6.c: Likewise.
* gcc.target/i386/cet-intrin-7.c: Likewise.
* gcc.target/i386/cet-intrin-8.c: Likewise.
* gcc.target/i386/cet-intrin-9.c: Likewise.

But there are no gcc.target/i386/cet-intrin-1.c nor
gcc.target/i386/cet-intrin-2.c.


-- 
H.J.

[wwwdocs] Remove leftover FAQ entry related to GCJ

2017-10-22 Thread Gerald Pfeifer 
This came up during a conversation at the Tools Cauldron in Praha,
with David (Malcolm) I believe, I apparently did not commit the
local change then.

Applied now.

Gerald

Index: faq.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/faq.html,v
retrieving revision 1.225
diff -u -r1.225 faq.html
--- faq.html29 Mar 2017 16:26:00 -  1.225
+++ faq.html22 Oct 2017 11:39:48 -
@@ -35,7 +35,6 @@
 libstdc++/libio tests fail badly with 
--enable-shared
 GCC can not find GNU as/GNU ld
 cpp: Usage:... Error
-Why does libiconv get linked into 
jc1 on Solaris?
   
 
   Testsuite problems
@@ -257,28 +256,6 @@
 
 
 
-Why does libiconv get linked into 
jc1 on Solaris?
-
-The Java front end requires iconv.  If the compiler
-used to bootstrap GCC finds libiconv (because the GNU
-version of libiconv has been installed in the same prefix
-as the bootstrap compiler), but the newly built GCC does not find the
-library (because it will be installed with a different prefix), then a
-link-time error will occur when building jc1.  This
-problem does not show up so often on platforms that have
-libiconv in a default location (like
-/usr/lib) because then both compilers can find a library
-named libiconv, even though it is a different
-library.
-
-Using --disable-nls at configure-time does not
-prevent this problem because jc1 uses
-iconv even in that case.  Solutions include temporarily
-removing the GNU libiconv, copying it to a default
-location such as /usr/lib/, and using
---enable-languages at configure-time to disable Java.
-
-
 
 Testsuite problems

[wwwdocs] PATCH for Re: New mirror site

2017-10-22 Thread Gerald Pfeifer 
On Sat, 2 Sep 2017, Daniel Volchixin wrote:
> URL: http://mirror.linux-ia64.org/gnu/gcc/
> Country/City: Russia / Novosibirsk
> Contact email / name: dan...@volchixin.co.uk (Daniel Volchixin)

Thank you for hosting this mirror, Daniel and letting us know.

I added this to our mirrors page with the page below.  (And sorry
for the delay.)

Geral

Index: mirrors.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/mirrors.html,v
retrieving revision 1.245
diff -u -r1.245 mirrors.html
--- mirrors.html1 Aug 2017 12:00:24 -   1.245
+++ mirrors.html22 Oct 2017 11:44:09 -
@@ -41,6 +41,7 @@
   rsync://nl.mirror.babylon.network/gcc/,
   thanks to Tim Semeijn (noc@babylon.network) at Babylon Network.
 The Netherlands, Nijmegen: ftp://ftp.nluug.nl/mirror/languages/gcc";>ftp.nluug.nl, thanks to Jan 
Cristiaan van Winkel (jc at ATComputing.nl)
+Russia, Novosibirsk: http://mirror.linux-ia64.org/gnu/gcc/";>http://mirror.linux-ia64.org/gnu/gcc/,
 thanks to Daniel Volchixin 
 Slovakia, Bratislava: http://gcc.fyxm.net/";>gcc.fyxm.net, 
thanks to Jan Teluch (admin at 2600.sk)
 UK: ftp://ftp.mirrorservice.org/sites/sourceware.org/pub/gcc/";>ftp://ftp.mirrorservice.org/sites/sourceware.org/pub/gcc/,
 thanks to mirror at mirrorservice.org
 US, San Jose: http://www.netgull.com/gcc/";>http://www.netgull.com, thanks to admin 
at netgull.com

RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation

2017-10-22 Thread Tsimbalist, Igor V 
Those 2 tests were removed during reviewing as they tested __builtin versions. 
ChangeLog was not updated.

Igor


> -Original Message-
> From: H.J. Lu [mailto:hjl.to...@gmail.com]
> Sent: Sunday, October 22, 2017 1:59 PM
> To: Tsimbalist, Igor V 
> Cc: Uros Bizjak ; gcc-patches@gcc.gnu.org
> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> 
> On Fri, Oct 13, 2017 at 3:56 AM, Tsimbalist, Igor V
>  wrote:
> >> -Original Message-
> >> From: Uros Bizjak [mailto:ubiz...@gmail.com]
> >> Sent: Friday, October 13, 2017 10:02 AM
> >> To: Tsimbalist, Igor V 
> >> Cc: gcc-patches@gcc.gnu.org
> >> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> >>
> >> On Thu, Oct 12, 2017 at 8:54 PM, Tsimbalist, Igor V
> >>  wrote:
> >> > Attached is an updated patch according to your comments. New tests
> are
> >> > added to test ICF optimization in presence of nocf_check attribute.
> >> --- a/gcc/testsuite/c-c++-common/fcf-protection-2.c
> >> +++ b/gcc/testsuite/c-c++-common/fcf-protection-2.c
> >> @@ -1,4 +1,4 @@
> >>  /* { dg-do compile } */
> >>  /* { dg-options "-fcf-protection=branch" } */
> >> -/* { dg-error "'-fcf-protection=branch' is not supported for this target" 
> >> ""
> {
> >> target { "i?86-*-* x86_64-*-*" } } 0 } */
> >> +/* { dg-error "'-fcf-protection=branch' requires CET support on this
> >> target. Use -mcet or one of -mibt, -mshstk options to enable CET" "" {
> target {
> >> "i?86-*-* x86_64-*-*" } } 0 } */
> >>
> >> Checking for "-fcf-protection=branch' requires CET support on this target"
> >> should be enough. No need to check the whole message here and in
> other
> >> tests.
> >
> > Fixed as you suggested. Also shortened the checking string for ignoring the
> > attribute in attr-nocf-check-1.c and attr-nocf-check-3.c.
> >
> >>  /* { dg-error "'-fcf-protection=branch' is not supported for this target" 
> >> ""
> {
> >> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git 
> >> a/gcc/testsuite/c-c++-
> >> common/fcf-protection-3.c
> >> b/gcc/testsuite/c-c++-common/fcf-protection-3.c
> >>
> >>
> >> --- a/gcc/testsuite/c-c++-common/fcf-protection-4.c
> >> +++ b/gcc/testsuite/c-c++-common/fcf-protection-4.c
> >> @@ -1,4 +1,4 @@
> >>  /* { dg-do compile } */
> >>  /* { dg-options "-fcf-protection=none" } */
> >> -/* { dg-bogus "'-fcf-protection=none' is not supported for this target" 
> >> "" {
> >> target { "i?86-*-* x86_64-*-*" } } 0 } */
> >> +/* { dg-bogus "'-fcf-protection=none' res CET support on this target.
> >> Use -mcet or one of -mibt, -mshstk options to enable CET" "" { target {
> "i?86-
> >> *-* x86_64-*-*" } } 0 } */
> >>  /* { dg-bogus "'-fcf-protection=none' is not supported for this target" 
> >> "" {
> >> target { ! "i?86-*-* x86_64-*-*" } } 0 } */ diff --git 
> >> a/gcc/testsuite/c-c++-
> >> common/fcf-protection-5.c
> >> b/gcc/testsuite/c-c++-common/fcf-protection-5.c
> >>
> >> The above test checks for bogus messages? -fcf-protection=none option
> >> should not generate any messages. So, the test should check that -fcf-
> >> protection=none doesn't generate any error. (And, there is a typo in the
> >> message, /s/res/requires.)
> >
> > The gcc documentation says about dg-bogus
> >
> > This DejaGnu directive appears on a source line that should not get a
> message
> > matching regexp...
> >
> > I decided to use dg-bogus to check the absence of the error. Now I
> removed both
> > lines as any additional messages should be caught as an extra messages.
> Actually
> > I will update the fcf-protection-4.c test in the generic patch.
> >
> > Updated patch is attached.
> >
> 
> ChangeLog has
> 
> * gcc.target/i386/cet-intrin-1.c: Likewise.
> * gcc.target/i386/cet-intrin-10.c: Likewise.
> * gcc.target/i386/cet-intrin-2.c: Likewise.
> * gcc.target/i386/cet-intrin-3.c: Likewise.
> * gcc.target/i386/cet-intrin-4.c: Likewise.
> * gcc.target/i386/cet-intrin-5.c: Likewise.
> * gcc.target/i386/cet-intrin-6.c: Likewise.
> * gcc.target/i386/cet-intrin-7.c: Likewise.
> * gcc.target/i386/cet-intrin-8.c: Likewise.
> * gcc.target/i386/cet-intrin-9.c: Likewise.
> 
> But there are no gcc.target/i386/cet-intrin-1.c nor
> gcc.target/i386/cet-intrin-2.c.
> 
> 
> --
> H.J.

[PATCH] i386: Don't generate ENDBR if function is only called directly

2017-10-22 Thread H.J. Lu 
There is no need to insert ENDBR instruction if function is only called
directly.

OK for trunk if there is no regressions?

H.J.

gcc/

PR target/82659
* config/i386/i386.c (pass_insert_endbranch::gate): Return
false if function is only called directly.

gcc/testsuite/

PR target/82659
* gcc.target/i386/pr82659-1.c: New test.
* gcc.target/i386/pr82659-2.c: Likewise.
* gcc.target/i386/pr82659-3.c: Likewise.
* gcc.target/i386/pr82659-4.c: Likewise.
* gcc.target/i386/pr82659-5.c: Likewise.
* gcc.target/i386/pr82659-6.c: Likewise.
---
 gcc/config/i386/i386.c|  6 --
 gcc/testsuite/gcc.target/i386/pr82659-1.c | 19 +++
 gcc/testsuite/gcc.target/i386/pr82659-2.c | 18 ++
 gcc/testsuite/gcc.target/i386/pr82659-3.c | 21 +
 gcc/testsuite/gcc.target/i386/pr82659-4.c | 15 +++
 gcc/testsuite/gcc.target/i386/pr82659-5.c | 10 ++
 gcc/testsuite/gcc.target/i386/pr82659-6.c | 19 +++
 7 files changed, 106 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-4.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-5.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr82659-6.c

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index fb0b7e71469..b86504378ae 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2693,9 +2693,11 @@ public:
   {}
 
   /* opt_pass methods: */
-  virtual bool gate (function *)
+  virtual bool gate (function *fun)
 {
-  return ((flag_cf_protection & CF_BRANCH) && TARGET_IBT);
+  return ((flag_cf_protection & CF_BRANCH)
+ && TARGET_IBT
+ && !cgraph_node::get (fun->decl)->only_called_directly_p ());
 }
 
   virtual unsigned int execute (function *)
diff --git a/gcc/testsuite/gcc.target/i386/pr82659-1.c 
b/gcc/testsuite/gcc.target/i386/pr82659-1.c
new file mode 100644
index 000..8f0a6906815
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr82659-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+
+extern int x;
+
+static void
+__attribute__ ((noinline, noclone))
+test (int i)
+{
+  x = i;
+}
+
+void
+bar (int i)
+{
+  test (i);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr82659-2.c 
b/gcc/testsuite/gcc.target/i386/pr82659-2.c
new file mode 100644
index 000..228a20006b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr82659-2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 2 { target { ! ia32 } } } } */
+
+extern int x;
+
+void
+test (int i)
+{
+  x = i;
+}
+
+void
+bar (int i)
+{
+  test (i);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr82659-3.c 
b/gcc/testsuite/gcc.target/i386/pr82659-3.c
new file mode 100644
index 000..6ae23e40abc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr82659-3.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 2 { target { ! ia32 } } } } */
+
+extern int x;
+
+static void
+__attribute__ ((noinline, noclone))
+test (int i)
+{
+  x = i;
+}
+
+extern __typeof (test) foo __attribute__ ((alias ("test")));
+
+void
+bar (int i)
+{
+  test (i);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr82659-4.c 
b/gcc/testsuite/gcc.target/i386/pr82659-4.c
new file mode 100644
index 000..ca87264e98b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr82659-4.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 2 { target { ! ia32 } } } } */
+
+static void
+test (void)
+{
+}
+
+void *
+bar (void)
+{
+  return test;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr82659-5.c 
b/gcc/testsuite/gcc.target/i386/pr82659-5.c
new file mode 100644
index 000..c34eade0f90
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr82659-5.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcf-protection -mcet" } */
+/* { dg-final { scan-assembler-times "endbr32" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "endbr64" 1 { target { ! ia32 } } } } */
+static void
+test (void)
+{
+}
+
+void (*test_p) (void) = test;
diff --git a/gcc/testsuite/gcc.target/i386/pr82659-6.c 
b/gc

RE: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation

2017-10-22 Thread Tsimbalist, Igor V 
I moved the tests to gcc.target/i386 directory and committed the changes.

Igor


> -Original Message-
> From: Andreas Schwab [mailto:sch...@linux-m68k.org]
> Sent: Sunday, October 22, 2017 1:41 PM
> To: Tsimbalist, Igor V 
> Cc: Uros Bizjak ; gcc-patches@gcc.gnu.org
> Subject: Re: 0006-Part-6.-Add-x86-tests-for-Intel-CET-implementation
> 
> FAIL: c-c++-common/attr-nocf-check-1a.c  -Wc++-compat   (test for
> warnings, lin\
> e 17)
> FAIL: c-c++-common/attr-nocf-check-1a.c  -Wc++-compat  (test for excess
> errors)
> Excess errors:
> xgcc: error: unrecognized command line option '-mcet'
> FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat   (test for
> warnings, line 15)
> FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat   (test for
> warnings, line 25)
> FAIL: c-c++-common/attr-nocf-check-3a.c  -Wc++-compat  (test for excess
> errors)
> Excess errors:
> xgcc: error: unrecognized command line option '-mcet'
> 
> Andreas.
> 
> --
> Andreas Schwab, sch...@linux-m68k.org
> GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
> "And now for something completely different."

[patch, fortran] Fix PR 56342, matmul was not simplified

2017-10-22 Thread Thomas Koenig 

Hello world,

the attached patch fixes the PR by calling gfc_simplify_expr for
parameter arrays, which do not yet appear to simplified completely
by the time they reach gfc_simplify_matmul.

I suspect this will also fix some more simplification issues, but I
didn't search for other cases.

Regression-tested.  OK for trunk?

Regards

Thomas


2017-10-22  Thomas Koenig  

PR fortran/56342
* simplify.c (is_constant_array_expr): If the expression is
a parameter array, call gfc_simplify_expr.

2017-10-22  Thomas Koenig  

PR fortran/56342
* gfortran.dg/matmul_const.f90: New test.
Index: simplify.c
===
--- simplify.c	(Revision 253768)
+++ simplify.c	(Arbeitskopie)
@@ -227,7 +227,8 @@
 }
 
 
-/* Test that the expression is an constant array.  */
+/* Test that the expression is an constant array, simplifying if
+   we are dealing with a parameter array.  */
 
 static bool
 is_constant_array_expr (gfc_expr *e)
@@ -237,6 +238,10 @@
   if (e == NULL)
 return true;
 
+  if (e->expr_type == EXPR_VARIABLE && e->rank > 0
+  && e->symtree->n.sym->attr.flavor == FL_PARAMETER)
+gfc_simplify_expr (e, 1);
+
   if (e->expr_type != EXPR_ARRAY || !gfc_is_constant_expr (e))
 return false;
 
! { dg-do  run }
! { dg-additional-options "-fno-frontend-optimize -fdump-tree-original" }
program main
  integer, parameter :: A(3,2) = reshape([1,2,3,4,5,6],[3,2])
  integer, parameter :: B(2,3) = reshape([1,1,1,1,1,1],[2,3])
  character (len=30) :: line
  write (unit=line,fmt='(9i3)') matmul(A,B)
  if (line /= '  5  7  9  5  7  9  5  7  9') call abort
end program main
!  dg-final { scan-tree-dump-times "matmul_i4" 0 "original" } }

[PATCH, i386]: Fix PR 82628, wrong code at -Os on x86_64-linux-gnu in the 32-bit mode

2017-10-22 Thread Uros Bizjak 
Hello!

In PR 82628 Jakub figured out that insn patterns that consume carry
flag were not 100% correct. Due to this issue, combine is able to
simplify various CC_REG propagations that result in invalid code.

Attached patch fixes (well, mitigates) the above problem by splitting
the double-mode compare after the reload, in the same way other
*_doubleword patterns are handled from "the beginning of the time".

2017-10-22  Uros Bizjak  

PR target/82628
* config/i386/i386.md (cmp_doubleword): New pattern.
* config/i386/i386.c (ix86_expand_branch) :
Expand with cmp_doubleword.

2017-10-22  Uros Bizjak  
Jakub Jelinek  

PR target/82628
* gcc.dg/torture/pr82628.c: New test.

Patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN.

Uros.
Index: config/i386/i386.c
===
--- config/i386/i386.c  (revision 253949)
+++ config/i386/i386.c  (working copy)
@@ -22175,34 +22175,26 @@ ix86_expand_branch (enum rtx_code code, rtx op0, r
switch (code)
  {
  case LE: case LEU: case GT: case GTU:
-   std::swap (lo[0], lo[1]);
-   std::swap (hi[0], hi[1]);
+   std::swap (op0, op1);
code = swap_condition (code);
/* FALLTHRU */
 
  case LT: case LTU: case GE: case GEU:
{
- rtx (*cmp_insn) (rtx, rtx);
- rtx (*sbb_insn) (rtx, rtx, rtx);
+ rtx (*cmp_insn) (rtx, rtx, rtx);
 
  if (TARGET_64BIT)
-   cmp_insn = gen_cmpdi_1, sbb_insn = gen_subdi3_carry_ccgz;
+   cmp_insn = gen_cmpti_doubleword;
  else
-   cmp_insn = gen_cmpsi_1, sbb_insn = gen_subsi3_carry_ccgz;
+   cmp_insn = gen_cmpdi_doubleword;
 
- if (!nonimmediate_operand (lo[0], submode))
-   lo[0] = force_reg (submode, lo[0]);
- if (!x86_64_general_operand (lo[1], submode))
-   lo[1] = force_reg (submode, lo[1]);
+ if (!register_operand (op0, mode))
+   op0 = force_reg (mode, op0);
+ if (!x86_64_hilo_general_operand (op1, mode))
+   op1 = force_reg (mode, op1);
 
- if (!register_operand (hi[0], submode))
-   hi[0] = force_reg (submode, hi[0]);
- if (!x86_64_general_operand (hi[1], submode))
-   hi[1] = force_reg (submode, hi[1]);
+ emit_insn (cmp_insn (gen_rtx_SCRATCH (mode), op0, op1));
 
- emit_insn (cmp_insn (lo[0], lo[1]));
- emit_insn (sbb_insn (gen_rtx_SCRATCH (submode), hi[0], hi[1]));
-
  tmp = gen_rtx_REG (CCGZmode, FLAGS_REG);
 
  ix86_expand_branch (code, tmp, const0_rtx, label);
Index: config/i386/i386.md
===
--- config/i386/i386.md (revision 253949)
+++ config/i386/i386.md (working copy)
@@ -1262,6 +1262,26 @@
(compare:CC (match_operand:SWI48 0 "nonimmediate_operand")
(match_operand:SWI48 1 "")))])
 
+(define_insn_and_split "cmp_doubleword"
+  [(set (reg:CCGZ FLAGS_REG)
+   (compare:CCGZ
+ (match_operand: 1 "register_operand" "0")
+ (match_operand: 2 "x86_64_hilo_general_operand" "ro")))
+   (clobber (match_scratch: 0 "=r"))]
+  ""
+  "#"
+  "reload_completed"
+  [(set (reg:CC FLAGS_REG)
+   (compare:CC (match_dup 1) (match_dup 2)))
+   (parallel [(set (reg:CCGZ FLAGS_REG)
+  (compare: CCGZ
+(match_dup 4)
+(plus:DWIH
+  (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
+  (match_dup 5
+ (clobber (match_dup 3))])]
+  "split_double_mode (mode, &operands[0], 3, &operands[0], 
&operands[3]);")
+
 (define_insn "*cmp_ccno_1"
   [(set (reg FLAGS_REG)
(compare (match_operand:SWI 0 "nonimmediate_operand" ",?m")
@@ -6880,7 +6900,7 @@
(set_attr "pent_pair" "pu")
(set_attr "mode" "SI")])
 
-(define_insn "sub3_carry_ccgz"
+(define_insn "*sub3_carry_ccgz"
   [(set (reg:CCGZ FLAGS_REG)
(compare:CCGZ
  (match_operand:DWIH 1 "register_operand" "0")
Index: testsuite/gcc.target/i386/pr82628.c
===
--- testsuite/gcc.target/i386/pr82628.c (nonexistent)
+++ testsuite/gcc.target/i386/pr82628.c (working copy)
@@ -0,0 +1,34 @@
+/* { dg-do run { target ia32 } } */
+/* { dg-options "-Os" } */
+
+void
+__attribute__ ((noipa))
+foo (const char *x)
+{
+  asm volatile ("" : "+g" (x) : : "memory");
+  if (x)
+__builtin_abort ();
+}
+
+int a, b = 1;
+
+int
+main ()
+{
+  while (1)
+{
+  unsigned long long d = 18446744073709551615UL;
+  while (1)
+   {
+ int e = b;
+ while (d < 2)
+   foo ("0");
+ if (a)
+   d++;
+ if (b)
+   break;
+   }
+  break;
+}
+  return 0;
+}

Re: [RFC PATCH, i386]: Make FP inequality comparisons trapping on qNaN.

2017-10-22 Thread Uros Bizjak 
On Fri, Oct 20, 2017 at 9:48 PM, Uros Bizjak  wrote:
> On Fri, Oct 20, 2017 at 2:15 PM, Joseph Myers  wrote:
>
>> This is PR target/52451.
>>
>> A testcase (conditional on the fenv_exceptions effective-target) that
>> ordered comparisons with quiet NaNs set FE_INVALID would be a good idea,
>> but it would need XFAILing for powerpc (bug 58684) and s390 (bug 77918).
>
> Joseph,
>
> thanks for pointing out a PR reference and a suggestion for a testcase.
>
> Please find attached a new version of the patch, including the
> comprehensive tests.
>
> 2017-10-20  Uros Bizjak  
>
> PR target/52451
> * config/i386/i386.c (ix86_fp_compare_mode): Return CCFPmode
> for ordered inequality comparisons even with TARGET_IEEE_FP.
>
> 2017-10-20  Uros Bizjak  
>
> PR target/52451
> * gcc.dg/torture/pr52451.c: New test.
>
> Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Now committed to mainline SVN.

Uros.

Fix HWI + -unsigned in combine.c

2017-10-22 Thread Richard Sandiford 
rtx_equal_for_field_assignment_p had:

x = adjust_address_nv (x, GET_MODE (y),
   -subreg_lowpart_offset (GET_MODE (x),
   GET_MODE (y)));

But subreg_lowpart_offset returns an unsigned int and
adjust_address_nv takes a HWI, so a subreg offset of 4 would
give a memory offset of 0xfc.

The SVE series makes this go away by using HWI-based types for
both interfaces, but in this case the fix is also a minor clean-up.

Tested on aarch64-linux-gnu, powerpc64le-linux-gnu and
x86_64-linux-gnu.  OK to install?

Richard


2017-10-22  Richard Sandiford  

gcc/
* combine.c (rtx_equal_for_field_assignment_p): Use
byte_lowpart_offset.

Index: gcc/combine.c
===
--- gcc/combine.c   2017-10-22 21:04:50.138830154 +0100
+++ gcc/combine.c   2017-10-22 21:04:59.000825360 +0100
@@ -9526,13 +9526,9 @@ rtx_equal_for_field_assignment_p (rtx x,
return 0;
   if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
return 0;
-  /* For big endian, adjust the memory offset.  */
-  if (BYTES_BIG_ENDIAN)
-   x = adjust_address_nv (x, GET_MODE (y),
-  -subreg_lowpart_offset (GET_MODE (x),
-  GET_MODE (y)));
-  else
-   x = adjust_address_nv (x, GET_MODE (y), 0);
+  x = adjust_address_nv (x, GET_MODE (y),
+byte_lowpart_offset (GET_MODE (y),
+ GET_MODE (x)));
 }
 
   if (x == y || rtx_equal_p (x, y))

Re: Fix HWI + -unsigned in combine.c

2017-10-22 Thread Segher Boessenkool 
Hi!

On Sun, Oct 22, 2017 at 09:13:11PM +0100, Richard Sandiford wrote:
> rtx_equal_for_field_assignment_p had:
> 
>   x = adjust_address_nv (x, GET_MODE (y),
>  -subreg_lowpart_offset (GET_MODE (x),
>  GET_MODE (y)));
> 
> But subreg_lowpart_offset returns an unsigned int and
> adjust_address_nv takes a HWI, so a subreg offset of 4 would
> give a memory offset of 0xfc.
> 
> The SVE series makes this go away by using HWI-based types for
> both interfaces, but in this case the fix is also a minor clean-up.
> 
> Tested on aarch64-linux-gnu, powerpc64le-linux-gnu and
> x86_64-linux-gnu.  OK to install?

Yes please, thanks!


Segher


> 2017-10-22  Richard Sandiford  
> 
> gcc/
>   * combine.c (rtx_equal_for_field_assignment_p): Use
>   byte_lowpart_offset.
> 
> Index: gcc/combine.c
> ===
> --- gcc/combine.c 2017-10-22 21:04:50.138830154 +0100
> +++ gcc/combine.c 2017-10-22 21:04:59.000825360 +0100
> @@ -9526,13 +9526,9 @@ rtx_equal_for_field_assignment_p (rtx x,
>   return 0;
>if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
>   return 0;
> -  /* For big endian, adjust the memory offset.  */
> -  if (BYTES_BIG_ENDIAN)
> - x = adjust_address_nv (x, GET_MODE (y),
> --subreg_lowpart_offset (GET_MODE (x),
> -GET_MODE (y)));
> -  else
> - x = adjust_address_nv (x, GET_MODE (y), 0);
> +  x = adjust_address_nv (x, GET_MODE (y),
> +  byte_lowpart_offset (GET_MODE (y),
> +   GET_MODE (x)));
>  }
>  
>if (x == y || rtx_equal_p (x, y))