Re: Enabling -frename-registers?
Richard Biener writes: > It shows overall benefit on Itanic and ups and downs on x86. It's causing bootstrap comparison failures on ia64. Andreas. -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5 "And now for something completely different."
Re: [SH][committed] Remove SH5 support in compiler
On Sat, 2016-04-30 at 14:44 +0900, Oleg Endo wrote:
> On Sat, 2016-04-30 at 10:58 +0900, Oleg Endo wrote:
> > On Fri, 2016-04-29 at 23:11 +0900, Oleg Endo wrote:
> > > On Fri, 2016-04-29 at 19:45 +0900, Oleg Endo wrote:
> > > > On Thu, 2016-04-28 at 10:27 +0900, Oleg Endo wrote:
> > > >
> > > > > The removal of SH5 support from GCC has been announced here
> > > > > https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html
> > > > >
> > > > > The attached patch removes support for SH5 in the compiler
> > > > > back
> > > > > end.
> > > > > There are still some leftovers and new simplification
> > > > > opportunities.
> > > > > These will be addressed in later follow up patches.
> > > > >
> > > > > Tested on sh-elf with
> > > > >
> > > > > make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,
> > > > > -m2/
> > > > > -mb,
> > > > > -m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
> > > >
> > > > The attached patch removes some leftovers and reinstantes the
> > > > divsf3
> > > > expander pattern which got accidentally deleted by the previous
> > > > patch.
> > >
> > > The attached patch removes SH5 support from libgcc.
> > > Tested as above. Committed as r235640.
> >
> > The attached patch removes SH5 checks in the testsuite.
> > Committed as r235673.
>
> The attached patch removes some remaining superfluous TARGET_SH1
> checks. Tested with
The attached patch finally removes SH5 support from the various
configure machineries.
Tested with
make -k check-gcc RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb,
-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
Committed as r235676.
Cheers,
Oleg
ChangeLog:
/
* config.guess: Remove SH5 support.
* config.sub: Likewise.
* configure: Likewise.
* configure.ac: Likewise.
config/
* picflag.m4: Remove SH5 support.
gcc/
* config/sh/t-sh: Remove SH5 support.
* config.gcc: Likewise.
* configure: Likewise.
contrib/
* compare-all-tests: Remove SH5 support.
* config-list.mk: Likewise.
libada/
* configure: Remove SH5 support.
libgcc/
* config.host: Remove SH5 support.
* configure: Likewise.
libiberty/
* configure: Remove SH5 support.
libjava/
* classpath/config.guess: Remove SH5 support.
* classpath/config.sub: Likewise.diff --git a/config.guess b/config.guess
index dcd5149..6396977 100755
--- a/config.guess
+++ b/config.guess
@@ -177,7 +177,6 @@ case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in
arm*) machine=arm-unknown ;;
sh3el) machine=shl-unknown ;;
sh3eb) machine=sh-unknown ;;
- sh5el) machine=sh5le-unknown ;;
earmv*)
arch=`echo ${UNAME_MACHINE_ARCH} | sed -e 's,^e\(armv[0-9]\).*$,\1,'`
endian=`echo ${UNAME_MACHINE_ARCH} | sed -ne 's,^.*\(eb\)$,\1,p'`
@@ -1028,9 +1027,6 @@ EOF
s390:Linux:*:* | s390x:Linux:*:*)
echo ${UNAME_MACHINE}-ibm-linux-${LIBC}
exit ;;
-sh64*:Linux:*:*)
- echo ${UNAME_MACHINE}-unknown-linux-${LIBC}
- exit ;;
sh*:Linux:*:*)
echo ${UNAME_MACHINE}-unknown-linux-${LIBC}
exit ;;
diff --git a/config.sub b/config.sub
index da6d1b6..1b4b975 100755
--- a/config.sub
+++ b/config.sub
@@ -306,7 +306,6 @@ case $basic_machine in
| rl78 | rx \
| score \
| sh | sh[1234] | sh[24]a | sh[24]aeb | sh[23]e | sh[234]eb | sheb | shbe | shle | sh[1234]le | sh3ele \
- | sh64 | sh64le \
| sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet | sparclite \
| sparcv8 | sparcv9 | sparcv9b | sparcv9v \
| spu \
@@ -432,7 +431,7 @@ case $basic_machine in
| riscv32-* | riscv64-* \
| rl78-* | romp-* | rs6000-* | rx-* \
| sh-* | sh[1234]-* | sh[24]a-* | sh[24]aeb-* | sh[23]e-* | sh[34]eb-* | sheb-* | shbe-* \
- | shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \
+ | shle-* | sh[1234]le-* | sh3ele-* \
| sparc-* | sparc64-* | sparc64b-* | sparc64v-* | sparc86x-* | sparclet-* \
| sparclite-* \
| sparcv8-* | sparcv9-* | sparcv9b-* | sparcv9v-* | sv1-* | sx*-* \
@@ -1094,12 +1093,6 @@ case $basic_machine in
basic_machine=sh-hitachi
os=-hms
;;
- sh5el)
- basic_machine=sh5le-unknown
- ;;
- sh64)
- basic_machine=sh64-unknown
- ;;
sparclite-wrs | simso-wrs)
basic_machine=sparclite-wrs
os=-vxworks
diff --git a/config/picflag.m4 b/config/picflag.m4
index 2f5b972..e0fa343 100644
--- a/config/picflag.m4
+++ b/config/picflag.m4
@@ -61,8 +61,7 @@ case "${$2}" in
$1=-fpic
;;
# FIXME: Simplify to sh*-*-netbsd*?
-sh-*-netbsdelf* | shl*-*-netbsdelf* | sh5-*-netbsd* | sh5l*-*-netbsd* | \
- sh64-*-netbsd* | sh64l*-*-netbsd*)
+sh-*-netbsdelf* | shl*-*-netbsdelf*)
$1=-fpic
;;
# Default to -fPIC unless specified otherwise.
diff --git a/configure b/configure
index 35f231e..31f1dd6 100755
--- a/configure
+++ b/configure
@@ -3446,8 +3446,6 @@ case "${target}" in
;;
sh-*-* | sh[34]*-*-*)
;;
- sh64-*-* | sh5*-*-*)
-;;
sparc*-*-*)
;;
x86_64-*-*)
@@ -3946,7 +3944,7 @@ case "${ta
Re: [SH][committed] Remove SH5 support in compiler
On Sat, 30 Apr 2016, Oleg Endo wrote: > * config.guess: Remove SH5 support. > * config.sub: Likewise. Please revert. These files must come verbatim from config.git with no local changes. If you persuade config-patches that SH5 support should be removed there then you can import new, unmodified upstream files. > * configure: Likewise. For all the configure scripts listed, regeneration rather than manual editing is appropriate. Please make sure the changes you committed are identical to those from a proper regeneration with the right autoconf version. > * classpath/config.guess: Remove SH5 support. > * classpath/config.sub: Likewise. Again, please revert and keep these files identical to upstream. -- Joseph S. Myers jos...@codesourcery.com
Re: [PATCH] Drop excess size used for run time allocated stack variables.
> The attached patch removes excess stack space allocation with > alloca in some situations. Plese check the commit message in the > patch for details. This might fix PR middle-end/50938. -- Eric Botcazou
[rs6000] Fix 32-bit bootstrap failure
Hi
it's the recurring issue documented in rs6000_expand_ternop_builtin:
Note that a switch statement instead of the sequence of tests
would be incorrect as many of the CODE_FOR values could be
CODE_FOR_nothing and that would yield multiple alternatives
with identical values.
Bootstrapped on PowerPC/Linux, OK for the mainline?
2016-04-30 Eric Botcazou
* config/rs6000/rs6000.c (altivec_expand_lv_builtin): Do not use
switch statement on instruction code. Remove trailing spaces.
(altivec_expand_stv_builtin): Likewise.
--
Eric BotcazouIndex: config/rs6000/rs6000.c
===
--- config/rs6000/rs6000.c (revision 235619)
+++ config/rs6000/rs6000.c (working copy)
@@ -13109,45 +13109,41 @@ altivec_expand_lv_builtin (enum insn_cod
/* For LVX, express the RTL accurately by ANDing the address with -16.
LVXL and LVE*X expand to use UNSPECs to hide their special behavior,
so the raw address is fine. */
- switch (icode)
+ if (icode == CODE_FOR_altivec_lvx_v2df_2op
+ || icode == CODE_FOR_altivec_lvx_v2di_2op
+ || icode == CODE_FOR_altivec_lvx_v4sf_2op
+ || icode == CODE_FOR_altivec_lvx_v4si_2op
+ || icode == CODE_FOR_altivec_lvx_v8hi_2op
+ || icode == CODE_FOR_altivec_lvx_v16qi_2op)
{
-case CODE_FOR_altivec_lvx_v2df_2op:
-case CODE_FOR_altivec_lvx_v2di_2op:
-case CODE_FOR_altivec_lvx_v4sf_2op:
-case CODE_FOR_altivec_lvx_v4si_2op:
-case CODE_FOR_altivec_lvx_v8hi_2op:
-case CODE_FOR_altivec_lvx_v16qi_2op:
- {
- rtx rawaddr;
- if (op0 == const0_rtx)
- rawaddr = op1;
- else
- {
- op0 = copy_to_mode_reg (mode0, op0);
- rawaddr = gen_rtx_PLUS (Pmode, op1, op0);
- }
- addr = gen_rtx_AND (Pmode, rawaddr, gen_rtx_CONST_INT (Pmode, -16));
- addr = gen_rtx_MEM (blk ? BLKmode : tmode, addr);
-
- /* For -maltivec=be, emit the load and follow it up with a
- permute to swap the elements. */
- if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)
- {
- rtx temp = gen_reg_rtx (tmode);
- emit_insn (gen_rtx_SET (temp, addr));
-
- rtx sel = swap_selector_for_mode (tmode);
- rtx vperm = gen_rtx_UNSPEC (tmode, gen_rtvec (3, temp, temp, sel),
- UNSPEC_VPERM);
- emit_insn (gen_rtx_SET (target, vperm));
- }
- else
- emit_insn (gen_rtx_SET (target, addr));
+ rtx rawaddr;
+ if (op0 == const0_rtx)
+ rawaddr = op1;
+ else
+ {
+ op0 = copy_to_mode_reg (mode0, op0);
+ rawaddr = gen_rtx_PLUS (Pmode, op1, op0);
+ }
+ addr = gen_rtx_AND (Pmode, rawaddr, gen_rtx_CONST_INT (Pmode, -16));
+ addr = gen_rtx_MEM (blk ? BLKmode : tmode, addr);
- break;
- }
+ /* For -maltivec=be, emit the load and follow it up with a
+ permute to swap the elements. */
+ if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)
+ {
+ rtx temp = gen_reg_rtx (tmode);
+ emit_insn (gen_rtx_SET (temp, addr));
-default:
+ rtx sel = swap_selector_for_mode (tmode);
+ rtx vperm = gen_rtx_UNSPEC (tmode, gen_rtvec (3, temp, temp, sel),
+ UNSPEC_VPERM);
+ emit_insn (gen_rtx_SET (target, vperm));
+ }
+ else
+ emit_insn (gen_rtx_SET (target, addr));
+}
+ else
+{
if (op0 == const0_rtx)
addr = gen_rtx_MEM (blk ? BLKmode : tmode, op1);
else
@@ -13161,10 +13157,8 @@ altivec_expand_lv_builtin (enum insn_cod
if (! pat)
return 0;
emit_insn (pat);
-
- break;
}
-
+
return target;
}
@@ -13268,63 +13262,57 @@ altivec_expand_stv_builtin (enum insn_co
/* For STVX, express the RTL accurately by ANDing the address with -16.
STVXL and STVE*X expand to use UNSPECs to hide their special behavior,
so the raw address is fine. */
- switch (icode)
+ if (icode == CODE_FOR_altivec_stvx_v2df_2op
+ || icode == CODE_FOR_altivec_stvx_v2di_2op
+ || icode == CODE_FOR_altivec_stvx_v4sf_2op
+ || icode == CODE_FOR_altivec_stvx_v4si_2op
+ || icode == CODE_FOR_altivec_stvx_v8hi_2op
+ || icode == CODE_FOR_altivec_stvx_v16qi_2op)
{
-case CODE_FOR_altivec_stvx_v2df_2op:
-case CODE_FOR_altivec_stvx_v2di_2op:
-case CODE_FOR_altivec_stvx_v4sf_2op:
-case CODE_FOR_altivec_stvx_v4si_2op:
-case CODE_FOR_altivec_stvx_v8hi_2op:
-case CODE_FOR_altivec_stvx_v16qi_2op:
- {
- if (op1 == const0_rtx)
- rawaddr = op2;
- else
- {
- op1 = copy_to_mode_reg (mode1, op1);
- rawaddr = gen_rtx_PLUS (Pmode, op2, op1);
- }
-
- addr = gen_rtx_AND (Pmode, rawaddr, gen_rtx_CONST_INT (Pmode, -16));
- addr = gen_rtx_MEM (tmode, addr);
-
- op0 = copy_to_mode_reg (tmode, op0);
-
- /* For -maltivec=be, emit a permute to swap the elements, followed
- by the store. */
- if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)
- {
- rtx temp = gen_reg_rtx (tmode);
- rtx sel = swap_selector_for_mode (tmode);
- rtx vperm = gen_rtx_UNSPEC (tmode, gen_rtvec (3, op0, op0, sel),
- UNSPEC_VPERM);
- emit_insn (gen_rtx_S
Re: [PATCH] Drop excess size used for run time allocated stack variables.
On Sat, Apr 30, 2016 at 11:44:01AM +0200, Eric Botcazou wrote: > > The attached patch removes excess stack space allocation with > > alloca in some situations. Plese check the commit message in the > > patch for details. > > This might fix PR middle-end/50938. This certainly looks like what I was trying to fix. Now, if anyone could think of a target independent test case for the patch ... Ciao Dominik ^_^ ^_^ -- Dominik Vogt
[Ada] Adjust ACATS testing
Unlike the gnat.dg testsuite, the ACATS testsuite doesn't use the newly built
gnatmake/gnatbind/gnatlink tools, which is rather inconsistent.
Fixed thusly, tested on x86_64-suse-linux, applied on the mainline.
2016-04-30 Eric Botcazou
* gcc-interface/Make-lang.in (ACATSCMD): New variable.
(check-acats): Use it.
(check_acats_targets): Likewise.
2016-04-30 Eric Botcazou
* ada/acats/run_acats: Rename into...
* ada/acats/run_acats.sh: ...this. Only export BASE variable.
* ada/acats/run_all.sh: Remove redundant test.
(target_run): Move around.
(target_gnatchop): Use newly built executable.
(target_gnatmake): Likewise.
Check that the compilation of impbit succeeds.
--
Eric BotcazouIndex: ada/gcc-interface/Make-lang.in
===
--- ada/gcc-interface/Make-lang.in (revision 235619)
+++ ada/gcc-interface/Make-lang.in (working copy)
@@ -868,6 +868,7 @@ check-ada: check-acats check-gnat
check-ada-subtargets: check-acats-subtargets check-gnat-subtargets
ACATSDIR = $(TESTSUITEDIR)/ada/acats
+ACATSCMD = run_acats.sh
check_acats_numbers0:=1 2 3 4 5 6 7 8 9
check_acats_numbers1:=0 $(check_acats_numbers0)
@@ -892,7 +893,7 @@ check-acats:
mkdir $(ACATSDIR)-parallel; \
( testdir=`cd ${srcdir}/${ACATSDIR} && ${PWD_COMMAND}`; \
export testdir; \
- cd $(ACATSDIR) && $(SHELL) $${testdir}/run_acats NONE ) \
+ cd $(ACATSDIR) && $(SHELL) $${testdir}/$(ACATSCMD) NONE ) \
|| exit 1; \
GCC_RUNTEST_PARALLELIZE_DIR=$$rootme/$(ACATSDIR)-parallel; \
export GCC_RUNTEST_PARALLELIZE_DIR; \
@@ -913,7 +914,7 @@ check-acats:
exit 0; \
fi; \
testdir=`cd ${srcdir}/${ACATSDIR} && ${PWD_COMMAND}`; \
- export testdir; cd $(ACATSDIR) && $(SHELL) $${testdir}/run_acats $(CHAPTERS)
+ export testdir; cd $(ACATSDIR) && $(SHELL) $${testdir}/$(ACATSCMD) $(CHAPTERS)
check-acats-subtargets:
@echo check-acats
@@ -925,7 +926,7 @@ $(check_acats_targets): check-acats%:
fi; \
test -d $(ACATSDIR)$* || mkdir -p $(ACATSDIR)$*; \
testdir=`cd ${srcdir}/${ACATSDIR} && ${PWD_COMMAND}`; \
- export testdir; cd $(ACATSDIR)$* && $(SHELL) $${testdir}/run_acats
+ export testdir; cd $(ACATSDIR)$* && $(SHELL) $${testdir}/$(ACATSCMD)
touch $$GCC_RUNTEST_PARALLELIZE_DIR/finished
.PHONY: check-acats $(check_acats_targets)
Index: testsuite/ada/acats/run_acats
===
--- testsuite/ada/acats/run_acats (revision 235619)
+++ testsuite/ada/acats/run_acats (working copy)
@@ -1,73 +0,0 @@
-#!/bin/sh
-
-if [ "$testdir" = "" ]; then
- echo You must use make check or make check-ada
- exit 1
-fi
-
-# Provide which replacement.
-#
-# type -p is missing from Solaris 2 /bin/sh and /bin/ksh (ksh88), but both
-# ksh93 and bash have it.
-# type output format differs between ksh88 and ksh93, so avoid it if
-# type -p is present. Unfortunately, HP-UX /bin/sh ignores -p with type.
-# Fall back to whence which ksh88 and ksh93 provide, but bash does not.
-
-which () {
-path=`type -p $* 2>/dev/null` && { echo $path | awk '{print $NF}'; return 0; }
-path=`type $* 2>/dev/null` && { echo $path | awk '{print $NF}'; return 0; }
-path=`whence $* 2>/dev/null` && { echo $path; return 0; }
-return 1
-}
-
-# Set up environment to use the Ada compiler from the object tree
-
-host_gnatchop=`which gnatchop`
-host_gnatmake=`which gnatmake`
-ROOT=`${PWDCMD-pwd}`
-BASE=`cd $ROOT/../../..; ${PWDCMD-pwd}`
-
-PATH=$BASE:$ROOT:$PATH
-ADA_INCLUDE_PATH=$BASE/ada/rts
-LD_LIBRARY_PATH=$ADA_INCLUDE_PATH:$BASE:$LD_LIBRARY_PATH
-ADA_OBJECTS_PATH=$ADA_INCLUDE_PATH
-
-if [ ! -d $ADA_INCLUDE_PATH ]; then
- echo gnatlib missing, exiting.
- exit 1
-fi
-
-if [ ! -f $BASE/gnatchop ]; then
- echo gnattools missing, exiting.
- exit 1
-fi
-
-if [ ! -f $BASE/gnatmake ]; then
- echo gnattools missing, exiting.
- exit 1
-fi
-
-GCC_DRIVER="$BASE/xgcc"
-GCC="$BASE/xgcc -B$BASE/"
-export PATH ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_DRIVER GCC LD_LIBRARY_PATH
-
-echo '#!/bin/sh' > host_gnatchop
-echo PATH=`dirname $host_gnatchop`:'$PATH' >> host_gnatchop
-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatchop
-echo export PATH >> host_gnatchop
-echo exec gnatchop '"$@"' >> host_gnatchop
-
-chmod +x host_gnatchop
-
-echo '#!/bin/sh' > host_gnatmake
-echo PATH=`dirname $host_gnatmake`:'$PATH' >> host_gnatmake
-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatmake
-echo export PATH >> host_gnatmake
-echo exec gnatmake '"$@"' >> host_gnatmake
-
-chmod +x host_gnatmake
-
-# Limit the stack to 16MB for stack checking
-ulimit -s 16384
-
-exec $testdir/run_all.sh ${1+"$@"}
Index: testsuite/ada/acats/run_acats.sh
===
--- testsuite/ada/acats/run_acats.sh (revision 235619)
+++ testsuite/ada/acats/run_acats.sh (working copy)
@@ -47,9 +47,7 @@
Re: [PATCH] Clean up tests where a later dg-do completely overrides another.
Hi, nice bug, we should not test it in the gcc testsuite. Could you just split the spec-options.c test case in one that compiles everywhere, and one that executes only on target sh*-*-* ? Bernd.
Re: [SH][committed] Remove SH5 support in compiler
Joseph, Thanks for keeping an eye on that. On Sat, 2016-04-30 at 09:39 +, Joseph Myers wrote: > On Sat, 30 Apr 2016, Oleg Endo wrote: > > > * config.guess: Remove SH5 support. > > * config.sub: Likewise. > > Please revert. These files must come verbatim from config.git with > no local changes. If you persuade config-patches that SH5 support > should be removed there then you can import new, unmodified upstream > files. Done (r235677). I've sent the patch to config-patches. > > > * configure: Likewise. > > For all the configure scripts listed, regeneration rather than manual > editing is appropriate. Please make sure the changes you committed > are identical to those from a proper regeneration with the right > autoconf version. Did that. Looks there are no changes after regeneration. Cheers, Oleg
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Re: [PATCH 3/4] Run profile feedback tests with autofdo
On April 27, 2016 5:27:32 PM GMT+02:00, Bernd Schmidt
wrote:
>On 03/28/2016 06:44 AM, Andi Kleen wrote:
>> From: Andi Kleen
>
>> @@ -313,6 +320,7 @@ proc profopt-execute { src } {
>> # valid, by running it after dg-additional-files-options.
>> foreach ext $prof_ext {
>> profopt-target-cleanup $tmpdir $base $ext
>> +profopt-target-cleanup $tmpdir perf data
>> }
If neither perf nor data depend on $ext then it shouldn't be necessary to loop
them over $prof_ext, no?
thanks,
>
>We have this, and then...
>
>> @@ -400,6 +451,7 @@ proc profopt-execute { src } {
>> foreach ext $prof_ext {
>> profopt-target-cleanup $tmpdir $base $ext
>> }
>> +# XXX remove perf.data
>
>... this - does that need to look the same as the above?
>
>> +# Should check if create_gcov exists
>
>So maybe do that?
>
>
>Bernd
Re: [Ada] Adjust ACATS testing
On Sat, Apr 30, 2016 at 3:42 AM, Eric Botcazou wrote: > Unlike the gnat.dg testsuite, the ACATS testsuite doesn't use the newly built > gnatmake/gnatbind/gnatlink tools, which is rather inconsistent. > > Fixed thusly, tested on x86_64-suse-linux, applied on the mainline. > > > 2016-04-30 Eric Botcazou > > * gcc-interface/Make-lang.in (ACATSCMD): New variable. > (check-acats): Use it. > (check_acats_targets): Likewise. > > > 2016-04-30 Eric Botcazou > > * ada/acats/run_acats: Rename into... > * ada/acats/run_acats.sh: ...this. Only export BASE variable. > * ada/acats/run_all.sh: Remove redundant test. > (target_run): Move around. > (target_gnatchop): Use newly built executable. > (target_gnatmake): Likewise. > Check that the compilation of impbit succeeds. > > -- > Eric Botcazou Does this fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=14435 -- H.J.
Re: [PATCH #2], Fix _Complex when there are multiple FP types the same size
On Fri, Apr 29, 2016 at 04:51:27PM -0400, Michael Meissner wrote:
> 2016-04-29 Michael Meissner
>
> * config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Add
> support for __float128 complex datatypes.
> (rs6000_hard_regno_mode_ok): Likewise.
> (rs6000_setup_reg_addr_masks): Likewise.
> (rs6000_complex_function_value): Likewise.
> * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Likewise.
> __float128 and __ibm128 complex.
> (FLOAT128_IBM_P): Likewise.
> (ALTIVEC_ARG_MAX_RETURN): Likewise.
> * doc/extend.texi (Additional Floating Types): Document that
> -mfloat128 must be used to enable __float128. Document complex
> __float128 and __ibm128 support.
>
> [gcc/testsuite]
> 2016-04-29 Michael Meissner
>
> * gcc.target/powerpc/float128-complex-1.c: New tests for complex
> __float128.
> * gcc.target/powerpc/float128-complex-2.c: Likewise.
The powerpc parts are okay for trunk. Thank you!
A few trivialities you can maybe fix when you commit this:
> @@ -2700,7 +2703,16 @@ rs6000_setup_reg_addr_masks (void)
>for (m = 0; m < NUM_MACHINE_MODES; ++m)
> {
>machine_mode m2 = (machine_mode)m;
There should be a space after the cast. Pre-existing, I know.
> @@ -19190,6 +19223,25 @@ rs6000_preferred_reload_class (rtx x, en
>return NO_REGS;
> }
>
> + /* If we haven't picked a register class, and the type is a vector or
> + floating point type, prefer to use the VSX, FPR, or Altivec register
> + classes. */
> + if (rclass == NO_REGS)
> +{
> + if (TARGET_VSX && VECTOR_MEM_VSX_OR_P8_VECTOR_P (mode))
> + return VSX_REGS;
> +
> + if (TARGET_ALTIVEC && VECTOR_MEM_ALTIVEC_P (mode))
> + return ALTIVEC_REGS;
> +
> + if (DECIMAL_FLOAT_MODE_P (mode))
> + return (TARGET_DFP) ? FLOAT_REGS : NO_REGS;
Superfluous parens.
> @@ -33964,8 +34016,14 @@ rs6000_complex_function_value (machine_m
>machine_mode inner = GET_MODE_INNER (mode);
>unsigned int inner_bytes = GET_MODE_UNIT_SIZE (mode);
>
> - if (FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS)
> + if (TARGET_FLOAT128
> + && ((mode == KCmode)
Parens again.
Segher
Re: [Ada] Adjust ACATS testing
> Does this fix
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=14435
Surprisingly yes according to 'strace' because of this change:
target_gnatchop () {
- gnatchop --GCC="$GCC_DRIVER" $*
+ $BASE/gnatchop --GCC="$BASE/xgcc" $*
}
and the following trick implemented in gnatchop:
-- Add the directory where gnatchop is invoked in front of the path, if
-- gnatchop is invoked with directory information.
declare
Command : constant String := Command_Name;
begin
for Index in reverse Command'Range loop
if Command (Index) = Directory_Separator then
declare
Absolute_Dir : constant String :=
Normalize_Pathname
(Command (Command'First .. Index));
PATH : constant String :=
Absolute_Dir
& Path_Separator
& Getenv ("PATH").all;
begin
Setenv ("PATH", PATH);
end;
exit;
end if;
end loop;
end;
so $BASE ends up added to the PATH by gnatchop and therefore $BASE/gnat1 ends
up being invoked by $BASE/xgcc through the PATH...
--
Eric Botcazou
Canonicalize X u< X to UNORDERED_EXPR
Hello,
this case seemed to be missing in the various X cmp X transformations. It
does not change the generated code in the testcase.
The missing :c is rather trivial. I can commit it separately if you
prefer.
Bootstrap+regtest on powerpc64le-unknown-linux-gnu.
2016-05-02 Marc Glisse
gcc/
* match.pd ((A & B) OP (C & B)): Mark '&' as commutative.
(X u< X, X u> X): New transformations
gcc/testsuite/
* gcc.dg/tree-ssa/unord.c: New testcase.
--
Marc GlisseIndex: trunk/gcc/match.pd
===
--- trunk/gcc/match.pd (revision 235654)
+++ trunk/gcc/match.pd (working copy)
@@ -783,21 +783,21 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
@0)
/* (~x | y) & x -> x & y */
/* (~x & y) | x -> x | y */
(simplify
(bitop:c (rbitop:c (bit_not @0) @1) @0)
(bitop @0 @1)))
/* Simplify (A & B) OP0 (C & B) to (A OP0 C) & B. */
(for bitop (bit_and bit_ior bit_xor)
(simplify
- (bitop (bit_and:c @0 @1) (bit_and @2 @1))
+ (bitop (bit_and:c @0 @1) (bit_and:c @2 @1))
(bit_and (bitop @0 @2) @1)))
/* (x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2) */
(simplify
(bit_and (bit_ior @0 CONSTANT_CLASS_P@1) CONSTANT_CLASS_P@2)
(bit_ior (bit_and @0 @2) (bit_and @1 @2)))
/* Combine successive equal operations with constants. */
(for bitop (bit_and bit_ior bit_xor)
(simplify
@@ -1914,20 +1914,24 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
(simplify
(cmp @0 @0)
(if (cmp != NE_EXPR
|| ! FLOAT_TYPE_P (TREE_TYPE (@0))
|| ! HONOR_NANS (@0))
{ constant_boolean_node (false, type); })))
(for cmp (unle unge uneq)
(simplify
(cmp @0 @0)
{ constant_boolean_node (true, type); }))
+(for cmp (unlt ungt)
+ (simplify
+ (cmp @0 @0)
+ (unordered @0 @0)))
(simplify
(ltgt @0 @0)
(if (!flag_trapping_math)
{ constant_boolean_node (false, type); }))
/* Fold ~X op ~Y as Y op X. */
(for cmp (simple_comparison)
(simplify
(cmp (bit_not@2 @0) (bit_not@3 @1))
(if (single_use (@2) && single_use (@3))
Index: trunk/gcc/testsuite/gcc.dg/tree-ssa/unord.c
===
--- trunk/gcc/testsuite/gcc.dg/tree-ssa/unord.c (revision 0)
+++ trunk/gcc/testsuite/gcc.dg/tree-ssa/unord.c (working copy)
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fdump-tree-optimized" } */
+
+int f(double a){double b=a;return !__builtin_islessequal(a,b);}
+int g(double a){double b=a;return !__builtin_isgreaterequal(a,b);}
+
+/* { dg-final { scan-tree-dump-times " unord " 2 "optimized" } } */
[patch] libstdc++: Make std::shuffle faster by avoiding std::uniform_int_distribution
Hi,
The attached patch makes std::shuffle about 33% faster for the following
testcase:
#include
#include
#include
int main()
{
std::mt19937 gen;
std::vector v;
v.reserve(1);
for (int i = 0; i != 1; ++i)
{
v.push_back(i);
std::shuffle(v.begin(), v.end(), gen);
}
std::cout << v.front() << '\n';
}
It achieves this by avoiding std::uniform_int_distribution when the generator's
range is large enough, which is almost always the case. This helps a lot,
because
std::uniform_int_distribution::op() recomputes scaling factors every time.
Thoughts?
Thanks,
Eelis
Index: libstdc++-v3/include/bits/stl_algo.h
===
--- libstdc++-v3/include/bits/stl_algo.h (revision 235680)
+++ libstdc++-v3/include/bits/stl_algo.h (working copy)
@@ -3738,12 +3738,40 @@
_DistanceType;
typedef typename std::make_unsigned<_DistanceType>::type __ud_type;
- typedef typename std::uniform_int_distribution<__ud_type> __distr_type;
- typedef typename __distr_type::param_type __p_type;
- __distr_type __d;
+ typedef typename std::remove_reference<_UniformRandomNumberGenerator>::type _Gen;
+ typedef typename std::common_type::type __uc_type;
- for (_RandomAccessIterator __i = __first + 1; __i != __last; ++__i)
- std::iter_swap(__i, __first + __d(__g, __p_type(0, __i - __first)));
+ const __uc_type __urngrange =
+ _Gen::max() - _Gen::min() + 1; // +1 because the generator range is inclusive
+
+ const __uc_type __urange = __uc_type(__last - __first);
+
+ if (__urngrange >= __urange)
+ {
+ const __uc_type __scaling = __urngrange / __urange;
+ const __uc_type __past = __urange * __scaling;
+
+ for (_RandomAccessIterator __i = __first; __i != __last; ++__i)
+ {
+ __uc_type __j;
+ do
+ {
+ __j = __uc_type(__g()) - _Gen::min();
+ }
+ while (__j >= __past);
+
+ std::iter_swap(__i, __first + __j / __scaling);
+ }
+ }
+ else
+ {
+ typedef typename std::uniform_int_distribution<__ud_type> __distr_type;
+ typedef typename __distr_type::param_type __p_type;
+ __distr_type __d;
+
+for (_RandomAccessIterator __i = __first + 1; __i != __last; ++__i)
+ std::iter_swap(__i, __first + __d(__g, __p_type(0, __i - __first)));
+ }
}
#endif
Re: [patch] libstdc++: Make std::shuffle faster by avoiding std::uniform_int_distribution
Please ignore this, I made the error described here:
https://en.wikipedia.org/wiki/Fisher%E2%80%93Yates_shuffle#Implementation_errors
:)
On 2016-04-30 21:15, Eelis wrote:
Hi,
The attached patch makes std::shuffle about 33% faster for the following
testcase:
#include
#include
#include
int main()
{
std::mt19937 gen;
std::vector v;
v.reserve(1);
for (int i = 0; i != 1; ++i)
{
v.push_back(i);
std::shuffle(v.begin(), v.end(), gen);
}
std::cout << v.front() << '\n';
}
It achieves this by avoiding std::uniform_int_distribution when the generator's
range is large enough, which is almost always the case. This helps a lot,
because
std::uniform_int_distribution::op() recomputes scaling factors every time.
Thoughts?
Thanks,
Eelis
Re: [PATCH] Improve detection of constant conditions during jump threading
`On Fri, Apr 29, 2016 at 3:15 PM, Jeff Law wrote:
> On 04/19/2016 11:50 AM, Patrick Palka wrote:
>
>> 1. This patch introduces a "regression" in gcc.dg/tree-ssa/ssa-thread-11.c
>> in that we no longer perform FSM threading during vrp2 but instead we
>> detect two new jump threading opportunities during vrp1. Not sure if
>> the new code is better but it is shorter. I wonder how this should be
>> resolved...
>
> Definitely not a regression. As you note we thread two jumps earlier
> utilizing your new code. With the old code we're dependent upon other
> simplifications occurring which eventually exposes the FSM threads that the
> test is checking for in vrp2.
>
> I think we just want to remove the test for FSM jump threads in VRP2. We get
> coverage for your test via ssa-thread-14. That should just leave the
> verification that we do not have irreducible loops at the end of VRP2 in
> ssa-thread-11. I'll make that change.
>
> I do see what appears to be a missed jump thread, but that's not affected
> positively or negatively by your change. There's a reasonable chance it's
> only exposed by normal thread jumps in VRP2 and since we don't iterate, it's
> left in the IL. I haven't analyzed it in detail, but my hope is that when I
> pull the backwards threading out into its own pass that we'll start picking
> up more of these secondary effects.
Interesting info. I also spotted another minor optimization
opportunity within this test case, although more related to vrp than
to jump threading. It would require iterating over the use statements
of a subexpression within a conditional, and it turns out that VRP
already does this so it's only a matter of adding another case to test
for during each iteration. I'll post a patch when it's ready.
>
>
>>
>> gcc/ChangeLog:
>>
>> * tree-ssa-threadedge.c (simplify_control_stmt_condition): Split
>> out into ...
>> (simplify_control_stmt_condition_1): ... here. Recurse into
>> BIT_AND_EXPRs and BIT_IOR_EXPRs.
>>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.dg/tree-ssa/ssa-thread-14.c: New test.
>> ---
>
> I fixed a few formatting nits (too long lines).
>
>
>> +
>> + if (res1 != NULL_TREE && res2 != NULL_TREE)
>> + {
>> + if (rhs_code == BIT_AND_EXPR
>> + && TYPE_PRECISION (TREE_TYPE (op0)) == 1
>> + && integer_nonzerop (res1)
>> + && integer_nonzerop (res2))
>> + {
>> + /* If A != 0 and B != 0 then (bool)(A | B) != 0 is true.
>> */
>> + if (cond_code == NE_EXPR)
>> + return one_cst;
>> + /* If A != 0 and B != 0 then (bool)(A | B) == 0 is
>> false. */
>> + if (cond_code == EQ_EXPR)
>> + return zero_cst;
>
> I think you wanted (A & B) in the two immediately preceding comments, which
> I fixed.
>
>
> I suspect there's other stuff we could do in this space, but you've probably
> covered the most important cases.
>
>> + /* Handle (A CMP B) CMP 0. */
>> + else if (TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt))
>> + == tcc_comparison)
>> + {
>> + tree rhs1 = gimple_assign_rhs1 (def_stmt);
>> + tree rhs2 = gimple_assign_rhs2 (def_stmt);
>> +
>> + tree_code new_cond = gimple_assign_rhs_code (def_stmt);
>> + if (cond_code == EQ_EXPR)
>> + new_cond = invert_tree_comparison (new_cond, false);
>> +
>> + tree res
>> + = simplify_control_stmt_condition_1 (e, def_stmt,
>> avail_exprs_stack,
>> +rhs1, new_cond, rhs2,
>> +dummy_cond, simplify,
>> +
>> handle_dominating_asserts,
>> +limit - 1);
>> + if (res != NULL_TREE && is_gimple_min_invariant (res))
>> + return res;
>
> I was a bit confused by this case, but then realized that we already
> narrowed COND_CODE to EQ_EXPR/NE_EXPR.
>
> I made the minor edits noted above and committed the change.
Awesome, thanks for your help.
>
> Thanks,
> Jeff
New Chinese (simplified) PO file for 'gcc' (version 6.1.0)
Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Chinese (simplified) team of translators. The file is available at: http://translationproject.org/latest/gcc/zh_CN.po (This file, 'gcc-6.1.0.zh_CN.po', has just now been sent to you in a separate email.) All other PO files for your package are available in: http://translationproject.org/latest/gcc/ Please consider including all of these in your next release, whether official or a pretest. Whenever you have a new distribution with a new version number ready, containing a newer POT file, please send the URL of that distribution tarball to the address below. The tarball may be just a pretest or a snapshot, it does not even have to compile. It is just used by the translators when they need some extra translation context. The following HTML page has been updated: http://translationproject.org/domain/gcc.html If any question arises, please contact the translation coordinator. Thank you for all your work, The Translation Project robot, in the name of your translation coordinator.
Re: [Ada] Adjust ACATS testing
On Sat, Apr 30, 2016 at 10:21 AM, Eric Botcazou wrote:
>> Does this fix
>>
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=14435
>
> Surprisingly yes according to 'strace' because of this change:
>
> target_gnatchop () {
> - gnatchop --GCC="$GCC_DRIVER" $*
> + $BASE/gnatchop --GCC="$BASE/xgcc" $*
> }
>
> and the following trick implemented in gnatchop:
>
>-- Add the directory where gnatchop is invoked in front of the path, if
>-- gnatchop is invoked with directory information.
>
>declare
> Command : constant String := Command_Name;
>
>begin
> for Index in reverse Command'Range loop
> if Command (Index) = Directory_Separator then
> declare
>Absolute_Dir : constant String :=
> Normalize_Pathname
> (Command (Command'First .. Index));
>PATH : constant String :=
> Absolute_Dir
> & Path_Separator
> & Getenv ("PATH").all;
> begin
>Setenv ("PATH", PATH);
> end;
>
> exit;
> end if;
> end loop;
>end;
>
> so $BASE ends up added to the PATH by gnatchop and therefore $BASE/gnat1 ends
> up being invoked by $BASE/xgcc through the PATH...
Can you close PR 14435 now?
Thanks.
--
H.J.
[SH][committed] Simplify some predicates
Hi,
The attached patch mainly simplifies some of the predicates. There is
no functional change, except the removal of the "mov_nop" pattern,
which resulted in a few +- 4/8 byte code size changes in the CSiBE set,
which look like register allocation choices. But not sure what the
original purpose or intention of that pattern was...
Tested on sh-elf with
make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb,
-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}";
Committed as r235687.
Cheers,
Oleg
gcc/ChangeLog:
* config/sh/predicates.md (any_register_operand, zero_extend_operand,
logical_reg_operand): Delete.
(arith_operand, arith_reg_dest, arith_or_int_operand, cmpsi_operand,
arith_reg_or_0_operand, arith_reg_or_0_or_1_operand, logical_operand,
logical_and_operand, movsrc_no_disp_mem_operand): Rewrite using
match_operand and match_test.
(sh_const_vec, sh_1el_vec): Remove redundant checks. Declare local
variables on their first use. Return bool values.
* config/sh/sh.h (LOAD_EXTEND_OP): Update comment.
* config/sh/sh.md (andsi3, iorsi3): Use arith_reg_dest for result and
arith_reg_operand for input operand. Remove empty constraints.
(xorsi3): Delete.
(*xorsi3_compact): Rename to xorsi3.
(zero_extendsi2): Use arith_reg_operand for input operand.
(*zero_extendsi2_disp_mem): Update comment.
(mov_nop): Delete.diff --git a/gcc/config/sh/predicates.md b/gcc/config/sh/predicates.md
index e050213..3e69d88 100644
--- a/gcc/config/sh/predicates.md
+++ b/gcc/config/sh/predicates.md
@@ -17,29 +17,6 @@
;; along with GCC; see the file COPYING3. If not see
;;
Remove SH_DIV_CALL2
Build failed on sh-*-linux and sh-*-netbsd. Please update. diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h index 09e966b..6117b9d 100644 --- a/gcc/config/sh/linux.h +++ b/gcc/config/sh/linux.h @@ -117,13 +117,6 @@ along with GCC; see the file COPYING3. If not see #define DBX_REGISTER_NUMBER(REGNO) \ (((REGNO) == 16) ? 16 : SH_DBX_REGISTER_NUMBER (REGNO)) -/* Since libgcc is compiled with -fpic for this target, we can't use - __sdivsi3_1 as the division strategy for -O0 and -Os. */ -#undef SH_DIV_STRATEGY_DEFAULT -#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL2 -#undef SH_DIV_STR_FOR_SIZE -#define SH_DIV_STR_FOR_SIZE "call2" - /* Install the __sync libcalls. */ #undef TARGET_INIT_LIBFUNCS #define TARGET_INIT_LIBFUNCS sh_init_sync_libfuncs diff --git a/gcc/config/sh/netbsd-elf.h b/gcc/config/sh/netbsd-elf.h index e658018..c5c75a4 100644 --- a/gcc/config/sh/netbsd-elf.h +++ b/gcc/config/sh/netbsd-elf.h @@ -80,13 +80,6 @@ do \ }\ while (0) -/* Since libgcc is compiled with -fpic for this target, we can't use - __sdivsi3_1 as the division strategy for -O0 and -Os. */ -#undef SH_DIV_STRATEGY_DEFAULT -#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL2 -#undef SH_DIV_STR_FOR_SIZE -#define SH_DIV_STR_FOR_SIZE "call2" - #undef SUBTARGET_OVERRIDE_OPTIONS #define SUBTARGET_OVERRIDE_OPTIONS \ do \ -- Yoshinori Sato
Re: Remove SH_DIV_CALL2
On Sun, 2016-05-01 at 12:43 +0900, Yoshinori Sato wrote: > Build failed on sh-*-linux and sh-*-netbsd. > Please update. Thanks for spotting it and for the patch. I've committed it as r235688 on your behalf. Cheers, Oleg > > diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h > index 09e966b..6117b9d 100644 > --- a/gcc/config/sh/linux.h > +++ b/gcc/config/sh/linux.h > @@ -117,13 +117,6 @@ along with GCC; see the file COPYING3. If not > see > #define DBX_REGISTER_NUMBER(REGNO) \ >(((REGNO) == 16) ? 16 : SH_DBX_REGISTER_NUMBER (REGNO)) > > -/* Since libgcc is compiled with -fpic for this target, we can't use > - __sdivsi3_1 as the division strategy for -O0 and -Os. */ > -#undef SH_DIV_STRATEGY_DEFAULT > -#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL2 > -#undef SH_DIV_STR_FOR_SIZE > -#define SH_DIV_STR_FOR_SIZE "call2" > - > /* Install the __sync libcalls. */ > #undef TARGET_INIT_LIBFUNCS > #define TARGET_INIT_LIBFUNCS sh_init_sync_libfuncs > diff --git a/gcc/config/sh/netbsd-elf.h b/gcc/config/sh/netbsd-elf.h > index e658018..c5c75a4 100644 > --- a/gcc/config/sh/netbsd-elf.h > +++ b/gcc/config/sh/netbsd-elf.h > @@ -80,13 +80,6 @@ do > \ >} > \ > while (0) > > -/* Since libgcc is compiled with -fpic for this target, we can't use > - __sdivsi3_1 as the division strategy for -O0 and -Os. */ > -#undef SH_DIV_STRATEGY_DEFAULT > -#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL2 > -#undef SH_DIV_STR_FOR_SIZE > -#define SH_DIV_STR_FOR_SIZE "call2" > - > #undef SUBTARGET_OVERRIDE_OPTIONS > #define SUBTARGET_OVERRIDE_OPTIONS > \ >do > \ >
[SH][committed] Use TARGET_FPU_DOUBLE condition
Hi,
The attach patch simplifies the 'TARGET_SH4 || TARGET_SH2A_DOUBLE'
checks to 'TARGET_FPU_DOUBLE'.
Tested on sh-elf with
make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-mb,
-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}";
Committed as r235689.
Cheers,
Oleg
gcc/ChangeLog:
* config/sh/sh.h (TARGET_SH4): Remove and use default implementation.
(TARGET_FPU_DOUBLE): Simplify.
(BASE_ARG_REG, DOUBLE_TYPE_SIZE, OPTIMIZE_MODE_SWITCHING): Replace
'TARGET_SH4 || TARGET_SH2A_DOUBLE' conditions with 'TARGET_FPU_DOUBLE'.
* config/sh/sh.c: Replace 'TARGET_SH4 || TARGET_SH2A_DOUBLE' conditions
with 'TARGET_FPU_DOUBLE'.
* config/sh/sh.md: Likewise.diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index b37d3ab..cddb31c 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -6821,7 +6821,7 @@ push (int rn)
x = gen_push_fpul ();
else if (rn == FPSCR_REG)
x = gen_push_fpscr ();
- else if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD
+ else if (TARGET_FPU_DOUBLE && TARGET_FMOVD
&& ! TARGET_FPU_SINGLE && FP_OR_XD_REGISTER_P (rn))
{
if (FP_REGISTER_P (rn) && (rn - FIRST_FP_REG) & 1)
@@ -6847,7 +6847,7 @@ pop (int rn)
x = gen_pop_fpul ();
else if (rn == FPSCR_REG)
x = gen_pop_fpscr ();
- else if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD
+ else if (TARGET_FPU_DOUBLE && TARGET_FMOVD
&& ! TARGET_FPU_SINGLE && FP_OR_XD_REGISTER_P (rn))
{
if (FP_REGISTER_P (rn) && (rn - FIRST_FP_REG) & 1)
@@ -6991,12 +6991,11 @@ calc_live_regs (HARD_REG_SET *live_regs_mask)
nosave_low_regs = lookup_attribute ("nosave_low_regs", attrs) != NULL_TREE;
CLEAR_HARD_REG_SET (*live_regs_mask);
- if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD && interrupt_handler
+ if (TARGET_FPU_DOUBLE && TARGET_FMOVD && interrupt_handler
&& df_regs_ever_live_p (FPSCR_REG))
target_flags &= ~MASK_FPU_SINGLE;
/* If we can save a lot of saves by switching to double mode, do that. */
- else if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD
- && TARGET_FPU_SINGLE)
+ else if (TARGET_FPU_DOUBLE && TARGET_FMOVD && TARGET_FPU_SINGLE)
for (count = 0, reg = FIRST_FP_REG; reg <= LAST_FP_REG; reg += 2)
if (df_regs_ever_live_p (reg) && df_regs_ever_live_p (reg+1)
&& (! call_really_used_regs[reg]
@@ -7058,7 +7057,7 @@ calc_live_regs (HARD_REG_SET *live_regs_mask)
SET_HARD_REG_BIT (*live_regs_mask, reg);
count += GET_MODE_SIZE (REGISTER_NATURAL_MODE (reg));
- if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD
+ if (TARGET_FPU_DOUBLE && TARGET_FMOVD
&& GET_MODE_CLASS (REGISTER_NATURAL_MODE (reg)) == MODE_FLOAT)
{
if (FP_REGISTER_P (reg))
@@ -7543,7 +7542,7 @@ sh_builtin_saveregs (void)
fpregs = copy_to_mode_reg (Pmode,
plus_constant (Pmode, XEXP (regbuf, 0),
n_floatregs * UNITS_PER_WORD));
- if (TARGET_SH4 || TARGET_SH2A_DOUBLE)
+ if (TARGET_FPU_DOUBLE)
{
rtx mem;
for (regno = NPARM_REGS (DFmode) - 2; regno >= first_floatreg; regno -= 2)
@@ -7796,7 +7795,7 @@ sh_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
}
}
- if (TARGET_SH4 || TARGET_SH2A_DOUBLE)
+ if (TARGET_FPU_DOUBLE)
{
pass_as_float = ((TREE_CODE (eff_type) == REAL_TYPE && size <= 8)
|| (TREE_CODE (eff_type) == COMPLEX_TYPE
@@ -8020,7 +8019,7 @@ sh_round_reg (const CUMULATIVE_ARGS& cum, machine_mode mode)
function as is. Make this more readable. */
return
(((TARGET_ALIGN_DOUBLE
- || ((TARGET_SH4 || TARGET_SH2A_DOUBLE)
+ || (TARGET_FPU_DOUBLE
&& (mode == DFmode || mode == DCmode)
&& cum.arg_count[(int) SH_ARG_FLOAT] < NPARM_REGS (mode)))
&& GET_MODE_UNIT_SIZE (mode) > UNITS_PER_WORD)
@@ -8065,7 +8064,7 @@ sh_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode,
int words = 0;
if (sh_pass_in_reg_p (*cum, mode, type)
- && !(TARGET_SH4 || TARGET_SH2A_DOUBLE)
+ && !TARGET_FPU_DOUBLE
&& (sh_round_reg (*cum, mode)
+ (mode != BLKmode
? CEIL (GET_MODE_SIZE (mode), UNITS_PER_WORD)
@@ -9187,8 +9186,7 @@ sh_legitimate_address_p (machine_mode mode, rtx x, bool strict)
return true;
if (GET_MODE_SIZE (mode) <= 4
- || ((TARGET_SH4 || TARGET_SH2A_DOUBLE)
- && TARGET_FMOVD && mode == DFmode))
+ || (TARGET_FPU_DOUBLE && TARGET_FMOVD && mode == DFmode))
{
if (MAYBE_BASE_REGISTER_RTX_P (xop1, strict)
&& MAYBE_INDEX_REGISTER_RTX_P (xop0, strict))
@@ -9373,7 +9371,7 @@ sh_legitimize_address (rtx x, rtx oldx, machine_mode mode)
if (flag_pic)
x = legitimize_pic_address (oldx, mode, NULL_RTX);
- if (((TARGET_SH4 || TARGET_SH2A_DOUBLE) && mode == DFmode)
+ if ((TARGET_FPU_DOUBLE && mode == DFmode)
|| (TARGET_SH2E && mode == SFmode))
return x;
@@ -10732,8 +10730,7 @@ sh_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
if (mode == SFmode
|| mode ==
Re: [rs6000] Fix 32-bit bootstrap failure
On Sat, Apr 30, 2016 at 11:51:15AM +0200, Eric Botcazou wrote: > it's the recurring issue documented in rs6000_expand_ternop_builtin: > > Note that a switch statement instead of the sequence of tests > would be incorrect as many of the CODE_FOR values could be > CODE_FOR_nothing and that would yield multiple alternatives > with identical values. > > Bootstrapped on PowerPC/Linux, OK for the mainline? Thanks for finding and fixing it! Please apply. Segher > 2016-04-30 Eric Botcazou > > * config/rs6000/rs6000.c (altivec_expand_lv_builtin): Do not use > switch statement on instruction code. Remove trailing spaces. > (altivec_expand_stv_builtin): Likewise.
