Re: Fix alias.c wrt aliases and anchors
> > Well, to me "weaker" means "makes more conservative assumptions", > which in this context would be assuming a conflict in cases where > the old code didn't (i.e. returning -1 more often). I'm not sure > whether the first patch was strictly weaker in that sense, since > if the symbol_refs were not equal according to rtx_equal_for_memref_p, > the old code would fall through to the end of the function and return -1. > > >> I agree there are other refinements you can do on top of that, > >> e.g. that two block symbols in different blocks can never conflict. > >> But the patch seems to be treating anchors as an exception to the rule, > >> whereas I think they're just one instance of the rule. > > > > Can you think of some testcase? > > Not a specific one, sorry, but it seems like the kind of thing that > could happen with extra ABI-mandated constructs. > > But maybe the lack of a specific testcase is a good thing. If in practice > anchors make up the vast majority of cases where (a) SYMBOL_REF_DECL > is null and (b) XSTR is too weak, there should no harm in relying on > the old XSTR comparison for the non-anchor null-decl cases. > > > Doing XSTR==XSTR test and assuming a conflict otherwise will cause a > > conflict between > > every external variable read/write and static variable read/write as one > > will be anchored > > and other not. > > Yeah, I think handling anchors is a good thing. It just seems that > logically the correctness fix is to replace: > > /* Label and normal symbol are never the same. */ > if (x_decl != y_decl) > return 0; > return offset_overlap_p (c, xsize, ysize); > > with something like: > > if (XSTR (x, 0) == XSTR (y, 0)) > return offset_overlap_p (c, xsize, ysize); > /* Symbols might conflict. */ > return -1; > > Handling anchors would then be a very useful optimisation on top of that. Ah, OK, now I get your point :) Yep, I have no problem beling conservative for non-anchor cases !SYMBOL_REF_DECL case. Pretty much all cases that matter are IMO either anchors or SYMBOL_REF_DECL != NULL. (i.e. user variables). I will update the patch and also look into the Alpha AND issues. Honza > > Thanks, > Richard
Re: Fix alias.c wrt aliases and anchors
Hello!
>> Yeah, I think handling anchors is a good thing. It just seems that
>> logically the correctness fix is to replace:
>>
>> /* Label and normal symbol are never the same. */
>>if (x_decl != y_decl)
>>return 0;
>> return offset_overlap_p (c, xsize, ysize);
>>
>> with something like:
>>
>> if (XSTR (x, 0) == XSTR (y, 0))
>>return offset_overlap_p (c, xsize, ysize);
>> /* Symbols might conflict. */
>> return -1;
>>
>> Handling anchors would then be a very useful optimisation on top of that.
>
> Ah, OK, now I get your point :)
> Yep, I have no problem beling conservative for non-anchor cases
> !SYMBOL_REF_DECL case.
> Pretty much all cases that matter are IMO either anchors or SYMBOL_REF_DECL
> != NULL.
> (i.e. user variables).
>
> I will update the patch and also look into the Alpha AND issues.
I have another version of the patch that deals with AND addresses in
testing, please see attached. The difference from the previous patch
is:
@@ -2339,6 +2337,12 @@ memrefs_conflict_p (int xsize, rtx x, int ysize, r
/* If both decls are the same, decide by offsets. */
if (cmp == 1)
return offset_overlap_p (c, xsize, ysize);
+ /* Assume a potential overlap for symbolic addresses that went
+through alignment adjustments (i.e., that have negative
+sizes), because we can't know how far they are from each
+other. */
+ if (xsize < 0 || ysize < 0)
+ return -1;
/* If decls are different or we know by offsets that there is no overlap,
we win. */
if (!cmp || !offset_overlap_p (c, xsize, ysize))
So, we simply return unknown from memrefs_conflict_p when realignment
is in play.
(We still need early return for AND addresses in base_alias_check, though).
Uros.
Index: alias.c
===
--- alias.c (revision 231971)
+++ alias.c (working copy)
@@ -2046,8 +2046,6 @@ compare_base_decls (tree base1, tree base2)
ret = symtab_node::get_create (base1)->equal_address_to
(symtab_node::get_create (base2), true);
- if (ret == 2)
-return -1;
return ret;
}
@@ -2088,17 +2086,6 @@ base_alias_check (rtx x, rtx x_base, rtx y, rtx y_
if (rtx_equal_p (x_base, y_base))
return 1;
- if (GET_CODE (x_base) == SYMBOL_REF && GET_CODE (y_base) == SYMBOL_REF)
-{
- tree x_decl = SYMBOL_REF_DECL (x_base);
- tree y_decl = SYMBOL_REF_DECL (y_base);
-
- /* We can assume that no stores are made to labels. */
- if (!x_decl || !y_decl)
- return 0;
- return compare_base_decls (x_decl, y_decl) != 0;
-}
-
/* The base addresses are different expressions. If they are not accessed
via AND, there is no conflict. We can bring knowledge of object
alignment into play here. For example, on alpha, "char a, b;" can
@@ -2117,6 +2104,17 @@ base_alias_check (rtx x, rtx x_base, rtx y, rtx y_
|| (int) GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1
return 1;
+ if (GET_CODE (x_base) == SYMBOL_REF && GET_CODE (y_base) == SYMBOL_REF)
+{
+ tree x_decl = SYMBOL_REF_DECL (x_base);
+ tree y_decl = SYMBOL_REF_DECL (y_base);
+
+ /* We can assume that no stores are made to labels. */
+ if (!x_decl || !y_decl)
+ return 0;
+ return compare_base_decls (x_decl, y_decl) != 0;
+}
+
/* Differing symbols not accessed via AND never alias. */
if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
return 0;
@@ -2339,6 +2337,12 @@ memrefs_conflict_p (int xsize, rtx x, int ysize, r
/* If both decls are the same, decide by offsets. */
if (cmp == 1)
return offset_overlap_p (c, xsize, ysize);
+ /* Assume a potential overlap for symbolic addresses that went
+through alignment adjustments (i.e., that have negative
+sizes), because we can't know how far they are from each
+other. */
+ if (xsize < 0 || ysize < 0)
+ return -1;
/* If decls are different or we know by offsets that there is no overlap,
we win. */
if (!cmp || !offset_overlap_p (c, xsize, ysize))
Index: symtab.c
===
--- symtab.c(revision 231971)
+++ symtab.c(working copy)
@@ -1877,7 +1877,7 @@ symtab_node::nonzero_address ()
/* Return 0 if symbol is known to have different address than S2,
Return 1 if symbol is known to have same address as S2,
- return 2 otherwise.
+ return -1 otherwise.
If MEMORY_ACCESSED is true, assume that both memory pointer to THIS
and S2 is going to be accessed. This eliminates the situations when
@@ -1941,7 +1941,7 @@ symtab_node::equal_address_to (symtab_node *s2, bo
/* If both symbols may resolve to NULL, we can not really prove them
different. */
if (!memory_accessed && !nonzero_address () && !s2->nonzero_address ())
-return 2;
+return -1;
/* Except
Re: [PATCH, i386, AVX-512] Split out mask version for vec_extract_hi_.
Hello,
On 02 Dec 20:00, Kirill Yukhin wrote:
> Hello,
> On 30 Nov 13:46, Kirill Yukhin wrote:
> > Hello,
> > Patch in the bottom splits masked version of vec_extract_hi_
> > to block AVX-1512VL insn generation for KNL and cures ICE on
> > spec2k6/450.soplex.
> >
> > Bootstrapped and regtesed.
> >
> > If no objections - I'll commit on Wednesday.
> >
> > gcc/
> > * config/i386/sse.md (define_insn "vec_extract_hi__maskm"):
> > Remove "prefix_extra".
> > (define_insn "vec_extract_hi__mask"): New.
> > (define_insn "vec_extract_hi_"): Remove masking.
> > gcc/testsuite/
> > * gcc.target/i386/avx512vl-vextractf32x4-1.c: Fix scan pattern.
Similar patch is needed to make spec2k6/465.tonto working for gcc-5.
Is patch in the bottom ok for gcc-5-branch if bootstrapped and regtested?
It cures spec2k6/465.tonto illegal insn emit.
--
Thanks, K
commit 3d5942b7d30d173d7d44ceb657b6ba93212cf0af
Author: kyukhin
Date: Wed Dec 2 11:07:42 2015 +
AVX-512. Split out mask version for vec_extract_hi_.
gcc/
* config/i386/sse.md (define_insn "vec_extract_hi__maskm"):
New.
(define_insn "vec_extract_hi__mask"): New.
(define_insn "vec_extract_hi_"): Remove masking.
gcc/testsuite/
* gcc.target/i386/avx512vl-vextractf64x2-1.c: Fix scan pattern.
* gcc.target/i386/avx512vl-vextracti64x2-1.c: Ditto.
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index dc7f6a7..6757e56 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -7018,28 +7018,50 @@
DONE;
})
-(define_insn "vec_extract_hi_"
- [(set (match_operand: 0 ""
"=v,")
+(define_insn "vec_extract_hi__maskm"
+ [(set (match_operand: 0 "memory_operand" "=m")
+ (vec_merge:
+ (vec_select:
+ (match_operand:VI8F_256 1 "register_operand" "v")
+ (parallel [(const_int 2) (const_int 3)]))
+ (match_operand: 2 "memory_operand" "0")
+ (match_operand: 3 "register_operand" "k")))]
+ "TARGET_AVX512DQ && TARGET_AVX512VL
+ && rtx_equal_p (operands[2], operands[0])"
+ "vextract64x2\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}"
+ [(set_attr "type" "sselog1")
+ (set_attr "length_immediate" "1")
+ (set_attr "prefix" "evex")
+ (set_attr "mode" "")])
+
+(define_insn "vec_extract_hi__mask"
+ [(set (match_operand: 0 "register_operand" "=v")
+ (vec_merge:
+ (vec_select:
+ (match_operand:VI8F_256 1 "register_operand" "v")
+ (parallel [(const_int 2) (const_int 3)]))
+ (match_operand: 2 "vector_move_operand" "0C")
+ (match_operand: 3 "register_operand" "Yk")))]
+ "TARGET_AVX512VL && TARGET_AVX512DQ"
+ "vextract64x2\t{$0x1, %1, %0%{%3%}%N2|%0%{%3%}%N2, %1, 0x1}"
+ [(set_attr "type" "sselog1")
+ (set_attr "length_immediate" "1")
+ (set_attr "prefix" "evex")
+ (set_attr "mode" "")])
+
+(define_insn "vec_extract_hi_"
+ [(set (match_operand: 0 "nonimmediate_operand" "=xm, vm")
(vec_select:
- (match_operand:VI8F_256 1 "register_operand" "v,v")
+ (match_operand:VI8F_256 1 "register_operand" "x, v")
(parallel [(const_int 2) (const_int 3)])))]
- "TARGET_AVX && && "
-{
- if (TARGET_AVX512VL)
- {
-if (TARGET_AVX512DQ)
- return "vextract64x2\t{$0x1, %1,
%0|%0, %1, 0x1}";
-else
- return "vextract32x4\t{$0x1, %1, %0|%0, %1, 0x1}";
- }
- else
-return "vextract\t{$0x1, %1, %0|%0, %1, 0x1}";
-}
- [(set_attr "type" "sselog")
- (set_attr "prefix_extra" "1")
+ "TARGET_AVX"
+ "@
+vextract\t{$0x1, %1, %0|%0, %1, 0x1}
+vextract64x2\t{$0x1, %1, %0|%0, %1, 0x1}"
+ [(set_attr "isa" "*, avx512dq")
+ (set_attr "prefix" "vex, evex")
+ (set_attr "type" "sselog1")
(set_attr "length_immediate" "1")
- (set_attr "memory" "none,store")
- (set_attr "prefix" "vex")
(set_attr "mode" "")])
(define_split
diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-1.c
b/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-1.c
index c8cce51..dd7e30b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512dq-vextractf64x2-1.c
@@ -3,7 +3,7 @@
/* { dg-final { scan-assembler-times "vextractf64x2\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+.{7}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vextractf64x2\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+.{7}\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vextractf64x2\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+.{7}\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vextractf64x2\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vextractf(?:128|64x2)\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vextractf64x2\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vextractf64x2\[
\\t\]+\[^\{\n\]*%ymm\[
[PTX] more predicates
This patch renames nvptx_reg_or_mem_operand to nvptx_nonimmediate_operand, to
match the conventional nonimmediate_operand predicate. I also relax the
call_operation predicate to permit any reg -- there's no need toprohibit
passing stack_pointer, frame_pointer or arg_pointer.
nathan
2015-12-28 Nathan Sidwell
* config/nvptx/nvptx.c (nvptx_output_call_insn): Expect hard regs.
* config/nvptx/nvptx.md (nvptx_reg_or_mem_operand): Rename to ...
(nvptx_nonimmediate_operand): ... here. Update all uses.
(call_insn_operand): Use REG_P.
(call_operation): Allow hard regs.
Index: gcc/config/nvptx/nvptx.c
===
--- gcc/config/nvptx/nvptx.c (revision 231971)
+++ gcc/config/nvptx/nvptx.c (working copy)
@@ -1808,14 +1808,14 @@ nvptx_output_call_insn (rtx_insn *insn,
{
rtx t = XEXP (XVECEXP (pat, 0, argno), 0);
machine_mode mode = GET_MODE (t);
+ const char *ptx_type = nvptx_ptx_type_from_mode (mode, false);
/* Mode splitting has already been done. */
- fprintf (asm_out_file, "\t\t.param%s %%out_arg%d%s;\n",
- nvptx_ptx_type_from_mode (mode, false), argno,
- mode == QImode || mode == HImode ? "[1]" : "");
- fprintf (asm_out_file, "\t\tst.param%s [%%out_arg%d], %%r%d;\n",
- nvptx_ptx_type_from_mode (mode, false), argno,
- REGNO (t));
+ fprintf (asm_out_file, "\t\t.param%s %%out_arg%d;\n"
+ "\t\tst.param%s [%%out_arg%d], ",
+ ptx_type, argno, ptx_type, argno);
+ output_reg (asm_out_file, REGNO (t), VOIDmode);
+ fprintf (asm_out_file, ";\n");
}
fprintf (asm_out_file, "\t\tcall ");
Index: gcc/config/nvptx/nvptx.md
===
--- gcc/config/nvptx/nvptx.md (revision 231971)
+++ gcc/config/nvptx/nvptx.md (working copy)
@@ -69,7 +69,7 @@
return register_operand (op, mode);
})
-(define_predicate "nvptx_reg_or_mem_operand"
+(define_predicate "nvptx_nonimmediate_operand"
(match_code "mem,reg")
{
return (REG_P (op) ? register_operand (op, mode)
@@ -104,7 +104,7 @@
(define_predicate "call_insn_operand"
(match_code "symbol_ref,reg")
{
- return GET_CODE (op) != SYMBOL_REF || SYMBOL_REF_FUNCTION_P (op);
+ return REG_P (op) || SYMBOL_REF_FUNCTION_P (op);
})
;; Return true if OP is a call with parallel USEs of the argument
@@ -118,11 +118,7 @@
{
rtx elt = XVECEXP (op, 0, i);
- if (GET_CODE (elt) != USE
- || GET_CODE (XEXP (elt, 0)) != REG
- || XEXP (elt, 0) == frame_pointer_rtx
- || XEXP (elt, 0) == arg_pointer_rtx
- || XEXP (elt, 0) == stack_pointer_rtx)
+ if (GET_CODE (elt) != USE || !REG_P (XEXP (elt, 0)))
return false;
}
return true;
@@ -237,7 +233,7 @@
(define_insn "zero_extendqihi2"
[(set (match_operand:HI 0 "nvptx_register_operand" "=R,R")
- (zero_extend:HI (match_operand:QI 1 "nvptx_reg_or_mem_operand" "R,m")))]
+ (zero_extend:HI (match_operand:QI 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.u16.u%T1\\t%0, %1;
@@ -246,7 +242,7 @@
(define_insn "zero_extendsi2"
[(set (match_operand:SI 0 "nvptx_register_operand" "=R,R")
- (zero_extend:SI (match_operand:QHIM 1 "nvptx_reg_or_mem_operand" "R,m")))]
+ (zero_extend:SI (match_operand:QHIM 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.u32.u%T1\\t%0, %1;
@@ -255,7 +251,7 @@
(define_insn "zero_extenddi2"
[(set (match_operand:DI 0 "nvptx_register_operand" "=R,R")
- (zero_extend:DI (match_operand:QHSIM 1 "nvptx_reg_or_mem_operand" "R,m")))]
+ (zero_extend:DI (match_operand:QHSIM 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.u64.u%T1\\t%0, %1;
@@ -264,7 +260,7 @@
(define_insn "extendsi2"
[(set (match_operand:SI 0 "nvptx_register_operand" "=R,R")
- (sign_extend:SI (match_operand:QHIM 1 "nvptx_reg_or_mem_operand" "R,m")))]
+ (sign_extend:SI (match_operand:QHIM 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.s32.s%T1\\t%0, %1;
@@ -273,7 +269,7 @@
(define_insn "extenddi2"
[(set (match_operand:DI 0 "nvptx_register_operand" "=R,R")
- (sign_extend:DI (match_operand:QHSIM 1 "nvptx_reg_or_mem_operand" "R,m")))]
+ (sign_extend:DI (match_operand:QHSIM 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.s64.s%T1\\t%0, %1;
@@ -281,7 +277,7 @@
[(set_attr "subregs_ok" "true")])
(define_insn "trunchiqi2"
- [(set (match_operand:QI 0 "nvptx_reg_or_mem_operand" "=R,m")
+ [(set (match_operand:QI 0 "nvptx_nonimmediate_operand" "=R,m")
(truncate:QI (match_operand:HI 1 "nvptx_register_operand" "R,R")))]
""
"@
@@ -290,7 +286,7 @@
[(set_attr "subregs_ok" "true")])
(define_insn "truncsi2"
- [(set (match_operand:QHIM 0 "nvptx_reg_or_mem_operand" "=R,m")
+ [(set (match_operand:QHIM 0 "nvptx_nonimmediate_operand" "=R,m")
(truncate:QHIM (match_operand:SI 1 "nvptx_register_operand" "R,R")))]
""
"@
@@ -299,7 +295,7 @@
[(set_attr "su
[gomp4] Simplify function discarding
I noticed that the code dealing with bind and nohost clauses in
execute_oacc_device_lower looked like:
#ifdef ACCEL_COMPILER
ten lines of 'f(BIND)'
#endif
#ifndef ACCEL_COMPILER
ten lines of 'f(NOHOST)'
#endif
Simplified to the attached, which reduces the cut and paste, as well as moving
this check to after we've determined it's something applicable to offloading.
nathan
2015-12-28 Nathan Sidwell
* omp-low.c (maybe_discard_oacc_function): New simplification
broken out of ...
(execte_oacc_device_lower): ... here. Call it.
Index: gcc/omp-low.c
===
--- gcc/omp-low.c (revision 231972)
+++ gcc/omp-low.c (working copy)
@@ -19973,6 +19973,28 @@ default_goacc_reduction (gcall *call)
gsi_replace_with_seq (&gsi, seq, true);
}
+/* Determine whether DECL should be discarded in this offload
+ compilation. */
+
+static bool
+maybe_discard_oacc_function (tree decl)
+{
+ tree attr = lookup_attribute ("omp declare target", DECL_ATTRIBUTES (decl));
+
+ if (!attr)
+return false;
+
+ enum omp_clause_code kind = OMP_CLAUSE_NOHOST;
+
+#ifdef ACCEL_COMPILER
+ kind = OMP_CLAUSE_BIND;
+#endif
+ if (find_omp_clause (TREE_VALUE (attr), kind))
+return true;
+
+ return false;
+}
+
/* Main entry point for oacc transformations which run on the device
compiler after LTO, so we know what the target device is at this
point (including the host fallback). */
@@ -19980,74 +20002,19 @@ default_goacc_reduction (gcall *call)
static unsigned int
execute_oacc_device_lower ()
{
- /* There are offloaded functions without an "omp declare target" attribute,
- so we'll not handle these here, but on the other hand, OpenACC bind and
- nohost clauses can only be generated in the front ends, and an "omp
- declare target" attribute will then also always have been set there, so
- this is not a problem in practice. */
- tree attr = lookup_attribute ("omp declare target",
-DECL_ATTRIBUTES (current_function_decl));
-
-#if defined(ACCEL_COMPILER)
- /* In an offload compiler, discard any offloaded function X that is tagged
- with an OpenACC bind(Y) clause: all references to X have been rewritten to
- refer to Y; X is unreachable, do not compile it. */
- if (attr)
-{
- tree clauses = TREE_VALUE (attr);
- /* TODO: device_type handling. */
- tree clause_bind = find_omp_clause (clauses, OMP_CLAUSE_BIND);
- if (clause_bind)
- {
- tree clause_bind_name = OMP_CLAUSE_BIND_NAME (clause_bind);
- const char *bind_name = TREE_STRING_POINTER(clause_bind_name);
- if (dump_file)
- fprintf (dump_file,
- "Discarding function \"%s\" with \"bind(%s)\" clause.\n",
- IDENTIFIER_POINTER (DECL_NAME (current_function_decl)),
- bind_name);
- TREE_ASM_WRITTEN (current_function_decl) = 1;
- return TODO_discard_function;
- }
-}
-#endif /* ACCEL_COMPILER */
-#if !defined(ACCEL_COMPILER)
- /* In the host compiler, discard any offloaded function that is tagged with
- an OpenACC nohost clause. */
- if (attr)
-{
- tree clauses = TREE_VALUE (attr);
- if (find_omp_clause (clauses, OMP_CLAUSE_NOHOST))
- {
- /* There are no construct/clause combinations that could make this
- happen, but play it safe, and verify that we never discard a
- function that is stored in offload_funcs, used for target/offload
- function mapping. */
- if (flag_checking)
- {
- bool found = false;
- for (unsigned i = 0;
- !found && i < vec_safe_length (offload_funcs);
- i++)
- if ((*offload_funcs)[i] == current_function_decl)
- found = true;
- gcc_assert (!found);
- }
-
- if (dump_file)
- fprintf (dump_file,
- "Discarding function \"%s\" with \"nohost\" clause.\n",
- IDENTIFIER_POINTER (DECL_NAME (current_function_decl)));
- TREE_ASM_WRITTEN (current_function_decl) = 1;
- return TODO_discard_function;
- }
-}
-#endif /* !ACCEL_COMPILER */
-
- attr = get_oacc_fn_attrib (current_function_decl);
+ tree attr = get_oacc_fn_attrib (current_function_decl);
if (!attr)
/* Not an offloaded function. */
return 0;
+
+ if (maybe_discard_oacc_function (current_function_decl))
+{
+ if (dump_file)
+ fprintf (dump_file, "Discarding function\n");
+ TREE_ASM_WRITTEN (current_function_decl) = 1;
+ return TODO_discard_function;
+}
+
int dims[GOMP_DIM_MAX];
int fn_level = oacc_validate_dims (current_function_decl, attr, dims);
Re: [PATCH, i386, AVX-512] Split out mask version for vec_extract_hi_.
On Mon, Dec 28, 2015 at 04:17:02PM +0300, Kirill Yukhin wrote: > Hello, > On 02 Dec 20:00, Kirill Yukhin wrote: > > Hello, > > On 30 Nov 13:46, Kirill Yukhin wrote: > > > Hello, > > > Patch in the bottom splits masked version of vec_extract_hi_ > > > to block AVX-1512VL insn generation for KNL and cures ICE on > > > spec2k6/450.soplex. > > > > > > Bootstrapped and regtesed. > > > > > > If no objections - I'll commit on Wednesday. > > > > > > gcc/ > > > * config/i386/sse.md (define_insn "vec_extract_hi__maskm"): > > > Remove "prefix_extra". > > > (define_insn "vec_extract_hi__mask"): New. > > > (define_insn "vec_extract_hi_"): Remove masking. > > > gcc/testsuite/ > > > * gcc.target/i386/avx512vl-vextractf32x4-1.c: Fix scan pattern. > Similar patch is needed to make spec2k6/465.tonto working for gcc-5. > Is patch in the bottom ok for gcc-5-branch if bootstrapped and regtested? > It cures spec2k6/465.tonto illegal insn emit. Can you add a runtime testcase that would fail without the patch and succeed with it? Perhaps add some asms etc. to force the operands to look similarly for RA purposes. The patch is ok with or without that testcase, though the testcase would be greatly appreciated. Jakub
Re: [PATCH, rs6000] Add support for lxvx and stxvx P9 instructions
On Sun, Dec 27, 2015 at 6:00 PM, Bill Schmidt wrote: > Hi, > > POWER9 adds endian-neutral load and store vector instructions that > support unaligned accesses. This allows more efficient code generation > than POWER8. With these new instructions, we no longer generate the > load-swap and swap-store sequences, and we no longer need to perform > swap optimization to get rid of unnecessary swaps. We also need to make > sure that we don't perform P8-specific vector load fusion sequences when > the new instructions are available. > > This patch includes two tests that verify the correct instructions are > generated with -mcpu=power9. One of these generates a pattern that > causes P8-specific vector load fusion with -mcpu=power8, and verifies we > don't generate it with -mcpu=power9. > > Besides these tests, I hand-tested all the swaps-p8* tests to verify > correct generation of lxvx and stxvx rather than the old P8 sequences. > > Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no > regressions. Ok for trunk, and then for backport to GCC 5? > > Thanks, > Bill > > > [gcc] > > 2015-12-27 Bill Schmidt > > * config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Verify that > this is never called when lxvx/stxvx are available. > (pass_analyze_swaps::gate): Don't perform swap optimization when > lxvx/stxvx are available. > * config/rs6000/vector.md (mov): Don't call > rs6000_emit_le_vsx_move when lxvx/stxvx are available. > * config/rs6000/vsx.md (*p9_vecload_): New define_insn. > (*p9_vecstore_): Likewise. > (*vsx_le_perm_load_:VSX_LE): Disable when lxvx/stxvx are > available. > (*vsx_le_perm_load_:VSX_W): Likewise. > (*vsx_le_perm_load_v8hi): Likewise. > (*vsx_le_perm_load_v16qi): Likewise. > (*vsx_le_perm_store_:VSX_LE): Likewise. > ([related define_splits]): Likewise. > (*vsx_le_perm_store_:VSX_W): Likewise. > ([related define_splits]): Likewise. > (*vsx_le_perm_store_v8hi): Likewise. > ([related define_splits]): Likewise. > (*vsx_le_perm_store_v16qi): Likewise. > ([related define_splits]): Likewise. > (*vsx_lxvd2x2_le_): Likewise. > (*vsx_lxvd2x4_le_): Likewise. > (*vsx_lxvd2x8_le_V8HI): Likewise. > (*vsx_lvxd2x16_le_V16QI): Likewise. > (*vsx_stxvd2x2_le_): Likewise. > (*vsx_stxvd2x4_le_): Likewise. > (*vsx_stxvd2x8_le_V8HI): Likewise. > (*vsx_stxvdx16_le_V16QI): Likewise. > > [gcc/testsuite] > > 2015-12-27 Bill Schmidt > > * gcc.target/powerpc/p9-lxvx-stxvx-1.c: New. > * gcc.target/powerpc/p9-lxvx-stxvx-2.c: New. Okay for trunk. This isn't a bug fix, so GCC 5 will require more consideration. Thanks, David
[Patch, pr69011, fortran, v1] [6 Regression] [OOP] ICE in gfc_advance_chain for ALLOCATE with SOURCE
Hi all,
for bug pr69011 I like to propose the attached patch. The patch fixes
the ICE and furthermore makes sure, that for this case of referencing a
polymorphic object the correct vtype is selected. Previously the
declared vtype of the source=-expression was taken for the object(s) to
allocate. Now the actual vtype is taken, i.e., the vptr component of
source='s object is taken. This is important when source references a
subclass.
Bootstrapped and regtested ok on x86_64-pc-linux-gnu/f23.
Ok for trunk?
Regards,
Andre
--
Andre Vehreschild * Email: vehre ad gcc dot gnu dot org
gcc/testsuite/ChangeLog:
2015-12-28 Andre Vehreschild
* gfortran.dg/allocate_with_source_16.f90: New test.
gcc/fortran/ChangeLog:
2015-12-28 Andre Vehreschild
* trans-stmt.c (gfc_trans_allocate): Unwrap a NOP_EXPR to make sure
the actual type of the source=-expr is used when it is of class type.
Furthermore prevent an ICE.
diff --git a/gcc/fortran/trans-stmt.c b/gcc/fortran/trans-stmt.c
index 72416d4..3c6fae1 100644
--- a/gcc/fortran/trans-stmt.c
+++ b/gcc/fortran/trans-stmt.c
@@ -5377,7 +5377,20 @@ gfc_trans_allocate (gfc_code * code)
if (code->ext.alloc.arr_spec_from_expr3 || code->expr3->rank != 0)
gfc_conv_expr_descriptor (&se, code->expr3);
else
- gfc_conv_expr_reference (&se, code->expr3);
+ {
+ gfc_conv_expr_reference (&se, code->expr3);
+
+ /* gfc_conv_expr_reference wraps POINTER_PLUS_EXPR in a
+ NOP_EXPR, which prevents gfortran from getting the vptr
+ from the source=-expression. Remove the NOP_EXPR and go
+ with the POINTER_PLUS_EXPR in this case. */
+ if (code->expr3->ts.type == BT_CLASS
+ && TREE_CODE (se.expr) == NOP_EXPR
+ && TREE_CODE (TREE_OPERAND (se.expr, 0))
+ == POINTER_PLUS_EXPR)
+ //&& ! GFC_CLASS_TYPE_P (TREE_TYPE (se.expr)))
+ se.expr = TREE_OPERAND (se.expr, 0);
+ }
/* Create a temp variable only for component refs to prevent
having to go through the full deref-chain each time and to
simplfy computation of array properties. */
@@ -5494,7 +5507,6 @@ gfc_trans_allocate (gfc_code * code)
expr3 may be a temporary array declaration, therefore check for
GFC_CLASS_TYPE_P before trying to get the _vptr component. */
if (tmp != NULL_TREE
- && TREE_CODE (tmp) != POINTER_PLUS_EXPR
&& (e3_is == E3_DESC
|| (GFC_CLASS_TYPE_P (TREE_TYPE (tmp))
&& (VAR_P (tmp) || !code->expr3->ref))
diff --git a/gcc/testsuite/gfortran.dg/allocate_with_source_16.f90 b/gcc/testsuite/gfortran.dg/allocate_with_source_16.f90
new file mode 100644
index 000..cb5f16f
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/allocate_with_source_16.f90
@@ -0,0 +1,76 @@
+! { dg-do run }
+! Test the fix for pr69011, preventing an ICE and making sure
+! that the correct dynamic type is used.
+!
+! Contributed by Thomas Koenig
+!Andre Vehreschild
+!
+
+module m1
+implicit none
+private
+public :: basetype
+
+type:: basetype
+ integer :: i
+ contains
+endtype basetype
+
+abstract interface
+endinterface
+
+endmodule m1
+
+module m2
+use m1, only : basetype
+implicit none
+integer, parameter :: I_P = 4
+
+private
+public :: factory, exttype
+
+type, extends(basetype) :: exttype
+ integer :: i2
+ contains
+endtype exttype
+
+type :: factory
+ integer(I_P) :: steps=-1
+ contains
+procedure, pass(self), public :: construct
+endtype factory
+contains
+
+ function construct(self, previous)
+ class(basetype), intent(INOUT) :: previous(1:)
+ class(factory), intent(IN) :: self
+ class(basetype), pointer :: construct
+ allocate(construct, source=previous(self%steps))
+ endfunction construct
+endmodule m2
+
+ use m2
+ use m1
+ class(factory), allocatable :: c1
+ class(exttype), allocatable :: prev(:)
+ class(basetype), pointer :: d
+
+ allocate(c1)
+ allocate(prev(2))
+ prev(:)%i = [ 2, 3]
+ prev(:)%i2 = [ 5, 6]
+ c1%steps= 1
+ d=> c1%construct(prev)
+
+ if (.not. associated(d) ) call abort()
+ select type (d)
+class is (exttype)
+ if (d%i2 /= 5) call abort()
+class default
+ call abort()
+ end select
+ if (d%i /= 2) call abort()
+ deallocate(c1)
+ deallocate(prev)
+ deallocate(d)
+end
[PATCH] [libiberty] Tweak the documentation of libiberty's xcrc32 function
In some places the xcrc32 documentation refers to GDB's own crc32
implementation, but GDB no longer has its own crc32 implementation.
It now uses libiberty's xcrc32 throughout. So this patch removes
these references to GDB's now-nonexistent crc32 implementation.
Also, there appears to be a bug in the table-generation program embedded
within the documentation. When the variable "int i" is >= 128, the
computation "i << 24" shifts a one bit into the sign bit (assuming a
32-bit int), which is UB. To avoid this UB, I think it is sufficient to
make the induction variables i and j have type unsigned int. This bug
seems latent, however. I ran the program before and after this change
and the table output is the same.
libiberty/ChangeLog:
* crc32.c: In the documentation, don't refer to GDB's
now-nonexistent crc32 implementation. In the table-generation
program embedded within the documentation, change the type of
the induction variables i and j from int to unsigned int, to
avoid UB.
---
libiberty/crc32.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/libiberty/crc32.c b/libiberty/crc32.c
index 12d9be0..52c982f 100644
--- a/libiberty/crc32.c
+++ b/libiberty/crc32.c
@@ -33,15 +33,14 @@
#include "libiberty.h"
-/* This table was generated by the following program. This matches
- what gdb does.
+/* This table was generated by the following program.
#include
int
main ()
{
- int i, j;
+ unsigned int i, j;
unsigned int c;
int table[256];
@@ -146,10 +145,9 @@ starting value is @var{init}; this may be used to compute
the CRC of
data split across multiple buffers by passing the return value of each
call as the @var{init} parameter of the next.
-This is intended to match the CRC used by the @command{gdb} remote
-protocol for the @samp{qCRC} command. In order to get the same
-results as gdb for a block of data, you must pass the first CRC
-parameter as @code{0x}.
+This is used by the @command{gdb} remote protocol for the @samp{qCRC}
+command. In order to get the same results as gdb for a block of data,
+you must pass the first CRC parameter as @code{0x}.
This CRC can be specified as:
--
2.7.0.rc1.98.gacf58d0.dirty
Re: [Patch, pr69011, fortran, v1] [6 Regression] [OOP] ICE in gfc_advance_chain for ALLOCATE with SOURCE
Hi Andre, for bug pr69011 I like to propose the attached patch. The patch fixes the ICE and furthermore makes sure, that for this case of referencing a polymorphic object the correct vtype is selected. Previously the declared vtype of the source=-expression was taken for the object(s) to allocate. Now the actual vtype is taken, i.e., the vptr component of source='s object is taken. This is important when source references a subclass. Bootstrapped and regtested ok on x86_64-pc-linux-gnu/f23. Ok for trunk? The patch also solves the original problem. OK for trunk, and thanks a lot for the patch! Thomas
Re: Another C++11 experimental thing...
On 12/27/2015 11:30 AM, Jonathan Wakely wrote: I think we should change the language in the c++0x_warning.h: Agreed, OK for trunk and gcc-5-branch, thanks. N.B. s/Ramove/Remove/ in the changelog. Done, Here are the patch and CL as applied to trunk and gcc-5. Thanks, Ed Index: include/bits/c++0x_warning.h === --- include/bits/c++0x_warning.h(revision 231922) +++ include/bits/c++0x_warning.h(working copy) @@ -29,9 +29,9 @@ #define _CXX0X_WARNING_H 1 #if __cplusplus < 201103L -#error This file requires compiler and library support for the \ -ISO C++ 2011 standard. This support is currently experimental, and must be \ -enabled with the -std=c++11 or -std=gnu++11 compiler options. +#error This file requires compiler and library support \ +for the ISO C++ 2011 standard. This support must be enabled \ +with the -std=c++11 or -std=gnu++11 compiler options. #endif #endif 2015-12-27 Edward Smith-Rowland <3dw...@verizon.net> * include/bits/c++0x_warning.h Remove experimental language.
Re: [PATCH] [libiberty] Tweak the documentation of libiberty's xcrc32 function
On Mon, Dec 28, 2015 at 9:08 AM, Patrick Palka wrote: > > libiberty/ChangeLog: > > * crc32.c: In the documentation, don't refer to GDB's > now-nonexistent crc32 implementation. In the table-generation > program embedded within the documentation, change the type of > the induction variables i and j from int to unsigned int, to > avoid UB. This is OK. Thanks. Ian
[PATCH] Fix failure of gfortran.dg/backtrace_1.f90 on hppa*-*-hpux*
The hppa*-*-hpux* target does not support __sync builtins. As a result,
libbacktrace does not
support backtraces when threads are active.
Instead of always assuming threads are active in
libgfortran/runtime/backtrace.c, the attached
patch uses __gthread_active_p() to determine whether threads are active or not.
In addition,
if backtrace_create_state returns NULL, we just return from show_backtrace().
This avoids a
segmentation fault when threads are active.
This fixes the failure of gfortran.dg/backtrace_1.f90 on hpux.
Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
Okay for trunk?
Dave
--
John David Anglin dave.ang...@bell.net
2015-12-28 John David Anglin
PR libfortran/68744
* runtime/backtrace.c: Include gthr.h.
(show_backtrace): Use __gthread_active_p() to determine whether threads
are active. Return if lbstate is NULL.
Index: runtime/backtrace.c
===
--- runtime/backtrace.c (revision 231814)
+++ runtime/backtrace.c (working copy)
@@ -24,6 +24,8 @@
#include "libgfortran.h"
+#include
+
#include
#include
#include
@@ -137,8 +139,12 @@
struct backtrace_state *lbstate;
struct mystate state = { 0, false, in_signal_handler };
- lbstate = backtrace_create_state (NULL, 1, error_callback, NULL);
+ lbstate = backtrace_create_state (NULL, __gthread_active_p (),
+ error_callback, NULL);
+ if (lbstate == NULL)
+return;
+
if (!BACKTRACE_SUPPORTED || (in_signal_handler && BACKTRACE_USES_MALLOC))
{
/* If symbolic backtrace is not supported on this target, or would
[PATCH] Fix math transformation on targets without c99 math functions
The attach change fixes PR middle-end/68743 on hppa*-*-hpux*. In compiling c99_functions.c in libgfortran, floor ((double)x) was transformed to floorf(x) but floorf is not available on hppa*-*-hpux*. The change simply adds a libc_has_function check to prevent the transformation. Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11. Okay for trunk? Dave -- John David Anglin dave.ang...@bell.net 2015-12-28 John David Anglin PR middle-end/68743 * match.pd: Require target has function_c99_math_complex before doing truncl(extend(x)) and trunc(extend(x)) -> extend(truncf(x)), etc. Index: match.pd === --- match.pd(revision 231669) +++ match.pd(working copy) @@ -2784,7 +2784,8 @@ BUILT_IN_RINTF BUILT_IN_RINTF) /* truncl(extend(x)) and trunc(extend(x)) -> extend(truncf(x)), etc., if x is a float. */ - (if (optimize && canonicalize_math_p ()) + (if (optimize && canonicalize_math_p () + && targetm.libc_has_function (function_c99_math_complex)) (simplify (froms (convert float_value_p@0)) (convert (tos @0)
[committed] Fix failure of gcc.dg/torture/pr67609.c on hppa*-*-hpux*
This fixes unsupported alignment.
Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
Dave
--
John David Anglin dave.ang...@bell.net
2015-12-28 John David Anglin
* gcc.dg/torture/pr67609.c: Add -fno-common option on hppa*-*-hpux*.
Index: gcc.dg/torture/pr67609.c
===
--- gcc.dg/torture/pr67609.c(revision 231698)
+++ gcc.dg/torture/pr67609.c(working copy)
@@ -1,4 +1,5 @@
/* { dg-do run } */
+/* { dg-options "-fno-common" { target hppa*-*-hpux* } } */
typedef union
{
Re: [gomp4] Simplify function discarding
On 12/28/15 08:46, Nathan Sidwell wrote:
I noticed that the code dealing with bind and nohost clauses in
execute_oacc_device_lower looked like:
Forgot the testsuite tweak that went along with the change.
nathan
2015-12-28 Nathan Sidwell
* c-c++-common/goacc/routine-nohost-1.c: Adjust expected dump output.
Index: gcc/testsuite/c-c++-common/goacc/routine-nohost-1.c
===
--- gcc/testsuite/c-c++-common/goacc/routine-nohost-1.c (revision 231972)
+++ gcc/testsuite/c-c++-common/goacc/routine-nohost-1.c (working copy)
@@ -9,9 +9,6 @@ int THREE(void)
return 3;
}
-/* { dg-final { scan-tree-dump "Discarding function .THREE. with .nohost. clause" "oaccdevlow" } } */
-
-
#pragma acc routine nohost
extern void NOTHING(void);
@@ -19,9 +16,6 @@ void NOTHING(void)
{
}
-/* { dg-final { scan-tree-dump "Discarding function .NOTHING. with .nohost. clause" "oaccdevlow" } } */
-
-
extern float ADD(float, float);
#pragma acc routine (ADD) nohost
@@ -31,4 +25,4 @@ float ADD(float x, float y)
return x + y;
}
-/* { dg-final { scan-tree-dump "Discarding function .ADD. with .nohost. clause" "oaccdevlow" } } */
+/* { dg-final { scan-tree-dump-times "Discarding function" 3 "oaccdevlow" } } */
[committed] Skip gcc.dg/pr49551.c on hppa*-*-hpux*
Skip due to lack of function sections on 32-bit hpux targets.
dave
--
John David Anglin dave.ang...@bell.net
2015-12-28 John David Anglin
* gcc.dg/pr49551.c: Skip on hppa*-*-hpux*.
Index: gcc.dg/pr49551.c
===
--- gcc.dg/pr49551.c(revision 231978)
+++ gcc.dg/pr49551.c(working copy)
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-O -fdata-sections" } */
-/* { dg-skip-if "-fdata-sections not supported" { nvptx-*-* } { "*" } { "" } }
*/
+/* { dg-skip-if "-fdata-sections not supported" { hppa*-*-hpux* nvptx-*-* } {
"*" } { "" } } */
int x = 1;
int x;
[committed] Fix failure of fortran.dg/coarray_40.f90 on hppa*-*-hpux*
On hppa*-*-hpux*, we need to link with libatomic to get "atomic" functions.
Fix is same as in
other tests.
Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
Committed to trunk.
Dave
--
John David Anglin dave.ang...@bell.net
2015-12-28 John David Anglin
* gfortran.dg/coarray_40.f90: Link with libatomic if available.
Index: gfortran.dg/coarray_40.f90
===
--- gfortran.dg/coarray_40.f90 (revision 231978)
+++ gfortran.dg/coarray_40.f90 (working copy)
@@ -1,5 +1,6 @@
! { dg-do run }
-! { dg-options "-fcoarray=lib -lcaf_single" }
+! { dg-options "-fcoarray=lib -lcaf_single -latomic" { target
libatomic_available } }
+! { dg-options "-fcoarray=lib -lcaf_single" { target { ! libatomic_available }
} }
!
! Run-time test for memory consistency
!
Re: [committed] Fix failure of fortran.dg/coarray_40.f90 on hppa*-*-hpux*
On Mon, Dec 28, 2015 at 04:19:47PM -0500, John David Anglin wrote:
> On hppa*-*-hpux*, we need to link with libatomic to get "atomic" functions.
> Fix is same as in
> other tests.
>
> Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
>
> Committed to trunk.
>
> Dave
> --
> John David Anglin dave.ang...@bell.net
>
>
> 2015-12-28 John David Anglin
>
> * gfortran.dg/coarray_40.f90: Link with libatomic if available.
>
> Index: gfortran.dg/coarray_40.f90
> ===
> --- gfortran.dg/coarray_40.f90(revision 231978)
> +++ gfortran.dg/coarray_40.f90(working copy)
> @@ -1,5 +1,6 @@
> ! { dg-do run }
> -! { dg-options "-fcoarray=lib -lcaf_single" }
> +! { dg-options "-fcoarray=lib -lcaf_single -latomic" { target
> libatomic_available } }
> +! { dg-options "-fcoarray=lib -lcaf_single" { target { ! libatomic_available
> } } }
> !
> ! Run-time test for memory consistency
> !
That is undesirable, please use
! { dg-options "-fcoarray=lib -lcaf_single" }
! { dg-additional-options "-latomic" { target libatomic_available } }
instead.
Jakub
Re: [PATCH] Fix PR66848 by enforcing 16-bit alignment on darwin
On Dec 22, 2015, at 9:08 AM, Jack Howarth wrote: > This bug doesn't exist in the more recent boehm-gc 7.2 or > later releases. Until the exact change from 6.6 to 7.2 that suppresses > this bug is identified or FSF gcc's boehm-gc is rebased on the 7.2 > version or later, the simple fix to suppress this issue on darwin is > to enforce 16-bit alignment in boehm-gc/include/private/gcconfig.h for > that target. It would be nice to just pull in 7.2 (or just the latest release)… seems like that should be easier to maintain to me. > Okay for gcc trunk and back ports to gcc-5-branch and gcc-4_9-branch? I’d like to punt the approval to a libboehm person, though, not sure we have any. Just checked we don’t have an official maintainer listed. :-( Do we have anybody that wants to review the patch or should I? Though I would prefer a new import of a newer library to fix the issue, I’m tempted to just approve the patch. Kinda don’t want to as any deviation makes importing a new library annoying. What do others think?
[PATCH] ia64: don't use dynamic relocations for local symbols
From: Sergei Trofimovich
Tested on the following example:
void * a[77] __attribute((visibility("hidden")));
void f(long o, void * v) { a[0x6eff - o + 66] = v; }
Before the patch generated code uses .GOT entry:
addl r14 = @ltoffx(a#), r1
ld8.mov r14 = [r14], a#
After the patch generated code uses static gprel relocation:
movl r14 = @gprel(a#)
add r14 = r1, r14
That way gcc will be able to compile glibc's ld: PR/60465
Bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60465
Signed-off-by: Sergei Trofimovich
---
gcc/config/ia64/ia64.c| 2 ++
gcc/config/ia64/predicates.md | 26 ++
2 files changed, 28 insertions(+)
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index f48cebc..6ea5072 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -1105,6 +1105,8 @@ ia64_expand_load_address (rtx dest, rtx src)
emit_insn (gen_load_fptr (dest, src));
else if (sdata_symbolic_operand (src, VOIDmode))
emit_insn (gen_load_gprel (dest, src));
+ else if (local_symbolic_operand64 (src, VOIDmode))
+emit_insn (gen_load_gprel64 (dest, src));
else
{
HOST_WIDE_INT addend = 0;
diff --git a/gcc/config/ia64/predicates.md b/gcc/config/ia64/predicates.md
index 2aa7a78..9c6951d 100644
--- a/gcc/config/ia64/predicates.md
+++ b/gcc/config/ia64/predicates.md
@@ -97,6 +97,32 @@
}
})
+;; True if OP refers to a local symbol +any large offset).
+;; To be encoded as:
+;; movl % = @gprel(symbol+offset)
+;; add % = %, gp
+(define_predicate "local_symbolic_operand64"
+ (match_code "symbol_ref,const")
+{
+ switch (GET_CODE (op))
+{
+case CONST:
+ op = XEXP (op, 0);
+ if (GET_CODE (op) != PLUS
+ || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
+ || GET_CODE (XEXP (op, 1)) != CONST_INT)
+ return false;
+ op = XEXP (op, 0);
+ /* FALLTHRU */
+
+case SYMBOL_REF:
+ return SYMBOL_REF_LOCAL_P (op);
+
+default:
+ gcc_unreachable ();
+}
+})
+
;; True if OP refers to a symbol in the small address area.
(define_predicate "small_addr_symbolic_operand"
(match_code "symbol_ref,const")
--
2.6.4
[PATCH, testsuite]: Disable gcc.target/i386/pr68473-1.c for 32bit x86 targets
Hello!
32bit x86 targets handle -mno-fp-ret-in-387 just fine, the value is
returned in integer registers instead. Attached patch disables the
test on 32bit targets.
2015-12-28 Uros Bizjak
* gcc.target/i386/pr68473-1.c: Add dg-do compile directive.
Tested on x86_64-linux-gnu {,-m32} and committed to mainline SVN.
Uros.
Index: gcc.target/i386/pr68473-1.c
===
--- gcc.target/i386/pr68473-1.c (revision 231971)
+++ gcc.target/i386/pr68473-1.c (working copy)
@@ -1,3 +1,4 @@
+/* { dg-do compile { target { ! ia32 } } } */
/* { dg-options "-fdiagnostics-show-caret -mno-fp-ret-in-387" } */
extern long double fminl (long double __x, long double __y);
[PATCH][PING][PR 67425] Fix docs for -frandom-seed
Hi all,
this patch reverts invalid documentation change -frandom-seed which was
introduced by myself in r216773 a year ago.
I've checked the generated man and the only test for -frandom-seed
(gcc.dg/pr61868.c).
Ok for trunk? I also want to backport to GCC5 branch.
-Yura
>From 23f8c38f593a18c5783949f7c2225b49685fedfc Mon Sep 17 00:00:00 2001
From: Yury Gribov
Date: Fri, 25 Dec 2015 13:57:28 +0300
Subject: [PATCH] Fix docs for -frandom-seed to allow string arguments.
2015-12-25 Yury Gribov
PR driver/67425
* common.opt (frandom-seed): Fix parameter name.
* doc/invoke.texi (frandom-seed): Ditto.
---
gcc/common.opt | 2 +-
gcc/doc/invoke.texi | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/common.opt b/gcc/common.opt
index 23f394d..1f0daf0 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -1909,7 +1909,7 @@ Common Var(common_deferred_options) Defer
frandom-seed=
Common Joined RejectNegative Var(common_deferred_options) Defer
--frandom-seed= Make compile reproducible using .
+-frandom-seed= Make compile reproducible using .
; This switch causes the command line that was used to create an
; object file to be recorded into the object file. The exact format
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 4e2cf8f..ff14f70 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -364,7 +364,7 @@ Objective-C and Objective-C++ Dialects}.
-fmem-report -fpre-ipa-mem-report -fpost-ipa-mem-report -fprofile-arcs @gol
-fopt-info @gol
-fopt-info-@var{options}@r{[}=@var{file}@r{]} @gol
--frandom-seed=@var{number} -fsched-verbose=@var{n} @gol
+-frandom-seed=@var{string} -fsched-verbose=@var{n} @gol
-fsel-sched-verbose -fsel-sched-dump-cfg -fsel-sched-pipelining-verbose @gol
-fstack-usage -ftest-coverage -ftime-report -fvar-tracking @gol
-fvar-tracking-assignments -fvar-tracking-assignments-toggle @gol
@@ -7464,7 +7464,7 @@ the first option takes effect and the subsequent options are
ignored. Thus only @file{vec.miss} is produced which contains
dumps from the vectorizer about missed opportunities.
-@item -frandom-seed=@var{number}
+@item -frandom-seed=@var{string}
@opindex frandom-seed
This option provides a seed that GCC uses in place of
random numbers in generating certain symbol names
@@ -7473,7 +7473,7 @@ place unique stamps in coverage data files and the object files that
produce them. You can use the @option{-frandom-seed} option to produce
reproducibly identical object files.
-The @var{number} should be different for every file you compile.
+The @var{string} should be different for every file you compile.
@item -fsched-verbose=@var{n}
@opindex fsched-verbose
--
1.9.1
