[Patch Ping] Re: [C++/C Patch] Have -Wpointer-arith enable by -Wpedantic, as documented

[Paolo Carlini]

Hi,

On 4/5/13 12:07 AM, Paolo Carlini wrote:

Hi,

in the audit trail of c++/56815 Manuel noticed that, inconsistently 
with the documentation, a LangEnabledBy was missing for 
-Wpointer-arith vs -Wpedantic.


Then I noticed that a clean up was possible in the actual pedwarn 
calls, which, in fact, also fixes a bug: we don't want to actually 
emit such warnings for -Wpedantic -Wno-pointer-arith (as would happen 
before and after the trivial tweak above)

the C bits of this Patch are still unreviewed.

Thanks!
Paolo.

Re: [PATCH] VRP (x << 31) < -1 fix (PR tree-optimization/56984)

[Richard Biener]

On Thu, 18 Apr 2013, Jakub Jelinek wrote:

> Hi!
> 
> Like in the case a few lines below, if new_val is a minimum resp. a few
> lines below maximum value, we end up with always true resp. always false
> assertion, which VRP asserts that those aren't created.  So, we should punt
> on those, and instead fold-const or gimple_fold should ideally optimize
> those cases to false resp. true.
> 
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk/4.8
> branch?

Ok.

When VRP asserts that we don't build such assert stmts can it at that
point simply drop the assert?  That's more user-friendly (instead of
just ICEing ...) I think.

Thanks.
Richard.

> 2013-04-18  Jakub Jelinek  
> 
>   PR tree-optimization/56984
>   * tree-vrp.c (register_edge_assert_for_2): For (x >> M) < N
>   and (x >> M) >= N don't register any assertion if N << M is the
>   minimum value.
> 
>   * gcc.c-torture/compile/pr56984.c: New test.
> 
> --- gcc/tree-vrp.c.jj 2013-04-11 09:09:33.0 +0200
> +++ gcc/tree-vrp.c2013-04-17 09:17:34.278242462 +0200
> @@ -4895,7 +4895,13 @@ register_edge_assert_for_2 (tree name, e
> new_comp_code = comp_code == EQ_EXPR ? LE_EXPR : GT_EXPR;
>   }
> else if (comp_code == LT_EXPR || comp_code == GE_EXPR)
> - new_val = val2;
> + {
> +   double_int minval
> + = double_int::min_value (prec, TYPE_UNSIGNED (TREE_TYPE (val)));
> +   new_val = val2;
> +   if (minval == tree_to_double_int (new_val))
> + new_val = NULL_TREE;
> + }
> else
>   {
> double_int maxval
> --- gcc/testsuite/gcc.c-torture/compile/pr56984.c.jj  2013-04-17 
> 09:24:44.689719328 +0200
> +++ gcc/testsuite/gcc.c-torture/compile/pr56984.c 2013-04-17 
> 09:24:25.0 +0200
> @@ -0,0 +1,9 @@
> +/* PR tree-optimization/56984 */
> +
> +int
> +foo (int x)
> +{
> +  if ((x >> 31) < -1)
> +x++;
> +  return x;
> +}
> 
>   Jakub
> 
> 

-- 
Richard Biener 
SUSE / SUSE Labs
SUSE LINUX Products GmbH - Nuernberg - AG Nuernberg - HRB 16746
GF: Jeff Hawn, Jennifer Guild, Felix Imend

[Patch, Fortran, committed] PR56994 - invoke.texi: NEAREST's second argument isn't optional

[Tobias Burnus]

Committed as obvious to 4.7, 4.8 and the trunk. (Rev. 198048-198050).

Tobias
Index: gcc/fortran/ChangeLog
===
--- gcc/fortran/ChangeLog	(Revision 198047)
+++ gcc/fortran/ChangeLog	(Arbeitskopie)
@@ -1,3 +1,8 @@
+2013-04-18  Tobias Burnus  
+
+	PR fortran/56994
+	* invoke.texi (NEAREST): S argument is not optional.
+
 2013-04-17  Janus Weil  
 
 	PR fortran/56814
Index: gcc/fortran/intrinsic.texi
===
--- gcc/fortran/intrinsic.texi	(Revision 198047)
+++ gcc/fortran/intrinsic.texi	(Arbeitskopie)
@@ -9248,7 +9248,7 @@
 @item @emph{Arguments}:
 @multitable @columnfractions .15 .70
 @item @var{X} @tab Shall be of type @code{REAL}.
-@item @var{S} @tab (Optional) shall be of type @code{REAL} and
+@item @var{S} @tab Shall be of type @code{REAL} and
 not equal to zero.
 @end multitable
 

Re: [testsuite] Adding target nonpic to g++.dg/tm/pr47746.C

[Patrick Marlier]

Hi Alexander,

On Thu, Apr 11, 2013 at 11:37 AM, Alexander Ivchenko  wrote:
> The same motivation as for:
> http://gcc.gnu.org/ml/gcc-cvs/2013-03/msg00786.html
>
> "Since -fpic option is turned on by default in Android we have certain test
> fails. The reason for that is that those tests rely on the
> availability of functions, defined in them
> and with -fpic compiler conservatively assumes that they are
> AVAIL_OVERWRITABLE."
>
> In case of tm we have that in here:
>
> 4461|   /* If we aren't seeing the final version of the function we don't
> 4462|  know what it will contain at runtime.  */
> 4463|   if (cgraph_function_body_availability (node) < AVAIL_AVAILABLE)
> 4464+>return true;
> 4465|
>
> (gdb) p cgraph_function_body_availability (node)
> $54 = AVAIL_OVERWRITABLE
>
> and so we have a testfail for Android.


Where/how does it fails? (backtrace?) I cannot reproduce with -fpic on
linux/x86.

Actually the test is not supposed to fail even with pic. So maybe you
should open a PR.

Thanks,
--
Patrick Marlier

[wwwdocs, committed] gcc-4.9/changes.html - Update Fortran section (add NO_ARGS_CHECK)

[Tobias Burnus]

I have committed the attached patch, see 
http://gcc.gnu.org/gcc-4.9/changes.html


Tobias
Index: changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.9/changes.html,v
retrieving revision 1.4
diff -u -r1.4 changes.html
--- changes.html	12 Apr 2013 07:13:21 -	1.4
+++ changes.html	18 Apr 2013 08:03:44 -
@@ -22,9 +22,7 @@
 -->
 
 
-
 
 

Re: [PATCH ARM]Extend thumb1_reorg to save more comparison instructions

[Steven Bosscher]

On Thu, Apr 18, 2013 at 7:34 AM, Bin Cheng wrote:
> Hi,
> Before thumb1_reorg, ARM backend uses peephole to save comparison
> instructions when a flag setting move is found before branch instruction.
> Since we are using thumb1_reog now, it can be extended to catch more
> opportunities by searching flag setting move instruction before branch,
> rather than only the exact one before branch.
> For example:
>
> mov r0, r1
> //other insns does not kill r0
> branch if (r0 == 0)
> //other insns
>
> Tested on thumb1, is it OK?

Isn't this something you could use compare-elim.c for instead of a
target specific pass?

Ciao!
Steven

Unreviewed build/driver patch

[Rainer Orth]

The following patch has remained unreviewed for a week:

[build, driver] Support compressed debug sections
http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00679.html

It needs build and driver maintainers for review.

Thanks.
Rainer

-- 
-
Rainer Orth, Center for Biotechnology, Bielefeld University

[PATCH, SH] PR target/56995

[Christian Bruel]

Hello,

While checking the register classes definitions to fix this ICE, I
noticed that DF_HI_REGS seems to be always strictly equivalent to DF_REGS...

Indeed, we have:

/* DF_HI_REGS: Initialized TARGET_CONDITIONAL_REGISTER_USAGE.*/ 
  { 0x, 0x, 0x, 0x, 0xff00 },   
/* DF_REGS:  */ 
  { 0x, 0x, 0x, 0x, 0xff00 },

and with sh_conditional_register_usage

  for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0);
   regno <= LAST_FP_REG; regno += 2)
SET_HARD_REG_BIT (reg_class_contents[DF_HI_REGS], regno);

but the FP_REGS regno are already set ...

So, Just removing DF_HI_REGS seems to fix the issue with strictly same
performance results for SH4.

  No regressions in the testsuite for
sh-sim//-m2/
sh-sim//-m2a/
sh-sim//-m2a-nofpu/
sh-sim//-m2a-single/
sh-sim//-m2a-single-only/
sh-sim//-m3/
sh-sim//-m3e/
sh-sim//-m4/
sh-sim//-m4-single/
sh-sim//-m4-single-only/
sh-sim//-m4a/
sh-sim//-m4a-single/
sh-sim//-m4a-single-only/

 *[-mb,-ml]

 No performance regression for -m4

Hoping that I haven't missed something totally obvious with this class
duplication... I'll be glad to have your feedback.

The consequence of this it that find_costs_and_classes seems to be
confused when two register classes are strictly equivalent. Is it
plausible ?

note that experimentally, I tried to reset the DF_HI_REGS class
definition so it gets only the even registers set with
sh_conditional_register_usage. This is also functional but gives very
small worse code generation.

I also simplified the mfmovd.c test to check for hard_float.

Thanks a lot any other comments.

Christian





2013-04-18  Christian Bruel  

	PR target/56995
	* gcc.target/sh/mfmovd.c: Add new function and check hard_float.

2013-04-18  Christian Bruel  

	PR target/56995
	* config/sh/sh.h (enum reg_class): Remove DF_HI_REGS.
	(REG_CLASS_NAMES): Idem.
	(REG_CLASS_CONTENTS): Idem.
	(REGCLASS_HAS_FP_REG): Idem.
	* config/sh/sh.c (sh_cannot_change_mode_class): Idem.
	(sh_conditional_register_usage): Idem.

Index: gcc/testsuite/gcc.target/sh/mfmovd.c
===
--- gcc/testsuite/gcc.target/sh/mfmovd.c	(revision 197895)
+++ gcc/testsuite/gcc.target/sh/mfmovd.c	(working copy)
@@ -1,8 +1,9 @@
 /* Verify that we generate fmov.d instructions to move doubles when -mfmovd 
option is enabled.  */
 /* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-require-effective-target hard_float } */
 /* { dg-options "-mfmovd" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a" "-m2a-single" "-m4" "-m4-single" "-m4-100" "-m4-100-single" "-m4-200" "-m4-200-single" "-m4-300" "-m4-300-single" "-m4a" "-m4a-single" } }  */
+/* { dg-skip-if "" { "*-single-only" } { "" } }  */
 /* { dg-final { scan-assembler "fmov.d" } } */
 
 extern double g;
@@ -13,3 +14,9 @@ f (double d)
   g = d;
 }
 
+extern float h;
+
+void f2 ()
+{
+  h = g;
+}
Index: gcc/config/sh/sh.c
===
--- gcc/config/sh/sh.c	(revision 197895)
+++ gcc/config/sh/sh.c	(working copy)
@@ -12163,7 +12163,7 @@ sh_cannot_change_mode_class (enum machine_mode fro
   else
 	{
 	  if (GET_MODE_SIZE (from) < 8)
-	return reg_classes_intersect_p (DF_HI_REGS, rclass);
+	return reg_classes_intersect_p (DF_REGS, rclass);
 	}
 }
   return false;
@@ -13210,9 +13210,7 @@ sh_conditional_register_usage (void)
   call_really_used_regs[MACH_REG] = 0;
   call_really_used_regs[MACL_REG] = 0;
 }
-  for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0);
-   regno <= LAST_FP_REG; regno += 2)
-SET_HARD_REG_BIT (reg_class_contents[DF_HI_REGS], regno);
+
   if (TARGET_SHMEDIA)
 {
   for (regno = FIRST_TARGET_REG; regno <= LAST_TARGET_REG; regno ++)
Index: gcc/config/sh/sh.h
===
--- gcc/config/sh/sh.h	(revision 197895)
+++ gcc/config/sh/sh.h	(working copy)
@@ -984,7 +984,6 @@ enum reg_class
   GENERAL_REGS,
   FP0_REGS,
   FP_REGS,
-  DF_HI_REGS,
   DF_REGS,
   FPSCR_REGS,
   GENERAL_FP_REGS,
@@ -1010,7 +1009,6 @@ enum reg_class
   "GENERAL_REGS",	\
   "FP0_REGS",		\
   "FP_REGS",		\
-  "DF_HI_REGS",		\
   "DF_REGS",		\
   "FPSCR_REGS",		\
   "GENERAL_FP_REGS",	\
@@ -1046,8 +1044,6 @@ enum reg_class
   { 0x, 0x, 0x0001, 0x, 0x },	\
 /* FP_REGS:  */\
   { 0x, 0x, 0x, 0x, 0x },	\
-/* DF_HI_REGS:  Initialized in TARGET_CONDITIONAL_REGISTER_USAGE.  */	\
-  { 0x, 0x, 0x, 0x, 0xff00 },	\
 /* DF_REGS:  */\
   { 0x, 0x, 0x, 0x, 0xff00 },	\
 /* FPSCR_REGS:  */			\
@@ -1922,7 +1918,7 @@ struct sh_args {
 
 #define REGCLASS_HAS_FP_REG(CLASS) \
   ((CLASS) == FP0_REGS || (CLASS)

Re: [PATCH ARM]Extend thumb1_reorg to save more comparison instructions

[Richard Earnshaw]

On 18/04/13 09:20, Steven Bosscher wrote:

On Thu, Apr 18, 2013 at 7:34 AM, Bin Cheng wrote:

Hi,
Before thumb1_reorg, ARM backend uses peephole to save comparison
instructions when a flag setting move is found before branch instruction.
Since we are using thumb1_reog now, it can be extended to catch more
opportunities by searching flag setting move instruction before branch,
rather than only the exact one before branch.
For example:

mov r0, r1
//other insns does not kill r0
branch if (r0 == 0)
//other insns

Tested on thumb1, is it OK?


Isn't this something you could use compare-elim.c for instead of a
target specific pass?

Ciao!
Steven



I haven't looked at compare-elim, but probably not.  Thumb1 doesn't use 
cc1 and doesn't expose flag setting instructions in a MI manner (since 
add instructions clobber the flags).  As such it needs private back-end 
data to work out what's safe.

Re: [Patch, ARM] Enable libsanitizer

[Christophe Lyon]

On 4 April 2013 14:19, Christophe Lyon  wrote:
> ~/src/qemu/qemu-git/arm-linux-user/qemu-arm -cpu cortex-a9 -R 0 -L
> /home/lyon/src/GCC/builds/gcc-fsf-asan-arm-none-linux-gnueabihf/sysroot
>  ./heap-overflow-1.arm
>
> On 28 March 2013 15:33, Christophe Lyon  wrote:
 - libsanitizer detects if its output is a tty, and when GCC testsuite
 is executed under qemu, libsanitizer concludes that it is actually
 running under a tty, and adds beautyfying characters which confuse
 dejanu.
>>>
>>> Is this again a quemu problem?
>> I still don't know. I tried to investigate some time ago; I thought it
>> could be a problem when qemu interprets a ~isatty syscall, but IIRC
>> this syscall isn't used. So I don't know who finally asnwers to the
>> isatty() query.
>>
>
> After a bit more debugging, the libsanitizer query isatty(2) is
> handled by glibc as a call to __tcgetattr(2,...), which is turned into
> ioctl(2, TCGETS,...).
>
> Qemu issues the same query to the host, and I have observed that when
> called by expect, qemu's fd 2 points to /dev/pts/XXX which explains
> why it thinks it is a tty.
>
> So far I have haven't look at what actually happens when executed on a
> board, but why would expect behave differently?
>

After debugging on ARM hardware, I noticed that in this latter case,
runtest uses "unix" as target, and uses pipes to communicate with the
test program, while it creates ptys when using a simulator.
By adding the "readonly" flag in sim_spawn
(/usr/share/dejagnu/config/sim.exp) I managed to have these tests pass
under qemu, but I don't know if this is safe or if there is a better
way of achieving the same effect.

However, doing this makes other tests fail "harder": the tests
involving clone() fail when run under qemu, but when the "readonly"
flag is set, qemu sometimes fail in timeout rather than exiting with
an error code. Threads in general are not well supported by qemu
(there are other random failures in GCC testsuite related to this).

So maybe it would be better to skip asan tests when running under
qemu: is the GCC testsuite aware of being run under qemu?

Thanks for any suggestion.

Christophe.

RE: [PATCH ARM]Extend thumb1_reorg to save more comparison instructions

[Bin Cheng]

> -Original Message-
> From: Richard Earnshaw
> Sent: Thursday, April 18, 2013 5:25 PM
> To: Steven Bosscher
> Cc: Bin Cheng; gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH ARM]Extend thumb1_reorg to save more comparison
> instructions
> 
> On 18/04/13 09:20, Steven Bosscher wrote:
> > On Thu, Apr 18, 2013 at 7:34 AM, Bin Cheng wrote:
> >> Hi,
> >> Before thumb1_reorg, ARM backend uses peephole to save comparison
> >> instructions when a flag setting move is found before branch
instruction.
> >> Since we are using thumb1_reog now, it can be extended to catch more
> >> opportunities by searching flag setting move instruction before
> >> branch, rather than only the exact one before branch.
> >> For example:
> >>
> >> mov r0, r1
> >> //other insns does not kill r0
> >> branch if (r0 == 0)
> >> //other insns
> >>
> >> Tested on thumb1, is it OK?
> >
> > Isn't this something you could use compare-elim.c for instead of a
> > target specific pass?
> >
> > Ciao!
> > Steven
> >
> 
> I haven't looked at compare-elim, but probably not.  Thumb1 doesn't use
> cc1 and doesn't expose flag setting instructions in a MI manner (since add
> instructions clobber the flags).  As such it needs private back-end data
to
> work out what's safe.

Yes, so far the pass is disabled on ARM.

I have another question, would it be better for this pass be postponed to
late rtl phase, since it and scheduler (other passes) may meddle with each
other?

Thanks.

Re: [testsuite, i386] Reimplementing array comparison in avx2-vpop-check.h

[Alexander Ivchenko]

Yep, that also works.

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 64ffe8f..7efc3f1 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2013-04-18  Grigoriy Kraynov  
+
+   * gcc.target/i386/avx2-vpop-check.h: volatility is casted away in
+   memcmp().
+
 2013-04-18  Jakub Jelinek  

PR tree-optimization/56984
diff --git a/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
b/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
index 143b54da..02c879e 100644
--- a/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
+++ b/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
@@ -47,7 +47,7 @@ avx2_test (void)
   gen_pop ();
   check_pop ();

-  if (memcmp (c, c_ref, SIZE * sizeof (TYPE)))
+  if (memcmp (c, (void *) c_ref, SIZE * sizeof (TYPE)))
abort();
 }
 }


The fix is pretty obvious, but still.. is it OK for trunk?

thanks,
Alexander


2013/4/11 Richard Biener :
> On Thu, Apr 11, 2013 at 1:58 PM, Alexander Ivchenko  
> wrote:
>> Hi,
>>
>> Usually  does not include  but on bionic it is
>> historically included. memcmp() reacts on a volatile argument
>> differently, depending on whether  is included or not. If it
>> is included, then the compiler will generate a warning:
>> warning: passing argument 2 of 'memcmp' discards 'volatile' qualifier
>> from pointer target type [enabled by default]
>>
>> In avx2-vpop-check.h we compare two arrays using memcmp(), and since
>> one of them is declared as volatile we have test-fails because of that
>> warning. The following patch reimplements the comparison using just
>> for-loop:
>>
>> diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
>> index 943be90..9b08eb0 100644
>> --- a/gcc/testsuite/ChangeLog
>> +++ b/gcc/testsuite/ChangeLog
>> @@ -1,3 +1,7 @@
>> +2013-04-11  Grigoriy Kraynov  
>> +
>> +   * gcc.target/i386/avx2-vpop-check.h: memcmp() replaced by for loop.
>> +
>>  2013-04-11  Paolo Carlini  
>>
>> PR c++/54216
>> diff --git a/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
>> b/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
>> index 143b54da..921ed0b 100644
>> --- a/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
>> +++ b/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
>> @@ -47,7 +47,8 @@ avx2_test (void)
>>gen_pop ();
>>check_pop ();
>>
>> -  if (memcmp (c, c_ref, SIZE * sizeof (TYPE)))
>> -   abort();
>> +  for (i = 0; i < SIZE; ++i)
>> +if (c[i] != c_ref[i])
>> +  abort();
>>  }
>>  }
>>
>>
>> is it OK?
>
> Just cast away the volatileness?  memcmp (c, (void *)c_ref, ...)?
>
> Richard.
>
>> thanks,
>> Alexander

Re: [PATCH, tree-ssa] Avoid -Wuninitialized warning in try_unroll_loop_completely()

[Chung-Ju Wu]

2013/4/18 Jeff Law :
> On 04/15/2013 08:35 PM, Chung-Ju Wu wrote:
>>
>> I was using gcc-4.6.3, which is provided by Ubuntu 12.04,
>> and the warning is displayed during the compilation process.
>> As I tried to build another native gcc by myself with
>> current main trunk and used it to compile tree-ssa-loop-ivcanon.c again,
>> there is no such warning at all.
>> (See attachment for my console output.)
>>
>> So I am wondering if my patch is still valuable since
>> such false positive warning is already fixed on trunk.
>
> Thanks for checking on this stuff.  My preference would be to not add the
> initialization unless we're currently seeing false positive warnings with
> the trunk.
>
> Anytime we add a dummy initialization like this to avoid a false positive,
> we run the risk of missing real bugs later if the nearby code is changed in
> such a way as to expose an uninitialized use, which we'd like to catch, but
> can't if we're inserted a dummy initialization.
>
> Jeff
>

I see.  Leaving it unchanged indeed helps to catch possible bug
when nearby code is modified.

I will not commit this patch.
Thanks for the review and I did learn a lot from it! :)


Best regards,
jasonwucj

Re: [testsuite, i386] Reimplementing array comparison in avx2-vpop-check.h

[Uros Bizjak]

On Thu, Apr 18, 2013 at 12:10 PM, Alexander Ivchenko  wrote:
> Yep, that also works.
>
> diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
> index 64ffe8f..7efc3f1 100644
> --- a/gcc/testsuite/ChangeLog
> +++ b/gcc/testsuite/ChangeLog
> @@ -1,3 +1,8 @@
> +2013-04-18  Grigoriy Kraynov  
> +
> +   * gcc.target/i386/avx2-vpop-check.h: volatility is casted away in
> +   memcmp().
> +
>  2013-04-18  Jakub Jelinek  
>
> PR tree-optimization/56984
> diff --git a/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
> b/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
> index 143b54da..02c879e 100644
> --- a/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
> +++ b/gcc/testsuite/gcc.target/i386/avx2-vpop-check.h
> @@ -47,7 +47,7 @@ avx2_test (void)
>gen_pop ();
>check_pop ();
>
> -  if (memcmp (c, c_ref, SIZE * sizeof (TYPE)))
> +  if (memcmp (c, (void *) c_ref, SIZE * sizeof (TYPE)))
> abort();
>  }
>  }
>
>
> The fix is pretty obvious, but still.. is it OK for trunk?

Please add a short comment on the purpose of the cast.

OK with that change.

Thanks,
Uros.

Re: [testsuite] Adding target nonpic to g++.dg/tm/pr47746.C

[Alexander Ivchenko]

Hi Patrick,

I'm trying it on linux/x86_64 on trunk. Testing just by adding -fpic
to the dg-options:

--- a/gcc/testsuite/g++.dg/tm/pr47746.C
+++ b/gcc/testsuite/g++.dg/tm/pr47746.C
@@ -1,5 +1,5 @@
 // { dg-do compile }
-// { dg-options "-fgnu-tm" }
+// { dg-options "-fgnu-tm -fpic" }

Here is the error msg:

testsuite/g++.dg/tm/pr47746.C:20:14: error: unsafe function call 'void
Building::load(InputStream*)' within 'transaction_safe' function

And the backtrace:

#0  ipa_tm_diagnose_tm_safe (node=0x719a5940) at
src/gcc/gcc/trans-mem.c:4499
#1  0x00c6364b in ipa_tm_execute () at src/gcc/gcc/trans-mem.c:5323
#2  0x00b66bce in execute_one_pass (pass=0x1a46d00) at
src/gcc/gcc/passes.c:2331
#3  0x00b6787c in execute_ipa_pass_list (pass=0x1a46d00) at
src/gcc/gcc/passes.c:2688

in the code:
4499|  for (e = node->callees; e ; e = e->next_callee)
4500| if (!is_tm_callable (e->callee->symbol.decl)
4501| && e->callee->local.tm_may_enter_irr)
4502+>   error_at (gimple_location (e->call_stmt),
4503| "unsafe function call %qD within "
4504| "% function", e->callee->symbol.decl);

AFAIU, The eventual reason for that error_at, as I wrote before, is the check:

4461|   /* If we aren't seeing the final version of the function we don't
4462|  know what it will contain at runtime.  */
4463|   if (cgraph_function_body_availability (node) < AVAIL_AVAILABLE)
4464+>return true;
4465|

(gdb) p cgraph_function_body_availability (node)
$54 = AVAIL_OVERWRITABLE

Sure I can file a PR If you think that the test was not supposed to
fail with -fpic

thanks,
Alexander




2013/4/18 Patrick Marlier :
> Hi Alexander,
>
> On Thu, Apr 11, 2013 at 11:37 AM, Alexander Ivchenko  
> wrote:
>> The same motivation as for:
>> http://gcc.gnu.org/ml/gcc-cvs/2013-03/msg00786.html
>>
>> "Since -fpic option is turned on by default in Android we have certain test
>> fails. The reason for that is that those tests rely on the
>> availability of functions, defined in them
>> and with -fpic compiler conservatively assumes that they are
>> AVAIL_OVERWRITABLE."
>>
>> In case of tm we have that in here:
>>
>> 4461|   /* If we aren't seeing the final version of the function we don't
>> 4462|  know what it will contain at runtime.  */
>> 4463|   if (cgraph_function_body_availability (node) < AVAIL_AVAILABLE)
>> 4464+>return true;
>> 4465|
>>
>> (gdb) p cgraph_function_body_availability (node)
>> $54 = AVAIL_OVERWRITABLE
>>
>> and so we have a testfail for Android.
>
>
> Where/how does it fails? (backtrace?) I cannot reproduce with -fpic on
> linux/x86.
>
> Actually the test is not supposed to fail even with pic. So maybe you
> should open a PR.
>
> Thanks,
> --
> Patrick Marlier

Re: [PATCH ARM]Extend thumb1_reorg to save more comparison instructions

[Eric Botcazou]

> I haven't looked at compare-elim, but probably not.  Thumb1 doesn't use
> cc[0] and doesn't expose flag setting instructions in a MI manner (since
> add instructions clobber the flags).

compare-elim is supposed to be designed for this kind of targets, but of 
course you need to split the instructions after reload.

-- 
Eric Botcazou

Re: [PATCH, x86] Use vector moves in memmove expanding

[Michael Zolotukhin]

Hi,
Jan, thanks for the review, I hope to prepare an updated version of the patch
shortly.  Please see my answers to your comments below.

Uros, there is a question of a better approach for generation of wide moves.
Could you please comment it (see details in bullets 3 and 5)?

1.
> +static int smallest_pow2_greater_than (int);
>
> Perhaps it is easier to use existing 1< -  y_addr = gen_rtx_PLUS (Pmode, srcptr, copy_rtx (tmp));
> -  srcmem = change_address (srcmem, mode, y_addr);
> +  srcmem = offset_address (srcmem, copy_rtx (tmp), piece_size_n);
> +  srcmem = adjust_address (srcmem, mode, 0);
> ...
> This change looks OK and can go into manline independnetly. Just please 
> ensure that changing
> the way address is computed is not making us to preserve alias set. Memmove 
> can not rely on the alias
> set of the src/destination objects.
Could you explain it in more details?  Do you mean that at the beginning DST
and SRC could point to one memory location and have corresponding alias sets,
and I just change addresses they point to without invalidating alias sets?
I haven't thought about this, and that seems like a possible bug, but I guess
it could be simply fixed by calling change_address at the end.

3.
> +  /* Find the widest mode in which we could perform moves.
> + Start with the biggest power of 2 less than SIZE_TO_MOVE and half
> + it until move of such size is supported.  */
> +  piece_size = smallest_pow2_greater_than (size_to_move) >> 1;
> +  move_mode = mode_for_size (piece_size * BITS_PER_UNIT, MODE_INT, 0);
>
> I suppose this is a problem with SSE moves ending up in integer register, 
> since
> you get TImode rather than vectorized mode, like V8QImode in here.  Why not 
> stick
> with the original mode parmaeter?
Yes, here we choose TImode instead of a vector mode, but that actually was done
intentionally.  I tried several approaches here and decided that using the
widest integer mode is the best one for now.  We could try to find out a
particular (vector)mode in which we want to perform copying, but isn't it better
to rely on a machine-description here?  My idea here was to just request a copy
of, for instance, 128-bit piece (i.e. one TI-move) and leave it to the compiler
to choose the most optimal way of performing it.  Currently, the compiler thinks
that move of 128bits should be splitted into two moves of 64-bits (this
transformation is done in split2 pass) - if it's actually not so optimal, we
should fix it there, IMHO.

I think Uros could give me an advice on whether it's a reasonable approach or it
should be changed.

Also, I tried to avoid such fixes in this patch - that doesn't mean I'm not
going to work on the fixes, quite the contrary.  But it'd be easier to work on
them if we have a code in the trunk that could reveal the problem.

4.
> Doesn't this effectively kill support for TARGET_SINGLE_STRINGOP? It is 
> useful as
> size optimization.
Do you mean removing emit_strmov?  I don't think it'll kill anything, as new
emit_memmov is capable of doing what emit_strmov did and is just an extended
version of it.  BTW, under TARGET_SINGLE_STRINGOP switch gen_strmov is used, not
emit_strmov - behaviour there hasn't been changed by this patch.

5.
> For SSE codegen, won't we need to track down in destination was aligned to 
> generate aligned/unaligned moves?
We try to achieve a required alignment by prologue, so in the main loop
destination is aligned properly.  Source, meanwhile, could be misaligned, so for
it unaligned moves could be generated.  Here I actually also rely on the fact
that we have an optimal description of aligned/unaligned moves in MD-file, i.e.
if it's better to emit two DI-moves instead of one unaligned TI-mode, then
splits/expands will manage to do that.

6.
> +  else if (TREE_CODE (expr) == MEM_REF)
> +{
> +  tree base = TREE_OPERAND (expr, 0);
> +  tree byte_offset = TREE_OPERAND (expr, 1);
> +  if (TREE_CODE (base) != ADDR_EXPR
> + || TREE_CODE (byte_offset) != INTEGER_CST)
> +   return -1;
> +  if (!DECL_P (TREE_OPERAND (base, 0))
> + || DECL_ALIGN (TREE_OPERAND (base, 0)) < align)
>
> You can use TYPE_ALIGN here? In general can't we replace all the GIMPLE
> handling by get_object_alignment?
>
> +   return -1;
> +  offset += tree_low_cst (byte_offset, 1);
> +}
>else
>  return -1;
>
> This change out to go independently. I can not review it.
> I will make first look over the patch shortly, but please send updated patch 
> fixing
> the problem with integer regs.
Actually, I don't know what is a right way to find out alignment, but the
existing one didn't work.  Routine get_mem_align_offset didn't handle MEM_REFs
at all, so I added some handling there - I'm not sure it's complete and
absoulutely correct, but that currently works for me.  I'd be glad to hear any
suggestions of how that should be done - whom should I ask about it?

---
Thanks, Michael


On 17 April 2013 19:12, Jan Hubic

Re: [PATCH, x86] Use vector moves in memmove expanding

[Michael Zolotukhin]

Forgot to add Uros - adding now.

On 18 April 2013 15:53, Michael Zolotukhin
 wrote:
> Hi,
> Jan, thanks for the review, I hope to prepare an updated version of the patch
> shortly.  Please see my answers to your comments below.
>
> Uros, there is a question of a better approach for generation of wide moves.
> Could you please comment it (see details in bullets 3 and 5)?
>
> 1.
>> +static int smallest_pow2_greater_than (int);
>>
>> Perhaps it is easier to use existing 1< Well, yep.  Actually, this routine has already been used there, so I continued
> using it.  I guess we could change its implementation to call
> ceil_log2/floor_log2 or remove it entirely.
>
> 2.
>> -  y_addr = gen_rtx_PLUS (Pmode, srcptr, copy_rtx (tmp));
>> -  srcmem = change_address (srcmem, mode, y_addr);
>> +  srcmem = offset_address (srcmem, copy_rtx (tmp), piece_size_n);
>> +  srcmem = adjust_address (srcmem, mode, 0);
>> ...
>> This change looks OK and can go into manline independnetly. Just please 
>> ensure that changing
>> the way address is computed is not making us to preserve alias set. Memmove 
>> can not rely on the alias
>> set of the src/destination objects.
> Could you explain it in more details?  Do you mean that at the beginning DST
> and SRC could point to one memory location and have corresponding alias sets,
> and I just change addresses they point to without invalidating alias sets?
> I haven't thought about this, and that seems like a possible bug, but I guess
> it could be simply fixed by calling change_address at the end.
>
> 3.
>> +  /* Find the widest mode in which we could perform moves.
>> + Start with the biggest power of 2 less than SIZE_TO_MOVE and half
>> + it until move of such size is supported.  */
>> +  piece_size = smallest_pow2_greater_than (size_to_move) >> 1;
>> +  move_mode = mode_for_size (piece_size * BITS_PER_UNIT, MODE_INT, 0);
>>
>> I suppose this is a problem with SSE moves ending up in integer register, 
>> since
>> you get TImode rather than vectorized mode, like V8QImode in here.  Why not 
>> stick
>> with the original mode parmaeter?
> Yes, here we choose TImode instead of a vector mode, but that actually was 
> done
> intentionally.  I tried several approaches here and decided that using the
> widest integer mode is the best one for now.  We could try to find out a
> particular (vector)mode in which we want to perform copying, but isn't it 
> better
> to rely on a machine-description here?  My idea here was to just request a 
> copy
> of, for instance, 128-bit piece (i.e. one TI-move) and leave it to the 
> compiler
> to choose the most optimal way of performing it.  Currently, the compiler 
> thinks
> that move of 128bits should be splitted into two moves of 64-bits (this
> transformation is done in split2 pass) - if it's actually not so optimal, we
> should fix it there, IMHO.
>
> I think Uros could give me an advice on whether it's a reasonable approach or 
> it
> should be changed.
>
> Also, I tried to avoid such fixes in this patch - that doesn't mean I'm not
> going to work on the fixes, quite the contrary.  But it'd be easier to work on
> them if we have a code in the trunk that could reveal the problem.
>
> 4.
>> Doesn't this effectively kill support for TARGET_SINGLE_STRINGOP? It is 
>> useful as
>> size optimization.
> Do you mean removing emit_strmov?  I don't think it'll kill anything, as new
> emit_memmov is capable of doing what emit_strmov did and is just an extended
> version of it.  BTW, under TARGET_SINGLE_STRINGOP switch gen_strmov is used, 
> not
> emit_strmov - behaviour there hasn't been changed by this patch.
>
> 5.
>> For SSE codegen, won't we need to track down in destination was aligned to 
>> generate aligned/unaligned moves?
> We try to achieve a required alignment by prologue, so in the main loop
> destination is aligned properly.  Source, meanwhile, could be misaligned, so 
> for
> it unaligned moves could be generated.  Here I actually also rely on the fact
> that we have an optimal description of aligned/unaligned moves in MD-file, 
> i.e.
> if it's better to emit two DI-moves instead of one unaligned TI-mode, then
> splits/expands will manage to do that.
>
> 6.
>> +  else if (TREE_CODE (expr) == MEM_REF)
>> +{
>> +  tree base = TREE_OPERAND (expr, 0);
>> +  tree byte_offset = TREE_OPERAND (expr, 1);
>> +  if (TREE_CODE (base) != ADDR_EXPR
>> + || TREE_CODE (byte_offset) != INTEGER_CST)
>> +   return -1;
>> +  if (!DECL_P (TREE_OPERAND (base, 0))
>> + || DECL_ALIGN (TREE_OPERAND (base, 0)) < align)
>>
>> You can use TYPE_ALIGN here? In general can't we replace all the GIMPLE
>> handling by get_object_alignment?
>>
>> +   return -1;
>> +  offset += tree_low_cst (byte_offset, 1);
>> +}
>>else
>>  return -1;
>>
>> This change out to go independently. I can not review it.
>> I will make first look over the patch shortly, but please send updated patch 
>> fixing
>> the proble

New German PO file for 'gcc' (version 4.8.0)

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Re: [testsuite] Adding target nonpic to g++.dg/tm/pr47746.C

[Patrick Marlier]

Hi Alexander,

On Thu, Apr 18, 2013 at 12:49 PM, Alexander Ivchenko  wrote:
> I'm trying it on linux/x86_64 on trunk. Testing just by adding -fpic
> to the dg-options:
>
> --- a/gcc/testsuite/g++.dg/tm/pr47746.C
> +++ b/gcc/testsuite/g++.dg/tm/pr47746.C
> @@ -1,5 +1,5 @@
>  // { dg-do compile }
> -// { dg-options "-fgnu-tm" }
> +// { dg-options "-fgnu-tm -fpic" }
>
> Here is the error msg:
>
> testsuite/g++.dg/tm/pr47746.C:20:14: error: unsafe function call 'void
> Building::load(InputStream*)' within 'transaction_safe' function

Thanks! Now I understand the error (and I am able to reproduce it). :)

> 4462|  know what it will contain at runtime.  */
> 4463|   if (cgraph_function_body_availability (node) < AVAIL_AVAILABLE)
> 4464+>return true;
> 4465|
>
> (gdb) p cgraph_function_body_availability (node)
> $54 = AVAIL_OVERWRITABLE
>
> Sure I can file a PR If you think that the test was not supposed to
> fail with -fpic

I think your patch is OK but I cannot approve it since I am not a maintainer.
I CCed Richard since he is the one who can approve and knows the TM
implementation.

Thanks,
--
Patrick

[PATCH] More vectorizer TLC

[Richard Biener]

While trying to remove some restrictions I came along more TLC
opportunities.

Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.

Richard.

2013-04-18  Richard Biener  

* tree-vect-data-refs.c (vect_analyze_group_access): Properly
handle negative step.  Remove redundant checks.
(vect_create_data_ref_ptr): Avoid ICEs with non-constant steps.
* tree-vect-stmts.c (vectorizable_load): Instead of asserting
for negative step and grouped loads fail to vectorize.

Index: gcc/tree-vect-data-refs.c
===
*** gcc/tree-vect-data-refs.c.orig  2013-04-18 12:17:03.0 +0200
--- gcc/tree-vect-data-refs.c   2013-04-18 12:17:14.430103903 +0200
*** vect_analyze_group_access (struct data_r
*** 2024,2030 
  
/* For interleaving, GROUPSIZE is STEP counted in elements, i.e., the
   size of the interleaving group (including gaps).  */
!   groupsize = dr_step / type_size;
  
/* Not consecutive access is possible only if it is a part of interleaving. 
 */
if (!GROUP_FIRST_ELEMENT (vinfo_for_stmt (stmt)))
--- 2024,2030 
  
/* For interleaving, GROUPSIZE is STEP counted in elements, i.e., the
   size of the interleaving group (including gaps).  */
!   groupsize = absu_hwi (dr_step) / type_size;
  
/* Not consecutive access is possible only if it is a part of interleaving. 
 */
if (!GROUP_FIRST_ELEMENT (vinfo_for_stmt (stmt)))
*** vect_analyze_group_access (struct data_r
*** 2094,2103 
gimple next = GROUP_NEXT_ELEMENT (vinfo_for_stmt (stmt));
struct data_reference *data_ref = dr;
unsigned int count = 1;
-   tree next_step;
tree prev_init = DR_INIT (data_ref);
gimple prev = stmt;
!   HOST_WIDE_INT diff, count_in_bytes, gaps = 0;
  
while (next)
  {
--- 2094,2103 
gimple next = GROUP_NEXT_ELEMENT (vinfo_for_stmt (stmt));
struct data_reference *data_ref = dr;
unsigned int count = 1;
tree prev_init = DR_INIT (data_ref);
gimple prev = stmt;
!   HOST_WIDE_INT diff, gaps = 0;
!   unsigned HOST_WIDE_INT count_in_bytes;
  
while (next)
  {
*** vect_analyze_group_access (struct data_r
*** 2126,2143 
  }
  
prev = next;
  
!   /* Check that all the accesses have the same STEP.  */
!   next_step = DR_STEP (STMT_VINFO_DATA_REF (vinfo_for_stmt (next)));
!   if (tree_int_cst_compare (step, next_step))
! {
!   if (dump_enabled_p ())
! dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, 
!  "not consecutive access in interleaving");
!   return false;
! }
  
-   data_ref = STMT_VINFO_DATA_REF (vinfo_for_stmt (next));
/* Check that the distance between two accesses is equal to the type
   size. Otherwise, we have gaps.  */
diff = (TREE_INT_CST_LOW (DR_INIT (data_ref))
--- 2126,2136 
  }
  
prev = next;
+   data_ref = STMT_VINFO_DATA_REF (vinfo_for_stmt (next));
  
! /* All group members have the same STEP by construction.  */
! gcc_checking_assert (operand_equal_p (DR_STEP (data_ref), step, 0));
  
/* Check that the distance between two accesses is equal to the type
   size. Otherwise, we have gaps.  */
diff = (TREE_INT_CST_LOW (DR_INIT (data_ref))
*** vect_analyze_group_access (struct data_r
*** 2175,2181 
  
/* Check that the size of the interleaving (including gaps) is not
   greater than STEP.  */
!   if (dr_step && dr_step < count_in_bytes + gaps * type_size)
  {
if (dump_enabled_p ())
  {
--- 2168,2175 
  
/* Check that the size of the interleaving (including gaps) is not
   greater than STEP.  */
!   if (dr_step != 0
! && absu_hwi (dr_step) < count_in_bytes + gaps * type_size)
  {
if (dump_enabled_p ())
  {
*** vect_analyze_group_access (struct data_r
*** 2188,2194 
  
/* Check that the size of the interleaving is equal to STEP for stores,
   i.e., that there are no gaps.  */
!   if (dr_step && dr_step != count_in_bytes)
  {
if (DR_IS_READ (dr))
  {
--- 2182,2189 
  
/* Check that the size of the interleaving is equal to STEP for stores,
   i.e., that there are no gaps.  */
!   if (dr_step != 0
! && absu_hwi (dr_step) != count_in_bytes)
  {
if (DR_IS_READ (dr))
  {
*** vect_analyze_group_access (struct data_r
*** 2208,2214 
  }
  
/* Check that STEP is a multiple of type size.  */
!   if (dr_step && (dr_step % type_size) != 0)
  {
  

[PING] RE: [PING]RE: [patch] cilkplus: Array notation for C patch

[Iyer, Balaji V]

Hi Joseph et al.,
Did you all get a chance to look at this patch?

Thanks,

Balaji V. Iyer.

> -Original Message-
> From: Iyer, Balaji V
> Sent: Monday, April 08, 2013 9:56 AM
> To: 'Joseph Myers'; 'Aldy Hernandez'
> Cc: 'gcc-patches'
> Subject: [PING]RE: [patch] cilkplus: Array notation for C patch
> 
> Hello Joseph,
>   Did you get a chance to look at this patch?
> 
> Thanks,
> 
> Balaji V. Iyer.
> 
> > -Original Message-
> > From: Iyer, Balaji V
> > Sent: Friday, March 29, 2013 5:58 PM
> > To: 'Joseph Myers'; 'Aldy Hernandez'
> > Cc: 'gcc-patches'
> > Subject: RE: [patch] cilkplus: Array notation for C patch
> >
> > Hello Joseph, Aldy et al.,
> > I reworded couple comments (e.g changed builtin with built-in, etc)
> > and added a header comment to the c-array-notation.c that explains the
> > overall process. I am attaching  a fixed patch.
> >
> > Thanks,
> >
> > Balaji V. Iyer.
> >
> > Here are the Changelog entries again:
> >
> > gcc/ChangeLog
> > +2013-03-28  Balaji V. Iyer  
> > +
> > +   * doc/extend.texi (C Extensions): Added documentation about Cilk 
> > Plus
> > +   array notation built-in reduction functions.
> > +   * doc/passes.texi (Passes): Added documentation about changes done
> > +   for Cilk Plus.
> > +   * doc/invoke.texi (C Dialect Options): Added documentation about
> > +   the -fcilkplus flag.
> > +   * doc/generic.texi (Storage References): Added documentation for
> > +   ARRAY_NOTATION_REF storage.
> > +   * Makefile.in (C_COMMON_OBJS): Added c-family/array-notation-
> > common.o.
> > +   * tree-pretty-print.c (dump_generic_node): Add case for
> > +   ARRAY_NOTATION_REF.
> > +   (BUILTINS_DEF): Depend on cilkplus.def.
> > +   * builtins.def: Include cilkplus.def.
> > +   Define DEF_CILKPLUS_BUILTIN.
> > +   * builtin-types.def: Define BT_FN_INT_PTR_PTR_PTR.
> > +   * cilkplus.def: New file.
> >
> > gcc/c-family/ChangeLog
> > +2013-03-28  Balaji V. Iyer  
> > +
> > +   * c-common.c (c_define_builtins): When cilkplus is enabled, the
> > +   function array_notation_init_builtins is called.
> > +   (c_common_init_ts): Added ARRAY_NOTATION_REF as typed.
> > +   * c-common.def (ARRAY_NOTATION_REF): New tree.
> > +   * c-common.h (build_array_notation_expr): New function declaration.
> > +   (build_array_notation_ref): Likewise.
> > +   (extract_sec_implicit_index_arg): New extern declaration.
> > +   (is_sec_implicit_index_fn): Likewise.
> > +   (ARRAY_NOTATION_CHECK): New define.
> > +   (ARRAY_NOTATION_ARRAY): Likewise.
> > +   (ARRAY_NOTATION_START): Likewise.
> > +   (ARRAY_NOTATION_LENGTH): Likewise.
> > +   (ARRAY_NOTATION_STRIDE): Likewise.
> > +   (ARRAY_NOTATION_TYPE): Likewise.
> > +   * c-pretty-print.c (pp_c_postifix_expression): Added a new case for
> > +   ARRAY_NOTATION_REF.
> > +   (pp_c_expression): Likewise.
> > +   * c.opt (flag_enable_cilkplus): New flag.
> > +   * array-notation-common.c: New file.
> >
> > gcc/c/ChangeLog
> > +2013-03-28  Balaji V. Iyer  
> > +
> > +   * c-typeck.c (build_array_ref): Added a check to see if array's
> > +   index is greater than one.  If true, then emit an error.
> > +   (build_function_call_vec): Exclude error reporting and checking
> > +   for builtin array-notation functions.
> > +   (convert_arguments): Likewise.
> > +   (c_finish_return): Added a check for array notations as a return
> > +   expression.  If true, then emit an error.
> > +   (c_finish_loop): Added a check for array notations in a loop
> > +   condition.  If true then emit an error.
> > +   (lvalue_p): Added a ARRAY_NOTATION_REF case.
> > +   (build_binary_op): Added a check for array notation expr inside
> > +   op1 and op0.  If present, we call another function to find correct
> > +   type.
> > +   * Make-lang.in (C_AND_OBJC_OBJS): Added c-array-notation.o.
> > +   * c-parser.c (c_parser_compound_statement): Check if array
> > +   notation code is used in tree, if so, then transform them into
> > +   appropriate C code.
> > +   (c_parser_expr_no_commas): Check if array notation is used in LHS
> > +   or RHS, if so, then build array notation expression instead of
> > +   regular modify.
> > +   (c_parser_postfix_expression_after_primary): Added a check for
> > +   colon(s) after square braces, if so then handle it like an array
> > +   notation.  Also, break up array notations in unary op if found.
> > +   (c_parser_direct_declarator_inner): Added a check for array
> > +   notation.
> > +   (c_parser_compound_statement): Added a check for array notation in
> > +   a stmt.  If one is present, then expand array notation expr.
> > +   (c_parser_if_statement): Likewise.
> > +   (c_parser_switch_statement): Added a check for array notations in
> > +   a switch statement's condition.  If true, then output an error.
> > +   (c_parser_while_statement): Similarly, but for a while.
> > +   (c_parser_do_statement): Similarly, but for a do-while.
> > +   (c_parser_for_statement): Si

[PATCH 0/5] Submission of Altera Nios II port

[Chung-Lin Tang]

Hi,

Mentor Graphics is submitting on behalf of Altera, a GCC port for the
Nios II architecture. Attached are the series of patches, including a
few small additions to machine-independent parts.

We are proposing Sandra Loosemoore and myself (Chung-Lin Tang), both of
Mentor Graphics, as port maintainers.

Thanks,
Chung-Lin

[PATCH 2/5] Altera Nios II: libgcc

[Chung-Lin Tang]

These are patches for libgcc.

2013-04-18  Sandra Loosemore  
Chung-Lin Tang  
Based on patches from Altera Corporation

* config.host (nios2-*-*,nios2-*-linux*): Add nios2 host cases.
* config/nios2/lib2-nios2.h: New file.
* config/nios2/lib2-divmod-hi.c: New file.
* config/nios2/linux-unwind.h: New file.
* config/nios2/lib2-divmod.c: New file.
* config/nios2/linux-atomic.c: New file.
* config/nios2/t-nios2: New file.
* config/nios2/crti.asm: New file.
* config/nios2/t-linux: New file.
* config/nios2/lib2-divtable.c: New file.
* config/nios2/lib2-mul.c: New file.
* config/nios2/tramp.c: New file.
* config/nios2/crtn.asm: New file.

Index: libgcc/config.host
===
--- libgcc/config.host	(revision 407083)
+++ libgcc/config.host	(revision 409063)
@@ -137,6 +137,9 @@
 	cpu_type=mips
 	tmake_file=mips/t-mips
 	;;
+nios2*-*-*)
+	cpu_type=nios2
+	;;
 powerpc*-*-*)
 	cpu_type=rs6000
 	;;
@@ -814,6 +817,15 @@
 	# Don't use default.
 	extra_parts=
 	;;
+nios2-*-linux*)
+	tmake_file="$tmake_file nios2/t-nios2 nios2/t-linux t-libgcc-pic t-slibgcc-libgcc"
+	extra_parts="$extra_parts crti.o crtn.o"
+	md_unwind_header=nios2/linux-unwind.h
+	;;
+nios2-*-*)
+	tmake_file="$tmake_file nios2/t-nios2 t-fdpbit"
+	extra_parts="$extra_parts crti.o crtn.o"
+	;;
 pdp11-*-*)
 	tmake_file="pdp11/t-pdp11 t-fdpbit"
 	;;
Index: libgcc/config/nios2/lib2-nios2.h
===
--- libgcc/config/nios2/lib2-nios2.h	(revision 0)
+++ libgcc/config/nios2/lib2-nios2.h	(revision 409063)
@@ -0,0 +1,49 @@
+/* Integer arithmetic support for Altera Nios II.
+   
+   Copyright (C) 2012 Free Software Foundation, Inc.
+   Contributed by Altera and Mentor Graphics, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+   
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+   
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+   
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   . */
+
+#ifndef LIB2_NIOS2_H
+#define LIB2_NIOS2_H
+
+/* Types.  */
+
+typedef char QItype __attribute__ ((mode (QI)));
+typedef unsigned char UQItype __attribute__ ((mode (QI)));
+typedef short HItype __attribute__ ((mode (HI)));
+typedef unsigned short UHItype __attribute__ ((mode (HI)));
+typedef int SItype __attribute__ ((mode (SI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef int word_type __attribute__ ((mode (__word__)));
+
+/* Exported functions.  */
+extern SItype __divsi3 (SItype, SItype);
+extern SItype __modsi3 (SItype, SItype);
+extern SItype __udivsi3 (SItype, SItype);
+extern SItype __umodsi3 (SItype, SItype);
+extern HItype __divhi3 (HItype, HItype);
+extern HItype __modhi3 (HItype, HItype);
+extern UHItype __udivhi3 (UHItype, UHItype);
+extern UHItype __umodhi3 (UHItype, UHItype);
+extern SItype __mulsi3 (SItype, SItype);
+
+#endif /* LIB2_NIOS2_H */
Index: libgcc/config/nios2/lib2-divmod-hi.c
===
--- libgcc/config/nios2/lib2-divmod-hi.c	(revision 0)
+++ libgcc/config/nios2/lib2-divmod-hi.c	(revision 409063)
@@ -0,0 +1,116 @@
+/* Copyright (C) 2012 Free Software Foundation, Inc.
+   Contributed by Altera and Mentor Graphics, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+.  */

[PATCH 3/5] Altera Nios II: testsuite patches

[Chung-Lin Tang]

Testsuite changes, including gcc.target tests, plus some selected
filtering of some other tests.

2013-04-18  Sandra Loosemore  
Chung-Lin Tang  
Based on patches from Altera Corporation

* gcc.dg/stack-usage-1.c (SIZE): Define case for __nios2__.
* gcc.dg/20040813-1.c: Skip for nios2-*-*.
* gcc.dg/20020312-2.c: Add __nios2__ case.
* g++.dg/other/PR23205.C: Skip for nios2-*-*.
* g++.dg/other/pr23205-2.C: Skip for nios2-*-*.
* g++.dg/cpp0x/constexpr-rom.C: Skip for nios2-*-*.
* g++.dg/cpp0x/alias-decl-debug-0.C: Skip for nios2-*-*.
* g++.old-deja/g++.jason/thunk3.C: Skip for nios2-*-*.
* lib/target-supports.exp (check_profiling_available): Check for
nios2-*-elf.
* gcc.c-torture/execute/pr47237.x:: Skip for nios2-*-*.
* gcc.c-torture/execute/20101011-1.c: Skip for nios2-*-*.
* gcc.c-torture/execute/builtins/lib/chk.c
* gcc.target/nios2/nios2.exp: New DejaGNU file.
* gcc.target/nios2/nios2-custom-1.c: New test.
* gcc.target/nios2/nios2-trap-insn.c: New test.
* gcc.target/nios2/nios2-builtin-io.c: New test.
* gcc.target/nios2/nios2-stack-check-1.c: New test.
* gcc.target/nios2/nios2-stack-check-2.c: New test.
* gcc.target/nios2/nios2-rdctl.c: New test.
* gcc.target/nios2/nios2-wrctl.c: New test.
* gcc.target/nios2/nios2-wrctl-zero.c: New test.
* gcc.target/nios2/nios2-wrctl-not-zero.c: New test.
* gcc.target/nios2/nios2-rdwrctl-1.c: New test.
* gcc.target/nios2/nios2-reg-constraints.c: New test.
* gcc.target/nios2/nios2-ashlsi3-one_shift.c: New test.
* gcc.target/nios2/nios2-mul-options-1.c: New test.
* gcc.target/nios2/nios2-mul-options-2.c: New test.
* gcc.target/nios2/nios2-mul-options-3.c: New test.
* gcc.target/nios2/nios2-mul-options-4.c: New test.
* gcc.target/nios2/nios2-nor.c: New test.
* gcc.target/nios2/custom-fp-1.c: New test.
* gcc.target/nios2/custom-fp-2.c: New test.
* gcc.target/nios2/custom-fp-3.c: New test.
* gcc.target/nios2/custom-fp-4.c: New test.
* gcc.target/nios2/custom-fp-5.c: New test.
* gcc.target/nios2/custom-fp-6.c: New test.
* gcc.target/nios2/custom-fp-7.c: New test.
* gcc.target/nios2/custom-fp-conversion.c: New test.
* gcc.target/nios2/custom-fp-double.c: New test.
* gcc.target/nios2/custom-fp-float.c: New test.
* gcc.target/nios2/nios2-int-types.c: New test.
* gcc.target/nios2/nios2-cache-1.c: New test.
* gcc.target/nios2/nios2-cache-2.c: New test.
Index: gcc/testsuite/gcc.dg/stack-usage-1.c
===
--- gcc/testsuite/gcc.dg/stack-usage-1.c	(revision 407083)
+++ gcc/testsuite/gcc.dg/stack-usage-1.c	(revision 409063)
@@ -68,6 +68,8 @@
 #  define SIZE 248
 #elif defined (xstormy16)
 #  define SIZE 254
+#elif defined (__nios2__)
+#  define SIZE 252
 #else
 #  define SIZE 256
 #endif
Index: gcc/testsuite/gcc.dg/20040813-1.c
===
--- gcc/testsuite/gcc.dg/20040813-1.c	(revision 407083)
+++ gcc/testsuite/gcc.dg/20040813-1.c	(revision 409063)
@@ -2,7 +2,7 @@
 /* Contributed by Devang Patel*/
 
 /* { dg-do compile } */
-/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks* } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* nios2-*-* *-*-vxworks* } { "*" } { "" } } */
 /* { dg-options "-gstabs" } */
 
 int
Index: gcc/testsuite/gcc.dg/20020312-2.c
===
--- gcc/testsuite/gcc.dg/20020312-2.c	(revision 407083)
+++ gcc/testsuite/gcc.dg/20020312-2.c	(revision 409063)
@@ -52,6 +52,8 @@
 /* No pic register.  */
 #elif defined(__moxie__)
 /* No pic register.  */
+#elif defined(__nios2__)
+/* No pic register.  */
 #elif defined(__hppa__)
 /* PIC register is %r27 or %r19, but is used even without -fpic.  */
 #elif defined(__pdp11__)
Index: gcc/testsuite/g++.dg/other/PR23205.C
===
--- gcc/testsuite/g++.dg/other/PR23205.C	(revision 407083)
+++ gcc/testsuite/g++.dg/other/PR23205.C	(revision 409063)
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* nios2-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */
 /* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types" } */
 
 const int foobar = 4;
Index: gcc/testsuite/g++.dg/other/pr23205-2.C
===
--- gcc/testsuite/g++.dg/oth

[PATCH 4/5] Altera Nios II: dwarf generation fix

[Chung-Lin Tang]

This patch was a fix by Julian which corrected a HOST_BITS_PER_WIDE_INT
host dependency in dwarf generation. Nios II does not have
need_64bit_hwint switched on during configuring, and ran into GDB test
FAILs originating from this problem.

2013-04-18  Julian Brown  

* dwarf2out.c (gen_enumeration_type_die): Fix
HOST_BITS_PER_WIDE_INT dependency behavior in enumeration type
DIE generation.
Index: gcc/dwarf2out.c
===
--- gcc/dwarf2out.c	(revision 407083)
+++ gcc/dwarf2out.c	(revision 409063)
@@ -17025,15 +17025,21 @@
 	  if (TREE_CODE (value) == CONST_DECL)
 	value = DECL_INITIAL (value);
 
-	  if (host_integerp (value, TYPE_UNSIGNED (TREE_TYPE (value
+	  if (host_integerp (value, TYPE_UNSIGNED (TREE_TYPE (value)))
+	  && (simple_type_size_in_bits (TREE_TYPE (value))
+		  <= HOST_BITS_PER_WIDE_INT || host_integerp (value, 0)))
 	/* DWARF2 does not provide a way of indicating whether or
 	   not enumeration constants are signed or unsigned.  GDB
 	   always assumes the values are signed, so we output all
 	   values as if they were signed.  That means that
 	   enumeration constants with very large unsigned values
 	   will appear to have negative values in the debugger.  */
-	add_AT_int (enum_die, DW_AT_const_value,
-			tree_low_cst (value, tree_int_cst_sgn (value) > 0));
+	add_AT_int (enum_die, DW_AT_const_value, TREE_INT_CST_LOW (value));
+	  else
+	/* Enumeration constants may be wider than HOST_WIDE_INT.  Handle
+	   that here.  */
+	add_AT_double (enum_die, DW_AT_const_value,
+			   TREE_INT_CST_HIGH (value), TREE_INT_CST_LOW (value));
 	}
 
   add_gnat_descriptive_type_attribute (type_die, type, context_die);

[PATCH 5/5] Altera Nios II: hexadecimal numbers in options

[Chung-Lin Tang]

Altera has defined an FPU instruction set on top of the custom
instruction space provided in Nios II, but without specifying the exact
binary opcode mapping within the [0,255] space; that mapping is
specified by the user, through compiler options or target pragmas.

For ease of use in specifying the code on the command line, we are
proposing the attached patch to allow, for example '-mcustom-fadds=255'
to be written as '-mcustom-fadds=0xff'

2013-04-18  Chung-Lin Tang  

* opts-common.c (integral_argument): Add support for hexadecimal
command option integer arguments. Update comments.

Index: gcc/opts-common.c
===
--- gcc/opts-common.c	(revision 407083)
+++ gcc/opts-common.c	(revision 409063)
@@ -147,7 +147,7 @@
   return match_wrong_lang;
 }
 
-/* If ARG is a non-negative integer made up solely of digits, return its
+/* If ARG is a non-negative decimal or hexadecimal integer, return its
value, otherwise return -1.  */
 
 int
@@ -161,6 +161,15 @@
   if (*p == '\0')
 return atoi (arg);
 
+  /* It wasn't a decimal number - try hexadecimal.  */
+  if (arg[0]=='0' && (arg[1]=='x' || arg[1]=='X'))
+{
+  char *endp;
+  int val = strtol (arg, &endp, 16);
+  if (*endp == '\0')
+	return val;
+}
+
   return -1;
 }
 

Re: [PATCH 3/5] Altera Nios II: testsuite patches

[Chung-Lin Tang]

On 2013/4/18 09:49 PM, Chung-Lin Tang wrote:
> Testsuite changes, including gcc.target tests, plus some selected
> filtering of some other tests.
> 
> 2013-04-18  Sandra Loosemore  
> Chung-Lin Tang  
> Based on patches from Altera Corporation

Missed filling in one ChangeLog entry in last post:

* gcc.c-torture/execute/builtins/lib/chk.c (memset): Place
char-based memset loop before inline check, to prevent
problems when called to initialize .bss. Update comments.

Re: [testsuite, i386] Reimplementing array comparison in avx2-vpop-check.h

[Kirill Yukhin]

> OK with that change.
Hi,
Checked into trunk: http://gcc.gnu.org/ml/gcc-cvs/2013-04/msg00763.html

Thanks, K

[Ping, Patch, c-common] Emit error for negative _Alignas alignment values

[Senthil Kumar Selvaraj]

Ping again!

Regards
Senthil

On Wed, Apr 03, 2013 at 07:18:20PM +0530, Senthil Kumar Selvaraj wrote:
> This patch detects and emits an error if the value provided in _Alignas
> is negative. The fix was approved pending full regression testing in a
> previous discussion (http://gcc.gnu.org/ml/gcc/2013-03/msg00282.html). 
> To add to that patch, I have added a testcase that explicitly checks for the
> error for a negative power of 2.
> 
> Bootstrapped and regression tested with x86_64-unknown-linux-gnu with no new
> failures.
> 
> If ok, could someone commit please? I don't have commit access.
> 
> Regards
> Senthil
> 
> gcc/c-family/ChangeLog
> 
> 2013-04-03Senthil Kumar Selvaraj  
> 
>   * c-common.c (check_user_alignment): Emit error for negative values
> 
> gcc/testsuite/ChangeLog
>
> 2013-04-03Senthil Kumar Selvaraj  
>
>   * gcc.dg/c1x-align-3.c: Add test for negative power of 2
> 
> diff --git gcc/c-family/c-common.c gcc/c-family/c-common.c
> index c7cdd0f..dfdfbb6 100644
> --- gcc/c-family/c-common.c
> +++ gcc/c-family/c-common.c
> @@ -7308,9 +7308,10 @@ check_user_alignment (const_tree align, bool 
> allow_zero)
>  }
>else if (allow_zero && integer_zerop (align))
>  return -1;
> -  else if ((i = tree_log2 (align)) == -1)
> +  else if (tree_int_cst_sgn (align) == -1
> +   || (i = tree_log2 (align)) == -1)
>  {
> -  error ("requested alignment is not a power of 2");
> +  error ("requested alignment is not a positive power of 2");
>return -1;
>  }
>else if (i >= HOST_BITS_PER_INT - BITS_PER_UNIT_LOG)
> diff --git gcc/testsuite/gcc.dg/c1x-align-3.c 
> gcc/testsuite/gcc.dg/c1x-align-3.c
> index 0b2a77f..b97351c 100644
> --- gcc/testsuite/gcc.dg/c1x-align-3.c
> +++ gcc/testsuite/gcc.dg/c1x-align-3.c
> @@ -23,6 +23,7 @@ _Alignas (-(__LONG_LONG_MAX__-1)/4) char i3; /* { dg-error 
> "too large|power of 2
>  _Alignas (-(__LONG_LONG_MAX__-1)/8) char i4; /* { dg-error "too large|power 
> of 2" } */
>  _Alignas (-(__LONG_LONG_MAX__-1)/16) char i5; /* { dg-error "too large|power 
> of 2" } */
>  _Alignas (-1) char j; /* { dg-error "power of 2" } */
> +_Alignas (-2) char j; /* { dg-error "positive power of 2" } */
>  _Alignas (3) char k; /* { dg-error "power of 2" } */
>  
>  _Alignas ((void *) 1) char k; /* { dg-error "integer constant" } */

[Ping, Patch, testsuite] Add -gdwarf to dg-options in debug/dwarf2 testcases

[Senthil Kumar Selvaraj]

Ping.

http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00665.html

Regards
Senthil
On Thu, Apr 11, 2013 at 03:36:03PM +0530, Senthil Kumar Selvaraj wrote:
> Hi,
> 
> This patch adds the new -gdwarf option to dg-options for testcases in
> gcc.dg/debug/dwarf2 that don't already explicitly request DWARF.
> 
> Not asking gcc to generate DWARF causes these tests to fail if gcc is
> built/configured with support for multiple debugging formats and DWARF
> is not the default.
> 
> If ok, could someone commit please? I don't have commit access.
> 
> Regards
> Senthil
> 
> gcc/testsuite/ChangeLog
> 
> 2013-04-11  Senthil Kumar Selvaraj  
> 
>   * gcc.dg/debug/dwarf2/global-used-types.c: Add -gdwarf to dg-options
>   * gcc.dg/debug/dwarf2/inline2.c: Likewise
>   * gcc.dg/debug/dwarf2/inline3.c: Likewise
>   * gcc.dg/debug/dwarf2/pr37726.c: Likewise
>   * gcc.dg/debug/dwarf2/pr41445-1.c: Likewise 
>   * gcc.dg/debug/dwarf2/pr41445-2.c: Likewise 
>   * gcc.dg/debug/dwarf2/pr41445-3.c: Likewise
>   * gcc.dg/debug/dwarf2/pr41445-4.c: Likewise
>   * gcc.dg/debug/dwarf2/pr41445-5.c: Likewise
>   * gcc.dg/debug/dwarf2/pr41445-6.c: Likewise
>   * gcc.dg/debug/dwarf2/pr47939-1.c: Likewise 
>   * gcc.dg/debug/dwarf2/pr47939-2.c: Likewise 
>   * gcc.dg/debug/dwarf2/pr47939-3.c: Likewise 
>   * gcc.dg/debug/dwarf2/pr47939-4.c: Likewise 
>   * gcc.dg/debug/dwarf2/pr53948.c: Likewise
>   * gcc.dg/debug/dwarf2/struct-loc1.c: Likewise
>   
> diff --git gcc/testsuite/gcc.dg/debug/dwarf2/global-used-types.c 
> gcc/testsuite/gcc.dg/debug/dwarf2/global-used-types.c
> index 54fa58a..431b429 100644
> --- gcc/testsuite/gcc.dg/debug/dwarf2/global-used-types.c
> +++ gcc/testsuite/gcc.dg/debug/dwarf2/global-used-types.c
> @@ -1,6 +1,6 @@
>  /*
>   Contributed by Dodji Seketeli 
> - { dg-options "-g -dA -fno-merge-debug-strings" }
> + { dg-options "-gdwarf -dA -fno-merge-debug-strings" }
>   { dg-do compile }
>   { dg-final { scan-assembler-times "DIE \\(0x\[^\n\]*\\) 
> DW_TAG_enumeration_type" 1 } }
>   { dg-final { scan-assembler-times "DIE \\(0x\[^\n\]*\\) DW_TAG_enumerator" 
> 2 } }
> diff --git gcc/testsuite/gcc.dg/debug/dwarf2/inline2.c 
> gcc/testsuite/gcc.dg/debug/dwarf2/inline2.c
> index 20edb58..b128e22 100644
> --- gcc/testsuite/gcc.dg/debug/dwarf2/inline2.c
> +++ gcc/testsuite/gcc.dg/debug/dwarf2/inline2.c
> @@ -14,7 +14,7 @@
>properly nested DW_TAG_inlined_subroutine DIEs for third, second and first.
>  */
>  
> -/* { dg-options "-O -g3 -dA" } */
> +/* { dg-options "-O -gdwarf -g3 -dA" } */
>  /* { dg-do compile } */
>  
>  /* There are 6 inlined subroutines:
> diff --git gcc/testsuite/gcc.dg/debug/dwarf2/inline3.c 
> gcc/testsuite/gcc.dg/debug/dwarf2/inline3.c
> index d2d3e0f..baa2f66 100644
> --- gcc/testsuite/gcc.dg/debug/dwarf2/inline3.c
> +++ gcc/testsuite/gcc.dg/debug/dwarf2/inline3.c
> @@ -1,7 +1,7 @@
>  /* Verify that only one DW_AT_const_value is emitted for baz,
> not for baz abstract DIE and again inside of
> DW_TAG_inlined_subroutine.  */
> -/* { dg-options "-O2 -g -dA -fmerge-all-constants" } */
> +/* { dg-options "-O2 -gdwarf -dA -fmerge-all-constants" } */
>  /* { dg-do compile } */
>  /* { dg-final { scan-assembler-times " DW_AT_const_value" 1 } } */
>  
> diff --git gcc/testsuite/gcc.dg/debug/dwarf2/pr37726.c 
> gcc/testsuite/gcc.dg/debug/dwarf2/pr37726.c
> index 60fb839..622fbcf 100644
> --- gcc/testsuite/gcc.dg/debug/dwarf2/pr37726.c
> +++ gcc/testsuite/gcc.dg/debug/dwarf2/pr37726.c
> @@ -1,6 +1,6 @@
>  /* PR debug/37726 */
>  /* { dg-do compile } */
> -/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */
> +/* { dg-options "-gdwarf -O0 -dA -fno-merge-debug-strings" } */
>  
>  int foo (int parm)
>  {
> diff --git gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c 
> gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c
> index 452c0f6..4e856ec 100644
> --- gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c
> +++ gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c
> @@ -2,7 +2,7 @@
>  /* Test that token after multi-line function-like macro use
> gets correct locus even when preprocessing separately.  */
>  /* { dg-do compile } */
> -/* { dg-options "-save-temps -g -O0 -dA -fno-merge-debug-strings" } */
> +/* { dg-options "-save-temps -gdwarf -O0 -dA -fno-merge-debug-strings" } */
>  
>  #define A(a,b)
>  int varh;A(1,
> diff --git gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-2.c 
> gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-2.c
> index d2ee408..e416b0f 100644
> --- gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-2.c
> +++ gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-2.c
> @@ -1,6 +1,6 @@
>  /* PR preprocessor/41445 */
>  /* { dg-do compile } */
> -/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */
> +/* { dg-options "-gdwarf -O0 -dA -fno-merge-debug-strings" } */
>  
>  #include "pr41445-1.c"
>  
> diff --git gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-3.c 
> gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-3.c
> index 2a74dc5..46f57e6 100644
> --- gcc/testsuite/

Re: [Ping, Patch, testsuite] Add -gdwarf to dg-options in debug/dwarf2 testcases

[Jakub Jelinek]

On Thu, Apr 18, 2013 at 07:46:30PM +0530, Senthil Kumar Selvaraj wrote:
> Ping.
> 
> http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00665.html

Shouldn't dwarf2.exp just prepend that to options instead?
If all tests in dwarf2/ directory are supposed to have it, then it just
should be done in one place.

Jakub

Re: [PATCH, SH] PR target/56995

[Kaz Kojima]

Christian Bruel  wrote:
> So, Just removing DF_HI_REGS seems to fix the issue with strictly same
> performance results for SH4.
> 
>   No regressions in the testsuite for
> sh-sim//-m2/
> sh-sim//-m2a/
> sh-sim//-m2a-nofpu/
> sh-sim//-m2a-single/
> sh-sim//-m2a-single-only/
> sh-sim//-m3/
> sh-sim//-m3e/
> sh-sim//-m4/
> sh-sim//-m4-single/
> sh-sim//-m4-single-only/
> sh-sim//-m4a/
> sh-sim//-m4a-single/
> sh-sim//-m4a-single-only/
> 
>  *[-mb,-ml]
> 
>  No performance regression for -m4

The patch is OK.
It seems that your patch does the right thing, though I don't
know the history of DF_HI_REGS at all.

> The consequence of this it that find_costs_and_classes seems to be
> confused when two register classes are strictly equivalent. Is it
> plausible ?

Looks very likely to me.

Regards,
kaz

Re: [Ping, Patch, testsuite] Add -gdwarf to dg-options in debug/dwarf2 testcases

[Senthil Kumar Selvaraj]

On Thu, Apr 18, 2013 at 04:18:31PM +0200, Jakub Jelinek wrote:
> On Thu, Apr 18, 2013 at 07:46:30PM +0530, Senthil Kumar Selvaraj wrote:
> > Ping.
> > 
> > http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00665.html
> 
> Shouldn't dwarf2.exp just prepend that to options instead?

It does it if the testcase doesn't have options of its own.

# If a testcase doesn't have special options, use these.
global DEFAULT_CFLAGS
if ![info exists DEFAULT_CFLAGS] then {
set DEFAULT_CFLAGS " -ansi -pedantic-errors -gdwarf-2"
}

I see that the gdwarf-2 should be changed to gdwarf. But otherwise,
there are some testcase that pass gdwarf-2 explicitly in dg-options, and I 
wasn't sure if they are intended to be DWARF 2 specific. 

I tried running the test suite with the following patch now.

diff --git gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2.exp 
gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2.exp
index 829840c..f161787 100644
--- gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2.exp
+++ gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2.exp
@@ -22,7 +22,7 @@ load_lib gcc-dg.exp
 # If a testcase doesn't have special options, use these.
 global DEFAULT_CFLAGS
 if ![info exists DEFAULT_CFLAGS] then {
-set DEFAULT_CFLAGS " -ansi -pedantic-errors -gdwarf-2"
+set DEFAULT_CFLAGS " -ansi -pedantic-errors"
 }
 
 # Initialize `dg'.
@@ -31,12 +31,12 @@ dg-init
 # Main loop.
 set comp_output [gcc_target_compile \
 "$srcdir/$subdir/../trivial.c" "trivial.S" assembly \
-"additional_flags=-gdwarf-2"]
+"additional_flags=-gdwarf"]
 if { ! [string match "*: target system does not support the * debug format*" \
 $comp_output] } {
 remove-build-file "trivial.S"
 dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\] 
$srcdir/c-c++-common/dwarf2/*.c]] \
-   "" $DEFAULT_CFLAGS
+   " -gdwarf " $DEFAULT_CFLAGS
 }
 
 # All done.


and it works. Both gdwarf and gdwarf-2 get passed to those tests, and the
latter option wins, so I guess it's ok.

Do you think the above patch would work?

Regards
Senthil

[patch] [4.7] revisit PR middle-end/56848 for 4.7.4

[Matthias Klose]

revisit PR middle-end/56848 for 4.7.4. as outlined in the bug report, this
reapplies the patch backed out for the 4.7.3 release and backports r190733.
No regressions in the testsuite on x86_64-linux-gnu compared to the 4.7.3
release. Ok to apply?

  Matthias


gcc/
2013-04-18  Matthias Klose  

PR middle-end/56848
Re-apply
2013-04-01  Andrey Belevantsev  

Backport from mainline
2013-02-25  Andrey Belevantsev  
Alexander Monakov  

PR middle-end/56077
* sched-deps.c (sched_analyze_insn): When reg_pending_barrier,
flush pending lists also on non-jumps.  Adjust comment.

Backport:
2012-08-27  Maxim Kuvyrkov  

* sched-deps.c (add_dependence_list_and_free): Simplify.
(flush_pending_list_and_free): Fix a hack that was fixing a hack.  Free
lists when add_dependence_list_and_free doesn't free them.

Index: gcc/sched-deps.c
===
--- a/src/gcc/sched-deps.c  (revision 198053)
+++ b/src/gcc/sched-deps.c  (working copy)
@@ -1563,24 +1563,15 @@
 add_dependence_list_and_free (struct deps_desc *deps, rtx insn, rtx *listp,
   int uncond, enum reg_note dep_type)
 {
-  rtx list, next;
+  add_dependence_list (insn, *listp, uncond, dep_type);
 
   /* We don't want to short-circuit dependencies involving debug
  insns, because they may cause actual dependencies to be
  disregarded.  */
   if (deps->readonly || DEBUG_INSN_P (insn))
-{
-  add_dependence_list (insn, *listp, uncond, dep_type);
-  return;
-}
+return;
 
-  for (list = *listp, *listp = NULL; list ; list = next)
-{
-  next = XEXP (list, 1);
-  if (uncond || ! sched_insns_conditions_mutex_p (insn, XEXP (list, 0)))
-   add_dependence (insn, XEXP (list, 0), dep_type);
-  free_INSN_LIST_node (list);
-}
+  free_INSN_LIST_list (listp);
 }
 
 /* Remove all occurences of INSN from LIST.  Return the number of
@@ -1764,6 +1755,15 @@
   add_dependence_list_and_free (deps, insn, &deps->pending_jump_insns, 1,
REG_DEP_ANTI);
 
+  if (DEBUG_INSN_P (insn))
+{
+  if (for_write)
+   free_INSN_LIST_list (&deps->pending_read_insns);
+  free_INSN_LIST_list (&deps->pending_write_insns);
+  free_INSN_LIST_list (&deps->last_pending_memory_flush);
+  free_INSN_LIST_list (&deps->pending_jump_insns);
+}
+
   if (!deps->readonly)
 {
   free_EXPR_LIST_list (&deps->pending_write_mems);
@@ -3262,9 +3262,9 @@
 SET_REGNO_REG_SET (&deps->reg_last_in_use, i);
   }
 
-  /* Flush pending lists on jumps, but not on speculative checks.  */
-  if (JUMP_P (insn) && !(sel_sched_p ()
- && sel_insn_is_speculation_check (insn)))
+  /* Don't flush pending lists on speculative checks for
+selective scheduling.  */
+  if (!sel_sched_p () || !sel_insn_is_speculation_check (insn))
flush_pending_lists (deps, insn, true, true);
 
   reg_pending_barrier = NOT_A_BARRIER;

Re: [PATCH 4/5] Altera Nios II: dwarf generation fix

[Cary Coutant]

On Thu, Apr 18, 2013 at 6:49 AM, Chung-Lin Tang  wrote:
> This patch was a fix by Julian which corrected a HOST_BITS_PER_WIDE_INT
> host dependency in dwarf generation. Nios II does not have
> need_64bit_hwint switched on during configuring, and ran into GDB test
> FAILs originating from this problem.
>
> 2013-04-18  Julian Brown  
>
> * dwarf2out.c (gen_enumeration_type_die): Fix
> HOST_BITS_PER_WIDE_INT dependency behavior in enumeration type
> DIE generation.

+  if (host_integerp (value, TYPE_UNSIGNED (TREE_TYPE (value)))
+  && (simple_type_size_in_bits (TREE_TYPE (value))
+  <= HOST_BITS_PER_WIDE_INT || host_integerp (value, 0)))
 /* DWARF2 does not provide a way of indicating whether or
not enumeration constants are signed or unsigned.  GDB
always assumes the values are signed, so we output all
values as if they were signed.  That means that
enumeration constants with very large unsigned values
will appear to have negative values in the debugger.  */
+add_AT_int (enum_die, DW_AT_const_value, TREE_INT_CST_LOW (value));
+  else
+/* Enumeration constants may be wider than HOST_WIDE_INT.  Handle
+   that here.  */
+add_AT_double (enum_die, DW_AT_const_value,
+   TREE_INT_CST_HIGH (value), TREE_INT_CST_LOW (value));

I'm not sure I understand the logic here. I'd think either the value
fits in a signed HOST_WIDE_INT, and we use add_AT_int, or it doesn't,
and we use add_AT_double:

  if (host_integerp (value, 0))
add_AT_int (enum_die, DW_AT_const_value, TREE_INT_CST_LOW (value));
  else
add_AT_double (enum_die, DW_AT_const_value,
   TREE_INT_CST_HIGH (value), TREE_INT_CST_LOW (value));

Why wouldn't that work? I'd think this would even eliminate the need
for the comment about signed vs. unsigned.

-cary

[patch] Fix DWARF test cases that don't work with -fdebug-types-sections

[Cary Coutant]

Several test cases in g++.dg/debug/dwarf2 don't work when
-fdebug-types-section is enabled. In all but one case, the test cases
are fine and -fdebug-types-section works fine -- it's just that the
patterns in the assembly code don't match when the option is on.
I'm committing the following patch to force -fno-debug-types-section
for these cases so that they're independent of any change to the
default or an overriding option when running the test suite.

In the one remaining case -- pubnames-2.C -- I found a real bug in the
generation of the pubnames tables when -fdebug-types-section is
on, and I'll follow up with a fix for that.

-cary


2013-04-18   Cary Coutant  

gcc/testsuite/
* g++.dg/debug/dwarf2/typedef2.C: Add -fno-debug-types-section flag.
* g++.dg/debug/dwarf2/typedef4.C: Likewise.
* g++.dg/debug/dwarf2/static-data-member1.C: Likewise.
* g++.dg/debug/dwarf2/global-used-types-1.C: Likewise.
* g++.dg/debug/dwarf2/self-ref-1.C: Likewise.
* g++.dg/debug/dwarf2/nested-2.C: Likewise.
* g++.dg/debug/dwarf2/typedef1.C: Likewise.
* g++.dg/debug/dwarf2/namespace-2.C: Likewise.
* g++.dg/debug/dwarf2/integer-typedef.C: Likewise.
* g++.dg/debug/dwarf2/self-ref-2.C: Likewise.
* g++.dg/debug/dwarf2/explicit-constructor.C: Likewise.

Index: testsuite/g++.dg/debug/dwarf2/typedef2.C
===
--- testsuite/g++.dg/debug/dwarf2/typedef2.C(revision 198034)
+++ testsuite/g++.dg/debug/dwarf2/typedef2.C(working copy)
@@ -1,5 +1,5 @@
 // Origin: PR debug/43628
-// { dg-options "-g -dA" }
+// { dg-options "-g -dA -fno-debug-types-section" }
 // { dg-do compile }
 
 // { dg-final { scan-assembler-times 
"\[^\n\r\]*\\(DIE\[^\n\r\]*DW_TAG_formal_parameter\\)\[\n\r\]{1,2}\[^\n\r\]*DW_AT_type\[\n\r\]{1,2}"
 1 } }
Index: testsuite/g++.dg/debug/dwarf2/typedef4.C
===
--- testsuite/g++.dg/debug/dwarf2/typedef4.C(revision 198034)
+++ testsuite/g++.dg/debug/dwarf2/typedef4.C(working copy)
@@ -1,5 +1,5 @@
 // Origin: PR debug/45171
-// { dg-options "-g -dA -fno-eliminate-unused-debug-types" }
+// { dg-options "-g -dA -fno-eliminate-unused-debug-types 
-fno-debug-types-section" }
 // { dg-do compile }
 
 // There should be 2 real instances of byte_size -- one for the
Index: testsuite/g++.dg/debug/dwarf2/static-data-member1.C
===
--- testsuite/g++.dg/debug/dwarf2/static-data-member1.C (revision 198034)
+++ testsuite/g++.dg/debug/dwarf2/static-data-member1.C (working copy)
@@ -1,5 +1,5 @@
 // { dg-do compile }
-// { dg-options "-g -dA -fno-merge-debug-strings" }
+// { dg-options "-g -dA -fno-merge-debug-strings -fno-debug-types-section" }
 
 struct A
 {
Index: testsuite/g++.dg/debug/dwarf2/global-used-types-1.C
===
--- testsuite/g++.dg/debug/dwarf2/global-used-types-1.C (revision 198034)
+++ testsuite/g++.dg/debug/dwarf2/global-used-types-1.C (working copy)
@@ -1,5 +1,5 @@
 // Contributed by Dodji Seketeli 
-// { dg-options "-g -dA -fno-merge-debug-strings" }
+// { dg-options "-g -dA -fno-merge-debug-strings -fno-debug-types-section" }
 // { dg-do compile }
 // { dg-final { scan-assembler-times "DIE \\(0x\[^\n\]*\\) 
DW_TAG_enumeration_type" 1 } }
 // { dg-final { scan-assembler-times "DIE \\(0x\[^\n\]*\\) DW_TAG_enumerator" 
2 } }
Index: testsuite/g++.dg/debug/dwarf2/self-ref-1.C
===
--- testsuite/g++.dg/debug/dwarf2/self-ref-1.C  (revision 198034)
+++ testsuite/g++.dg/debug/dwarf2/self-ref-1.C  (working copy)
@@ -1,6 +1,6 @@
 // Origin: PR debug/45088
 // { dg-do compile }
-// { dg-options "-g -dA" }
+// { dg-options "-g -dA -fno-debug-types-section" }
 // { dg-final { scan-assembler-times 
"\[^\n\r\]*\\(DIE\[^\n\r\]*DW_TAG_pointer_type\\)\[\n\r\]{1,2}\[^\n\r\]*DW_AT_byte_size\[\n\r\]{1,2}\[^\n\r\]*DW_AT_type"
 4 } }
 
 struct A
Index: testsuite/g++.dg/debug/dwarf2/nested-2.C
===
--- testsuite/g++.dg/debug/dwarf2/nested-2.C(revision 198034)
+++ testsuite/g++.dg/debug/dwarf2/nested-2.C(working copy)
@@ -1,6 +1,6 @@
 /*
   Origin: PR debug/45024
-  { dg-options "-g -dA -fno-merge-debug-strings" }
+  { dg-options "-g -dA -fno-merge-debug-strings -fno-debug-types-section" }
   { dg-do compile }
 */
 
Index: testsuite/g++.dg/debug/dwarf2/typedef1.C
===
--- testsuite/g++.dg/debug/dwarf2/typedef1.C(revision 198034)
+++ testsuite/g++.dg/debug/dwarf2/typedef1.C(working copy)
@@ -1,6 +1,6 @@
 // Contributed by Dodji Seketeli 
 // Origin: PR c++/40705
-// { dg-options "-g -dA" }
+// { dg-options "-g -dA -fno-debug-types-section" }
 // { dg-do compile }
 // { dg-final { scan-assembler-times "DW_T

[patch cygwin]: Add missing 64-bit cygwin triplet to config.gcc

[Kai Tietz]

Hi,

an
ChangeLog

2013-04-18  Kai Tietz  

* config.gcc: Add x86_64-*-cygwin triplet.

Tested for x86_64-pc-cygwin.  I will apply it tomorrow, if there are
no objections.

Kai

Index: config.gcc
===
--- config.gcc  (Revision 197997)
+++ config.gcc  (Arbeitskopie)
@@ -3722,8 +3722,10 @@
;;
i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)
;;
-   i[34567]86-*-cygwin* | i[34567]86-*-mingw* | x86_64-*-mingw*)
+   i[34567]86-*-cygwin* | x86_64-*-cygwin*)
;;
+   i[34567]86-*-mingw* | x86_64-*-mingw*)
+   ;;
i[34567]86-*-freebsd* | x86_64-*-freebsd*)
;;
ia64*-*-linux*)

[contrib]: Loosen check of build directory in validate_failures.py

[Diego Novillo]

Some cross targets have different build directory names that those 
expected by the script.  I loosened the check by simply making it check 
for the actual values we care to get out of the Makefile. This should 
remove some false positives we've been getting.


Committed to trunk.  Will backport to google/gcc-4_8 shortly.


Diego.

commit 6f25227972527ea90b61de84b283d840dcc49004
Author: dnovillo 
Date:   Thu Apr 18 18:11:05 2013 +

Loosen check for build directory.

* validate_failures.py: Loosen check for build directory.
State what failed if we couldn't find the source tree or
the target triplet.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198064 
138bc75d-0d04-0410-96

1f-82ee72b054a4

diff --git a/contrib/testsuite-management/validate_failures.py 
b/contrib/testsuite-management/validate_failures.py

index 74dbcfb..aa71c94 100755
--- a/contrib/testsuite-management/validate_failures.py
+++ b/contrib/testsuite-management/validate_failures.py
@@ -196,11 +196,9 @@ def GetMakefileValue(makefile_name, value_name):
   return None


-def ValidBuildDirectory(builddir, target):
+def ValidBuildDirectory(builddir):
   if (not os.path.exists(builddir) or
-  not os.path.exists('%s/Makefile' % builddir) or
-  (not os.path.exists('%s/build-%s' % (builddir, target)) and
-   not os.path.exists('%s/%s' % (builddir, target:
+  not os.path.exists('%s/Makefile' % builddir)):
 return False
   return True

@@ -362,14 +360,17 @@ def GetManifestPath(srcdir, target, 
user_provided_must_exist):

   Error('Manifest does not exist: %s' % manifest_path)
 return manifest_path
   else:
-assert srcdir and target
+if not srcdir:
+  Error('Could not determine where the location of GCC\'s source 
tree. '

+'The Makefile does not contain a definition for "srcdir".')
+if not target:
+  Error('Could not determine the target triplet for this build. '
+'The Makefile does not contain a definition for 
"target_alias".')

 return _MANIFEST_PATH_PATTERN % (srcdir, _MANIFEST_SUBDIR, target)


 def GetBuildData():
-  srcdir = GetMakefileValue('%s/Makefile' % _OPTIONS.build_dir, 'srcdir =')
-  target = GetMakefileValue('%s/Makefile' % _OPTIONS.build_dir, 
'target_alias=')

-  if not ValidBuildDirectory(_OPTIONS.build_dir, target):
+  if not ValidBuildDirectory(_OPTIONS.build_dir):
 # If we have been given a set of results to use, we may
 # not be inside a valid GCC build directory.  In that case,
 # the user must provide both a manifest file and a set
@@ -380,6 +381,8 @@ def GetBuildData():
 _OPTIONS.build_dir)
 else:
   return None, None
+  srcdir = GetMakefileValue('%s/Makefile' % _OPTIONS.build_dir, 'srcdir =')
+  target = GetMakefileValue('%s/Makefile' % _OPTIONS.build_dir, 
'target_alias=')

   print 'Source directory: %s' % srcdir
   print 'Build target: %s' % target
   return srcdir, target

Re: [Patch] [MIPS] Fix Many warnings in MIPS port (Was: [PATCH] [MIPS] microMIPS gcc support)

[David Daney]

On 04/14/2013 01:27 PM, Moore, Catherine wrote:




-Original Message-
From: David Daney [mailto:ddaney.c...@gmail.com]
Sent: Friday, April 12, 2013 7:29 PM
To: Moore, Catherine
Cc: Rozycki, Maciej; gcc-patches@gcc.gnu.org; Richard Sandiford
Subject: Re: [Patch] [MIPS] Fix Many warnings in MIPS port (Was: [PATCH]
[MIPS] microMIPS gcc support)

On 04/12/2013 03:07 PM, Moore, Catherine wrote:

Hi David,
Please try the attached patch.  Is this OK to checkin?


I don't think it is correct...


And you would be right.  I attached the wrong patch.  Try this one instead:

Index: configure
===
--- configure   (revision 197950)
+++ configure   (working copy)
@@ -17830,7 +17830,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 17831 "configure"
+#line 17833 "configure"
  #include "confdefs.h"

  #if HAVE_DLFCN_H
@@ -17936,7 +17936,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 17937 "configure"
+#line 17939 "configure"
  #include "confdefs.h"

  #if HAVE_DLFCN_H
@@ -25766,7 +25766,7 @@
gcc_cv_as_micromips_support=no
if test x$gcc_cv_as != x; then
  $as_echo '.set micromips' > conftest.s
-if { ac_try='$gcc_cv_as $gcc_cv_as_flags  -o conftest.o conftest.s >&5'
+if { ac_try='$gcc_cv_as $gcc_cv_as_flags --fatal-warnings -o conftest.o 
conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
Index: configure.ac
===
--- configure.ac(revision 197950)
+++ configure.ac(working copy)
@@ -4058,7 +4058,7 @@
   [Define if your assembler supports .gnu_attribute.])])

  gcc_GAS_CHECK_FEATURE([.micromips support],
-  gcc_cv_as_micromips_support,,,
+  gcc_cv_as_micromips_support,,[--fatal-warnings],
[.set micromips],,
[AC_DEFINE(HAVE_GAS_MICROMIPS, 1,
[Define if your assembler supports the .set micromips directive])])


Sorry for the confusion.
Catherine



Your e-mail client mangled it as Content-Transfer-Encoding: 
quoted-printable, so I had to manually apply it.  But after doing that, 
it does seem to have the desired effect.


So I would say:  Please apply it (After getting somebody to approve it).

Thanks,
David Daney

[patch] Fix test failure with -fdebug-types-section.

[Cary Coutant]

I'm committing the following patch to fix a debug test failure when
-fdebug-types-section is on.

With -fdebug-types-section, GCC fails to emit enumerators into the
pubnames table when the enumerator type has been moved to a separate
type unit. In output_pubnames, we're checking to see if the type has
been pruned by checking die_mark, but at this point in the compilation,
die_mark is set only for DIEs in the main compilation unit. I've
changed the code to check for the die_perennial_p flag on the
enumerator_type DIE.

I've cloned the pubnames-2.C test case so that we test the pubnames
table generation with both -fno-debug-types-section and
-fdebug-types-section.

Bootstrapped on x86_64 with no new regressions.

-cary


2013-04-18   Cary Coutant  

gcc/
* dwarf2out.c (output_pubnames ):

gcc/testsuite/
* g++.dg/debug/dwarf2/pubnames-2.C: Add -fno-debug-types-section.
* g++.dg/debug/dwarf2/pubnames-3.C: New test case.


Index: gcc/dwarf2out.c
===
--- gcc/dwarf2out.c (revision 198034)
+++ gcc/dwarf2out.c (working copy)
@@ -9018,11 +9018,13 @@ output_pubnames (vecdie->die_tag == DW_TAG_enumerator && !pub->die->die_mark)
+  if (pub->die->die_tag == DW_TAG_enumerator &&
+  (pub->die->die_parent == NULL
+  || !pub->die->die_parent->die_perennial_p))
 continue;
 
   /* We shouldn't see pubnames for DIEs outside of the main CU.  */
-  if (names == pubname_table)
+  if (names == pubname_table && pub->die->die_tag != DW_TAG_enumerator)
gcc_assert (pub->die->die_mark);
 
   if (names != pubtype_table
Index: gcc/testsuite/g++.dg/debug/dwarf2/pubnames-3.C
===
--- gcc/testsuite/g++.dg/debug/dwarf2/pubnames-3.C  (revision 0)
+++ gcc/testsuite/g++.dg/debug/dwarf2/pubnames-3.C  (revision 0)
@@ -0,0 +1,193 @@
+// { dg-do compile }
+// { dg-options "-gpubnames -gdwarf-4 -fdebug-types-section -std=c++0x -dA" }
+// { dg-final { scan-assembler-times "\.section\[\t \]\[^\n\]*debug_pubnames" 
1 } }
+// { dg-final { scan-assembler "\"\\(anonymous namespace\\)0\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"one0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"one::G_A0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"one::G_B0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"one::G_C0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"one::\\(anonymous namespace\\)0\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"two0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"F_A0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"F_B0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"F_C0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"inline_func_10\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"one::c1::c10\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"one::c1::~c10\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"one::c1::val0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"check_enum0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"main0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"two::c2::c20\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"two::c2::c20\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"two::c2::c20\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"check0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"check \\>0\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"check \\>0\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"check \\>0\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"two::c2::val0\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"two::c2::val0\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"two::c2::val0\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler 
"\"__static_initialization_and_destruction_00\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
+// { dg-final { scan-assembler "\"two::c2::~c20\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
+// { dg-final { scan-assembler "\"two::c2::~c20\"+\[ 
\t\]+\[#;/

Re: [patch] Fix test failure with -fdebug-types-section.

[Cary Coutant]

> 2013-04-18   Cary Coutant  
>
> gcc/
> * dwarf2out.c (output_pubnames ):
>
> gcc/testsuite/
> * g++.dg/debug/dwarf2/pubnames-2.C: Add -fno-debug-types-section.
> * g++.dg/debug/dwarf2/pubnames-3.C: New test case.

Sorry, I didn't get the complete ChangeLog entry into the email. The
dwarf2out.c entry should be:

* dwarf2out.c (output_pubnames): Check die_perennial_p of
parent instead of die_mark.

-cary

[Patch, Fortran, committed] Plug some memory leaks

[Tobias Burnus]

Another batch of issues found by Coverity - this time only memory leaks.

Committed as Rev. 198068 after build + regtesting on x86-64-gnu-linux.

Tobias
2013-04-18  Tobias Burnus  

	* expr.c (find_array_element): Don't copy expr.
	* data.c (create_character_initializer): Free expr.
	* frontend-passes.c (combine_array_constructor): Ditto.
	* match.c (match_typebound_call, gfc_match_select_type): Ditto.
	* resolve.c (resolve_typebound_function): Free gfc_ref.

diff --git a/gcc/fortran/data.c b/gcc/fortran/data.c
index f297ef5..a1c89fa 100644
--- a/gcc/fortran/data.c
+++ b/gcc/fortran/data.c
@@ -93,60 +93,66 @@ find_con_by_component (gfc_component *com, gfc_constructor_base base)
 
   return NULL;
 }
 
 
 /* Create a character type initialization expression from RVALUE.
TS [and REF] describe [the substring of] the variable being initialized.
INIT is the existing initializer, not NULL.  Initialization is performed
according to normal assignment rules.  */
 
 static gfc_expr *
 create_character_initializer (gfc_expr *init, gfc_typespec *ts,
 			  gfc_ref *ref, gfc_expr *rvalue)
 {
   int len, start, end;
   gfc_char_t *dest;
+  bool alloced_init = false;
 	
   gfc_extract_int (ts->u.cl->length, &len);
 
   if (init == NULL)
 {
   /* Create a new initializer.  */
   init = gfc_get_character_expr (ts->kind, NULL, NULL, len);
   init->ts = *ts;
+  alloced_init = true;
 }
 
   dest = init->value.character.string;
 
   if (ref)
 {
   gfc_expr *start_expr, *end_expr;
 
   gcc_assert (ref->type == REF_SUBSTRING);
 
   /* Only set a substring of the destination.  Fortran substring bounds
 	 are one-based [start, end], we want zero based [start, end).  */
   start_expr = gfc_copy_expr (ref->u.ss.start);
   end_expr = gfc_copy_expr (ref->u.ss.end);
 
   if ((!gfc_simplify_expr(start_expr, 1))
 	  || !(gfc_simplify_expr(end_expr, 1)))
 	{
 	  gfc_error ("failure to simplify substring reference in DATA "
 		 "statement at %L", &ref->u.ss.start->where);
+	  gfc_free_expr (start_expr);
+	  gfc_free_expr (end_expr);
+	  if (alloced_init)
+	gfc_free_expr (init);
 	  return NULL;
 	}
 
   gfc_extract_int (start_expr, &start);
   gfc_free_expr (start_expr);
   start--;
   gfc_extract_int (end_expr, &end);
   gfc_free_expr (end_expr);
 }
   else
 {
   /* Set the whole string.  */
   start = 0;
   end = len;
 }
 
diff --git a/gcc/fortran/expr.c b/gcc/fortran/expr.c
index 490cdaa..ab62c18 100644
--- a/gcc/fortran/expr.c
+++ b/gcc/fortran/expr.c
@@ -1196,33 +1196,33 @@ find_array_element (gfc_constructor_base base, gfc_array_ref *ar,
   e = NULL;
 
   mpz_init_set_ui (offset, 0);
   mpz_init (delta);
   mpz_init (tmp);
   mpz_init_set_ui (span, 1);
   for (i = 0; i < ar->dimen; i++)
 {
   if (!gfc_reduce_init_expr (ar->as->lower[i])
 	  || !gfc_reduce_init_expr (ar->as->upper[i]))
 	{
 	  t = false;
 	  cons = NULL;
 	  goto depart;
 	}
 
-  e = gfc_copy_expr (ar->start[i]);
+  e = ar->start[i];
   if (e->expr_type != EXPR_CONSTANT)
 	{
 	  cons = NULL;
 	  goto depart;
 	}
 
   gcc_assert (ar->as->upper[i]->expr_type == EXPR_CONSTANT
 		  && ar->as->lower[i]->expr_type == EXPR_CONSTANT);
 
   /* Check the bounds.  */
   if ((ar->as->upper[i]
 	   && mpz_cmp (e->value.integer,
 		   ar->as->upper[i]->value.integer) > 0)
 	  || (mpz_cmp (e->value.integer,
 		   ar->as->lower[i]->value.integer) < 0))
 	{
@@ -1245,34 +1245,32 @@ find_array_element (gfc_constructor_base base, gfc_array_ref *ar,
 
   for (cons = gfc_constructor_first (base), nelemen = mpz_get_ui (offset);
cons && nelemen > 0; cons = gfc_constructor_next (cons), nelemen--)
 {
   if (cons->iterator)
 	{
 	  cons = NULL;
 	  goto depart;
 	}
 }
 
 depart:
   mpz_clear (delta);
   mpz_clear (offset);
   mpz_clear (span);
   mpz_clear (tmp);
-  if (e)
-gfc_free_expr (e);
   *rval = cons;
   return t;
 }
 
 
 /* Find a component of a structure constructor.  */
 
 static gfc_constructor *
 find_component_ref (gfc_constructor_base base, gfc_ref *ref)
 {
   gfc_component *comp;
   gfc_component *pick;
   gfc_constructor *c = gfc_constructor_first (base);
 
   comp = ref->u.c.sym->components;
   pick = ref->u.c.component;
diff --git a/gcc/fortran/frontend-passes.c b/gcc/fortran/frontend-passes.c
index 3946c0c..68e7e05 100644
--- a/gcc/fortran/frontend-passes.c
+++ b/gcc/fortran/frontend-passes.c
@@ -1060,32 +1060,33 @@ combine_array_constructor (gfc_expr *e)
 	  new_expr->value.op.op1 = gfc_copy_expr (scalar);
 	  new_expr->value.op.op2 = gfc_copy_expr (c->expr);
 	}
   else
 	{
 	  new_expr->value.op.op1 = gfc_copy_expr (c->expr);
 	  new_expr->value.op.op2 = gfc_copy_expr (scalar);
 	}
 
   new_c = gfc_constructor_append_expr (&newbase, new_expr, &(e->where));
   new_c->iterator = c->iterator;
   c->iterator = NULL;
 }
 
   gfc_free_expr (op1);
   gfc_free_expr (op2);
+  g

[PATCH, i386]: Simplify *call_value_rex64_ms_sysv and *call_rex64_ms_sysv.

[Uros Bizjak]

Hello!

Attached patch avoids explicit clobbers in *call_value_rex64_ms_sysv
and *call_rex64_ms_sysv by introducing call_rex64_ms_sysv_operation
predicate. In addition to simplified pattern, the insn RTX pattern is
now constructed from the same array as it is generated from.

2013-04-18  Uros Bizjak  

* config/i386/i386.c (x86_64_ms_sysv_extra_clobbered_registers):
New array.
(ix86_expand_call): Remove clobbered_registers array and use
x86_64_ms_sysv_extra_clobbered_registers instead.
* config/i386/i386.h (x86_64_ms_sysv_extra_clobbered_registers):
Declare here.
* config/i386/predicates.md (call_rex64_ms_sysv_operation): New
predicate.
* config/i386/i386.md (*call_rex64_ms_sysv): Use
call_rex64_ms_sysv_operation predicate.  Remove explicit clobbers.
(*call_value_rex64_ms_sysv): Ditto.

Tested on x86_64-pc-linux-gnu {,-m32}  and committed to mainline SVN.

Uros.
Index: config/i386/i386.c
===
--- config/i386/i386.c  (revision 198056)
+++ config/i386/i386.c  (working copy)
@@ -2216,6 +2216,16 @@ static int const x86_64_int_return_registers[4] =
   AX_REG, DX_REG, DI_REG, SI_REG
 };
 
+/* Additional registers that are clobbered by SYSV calls.  */
+
+int const x86_64_ms_sysv_extra_clobbered_registers[12] =
+{
+  SI_REG, DI_REG,
+  XMM6_REG, XMM7_REG,
+  XMM8_REG, XMM9_REG, XMM10_REG, XMM11_REG,
+  XMM12_REG, XMM13_REG, XMM14_REG, XMM15_REG
+};
+
 /* Define the structure for the machine field in struct function.  */
 
 struct GTY(()) stack_local_entry {
@@ -23704,17 +23714,10 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx call
  rtx callarg2,
  rtx pop, bool sibcall)
 {
-  /* We need to represent that SI and DI registers are clobbered
- by SYSV calls.  */
-  static int clobbered_registers[] = {
-   XMM6_REG, XMM7_REG, XMM8_REG,
-   XMM9_REG, XMM10_REG, XMM11_REG,
-   XMM12_REG, XMM13_REG, XMM14_REG,
-   XMM15_REG, SI_REG, DI_REG
-  };
-  rtx vec[ARRAY_SIZE (clobbered_registers) + 3];
+  int const cregs_size = ARRAY_SIZE (x86_64_ms_sysv_extra_clobbered_registers);
+  rtx vec[3 + cregs_size];
   rtx use = NULL, call;
-  unsigned int vec_len;
+  unsigned int vec_len = 0;
 
   if (pop == const0_rtx)
 pop = NULL;
@@ -23730,8 +23733,10 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx call
   else
 {
   /* Static functions and indirect calls don't need the pic register.  */
-  if (flag_pic && (!TARGET_64BIT
-   || (ix86_cmodel == CM_LARGE_PIC && DEFAULT_ABI != 
MS_ABI))
+  if (flag_pic
+ && (!TARGET_64BIT
+ || (ix86_cmodel == CM_LARGE_PIC
+ && DEFAULT_ABI != MS_ABI))
  && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF
  && ! SYMBOL_REF_LOCAL_P (XEXP (fnaddr, 0)))
use_reg (&use, pic_offset_table_rtx);
@@ -23758,7 +23763,6 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx call
   fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (word_mode, fnaddr));
 }
 
-  vec_len = 0;
   call = gen_rtx_CALL (VOIDmode, fnaddr, callarg1);
   if (retval)
 call = gen_rtx_SET (VOIDmode, retval, call);
@@ -23779,12 +23783,14 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx call
   vec[vec_len++] = gen_rtx_UNSPEC (VOIDmode, gen_rtvec (1, const0_rtx),
   UNSPEC_MS_TO_SYSV_CALL);
 
-  for (i = 0; i < ARRAY_SIZE (clobbered_registers); i++)
-   vec[vec_len++]
- = gen_rtx_CLOBBER (VOIDmode,
-gen_rtx_REG (SSE_REGNO_P (clobbered_registers[i])
- ? TImode : DImode,
- clobbered_registers[i]));
+  for (i = 0; i < cregs_size; i++)
+   {
+ int regno = x86_64_ms_sysv_extra_clobbered_registers[i];
+ enum machine_mode mode = SSE_REGNO_P (regno) ? TImode : DImode;
+
+ vec[vec_len++]
+   = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno));
+   }
 }
 
   if (vec_len > 1)
Index: config/i386/i386.h
===
--- config/i386/i386.h  (revision 198056)
+++ config/i386/i386.h  (working copy)
@@ -1963,6 +1963,8 @@ extern int const dbx_register_map[FIRST_PSEUDO_REG
 extern int const dbx64_register_map[FIRST_PSEUDO_REGISTER];
 extern int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER];
 
+extern int const x86_64_ms_sysv_extra_clobbered_registers[12];
+
 /* Before the prologue, RA is at 0(%esp).  */
 #define INCOMING_RETURN_ADDR_RTX \
   gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
Index: config/i386/i386.md
===
--- config/i386/i386.md (revision 198056)
+++ config/i386/i386.md (working copy)
@@ -10903,21 +10903,10 @@
   [(set_attr "type" "call")])
 
 (define_insn "*call_rex64_ms_sysv"
-  [(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rzw"))
-

[patch][google/gcc-4_7] Suppress failure in gcc.dg/lto/20100430-1 on powerpc and powerpc64

[Paul Pluzhnikov]

Greetings,

I've commited the patch below on google/gcc-4_7 branch (r198071) to XFAILs
gcc.dg/lto/20100430-1 on powerpc*.




Index: contrib/testsuite-management/powerpc64-grtev3-linux-gnu.xfail
===
--- contrib/testsuite-management/powerpc64-grtev3-linux-gnu.xfail   
(revision 198055)
+++ contrib/testsuite-management/powerpc64-grtev3-linux-gnu.xfail   
(working copy)
@@ -1,3 +1,6 @@
+# ICE to be reported upstream
+FAIL: gcc.dg/lto/20100430-1 c_lto_20100430-1_0.o-c_lto_20100430-1_0.o link, 
-O2 -fprofile-arcs -flto -r -nostdlib (internal compiler error)
+UNRESOLVED: gcc.dg/lto/20100430-1 c_lto_20100430-1_0.o-c_lto_20100430-1_0.o 
execute -O2 -fprofile-arcs -flto -r -nostdlib
 # Marked test failures for v16-powerpc64 toolchain built from
 # v16 release branch @64346, and v16 dev branch @64533.
 # *** gcc:
Index: contrib/testsuite-management/powerpc-grtev3-linux-gnu.xfail
===
--- contrib/testsuite-management/powerpc-grtev3-linux-gnu.xfail (revision 
198055)
+++ contrib/testsuite-management/powerpc-grtev3-linux-gnu.xfail (working copy)
@@ -1,3 +1,6 @@
+# ICE to be reported upstream
+FAIL: gcc.dg/lto/20100430-1 c_lto_20100430-1_0.o-c_lto_20100430-1_0.o link, 
-O2 -fprofile-arcs -flto -r -nostdlib (internal compiler error)
+UNRESOLVED: gcc.dg/lto/20100430-1 c_lto_20100430-1_0.o-c_lto_20100430-1_0.o 
execute -O2 -fprofile-arcs -flto -r -nostdlib
 # Ignore r194995 for gcc pr55852.
 FAIL: gfortran.dg/intrinsic_size_3.f90 -O   scan-tree-dump-times original 
"iszs = \\(integer\\(kind=2\\)\\) MAX_EXPR <\\(D.->dim.0..ubound - 
D.->dim.0..lbound\\) \\+ 1, 0>;" 1
 # Ignore gcc pr54127.

Re: RFA: enable LRA for rs6000 [patch for WRF]

[Vladimir Makarov]

On 04/17/2013 12:10 PM, Michael Meissner wrote:

On Wed, Apr 17, 2013 at 10:14:53AM -0400, Vladimir Makarov wrote:

Mike, thanks for the patch and all the SPEC2006 data  (which are
very useful as I have no access to power machine which can be used
for benchmarking).  I guess that may be some benchmark scores are
lower because of LRA lacks some micro-optimizations which reload
implements through many power hooks (e.g. LRA does not use push
reload).  Although sometimes it is not a bad thing (e.g. LRA does
not use  SECONDARY_MEMORY_NEEDED_RTX which permits to reuse the
stack slots for other useful things).

SECONDARY_MEMORY_NEEDED_RTX is needed for SDmode on machines before the power7,
where we need a larger stack slot to hold spilled SDmode values (power6 did not
have the LFIWZX instruction that is needed to load SDmode values into floating
point registers).

Thanks for the info.

In general I got impression that power7 is the most difficult port
for LRA.  If we manage to port it, LRA ports for other targets will
be easier.

I dunno, has LRA been ported to the SH yet?

Not yet.

Sorry for be inaccurate.  I meant 9 targets which I worked on to port LRA.

I also reproduced bootstrap failure --with-cpu=power7 and I am going
to work on this and after that on SPEC2006 you wrote about.


The bootstrap problem was in processing move whose operand was 
substituted by equiv. memory and the move needs secondary reload through 
a provided insn pattern.  The equiv memory was not legitimate and it 
resulted in failure to generated the secondary reload insn.


LRA can fix the wrong address but secondary reload  was done before 
processing addresses.  It could be fixed in rs6000.c code too but it is 
complicated and I found a better (and i think more right) solution by 
moving secondary reload generation after address processing.


Here is the patch for your branch (patch for trunk is a bit different as 
some changes in affected code were done on trunk).


2013-04-18  Vladimir Makarov  

* lra-constraints.c (check_and_process_move): Move code for move
cost check to simple_move_p.  Remove equiv_substitution.
(simple_move_p): New function.
(curr_insn_transform): Use the new function.  Move call of
check_and_process_move after operand equiv substitution and
address process.

Tomorrow I am going to look at SPEC2006 dealII crash for 32-bit mode.

Index: lra-constraints.c
===
--- lra-constraints.c   (revision 198028)
+++ lra-constraints.c   (working copy)
@@ -887,14 +887,6 @@ check_and_process_move (bool *change_p,
   lra_assert (curr_insn_set != NULL_RTX);
   dreg = dest = SET_DEST (curr_insn_set);
   sreg = src = SET_SRC (curr_insn_set);
-  /* Quick check on the right move insn which does not need
- reloads.  */
-  if ((dclass = get_op_class (dest)) != NO_REGS
-  && (sclass = get_op_class (src)) != NO_REGS
-  /* The backend guarantees that register moves of cost 2 never
-need reloads.  */
-  && targetm.register_move_cost (GET_MODE (src), dclass, sclass) == 2)
-return true;
   if (GET_CODE (dest) == SUBREG)
 dreg = SUBREG_REG (dest);
   if (GET_CODE (src) == SUBREG)
@@ -902,7 +894,6 @@ check_and_process_move (bool *change_p,
   if (! REG_P (dreg) || ! REG_P (sreg))
 return false;
   sclass = dclass = NO_REGS;
-  dreg = get_equiv_substitution (dreg);
   if (REG_P (dreg))
 dclass = get_reg_class (REGNO (dreg));
   if (dclass == ALL_REGS)
@@ -916,7 +907,6 @@ check_and_process_move (bool *change_p,
 return false;
   sreg_mode = GET_MODE (sreg);
   old_sreg = sreg;
-  sreg = get_equiv_substitution (sreg);
   if (REG_P (sreg))
 sclass = get_reg_class (REGNO (sreg));
   if (sclass == ALL_REGS)
@@ -2693,6 +2683,24 @@ emit_inc (enum reg_class new_rclass, rtx
   return result;
 }
 
+/* Return true if the current move insn does not need processing as we
+   already know that it satisfies its constraints.  */
+static bool
+simple_move_p (void)
+{
+  rtx dest, src;
+  enum reg_class dclass, sclass;
+
+  lra_assert (curr_insn_set != NULL_RTX);
+  dest = SET_DEST (curr_insn_set);
+  src = SET_SRC (curr_insn_set);
+  return ((dclass = get_op_class (dest)) != NO_REGS
+ && (sclass = get_op_class (src)) != NO_REGS
+ /* The backend guarantees that register moves of cost 2
+never need reloads.  */
+ && targetm.register_move_cost (GET_MODE (src), dclass, sclass) == 2);
+ }
+
 /* Swap operands NOP and NOP + 1. */
 static inline void
 swap_operands (int nop)
@@ -2736,15 +2744,13 @@ curr_insn_transform (void)
   int max_regno_before;
   int reused_alternative_num;
 
+  curr_insn_set = single_set (curr_insn);
+  if (curr_insn_set != NULL_RTX && simple_move_p ())
+return false;
+
   no_input_reloads_p = no_output_reloads_p = false;
   goal_alt_number = -1;
-
   change_p = sec_mem_p = false;
-  curr_insn_set = single_set (curr_insn);
-  if (curr_insn_set != 

Re: RFA: enable LRA for rs6000 [patch for WRF]

[Michael Meissner]

On Thu, Apr 18, 2013 at 04:44:21PM -0400, Vladimir Makarov wrote:
> LRA can fix the wrong address but secondary reload  was done before
> processing addresses.  It could be fixed in rs6000.c code too but it
> is complicated and I found a better (and i think more right)
> solution by moving secondary reload generation after address
> processing.

I tended to think secondary_reload should always happen after address
processing.

> Here is the patch for your branch (patch for trunk is a bit
> different as some changes in affected code were done on trunk).
> 
> 2013-04-18  Vladimir Makarov  
> 
> * lra-constraints.c (check_and_process_move): Move code for move
> cost check to simple_move_p.  Remove equiv_substitution.
> (simple_move_p): New function.
> (curr_insn_transform): Use the new function.  Move call of
> check_and_process_move after operand equiv substitution and
> address process.
> 
> Tomorrow I am going to look at SPEC2006 dealII crash for 32-bit mode.
> 

Thanks for the patch.  Unfortunately I just updated the branch to be merged up
to 198065.  So if you could send me a patch against current trunk, or update
the branch (branches/ibm/meissner-lra) and check it into the branch, it would
be appreciated.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797

[PATCH, AArch64] Update definitions of _FP_W_TYPE and _FP_WS_TYPE in libgcc to be based on 'long long'

[Yufeng Zhang]

Hi,

The patch changes _FP_W_TYPE and _FP_WS_TYPE in AArch64 libgcc to be 
based on 'long long', making them ILP32-friendly.  x86_64 has the 
definitions.


OK for the trunk?

Thanks,
Yufeng

libgcc/

2013-04-18  Yufeng Zhang  

* config/aarch64/sfp-machine.h (_FP_W_TYPE): Change to define
as 'unsigned long long' instead of 'unsigned long'.
(_FP_WS_TYPE): Change to define as 'signed long long' instead of
'signed long'.diff --git a/libgcc/config/aarch64/sfp-machine.h b/libgcc/config/aarch64/sfp-machine.h
index 9977308..456bea4 100644
--- a/libgcc/config/aarch64/sfp-machine.h
+++ b/libgcc/config/aarch64/sfp-machine.h
@@ -19,8 +19,8 @@
.  */
 
 #define _FP_W_TYPE_SIZE		64
-#define _FP_W_TYPE		unsigned long
-#define _FP_WS_TYPE		signed long
+#define _FP_W_TYPE		unsigned long long
+#define _FP_WS_TYPE		signed long long
 #define _FP_I_TYPE		int
 
 typedef int TItype __attribute__ ((mode (TI)));

[GOOGLE] Fix the LIPO support in AutoFDO

[Dehao Chen]

This patch fixes LIPO support in AutoFDO.

Bootstrapped and passed regression tests.

OK for google-4_7 branch?

Thanks,
Dehao

Index: gcc/coverage.c
===
--- gcc/coverage.c (revision 198056)
+++ gcc/coverage.c (working copy)
@@ -2857,7 +2857,7 @@ coverage_init (const char *filename, const char* s
   strcat (main_input_file_name, source_name);
 }

-  if (flag_branch_probabilities)
+  if (flag_branch_probabilities && !flag_auto_profile)
 read_counts_file (da_file_name, 0);

   /* Reads at most one auxiliary GCDA file since we don't support merging */
Index: gcc/auto-profile.c
===
--- gcc/auto-profile.c (revision 198057)
+++ gcc/auto-profile.c (working copy)
@@ -1850,6 +1850,13 @@ auto_profile (void)
   pop_cfun ();
 }

+  cgraph_pre_profiling_inlining_done = true;
+  cgraph_process_module_scope_statics ();
+  /* Now perform link to allow cross module inlining.  */
+  cgraph_do_link ();
+  varpool_do_link ();
+  cgraph_unify_type_alias_sets ();
+
   return TODO_rebuild_cgraph_edges;
 }

[patch rfa] Fix PCH test failure when -fdebug-types-section is enabled

[Cary Coutant]

If I turn on -fdebug-types-section, I get a failure in the PCH tests:

FAIL: g++.dg/pch/system-2.C -O2 -g assembly comparison

This appears to be the result of differences in hash table traversal
during debug output (same output, slightly different order), so I'm
thinking it's just luck that it works under the default conditions.
The following patch fixes the problem, simply by forcing
-fno-debug-types-section for all PCH tests, but I see no fundamental
reason why that should be necessary. If anyone has any advice for how
to solve the underlying problem, I'd appreciate it.

-cary


Index: lib/dg-pch.exp
===
--- lib/dg-pch.exp  (revision 198068)
+++ lib/dg-pch.exp  (working copy)
@@ -139,5 +139,5 @@ proc dg-flags-pch { subdir test otherfla
 }

 proc dg-pch { subdir test options suffix } {
-  return [dg-flags-pch $subdir $test "" $options $suffix]
+  return [dg-flags-pch $subdir $test "-fno-debug-types-section"
$options $suffix]
 }

Re: [PATCH, PR 10474] Shedule pass_cprop_hardreg before pass_thread_prologue_and_epilogue

[Martin Jambor]

Hi,

On Wed, Apr 17, 2013 at 12:43:59PM -0600, Jeff Law wrote:
> On 04/17/2013 09:49 AM, Martin Jambor wrote:
> >
> >The reason why it helps so much is that before register allocation
> >there are instructions moving the value of actual arguments from
> >"originally hard" register (e.g. SI, DI, etc.) to a pseudo at the
> >beginning of each function.  When the argument is live across a
> >function call, the pseudo is likely to be assigned to a callee-saved
> >register and then also accessed from that register, even in the first
> >BB, making it require prologue, though it could be fetched from the
> >original one.  When we convert all uses (at least in the first BB) to
> >the original register, the preparatory stage of shrink wrapping is
> >often capable of moving the register moves to a later BB, thus
> >creating fast paths which do not require prologue and epilogue.
> I noticed similar effects when looking at range splitting.  Being
> able to move those calls into a deeper control level in the CFG
> would definitely be an improvement.
> 
> >
> >We believe this change in the pipeline should not bring about any
> >negative effects.  During gcc bootstrap, the number of instructions
> >changed by pass_cprop_hardreg dropped but by only 1.2%.  We have also
> >ran SPEC 2006 CPU benchmarks on recent Intel and AMD hardware and all
> >run time differences could be attributed to noise.  The changes in
> >binary sizes were also small:

> Did anyone ponder just doing the hard register propagation on
> argument registers prior the prologue/epilogue handling, then the
> full blown propagation pass in its current location in the pipeline?

I did not because I did not think it would be substantially faster
than running the pass as-is twice.  I may be wrong but it would still
had to look at all statements and examine them at very similar level
of detail (to look for clobbers and manage value_data_entry chains)
and it would not really do that much less work fiddling with its own
data structures.

What would very likely be a working alternative for shrink-wrapping is
to have shrink-wrapping preparation invoke copyprop_hardreg_forward_1
on the first BB and the few BBs it tries to move stuff across.  But of
course that would be a bit ugly and so I think we should do it only if
there is a reason not to move the pass (or schedule it twice).

I also have not tried scheduling the hard register copy propagation
pass twice and measuring the impact on compile times.  Any suggestion
what might be a good testcase for that?

Thanks,

Martin

> 
> That would get you the benefit you're seeking and minimize other
> effects.  Of course if you try that and get effectively the same
> results as moving the full propagation pass before prologue/epilogue
> handling then the complexity of only propagating argument registers
> early is clearly not needed and we'd probably want to go with your
> patch as-is.
> 
> 
> jeff
> 

[google] Fix testsuite failures with -fdebug-types-section.

[Cary Coutant]

This patch for the google/gcc-4_8 branch.

It backports the following two patches from trunk to fix testsuite
failures when -fdebug-types-section is enabled.

Tested with crosstool-validate.py.

http://gcc.gnu.org/ml/gcc-cvs/2013-04/msg00768.html

2013-04-18   Cary Coutant  

gcc/testsuite/
* g++.dg/debug/dwarf2/typedef2.C: Add -fno-debug-types-section flag.
* g++.dg/debug/dwarf2/typedef4.C: Likewise.
* g++.dg/debug/dwarf2/static-data-member1.C: Likewise.
* g++.dg/debug/dwarf2/global-used-types-1.C: Likewise.
* g++.dg/debug/dwarf2/self-ref-1.C: Likewise.
* g++.dg/debug/dwarf2/nested-2.C: Likewise.
* g++.dg/debug/dwarf2/typedef1.C: Likewise.
* g++.dg/debug/dwarf2/namespace-2.C: Likewise.
* g++.dg/debug/dwarf2/integer-typedef.C: Likewise.
* g++.dg/debug/dwarf2/self-ref-2.C: Likewise.
* g++.dg/debug/dwarf2/explicit-constructor.C: Likewise.

http://gcc.gnu.org/ml/gcc-cvs/2013-04/msg00775.html

2013-04-18   Cary Coutant  

gcc/
* dwarf2out.c (output_pubnames): Check die_perennial_p of
parent instead of die_mark.

gcc/testsuite/
* g++.dg/debug/dwarf2/pubnames-2.C: Add -fno-debug-types-section.
* g++.dg/debug/dwarf2/pubnames-3.C: New test case.


Index: gcc/dwarf2out.c
===
--- gcc/dwarf2out.c (revision 198068)
+++ gcc/dwarf2out.c (working copy)
@@ -9005,11 +9005,13 @@ output_pubnames (vecdie->die_tag == DW_TAG_enumerator && !pub->die->die_mark)
+  if (pub->die->die_tag == DW_TAG_enumerator &&
+  (pub->die->die_parent == NULL
+  || !pub->die->die_parent->die_perennial_p))
 continue;
 
   /* We shouldn't see pubnames for DIEs outside of the main CU.  */
-  if (names == pubname_table)
+  if (names == pubname_table && pub->die->die_tag != DW_TAG_enumerator)
gcc_assert (pub->die->die_mark);
 
   if (names != pubtype_table
Index: gcc/testsuite/g++.dg/debug/dwarf2/explicit-constructor.C
===
--- gcc/testsuite/g++.dg/debug/dwarf2/explicit-constructor.C(revision 
198068)
+++ gcc/testsuite/g++.dg/debug/dwarf2/explicit-constructor.C(working copy)
@@ -1,7 +1,7 @@
 // Contributed by Dodji Seketeli 
 // Origin: PR c++
 // { dg-do compile }
-// { dg-options "-O -g -dA -gno-strict-dwarf" }
+// { dg-options "-O -g -dA -gno-strict-dwarf -fno-debug-types-section" }
 // { dg-final { scan-assembler-times "DW_AT_explicit" 2 } }
 
 struct Foo
Index: gcc/testsuite/g++.dg/debug/dwarf2/pubnames-2.C
===
--- gcc/testsuite/g++.dg/debug/dwarf2/pubnames-2.C  (revision 198068)
+++ gcc/testsuite/g++.dg/debug/dwarf2/pubnames-2.C  (working copy)
@@ -1,5 +1,5 @@
 // { dg-do compile }
-// { dg-options "-gpubnames -gdwarf-4 -std=c++0x -dA" }
+// { dg-options "-gpubnames -gdwarf-4 -fno-debug-types-section -std=c++0x -dA" 
}
 // { dg-final { scan-assembler-times "\.section\[\t \]\[^\n\]*debug_pubnames" 
1 } }
 // { dg-final { scan-assembler "\"\\(anonymous namespace\\)0\"+\[ 
\t\]+\[#;/|@!]+\[ \t\]+external name" } }
 // { dg-final { scan-assembler "\"one0\"+\[ \t\]+\[#;/|@!]+\[ 
\t\]+external name" } }
Index: gcc/testsuite/g++.dg/debug/dwarf2/typedef2.C
===
--- gcc/testsuite/g++.dg/debug/dwarf2/typedef2.C(revision 198068)
+++ gcc/testsuite/g++.dg/debug/dwarf2/typedef2.C(working copy)
@@ -1,5 +1,5 @@
 // Origin: PR debug/43628
-// { dg-options "-g -dA" }
+// { dg-options "-g -dA -fno-debug-types-section" }
 // { dg-do compile }
 
 // { dg-final { scan-assembler-times 
"\[^\n\r\]*\\(DIE\[^\n\r\]*DW_TAG_formal_parameter\\)\[\n\r\]{1,2}\[^\n\r\]*DW_AT_type\[\n\r\]{1,2}"
 1 } }
Index: gcc/testsuite/g++.dg/debug/dwarf2/typedef4.C
===
--- gcc/testsuite/g++.dg/debug/dwarf2/typedef4.C(revision 198068)
+++ gcc/testsuite/g++.dg/debug/dwarf2/typedef4.C(working copy)
@@ -1,5 +1,5 @@
 // Origin: PR debug/45171
-// { dg-options "-g -dA -fno-eliminate-unused-debug-types" }
+// { dg-options "-g -dA -fno-eliminate-unused-debug-types 
-fno-debug-types-section" }
 // { dg-do compile }
 
 // There should be 2 real instances of byte_size -- one for the
Index: gcc/testsuite/g++.dg/debug/dwarf2/static-data-member1.C
===
--- gcc/testsuite/g++.dg/debug/dwarf2/static-data-member1.C (revision 
198068)
+++ gcc/testsuite/g++.dg/debug/dwarf2/static-data-member1.C (working copy)
@@ -1,5 +1,5 @@
 // { dg-do compile }
-// { dg-options "-g -dA -fno-merge-debug-strings" }
+// { dg-options "-g -dA -fno-merge-debug-strings -fno-debug-types-section" }
 
 struct A
 {
Index: gcc/testsuite/g++.dg/debug/dwarf2/global-used-types-1.C
===

Re: [PATCH, PR 10474] Shedule pass_cprop_hardreg before pass_thread_prologue_and_epilogue

[Steven Bosscher]

On Fri, Apr 19, 2013 at 12:09 AM, Martin Jambor wrote:
> I also have not tried scheduling the hard register copy propagation
> pass twice and measuring the impact on compile times.  Any suggestion
> what might be a good testcase for that?

I think a better question is when this would be useful in the first
place, and why. In other words: If you propagate hardregs before
shrink wrapping, what could be a source of new opportunities after
shrink wrapping?


The only things I can think of, given the current pass order, are:

* different basic block order due to shrink wrapping
 regcprop's effectiveness depends on the order of the basic blocks
(unfortunately)

* different basic block contents due to head/tail merging (pass_jump2)
 Head/tail merging extends some basic blocks and shortens others. The
elongated basic blocks may present new opportunities (regcprop is a
local pass).

* different basic block contents due to dead store elimination (pass_dse2)
 A removed dead store may also make an address calculation redundant,
changing the regcprop value chains.

* different basic block contents due to peephole2
 A peephole2 may present new regcprop opportunities, peephole2 misses
the context to avoid trivial copies.


On the other hand, running regcprop earlier also helps some other
passes. For example, I think regcprop before jump2 may result in more
successful head/tail merging attempts by making more input operands
match, but it could hurt if_after_reload by extending live times of
registers.


But wouldn't it be better to avoid these argument-register pseudos
being assigned to callee-saved registers? Perhaps splitting the live
range of the pseudos before the first call on each path will do the
trick, and let IRA pick the right registers for you instead.

Ciao!
Steven

Re: [PATCH, PR 10474] Shedule pass_cprop_hardreg before pass_thread_prologue_and_epilogue

[Martin Jambor]

Hi,

On Fri, Apr 19, 2013 at 12:37:58AM +0200, Steven Bosscher wrote:
> On Fri, Apr 19, 2013 at 12:09 AM, Martin Jambor wrote:
> > I also have not tried scheduling the hard register copy propagation
> > pass twice and measuring the impact on compile times.  Any suggestion
> > what might be a good testcase for that?
> 
> I think a better question is when this would be useful in the first
> place, and why. In other words: If you propagate hardregs before
> shrink wrapping, what could be a source of new opportunities after
> shrink wrapping?

Yes, we also did that and neither I nor Honza could think of any
potential problems there.  And of course, I'd also measure how many
statements the second run of the pass changed.  I'll probably do that
tomorrow anyway.

> 
> 
> The only things I can think of, given the current pass order, are:
> 
> * different basic block order due to shrink wrapping
>  regcprop's effectiveness depends on the order of the basic blocks
> (unfortunately)
> 
> * different basic block contents due to head/tail merging (pass_jump2)
>  Head/tail merging extends some basic blocks and shortens others. The
> elongated basic blocks may present new opportunities (regcprop is a
> local pass).
> 
> * different basic block contents due to dead store elimination (pass_dse2)
>  A removed dead store may also make an address calculation redundant,
> changing the regcprop value chains.
> 
> * different basic block contents due to peephole2
>  A peephole2 may present new regcprop opportunities, peephole2 misses
> the context to avoid trivial copies.
> 
> 
> On the other hand, running regcprop earlier also helps some other
> passes. For example, I think regcprop before jump2 may result in more
> successful head/tail merging attempts by making more input operands
> match, but it could hurt if_after_reload by extending live times of
> registers.
> 
> 
> But wouldn't it be better to avoid these argument-register pseudos
> being assigned to callee-saved registers? Perhaps splitting the live
> range of the pseudos before the first call on each path will do the
> trick, and let IRA pick the right registers for you instead.

First, where can I have a look how a live range is split?  ;-)

But second, if such a call is in a loop (or accessible by more than
one path), I wouldn't it be wrong to do that?  To avoid that, I
suppose I might end up doing another shrink-wrapping-like search for
the right edge for prologue and actually coming up with a very similar
result to the propagation and shrink-wrapping preparation.  But I'm
willing to try.

Thanks a lot,

Martin

patch to fix PR56999

[Vladimir Makarov]

  The following patch fixes

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56999

  The problem was in complicated interactions of coalescing and 
doing/undoing inheritance and assignment sub-passes through several 
iterations.  One solution would be in modifying coalescing in order to 
take future actions in undoing inheritance.  Another solution is to move 
coalesce pass after doing/undoing inheritance sub-passes.  The first 
solution complicates code and make passes more dependable although 
potentially decreasing # passes of creating live ranges.  The second 
solution makes coalescing pass simpler and less dependable.  After some 
experiments I've chosen the 2nd solution as it makes code more 
maintainable and less error-prone.  On my tests I found that in 32-bit 
mode it runs 10% more  live-range passes (that is about 1/5th of LRA run 
time), in 64-bit mode the # passes are the same.  I check cpu and real 
time on 500K lines fortran code and did not find any visible increase in 
compilation time.


  The patch was successfully bootstrapped on x86-64.

  Committed to trunk as rev. 198092.

2013-04-18  Vladimir Makarov  

PR rtl-optimization/56992
* lra-coalesce.c (coalescable_pseudo_p): Remove 2nd parameter and
related code.
(lra_coalesce): Remove split_origin_bitmap and related code.
* lra.c (lra): Coalesce after undoing inheritance. Recreate live
ranges if necessary.

2013-04-18  Jakub Jelinek  

PR rtl-optimization/56992
* g++.dg/opt/pr56999.C: New test.


Index: lra-coalesce.c
===
--- lra-coalesce.c  (revision 198077)
+++ lra-coalesce.c  (working copy)
@@ -201,24 +201,14 @@ update_live_info (bitmap lr_bitmap)
 }
 }
 
-/* Return true if pseudo REGNO can be potentially coalesced.  Use
-   SPLIT_PSEUDO_BITMAP to find pseudos whose live ranges were
-   split.  */
+/* Return true if pseudo REGNO can be potentially coalesced.  */
 static bool
-coalescable_pseudo_p (int regno, bitmap split_origin_bitmap)
+coalescable_pseudo_p (int regno)
 {
   lra_assert (regno >= FIRST_PSEUDO_REGISTER);
-  /* Don't coalesce inheritance pseudos because spilled inheritance
- pseudos will be removed in subsequent 'undo inheritance'
- pass.  */
-  return (lra_reg_info[regno].restore_regno < 0
- /* We undo splits for spilled pseudos whose live ranges were
-split.  So don't coalesce them, it is not necessary and
-the undo transformations would be wrong.  */
- && ! bitmap_bit_p (split_origin_bitmap, regno)
- /* We don't want to coalesce regnos with equivalences, at
+  return (/* We don't want to coalesce regnos with equivalences, at
 least without updating this info.  */
- && ira_reg_equiv[regno].constant == NULL_RTX
+ ira_reg_equiv[regno].constant == NULL_RTX
  && ira_reg_equiv[regno].memory == NULL_RTX
  && ira_reg_equiv[regno].invariant == NULL_RTX);
 }
@@ -230,12 +220,10 @@ lra_coalesce (void)
 {
   basic_block bb;
   rtx mv, set, insn, next, *sorted_moves;
-  int i, mv_num, sregno, dregno, restore_regno;
-  unsigned int regno;
+  int i, mv_num, sregno, dregno;
   int coalesced_moves;
   int max_regno = max_reg_num ();
-  bitmap_head involved_insns_bitmap, split_origin_bitmap;
-  bitmap_iterator bi;
+  bitmap_head involved_insns_bitmap;
 
   timevar_push (TV_LRA_COALESCE);
 
@@ -249,11 +237,6 @@ lra_coalesce (void)
 first_coalesced_pseudo[i] = next_coalesced_pseudo[i] = i;
   sorted_moves = XNEWVEC (rtx, get_max_uid ());
   mv_num = 0;
-  /* Collect pseudos whose live ranges were split.  */
-  bitmap_initialize (&split_origin_bitmap, ®_obstack);
-  EXECUTE_IF_SET_IN_BITMAP (&lra_split_regs, 0, regno, bi)
-if ((restore_regno = lra_reg_info[regno].restore_regno) >= 0)
-  bitmap_set_bit (&split_origin_bitmap, restore_regno);
   /* Collect moves.  */
   coalesced_moves = 0;
   FOR_EACH_BB (bb)
@@ -265,15 +248,13 @@ lra_coalesce (void)
&& (sregno = REGNO (SET_SRC (set))) >= FIRST_PSEUDO_REGISTER
&& (dregno = REGNO (SET_DEST (set))) >= FIRST_PSEUDO_REGISTER
&& mem_move_p (sregno, dregno)
-   && coalescable_pseudo_p (sregno, &split_origin_bitmap)
-   && coalescable_pseudo_p (dregno, &split_origin_bitmap)
+   && coalescable_pseudo_p (sregno) && coalescable_pseudo_p (dregno)
&& ! side_effects_p (set)
&& !(lra_intersected_live_ranges_p
 (lra_reg_info[sregno].live_ranges,
  lra_reg_info[dregno].live_ranges)))
  sorted_moves[mv_num++] = insn;
 }
-  bitmap_clear (&split_origin_bitmap);
   qsort (sorted_moves, mv_num, sizeof (rtx), move_freq_compare_func);
   /* Coalesced copies, most frequently executed first. */
   bitmap_initialize (&coalesced_pseudos_bitmap, ®_obstack);
Index: lra.c
===
--- lra.c   

Re: patch to fix PR56999

[Vladimir Makarov]

On 13-04-18 11:58 PM, Vladimir Makarov wrote:


2013-04-18  Vladimir Makarov  

PR rtl-optimization/56992
* lra-coalesce.c (coalescable_pseudo_p): Remove 2nd parameter and
related code.
(lra_coalesce): Remove split_origin_bitmap and related code.
* lra.c (lra): Coalesce after undoing inheritance. Recreate live
ranges if necessary.

2013-04-18  Jakub Jelinek  

PR rtl-optimization/56992
* g++.dg/opt/pr56999.C: New test.



Sorry, I used wrong PR # in changelog entries.  I've fixed it.