New German PO file for 'gcc' (version 4.8-b20130224)

2013-03-10 Thread Translation Project Robot
Hello, gentle maintainer.

This is a message from the Translation Project robot.

A revised PO file for textual domain 'gcc' has been submitted
by the German team of translators.  The file is available at:

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[SH] PR 40797 testcase

2013-03-10 Thread Oleg Endo
Hi,

This adds the reduced test case from the PR to the test suite.
Tested with

make -k check-gcc RUNTESTFLAGS="compile.exp=pr40797*
--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"

OK for trunk?

Cheers,
Oleg

testsuite/ChangeLog:

PR target/40797
* gcc.c-torture/compile/pr40797.c: New.
Index: gcc/testsuite/gcc.c-torture/compile/pr40797.c
===
--- gcc/testsuite/gcc.c-torture/compile/pr40797.c	(revision 0)
+++ gcc/testsuite/gcc.c-torture/compile/pr40797.c	(revision 0)
@@ -0,0 +1,16 @@
+typedef struct str { short x, y;} S;
+
+static short
+bar (short ch, short sl, short sr, short tl, short tr)
+{
+  return 0;
+}
+
+void
+foo (short ch, S *pi, short nc, S *po)
+{
+  short clo, chi, lo, hi;
+
+  po->x = bar (ch, clo, chi, pi[lo].x, pi[hi].x);
+  po->y = bar (ch, clo, chi, pi[lo].y, pi[hi].y);
+}


New Swedish PO file for 'gcc' (version 4.8-b20130224)

2013-03-10 Thread Translation Project Robot
Hello, gentle maintainer.

This is a message from the Translation Project robot.

A revised PO file for textual domain 'gcc' has been submitted
by the Swedish team of translators.  The file is available at:

http://translationproject.org/latest/gcc/sv.po

(This file, 'gcc-4.8-b20130224.sv.po', has just now been sent to you in
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All other PO files for your package are available in:

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Please consider including all of these in your next release, whether
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Whenever you have a new distribution with a new version number ready,
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tarball to the address below.  The tarball may be just a pretest or a
snapshot, it does not even have to compile.  It is just used by the
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The following HTML page has been updated:

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New German PO file for 'gcc' (version 4.8-b20130224)

2013-03-10 Thread Translation Project Robot
Hello, gentle maintainer.

This is a message from the Translation Project robot.

A revised PO file for textual domain 'gcc' has been submitted
by the German team of translators.  The file is available at:

http://translationproject.org/latest/gcc/de.po

(This file, 'gcc-4.8-b20130224.de.po', has just now been sent to you in
a separate email.)

All other PO files for your package are available in:

http://translationproject.org/latest/gcc/

Please consider including all of these in your next release, whether
official or a pretest.

Whenever you have a new distribution with a new version number ready,
containing a newer POT file, please send the URL of that distribution
tarball to the address below.  The tarball may be just a pretest or a
snapshot, it does not even have to compile.  It is just used by the
translators when they need some extra translation context.

The following HTML page has been updated:

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If any question arises, please contact the translation coordinator.

Thank you for all your work,

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[patch] make gcse.c respect -fno-gcse-lm

2013-03-10 Thread Steven Bosscher
Hello,

RTL PRE has an option to disable load motion. This option works fine,
except that all analysis for load motion is still performed.

This patch stops gcse.c from recording memory sets for -fno-gcse-lm,
and conservatively returns true in oprs_unchanged_p for any MEM.

Bootstrapped&tested on {x86_64,powerpc64}-unknown-linux-gnu. OK?

Ciao!
Steven


* gcse.c (oprs_unchanged_p): Respect flag_gcse_lm.
(record_last_mem_set_info): Likewise.

Index: gcse.c
===
--- gcse.c  (revision 196576)
+++ gcse.c  (working copy)
@@ -890,8 +890,9 @@ oprs_unchanged_p (const_rtx x, const_rtx
   }

 case MEM:
-  if (load_killed_in_block_p (current_bb, DF_INSN_LUID (insn),
- x, avail_p))
+  if (! flag_gcse_lm
+ || load_killed_in_block_p (current_bb, DF_INSN_LUID (insn),
+x, avail_p))
return 0;
   else
return oprs_unchanged_p (XEXP (x, 0), insn, avail_p);
@@ -1471,10 +1472,14 @@ canon_list_insert (rtx dest ATTRIBUTE_UN
 static void
 record_last_mem_set_info (rtx insn)
 {
-  int bb = BLOCK_FOR_INSN (insn)->index;
+  int bb;
+
+  if (! flag_gcse_lm)
+return;

   /* load_killed_in_block_p will handle the case of calls clobbering
  everything.  */
+  bb = BLOCK_FOR_INSN (insn)->index;
   modify_mem_list[bb].safe_push (insn);
   bitmap_set_bit (modify_mem_list_set, bb);


Re: [SH] PR 40797 testcase

2013-03-10 Thread Kaz Kojima
Oleg Endo  wrote:
> This adds the reduced test case from the PR to the test suite.
> Tested with
> 
> make -k check-gcc RUNTESTFLAGS="compile.exp=pr40797*
> --target_board=sh-sim
> \{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
> 
> OK for trunk?

OK.

Regards,
kaz


Re: [committed] Work around bug in powf function on HP-UX

2013-03-10 Thread John David Anglin

On 18-Feb-13, at 11:45 AM, John David Anglin wrote:


2013-02-18  John David Anglin  

PR target/56347
* config/pa/pa.c (pa_conditional_register_usage): On HP-UX, mark
registers %fr12 and %fr12R as call used.


I committed the attached change.  It no longer unconditionally  
clobbers %fr12 and %fr12R
and instead uses special call patterns that clobber %fr12 to work  
around the problem.  It
is not perfect in that only direct calls are detected, but I think  
that is the best compromise.


Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.  Build tested  
on hppa-unknown-linux-gnu.

Committed to trunk.

Dave
--
John David Anglin   dave.ang...@bell.net


2013-03-10  John David Anglin  

PR target/56347
* config/pa/pa.md (call_value): Check for calls to powf and direct to
new call patterns that clobber %fr12.
(call_val_powf, call_val_powf_pic, call_val_powf_64bit): New insn,
split and postreload patterns.
* config/pa/pa.c (pa_conditional_register_usage): Revert marking
registers %fr12 and %fr12R as call used.

Index: config/pa/pa.md
===
--- config/pa/pa.md (revision 196546)
+++ config/pa/pa.md (working copy)
@@ -7600,7 +7600,6 @@
 (match_operand 2 "" "")))
  (clobber (reg:SI 2))])]
   ""
-  "
 {
   rtx op;
   rtx dst = operands[0];
@@ -7668,7 +7667,13 @@
 {
   rtx r4 = gen_rtx_REG (word_mode, 4);
   if (GET_CODE (op) == SYMBOL_REF)
- emit_call_insn (gen_call_val_symref_64bit (dst, op, nb, r4));
+   {
+ if (TARGET_HPUX && !TARGET_DISABLE_FPREGS && !TARGET_SOFT_FLOAT
+ && !strcmp (targetm.strip_name_encoding (XSTR (op, 0)), "powf"))
+   emit_call_insn (gen_call_val_powf_64bit (dst, op, nb, r4));
+ else
+   emit_call_insn (gen_call_val_symref_64bit (dst, op, nb, r4));
+   }
   else
{
  op = force_reg (word_mode, op);
@@ -7682,10 +7687,23 @@
  if (flag_pic)
{
  rtx r4 = gen_rtx_REG (word_mode, 4);
- emit_call_insn (gen_call_val_symref_pic (dst, op, nb, r4));
+
+ if (TARGET_HPUX && !TARGET_DISABLE_FPREGS && !TARGET_SOFT_FLOAT
+ && !strcmp (targetm.strip_name_encoding (XSTR (op, 0)),
+ "powf"))
+   emit_call_insn (gen_call_val_powf_pic (dst, op, nb, r4));
+ else
+   emit_call_insn (gen_call_val_symref_pic (dst, op, nb, r4));
}
  else
-   emit_call_insn (gen_call_val_symref (dst, op, nb));
+   {
+ if (TARGET_HPUX && !TARGET_DISABLE_FPREGS && !TARGET_SOFT_FLOAT
+ && !strcmp (targetm.strip_name_encoding (XSTR (op, 0)),
+ "powf"))
+   emit_call_insn (gen_call_val_powf (dst, op, nb));
+ else
+   emit_call_insn (gen_call_val_symref (dst, op, nb));
+   }
}
   else
{
@@ -7702,7 +7720,7 @@
 }
 
   DONE;
-}")
+})
 
 (define_insn "call_val_symref"
   [(set (match_operand 0 "" "")
@@ -7722,6 +7740,26 @@
(cond [(and (const_int 0) (eq (const_int 0) (pc))) (const_int 8)]
  (symbol_ref "pa_attr_length_call (insn, 0)")))])
 
+;; powf function clobbers %fr12
+(define_insn "call_val_powf"
+  [(set (match_operand 0 "" "")
+   (call (mem:SI (match_operand 1 "call_operand_address" ""))
+ (match_operand 2 "" "i")))
+   (clobber (reg:SI 1))
+   (clobber (reg:SI 2))
+   (clobber (reg:DF 48))
+   (use (const_int 1))]
+  "TARGET_HPUX && !TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
+  "*
+{
+  pa_output_arg_descriptor (insn);
+  return pa_output_call (insn, operands[1], 0);
+}"
+  [(set_attr "type" "call")
+   (set (attr "length")
+   (cond [(and (const_int 0) (eq (const_int 0) (pc))) (const_int 8)]
+ (symbol_ref "pa_attr_length_call (insn, 0)")))])
+
 (define_insn "call_val_symref_pic"
   [(set (match_operand 0 "" "")
(call (mem:SI (match_operand 1 "call_operand_address" ""))
@@ -7804,6 +7842,95 @@
(cond [(and (const_int 0) (eq (const_int 0) (pc))) (const_int 8)]
  (symbol_ref "pa_attr_length_call (insn, 0)")))])
 
+;; powf function clobbers %fr12
+(define_insn "call_val_powf_pic"
+  [(set (match_operand 0 "" "")
+   (call (mem:SI (match_operand 1 "call_operand_address" ""))
+ (match_operand 2 "" "i")))
+   (clobber (reg:SI 1))
+   (clobber (reg:SI 2))
+   (clobber (reg:DF 48))
+   (clobber (match_operand 3))
+   (use (reg:SI 19))
+   (use (const_int 1))]
+  "TARGET_HPUX && !TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
+  "#")
+
+;; Split out the PIC register save and restore after reload.  As the
+;; split is done after reload, there are some situations in which we
+;; unnecessarily save and restore %r4.  This happens when there is a
+;; single call and the PIC register is no

[committed] Skip compilation of gcc.dg/pr44194-1.c on hppa64-*-*

2013-03-10 Thread John David Anglin
Compilation of gcc.dg/pr44194-1.c fails on hppa*64*-*-* and needs to  
skipped as on most other 64-bit targets.


Committed to trunk.  Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp- 
hpux11.11.


Dave
--
John David Anglin   dave.ang...@bell.net

2013-03-10  John David Anglin  

* gcc.dg/pr44194-1.c: Skip compilation on hppa*64*-*-*.

Index: gcc.dg/pr44194-1.c
===
--- gcc.dg/pr44194-1.c  (revision 196575)
+++ gcc.dg/pr44194-1.c  (working copy)
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { { { { { i?86-*-* x86_64-*-* } && x32 } || lp64 } 
&& { ! s390*-*-* } } &&  { ! alpha*-*-* } } } } */
+/* { dg-do compile { target { { { { { { i?86-*-* x86_64-*-* } && x32 } || lp64 
} && { ! s390*-*-* } } && { ! hppa*64*-*-* } } && { ! alpha*-*-* } } } } */
 /* { dg-options "-O2 -fdump-rtl-dse1 -fdump-rtl-final" } */
 
 /* Restrict to 64-bit targets since 32-bit targets usually return small


[committed] xfail gcc.dg/tree-ssa/pr55579.c on 32-bit hppa*-*-hpux*

2013-03-10 Thread John David Anglin
Committed to trunk.  Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp- 
hpux11.11.


Dave
--
John David Anglin   dave.ang...@bell.net


2013-03-10  John David Anglin  

PR debug/56307
* gcc.dg/tree-ssa/pr55579.c: xfail 32-bit hppa*-*-hpux*.

Index: gcc.dg/tree-ssa/pr55579.c
===
--- gcc.dg/tree-ssa/pr55579.c   (revision 196546)
+++ gcc.dg/tree-ssa/pr55579.c   (working copy)
@@ -11,5 +11,5 @@
   return x;
 }
 
-/* { dg-final { scan-tree-dump "Created a debug-only replacement for s" "esra" 
} } */
+/* { dg-final { scan-tree-dump "Created a debug-only replacement for s" "esra" 
{xfail { hppa*-*-hpux* && { ! lp64 } } } } } */
 /* { dg-final { cleanup-tree-dump "esra" } } */


[committed] xfail gcc.dg/tree-ssa/vector-4.c on 32-bit hppa*-*-*

2013-03-10 Thread John David Anglin

This is a callee copy issue.

Committed to trunk.  Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp- 
hpux11.11.


Dave
--
John David Anglin   dave.ang...@bell.net


2013-03-10  John David Anglin  

PR testsuite/54119
* gcc.dg/tree-ssa/vector-4.c: xfail on 32-bit hppa*-*-*.

Index: gcc.dg/tree-ssa/vector-4.c
===
--- gcc.dg/tree-ssa/vector-4.c  (revision 196546)
+++ gcc.dg/tree-ssa/vector-4.c  (working copy)
@@ -9,6 +9,6 @@
 }
 
 /* The compound literal should be placed directly in the vec_perm.  */
-/* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR ;" 1 
"gimple"} } */
+/* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR ;" 1 
"gimple" { xfail { hppa*-*-* && { ! lp64 } } } } } */
 
 /* { dg-final { cleanup-tree-dump "gimple" } } */