Re: [PATCH] Fix PR54659, include gmp.h from system.h
On Tue, 8 Jan 2013, H.J. Lu wrote: > On Fri, Dec 21, 2012 at 5:14 AM, Richard Biener wrote: > > > > After the Ada fix including gmp.h from system.h is trivial > > (by means of double-int.h it was included from almost everywhere > > already) > > > > Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. > > > > Ok for trunk? (Go frontend "unfixed") > > > > Thanks, > > Richard. > > > > 2012-12-21 Richard Biener > > > > PR bootstrap/54659 > > * system.h: Include gmp.h. > > * tree-ssa-loop-niter.c: Do not include gmp.h here. > > * double-int.h: Likewise. > > * realmpfr.h: Likewise. > > > > fortran/ > > * gfortran.h: Do not include gmp.h here. > > > > This breaks bootstrap with in-tree gmp since system.h is included for > host feature test by gcc/configure. Before gmp is built, gmp.h isn't > available. We need to build gmp first before configuring gcc. Ok. Thanks, Richard. > Balaji, can you try this patch? > > > -- Richard Biener SUSE / SUSE Labs SUSE LINUX Products GmbH - Nuernberg - AG Nuernberg - HRB 16746 GF: Jeff Hawn, Jennifer Guild, Felix Imend
Re: [PATCH] Adding target rdos to GCC
On Wed, 9 Jan 2013, Uros Bizjak wrote: > On Tue, Jan 8, 2013 at 9:32 PM, Leif Ekblad wrote: > > After some new suggestions from Uros, I've made a new diff. > > > > > > Change log: > > * config/gthr.m4: Added rdos thread header. > > * gcc/config/i386/i386.c: Provided a way to define a default setting for > > medium memory model and PIC using TARGET_RDOS define. > > * gcc/config/i386/i386.h: Defined TARGET_RDOS macro. Defined default value > > for large-data-threshold. > > * gcc/config/i386/i386.md: Added r14 and r15 register names. > > * gcc/config/i386/i386.opt: Changed initial value for large-data-threshold > > to DEFAULT_LARGE_SECTION_THRESHOLD. > > * gcc/config/i386/rdos.h: Common definitions for target rdos > > * gcc/config/i386/rdos64.h: Specific definitions for 64-bit rdos target. > > * gcc/config.gcc: Added rdos targets > > Please use present tense in ChangeLog (see many other entries). > > > Tested on target rdos and rdos32. > > This is OK for mainline, but the patch needs explicit approval from > Release Managers at this stage. Ok with me. Richard.
Re: Control dependence vs. builtin_unreachable
On Tue, Jan 8, 2013 at 5:16 PM, Jeff Law wrote: > On 01/08/2013 04:26 AM, Richard Biener wrote: > >> >> The issue is VRP - when you remove unreachable blocks you lose the >> conditional statement as it is no longer necessary and thus the predicate >> you can derive value-ranges from. > > Understood. Perhaps we could eliminate them after the first VRP pass, but > before the second. That ought to give us the majority of the benefit of > seeing the conditional and propagating based on the conditional, but also > give us the benefit of eliminating the branch generating straight-line code. > > Clearly it needs more investigation, but I think it's worth exploring. Sure - especially if we eventually move to preserve value-range information across passes. __builtin_constant_p is a similar thing - it guards one reachable and one unreachable path but we forcefully remove it only during the late fold-all-builtins pass. Richard. > Jeff
Re: [PATCH] predict_loop fix (PR tree-optimization/48189)
On Tue, 8 Jan 2013, Jakub Jelinek wrote:
> Hi!
>
> This is Steven's patch from the PR plus mine hunk, bootstrapped/regtested on
> x86_64-linux and i686-linux, ok for trunk?
Ok.
Thanks,
Richard.
> 2013-01-08 Steven Bosscher
> Jakub Jelinek
>
> PR tree-optimization/48189
> * predict.c (predict_loops): If max is 0, don't call compare_tree_int.
> If nitercst is 0, don't predict the exit edge.
>
> * gcc.dg/pr48189.c: New test.
>
> --- gcc/predict.c.jj 2013-01-04 13:44:35.0 +0100
> +++ gcc/predict.c 2013-01-08 15:58:15.552884491 +0100
> @@ -1434,7 +1434,8 @@ predict_loops (void)
> if (TREE_CODE (niter) == INTEGER_CST)
> {
> if (host_integerp (niter, 1)
> - && compare_tree_int (niter, max-1) == -1)
> + && max
> + && compare_tree_int (niter, max - 1) == -1)
> nitercst = tree_low_cst (niter, 1) + 1;
> else
> nitercst = max;
> @@ -1456,6 +1457,11 @@ predict_loops (void)
> else
> continue;
>
> + /* If the prediction for number of iterations is zero, do not
> + predict the exit edges. */
> + if (nitercst == 0)
> + continue;
> +
> probability = ((REG_BR_PROB_BASE + nitercst / 2) / nitercst);
> predict_edge (ex, predictor, probability);
> }
> --- gcc/testsuite/gcc.dg/pr48189.c.jj 2013-01-08 15:59:38.319433008 +0100
> +++ gcc/testsuite/gcc.dg/pr48189.c2013-01-08 15:52:31.0 +0100
> @@ -0,0 +1,13 @@
> +/* PR tree-optimization/48189 */
> +/* { dg-do compile } */
> +/* { dg-options "-O --param max-predicted-iterations=0" } */
> +
> +struct S { int s[8]; };
> +
> +void
> +foo (int *x, struct S *y)
> +{
> + int i;
> + for (i = 0; y[i].s[i]; i++)
> +*x++ = y[i].s[i];
> +}
>
> Jakub
>
>
--
Richard Biener
SUSE / SUSE Labs
SUSE LINUX Products GmbH - Nuernberg - AG Nuernberg - HRB 16746
GF: Jeff Hawn, Jennifer Guild, Felix Imend
Re: PR 55875 (IV wrapping issue)
On Tue, 8 Jan 2013, Jan Hubicka wrote:
> Hi,
> here is even more updated patch, this time really fixing the testcase, I hope
> ;)
> It turns out there is one extra problem in tree-ssa-loop-niter.c triggered by
> that code. Some bounds, like one based on inequality test or with wrapping
> IVs are bounds only when they are executed every iteration.
>
> Boostrapped/regtested x86_64-linux.
>
> Honza
>
> PR tree-optimiation/55875
> * gcc.c-torture/execute/pr55875.c: New testcase.
> * g++.dg/torture/pr55875.C: New testcase.
>
> * tree-ssa-loop-niter.c (number_of_iterations_cond): Add
> EVERY_ITERATION parameter.
> (number_of_iterations_exit): Check if exit is executed every
> iteration.
> (idx_infer_loop_bounds): Similarly here.
> (n_of_executions_at_most): Simplify
> to only test for cases where statement is dominated by the
> particular bound; handle correctly the "postdominance"
> test.
> (scev_probably_wraps_p): Use max loop iterations info
> as a global bound first.
> Index: tree-ssa-loop-niter.c
> ===
> *** tree-ssa-loop-niter.c (revision 194918)
> --- tree-ssa-loop-niter.c (working copy)
> *** dump_affine_iv (FILE *file, affine_iv *i
> *** 1208,1213
> --- 1208,1215
> -- in this case we can use the information whether the control induction
> variables can overflow or not in a more efficient way.
>
> +if EVERY_ITERATION is true, we know the test is executed on every
> iteration.
> +
> The results (number of iterations and assumptions as described in
> comments at struct tree_niter_desc in tree-flow.h) are stored to NITER.
> Returns false if it fails to determine number of iterations, true if it
> *** static bool
> *** 1217,1227
> number_of_iterations_cond (struct loop *loop,
> tree type, affine_iv *iv0, enum tree_code code,
> affine_iv *iv1, struct tree_niter_desc *niter,
> !bool only_exit)
> {
> bool exit_must_be_taken = false, ret;
> bounds bnds;
>
> /* The meaning of these assumptions is this:
>if !assumptions
> then the rest of information does not have to be valid
> --- 1219,1239
> number_of_iterations_cond (struct loop *loop,
> tree type, affine_iv *iv0, enum tree_code code,
> affine_iv *iv1, struct tree_niter_desc *niter,
> !bool only_exit, bool every_iteration)
> {
> bool exit_must_be_taken = false, ret;
> bounds bnds;
>
> + /* If the test is not executed every iteration, wrapping may make the test
> + to pass again.
> + TODO: the overflow case can be still used as unreliable estimate of
> upper
> + bound. But we have no API to pass it down to number of iterations code
> + and, at present, it will not use it anyway. */
> + if (!every_iteration
> + && (!iv0->no_overflow || !iv1->no_overflow
> + || code == NE_EXPR || code == EQ_EXPR))
> + return false;
> +
> /* The meaning of these assumptions is this:
>if !assumptions
> then the rest of information does not have to be valid
> *** number_of_iterations_exit (struct loop *
> *** 1807,1815
> tree op0, op1;
> enum tree_code code;
> affine_iv iv0, iv1;
>
> ! if (every_iteration
> ! && !dominated_by_p (CDI_DOMINATORS, loop->latch, exit->src))
> return false;
>
> niter->assumptions = boolean_false_node;
> --- 1819,1829
> tree op0, op1;
> enum tree_code code;
> affine_iv iv0, iv1;
> + bool safe;
>
> ! safe = dominated_by_p (CDI_DOMINATORS, loop->latch, exit->src);
> !
> ! if (every_iteration && !safe)
> return false;
>
> niter->assumptions = boolean_false_node;
> *** number_of_iterations_exit (struct loop *
> *** 1855,1861
> iv0.base = expand_simple_operations (iv0.base);
> iv1.base = expand_simple_operations (iv1.base);
> if (!number_of_iterations_cond (loop, type, &iv0, code, &iv1, niter,
> ! loop_only_exit_p (loop, exit)))
> {
> fold_undefer_and_ignore_overflow_warnings ();
> return false;
> --- 1869,1875
> iv0.base = expand_simple_operations (iv0.base);
> iv1.base = expand_simple_operations (iv1.base);
> if (!number_of_iterations_cond (loop, type, &iv0, code, &iv1, niter,
> ! loop_only_exit_p (loop, exit), safe))
> {
> fold_undefer_and_ignore_overflow_warnings ();
> return false;
> *** idx_infer_loop_bounds (tree base, tree *
> *** 2657,2662
> --- 2671,2677
> tree low, high, type, next;
> bool sign, upper = true, at_end = false;
> struct loop *loop = data->loop;
> + bool reliable = tru
Re: [PATCH] Allow x <- x, 1 in *vec_concatv2df (PR rtl-optimization/55829)
On Tue, Jan 8, 2013 at 9:00 PM, Jakub Jelinek wrote: > No matter whether LRA (if it is a bug in there) is fixed or not, > *vec_concatv2df could handle for !avx sse3 x <- x, 1 alternative the same > as it handles x <- m, 1 alternative (using movddup). > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2013-01-08 Jakub Jelinek > > PR rtl-optimization/55829 > * config/i386/sse.md (*vec_concatv2df): Add x <- x, 1 alternative > for sse3 but not avx. > > * gcc.target/i386/pr55829.c: New test. > > --- gcc/config/i386/sse.md.jj 2012-11-26 10:14:26.0 +0100 > +++ gcc/config/i386/sse.md 2013-01-08 10:28:42.496819712 +0100 > @@ -5183,10 +5183,10 @@ (define_insn "vec_dupv2df" > (set_attr "mode" "V2DF")]) > > (define_insn "*vec_concatv2df" > - [(set (match_operand:V2DF 0 "register_operand" "=x,x,x,x,x,x,x,x") > + [(set (match_operand:V2DF 0 "register_operand" "=x,x,x, x,x,x,x,x") > (vec_concat:V2DF > - (match_operand:DF 1 "nonimmediate_operand" " 0,x,m,0,x,m,0,0") > - (match_operand:DF 2 "vector_move_operand" " x,x,1,m,m,C,x,m")))] > + (match_operand:DF 1 "nonimmediate_operand" " 0,x,xm,0,x,m,0,0") > + (match_operand:DF 2 "vector_move_operand" " x,x,1, m,m,C,x,m")))] This was done on purpose, since reload had some problems with similar pattern (please see PR 50875 [1] and [2]). If we are sure that LRA fixes this problem, then the patch is OK for mainline. Also, please revert "hack" that fixed PR 50875 in this case. [1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50875 [2] http://gcc.gnu.org/ml/gcc-patches/2011-10/msg02477.html Uros.
[PATCH] Yet another non-prototype builtin issue (PR middle-end/55890)
Richard,
I've build r195008 for target mips64-linux-gnu with low optimization level
({CFLAGS,CXXFLAGS,BOOT_CFLAGS}='-g -O0'), and noticed failures for
gcc.dg/torture/pr55890-{1,2,3}.c at -O0 and -O1 (which are not there without the
low optimization level).
The -O1 pr55890-1.c failure looks like this:
...
$ mips64-linux-gnu-gcc gcc/testsuite/gcc.dg/torture/pr55890-1.c
-fno-diagnostics-show-caret -O1 -S -o pr55890-1.s
gcc/testsuite/gcc.dg/torture/pr55890-1.c: In function 'main':
gcc/testsuite/gcc.dg/torture/pr55890-1.c:6:11: internal compiler error:
Segmentation fault
0x86dad80 crash_signal
gcc/toplev.c:334
0x82bec14 expand_call(tree_node*, rtx_def*, int)
gcc/calls.c:3139
0x82adae3 expand_builtin(tree_node*, rtx_def*, rtx_def*, machine_mode, int)
gcc-mainline/gcc/builtins.c:6866
0x83d5484 expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**)
gcc-mainline/gcc/expr.c:10141
0x82d7721 expand_call_stmt
gcc-mainline/gcc/cfgexpand.c:2115
0x82d77eb expand_gimple_stmt_1
gcc/cfgexpand.c:2153
0x82d7e51 expand_gimple_stmt
gcc/cfgexpand.c:2305
0x82d8f76 expand_gimple_basic_block
gcc/cfgexpand.c:4084
0x82d9d53 gimple_expand_cfg
gcc/cfgexpand.c:4603
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See for instructions.
...
The segv occurs when evaluating GET_MODE (args[arg_nr].reg) here:
...
if (pass == 1 && (return_flags & ERF_RETURNS_ARG))
{
int arg_nr = return_flags & ERF_RETURN_ARG_MASK;
if (PUSH_ARGS_REVERSED)
arg_nr = num_actuals - arg_nr - 1;
if (args[arg_nr].reg
&& valreg
&& REG_P (valreg)
&& GET_MODE (args[arg_nr].reg) == GET_MODE (valreg))
call_fusage
= gen_rtx_EXPR_LIST (TYPE_MODE (TREE_TYPE
(args[arg_nr].tree_value)),
gen_rtx_SET (VOIDmode, valreg,
args[arg_nr].reg),
call_fusage);
}
...
The expression (return_flags & ERF_RETURNS_ARG) is true because we're
calculating return_flags using fndecl == memmove, and for memmove we're indeed
returning the first arg.
So arg_nr evaluates to 0, and we're accessing args[arg_nr].reg. But num_actuals
is 0, so args is the result of alloca (0) and args[arg_nr] contains some random
value, which causes the segv when evaluating GET_MODE (args[arg_nr].reg) (unless
args[arg_nr].reg happens to be NULL, in which case we don't get there).
Attached patch fixes this by testing whether arg_nr is in range before using it.
Using the patch and a cc1 recompile, I'm able to run pr55890-{1,2,3}.c
successfully.
OK for trunk after I've tested this on mips64?
Thanks,
- Tom
2013-01-09 Tom de Vries
PR middle-end/55890
* calls.c (expand_call): Check if arg_nr is valid.
Index: gcc/calls.c
===
--- gcc/calls.c (revision 195008)
+++ gcc/calls.c (working copy)
@@ -3136,7 +3136,9 @@ expand_call (tree exp, rtx target, int i
int arg_nr = return_flags & ERF_RETURN_ARG_MASK;
if (PUSH_ARGS_REVERSED)
arg_nr = num_actuals - arg_nr - 1;
- if (args[arg_nr].reg
+ if (arg_nr >= 0
+ && arg_nr < num_actuals
+ && args[arg_nr].reg
&& valreg
&& REG_P (valreg)
&& GET_MODE (args[arg_nr].reg) == GET_MODE (valreg))
[Patch, AArch64-4.7] Remove %r from asm_printf
Hi,
>> It would be much appreciated if you would
>> handle the back port to ARM/aarch64-4.7-branch
Thanks for reviewing the patch and your comments.
Please find attached the backported patch to ARM/aarch64-4.7-branch.
Regressed for aarch64-elf on aarch64-4.7-branch.
Thanks,
Naveen.H.S
2013-01-09 Naveen H.S
* config/aarch64/aarch64.c (aarch64_print_operand): Replace %r
in asm_fprintf with reg_names.
(aarch64_print_operand_address): Likewise.
(aarch64_return_addr): Likewise.
* config/aarch64/aarch64.h (ASM_FPRINTF_EXTENSIONS): Remove.--- gcc/config/aarch64/aarch64.c 2013-01-09 10:10:03.044021335 +0530
+++ gcc/config/aarch64/aarch64.c 2013-01-09 15:07:47.076627180 +0530
@@ -3198,7 +3198,7 @@ aarch64_print_operand (FILE *f, rtx x, c
return;
}
- asm_fprintf (f, "%r", REGNO (x) + 1);
+ asm_fprintf (f, "%s", reg_names [REGNO (x) + 1]);
break;
case 'Q':
@@ -3208,7 +3208,7 @@ aarch64_print_operand (FILE *f, rtx x, c
output_operand_lossage ("invalid operand for '%%%c'", code);
return;
}
- asm_fprintf (f, "%r", REGNO (x) + (WORDS_BIG_ENDIAN ? 1 : 0));
+ asm_fprintf (f, "%s", reg_names [REGNO (x) + (WORDS_BIG_ENDIAN ? 1 : 0)]);
break;
case 'R':
@@ -3218,7 +3218,7 @@ aarch64_print_operand (FILE *f, rtx x, c
output_operand_lossage ("invalid operand for '%%%c'", code);
return;
}
- asm_fprintf (f, "%r", REGNO (x) + (WORDS_BIG_ENDIAN ? 0 : 1));
+ asm_fprintf (f, "%s", reg_names [REGNO (x) + (WORDS_BIG_ENDIAN ? 0 : 1)]);
break;
case 'm':
@@ -3323,7 +3323,7 @@ aarch64_print_operand (FILE *f, rtx x, c
switch (GET_CODE (x))
{
case REG:
- asm_fprintf (f, "%r", REGNO (x));
+ asm_fprintf (f, "%s", reg_names [REGNO (x)]);
break;
case MEM:
@@ -3478,36 +3478,36 @@ aarch64_print_operand_address (FILE *f,
{
case ADDRESS_REG_IMM:
if (addr.offset == const0_rtx)
- asm_fprintf (f, "[%r]", REGNO (addr.base));
+ asm_fprintf (f, "[%s]", reg_names [REGNO (addr.base)]);
else
- asm_fprintf (f, "[%r,%wd]", REGNO (addr.base),
+ asm_fprintf (f, "[%s,%wd]", reg_names [REGNO (addr.base)],
INTVAL (addr.offset));
return;
case ADDRESS_REG_REG:
if (addr.shift == 0)
- asm_fprintf (f, "[%r,%r]", REGNO (addr.base),
- REGNO (addr.offset));
+ asm_fprintf (f, "[%s,%s]", reg_names [REGNO (addr.base)],
+ reg_names [REGNO (addr.offset)]);
else
- asm_fprintf (f, "[%r,%r,lsl %u]", REGNO (addr.base),
- REGNO (addr.offset), addr.shift);
+ asm_fprintf (f, "[%s,%s,lsl %u]", reg_names [REGNO (addr.base)],
+ reg_names [REGNO (addr.offset)], addr.shift);
return;
case ADDRESS_REG_UXTW:
if (addr.shift == 0)
- asm_fprintf (f, "[%r,w%d,uxtw]", REGNO (addr.base),
+ asm_fprintf (f, "[%s,w%d,uxtw]", reg_names [REGNO (addr.base)],
REGNO (addr.offset) - R0_REGNUM);
else
- asm_fprintf (f, "[%r,w%d,uxtw %u]", REGNO (addr.base),
+ asm_fprintf (f, "[%s,w%d,uxtw %u]", reg_names [REGNO (addr.base)],
REGNO (addr.offset) - R0_REGNUM, addr.shift);
return;
case ADDRESS_REG_SXTW:
if (addr.shift == 0)
- asm_fprintf (f, "[%r,w%d,sxtw]", REGNO (addr.base),
+ asm_fprintf (f, "[%s,w%d,sxtw]", reg_names [REGNO (addr.base)],
REGNO (addr.offset) - R0_REGNUM);
else
- asm_fprintf (f, "[%r,w%d,sxtw %u]", REGNO (addr.base),
+ asm_fprintf (f, "[%s,w%d,sxtw %u]", reg_names [REGNO (addr.base)],
REGNO (addr.offset) - R0_REGNUM, addr.shift);
return;
@@ -3515,27 +3515,27 @@ aarch64_print_operand_address (FILE *f,
switch (GET_CODE (x))
{
case PRE_INC:
- asm_fprintf (f, "[%r,%d]!", REGNO (addr.base),
+ asm_fprintf (f, "[%s,%d]!", reg_names [REGNO (addr.base)],
GET_MODE_SIZE (aarch64_memory_reference_mode));
return;
case POST_INC:
- asm_fprintf (f, "[%r],%d", REGNO (addr.base),
+ asm_fprintf (f, "[%s],%d", reg_names [REGNO (addr.base)],
GET_MODE_SIZE (aarch64_memory_reference_mode));
return;
case PRE_DEC:
- asm_fprintf (f, "[%r,-%d]!", REGNO (addr.base),
+ asm_fprintf (f, "[%s,-%d]!", reg_names [REGNO (addr.base)],
GET_MODE_SIZE (aarch64_memory_reference_mode));
return;
case POST_DEC:
- asm_fprintf (f, "[%r],-%d", REGNO (addr.base),
+ asm_fprintf (f, "[%s],-%d", reg_names [REGNO (addr.base)],
GET_MODE_SIZE (aarch64_memory_reference_mode));
return;
case PRE_MODIFY:
- asm_fprintf (f, "[%r,%wd]!", REGNO (addr.base),
+ asm_fprintf (f, "[%s,%wd]!", reg_names [REGNO (addr.base)],
INTVAL (addr.offset));
return;
case POST_MODIFY:
- asm_fprintf (f, "[%r],%wd", REGNO (addr.base),
+ asm_fprintf (f, "[%s],%wd", reg_names [REGNO (addr.base)],
INTVAL (addr.offset));
return;
default:
@@ -3544,7 +3544,7 @@ aarch64_print_operand_address (FILE *f,
break;
case ADDRESS_LO_SUM:
- asm_fprintf (f, "[%r,#:lo12:", REGNO (addr.base
Re: [PATCH] Yet another non-prototype builtin issue (PR middle-end/55890)
On Wed, Jan 09, 2013 at 11:11:13AM +0100, Tom de Vries wrote: > OK for trunk after I've tested this on mips64? Yes, thanks. > 2013-01-09 Tom de Vries > > PR middle-end/55890 > * calls.c (expand_call): Check if arg_nr is valid. > > Index: gcc/calls.c > === > --- gcc/calls.c (revision 195008) > +++ gcc/calls.c (working copy) > @@ -3136,7 +3136,9 @@ expand_call (tree exp, rtx target, int i > int arg_nr = return_flags & ERF_RETURN_ARG_MASK; > if (PUSH_ARGS_REVERSED) > arg_nr = num_actuals - arg_nr - 1; > - if (args[arg_nr].reg > + if (arg_nr >= 0 > + && arg_nr < num_actuals > + && args[arg_nr].reg > && valreg > && REG_P (valreg) > && GET_MODE (args[arg_nr].reg) == GET_MODE (valreg)) Jakub
Re: PR tree-optimization/55823 (ipa-inline-transform ICE)
Hi, On Tue, Jan 08, 2013 at 02:32:24PM +0100, Richard Biener wrote: > On Tue, Jan 8, 2013 at 2:29 PM, Martin Jambor wrote: > > Hi, > > > > On Mon, Jan 07, 2013 at 01:26:23AM +0100, Jan Hubicka wrote: > >> Hi, > >> as discused in the PR log there seems to be ordering issue in > >> update_indirect_edges_after_inlining that first updates info in call edge > >> to > >> correspond the situation after inlining and then it tries to devirtualize > >> that > >> is trying to look up the info prior inlining. > >> > >> Bootstrapped/regtested x86_64-linux > >> Martin, does it look sane? > > > > Yes, this is exactly what needs to be done. I'm quite surprised I had > > not already added a testcase for this. > > Is this maybe related to PR55264? No, that PR is actually a symtab/cgraph/inlining issue. > > The patch is also not yet applied btw ... Honza has applied it recently. Thanks, Martin
Re: [RFC PATCH] Implementing ifunc target hook
Hello Maxim,
>>
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -29146,7 +29146,7 @@ make_name (tree decl, const char *suffix, bool
make_unique)
return global_var_name;
}
-#if defined (ASM_OUTPUT_TYPE_DIRECTIVE) && HAVE_GNU_INDIRECT_FUNCTION
+#if defined (ASM_OUTPUT_TYPE_DIRECTIVE)
/* Make a dispatcher declaration for the multi-versioned function DECL.
Calls to DECL function will be replaced with calls to the dispatcher
@@ -29213,7 +29213,7 @@ ix86_get_function_versions_dispatcher (void *decl)
tree dispatch_decl = NULL;
-#if defined (ASM_OUTPUT_TYPE_DIRECTIVE) && HAVE_GNU_INDIRECT_FUNCTION
+#if defined (ASM_OUTPUT_TYPE_DIRECTIVE)
struct cgraph_function_version_info *it_v = NULL;
struct cgraph_node *dispatcher_node = NULL;
struct cgraph_function_version_info *dispatcher_version_info = NULL;
>>>
>>> It seems you can move these variables inside the 'if (TARGET_HAS_IFUNC)'
>>> clause below and make >the code cleaner, no?
>>
>> All variable declarations should be at the beginning of the routine.
>> Or is it changed right now?
>
>The variable declarations should be at the beginning of a block. Since you
>are adding a new block below (under if (TARGET_HAS_IFUNC) { }), and
>these variables are used only within that block, it would be cleaner to move
>them there.
Done, thank you.
>> diff --git a/gcc/config/host-linux.c b/gcc/config/host-linux.c
>> index b535758..c72db79 100644
>> --- a/gcc/config/host-linux.c
>> +++ b/gcc/config/host-linux.c
>>
>>
>> +/* Android does not support GNU indirect functions. */
>> +
>> +bool
>> +linux_has_ifunc (void)
>> +{
>> + return TARGET_ANDROID ? false : HAVE_GNU_INDIRECT_FUNCTION;
>> +}
>> +
>
>OK, so you defined new *target* hook has_ifunc[_p]. Placing one of the hook's
>implementation is into a host-specific file seems like a strange idea, but
>maybe I'm missing something.
>
>It seems you want to add a new file config/linux-android.c (with
>implementation for symbols used in config/linux-android.h) and add it
>Android-flavoured linux targets in config.gcc:
> # Add Android userspace support to Linux targets.
. case $target in
>*linux*)
> tm_file="$tm_file linux-android.h"
> extra_options="$extra_options linux-android.opt"
>+ extra_objs="$extra_objs linux-android.o"
> ;;
> esac
>
I agree, that would be much better, I added gcc/config/linux-android.c
and also gcc/config/t-linux-android for the rule, thanks.
>> diff --git a/gcc/config/linux-protos.h b/gcc/config/linux-protos.h
>> new file mode 100644
>> index 000..ea3d77d
>> --- /dev/null
>> +++ b/gcc/config/linux-protos.h
>> @@ -0,0 +1,21 @@
>> +/* Prototypes.
>> + Copyright (C) 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2010, 2011, 2012
>> + Free Software Foundation, Inc.
>> +
>> +This file is part of GCC.
>> +
>> +GCC is free software; you can redistribute it and/or modify
>> +it under the terms of the GNU General Public License as published by
>> +the Free Software Foundation; either version 3, or (at your option)
>> +any later version.
>> +
>> +GCC is distributed in the hope that it will be useful,
>> +but WITHOUT ANY WARRANTY; without even the implied warranty of
>> +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> +GNU General Public License for more details.
>> +
>> +You should have received a copy of the GNU General Public License
>> +along with GCC; see the file COPYING3. If not see
>> +
Re: [PR54693] loss of debug info in jump threading and loop ivopts
Alexandre Oliva writes:
> +int
> +main ()
> +{
> + int i;
> + char c;
> + char arr[11];
> +
> + for (i = 0; i < 10; i++)
> +{
> + c = 0x30 + i;
> + foo (&arr[i], c); /* { dg-final { gdb-test 24 "i" "c - 48" } } */
> +}
> +
> + __builtin_printf ("arr = %s\n", arr);
The string is not 0-terminated, which causes random characters to be
output, and could even result in a spurious crash. Installed as
obvious.
Andreas.
* gcc.dg/guality/pr54693.c: Null-terminate arr.
diff --git a/gcc/testsuite/gcc.dg/guality/pr54693.c
b/gcc/testsuite/gcc.dg/guality/pr54693.c
index adc2dfd..b852c06 100644
--- a/gcc/testsuite/gcc.dg/guality/pr54693.c
+++ b/gcc/testsuite/gcc.dg/guality/pr54693.c
@@ -21,6 +21,7 @@ main ()
c = 0x30 + i;
foo (&arr[i], c); /* { dg-final { gdb-test 22 "i" "c - 48" } } */
}
+ arr[10] = 0;
__builtin_printf ("arr = %s\n", arr);
return 0;
--
1.8.1
--
Andreas Schwab, SUSE Labs, sch...@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
[PATCH] Fix PR55882
This fixes PR55882 - set_mem_attributes_minus_bitpos misses to
account for the to-be applied bitpos when computing MEM_ALIGN.
It extracts alignment from 't' instead of &t - bitpos.
Bootstrapped and tested on x86_64-unknown-linux-gnu, bootstrap
and regtest running on mips.
Does this look sensible?
Thanks,
Richard.
2013-01-09 Richard Biener
PR middle-end/55882
* emit-rtl.c (set_mem_attributes_minus_bitpos): Correctly
account for the to-be applied bitpos when computing alignment.
Index: gcc/emit-rtl.c
===
--- gcc/emit-rtl.c (revision 195014)
+++ gcc/emit-rtl.c (working copy)
@@ -1839,7 +1839,12 @@ set_mem_attributes_minus_bitpos (rtx ref
if (!align_computed)
{
- unsigned int obj_align = get_object_alignment (t);
+ unsigned int obj_align;
+ unsigned HOST_WIDE_INT obj_bitpos;
+ get_object_alignment_1 (t, &obj_align, &obj_bitpos);
+ obj_bitpos = (obj_bitpos - apply_bitpos) & (obj_align - 1);
+ if (obj_bitpos != 0)
+ obj_align = (obj_bitpos & -obj_bitpos);
attrs.align = MAX (attrs.align, obj_align);
}
}
Re: [Patch, AArch64-4.7] Remove %r from asm_printf
On 09/01/13 10:12, Hurugalawadi, Naveen wrote: Hi, It would be much appreciated if you would handle the back port to ARM/aarch64-4.7-branch Thanks for reviewing the patch and your comments. Please find attached the backported patch to ARM/aarch64-4.7-branch. Regressed for aarch64-elf on aarch64-4.7-branch. Thanks, Naveen.H.S 2013-01-09 Naveen H.S * config/aarch64/aarch64.c (aarch64_print_operand): Replace %r in asm_fprintf with reg_names. (aarch64_print_operand_address): Likewise. (aarch64_return_addr): Likewise. * config/aarch64/aarch64.h (ASM_FPRINTF_EXTENSIONS): Remove. OK please commit. ChangeLog entry goes in ChangeLog.aarch64 for this branch. Thanks /Marcus
Re: [committed] Update extract and insert patterns on PA
Forgot this hunk in last change.
Dave
--
J. David Anglin dave.ang...@nrc-cnrc.gc.ca
National Research Council of Canada (613) 990-0752 (FAX: 952-6602)
2013-01-09 John David Anglin
* config/pa/pa.c (pa_emit_move_sequence): Replace calls to gen_insv
with calls to gen_insvsi/gen_insvdi.
Index: config/pa/pa.c
===
--- config/pa/pa.c (revision 195003)
+++ config/pa/pa.c (working copy)
@@ -2190,8 +2190,12 @@
emit_insn (gen_rtx_SET (VOIDmode, temp,
gen_rtx_HIGH (mode, operand1)));
emit_move_insn (temp, gen_rtx_LO_SUM (mode, temp, operand1));
- emit_insn (gen_insv (operand0, GEN_INT (32),
- const0_rtx, temp));
+ if (mode == DImode)
+ emit_insn (gen_insvdi (operand0, GEN_INT (32),
+ const0_rtx, temp));
+ else
+ emit_insn (gen_insvsi (operand0, GEN_INT (32),
+ const0_rtx, temp));
}
else
{
@@ -2212,8 +2216,12 @@
pos -= 1;
}
- emit_insn (gen_insv (operand0, GEN_INT (len),
- GEN_INT (pos), GEN_INT (v5)));
+ if (mode == DImode)
+ emit_insn (gen_insvdi (operand0, GEN_INT (len),
+ GEN_INT (pos), GEN_INT (v5)));
+ else
+ emit_insn (gen_insvsi (operand0, GEN_INT (len),
+ GEN_INT (pos), GEN_INT (v5)));
len = pos > 0 && pos < 5 ? pos : 5;
pos -= len;
Re: PR 55875 (IV wrapping issue)
> > Ugh. Both to stmt_dominates_stmt_p and to this (both use loops). > For stmt_dominates_stmt_p you'd simply use GIMPLE uids as other > passes do (and compute them, of course), for the above you'd > alongside of the UID store a sequence number that increments > at each stmt with side-effect. UID is 32bits, so you could > even store (stmt-number-in-bb << 8) | side-effect-nr in UID > (with the issue that if there are exactly 256 side-effect stmts > inbetween the two stmts you'd miss that fact ...). > > Well. At least those loops are a real issue IMHO. Adding a > second doesn't make complexity worse I understand - still ... > I expected better from you ;) > > Patch is ok, but think about this for a minute - eventually > you can come up with sth very clever. As I wrote in the comment above, I think it is best to precompute the bounds in number of iterations in basic blocks by same algorithm as discover_iteration_bound_by_body_walk. We will then have O(nstmts+nbounds) algorithm. The challenge is where to attach the data and how to keep it up to date. The non-wrappingness is tested on random uses of SCEV across the compiler when the loop body can be somewhat modified already (so thus also UIDs will run out of sync). Moreover the non-wrappingness is used by niter logic itself when bounds are being inserted (giving conservatively wrong answers) So I think it is more of 4.9 material. I would expect us to be actually slightly faster than before the patch, because we skip the bound walk when iterations already give the info. With constant time gsi_for_stmt the loop in stmt_dominates_stmt_p can probably be changed to start walk on one statement and look for the second. Honza
Re: [C++ Patch] PR 55801
OK. Jason
Re: [C/C++ PATCH] shift with negative or too big count warning (PR c/48418)
The C++ change is OK. Jason
Re: [PATCH] PR c++/55663 - constexpr function templ instantiation considered non-const as alias templ arg
Jason Merrill writes: > On 01/08/2013 08:58 AM, Dodji Seketeli wrote: >> There, when we check the argument 'the_truth()' to see if it >> actually is a constant expression, in check_instantiated_arg, we fail >> to recognize its constexpr-ness b/c we just look at its TREE_CONSTANT. > > The problem is that by the time we get to check_instantiated_arg, we > should have folded the expression into something > TREE_CONSTANT. convert_template_argument should have done that; don't > we ever call that function for this template argument? Presumably, you mean that convert_template_argument should call convert_nontype_argument to do that folding, right? I guess the reason why it's not doing it is that the call to convert_nontype_argument is conditional on else if (!uses_template_parms (orig_arg) && !uses_template_parms (t)) /* We used to call digest_init here. However, digest_init will report errors, which we don't want when complain is zero. More importantly, digest_init will try too hard to convert things: for example, `0' should not be converted to pointer type at this point according to the standard. Accepting this is not merely an extension, since deciding whether or not these conversions can occur is part of determining which function template to call, or whether a given explicit argument specification is valid. */ val = convert_nontype_argument (t, orig_arg, complain); As the argument 'the_truth()' we care about is type dependant, uses_template_parms returns true and so convert_nontype_argument is never called. What is your preferred way want to handle this? -- Dodji
PR tree-optimization/55569 (profile updating ICE)
Hi,
this patch fixes problem with negative probabilities that result in overflow on
ITERATION_BOUND parameter that is taken from niter code returning wider values
than int. I went for gcov_type instead of HOST_WIDE_INT because it makes sense
to derive the bounds from profile, too.
Will commit it as obvious once bootstrap/regtest on x86_64 complette.
Honza
PR tree-optimization/55569
* cfgloopmanip.c (scale_loop_profile): Make ITERATION_BOUND gcov_type.
* cfgloop.h (scale_loop_profile): Likewise.
* gcc.c-torture/compile/pr55569.c: New testcase.
Index: cfgloopmanip.c
===
--- cfgloopmanip.c (revision 195047)
+++ cfgloopmanip.c (working copy)
@@ -481,7 +481,7 @@ scale_loop_frequencies (struct loop *loo
to iterate too many times. */
void
-scale_loop_profile (struct loop *loop, int scale, int iteration_bound)
+scale_loop_profile (struct loop *loop, int scale, gcov_type iteration_bound)
{
gcov_type iterations = expected_loop_iterations_unbounded (loop);
edge e;
Index: cfgloop.h
===
--- cfgloop.h (revision 195047)
+++ cfgloop.h (working copy)
@@ -711,7 +711,7 @@ extern void unroll_and_peel_loops (int);
extern void doloop_optimize_loops (void);
extern void move_loop_invariants (void);
extern bool finite_loop_p (struct loop *);
-extern void scale_loop_profile (struct loop *loop, int scale, int
iteration_bound);
+extern void scale_loop_profile (struct loop *loop, int scale, gcov_type
iteration_bound);
extern vec get_loop_hot_path (const struct loop *loop);
/* Returns the outermost loop of the loop nest that contains LOOP.*/
Index: testsuite/gcc.c-torture/compile/pr55569.c
===
--- testsuite/gcc.c-torture/compile/pr55569.c (revision 0)
+++ testsuite/gcc.c-torture/compile/pr55569.c (revision 0)
@@ -0,0 +1,11 @@
+/* { dg-options "-O1 -ftree-vectorize" } */
+int *bar (void);
+
+void
+foo (void)
+{
+ long x;
+ int *y = bar ();
+for (x = -1 / sizeof (int); x; --x, ++y)
+ *y = 0;
+}
Commit: V850: Fix floating point comparisons, branches and conditional stores
Hi Guys,
I am checking in the patch below to fix the V850's floating point
comparison patterns, which was inverted in many places. The also
includes a contribution from Nguyen Duy Dat at Renesas which adds
floating point conditional store patterns and floating point
conditional branch patterns.
Tested with no regressions on a v850e2v3-elf toolchain.
Cheers
Nick
gcc/ChangeLog
2013-01-09 Nguyen Duy Dat
Nick Clifton
* config/v850/v850.md (cbranchsf4): New pattern.
(cstoresf4): New pattern.
(cbranchdf4): New pattern.
(cstoredf4): New pattern.
(movsicc): Disallow floating point comparisons.
(cmpsf_le_insn): Fix order of operators.
(cmpsf_lt_insn): Likewise.
(cmpsf_eq_insn): Likewise.
(cmpdf_le_insn): Likewise.
(cmpdf_lt_insn): Likewise.
(cmpdf_eq_insn): Likewise.
(cmpsf_ge_insn): Use LE comparison.
(cmpdf_ge_insn): Likewise.
(cmpsf_gt_insn): Use LT comparison.
(cmpdf_gt_insn): Likewise.
(cmpsf_ne_insn): Delete pattern.
(cmpdf_ne_insn): Delete pattern.
* config/v850/v850.c (v850_gen_float_compare): Use
gen_cmpdf_eq_insn for NE comparison.
(v850_float_z_comparison_operator)
(v850_float_nz_comparison_operator): Move from here ...
* config/v850/predicates.md: ... to here. Move GT and GE
comparisons into v850_float_z_comparison_operator.
* config/v850/v850-protos.h (v850_float_z_comparison_operator):
Delete prototype.
(v850_float_nz_comparison_operator): Likewise.
Index: gcc/config/v850/predicates.md
===
--- gcc/config/v850/predicates.md (revision 195050)
+++ gcc/config/v850/predicates.md (working copy)
@@ -497,3 +497,68 @@
return op == CONST0_RTX(mode);
})
+
+;; Return true if the floating point comparison operation
+;; given produces a canonical answer.
+(define_predicate "v850_float_z_comparison_operator"
+ (match_code "lt,le,eq,gt,ge")
+{
+ enum rtx_code code = GET_CODE (op);
+
+ if (GET_RTX_CLASS (code) != RTX_COMPARE
+ && GET_RTX_CLASS (code) != RTX_COMM_COMPARE)
+return 0;
+
+ if (mode != GET_MODE (op) && mode != VOIDmode)
+return 0;
+
+ if ((GET_CODE (XEXP (op, 0)) != REG
+ || REGNO (XEXP (op, 0)) != CC_REGNUM)
+ || XEXP (op, 1) != const0_rtx)
+return 0;
+
+ if (GET_MODE (XEXP (op, 0)) == CC_FPU_LTmode)
+return code == LT;
+ if (GET_MODE (XEXP (op, 0)) == CC_FPU_LEmode)
+return code == LE;
+ if (GET_MODE (XEXP (op, 0)) == CC_FPU_EQmode)
+return code == EQ;
+ if (GET_MODE (XEXP (op, 0)) == CC_FPU_GTmode)
+return code == GT;
+ if (GET_MODE (XEXP (op, 0)) == CC_FPU_GEmode)
+return code == GE;
+
+ /* Note we do not accept CC_FPU_NEmode here. See
+ v850_float_nz_comparison for the reason why. */
+ return 0;
+})
+
+;; Return true if the floating point comparison operation
+;; given produces an inverted answer.
+(define_predicate "v850_float_nz_comparison_operator"
+ (match_code "ne")
+{
+ enum rtx_code code = GET_CODE (op);
+
+ /* The V850E2V3 does not have a floating point NZ comparison operator.
+ Instead it is implemented as an EQ comparison and this function ensures
+ that the branch_nz_normal and set_nz_insn patterns are used to examine
+ (and invert) the result of the floating point comparison. */
+
+ if (GET_RTX_CLASS (code) != RTX_COMPARE
+ && GET_RTX_CLASS (code) != RTX_COMM_COMPARE)
+return 0;
+
+ if (mode != GET_MODE (op) && mode != VOIDmode)
+return 0;
+
+ if ((GET_CODE (XEXP (op, 0)) != REG
+ || REGNO (XEXP (op, 0)) != CC_REGNUM)
+ || XEXP (op, 1) != const0_rtx)
+return 0;
+
+ if (GET_MODE (XEXP (op, 0)) == CC_FPU_NEmode)
+return code == NE;
+
+ return 0;
+})
Index: gcc/config/v850/v850-protos.h
===
--- gcc/config/v850/v850-protos.h (revision 195050)
+++ gcc/config/v850/v850-protos.h (working copy)
@@ -40,8 +40,6 @@
extern char * construct_dispose_instruction (rtx);
extern char * construct_prepare_instruction (rtx);
extern intep_memory_operand (rtx, enum machine_mode, int);
-extern intv850_float_z_comparison_operator (rtx, enum machine_mode);
-extern intv850_float_nz_comparison_operator (rtx, enum machine_mode);
extern rtxv850_gen_compare (enum rtx_code, enum machine_mode,
rtx, rtx);
extern enum machine_mode v850_gen_float_compare (enum rtx_code,
Index: gcc/config/v850/v850.c
===
--- gcc/config/v850/v850.c (revision 195050)
+++ gcc/config/v850/v850.c (working copy)
@@ -898,61 +898,6 @@
return "";
}
-/* Generate comparison code. */
-int
-v850_float_z_comparison_operator (rtx op, enum machine_mode mode)
-{
- enum rtx_cod
[testsuite] Disabling gcc.dg/cpp/trad/include.c for Android
Hi, We have test fail for gcc.dg/cpp/trad/include.c on Android. The reason for that is that -ftraditional-cpp is not expected to work on Android due to variadic macro (like #define __builtin_warning(x, y...)) in standard headers and traditional preprocessor cannot handle them. The attached patch disables that test. best regards Alexander include_trad_android.patch Description: Binary data
Re: [PATCH] PR c++/55663 - constexpr function templ instantiation considered non-const as alias templ arg
Gabriel Dos Reis writes: > We already have various predicates to test for constant > expressions so I am uneasy to add yet another one. I understand. I got lost in the number of existing predicates to test for constant expressions, to the point that I thought (wrongly) the one I wanted wasn't present. :-) > I think reduced_constant_expression_p is what you want. Thanks. I didn't realize this would work because the comment of initializer_constant_valid_p (that it uses) says: We assume that VALUE has been folded as much as possible On a side node, as Jason said in the thread, we might not even need to touch anything here, as check_instantiated_arg also assumes that its arg has been fully folded. I guess I'll propose to update the comment of that function to reflect that assumption. Thanks. -- Dodji
Re: [PATCH] PR c++/55663 - constexpr function templ instantiation considered non-const as alias templ arg
On Wed, Jan 9, 2013 at 9:30 AM, Dodji Seketeli wrote: > Gabriel Dos Reis writes: > >> We already have various predicates to test for constant >> expressions so I am uneasy to add yet another one. > > I understand. I got lost in the number of existing predicates to test > for constant expressions, so am I :-) > to the point that I thought (wrongly) the one I wanted wasn't present. :-) > >> I think reduced_constant_expression_p is what you want. > > Thanks. I didn't realize this would work because the comment of > initializer_constant_valid_p (that it uses) says: > > We assume that VALUE has been folded as much as possible > > On a side node, as Jason said in the thread, we might not even need to > touch anything here, as check_instantiated_arg also assumes that its arg > has been fully folded. I guess I'll propose to update the comment of > that function to reflect that assumption. I read your reply. I am now even more puzzled than before. The call to uses_template_parm indicates that we expect that code to work when are also when processing a template (e.g. for non-dependent cases inside a template.) That makes me wonder how it could possibly work for the cases at hand because for non-type template arguments we need full instantiation information to determine convertibility and "constant"ness. -- Gaby
Re: [PATCH] PR c++/55663 - constexpr function templ instantiation considered non-const as alias templ arg
On 01/09/2013 10:02 AM, Dodji Seketeli wrote: As the argument 'the_truth()' we care about is type dependant, uses_template_parms returns true and so convert_nontype_argument is never called. Right, but we should call it for the instantiated argument, too. We do that for class templates by calling lookup_template_class again, which calls coerce_template_parms. We need to make sure we call coerce_template_parms when instantiating alias templates, too. Jason
Re: [Patch, Fortran] PR55758 - Non-C_Bool handling with BIND(C)
Am 08.01.2013 21:07, schrieb Janne Blomqvist: As written before, I believe that the patch avoids some pitfalls with C interoperability of logical variables: On one hand, it improves cross-compiler portability by rejecting non C_BOOL ones with -std=f2003/f2008/f2008ts; This part is certainly ok. And has now been committed as Rev. 195055. However, I still believe that we should do something -std=gnu. See also: http://gcc.gnu.org/ml/fortran/2013-01/msg00077.html Tobias
[Patch, AArch64-4.7] Implement support for LD1R.
Hi,
Attached is a patch that implements support for AdvSIMD instruction LD1R.
Tested on aarch64-none-elf. OK to commit on aarch64-4.7-branch?
Thanks,
Tejas Belagod
ARM.
2013-01-09 Tejas Belagod
gcc/
* config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r): New.
* config/aarch64/iterators.md (VALLDI): New.
testsuite/
* gcc.target/aarch64/aarch64/vect-ld1r-compile-fp.c: New.
* gcc.target/aarch64/vect-ld1r-compile.c: New.
* gcc.target/aarch64/vect-ld1r-fp.c: New.
* gcc.target/aarch64/vect-ld1r.c: New.
* gcc.target/aarch64/vect-ld1r.x: New.diff --git a/gcc/config/aarch64/aarch64-simd.md
b/gcc/config/aarch64/aarch64-simd.md
index 98511cb..0b83866 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -3417,3 +3417,11 @@
DONE;
})
+(define_insn "*aarch64_simd_ld1r"
+ [(set (match_operand:VALLDI 0 "register_operand" "=w")
+ (vec_duplicate:VALLDI
+ (match_operand: 1 "aarch64_simd_struct_operand" "Utv")))]
+ "TARGET_SIMD"
+ "ld1r\\t{%0.}, %1"
+ [(set_attr "simd_type" "simd_load1r")
+ (set_attr "simd_mode" "")])
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 7a1cdc8..1ad3334 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -89,6 +89,9 @@
;; All modes.
(define_mode_iterator VALL [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF
V2DF])
+;; All vector modes and DI.
+(define_mode_iterator VALLDI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF
V2DF DI])
+
;; Vector modes for Integer reduction across lanes.
(define_mode_iterator VDQV [V8QI V16QI V4HI V8HI V4SI])
diff --git a/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile-fp.c
b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile-fp.c
new file mode 100644
index 000..257ec21
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile-fp.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#include "stdint.h"
+#include "vect-ld1r.x"
+
+DEF (float)
+DEF (double)
+
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "ldr\\t\d\[0-9\]+"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.2d"} } */
+
diff --git a/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c
b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c
new file mode 100644
index 000..9cc54fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#include "stdint.h"
+#include "vect-ld1r.x"
+
+DEF (int8_t)
+DEF (int16_t)
+DEF (int32_t)
+DEF (int64_t)
+
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8b"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.16b"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4h"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "ldr\\t\x\[0-9\]+"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.2d"} } */
diff --git a/gcc/testsuite/gcc.target/aarch64/vect-ld1r-fp.c
b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-fp.c
new file mode 100644
index 000..5e384e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-fp.c
@@ -0,0 +1,51 @@
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+extern void abort (void);
+
+#include "stdint.h"
+#include "vect-ld1r.x"
+
+DEF (float)
+DEF (double)
+
+#define FOOD(TYPE) \
+ foo_ ## TYPE ## _d (&a_ ## TYPE, output_ ## TYPE)
+
+#define FOOQ(TYPE) \
+ foo_ ## TYPE ## _q (&a_ ## TYPE, output_ ## TYPE)
+
+#define CHECKD(TYPE) \
+ for (i = 0; i < 8 / sizeof (TYPE); i++) \
+if (output_ ## TYPE[i] != a_ ## TYPE) \
+ abort ()
+
+#define CHECKQ(TYPE) \
+ for (i = 0; i < 32 / sizeof (TYPE); i++) \
+if (output_ ## TYPE[i] != a_ ## TYPE) \
+ abort ()
+
+#define DECL(TYPE) \
+ TYPE output_ ## TYPE[32]; \
+ TYPE a_ ## TYPE = (TYPE)12.2
+
+int
+main (void)
+{
+
+ DECL(float);
+ DECL(double);
+ int i;
+
+ FOOD (float);
+ CHECKD (float);
+ FOOQ (float);
+ CHECKQ (float);
+
+ FOOD (double);
+ CHECKD (double);
+ FOOQ (double);
+ CHECKQ (double);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/vect-ld1r.c
b/gcc/testsuite/gcc.target/aarch64/vect-ld1r.c
new file mode 100644
index 000..f0571de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect-ld1r.c
@@ -0,0 +1,65 @@
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+extern void abort (void);
+
+#include "stdint.h"
+#include "vect-ld1r.x"
+
+DEF (int8_t)
+DEF (int16_t)
+DEF (int32_t)
+DEF (int64_t)
+
+#define FOOD(TYPE) \
+ foo_ ## TYPE ## _d (&a_ ## TYPE, output_ ## TYPE)
+
+#define FOOQ(TYPE) \
+ foo_ ## TYPE ## _q (&a_ ## TYPE, output_ ## TYPE)
+
+#define CHECKD(TYPE) \
+ for (i = 0; i < 8 / sizeof (TYPE); i++) \
+if (output_ ## TYPE[i] != a_ ## TYPE) \
+ abort ()
+
+#define CHECKQ(TYPE) \
+ for (i = 0;
[Patch, AArch64] Implement support for LD1R.
Hi,
Attached is a patch that implements support for AdvSIMD instruction LD1R.
Tested on aarch64-none-elf. OK for trunk?
Thanks,
Tejas Belagod
ARM.
2013-01-09 Tejas Belagod
gcc/
* config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r): New.
* config/aarch64/iterators.md (VALLDI): New.
testsuite/
* gcc.target/aarch64/aarch64/vect-ld1r-compile-fp.c: New.
* gcc.target/aarch64/vect-ld1r-compile.c: New.
* gcc.target/aarch64/vect-ld1r-fp.c: New.
* gcc.target/aarch64/vect-ld1r.c: New.
* gcc.target/aarch64/vect-ld1r.x: New.diff --git a/gcc/config/aarch64/aarch64-simd.md
b/gcc/config/aarch64/aarch64-simd.md
index 1d66340..9acbc2a 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -3492,3 +3492,11 @@
DONE;
})
+(define_insn "*aarch64_simd_ld1r"
+ [(set (match_operand:VALLDI 0 "register_operand" "=w")
+ (vec_duplicate:VALLDI
+ (match_operand: 1 "aarch64_simd_struct_operand" "Utv")))]
+ "TARGET_SIMD"
+ "ld1r\\t{%0.}, %1"
+ [(set_attr "simd_type" "simd_load1r")
+ (set_attr "simd_mode" "")])
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 0eb30f0..d99abd7 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -89,6 +89,9 @@
;; All modes.
(define_mode_iterator VALL [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF
V2DF])
+;; All vector modes and DI.
+(define_mode_iterator VALLDI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF
V2DF DI])
+
;; Vector modes for Integer reduction across lanes.
(define_mode_iterator VDQV [V8QI V16QI V4HI V8HI V4SI])
diff --git a/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile-fp.c
b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile-fp.c
new file mode 100644
index 000..66e0168
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile-fp.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -fno-vect-cost-model" } */
+
+#include "stdint.h"
+#include "vect-ld1r.x"
+
+DEF (float)
+DEF (double)
+
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "ldr\\t\x\[0-9\]+"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.2d"} } */
+
diff --git a/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c
b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c
new file mode 100644
index 000..761777f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -fno-vect-cost-model" } */
+
+#include "stdint.h"
+#include "vect-ld1r.x"
+
+DEF (int8_t)
+DEF (int16_t)
+DEF (int32_t)
+DEF (int64_t)
+
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8b"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.16b"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4h"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8h"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4s"} } */
+/* { dg-final { scan-assembler "ldr\\t\x\[0-9\]+"} } */
+/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.2d"} } */
diff --git a/gcc/testsuite/gcc.target/aarch64/vect-ld1r-fp.c
b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-fp.c
new file mode 100644
index 000..5e384e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect-ld1r-fp.c
@@ -0,0 +1,51 @@
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+extern void abort (void);
+
+#include "stdint.h"
+#include "vect-ld1r.x"
+
+DEF (float)
+DEF (double)
+
+#define FOOD(TYPE) \
+ foo_ ## TYPE ## _d (&a_ ## TYPE, output_ ## TYPE)
+
+#define FOOQ(TYPE) \
+ foo_ ## TYPE ## _q (&a_ ## TYPE, output_ ## TYPE)
+
+#define CHECKD(TYPE) \
+ for (i = 0; i < 8 / sizeof (TYPE); i++) \
+if (output_ ## TYPE[i] != a_ ## TYPE) \
+ abort ()
+
+#define CHECKQ(TYPE) \
+ for (i = 0; i < 32 / sizeof (TYPE); i++) \
+if (output_ ## TYPE[i] != a_ ## TYPE) \
+ abort ()
+
+#define DECL(TYPE) \
+ TYPE output_ ## TYPE[32]; \
+ TYPE a_ ## TYPE = (TYPE)12.2
+
+int
+main (void)
+{
+
+ DECL(float);
+ DECL(double);
+ int i;
+
+ FOOD (float);
+ CHECKD (float);
+ FOOQ (float);
+ CHECKQ (float);
+
+ FOOD (double);
+ CHECKD (double);
+ FOOQ (double);
+ CHECKQ (double);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/vect-ld1r.c
b/gcc/testsuite/gcc.target/aarch64/vect-ld1r.c
new file mode 100644
index 000..f0571de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect-ld1r.c
@@ -0,0 +1,65 @@
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+extern void abort (void);
+
+#include "stdint.h"
+#include "vect-ld1r.x"
+
+DEF (int8_t)
+DEF (int16_t)
+DEF (int32_t)
+DEF (int64_t)
+
+#define FOOD(TYPE) \
+ foo_ ## TYPE ## _d (&a_ ## TYPE, output_ ## TYPE)
+
+#define FOOQ(TYPE) \
+ foo_ ## TYPE ## _q (&a_ ## TYPE, output_ ## TYPE)
+
+#define CHECKD(TYPE) \
+ for (i = 0; i < 8 / sizeof (TYPE); i++) \
+if (output_ ## TYPE[i] != a_ ## TYPE) \
+ abort ()
+
+#define CHECKQ(TYPE
[PATCH, i386]: Change mode attribute of movddup insn to DF.
Hello!
Jakub noticed that we declare the mode of movddup insn inconistently
as V2DF or DF. Calculation of various prefixes for certain non-AVX sse
insns depends on correct definition of insn mode; for V2DFmode
prefix_data16 is added and for DFmode, prefix_rep is added. In case of
movddup, the later is used, so the insn mode should be declared as DF.
In practice, there is no difference in calculated insn length, but
let's be consistent here.
2013-01-09 Uros Bizjak
* config/i386/sse.md (*vec_interleave_highv2df): Change mode
attribute of movddup insn to DF.
(*vec_interleave_lowv2df): Ditto.
(vec_dupv2df): Ditto.
Patch was tested on x86_64-pc-linux-gnu {,-m32}. The patch is trivial
and will committed to mainline (even in this stage) and 4.7 branch.
Uros.
Index: sse.md
===
--- sse.md (revision 195051)
+++ sse.md (working copy)
@@ -4622,7 +4622,7 @@
(set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")
(set_attr "prefix_data16" "*,*,*,1,*,1")
(set_attr "prefix" "orig,vex,maybe_vex,orig,vex,maybe_vex")
- (set_attr "mode" "V2DF,V2DF,V2DF,V1DF,V1DF,V1DF")])
+ (set_attr "mode" "V2DF,V2DF,DF,V1DF,V1DF,V1DF")])
;; Recall that the 256-bit unpck insns only shuffle within their lanes.
(define_expand "avx_movddup256"
@@ -4723,7 +4723,7 @@
(set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")
(set_attr "prefix_data16" "*,*,*,1,*,1")
(set_attr "prefix" "orig,vex,maybe_vex,orig,vex,maybe_vex")
- (set_attr "mode" "V2DF,V2DF,V2DF,V1DF,V1DF,V1DF")])
+ (set_attr "mode" "V2DF,V2DF,DF,V1DF,V1DF,V1DF")])
(define_split
[(set (match_operand:V2DF 0 "memory_operand")
@@ -5180,7 +5180,7 @@
[(set_attr "isa" "noavx,sse3")
(set_attr "type" "sselog1")
(set_attr "prefix" "orig,maybe_vex")
- (set_attr "mode" "V2DF")])
+ (set_attr "mode" "V2DF,DF")])
(define_insn "*vec_concatv2df"
[(set (match_operand:V2DF 0 "register_operand" "=x,x,x,x,x,x,x,x")
patch to fix PR55829
The following patch fixes
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55829
The patch was successfully bootstrapped on x86-64.
Committed as rev. 195057.
2013-01-09 Vladimir Makarov
PR rtl-optimization/pr55829
* lra-constraints.c (match_reload): Add code for absent output.
(curr_insn_transform): Add code for reloads of matched inputs
without output.
2013-01-09 Vladimir Makarov
PR rtl-optimization/pr55829
* gcc.target/i386/pr55829.c: New.
Index: lra-constraints.c
===
--- lra-constraints.c (revision 195054)
+++ lra-constraints.c (working copy)
@@ -658,8 +658,9 @@ narrow_reload_pseudo_class (rtx reg, enu
/* Generate reloads for matching OUT and INS (array of input operand
numbers with end marker -1) with reg class GOAL_CLASS. Add input
- and output reloads correspondingly to the lists *BEFORE and
- *AFTER. */
+ and output reloads correspondingly to the lists *BEFORE and *AFTER.
+ OUT might be negative. In this case we generate input reloads for
+ matched input operands INS. */
static void
match_reload (signed char out, signed char *ins, enum reg_class goal_class,
rtx *before, rtx *after)
@@ -668,10 +669,10 @@ match_reload (signed char out, signed ch
rtx new_in_reg, new_out_reg, reg, clobber;
enum machine_mode inmode, outmode;
rtx in_rtx = *curr_id->operand_loc[ins[0]];
- rtx out_rtx = *curr_id->operand_loc[out];
+ rtx out_rtx = out < 0 ? in_rtx : *curr_id->operand_loc[out];
- outmode = curr_operand_mode[out];
inmode = curr_operand_mode[ins[0]];
+ outmode = out < 0 ? inmode : curr_operand_mode[out];
push_to_sequence (*before);
if (inmode != outmode)
{
@@ -746,14 +747,13 @@ match_reload (signed char out, signed ch
= lra_create_new_reg_with_unique_value (outmode, out_rtx,
goal_class, "");
}
- /* In and out operand can be got from transformations before
- processing insn constraints. One example of such transformations
- is subreg reloading (see function simplify_operand_subreg). The
- new pseudos created by the transformations might have inaccurate
+ /* In operand can be got from transformations before processing insn
+ constraints. One example of such transformations is subreg
+ reloading (see function simplify_operand_subreg). The new
+ pseudos created by the transformations might have inaccurate
class (ALL_REGS) and we should make their classes more
accurate. */
narrow_reload_pseudo_class (in_rtx, goal_class);
- narrow_reload_pseudo_class (out_rtx, goal_class);
lra_emit_move (copy_rtx (new_in_reg), in_rtx);
*before = get_insns ();
end_sequence ();
@@ -765,6 +765,10 @@ match_reload (signed char out, signed ch
*curr_id->operand_loc[in] = new_in_reg;
}
lra_update_dups (curr_id, ins);
+ if (out < 0)
+return;
+ /* See a comment for the input operand above. */
+ narrow_reload_pseudo_class (out_rtx, goal_class);
if (find_reg_note (curr_insn, REG_UNUSED, out_rtx) == NULL_RTX)
{
start_sequence ();
@@ -2597,6 +2601,7 @@ curr_insn_transform (void)
int n_alternatives;
int commutative;
signed char goal_alt_matched[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
+ signed char match_inputs[MAX_RECOG_OPERANDS + 1];
rtx before, after;
bool alt_p = false;
/* Flag that the insn has been changed through a transformation. */
@@ -3052,17 +3057,28 @@ curr_insn_transform (void)
&& (curr_static_id->operand[goal_alt_matched[i][0]].type
== OP_OUT))
{
- signed char arr[2];
-
- arr[0] = i;
- arr[1] = -1;
- match_reload (goal_alt_matched[i][0], arr,
+ /* generate reloads for input and matched outputs. */
+ match_inputs[0] = i;
+ match_inputs[1] = -1;
+ match_reload (goal_alt_matched[i][0], match_inputs,
goal_alt[i], &before, &after);
}
else if (curr_static_id->operand[i].type == OP_OUT
&& (curr_static_id->operand[goal_alt_matched[i][0]].type
== OP_IN))
+ /* Generate reloads for output and matched inputs. */
match_reload (i, goal_alt_matched[i], goal_alt[i], &before, &after);
+ else if (curr_static_id->operand[i].type == OP_IN
+ && (curr_static_id->operand[goal_alt_matched[i][0]].type
+ == OP_IN))
+ {
+ /* Generate reloads for matched inputs. */
+ match_inputs[0] = i;
+ for (j = 0; (k = goal_alt_matched[i][j]) >= 0; j++)
+ match_inputs[j + 1] = k;
+ match_inputs[j + 1] = -1;
+ match_reload (-1, match_inputs, goal_alt[i], &before, &after);
+ }
else
/* We must generate code in any case when function
process_alt_operands decides that it is possible. */
Index: testsuit
Re: [testsuite] Disabling gcc.dg/cpp/trad/include.c for Android
On Wed, Jan 9, 2013 at 7:14 AM, Alexander Ivchenko wrote: > Hi, > > We have test fail for gcc.dg/cpp/trad/include.c on Android. The > reason for that is that > -ftraditional-cpp is not expected to work on Android due to variadic > macro (like #define __builtin_warning(x, y...)) > in standard headers and traditional preprocessor cannot handle them. > The attached patch disables that test. It sounds like it is better to fix the system headers instead. Via a fixincludes for older headers and have the android folks fix them for newer releases. Thanks, Andrew Pinski
Re: [Patch, Fortran] PR55758 - Non-C_Bool handling with BIND(C)
Le 09/01/2013 17:22, Tobias Burnus a écrit : However, I still believe that we should do something -std=gnu. Hm, reject? One can't declare a procedure with one type on one side, and another different type on the other side and expect things to work. We don't support passing integer as real, or real as integer, we shouldn't support integer as logical. For what it's worth, I think there should be no logical kind. To store integer or real values, it makes sense to leave the choice to the user depending on the range of the data, but to store only two different possible values, really it's a target-dependent choice that should be left to the compiler. Anyway, I'm in favor of rejecting by default. Mikael
Re: [PATCH] Allow x <- x, 1 in *vec_concatv2df (PR rtl-optimization/55829)
On Wed, Jan 9, 2013 at 10:23 AM, Uros Bizjak wrote: >> No matter whether LRA (if it is a bug in there) is fixed or not, >> *vec_concatv2df could handle for !avx sse3 x <- x, 1 alternative the same >> as it handles x <- m, 1 alternative (using movddup). >> >> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? >> >> 2013-01-08 Jakub Jelinek >> >> PR rtl-optimization/55829 >> * config/i386/sse.md (*vec_concatv2df): Add x <- x, 1 alternative >> for sse3 but not avx. >> >> * gcc.target/i386/pr55829.c: New test. >> >> --- gcc/config/i386/sse.md.jj 2012-11-26 10:14:26.0 +0100 >> +++ gcc/config/i386/sse.md 2013-01-08 10:28:42.496819712 +0100 >> @@ -5183,10 +5183,10 @@ (define_insn "vec_dupv2df" >> (set_attr "mode" "V2DF")]) >> >> (define_insn "*vec_concatv2df" >> - [(set (match_operand:V2DF 0 "register_operand" "=x,x,x,x,x,x,x,x") >> + [(set (match_operand:V2DF 0 "register_operand" "=x,x,x, x,x,x,x,x") >> (vec_concat:V2DF >> - (match_operand:DF 1 "nonimmediate_operand" " 0,x,m,0,x,m,0,0") >> - (match_operand:DF 2 "vector_move_operand" " x,x,1,m,m,C,x,m")))] >> + (match_operand:DF 1 "nonimmediate_operand" " 0,x,xm,0,x,m,0,0") >> + (match_operand:DF 2 "vector_move_operand" " x,x,1, m,m,C,x,m")))] > > This was done on purpose, since reload had some problems with similar > pattern (please see PR 50875 [1] and [2]). If we are sure that LRA > fixes this problem, then the patch is OK for mainline. > > Also, please revert "hack" that fixed PR 50875 in this case. Looking into this problem a bit more: After Vladimir's LRA patch went in, we generate for gcc.target/i386/pr55829.c: movqp1(%rip), %r12 # 56*movdi_internal_rex64/2 [length = 7] movq%r12, (%rsp)# 57*movdi_internal_rex64/4 [length = 4] movddup (%rsp), %xmm1 # 23*vec_concatv2df/3 [length = 5] Combined with your proposed patch: movqp1(%rip), %r12 # 60*movdi_internal_rex64/2 [length = 7] movq%r12, (%rsp)# 61*movdi_internal_rex64/4 [length = 4] movsd (%rsp), %xmm1 # 56*movdf_internal_rex64/10 [length = 5] unpcklpd%xmm1, %xmm1# 23*vec_concatv2df/1 [length = 4] That is, one more move to use unpcklpd. Based on this evidence, I think that the proposed patch should be rejected, the generic LRA fix alone results in better code. Thanks, Uros.
C++ PATCH for c++/55893 (segfault running destructor on rodata)
My fix for PR 49673 made it so that objects with constant initialization
semantics through constexpr can go into rodata now. But objects with
non-trivial destruction semantics still need to go into writable data so
that the destructor can modify the object.
Tested x86_64-pc-linux-gnu, applying to trunk and 4.7.
commit f7142c9ff05259adbda2cb5797088b6a2c281ad9
Author: Jason Merrill
Date: Wed Jan 9 11:44:13 2013 -0500
PR c++/55893
* decl.c (cp_finish_decl): Clear TREE_READONLY if the variable
needs destruction.
diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index 9640824..c3622ec 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -6417,6 +6417,10 @@ cp_finish_decl (tree decl, tree init, bool init_const_expr_p,
}
else if (was_readonly)
TREE_READONLY (decl) = 1;
+
+ /* Likewise if it needs destruction. */
+ if (TYPE_HAS_NONTRIVIAL_DESTRUCTOR (type))
+ TREE_READONLY (decl) = 0;
}
make_rtl_for_nonlocal_decl (decl, init, asmspec);
diff --git a/gcc/testsuite/g++.dg/init/const9.C b/gcc/testsuite/g++.dg/init/const9.C
new file mode 100644
index 000..ba1dfd4
--- /dev/null
+++ b/gcc/testsuite/g++.dg/init/const9.C
@@ -0,0 +1,12 @@
+// PR c++/55893
+// { dg-final { scan-assembler-not "rodata" } }
+
+struct foo
+{
+ virtual ~foo ();
+};
+
+int main ()
+{
+ static const foo tmp;
+}
Re: RFA: Fix ICE on PARALLEL returns when expand builtins
Richard Biener writes: > On Fri, Jan 4, 2013 at 7:57 PM, Eric Botcazou wrote: >>> Eric, any comments? >> >> Richard's patch seems fine to me, modulo the name of the routine; I'd rather >> use maybe_emit_group_store or something along these lines. > > Ok, fine with me - you're clearly more experienced with this code. Thanks, finally applied with that change, and sorry for the delay... Richard
[PATCH, testsuite]: Fix scan string of gfortran.dg/intrinsic_size_3.f90
Hello!
The regexp in the scan string assumes that dumped temporaries have
exactly 4 numbers. Sometimes, this is not the case.
Attached patch fixes scan string to match a number with arbitrary
number of places instead.
2012-01-09 Uros Bizjak
* gfortran.dg/intrinsic_size_3.f90: Make scan-tree-dump-times
number matching more robust.
Tested on x86_64-pc-linux-gnu and alphaev68-linux-gnu, where it fixes
spurious test failure.
OK for mainline?
Uros.
Index: gfortran.dg/intrinsic_size_3.f90
===
--- gfortran.dg/intrinsic_size_3.f90(revision 195057)
+++ gfortran.dg/intrinsic_size_3.f90(working copy)
@@ -22,5 +22,5 @@
stop
end program bug
-! { dg-final { scan-tree-dump-times "iszs = \\(integer\\(kind=2\\)\\) MAX_EXPR
<\\(D.->dim.0..ubound - D.->dim.0..lbound\\) \\+ 1, 0>;" 1 "original" }
}
+! { dg-final { scan-tree-dump-times "iszs = \\(integer\\(kind=2\\)\\) MAX_EXPR
<\\(D.\[0-9\]+->dim.0..ubound - D.\[0-9\]+->dim.0..lbound\\) \\+ 1, 0>;" 1
"original" } }
! { dg-final { cleanup-tree-dump "original" } }
Re: [PATCH, testsuite]: Fix scan string of gfortran.dg/intrinsic_size_3.f90
The patch is OK. Thanks! Tobias Uros Bizjak wrote: The regexp in the scan string assumes that dumped temporaries have exactly 4 numbers. Sometimes, this is not the case. Attached patch fixes scan string to match a number with arbitrary number of places instead. 2012-01-09 Uros Bizjak * gfortran.dg/intrinsic_size_3.f90: Make scan-tree-dump-times number matching more robust. Tested on x86_64-pc-linux-gnu and alphaev68-linux-gnu, where it fixes spurious test failure. OK for mainline?
Re: Control dependence vs. builtin_unreachable
On 01/07/2013 01:42 PM, Steven Bosscher wrote:
typedef enum fruits { banana = 0, apple = 1, pear = 2, orange = 3 } fruit;
extern void price_fruit_of_the_day (int);
void
discount_of_the_day (fruit f)
{
int p, c = (int) f;
switch (f)
{
case banana:
UNREACHABLE ();
case apple:
p = 3 * c + 4;
break;
case pear:
case orange:
p = 7;
break;
}
price_fruit_of_the_day (p);
}
So if we look at this (I'll analyze the other cases separately).
In reassoc2 we have:
# BLOCK 2 freq:1
# PRED: ENTRY [100.0%] (fallthru,exec)
c_3 = (int) f_2(D);
switch (f_2(D)) , case 0: , case 1: , case 2
... 3: >
# SUCC: 6 [25.0%] (exec) 3 [25.0%] (exec) 4 [25.0%] (exec) 5
[25.0%] (exec)
# BLOCK 3 freq:2500
# PRED: 2 [25.0%] (exec)
:
# VUSE <.MEM_8(D)>
__builtin_unreachable ();
# SUCC:
# BLOCK 4 freq:2500
# PRED: 2 [25.0%] (exec)
:
D.1724_5 = c_3 * 3;
p_6 = D.1724_5 + 4;
goto ();
# SUCC: 6 [100.0%] (fallthru,exec)
# BLOCK 5 freq:2500
# PRED: 2 [25.0%] (exec)
:
# SUCC: 6 [100.0%] (fallthru,exec)
# BLOCK 6 freq:7500
# PRED: 2 [25.0%] (exec) 4 [100.0%] (fallthru,exec) 5 [100.0%]
(fallthru,exec)
# p_1 = PHI
:
# .MEM_9 = VDEF <.MEM_8(D)>
price_fruit_of_the_day (p_1);
# VUSE <.MEM_9>
return;
# SUCC: EXIT [100.0%]
}
What I'm suggesting is not simply removing the directive at the source
level, but at the appropriate time using the knowledge that the block is
unreachable to simplify the CFG. In this specific case we would
eliminate block #3 and the edge from 2->3.
If we do that VRP will come along and do its thing. With the block/edge
removals, it will discover that p_6 has the value 7, p_4 is undefined
and ultimately it'll collapse the PHI into p_1 = 7. The net result (in
this case) will be the same as using builtin_unreachable.
Contrast that to simply defining away the directive per your test. In
that case we'd still have an edge from 2->3. And when that's the case,
VRP won't find a constant for p_6, which ultimately makes p_1 varying
and triggers the warning because of the use of p_4 to compute p_1.
Jeff
Re: Control dependence vs. builtin_unreachable
On 01/07/2013 01:42 PM, Steven Bosscher wrote:
For optimizations it's a bit more difficult.
Somewhat. For what I'm suggesting, the way we'd miss an optimization
would be if by removing the unreachable block and simplifying the CFG we
ultimately remove a conditional which produced a result which we could
use later.
Something like this (tweaking your 2nd test):
int foo (int b, int c, int d)
{
int res, r = 0;
res = 5 * d + b;
if (d)
__builtin_unreachable ();
if (c)
r = res;
return r + d;
}
What I'm suggesting would effectively remove the conditional and
__builtin_unreacahble, so at the source level it'd look like:
int foo (int b, int c, int d)
{
int res, r = 0;
res = 5 * d + b;
if (c)
r = res;
return r + d;
}
By removing the conditional, we've lost the fact that to reach the
return statement, "d" must be zero, which is useful in optimizing the
return statement.
The situations I'm
looking at, are all sinking related, and I suspect that most missed
optimizations will be of this form:
int foo (int b, int c, int d)
{
int res, r = 0;
res = 5 * d + b;
if (d)
__builtin_unreachable ();
if (c)
r = res;
return r;
}
I don't see how my proposal would inhibit sinking in this kind of code.
In fact, it'd made it easier.
I already showed how the control dependence graph looks Wrong with
__builtin_unreachable calls in place. Any transformation using the CDG
will also be less effective because of this.
And what I'm suggesting would actually fix the post dominator tree,
among other things. Where we potentially lose is the tweaked case
above. However, if we do the optimization at the right time, we can get
the benefits we're both looking for, I believe.
jeff
Re: [PATCH] Fix PR55882
> This fixes PR55882 - set_mem_attributes_minus_bitpos misses to > account for the to-be applied bitpos when computing MEM_ALIGN. > It extracts alignment from 't' instead of &t - bitpos. > > Bootstrapped and tested on x86_64-unknown-linux-gnu, bootstrap > and regtest running on mips. > > Does this look sensible? I'm not sure, bitpos isn't taken into account in the other cases when the alignment is computed. adjust_address_1 is supposed to properly adjust the alignment by the time the offset is applied. -- Eric Botcazou
Fix undefined symbols in LTO Mozilla build
Hi,
currently Mozilla does not build with undefined symbol on
error: /tmp/cc0oq4BG.ltrans1.ltrans.o: requires dynamic R_X86_64_PC32 reloc
against '_ZN12SkAnnotationC1ER23SkFlattenableReadBuffer' which may overflow at
runtime; recompile with -fPIC
This is actually bug in Mozilla (the module is calling the function but it is
not
linked with the implementation). The call is however from dead virtual function
and
is optimized even at -O0 without LTO.
What breaks is that currently we do symtab_remove_unreachable_nodes in
post-inlining
mode only from cgraphunit path that is completely bypassed by WPA.
This is bug. The cleanup is supposed to happen just before inlining functions
called once. The patch also adds the cleanup to same place into
do_whole_program_analysis and updates cgraphclones.c so we do not ice when
removing offline copy of the function after inlining.
We really ought to do post-inlining cleanup from passmanager, too, but this
will require some bookeeping, so it is post 4.8 material.
Bootstrapped/regtested x86_64, lto-bootstrapped and tested with lto Mozilla.
Unforutnately there seems to be yet another undefined symbol problem as
described
by Markus.
Honza
PR lto/45375
* ipa-inline.c (ipa_inline): Remove extern inlines and virtual
functions.
* cgraphclones.c (cgraph_clone_node): Cpoy also LTO file data.
* lto.c (do_whole_program_analysis): Remove unreachable nodes after IPA.
Index: ipa-inline.c
===
--- ipa-inline.c(revision 195047)
+++ ipa-inline.c(working copy)
@@ -1793,7 +1793,7 @@ ipa_inline (void)
}
inline_small_functions ();
- symtab_remove_unreachable_nodes (true, dump_file);
+ symtab_remove_unreachable_nodes (false, dump_file);
free (order);
/* Inline functions with a property that after inlining into all callers the
Index: lto/lto.c
===
--- lto/lto.c (revision 195047)
+++ lto/lto.c (working copy)
@@ -3215,6 +3215,7 @@ do_whole_program_analysis (void)
cgraph_state = CGRAPH_STATE_IPA_SSA;
execute_ipa_pass_list (all_regular_ipa_passes);
+ symtab_remove_unreachable_nodes (false, dump_file);
if (cgraph_dump_file)
{
Index: cgraphclones.c
===
--- cgraphclones.c (revision 195047)
+++ cgraphclones.c (working copy)
@@ -184,6 +184,7 @@ cgraph_clone_node (struct cgraph_node *n
new_node->symbol.decl = decl;
symtab_register_node ((symtab_node)new_node);
new_node->origin = n->origin;
+ new_node->symbol.lto_file_data = n->symbol.lto_file_data;
if (new_node->origin)
{
new_node->next_nested = new_node->origin->nested;
unnecessary assert
I found an assert that trips on my port for trivial constructs, often. I'd
like to remove it, so that my port works better. The assert was added because
the case analysis he did was for when BLKmode MEM stores appeared in back when
he wrote the patch (Hi Jakub). He didn't analyze when dealing with a
non-BLKmode. I've been through the code, and it previously handled non-BLKmode
when the size was <= HOST_BITS_PER_WIDE_INT, so, I don't worry about that
aspect of it. Indeed, the very assert was originally directly above code that
was not more than HOST_BITS_PER_WIDE_INT bits safe:
- gcc_assert ((unsigned) width <= HOST_BITS_PER_WIDE_INT);
-
/* Finish filling in the store_info. */
store_info->next = insn_info->store_rec;
insn_info->store_rec = store_info;
store_info->mem = canon_rtx (mem);
store_info->alias_set = spill_alias_set;
store_info->mem_addr = get_addr (XEXP (mem, 0));
store_info->cse_base = base;
- store_info->positions_needed = lowpart_bitmask (width);
+ if (width > HOST_BITS_PER_WIDE_INT)
+{
+ store_info->is_large = true;
+ store_info->positions_needed.large.count = 0;
+ store_info->positions_needed.large.bitmap = BITMAP_ALLOC (NULL);
+}
+ else
+{
+ store_info->is_large = false;
+ store_info->positions_needed.small_bitmask = lowpart_bitmask (width);
+}
The new code in that patch added support for BLKmode with sizes >
HOST_BITS_PER_WIDE_INT. The assert was to protect the positions_needed, as it
wasn't big enough to handle any data larger than HOST_BITS_PER_WIDE_INT. The
previous patch now supports larger data and mediates access to positions_needed
based upon is_large, which is necessary.
The only outstanding question is, is there any other aspect of the code that
needs to now check is_large, that doesn't. I've looked and did not find any
other such code.
[ digging ]
Ah, the original assert was added in:
svn+ssh://gcc.gnu.org/svn/gcc/trunk@134199
and merely protected positions_needed, as I suspected.
Ok?
Ok for 2.8?
http://gcc.gnu.org/PR31150 is the PR when the assert was added, if you want to
see it. svn+ssh://gcc.gnu.org/svn/gcc/trunk@142892 is the change itself.
2013-01-09 Mike Stump
* dse.c (record_store): Remove unnecessary assert.
2013-01-09 Mike Stump
* dse.c (record_store): Remove unnecessary assert.
Index: dse.c
===
--- dse.c (revision 195067)
+++ dse.c (working copy)
@@ -1495,10 +1495,7 @@ record_store (rtx body, bb_info_t bb_inf
if (GET_MODE (mem) == BLKmode)
width = MEM_SIZE (mem);
else
-{
- width = GET_MODE_SIZE (GET_MODE (mem));
- gcc_assert ((unsigned) width <= HOST_BITS_PER_WIDE_INT);
-}
+width = GET_MODE_SIZE (GET_MODE (mem));
if (spill_alias_set)
{
[PATCH] Fix complex lowering with inline asm (PR tree-optimization/55921)
Hi!
We weren't processing GIMPLE_ASMs that set complex SSA_NAMEs, which lead to
SSA_NAMEs with NULL SSA_NAME_DEF_STMT, either leading to crashes or silent
wrong code, depending on --enable-checking. Fixed thusly,
bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2013-01-09 Jakub Jelinek
PR tree-optimization/55921
* tree-complex.c (expand_complex_asm): New function.
(expand_complex_operations_1): Call it for GIMPLE_ASM.
* gcc.c-torture/compile/pr55921.c: New test.
--- gcc/tree-complex.c.jj 2013-01-04 13:44:35.0 +0100
+++ gcc/tree-complex.c 2013-01-09 20:34:55.595674683 +0100
@@ -1391,6 +1391,36 @@ expand_complex_comparison (gimple_stmt_i
update_stmt (stmt);
}
+/* Expand inline asm that sets some complex SSA_NAMEs. */
+
+static void
+expand_complex_asm (gimple_stmt_iterator *gsi)
+{
+ gimple stmt = gsi_stmt (*gsi);
+ unsigned int i;
+
+ for (i = 0; i < gimple_asm_noutputs (stmt); ++i)
+{
+ tree link = gimple_asm_output_op (stmt, i);
+ tree op = TREE_VALUE (link);
+ if (TREE_CODE (op) == SSA_NAME
+ && TREE_CODE (TREE_TYPE (op)) == COMPLEX_TYPE)
+ {
+ tree type = TREE_TYPE (op);
+ tree inner_type = TREE_TYPE (type);
+ tree r = build1 (REALPART_EXPR, inner_type, op);
+ tree i = build1 (IMAGPART_EXPR, inner_type, op);
+ gimple_seq list = set_component_ssa_name (op, false, r);
+
+ if (list)
+ gsi_insert_seq_after (gsi, list, GSI_CONTINUE_LINKING);
+
+ list = set_component_ssa_name (op, true, i);
+ if (list)
+ gsi_insert_seq_after (gsi, list, GSI_CONTINUE_LINKING);
+ }
+}
+}
/* Process one statement. If we identify a complex operation, expand it. */
@@ -1403,6 +1433,12 @@ expand_complex_operations_1 (gimple_stmt
complex_lattice_t al, bl;
enum tree_code code;
+ if (gimple_code (stmt) == GIMPLE_ASM)
+{
+ expand_complex_asm (gsi);
+ return;
+}
+
lhs = gimple_get_lhs (stmt);
if (!lhs && gimple_code (stmt) != GIMPLE_COND)
return;
--- gcc/testsuite/gcc.c-torture/compile/pr55921.c.jj2013-01-09
20:37:33.643755543 +0100
+++ gcc/testsuite/gcc.c-torture/compile/pr55921.c 2013-01-09
20:37:07.0 +0100
@@ -0,0 +1,21 @@
+/* PR tree-optimization/55921 */
+
+typedef union
+{
+ _Complex float cf;
+ long long ll;
+} ucf;
+
+void
+foo (ucf *in, ucf *out, _Complex float r)
+{
+ int i;
+ ucf ucf1;
+ _Complex float cf;
+
+ ucf1.ll = in[i].ll;
+ __asm ("" : "=r" (cf) : "0" (ucf1.ll));
+ cf *= r;
+ __asm ("" : "=r" (ucf1.ll) : "0" (cf));
+ out[i].ll = ucf1.ll;
+}
Jakub
Re: unnecessary assert
On Wed, Jan 09, 2013 at 02:57:00PM -0800, Mike Stump wrote:
> Ok for 2.8?
Not to 2.8, but to 4.8 it is ok.
> http://gcc.gnu.org/PR31150 is the PR when the assert was added, if you want
> to see it. svn+ssh://gcc.gnu.org/svn/gcc/trunk@142892 is the change itself.
That actually didn't add the assert, just moved it from lots lines later
(unconditional there) to the conditional spot here.
> 2013-01-09 Mike Stump
>
> * dse.c (record_store): Remove unnecessary assert.
>
> 2013-01-09 Mike Stump
>
> * dse.c (record_store): Remove unnecessary assert.
>
> --- dse.c (revision 195067)
> +++ dse.c (working copy)
> @@ -1495,10 +1495,7 @@ record_store (rtx body, bb_info_t bb_inf
>if (GET_MODE (mem) == BLKmode)
> width = MEM_SIZE (mem);
>else
> -{
> - width = GET_MODE_SIZE (GET_MODE (mem));
> - gcc_assert ((unsigned) width <= HOST_BITS_PER_WIDE_INT);
> -}
> +width = GET_MODE_SIZE (GET_MODE (mem));
>
>if (spill_alias_set)
> {
Jakub
C++ PATCH for c++/55878 (wrong error with --enable-checking)
I still think a bogus error only with --enable-checking doesn't merit
P1, but it's still worth fixing. The problem was that the typeid code
hadn't been SFINAEd yet.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit 0b605fda3f97fd69b8106f096109535881413c83
Author: Jason Merrill
Date: Wed Jan 9 20:48:15 2013 -0500
PR c++/55878
* rtti.c (build_typeid, get_typeid): Add complain parm.
(get_tinfo_decl_dynamic): Likewise.
* cp-tree.h, parser.c, pt.c: Adjust.
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 810df7d..5482923 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -5476,9 +5476,9 @@ extern void finish_repo(void);
extern GTY(()) vec *unemitted_tinfo_decls;
extern void init_rtti_processing (void);
-extern tree build_typeid (tree);
+extern tree build_typeid (tree, tsubst_flags_t);
extern tree get_tinfo_decl (tree);
-extern tree get_typeid(tree);
+extern tree get_typeid(tree, tsubst_flags_t);
extern tree build_headof (tree);
extern tree build_dynamic_cast (tree, tree, tsubst_flags_t);
extern void emit_support_tinfos (void);
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index 8a90bec..36e9342 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -5473,7 +5473,7 @@ cp_parser_postfix_expression (cp_parser *parser, bool address_p, bool cast_p,
cp_parser_require (parser, CPP_CLOSE_PAREN, RT_CLOSE_PAREN);
/* If all went well, simply lookup the type-id. */
if (cp_parser_parse_definitely (parser))
- postfix_expression = get_typeid (type);
+ postfix_expression = get_typeid (type, tf_warning_or_error);
/* Otherwise, fall back to the expression variant. */
else
{
@@ -5482,7 +5482,7 @@ cp_parser_postfix_expression (cp_parser *parser, bool address_p, bool cast_p,
/* Look for an expression. */
expression = cp_parser_expression (parser, /*cast_p=*/false, & idk);
/* Compute its typeid. */
- postfix_expression = build_typeid (expression);
+ postfix_expression = build_typeid (expression, tf_warning_or_error);
/* Look for the `)' token. */
cp_parser_require (parser, CPP_CLOSE_PAREN, RT_CLOSE_PAREN);
}
diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c
index c55dabef..6d78dd2 100644
--- a/gcc/cp/pt.c
+++ b/gcc/cp/pt.c
@@ -14223,12 +14223,12 @@ tsubst_copy_and_build (tree t,
if (TYPE_P (operand_0))
{
operand_0 = tsubst (operand_0, args, complain, in_decl);
- RETURN (get_typeid (operand_0));
+ RETURN (get_typeid (operand_0, complain));
}
else
{
operand_0 = RECUR (operand_0);
- RETURN (build_typeid (operand_0));
+ RETURN (build_typeid (operand_0, complain));
}
}
diff --git a/gcc/cp/rtti.c b/gcc/cp/rtti.c
index de28371..77fd046 100644
--- a/gcc/cp/rtti.c
+++ b/gcc/cp/rtti.c
@@ -108,7 +108,6 @@ static tree tinfo_name (tree, bool);
static tree build_dynamic_cast_1 (tree, tree, tsubst_flags_t);
static tree throw_bad_cast (void);
static tree throw_bad_typeid (void);
-static tree get_tinfo_decl_dynamic (tree);
static tree get_tinfo_ptr (tree);
static bool typeid_ok_p (void);
static int qualifier_flags (tree);
@@ -238,7 +237,7 @@ throw_bad_typeid (void)
otherwise return the static type of the expression. */
static tree
-get_tinfo_decl_dynamic (tree exp)
+get_tinfo_decl_dynamic (tree exp, tsubst_flags_t complain)
{
tree type;
tree t;
@@ -257,7 +256,7 @@ get_tinfo_decl_dynamic (tree exp)
/* For UNKNOWN_TYPEs call complete_type_or_else to get diagnostics. */
if (CLASS_TYPE_P (type) || type == unknown_type_node
|| type == init_list_type_node)
-type = complete_type_or_else (type, exp);
+type = complete_type_or_maybe_complain (type, exp, complain);
if (!type)
return error_mark_node;
@@ -278,7 +277,7 @@ get_tinfo_decl_dynamic (tree exp)
/* Otherwise return the type_info for the static type of the expr. */
t = get_tinfo_ptr (TYPE_MAIN_VARIANT (type));
- return cp_build_indirect_ref (t, RO_NULL, tf_warning_or_error);
+ return cp_build_indirect_ref (t, RO_NULL, complain);
}
static bool
@@ -316,7 +315,7 @@ typeid_ok_p (void)
an lvalue of type "const std::type_info". */
tree
-build_typeid (tree exp)
+build_typeid (tree exp, tsubst_flags_t complain)
{
tree cond = NULL_TREE, initial_expr = exp;
int nonnull = 0;
@@ -340,10 +339,10 @@ build_typeid (tree exp)
exp = mark_lvalue_use (exp);
exp = stabilize_reference (exp);
cond = cp_convert (boolean_type_node, TREE_OPERAND (exp, 0),
- tf_warning_or_error);
+ complain);
}
- exp = get_tinfo_decl_dynamic (exp);
+ exp = get_tinfo_decl_dynamic (exp, complain);
if (exp == error_mark_node)
return error_mark_node;
@@ -469,7 +468,7 @@ get_tinfo_ptr (tree type)
/* Return the type_info object for TYPE. */
tree
-get_typeid (tree type)
+get_typeid (tree type, tsubst_flags_t complain)
{
if (type == error_mark_node || !typeid_ok_p ())
return error_mark_node;
@@ -489,13 +488,12 @@ get_typeid (
Minor testsuite improvement
Gary Funck noted that vrp06.c has two tests with the same output. After
further investigation it was clear that expected output strings were too
lenient and were in fact masking a missed optimization.
This patch tightens the expected output from the vrp dump which has the
side effect of making each test's string unique. Obviously the masked
failure is xfailed.
OK for the trunk?
Thanks,
Jeff
* gcc/dg/tree-ssa/vrp06.c: Tighten expected output. Make each
pass/fail message unique.
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp06.c
b/gcc/testsuite/gcc.dg/tree-ssa/vrp06.c
index 1ef6c92..4edca36 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vrp06.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp06.c
@@ -25,7 +25,7 @@ foo (int i, int j, int a)
return i + a + j;
}
-/* { dg-final { scan-tree-dump-times "Folding predicate i_.*to 0" 1 "vrp1" } }
*/
-/* { dg-final { scan-tree-dump-times "Folding predicate j_.*to 1" 1 "vrp1" } }
*/
-/* { dg-final { scan-tree-dump-times "Folding predicate i_.*to 0" 1 "vrp1" } }
*/
+/* { dg-final { scan-tree-dump-times "Folding predicate i_.*0 to 0" 1 "vrp1" }
} */
+/* { dg-final { scan-tree-dump-times "Folding predicate j_.*0 to 1" 1 "vrp1" }
} */
+/* { dg-final { scan-tree-dump-times "Folding predicate i_.*j_.* to 0" 1
"vrp1" { xfail *-*-* } } } */
/* { dg-final { cleanup-tree-dump "vrp1" } } */
[Patch] FYI: Update my e-mail address in MAINTAINERS
Hi, Update my e-mail address in MAINTAINERS file. Committed: 2013-01-10 Naveen H.S * MAINTAINERS (Write After Approval): Update e-mail address.--- gcc/MAINTAINERS 2013-01-10 11:46:59.886102413 +0530 +++ gcc/MAINTAINERS 2013-01-10 11:34:31.554115235 +0530 @@ -402,7 +402,7 @@ Manfred Hollsteinm...@suse.com Falk Hueffner f...@debian.org Andrew John Hughesgnu_and...@member.fsf.org Andy Hutchinson hutchinsona...@aim.com -Naveen H.S navee...@kpitcummins.com +Naveen H.S naveen.hurugalaw...@caviumnetworks.com Meador Inge mead...@codesourcery.com Bernardo Innocentiber...@develer.com Balaji V. Iyer bvi...@gmail.com
Re: libsanitizer mege from upstream r171973
On Thu, Jan 10, 2013 at 11:01 AM, Konstantin Serebryany
wrote:
> Hi,
>
> The attached patch is the libsanitizer merge from upstream r171973.
>
> Lots of changes. Among other things:
> - slow CFI-based unwinder (off by default for now)
> - more interceptors in asan (read, pread, etc)
> - precise handling of memset/memcpy/etc (detects first overrun byte)
> - new experimental asan allocator (off by default)
> - asan now detects new/free, malloc/delete and new/delete[] mismatches
> - tsan now detects more races IO operations
>
> Patch for libsanitizer is automatically generated by libsanitizer/merge.sh
> Tested with
> rm -rf */{*/,}libsanitizer \
> && make -j 50 \
> && make -C gcc check-g{cc,++}
> RUNTESTFLAGS='--target_board=unix\{-m32,-m64\} asan.exp'
>
> Our internal LLVM bots (Linux, Mac and Android) are also green, but
> since the changes are large something may potentially break on other
> platforms.
>
> Ok to commit?
Rubberstamp LGTM (already reviewed upstream)
