Re: [PATCH] Bug fix in store_bit_field_1 for big endian targets (issue 51893)

2012-03-24 Thread Eric Botcazou
> Passes bootstrap and regression test powerpc64-linux.

Thanks a lot, Alan!

So, Aurelien, you only need to adjust the formatting of the patch and post a 
ChangeLog entry along with it.  TIA.

-- 
Eric Botcazou


Re: [wwwdocs] Fix some nits in GCC 4.7 changes.html

2012-03-24 Thread Gerald Pfeifer
On Thu, 22 Mar 2012, Rainer Orth wrote:
> Indeed: neither the original nor my patch were right here.  I've updated 
> my patch to include the correct syntax.
> 
> Ok now?

Oh, yes.  You just could have gone ahead. :-)

Gerald


Re: RFA: Document addition of Epiphany support

2012-03-24 Thread Gerald Pfeifer

Sure, this is a no-brainer.  As a port maintainer, the release
notes are yours for changes like this (and others). :-)

Gerald


[patch, fortran-dev] Use fixed variable sizes for stride calculations

2012-03-24 Thread Thomas Koenig

Hello world,

this patch uses division by known sizes (which can usually be replaced
by a simple shift because intrinsics have sizes of power of two) instead
of division by the size extracted from the array descriptor itself.

This should save about 20 cycles for a single calculation.

I'll go through the rest of the library to identify other possibilities
for this.

Regression-tested, no new failures.

OK for the branch?

Thomas

2012-03-24  Thomas König  

* libgfortran.h (GFC_DESCRIPTOR_SIZE_TYPEKNOWN):  New macro.
(GFC_DESCRIPTOR_STRIDE_TYPEKNOWN):  New macro.
* m4/cshift0.m4: Use GFC_DESCRIPTOR_STRIDE_TYPEKNOWN.
* m4/in_pack.m4: Likewise.
* m4/pack.m4: Likewise.
* m4/spread.m4: Likewise.
* m4/transpose.m4: Likewise.
* m4/iforeach.m4: Likewise.
* m4/eoshift1.m4: Likewise.
* m4/eoshift3.m4: Likewise.
* m4/shape.m4: Likewise.
* m4/cshift1.m4: Likewise.
* m4/in_unpack.m4: Likewise.
* m4/matmull.m4: Likewise.
* m4/bessel.m4: Likewise.
* m4/unpack.m4: Likewise.
* m4/reshape.m4: Likewise.
* m4/ifunction_logical.m4: Likewise.
* m4/ifunction.m4: Likewise.
* m4/matmul.m4: Likewise.
* generated/all_l16.c: Regenerated.
* generated/all_l1.c: Regenerated.
* generated/all_l2.c: Regenerated.
* generated/all_l4.c: Regenerated.
* generated/all_l8.c: Regenerated.
* generated/any_l16.c: Regenerated.
* generated/any_l1.c: Regenerated.
* generated/any_l2.c: Regenerated.
* generated/any_l4.c: Regenerated.
* generated/any_l8.c: Regenerated.
* generated/bessel_r10.c: Regenerated.
* generated/bessel_r16.c: Regenerated.
* generated/bessel_r4.c: Regenerated.
* generated/bessel_r8.c: Regenerated.
* generated/count_16_l.c: Regenerated.
* generated/count_1_l.c: Regenerated.
* generated/count_2_l.c: Regenerated.
* generated/count_4_l.c: Regenerated.
* generated/count_8_l.c: Regenerated.
* generated/cshift0_c10.c: Regenerated.
* generated/cshift0_c16.c: Regenerated.
* generated/cshift0_c4.c: Regenerated.
* generated/cshift0_c8.c: Regenerated.
* generated/cshift0_i16.c: Regenerated.
* generated/cshift0_i1.c: Regenerated.
* generated/cshift0_i2.c: Regenerated.
* generated/cshift0_i4.c: Regenerated.
* generated/cshift0_i8.c: Regenerated.
* generated/cshift0_r10.c: Regenerated.
* generated/cshift0_r16.c: Regenerated.
* generated/cshift0_r4.c: Regenerated.
* generated/cshift0_r8.c: Regenerated.
* generated/cshift1_16.c: Regenerated.
* generated/cshift1_4.c: Regenerated.
* generated/cshift1_8.c: Regenerated.
* generated/eoshift1_16.c: Regenerated.
* generated/eoshift1_4.c: Regenerated.
* generated/eoshift1_8.c: Regenerated.
* generated/eoshift3_16.c: Regenerated.
* generated/eoshift3_4.c: Regenerated.
* generated/eoshift3_8.c: Regenerated.
* generated/iall_i16.c: Regenerated.
* generated/iall_i1.c: Regenerated.
* generated/iall_i2.c: Regenerated.
* generated/iall_i4.c: Regenerated.
* generated/iall_i8.c: Regenerated.
* generated/iany_i16.c: Regenerated.
* generated/iany_i1.c: Regenerated.
* generated/iany_i2.c: Regenerated.
* generated/iany_i4.c: Regenerated.
* generated/iany_i8.c: Regenerated.
* generated/in_pack_c10.c: Regenerated.
* generated/in_pack_c16.c: Regenerated.
* generated/in_pack_c4.c: Regenerated.
* generated/in_pack_c8.c: Regenerated.
* generated/in_pack_i16.c: Regenerated.
* generated/in_pack_i1.c: Regenerated.
* generated/in_pack_i2.c: Regenerated.
* generated/in_pack_i4.c: Regenerated.
* generated/in_pack_i8.c: Regenerated.
* generated/in_pack_r10.c: Regenerated.
* generated/in_pack_r16.c: Regenerated.
* generated/in_pack_r4.c: Regenerated.
* generated/in_pack_r8.c: Regenerated.
* generated/in_unpack_c10.c: Regenerated.
* generated/in_unpack_c16.c: Regenerated.
* generated/in_unpack_c4.c: Regenerated.
* generated/in_unpack_c8.c: Regenerated.
* generated/in_unpack_i16.c: Regenerated.
* generated/in_unpack_i1.c: Regenerated.
* generated/in_unpack_i2.c: Regenerated.
* generated/in_unpack_i4.c: Regenerated.
* generated/in_unpack_i8.c: Regenerated.
* generated/in_unpack_r10.c: Regenerated.
* generated/in_unpack_r16.c: Regenerated.
* generated/in_unpack_r4.c: Regenerated.
* generated/in_unpack_r8.c: Regenerated.
* generated/iparity_i16.c: Regenerated.
* generated/iparity_i1.c: Regenerated.
* generated/iparity_i2.c: Regenerated.
  

PATCH [4.7]: Fix a typo in testsuite/demangle-expected

2012-03-24 Thread H.J. Lu
Hi,

I am checking this patch into 4.7 branch to fix a typo in
testsuite/demangle-expected.  Otherwise demangle test will fail.

H.J.
--
diff --git a/libiberty/ChangeLog b/libiberty/ChangeLog
index 2517416..c0ed02f 100644
--- a/libiberty/ChangeLog
+++ b/libiberty/ChangeLog
@@ -1,3 +1,7 @@
+2012-03-24  H.J. Lu  
+
+   * testsuite/demangle-expected: Fix a typo.
+
 2012-03-22  Jason Merrill  
 
* cp-demangle.c (cplus_demangle_operators): Add li.
diff --git a/libiberty/testsuite/demangle-expected 
b/libiberty/testsuite/demangle-expected
index 616a127..d489692 100644
--- a/libiberty/testsuite/demangle-expected
+++ b/libiberty/testsuite/demangle-expected
@@ -4075,6 +4075,7 @@ decltype (new int{}) f1(int)
 --format=gnu-v3
 _Zli2_wPKc
 operator"" _w(char const*)
+--format=gnu-v3
 _Z1fIiEDTnw_Dapifp_EET_
 decltype (new auto({parm#1})) f(int)
 --format=gnu-v3


PATCH: PR target/52698: -maddress-mode=long doesn't work

2012-03-24 Thread H.J. Lu
Hi,

Zero-extend UNSPEC_TP leads problems in ix86_decompose_address. In 64bit
mode for both x32 and x86-64, thread pointer is an address stored in %fs,
which is a 64bit segment register.  Since there is no direct access to %fs
from user space, OS provides a system call to write/read %fs:

int arch_prctl(int code, unsigned long addr);
int arch_prctl(int code, unsigned long *addr);

   ARCH_SET_FS
  Set the 64-bit base for the FS register to addr.

   ARCH_GET_FS
  Return the 64-bit base value for the FS register of the
  current thread in the unsigned long pointed to by addr.

To avoid a call of arch_prctl (ARCH_GET_FS, &addr) to read %fs, OS arrangs
%fs points to a struct:

typedef struct
{
  void *tcb;/* Pointer to the TCB.  Not necessarily the
   thread descriptor used by libpthread.  */
  ...
}

OS sets up tcb == %fs. Then we can use

(define_insn "*load_tp_"
  [(set (match_operand:P 0 "register_operand" "=r") 
(unspec:P [(const_int 0)] UNSPEC_TP))]
  "!TARGET_X32"
  "mov{}\t{%%:0, %0|%0,  PTR :0}"
  [(set_attr "type" "imov")
   (set_attr "modrm" "0")
   (set_attr "length" "7")
   (set_attr "memory" "load")
   (set_attr "imm_disp" "false")])

instead of

void *
get_tp (void)
{
  unsigned long long addr;
  arch_prctl (ARCH_GET_FS, &addr);
  return (void *) addr;
}

Since x32 address space is 32bit, the upper 32bits of %fs are always zero
and we can still use a pointer to store %fs value.  To load TP into SImode
or DImode register we can use

(define_insn "*load_tp_x32_"
  [(set (match_operand:SWI48x 0 "register_operand" "=r") 
(unspec:SWI48x [(const_int 0)] UNSPEC_TP))]
  "TARGET_X32"
  "mov{l}\t{%%fs:0, %k0|%k0, DWORD PTR fs:0}"
  [(set_attr "type" "imov")
   (set_attr "modrm" "0")
   (set_attr "length" "7")
   (set_attr "memory" "load")
   (set_attr "imm_disp" "false")])

instead of get_tp calls

void *
get_tp_si (void)
{
  unsigned long long addr;
  arch_prctl (ARCH_GET_FS, &addr);
  return (void *) (unsigned long) addr;
}

long long
get_tp_di (void)
{
  unsigned long long addr;
  arch_prctl (ARCH_GET_FS, &addr);
  return addr;
}


H.J.
---
gcc/

2012-03-24  H.J. Lu  

PR target/52698
* config/i386/i386.c (ix86_decompose_address): Remove
 for UNSPEC_TP references.
(legitimize_pic_address): Load UNSPEC_TP into tp_mode register
directly.

* config/i386/i386.md (*load_tp_x32): Removed.
(*load_tp_x32_zext): Likewise.
(*load_tp_x32_): New.

gcc/testsuite/

2012-03-24  H.J. Lu  

PR target/52698
* gcc.target/i386/pr52698-1.c: New.
* gcc.target/i386/pr52698-2.c: Likewise.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index a21f2da..14c4056 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -11514,12 +11514,6 @@ ix86_decompose_address (rtx addr, struct ix86_address 
*out)
  scale = 1 << scale;
  break;
 
-   case ZERO_EXTEND:
- op = XEXP (op, 0);
- if (GET_CODE (op) != UNSPEC)
-   return 0;
- /* FALLTHRU */
-
case UNSPEC:
  if (XINT (op, 1) == UNSPEC_TP
  && TARGET_TLS_DIRECT_SEG_REFS
@@ -12491,15 +12485,7 @@ legitimize_pic_address (rtx orig, rtx reg)
 static rtx
 get_thread_pointer (enum machine_mode tp_mode, bool to_reg)
 {
-  rtx tp = gen_rtx_UNSPEC (ptr_mode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
-
-  if (GET_MODE (tp) != tp_mode)
-{
-  gcc_assert (GET_MODE (tp) == SImode);
-  gcc_assert (tp_mode == DImode);
-
-  tp = gen_rtx_ZERO_EXTEND (tp_mode, tp);
-}
+  rtx tp = gen_rtx_UNSPEC (tp_mode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
 
   if (to_reg)
 tp = copy_to_mode_reg (tp_mode, tp);
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 2d20a52..ac6124e 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -12748,20 +12748,9 @@
 (define_mode_attr tp_seg [(SI "gs") (DI "fs")])
 
 ;; Load and add the thread base pointer from %:0.
-(define_insn "*load_tp_x32"
-  [(set (match_operand:SI 0 "register_operand" "=r")
-   (unspec:SI [(const_int 0)] UNSPEC_TP))]
-  "TARGET_X32"
-  "mov{l}\t{%%fs:0, %0|%0, DWORD PTR fs:0}"
-  [(set_attr "type" "imov")
-   (set_attr "modrm" "0")
-   (set_attr "length" "7")
-   (set_attr "memory" "load")
-   (set_attr "imm_disp" "false")])
-
-(define_insn "*load_tp_x32_zext"
-  [(set (match_operand:DI 0 "register_operand" "=r")
-   (zero_extend:DI (unspec:SI [(const_int 0)] UNSPEC_TP)))]
+(define_insn "*load_tp_x32_"
+  [(set (match_operand:SWI48x 0 "register_operand" "=r")
+   (unspec:SWI48x [(const_int 0)] UNSPEC_TP))]
   "TARGET_X32"
   "mov{l}\t{%%fs:0, %k0|%k0, DWORD PTR fs:0}"
   [(set_attr "type" "imov")
diff --git a/gcc/testsuite/gcc.target/i386/pr52698-1.c 
b/gcc/testsuite/gcc.target/i386/pr52698-1.c
new file mode 100644
index 000..0395521
--- /dev/null
+++ b

[SPARC] Fix PR target/52656

2012-03-24 Thread Eric Botcazou
An obvious pasto.  Applied on the mainline.


2012-03-24  Eric Botcazou  

PR target/52656
* config/sparc/sparc.c (sparc_handle_vis_mul8x16): Fix pasto.


-- 
Eric Botcazou
Index: config/sparc/sparc.c
===
--- config/sparc/sparc.c	(revision 185570)
+++ config/sparc/sparc.c	(working copy)
@@ -9932,7 +9932,7 @@ sparc_handle_vis_mul8x16 (tree *n_elts,
   break;
 
 case CODE_FOR_fmul8x16al_vis:
-  scale = TREE_INT_CST_LOW (VECTOR_CST_ELT (cst1, 0));
+  scale = TREE_INT_CST_LOW (VECTOR_CST_ELT (cst1, 1));
 
   for (i = 0; i < num; ++i)
 	{


[SPARC] Fix PR target/52610

2012-03-24 Thread Eric Botcazou
We need to pass -Av8 to the assembler when -mcpu=leon is specified.

Applied on the mainline and 4.7 branch.


2012-03-24  Eric Botcazou  

PR target/52610
* config/sparc/sparc.h (ASM_CPU_SPEC): Pass -Av8 if -mcpu=leon.


-- 
Eric Botcazou
Index: config/sparc/sparc.h
===
--- config/sparc/sparc.h	(revision 185570)
+++ config/sparc/sparc.h	(working copy)
@@ -329,6 +329,7 @@ extern enum cmodel sparc_cmodel;
 %{mcpu=sparclite86x:-Asparclite} \
 %{mcpu=f930:-Asparclite} %{mcpu=f934:-Asparclite} \
 %{mcpu=v8:-Av8} \
+%{mcpu=leon:-Av8} \
 %{mv8plus:-Av8plus} \
 %{mcpu=v9:-Av9} \
 %{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \


Minor tweaks in optimize_bitfield_assignment_op

2012-03-24 Thread Eric Botcazou
optimize_bitfield_assignment_op deals with PLUS_EXPR/MINUS_EXPR on the one hand 
and with BIT_IOR_EXPR/BIT_XOR_EXPR on the other hand.  The code for the former 
pair uses str_mode/str_bitsize whereas the code for the latter pair uses the 
more convoluted GET_MODE (str_rtx) and GET_MODE_BITSIZE (GET_MODE (str_rtx))) 
for no good reasons.

Bootstrapped/regtested on x86_64-suse-linux, applied on mainline as obvious.


2012-03-24  Eric Botcazou  

* expr.c (optimize_bitfield_assignment_op) : Use str_mode
and str_bitsize instead of more convoluted expressions.


-- 
Eric Botcazou
Index: expr.c
===
--- expr.c	(revision 185570)
+++ expr.c	(working copy)
@@ -4387,8 +4387,7 @@ optimize_bitfield_assignment_op (unsigne
 	  value = expand_and (str_mode, value, const1_rtx, NULL);
 	  binop = xor_optab;
 	}
-  value = expand_shift (LSHIFT_EXPR, str_mode, value,
-			bitpos, NULL_RTX, 1);
+  value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
   result = expand_binop (str_mode, binop, str_rtx,
 			 value, str_rtx, 1, OPTAB_WIDEN);
   if (result != str_rtx)
@@ -4399,8 +4398,8 @@ optimize_bitfield_assignment_op (unsigne
 case BIT_XOR_EXPR:
   if (TREE_CODE (op1) != INTEGER_CST)
 	break;
-  value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
-  value = convert_modes (GET_MODE (str_rtx),
+  value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
+  value = convert_modes (str_mode,
 			 TYPE_MODE (TREE_TYPE (op1)), value,
 			 TYPE_UNSIGNED (TREE_TYPE (op1)));
 
@@ -4414,16 +4413,13 @@ optimize_bitfield_assignment_op (unsigne
 	}
 
   binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
-  if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
+  if (bitpos + bitsize != str_bitsize)
 	{
-	  rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
-			  - 1);
-	  value = expand_and (GET_MODE (str_rtx), value, mask,
-			  NULL_RTX);
-	}
-  value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
-			bitpos, NULL_RTX, 1);
-  result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
+	  rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1);
+	  value = expand_and (str_mode, value, mask, NULL_RTX);
+	}
+  value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
+  result = expand_binop (str_mode, binop, str_rtx,
 			 value, str_rtx, 1, OPTAB_WIDEN);
   if (result != str_rtx)
 	emit_move_insn (str_rtx, result);
@@ -6348,8 +6344,7 @@ store_field (rtx target, HOST_WIDE_INT b
 			 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
 			 NULL_RTX, 1);
 
-  /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
-	 MODE.  */
+  /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE.  */
   if (mode != VOIDmode && mode != BLKmode
 	  && mode != TYPE_MODE (TREE_TYPE (exp)))
 	temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);


[patch] Assert assemble_external is only called during or after expanding to RTL

2012-03-24 Thread Steven Bosscher
Hello,

This patch tightens the conditions on when assemble_external() may be
called. It also removes a comment that "most platforms do not define
ASM_OUTPUT_EXTERNAL", because hasn't been true since r119764 added a
definition of ASM_OUTPUT_EXTERNAL to elfos.h.

This is the first step toward addressing PR17982 on the trunk for GCC
4.8. The next step is to change pending_assemble_externals to
pending_assemble_visibility, and fold assemble_external_real() back
into assemble_external.

But first, this patch. I don't think this is very risky, because GCC
now always works in unit-at-a-time mode. But I think it would be good
to have this on the trunk for a week or so before proceeding.

Bootstrapped & tested on x86_64-unknown-linux-gnu. OK for trunk?

Ciao!
Steven



       * varasm.c (assemble_external): Assert this function is only called
       during or after expanding to RTL.

Index: varasm.c
===
--- varasm.c    (revision 185762)
+++ varasm.c    (working copy)
@@ -2166,12 +2166,18 @@ static GTY(()) tree weak_decls;
 void
 assemble_external (tree decl ATTRIBUTE_UNUSED)
 {
-  /* Because most platforms do not define ASM_OUTPUT_EXTERNAL, the
-     main body of this code is only rarely exercised.  To provide some
-     testing, on all platforms, we make sure that the ASM_OUT_FILE is
-     open.  If it's not, we should not be calling this function.  */
+  /*  Make sure that the ASM_OUT_FILE is open.
+      If it's not, we should not be calling this function.  */
  gcc_assert (asm_out_file);

+  /* This function should only be called if we are expanding, or have
+     expanded, to RTL.
+     Ideally, only final.c would be calling this function, but it is
+     not clear whether that would break things somehow.  See PR 17982
+     for further discussion.  */
+  gcc_assert (cgraph_state == CGRAPH_STATE_EXPANSION
+              || cgraph_state == CGRAPH_STATE_FINISHED);
+
  if (!DECL_P (decl) || !DECL_EXTERNAL (decl) || !TREE_PUBLIC (decl))
    return;


Re: [wwwdocs] Fix some nits in GCC 4.7 changes.html

2012-03-24 Thread Gerald Pfeifer
On Thu, 22 Mar 2012, Rainer Orth wrote:
> One issue I forgot: there are currently two instances of the long form
> of the bugzilla URLs.  Shouldn't we better use http://gcc.gnu.org/PR
> here?

Good idea, yes.  Changed thusly.

Gerald

Index: gcc-4.7/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v
retrieving revision 1.102
diff -u -3 -p -r1.102 changes.html
--- gcc-4.7/changes.html22 Mar 2012 09:40:43 -  1.102
+++ gcc-4.7/changes.html24 Mar 2012 21:47:03 -
@@ -469,14 +469,12 @@ well.
   some efforts have been made to improve the support of class
   scope using-declarations. In particular, using-declarations
   referring to a dependent type now work as expected
-  (http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14258";>bug
-  c++/14258).
+  (http://gcc.gnu.org/PR14258";>bug c++/14258).
   
 
   The ELF symbol visibility of a template instantiation is now properly
 constrained by the visibility of its template arguments 
-(http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35688";>bug
-c++/35688).
+(http://gcc.gnu.org/PR35688";>bug c++/35688).
 
 
 


[wwwdocs] Use generic bug references in GCC 4.6 release notes

2012-03-24 Thread Gerald Pfeifer
Rainer noticed that we were not consistent here for the GCC 4.7
release note, and after fixing those, I realized that GCC 4.6 is
also affected.

Fixed thusly.

Gerald

Index: changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.6/changes.html,v
retrieving revision 1.139
diff -u -3 -p -r1.139 changes.html
--- changes.html1 Mar 2012 15:04:19 -   1.139
+++ changes.html24 Mar 2012 22:03:02 -
@@ -369,7 +369,7 @@
 declaration in the enclosing context, G++ now properly declares the
 name within the namespace of the function rather than the namespace
 which was open just before the function definition
-(http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43145";>c++/43145).
+(http://gcc.gnu.org/PR43145";>c++/43145).
 
 GCC now warns by default when casting integers to larger
 pointer types.  These warnings can be disabled with the option
@@ -379,7 +379,7 @@
 G++ no longer optimizes using the assumption that a value of
 enumeration type will fall within the range specified by the standard,
 since that assumption is easily violated with a conversion from integer
-type (http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43680";>c++/43680).
+type (http://gcc.gnu.org/PR43680";>c++/43680).
 The old behavior can be restored with -fstrict-enums.
 
 The new -fnothrow-opt flag changes the semantics of
@@ -415,7 +415,7 @@
 place where a double-colon was intended.
 
 G++ no longer accepts mutable on reference members
-(http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33558";>c++/33558).
+(http://gcc.gnu.org/PR33558";>c++/33558).
 Use -fpermissive to allow the old, non-conforming behaviour.
 
 


PATCH: Add OPTION_MASK_ISA_X86_64 and support TARGET_BI_ARCH == 2

2012-03-24 Thread H.J. Lu
Hi,

In i386 option mask, there is OPTION_MASK_ISA_64BIT for -m64 or -mx32
code generations and OPTION_MASK_ISA_X32 for -mx32 code generation. We
support

-m64: OPTION_MASK_ISA_64BIT && !OPTION_MASK_ISA_X32
-mx32: OPTION_MASK_ISA_64BIT && OPTION_MASK_ISA_X32
-m32: !OPTION_MASK_ISA_64BIT

i386.opt has

-m64: Turn on OPTION_MASK_ISA_64BIT
-mx32: Turn on OPTION_MASK_ISA_X32
-m32: Turn off OPTION_MASK_ISA_64BIT

So it isn't possible to make -mx32 as default -m64 just turns on
OPTION_MASK_ISA_64BIT and doesn't change anything.  This option adds
OPTION_MASK_ISA_X86_64 so that we can have

OPTION_MASK_ISA_64BIT   32bit x86-64 code or 64bit x86-64 code
OPTION_MASK_ISA_X86_64  64bit x86-64 code
OPTION_MASK_ISA_X32 32bit x86-64 code

and i386.opt becomes

-m64: Turn on OPTION_MASK_ISA_X86_64 
-mx32: Turn on OPTION_MASK_ISA_X32
-m32: Turn off OPTION_MASK_ISA_64BIT

Both OPTION_MASK_ISA_X32 and OPTION_MASK_ISA_X86_64 imply
OPTION_MASK_ISA_64BIT. OPTION_MASK_ISA_X32 clears OPTION_MASK_ISA_X86_64
and vice versa.

I added a dummy command line option, -mx86-64, since we don't support
ISA_64BIT in

m32
Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) 
Var(ix86_isa_flags) Save
Generate 32bit i386 code

without a place holder for Mask(ISA_64BIT).

Currectly when TARGET_BI_ARCH is defined, i386 backend will set the
OPTION_MASK_ISA_64BIT bit by default to make -m64 as the default.  This
patch extends TARGET_BI_ARCH to support:

1. TARGET_BI_ARCH == 1: -m64 is the default by setting the
OPTION_MASK_ISA_64BIT and OPTION_MASK_ISA_X86_64 bits.
2. TARGET_BI_ARCH == 2: -mx32 is the default by setting the
OPTION_MASK_ISA_64BIT and OPTION_MASK_ISA_X32 bits.

I will send a sparate patch to define TARGET_BI_ARCH to 2.  Tested on
Linux/x86-64.  OK to install?

Thanks.
 

H.J.
---
2012-03-24  H.J. Lu  

* config/i386/biarch64.h (TARGET_64BIT_DEFAULT): Add
OPTION_MASK_ISA_X86_64.

* config/i386/gnu-user64.h (SPEC_64): Support TARGET_BI_ARCH == 2.
(SPEC_X32): Likewise.
(MULTILIB_DEFAULTS): Likewise.

* config/i386/i386.c (ix86_option_override_internal): Properly
set OPTION_MASK_ISA_64BIT and OPTION_MASK_ISA_X32 as well as
handle -m32, -m64 and -mx32.

* config/i386/i386.h (TARGET_X86_64): New.
(TARGET_LP64): Changed to TARGET_X86_64.

* config/i386/i386.opt (m64): Replace ISA_64BIT with ISA_X86_64.
(mx86-64): New.

diff --git a/gcc/config/i386/biarch64.h b/gcc/config/i386/biarch64.h
index 629ec98..3dc9889 100644
--- a/gcc/config/i386/biarch64.h
+++ b/gcc/config/i386/biarch64.h
@@ -25,5 +25,5 @@ a copy of the GCC Runtime Library Exception along with this 
program;
 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 .  */
 
-#define TARGET_64BIT_DEFAULT OPTION_MASK_ISA_64BIT
+#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ISA_X86_64)
 #define TARGET_BI_ARCH 1
diff --git a/gcc/config/i386/gnu-user64.h b/gcc/config/i386/gnu-user64.h
index 954f3b2..6f7b5de 100644
--- a/gcc/config/i386/gnu-user64.h
+++ b/gcc/config/i386/gnu-user64.h
@@ -58,8 +58,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If 
not, see
 
 #if TARGET_64BIT_DEFAULT
 #define SPEC_32 "m32"
+#if TARGET_BI_ARCH == 2
+#define SPEC_64 "m64"
+#define SPEC_X32 "m32|m64:;"
+#else
 #define SPEC_64 "m32|mx32:;"
 #define SPEC_X32 "mx32"
+#endif
 #else
 #define SPEC_32 "m64|mx32:;"
 #define SPEC_64 "m64"
@@ -95,7 +100,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  
If not, see
%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
 
 #if TARGET_64BIT_DEFAULT
+#if TARGET_BI_ARCH == 2
+#define MULTILIB_DEFAULTS { "mx32" }
+#else
 #define MULTILIB_DEFAULTS { "m64" }
+#endif
 #else
 #define MULTILIB_DEFAULTS { "m32" }
 #endif
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index f93583f..4b6ceab 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3097,8 +3097,45 @@ ix86_option_override_internal (bool main_args_p)
   SUBSUBTARGET_OVERRIDE_OPTIONS;
 #endif
 
+  /* Turn off both OPTION_MASK_ISA_X86_64 and OPTION_MASK_ISA_X32 if
+ TARGET_64BIT is false.  */
+  if (!TARGET_64BIT)
+ix86_isa_flags &= ~(OPTION_MASK_ISA_X86_64 | OPTION_MASK_ISA_X32);
+#ifdef TARGET_BI_ARCH
+  else
+{
+#if TARGET_BI_ARCH == 1
+  /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ISA_X86_64
+is on and OPTION_MASK_ISA_X32 is off.  We turn off
+OPTION_MASK_ISA_X86_64 if OPTION_MASK_ISA_X32 is turned on by
+-mx32.  */
+  if (TARGET_X32)
+   ix86_isa_flags &= ~OPTION_MASK_ISA_X86_64;
+#else
+  /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ISA_X32 is
+on and OPTION_MASK_ISA_X86_64 is off.  We turn off
+OPTION_MASK_ISA_X32 if OPTION_MASK_ISA_X86_64 is turned on by
+-m64.  */
+  if (TARGET_X86_64)
+   ix86_isa_flags &= ~OPTION_MASK_ISA_X32;
+#endif
+}
+#endif
+
   if (T

Re: [wwwdocs] Add link to Git mirror on main page

2012-03-24 Thread Gerald Pfeifer
On Thu, 22 Mar 2012, Diego Novillo wrote:
> From a thread on IRC.  We don't have a prominent link to the Git mirror 
> and it's becoming one of the favourite ways for people to access the 
> repo.
> 
> Gerald, OK for the main page?  I can't seem to be able to preview this 
> change locally (dunno how the style.mhtml file gets loaded).

This is preprocessed on the server (and in this case will become
active within 0-24 hours, depends on when it goes in).

I wasn't sure how "official" the Git repo was, but if you feel
it's sufficiently stable and useful, go ahead!

Gerald


C++ PATCH to add auto return type deduction with -std=c++1y

2012-03-24 Thread Jason Merrill
As I mentioned in my patch to add -std=c++1y, I've been working on a 
proposal for the next standard to support return type deduction for 
normal functions, not just lambdas.  This patch implements that proposal.


I tried to send this message before with the proposal attached in HTML, 
but the mailing list rejects HTML attachments, so I've dropped it.  I'm 
happy to send it separately to anyone interested.


Tested x86_64-pc-linux-gnu, applying to trunk.
commit c12876e8b8e5d4ee70b5ea24126eae501af24d3d
Author: Jason Merrill 
Date:   Tue Mar 20 20:13:28 2012 -0400

	Implement return type deduction for normal functions with -std=c++1y.
	* cp-tree.h (FNDECL_USED_AUTO): New macro.
	(LAMBDA_EXPR_DEDUCE_RETURN_TYPE_P): Remove.
	(dependent_lambda_return_type_node): Remove.
	(CPTI_DEPENDENT_LAMBDA_RETURN_TYPE): Remove.
	(struct language_function): Add x_auto_return_pattern field.
	(current_function_auto_return_pattern): New.
	(enum tsubst_flags): Add tf_partial.
	* decl.c (decls_match): Handle auto return comparison.
	(duplicate_decls): Adjust error message for auto return.
	(cxx_init_decl_processing): Remove dependent_lambda_return_type_node.
	(cp_finish_decl): Don't do auto deduction for functions.
	(grokdeclarator): Allow auto return without trailing return type in
	C++1y mode.
	(check_function_type): Defer checking of deduced return type.
	(start_preparsed_function): Set current_function_auto_return_pattern.
	(finish_function): Set deduced return type to void if not previously
	deduced.
	* decl2.c (change_return_type): Handle error_mark_node.
	(mark_used): Always instantiate functions with deduced return type.
	Complain about use if deduction isn't done.
	* parser.c (cp_parser_lambda_declarator_opt): Use 'auto' for
	initial return type.
	(cp_parser_lambda_body): Don't deduce return type in a template.
	(cp_parser_conversion_type_id): Allow auto in C++1y.
	* pt.c (instantiate_class_template_1): Don't mess with
	LAMBDA_EXPR_DEDUCE_RETURN_TYPE_P.
	(tsubst_copy_and_build): Likewise.
	(fn_type_unification, tsubst): Don't reduce the template parm level
	of 'auto' during deduction.
	(unify): Compare 'auto' specially.
	(get_bindings): Change test.
	(always_instantiate_p): Always instantiate functions with deduced
	return type.
	(do_auto_deduction): Handle error_mark_node and lambda context.
	Don't check for use in initializer.
	(contains_auto_r): Remove.
	* search.c (lookup_conversions_r): Handle auto conversion function.
	* semantics.c (lambda_return_type): Handle null return.  Don't mess
	with dependent_lambda_return_type_node.
	(apply_deduced_return_type): Rename from apply_lambda_return_type.
	* typeck.c (merge_types): Handle auto.
	(check_return_expr): Do auto deduction.
	* typeck2.c (add_exception_specifier): Fix complain check.

diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index fc60d86..7d986a8 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -96,8 +96,8 @@ c-common.h, not after.
   DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (in VAR_DECL)
   STATEMENT_LIST_TRY_BLOCK (in STATEMENT_LIST)
   TYPENAME_IS_RESOLVING_P (in TYPE_NAME_TYPE)
-  LAMBDA_EXPR_DEDUCE_RETURN_TYPE_P (in LAMBDA_EXPR)
   TARGET_EXPR_DIRECT_INIT_P (in TARGET_EXPR)
+  FNDECL_USED_AUTO (in FUNCTION_DECL)
3: (TREE_REFERENCE_EXPR) (in NON_LVALUE_EXPR) (commented-out).
   ICS_BAD_FLAG (in _CONV)
   FN_TRY_BLOCK_P (in TRY_BLOCK)
@@ -660,11 +660,6 @@ enum cp_lambda_default_capture_mode_type {
 #define LAMBDA_EXPR_MUTABLE_P(NODE) \
   TREE_LANG_FLAG_1 (LAMBDA_EXPR_CHECK (NODE))
 
-/* True iff we should try to deduce the lambda return type from any return
-   statement.  */
-#define LAMBDA_EXPR_DEDUCE_RETURN_TYPE_P(NODE) \
-  TREE_LANG_FLAG_2 (LAMBDA_EXPR_CHECK (NODE))
-
 /* The return type in the expression.
  * NULL_TREE indicates that none was specified.  */
 #define LAMBDA_EXPR_RETURN_TYPE(NODE) \
@@ -804,7 +799,6 @@ enum cp_tree_index
 CPTI_CLASS_TYPE,
 CPTI_UNKNOWN_TYPE,
 CPTI_INIT_LIST_TYPE,
-CPTI_DEPENDENT_LAMBDA_RETURN_TYPE,
 CPTI_VTBL_TYPE,
 CPTI_VTBL_PTR_TYPE,
 CPTI_STD,
@@ -876,7 +870,6 @@ extern GTY(()) tree cp_global_trees[CPTI_MAX];
 #define class_type_node			cp_global_trees[CPTI_CLASS_TYPE]
 #define unknown_type_node		cp_global_trees[CPTI_UNKNOWN_TYPE]
 #define init_list_type_node		cp_global_trees[CPTI_INIT_LIST_TYPE]
-#define dependent_lambda_return_type_node cp_global_trees[CPTI_DEPENDENT_LAMBDA_RETURN_TYPE]
 #define vtbl_type_node			cp_global_trees[CPTI_VTBL_TYPE]
 #define vtbl_ptr_type_node		cp_global_trees[CPTI_VTBL_PTR_TYPE]
 #define std_node			cp_global_trees[CPTI_STD]
@@ -1076,6 +1069,7 @@ struct GTY(()) language_function {
   tree x_in_charge_parm;
   tree x_vtt_parm;
   tree x_return_value;
+  tree x_auto_return_pattern;
 
   BOOL_BITFIELD returns_value : 1;
   BOOL_BITFIELD returns_