Re: [patch][4.7] Enhance XOR handling in simplify-rtx.c
On 2011/3/11 10:14 PM, Chung-Lin Tang wrote: > Hi, > this patch adds a bit more sophistication to the handled xor RTX cases > in foo(). > > This may look a bit ad hoc, but I am seeing it useful for some cases > where we combine zero_extend with (not (shift ...)). The supplied ARM > testcase demonstrates when 3-insn combining comes up with: > (set (reg:SI 145) > (xor:SI (and:SI (not:SI (reg/v:SI 135 [ crc ])) > (const_int 32767 [0x7fff])) > (const_int 65535 [0x]))) > > when it is actually equivalent to: > (set (reg:SI 145) > (ior:SI (reg/v:SI 135 [ x ]) > (const_int 32768 [0x8000]))) > > This happens on ARM architecture levels v6 and above, due to its > possession of real zero_extend instructions. On ARMv5 and earlier, the > use of two shifts for zero extending actually helped to work around > this, due to staged combining effects of optimizing the shifts away one > by one... > > Cross-tested using QEMU for ARM-Linux, currently undergoing x86 > bootstrapping and testing. If results are clear, is this okay for trunk > when stage1 opens again? > > Thanks, > Chung-Lin > > * simplify-rtx.c (simplify_binary_operation_1): Handle > (xor (and A B) C) case when B and C are both constants. Bootstrap and test on i686 and x86_64 both completed with no regressions.
[PATCH RFA]: clean up -fdiagnostics-show-option and -Werror= docs slightly
-fdiagnostics-show-option is now the default, and it looks like
neither its description or the -Werror= description was updated to
match.
This patch attempts to do that.
tested by building, running nroff -man gcc.1, and reading the result.
OK for trunk (i.e., pre-4.6)?
(I feel a tiny bit bad about not attempting to address the issues
raised in PRs 40989 and 48088 where -Werror= and -Wno-error= don't
work as expected... but I'm at a loss for a concise set of words to
describe the problems and it's late. 8-S)
chris
---
2011-03-12 Chris Demetriou
* doc/invoke.texi (-fdiagnostics-show-option): Replace with...
(-fno-diagnostics-show-option): this, to reflect current default.
(-Werror=): Update text about -fno-diagnostics-show-option.
[gcc/ChangeLog]
2011-03-12 Chris Demetriou
* doc/invoke.texi (-fdiagnostics-show-option): Replace with...
(-fno-diagnostics-show-option): this, to reflect current default.
(-Werror=): Update text about -fno-diagnostics-show-option.
Index: doc/invoke.texi
===
--- doc/invoke.texi (revision 170864)
+++ doc/invoke.texi (working copy)
@@ -227,7 +227,7 @@
@xref{Language Independent Options,,Options to Control Diagnostic Messages Formatting}.
@gccoptlist{-fmessage-length=@var{n} @gol
-fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]} @gol
--fdiagnostics-show-option}
+-fno-diagnostics-show-option}
@item Warning Options
@xref{Warning Options,,Options to Request or Suppress Warnings}.
@@ -2771,12 +2771,13 @@
prefix) for physical lines that result from the process of breaking
a message which is too long to fit on a single line.
-@item -fdiagnostics-show-option
+@item -fno-diagnostics-show-option
+@opindex fno-diagnostics-show-option
@opindex fdiagnostics-show-option
-This option instructs the diagnostic machinery to add text to each
-diagnostic emitted, which indicates which command line option directly
-controls that diagnostic, when such an option is known to the
-diagnostic machinery.
+By default, each diagnostic emitted includes text which indicates the
+command line option that directly controls the diagnostic (if such an
+option is known to the diagnostic machinery). Specifying the
+@option{-fno-diagnostics-show-option} flag suppresses that behavior.
@item -Wcoverage-mismatch
@opindex Wcoverage-mismatch
@@ -2842,10 +2843,14 @@
negative form, to be used to negate @option{-Werror} for specific
warnings, for example @option{-Wno-error=switch} makes
@option{-Wswitch} warnings not be errors, even when @option{-Werror}
-is in effect. You can use the @option{-fdiagnostics-show-option}
-option to have each controllable warning amended with the option which
-controls it, to determine what to use with this option.
+is in effect.
+The warning message for each controllable warning includes the
+option which controls the warning. That option can then be used with
+@option{-Werror=} and @option{-Wno-error=} as described above.
+(Printing of the option in the warning message can be disabled using the
+@option{-fno-diagnostics-show-option} flag.)
+
Note that specifying @option{-Werror=}@var{foo} automatically implies
@option{-W}@var{foo}. However, @option{-Wno-error=}@var{foo} does not
imply anything.
[fortran, doc] Fix doc for LOG intrinsic
The attached patch clarifies the documentation of the LOG intrinsic by stating explicitly that it's the natural log function. Tested with "make info html pdf", OK to commit to trunk? FX log_doc.ChangeLog Description: Binary data log_doc.diff Description: Binary data
Re: [fortran, doc] Fix doc for LOG intrinsic
Am 12.03.2011 10:52, schrieb FX: The attached patch clarifies the documentation of the LOG intrinsic by stating explicitly that it's the natural log function. Tested with "make info html pdf", OK to commit to trun I am mostly OK, however: function -@cindex logarithmic +@cindex base 10 logarithm function I think even when looking for the decadic logarithm (common logarithm), I would look under "L" for logarithm and not under "B" for "base". How about "logarithm function with base 10"? If you want, you could could also add, e.g., common/decadic logarithm to the index. Tobias
[fortran, committed] Fix CTIME code generation
The patch below fixes PR 47552, where we generate a variable of wrong type for the string length argument passed to CTIME. Patch was approved in the PR, was regtested on x86_64-linux. Committed as revision 170898. 2011-03-12 Francois-Xavier Coudert PR fortran/47552 * trans-intrinsic.c (gfc_conv_intrinsic_ctime): Fix type of the string length variable. Index: trans-intrinsic.c === --- trans-intrinsic.c (revision 170897) +++ trans-intrinsic.c (working copy) @@ -1501,7 +1501,7 @@ gfc_conv_intrinsic_ctime (gfc_se * se, g args = XALLOCAVEC (tree, num_args); var = gfc_create_var (pchar_type_node, "pstr"); - len = gfc_create_var (gfc_get_int_type (8), "len"); + len = gfc_create_var (gfc_charlen_type_node, "len"); gfc_conv_intrinsic_function_args (se, expr, &args[2], num_args - 2); args[0] = gfc_build_addr_expr (NULL_TREE, var);
Re: [fortran, doc] Fix doc for LOG intrinsic
> I am mostly OK, however: > > function > -@cindex logarithmic > +@cindex base 10 logarithm function > > I think even when looking for the decadic logarithm (common logarithm), I > would look under "L" for logarithm and not under "B" for "base". How about > "logarithm function with base 10"? If you want, you could could also add, > e.g., common/decadic logarithm to the index. OK, I kept both "logarithm with base 10" and "base 10 logarithm". Committed the attached patch as rev. 170899. FX log.diff Description: Binary data
[Patch, Fortran, Regression] PR 48059: ICE in in gfc_conv_component_ref: character function of extended type
Hi all, the attached patch fixes the PR in the subject line. The problem was the following: During the interface mapping for a procedure call we need to take special care of polymorphic arguments, since the type of the actual argument can differ from the type of the formal argument. Therefore we need to replace the base type of component references by the actual type (in particular to get parent references right). The patch was regtested on x86_64-unknown-linux-gnu. Ok for trunk? Cheers, Janus 2011-03-12 Janus Weil PR fortran/48059 * trans-expr.c (gfc_apply_interface_mapping_to_expr): Replace base type for polymorphic arguments. 2011-03-12 Janus Weil PR fortran/48059 * gfortran.dg/class_41.f03: New. Index: gcc/fortran/trans-expr.c === --- gcc/fortran/trans-expr.c (revision 170879) +++ gcc/fortran/trans-expr.c (working copy) @@ -2247,6 +2247,10 @@ gfc_apply_interface_mapping_to_expr (gfc_interface expr->symtree = sym->new_sym; else if (sym->expr) gfc_replace_expr (expr, gfc_copy_expr (sym->expr)); + /* Replace base type for polymorphic arguments. */ + if (expr->ref && expr->ref->type == REF_COMPONENT + && sym->expr && sym->expr->ts.type == BT_CLASS) + expr->ref->u.c.sym = sym->expr->ts.u.derived; } /* ...and to subexpressions in expr->value. */ class_41.f03 Description: Binary data
Re: [PATCH 02/18] enforce TREE_CHAIN and TREE_TYPE accesses
> gcc/ada/ > * gcc-interface/ada-tree.h (union lang_tree_node): Check for > TS_COMMON before calling TREE_CHAIN. > * gcc-interface/misc.c (gnat_init_ts): New function. > (LANG_HOOKS_INIT_TS): Define. I presume that PLUS_NOMOD_EXPR, MINUS_NOMOD_EXPR and ATTR_ADDR_EXPR need not be marked in gnat_init_ts? If so, please add a single comment to that effect in the function and reorder the lines to match the order in ada-tree.def. OK with these changes. -- Eric Botcazou
Re: [PATCH 17/18] introduce block_chainon and use BLOCK_CHAIN more
> gcc/ada/ > * gcc-interface/utils.c (gnat_poplevel): Use block_chainon. OK, thanks. -- Eric Botcazou
[fortran, patch] Fix memory leak in arith_power()
While looking at the use of gfc_free() in the front-end when discussing its
removal, I noticed one instance where gfc_free_expr() should be used instead.
The patch that fixes it is:
2011-03-12 Francois-Xavier Coudert
* arith.c (arith_power): Plug memory leak.
Index: arith.c
===
--- arith.c (revision 170612)
+++ arith.c (working copy)
@@ -912,7 +912,7 @@
{
gfc_error ("Raising a negative REAL at %L to "
"a REAL power is prohibited", &op1->where);
- gfc_free (result);
+ gfc_free_expr (result);
return ARITH_PROHIBIT;
}
Without it, the following testcase :
print *, (-2.0)**(1.3)
end
leaks memory, as evidenced by valgrind:
==26601== 16 bytes in 1 blocks are definitely lost in loss record 6 of 287
==26601==at 0x4A05E1C: malloc (vg_replace_malloc.c:195)
==26601==by 0xD86668: __gmp_default_allocate (in /large/gcc/ibin/gcc/f951)
==26601==by 0xD4912C: mpfr_init2 (in /large/gcc/ibin/gcc/f951)
==26601==by 0x4B48D0: gfc_get_constant_expr (expr.c:165)
==26601==by 0x48FEFC: arith_power (arith.c:791)
==26601==by 0x48EB73: reduce_binary (arith.c:1387)
==26601==by 0x48EF2D: eval_intrinsic (arith.c:1568)
==26601==by 0x48F5C7: eval_intrinsic_f3 (arith.c:1701)
==26601==by 0x4B94C5: gfc_simplify_expr (expr.c:1048)
==26601==by 0x501E2A: gfc_resolve_expr (resolve.c:3977)
==26601==by 0x50BA26: resolve_code (resolve.c:8997)
==26601==by 0x50CFDB: gfc_resolve_blocks (resolve.c:8725)
With the patch, the leak disappears. It was regtested on x86_64-linux. OK to
commit to trunk?
FX
[libgfortran, patch] More than 26 temporary files with weak mktemp()
The attached patch fixes half of PR 47439. On platform with weak or historical implementations of mktemp(), this function cannot generate more than 26 unique filenames for a given base. This happens in particular on Windows, and limits us to 26 scratch files open simultaneously. The patch works around that by adding an almost unique prefix to the filename string, which has a period of 17576. Thus, the new implementation allows to generate 456976 unique filenames, which I deemed enough :) As the issue is not a regression, I don't think it's 4.6 material so, if approved, I will commit when 4.7 branches unless instructed to do otherwise. I'd also like feedback on the attached test: do we expect systems to fail because of limits not allowing them to open 30 files? Manually tested on i586-pc-mingw32, regtested on x86_64-linux by editing config.h to fake the absence of mkstemp(). OK for 4.7? PS: Please note that, on modern targets providing the POSIX mkstemp(), this code is not used at all. mktemp.ChangeLog Description: Binary data mktemp.diff Description: Binary data scratch_1.f90 Description: Binary data
[x32] PATCH: Only allow *movabs_[1|2] for TARGET_LP64
Hi,
x32 is limited to 32bit address space. I checked in this patc to
only allow *movabs_[1|2] for TARGET_LP64.
H.J.
---
commit 2ea3bfe6d0b96ad15e801d29fd28817138e93456
Author: H.J. Lu
Date: Fri Mar 11 13:36:42 2011 -0800
Only allow *movabs_[1|2] for TARGET_LP64.
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index ac312af..0206c86 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,11 @@
2011-03-11 H.J. Lu
+ * config/i386/i386.md (*movabs_1): Only allow for
+ TARGET_LP64.
+ (*movabs_2): Likewise.
+
+2011-03-11 H.J. Lu
+
PR target/47446
* config/i386/i386.md (*movdi_internal_rex64): Only allow moving
integer constants into 64bit registers for TARGET_X32.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index d092a84..8208491 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2349,18 +2349,10 @@
(define_insn "*movabs_1"
[(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
(match_operand:SWI1248x 1 "nonmemory_operand" "a,er"))]
- "TARGET_64BIT && ix86_check_movabs (insn, 0)"
-{
- if (which_alternative == 0)
-{
- if (TARGET_X32)
-return "movabs{}\t{%1, %P0|%P0, %1}";
- else
-return "mov{}\t{%1, %P0|%P0, %1}";
-}
- else
-return "mov{}\t{%1, %a0|%a0, %1}";
-}
+ "TARGET_LP64 && ix86_check_movabs (insn, 0)"
+ "@
+ movabs{}\t{%1, %P0|%P0, %1}
+ mov{}\t{%1, %a0|%a0, %1}"
[(set_attr "type" "imov")
(set_attr "modrm" "0,*")
(set_attr "length_address" "8,0")
@@ -2371,18 +2363,10 @@
(define_insn "*movabs_2"
[(set (match_operand:SWI1248x 0 "register_operand" "=a,r")
(mem:SWI1248x (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
- "TARGET_64BIT && ix86_check_movabs (insn, 1)"
-{
- if (which_alternative == 0)
-{
- if (TARGET_X32)
-return "movabs{}\t{%P1, %0|%0, %P1}";
- else
-return "mov{}\t{%P1, %0|%0, %P1}";
-}
- else
-return "mov{}\t{%a1, %0|%0, %a1}";
-}
+ "TARGET_LP64 && ix86_check_movabs (insn, 1)"
+ "@
+ movabs{}\t{%P1, %0|%0, %P1}
+ mov{}\t{%a1, %0|%0, %a1}"
[(set_attr "type" "imov")
(set_attr "modrm" "0,*")
(set_attr "length_address" "8,0")
[x32] PATCH: Add check_effective_target_ia32
Hi,
We check ilp32 for ia32 tests in gcc testsuite. It won't work with
x32. I checked in this patch to add ia32 target.
H.J.
--
commit 9383cb747c3de3c769fa3fb2aa9c148b344399b2
Author: H.J. Lu
Date: Fri Mar 11 13:39:46 2011 -0800
Add check_effective_target_ia32.
diff --git a/gcc/testsuite/ChangeLog.x32 b/gcc/testsuite/ChangeLog.x32
index 39ed391..788bca8 100644
--- a/gcc/testsuite/ChangeLog.x32
+++ b/gcc/testsuite/ChangeLog.x32
@@ -1,5 +1,12 @@
2011-03-11 H.J. Lu
+ * gcc.target/i386/stackalign/return-3.c: Require ia32 instead
+ of ilp32.
+
+ * lib/target-supports.exp (check_effective_target_ia32): New.
+
+2011-03-11 H.J. Lu
+
PR target/47446
* gcc.target/i386/pr47446-3.c: New.
diff --git a/gcc/testsuite/gcc.target/i386/stackalign/return-3.c
b/gcc/testsuite/gcc.target/i386/stackalign/return-3.c
index dd2c2e8..e32547e 100644
--- a/gcc/testsuite/gcc.target/i386/stackalign/return-3.c
+++ b/gcc/testsuite/gcc.target/i386/stackalign/return-3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-skip-if "" { ! { ilp32 && dfp } } { "*" } { "" } } */
+/* { dg-skip-if "" { ! { ia32 && dfp } } { "*" } { "" } } */
/* { dg-options "-msse -std=gnu99 -mpreferred-stack-boundary=2" } */
/* { dg-require-effective-target sse } */
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 2e75e5b..f46c734 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1492,6 +1492,17 @@ proc check_effective_target_ilp32 { } {
}]
}
+# Return 1 if we're generating ia32 code using default options, 0
+# otherwise.
+
+proc check_effective_target_ia32 { } {
+return [check_no_compiler_messages ia32 object {
+ int dummy[sizeof (int) == 4
+ && sizeof (void *) == 4
+ && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
+}]
+}
+
# Return 1 if we're generating x32 code using default options, 0
# otherwise.
[x32] PATCH: PR target/48084: [x32] internal compiler error: in copy_to_mode_reg, at explow.c:630
Hi,
I checked in this patch tp convert memory to Pmode if needed.
H.J.
Index: gcc/testsuite/gcc.target/i386/pr48084-3.c
===
--- gcc/testsuite/gcc.target/i386/pr48084-3.c (revision 0)
+++ gcc/testsuite/gcc.target/i386/pr48084-3.c (revision 0)
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse3" } */
+
+void
+_mm_monitor (void const * __P, unsigned int __E, unsigned int __H)
+{
+ __builtin_ia32_monitor (__P, __E, __H);
+}
Index: gcc/testsuite/gcc.target/i386/pr48084-2.c
===
--- gcc/testsuite/gcc.target/i386/pr48084-2.c (revision 0)
+++ gcc/testsuite/gcc.target/i386/pr48084-2.c (revision 0)
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2" } */
+
+typedef int __m64 __attribute__ ((__vector_size__ (8), __may_alias__));
+typedef char __v8qi __attribute__ ((__vector_size__ (8)));
+void
+_mm_maskmove_si64 (__m64 __A, __m64 __N, char *__P)
+{
+__builtin_ia32_maskmovq ((__v8qi)__A, (__v8qi)__N, __P);
+}
Index: gcc/testsuite/gcc.target/i386/pr48084-4.c
===
--- gcc/testsuite/gcc.target/i386/pr48084-4.c (revision 0)
+++ gcc/testsuite/gcc.target/i386/pr48084-4.c (revision 0)
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -msse2" } */
+
+void
+_mm_clflush (void const *__A)
+{
+ __builtin_ia32_clflush (__A);
+}
Index: gcc/testsuite/gcc.target/i386/pr48084-1.c
===
--- gcc/testsuite/gcc.target/i386/pr48084-1.c (revision 0)
+++ gcc/testsuite/gcc.target/i386/pr48084-1.c (revision 0)
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2" } */
+
+typedef int __m64 __attribute__ ((__vector_size__ (8), __may_alias__));
+typedef float __v2sf __attribute__ ((__vector_size__ (8)));
+typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
+typedef float __v4sf __attribute__ ((__vector_size__ (16)));
+void
+_mm_storeh_pi (__m64 *__P, __m128 __A)
+{
+ __builtin_ia32_storehps ((__v2sf *)__P, (__v4sf)__A);
+}
Index: gcc/testsuite/ChangeLog.x32
===
--- gcc/testsuite/ChangeLog.x32 (revision 170901)
+++ gcc/testsuite/ChangeLog.x32 (working copy)
@@ -1,5 +1,13 @@
2011-03-11 H.J. Lu
+ PR target/48084
+ * gcc.target/i386/pr48084-1.c: New.
+ * gcc.target/i386/pr48084-2.c: Likewise.
+ * gcc.target/i386/pr48084-3.c: Likewise.
+ * gcc.target/i386/pr48084-4.c: Likewise.
+
+2011-03-11 H.J. Lu
+
* gcc.target/i386/stackalign/return-3.c: Require ia32 instead
of ilp32.
Index: gcc/config/i386/i386.c
===
--- gcc/config/i386/i386.c (revision 170899)
+++ gcc/config/i386/i386.c (working copy)
@@ -27178,7 +27178,11 @@ ix86_expand_special_args_builtin (const
op = expand_normal (arg);
gcc_assert (target == 0);
if (memory)
- target = gen_rtx_MEM (tmode, copy_to_mode_reg (Pmode, op));
+ {
+ if (GET_MODE (op) != Pmode)
+ op = convert_to_mode (Pmode, op, 1);
+ target = gen_rtx_MEM (tmode, copy_to_mode_reg (Pmode, op));
+ }
else
target = force_reg (tmode, op);
arg_adjust = 1;
@@ -27449,6 +27453,8 @@ ix86_expand_builtin (tree exp, rtx targe
mode1 = insn_data[icode].operand[1].mode;
mode2 = insn_data[icode].operand[2].mode;
+ if (GET_MODE (op0) != Pmode)
+ op0 = convert_to_mode (Pmode, op0, 1);
op0 = force_reg (Pmode, op0);
op0 = gen_rtx_MEM (mode1, op0);
@@ -27481,7 +27487,11 @@ ix86_expand_builtin (tree exp, rtx targe
op0 = expand_normal (arg0);
icode = CODE_FOR_sse2_clflush;
if (!insn_data[icode].operand[0].predicate (op0, Pmode))
+ {
+ if (GET_MODE (op0) != Pmode)
+ op0 = convert_to_mode (Pmode, op0, 1);
op0 = copy_to_mode_reg (Pmode, op0);
+ }
emit_insn (gen_sse2_clflush (op0));
return 0;
@@ -27494,7 +27504,11 @@ ix86_expand_builtin (tree exp, rtx targe
op1 = expand_normal (arg1);
op2 = expand_normal (arg2);
if (!REG_P (op0))
- op0 = copy_to_mode_reg (Pmode, op0);
+ {
+ if (GET_MODE (op0) != Pmode)
+ op0 = convert_to_mode (Pmode, op0, 1);
+ op0 = copy_to_mode_reg (Pmode, op0);
+ }
if (!REG_P (op1))
op1 = copy_to_mode_reg (SImode, op1);
if (!REG_P (op2))
@@ -27574,7 +27588,11 @@ ix86_expand_builtin (tree exp, rtx targe
op0 = expand_normal (arg0);
icode = CODE_FOR_lwp_llwpcb;
if (!insn_data[icode].operand[0].predicate (op0, Pmode))
- op0 = copy_to_mode_reg (Pmode, op0);
+ {
+ if (GET_MODE (op0) != Pmode)
+ op0 = convert_to_mode (Pmode, op0, 1);
+
[x32] PATCH: Don't generate byte 0x66 in TLS GD for TARGET_X32
Hi,
For x32, pointers are 32bit. It uses
movl %fs:0, %eax
instead of
movq %fs:0, %rax
to load TCB pointer. I checked in this patch to avoid byte 0x66 in TLS
GD for TARGET_X32.
H.J.
---
>From 8c92f0d4860fd2693af864d87804aaee843f2680 Mon Sep 17 00:00:00 2001
From: H.J. Lu
Date: Sat, 12 Mar 2011 05:53:03 -0800
Subject: [PATCH 5/5] Don't generate byte 0x66 in TLS GD for TARGET_X32.
---
gcc/ChangeLog.x32 |5 +
gcc/config/i386/i386.md | 10 --
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index 5ecea15..b85956c 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,3 +1,8 @@
+2011-03-12 H.J. Lu
+
+ * config/i386/i386.md (*tls_global_dynamic_64): Don't generate
+ byte 0x66 before lea for TARGET_X32.
+
2011-03-11 H.J. Lu
PR target/48084
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 8208491..89c0455 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -12595,9 +12595,15 @@
(unspec:DI [(match_operand 1 "tls_symbolic_operand" "")]
UNSPEC_TLS_GD)]
"TARGET_64BIT"
- { return ASM_BYTE "0x66\n\tlea{q}\t{%a1@tlsgd(%%rip), %%rdi|rdi,
%a1@tlsgd[rip]}\n" ASM_SHORT "0x\n\trex64\n\tcall\t%P2"; }
+{
+ if (TARGET_X32)
+return "lea{q}\t{%a1@tlsgd(%%rip), %%rdi|rdi, %a1@tlsgd[rip]}\n" ASM_SHORT
"0x\n\trex64\n\tcall\t%P2";
+ else
+return ASM_BYTE "0x66\n\tlea{q}\t{%a1@tlsgd(%%rip), %%rdi|rdi,
%a1@tlsgd[rip]}\n" ASM_SHORT "0x\n\trex64\n\tcall\t%P2";
+}
[(set_attr "type" "multi")
- (set_attr "length" "16")])
+ (set (attr "length")
+ (symbol_ref "TARGET_X32 ? 15 : 16"))])
(define_expand "tls_global_dynamic_64"
[(parallel [(set (match_operand:DI 0 "register_operand" "")
--
1.7.4
PATCH: copy_addr_to_reg: Convert to Pmode if needed
Hi,
copy_addr_to_reg doesn't check of mode is valid before copy it to
Pmode. This patch converts to Pmode if needed. OK for 4.7?
Thanks.
H.J.
--
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index b85956c..3405300 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,10 @@
2011-03-12 H.J. Lu
+ PR target/48084
+ * explow.c (copy_addr_to_reg): Convert to Pmode if needed.
+
+2011-03-12 H.J. Lu
+
* config/i386/i386.md (*tls_global_dynamic_64): Don't generate
byte 0x66 before lea for TARGET_X32.
diff --git a/gcc/explow.c b/gcc/explow.c
index 460af1f..9b3c082 100644
--- a/gcc/explow.c
+++ b/gcc/explow.c
@@ -611,6 +611,8 @@ copy_to_reg (rtx x)
rtx
copy_addr_to_reg (rtx x)
{
+ if (GET_MODE (x) != VOIDmode && GET_MODE (x) != Pmode)
+x = convert_to_mode (Pmode, x, 1);
return copy_to_mode_reg (Pmode, x);
}
diff --git a/gcc/testsuite/ChangeLog.x32 b/gcc/testsuite/ChangeLog.x32
index 06ba94e..3b7be1d 100644
--- a/gcc/testsuite/ChangeLog.x32
+++ b/gcc/testsuite/ChangeLog.x32
@@ -1,3 +1,8 @@
+2011-03-12 H.J. Lu
+
+ PR target/48084
+ * gcc.target/i386/pr48084-5.c: New.
+
2011-03-11 H.J. Lu
PR target/48084
diff --git a/gcc/testsuite/gcc.target/i386/pr48084-5.c
b/gcc/testsuite/gcc.target/i386/pr48084-5.c
new file mode 100644
index 000..d6ed8e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr48084-5.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -mrdrnd" } */
+
+int
+_rdrand16_step (unsigned short *__P)
+{
+ return __builtin_ia32_rdrand16_step (__P);
+}
Re: [PATCH] Fix hpux10 string to real conversion defficiences
> I have reviewed the patch and FX'scomments. So far so good.
>
> I may have missed something in the thread, but are you planning
> modifications to the functions that call convert_real to allow the nan
> or inf strings to be passed to convert_real?
>
> The read_real function is already handling this for namelist and list
> directed reads and I believe it is not needed by convert_real for those
> functions.
>
> For formatted reads, read_f will error out on a nan or inf during the
> read before calling convert_real.
Here is take three. The configure checks are eliminated and a new
function, convert_infnan, is added to convert INFs and NANs using
builtins. It relies to some extent on the processing done by read_f,
parse_real and read_real.
Tested on hppa1.1-hp-hpux10.20, hppa2.0w-hp-hpux11.11, hppa64-hp-hpux11.11
and i686-apple-darwin9 with no observed regressions.
Ok?
Dave
--
J. David Anglin dave.ang...@nrc-cnrc.gc.ca
National Research Council of Canada (613) 990-0752 (FAX: 952-6602)
2011-03-11 John David Anglin
PR fortran/35667
* io/io.h (convert_infnan): Declare.
* io/read.c (convert_infnan): New.
(read_f): Use convert_infnan to convert INFs and NANs.
* list_read.c (parse_real, read_real): Likewise.
Index: io/list_read.c
===
--- io/list_read.c (revision 170842)
+++ io/list_read.c (working copy)
@@ -1215,6 +1215,15 @@
return m;
+ done_infnan:
+ unget_char (dtp, c);
+ push_char (dtp, '\0');
+
+ m = convert_infnan (dtp, buffer, dtp->u.p.saved_string, length);
+ free_saved (dtp);
+
+ return m;
+
inf_nan:
/* Match INF and Infinity. */
if ((c == 'i' || c == 'I')
@@ -1235,7 +1244,7 @@
push_char (dtp, 'i');
push_char (dtp, 'n');
push_char (dtp, 'f');
-goto done;
+goto done_infnan;
}
} /* Match NaN. */
else if (((c = next_char (dtp)) == 'a' || c == 'A')
@@ -1259,7 +1268,7 @@
if (is_separator (c))
unget_char (dtp, c);
}
- goto done;
+ goto done_infnan;
}
bad:
@@ -1718,8 +1727,16 @@
}
free_line (dtp);
- goto done;
+ unget_char (dtp, c);
+ eat_separator (dtp);
+ push_char (dtp, '\0');
+ if (convert_infnan (dtp, dest, dtp->u.p.saved_string, length))
+return;
+ free_saved (dtp);
+ dtp->u.p.saved_type = BT_REAL;
+ return;
+
unwind:
if (dtp->u.p.namelist_mode)
{
Index: io/read.c
===
--- io/read.c (revision 170842)
+++ io/read.c (working copy)
@@ -189,7 +189,76 @@
return 0;
}
+/* convert_infnan()-- Convert character INF/NAN representation to the
+ machine number. Note: many architectures (e.g. IA-64, HP-PA) require
+ that the storage pointed to by the dest argument is properly aligned
+ for the type in question. */
+int
+convert_infnan (st_parameter_dt *dtp, void *dest, const char *buffer,
+ int length)
+{
+ const char *s = buffer;
+ int is_inf, plus = 1;
+
+ if (*s == '+')
+s++;
+ else if (*s == '-')
+{
+ s++;
+ plus = 0;
+}
+
+ is_inf = *s == 'i';
+
+ switch (length)
+{
+case 4:
+ if (is_inf)
+ *((GFC_REAL_4*) dest) = plus ? __builtin_inff () : -__builtin_inff ();
+ else
+ *((GFC_REAL_4*) dest) = plus ? __builtin_nanf ("") : -__builtin_nanf
("");
+ break;
+
+case 8:
+ if (is_inf)
+ *((GFC_REAL_8*) dest) = plus ? __builtin_inf () : -__builtin_inf ();
+ else
+ *((GFC_REAL_8*) dest) = plus ? __builtin_nan ("") : -__builtin_nan ("");
+ break;
+
+#if defined(HAVE_GFC_REAL_10)
+case 10:
+ if (is_inf)
+ *((GFC_REAL_10*) dest) = plus ? __builtin_infl () : -__builtin_infl ();
+ else
+ *((GFC_REAL_10*) dest) = plus ? __builtin_nanl ("") : -__builtin_nanl
("");
+ break;
+#endif
+
+#if defined(HAVE_GFC_REAL_16)
+# if defined(GFC_REAL_16_IS_FLOAT128)
+case 16:
+ *((GFC_REAL_16*) dest) = __qmath_(strtoflt128) (buffer, NULL);
+ break;
+# else
+case 16:
+ if (is_inf)
+ *((GFC_REAL_16*) dest) = plus ? __builtin_infl () : -__builtin_infl ();
+ else
+ *((GFC_REAL_16*) dest) = plus ? __builtin_nanl ("") : -__builtin_nanl
("");
+ break;
+# endif
+#endif
+
+default:
+ internal_error (&dtp->common, "Unsupported real kind during IO");
+}
+
+ return 0;
+}
+
+
/* read_l()-- Read a logical value */
void
@@ -896,7 +965,7 @@
else if (strcmp (save, "nan") != 0)
goto bad_float;
- convert_real (dtp, dest, buffer, length);
+ convert_infnan (dtp, dest, buffer, length);
return;
}
Index: io/io.h
===
--- io/io.h (revision 170842)
+++ io/io.h (working copy)
@@ -674,6 +674,9 @@
extern int convert_real (st_p
Re: [Patch, Fortran, Regression] PR 48059: ICE in in gfc_conv_component_ref: character function of extended type
Janus, > The patch was regtested on x86_64-unknown-linux-gnu. Ok for trunk? > Yes, as discussed off-list, it looks OK to me. Get it committed asap! Thanks for the patch Paul > > > 2011-03-12 Janus Weil > > PR fortran/48059 > * trans-expr.c (gfc_apply_interface_mapping_to_expr): Replace base type > for polymorphic arguments. > > 2011-03-12 Janus Weil > > PR fortran/48059 > * gfortran.dg/class_41.f03: New. > -- The knack of flying is learning how to throw yourself at the ground and miss. --Hitchhikers Guide to the Galaxy
Re: [patch libiberty include]: Add additional helper functions for directory-separator searching
2011/3/9 Eli Zaretskii : >> From: Pedro Alves >> Date: Wed, 9 Mar 2011 12:58:38 + >> Cc: gdb-patc...@sourceware.org, >> d...@redhat.com, >> ktiet...@googlemail.com, >> binut...@sourceware.org, >> gcc-patches@gcc.gnu.org >> >> > > The one's left are: 1 in a linux-native only file (never cares >> > > for other filesystem semantics), and a couple in the coff and >> > > mdebug readers. The latter could be rewritten in terms of >> > > lbasename, but I'm not sure whether gcc outputs a literal '/' in >> > > that case even when building on mingw. If so, and we changed them, >> > > we'd be breaking reading these files on Windows >> > >> > Sorry, I don't understand how would that break on Windows. Could you >> > elaborate? And what "couple of coff and mdebug readers" did you have >> > in mind? >> >> Sorry, in the hurry, I had a (another) brain cramp. Wouldn't break. >> Still it'd be useless to change this _if_ gcc hardcodes '/'. Dunno >> whether it does. > > At least on MinGW, GCC simply uses whatever was passed on the command > line. I tested that by compiling the same source file, passing it to > GCC with different flavors of slashes, including mixed ones. Then in > GDB I typed "info sources" and saw the source file with exactly the > same flavor of slashes as what I typed on the GCC command line. > > Funnily enough, when the file name given to GCC includes at least one > backslash, "info sources" shows the same file twice, like this: > > (gdb) info sources > Source files for which symbols have been read in: > > > > Source files for which symbols will be read in on demand: > > d:/usr/eli/data/dbw.c, d:\usr\eli/data\dbw.c > > This is with GDB 7.2 and GCC 3.4.2. That means we compare files with > strcmp/strcasecmp somewhere, and don't know that / and \ are > equivalent here. Or maybe it's a bug in the ancient version of GCC I > use. Yes, this observation is related to some comparision tweaks in libcpp and in some other parts in gcc about filenames. When gcc gets into stage 1, I will post the prepared patch for this. Kai
Re: [patch libiberty include]: Add additional helper functions for directory-separator searching
2011/3/8 DJ Delorie :
>
>> I think we don't need filename_dirchr, only filename_dirrchr.
>
> I see no harm in having both, for completeness, though. One could
> argue they should be in separate files, but they're trivial functions
> on non-dos-fs systems.
>
> What bothers me about this patch is that we're adding yet another set
> of functions that don't discriminate between the host filesystem, the
> target filesystem, and the build filesystem.
>
Ok, I got the point about having here implementations which can handle
both cases. So I added an additional argument to those functions to
specify for which file-system flavor is searched.
I don't see right now much use for this difference, but well, it won't
harm to have this ability too.
2011-03-12 Kai Tietz
* filename.h (filename_dirchr_host): New macro.
(filename_dirrchr_host): New macro.
(filename_dirchr): New prototype.
(filename_dirrchr): New prototype.
2011-03-12 Kai Tietz
* filename_chr.c: New file.
* Makefile.in (CFILES): Add filename_chr.c file.
(REQUIRED_OFILES): Add filename_chr.o
(filename_chr.o): New rule.
* functions.texi: Regenerated.
Tested for x86_64-w64-mingw32, and x86_64-pc-linux-gnu. Ok for apply?
Regards,
Kai
Index: gcc/include/filenames.h
===
--- gcc.orig/include/filenames.h2011-03-12 17:02:03.802364200 +0100
+++ gcc/include/filenames.h 2011-03-12 17:31:48.887339800 +0100
@@ -37,10 +37,14 @@ extern "C" {
# define HAS_DRIVE_SPEC(f) HAS_DOS_DRIVE_SPEC (f)
# define IS_DIR_SEPARATOR(c) IS_DOS_DIR_SEPARATOR (c)
# define IS_ABSOLUTE_PATH(f) IS_DOS_ABSOLUTE_PATH (f)
+# define filename_dirchr_host(P) filename_dirchr (1, (P))
+# define filename_dirrchr_host(P) filename_dirrchr (1, (P))
#else /* not DOSish */
# define HAS_DRIVE_SPEC(f) (0)
# define IS_DIR_SEPARATOR(c) IS_UNIX_DIR_SEPARATOR (c)
# define IS_ABSOLUTE_PATH(f) IS_UNIX_ABSOLUTE_PATH (f)
+# define filename_dirchr_host(P) filename_dirchr (0, (P))
+# define filename_dirrchr_host(P) filename_dirrchr (0, (P))
#endif
#define IS_DIR_SEPARATOR_1(dos_based, c) \
@@ -76,6 +80,9 @@ extern int filename_cmp (const char *s1,
extern int filename_ncmp (const char *s1, const char *s2,
size_t n);
+extern char *filename_dirchr (int dos_based, const char *p);
+extern char *filename_dirrchr (int dos_based, const char *p);
+
#ifdef __cplusplus
}
#endif
Index: gcc/libiberty/functions.texi
===
--- gcc.orig/libiberty/functions.texi 2011-03-12 17:02:03.817364200 +0100
+++ gcc/libiberty/functions.texi2011-03-12 17:33:02.731563500 +0100
@@ -296,6 +296,32 @@ and backward slashes are equal.
@end deftypefn
+@c filename_chr.c:32
+@deftypefn Extension int filename_dirchr (int @var{dos_based}, const char
*@var{p})
+
+This function searchs for first occurance of a directory-separator character in
+the filename @var{p} from left to right direction.
+If argument @var{dos_based} is not zero, in addition to the UNIX-style slash
+also the DOS-style backslash is searched as directory separator.
+This function does not normalize file name. The result of this routine is
+@code{NULL} pointer, if no match was found. Otherwise it returns the pointer
+to the found match.
+
+@end deftypefn
+
+@c filename_chr.c:65
+@deftypefn Extension int filename_dirrchr (int @var{dos_based}, const char
*@var{p})
+
+This function searchs for first occurance of a directory-separator character in
+the filename @var{p} from right to left direction.
+If argument @var{dos_based} is not zero, in addition to the UNIX-style slash
+also the DOS-style backslash is treated as directory separator.
+This function does not normalize file name. The result of this routine is
+@code{NULL} pointer, if no match was found. Otherwise it returns the pointer
+to the found match.
+
+@end deftypefn
+
@c filename_cmp.c:81
@deftypefn Extension int filename_ncmp (const char *@var{s1}, const char
*@var{s2}, size_t @var{n})
Index: gcc/libiberty/Makefile.in
===
--- gcc.orig/libiberty/Makefile.in 2011-03-12 17:02:03.829364200 +0100
+++ gcc/libiberty/Makefile.in 2011-03-12 17:06:49.519580900 +0100
@@ -127,8 +127,8 @@ CFILES = alloca.c argv.c asprintf.c atex
calloc.c choose-temp.c clock.c concat.c cp-demangle.c \
cp-demint.c cplus-dem.c crc32.c\
dyn-string.c\
- fdmatch.c ffs.c fibheap.c filename_cmp.c floatformat.c \
- fnmatch.c fopen_unlocked.c \
+ fdmatch.c ffs.c fibheap.c filename_chr.c filename_cmp.c \
+ floatformat.c fnmatch.c fopen_unlocked.c\
getcwd.c getopt.c
PATCH: Enable __float128 in gcc.target/i386/builtin-copysign.c for 32bit
Hi,
__float128 has been supported on ia32 for a while. This patch removes
__LP64__ check. OK for 4.7?
Thanks.
H.J.
---
2011-03-12 H.J. Lu
* gcc.target/i386/builtin-copysign.c: Remove __LP64__ check.
diff --git a/gcc/testsuite/gcc.target/i386/builtin-copysign.c
b/gcc/testsuite/gcc.target/i386/builtin-copysign.c
index c20a0b6..175b931 100644
--- a/gcc/testsuite/gcc.target/i386/builtin-copysign.c
+++ b/gcc/testsuite/gcc.target/i386/builtin-copysign.c
@@ -11,6 +11,4 @@ MODE test5##CEXT(MODE a, MODE b) { return
__builtin_copysign##CEXT(a, b); }
TEST_SET (float, f)
TEST_SET (double, )
TEST_SET (long double, l)
-#if defined (__LP64__)
TEST_SET (__float128, q)
-#endif
Re: [Patch, Fortran, Regression] PR 48059: ICE in in gfc_conv_component_ref: character function of extended type
On 03/12/2011 03:16 AM, Janus Weil wrote: Hi all, the attached patch fixes the PR in the subject line. The problem was the following: During the interface mapping for a procedure call we need to take special care of polymorphic arguments, since the type of the actual argument can differ from the type of the formal argument. Therefore we need to replace the base type of component references by the actual type (in particular to get parent references right). The patch was regtested on x86_64-unknown-linux-gnu. Ok for trunk? Yes, thanks for patch! Jerry
Re: [Patch, Fortran, Regression] PR 48059: ICE in in gfc_conv_component_ref: character function of extended type
>> The patch was regtested on x86_64-unknown-linux-gnu. Ok for trunk? >> > > Yes, as discussed off-list, it looks OK to me. Get it committed asap! Thanks. Committed as r170906. Cheers, Janus
Re: [fortran, patch] Fix memory leak in arith_power()
FX wrote: While looking at the use of gfc_free() in the front-end when discussing its removal, I noticed one instance where gfc_free_expr() should be used instead. The patch that fixes it is: OK. Thanks for the patch! Tobias 2011-03-12 Francois-Xavier Coudert * arith.c (arith_power): Plug memory leak.
[patch] ping1 unbreak bootstrap on FreeBSD ppc
All,
I'd like to commit the below patch to gcc trunk and gcc-4.5.
I have an ok from DJE, but I still await a comment from Loren.
This is now pending for more than a month. And I'd like to push this out.
Am I allowed to commit this to 4.6, or do I have to wait for 4.7 and
then backport to 4.6?
Test results are available on the list and I'll send updated results soon.
Also, what is the commit stage for 4.5? I'd like to apply it there as well.
I'd appreciate any help on this since I get asked offlist about this
patch. And if possible I'd like to point people at the latest gcc
snapshot/release instead of unapproved patches.
Thanks,
Andreas
libgcc:
2011-03-12 Andreas Tobler
* config.host (cpu_type): Add FreeBSD PowerPC specific parts.
Adjust copyright year.
gcc:
2011-03-12 Andreas Tobler
* config/rs6000/freebsd.h: (RELOCATABLE_NEEDS_FIXUP): Define in
terms of target_flags_explicit. Adjust copyright year.
* config.gcc: Add FreeBSD PowerPC soft-float libgcc bits.
* config/rs6000/t-freebsd: New file. Add override for
LIB2FUNCS_EXTRA.
Index: libgcc/config.host
===
--- libgcc/config.host (revision 170906)
+++ libgcc/config.host (working copy)
@@ -463,7 +463,8 @@
;;
powerpc64-*-darwin*)
;;
-powerpc*-*-freebsd*)
+powerpc-*-freebsd*)
+ tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-freebsd t-softfp"
;;
powerpc-*-netbsd*)
;;
Index: gcc/config.gcc
===
--- gcc/config.gcc (revision 170906)
+++ gcc/config.gcc (working copy)
@@ -2071,9 +2071,10 @@
tm_file="${tm_file} ${cpu_type}/darwin8.h ${cpu_type}/darwin64.h"
extra_headers=altivec.h
;;
-powerpc*-*-freebsd*)
+powerpc-*-freebsd*)
tm_file="${tm_file} dbxelf.h elfos.h ${fbsd_tm_file} rs6000/sysv4.h
rs6000/freebsd.h"
- tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcos
${tmake_file} rs6000/t-ppccomm"
+ tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file}
rs6000/t-ppccomm rs6000/t-freebsd"
+ tmake_file="${tmake_file} t-slibgcc-libgcc rs6000/t-fprules-softfp
soft-fp/t-softfp"
extra_options="${extra_options} rs6000/sysv4.opt"
;;
powerpc-*-netbsd*)
Index: gcc/config/rs6000/t-freebsd
===
--- gcc/config/rs6000/t-freebsd (revision 0)
+++ gcc/config/rs6000/t-freebsd (revision 0)
@@ -0,0 +1,25 @@
+# Overrides for FreeBSD PowerPC
+#
+# Copyright (C) 2011 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+#
[PATCH] prune warn_compact_unwind warnings on darwin
Xcode 4.0's linker now defaults on...
-warn_compact_unwind
When producing a final linked image, the linker processes the
__eh_frame section and produces an
__unwind_info section. Most FDE entries in the __eh_frame can
be represented by a 32-bit value in
the __unwind_info section. The option issues a warning for
any function whose FDE cannot be
expressed in the compact unwind format.
regardless of whether -no_compact_unwind is passed to the linker. This results
in many bogus excess error failures
in the testsuite due to these bogus warnings of the form...
ld: warning: could not create compact unwind for I::operator+(int =const&)
const: dwarf uses DW_CFA_GNU_args_size
The attached patch adds a regsub statement to prune.exp to suppress this
testsuite noise on darwin when linking
with Xcode 4.0. Tested on x86_64-apple-darwin10.
Jack
2011-03-12 Jack Howarth
libstdc++-v3/
* testsuite/lib/prune.exp: Prune "could not create compact unwind for"
warnings.
gcc/
* testsuite/lib/prune.exp: Ditto.
Index: libstdc++-v3/testsuite/lib/prune.exp
===
--- libstdc++-v3/testsuite/lib/prune.exp(revision 170906)
+++ libstdc++-v3/testsuite/lib/prune.exp(working copy)
@@ -55,6 +55,9 @@ proc libstdc++-dg-prune { system text }
regsub -all "(^|\n)\[^\n\]*warning:
DWARFDebugInfoEntry::AppendDependants\[^\n\]*AT_\[^\n\]*_bound\[^\n\]*FORM_ref4\[^\n\]*"
$text "" text
regsub -all "(^|\n)\[^\n\]*warning:\[^\n\]*TAG_variable:
AT_location\[^\n\]*didn't have valid function low pc\[^\n\]*" $text "" text
+# Ignore harmless warnings from Xcode 4.0.
+regsub -all "(^|\n)\[^\n\]*ld: warning: could not create compact unwind
for\[^\n\]*" $text "" text
+
foreach p $additional_prunes {
if { [string length $p] > 0 } {
# Following regexp matches a complete line containing $p.
Index: gcc/testsuite/lib/prune.exp
===
--- gcc/testsuite/lib/prune.exp (revision 170906)
+++ gcc/testsuite/lib/prune.exp (working copy)
@@ -56,6 +56,9 @@ proc prune_gcc_output { text } {
regsub -all "(^|\n)\[^\n\]*ld: warning: can't add line info to anonymous
symbol\[^\n\]*" $text "" text
regsub -all "(^|\n)\[^\n\]*warning:
DWARFDebugInfoEntry::AppendDependants\[^\n\]*AT_\[^\n\]*_bound\[^\n\]*FORM_ref4\[^\n\]*"
$text "" text
regsub -all "(^|\n)\[^\n\]*warning:\[^\n\]*TAG_variable:
AT_location\[^\n\]*didn't have valid function low pc\[^\n\]*" $text "" text
+
+# Ignore harmless warnings from Xcode 4.0.
+regsub -all "(^|\n)\[^\n\]*ld: warning: could not create compact unwind
for\[^\n\]*" $text "" text
#send_user "After:$text\n"
Re: [PATCH] Fix hpux10 string to real conversion defficiences
On 03/12/2011 08:01 AM, John David Anglin wrote: I have reviewed the patch and FX'scomments. So far so good. I may have missed something in the thread, but are you planning modifications to the functions that call convert_real to allow the nan or inf strings to be passed to convert_real? The read_real function is already handling this for namelist and list directed reads and I believe it is not needed by convert_real for those functions. For formatted reads, read_f will error out on a nan or inf during the read before calling convert_real. Here is take three. The configure checks are eliminated and a new function, convert_infnan, is added to convert INFs and NANs using builtins. It relies to some extent on the processing done by read_f, parse_real and read_real. Tested on hppa1.1-hp-hpux10.20, hppa2.0w-hp-hpux11.11, hppa64-hp-hpux11.11 and i686-apple-darwin9 with no observed regressions. Ok? This is very intrusive this close to 4.6 release. With that said, I would like to regression test a few more different platforms. I will start on mine here shortly. Regards, Jerry
[patch, fortran] Fix PR 48066
Hello world, the attached patch fixes PR 48066, a regression introduced way back when. It is pretty self-explanatory. Regression-tested. OK for trunk? Also OK for a 4.5 backport? Thomas 2011-03-12 Thomas Koenig PR libfortran/40866 * m4/ifunction.m4: If return array is empty, return. * m4/ifunction_logical.m4: Likewise. * generated/all_l16.c: Regenerated. * generated/all_l1.c: Regenerated. * generated/all_l2.c: Regenerated. * generated/all_l4.c: Regenerated. * generated/all_l8.c: Regenerated. * generated/any_l16.c: Regenerated. * generated/any_l1.c: Regenerated. * generated/any_l2.c: Regenerated. * generated/any_l4.c: Regenerated. * generated/any_l8.c: Regenerated. * generated/count_16_l.c: Regenerated. * generated/count_1_l.c: Regenerated. * generated/count_2_l.c: Regenerated. * generated/count_4_l.c: Regenerated. * generated/count_8_l.c: Regenerated. * generated/maxloc1_16_i16.c: Regenerated. * generated/maxloc1_16_i1.c: Regenerated. * generated/maxloc1_16_i2.c: Regenerated. * generated/maxloc1_16_i4.c: Regenerated. * generated/maxloc1_16_i8.c: Regenerated. * generated/maxloc1_16_r10.c: Regenerated. * generated/maxloc1_16_r16.c: Regenerated. * generated/maxloc1_16_r4.c: Regenerated. * generated/maxloc1_16_r8.c: Regenerated. * generated/maxloc1_4_i16.c: Regenerated. * generated/maxloc1_4_i1.c: Regenerated. * generated/maxloc1_4_i2.c: Regenerated. * generated/maxloc1_4_i4.c: Regenerated. * generated/maxloc1_4_i8.c: Regenerated. * generated/maxloc1_4_r10.c: Regenerated. * generated/maxloc1_4_r16.c: Regenerated. * generated/maxloc1_4_r4.c: Regenerated. * generated/maxloc1_4_r8.c: Regenerated. * generated/maxloc1_8_i16.c: Regenerated. * generated/maxloc1_8_i1.c: Regenerated. * generated/maxloc1_8_i2.c: Regenerated. * generated/maxloc1_8_i4.c: Regenerated. * generated/maxloc1_8_i8.c: Regenerated. * generated/maxloc1_8_r10.c: Regenerated. * generated/maxloc1_8_r16.c: Regenerated. * generated/maxloc1_8_r4.c: Regenerated. * generated/maxloc1_8_r8.c: Regenerated. * generated/maxval_i16.c: Regenerated. * generated/maxval_i1.c: Regenerated. * generated/maxval_i2.c: Regenerated. * generated/maxval_i4.c: Regenerated. * generated/maxval_i8.c: Regenerated. * generated/maxval_r10.c: Regenerated. * generated/maxval_r16.c: Regenerated. * generated/maxval_r4.c: Regenerated. * generated/maxval_r8.c: Regenerated. * generated/minloc1_16_i16.c: Regenerated. * generated/minloc1_16_i1.c: Regenerated. * generated/minloc1_16_i2.c: Regenerated. * generated/minloc1_16_i4.c: Regenerated. * generated/minloc1_16_i8.c: Regenerated. * generated/minloc1_16_r10.c: Regenerated. * generated/minloc1_16_r16.c: Regenerated. * generated/minloc1_16_r4.c: Regenerated. * generated/minloc1_16_r8.c: Regenerated. * generated/minloc1_4_i16.c: Regenerated. * generated/minloc1_4_i1.c: Regenerated. * generated/minloc1_4_i2.c: Regenerated. * generated/minloc1_4_i4.c: Regenerated. * generated/minloc1_4_i8.c: Regenerated. * generated/minloc1_4_r10.c: Regenerated. * generated/minloc1_4_r16.c: Regenerated. * generated/minloc1_4_r4.c: Regenerated. * generated/minloc1_4_r8.c: Regenerated. * generated/minloc1_8_i16.c: Regenerated. * generated/minloc1_8_i1.c: Regenerated. * generated/minloc1_8_i2.c: Regenerated. * generated/minloc1_8_i4.c: Regenerated. * generated/minloc1_8_i8.c: Regenerated. * generated/minloc1_8_r10.c: Regenerated. * generated/minloc1_8_r16.c: Regenerated. * generated/minloc1_8_r4.c: Regenerated. * generated/minloc1_8_r8.c: Regenerated. * generated/minval_i16.c: Regenerated. * generated/minval_i1.c: Regenerated. * generated/minval_i2.c: Regenerated. * generated/minval_i4.c: Regenerated. * generated/minval_i8.c: Regenerated. * generated/minval_r10.c: Regenerated. * generated/minval_r16.c: Regenerated. * generated/minval_r4.c: Regenerated. * generated/minval_r8.c: Regenerated. * generated/product_c10.c: Regenerated. * generated/product_c16.c: Regenerated. * generated/product_c4.c: Regenerated. * generated/product_c8.c: Regenerated. * generated/product_i16.c: Regenerated. * generated/product_i1.c: Regenerated. * generated/product_i2.c: Regenerated. * generated/product_i4.c: Regenerated. * generated/product_i8.c: Regenerated. * generated/produ
Re: [libgfortran, patch] More than 26 temporary files with weak mktemp()
On 03/12/2011 07:21 AM, FX wrote: The attached patch fixes half of PR 47439. On platform with weak or historical implementations of mktemp(), this function cannot generate more than 26 unique filenames for a given base. This happens in particular on Windows, and limits us to 26 scratch files open simultaneously. The patch works around that by adding an almost unique prefix to the filename string, which has a period of 17576. Thus, the new implementation allows to generate 456976 unique filenames, which I deemed enough :) As the issue is not a regression, I don't think it's 4.6 material so, if approved, I will commit when 4.7 branches unless instructed to do otherwise. I'd also like feedback on the attached test: do we expect systems to fail because of limits not allowing them to open 30 files? Manually tested on i586-pc-mingw32, regtested on x86_64-linux by editing config.h to fake the absence of mkstemp(). OK for 4.7? Yes, OK for 4.7 Jerry
Re: [patch, fortran] Fix PR 48066
On 03/12/2011 02:09 PM, Thomas Koenig wrote: Hello world, the attached patch fixes PR 48066, a regression introduced way back when. It is pretty self-explanatory. Regression-tested. OK for trunk? OK and thanks for patch! Jerry
Re: [patch, fortran] Fix PR 48066
Hi Jerry, On 03/12/2011 02:09 PM, Thomas Koenig wrote: Hello world, the attached patch fixes PR 48066, a regression introduced way back when. It is pretty self-explanatory. Regression-tested. OK for trunk? OK and thanks for patch! Übertrage Daten .. Revision 170908 übertragen. Thanks for the ultra-quick review! Thomas
[x32] PATCH: Update gcc.target/i386 for x32
Many tests gcc.target/i386 use ilp32 to check ia32 and use lp64 to check hardware long long support. I checked in this to fix it. H.J. --- 2011-03-12 H.J. Lu * gcc.target/i386/2609-1.c: Require ia32 instead of ilp32. * gcc.target/i386/2720-1.c: Likewise. * gcc.target/i386/2724-1.c: Likewise. * gcc.target/i386/20011107-1.c: Likewise. * gcc.target/i386/2009-1.c: Likewise. * gcc.target/i386/20020201-3.c: Likewise. * gcc.target/i386/20020218-1.c: Likewise. * gcc.target/i386/20020729-1.c: Likewise. * gcc.target/i386/20030926-1.c: Likewise. * gcc.target/i386/20060125-1.c: Likewise. * gcc.target/i386/20060125-2.c: Likewise. * gcc.target/i386/20060512-1.c: Likewise. * gcc.target/i386/20060512-2.c: Likewise. * gcc.target/i386/20060512-3.c: Likewise. * gcc.target/i386/20060512-4.c: Likewise. * gcc.target/i386/387-1.c: Likewise. * gcc.target/i386/387-2.c: Likewise. * gcc.target/i386/387-5.c: Likewise. * gcc.target/i386/387-6.c: Likewise. * gcc.target/i386/980312-1.c: Likewise. * gcc.target/i386/980313-1.c: Likewise. * gcc.target/i386/990117-1.c: Likewise. * gcc.target/i386/990424-1.c: Likewise. * gcc.target/i386/990524-1.c: Likewise. * gcc.target/i386/991129-1.c: Likewise. * gcc.target/i386/991214-1.c: Likewise. * gcc.target/i386/991230-1.c: Likewise. * gcc.target/i386/addr-sel-1.c: Likewise. * gcc.target/i386/aggregate-ret1.c: Likewise. * gcc.target/i386/aggregate-ret2.c: Likewise. * gcc.target/i386/align-main-3.c: Likewise. * gcc.target/i386/asm-1.c: Likewise. * gcc.target/i386/asm-3.c: Likewise. * gcc.target/i386/asm-5.c: Likewise. * gcc.target/i386/bitfield1.c: Likewise. * gcc.target/i386/bitfield2.c: Likewise. * gcc.target/i386/builtin-unreachable.c: Likewise. * gcc.target/i386/cleanup-2.c: Likewise. * gcc.target/i386/cmov8.c: Likewise. * gcc.target/i386/compress-float-387-pic.c: Likewise. * gcc.target/i386/compress-float-387.c: Likewise. * gcc.target/i386/compress-float-sse-pic.c: Likewise. * gcc.target/i386/compress-float-sse.c: Likewise. * gcc.target/i386/crc32-3.c: Likewise. * gcc.target/i386/fastcall-sseregparm.c: Likewise. * gcc.target/i386/funcspec-1.c: Likewise. * gcc.target/i386/funcspec-10.c: Likewise. * gcc.target/i386/funcspec-11.c: Likewise. * gcc.target/i386/funcspec-5.c: Likewise. * gcc.target/i386/gcc-have-sync-compare-and-swap-1.c: Likewise. * gcc.target/i386/gcc-have-sync-compare-and-swap-2.c: Likewise. * gcc.target/i386/gcc-have-sync-compare-and-swap-3.c: Likewise. * gcc.target/i386/incoming-1.c: Likewise. * gcc.target/i386/incoming-10.c: Likewise. * gcc.target/i386/incoming-11.c: Likewise. * gcc.target/i386/incoming-12.c: Likewise. * gcc.target/i386/incoming-13.c: Likewise. * gcc.target/i386/incoming-14.c: Likewise. * gcc.target/i386/incoming-15.c: Likewise. * gcc.target/i386/incoming-2.c: Likewise. * gcc.target/i386/incoming-3.c: Likewise. * gcc.target/i386/incoming-4.c: Likewise. * gcc.target/i386/incoming-5.c: Likewise. * gcc.target/i386/incoming-6.c: Likewise. * gcc.target/i386/incoming-7.c: Likewise. * gcc.target/i386/incoming-8.c: Likewise. * gcc.target/i386/incoming-9.c: Likewise. * gcc.target/i386/lea.c: Likewise. * gcc.target/i386/local.c: Likewise. * gcc.target/i386/loop-1.c: Likewise. * gcc.target/i386/loop-2.c: Likewise. * gcc.target/i386/loop-3.c: Likewise. * gcc.target/i386/memcpy-1.c: Likewise. * gcc.target/i386/movbe-2.c: Likewise. * gcc.target/i386/movq-2.c: Likewise. * gcc.target/i386/movq.c: Likewise. * gcc.target/i386/nrv1.c: Likewise. * gcc.target/i386/pad-4.c: Likewise. * gcc.target/i386/pad-5a.c: Likewise. * gcc.target/i386/pad-6a.c: Likewise. * gcc.target/i386/pad-7.c: Likewise. * gcc.target/i386/pentium4-not-mull.c: Likewise. * gcc.target/i386/pic-1.c: Likewise. * gcc.target/i386/pr12092-1.c: Likewise. * gcc.target/i386/pr12329.c: Likewise. * gcc.target/i386/pr21518.: Likewise. * gcc.target/i386/pr22362.c: Likewise. * gcc.target/i386/pr22585.c: Likewise. * gcc.target/i386/pr23098.c: Likewise. * gcc.target/i386/pr25196.c: Likewise. * gcc.target/i386/pr25293.c: Likewise. * gcc.target/i386/pr25654.c: Likewise. * gcc.target/i386/pr26449.c: Likewise. * gcc.target/i386/pr26778.c: Likewise. * gcc.target/i386/pr26826.c: Likewise. * gcc.target/i386/pr27266.c: Likewise. * gcc.target/i386/pr2997
Re: [patch, fortran] Fix PR 48066
On Saturday 12 March 2011 23:40:32 Thomas Koenig wrote: > Hi Jerry, > > > On 03/12/2011 02:09 PM, Thomas Koenig wrote: > >> Hello world, > >> > >> the attached patch fixes PR 48066, a regression introduced way back > >> when. It is > >> pretty self-explanatory. Regression-tested. > >> > >> OK for trunk? > > > > OK and thanks for patch! > > Übertrage Daten > ... > ... Revision 170908 übertragen. > > Thanks for the ultra-quick review! > > Thomas There was a typo in the PR number (both in the testcases and in the changelogs).
Re: [patch, fortran] Fix PR 48066
Am 13.03.2011 00:04, schrieb Mikael Morin: On Saturday 12 March 2011 23:40:32 Thomas Koenig wrote: There was a typo in the PR number (both in the testcases and in the changelogs) Corrected. Thanks! Thomas
Re: [PATCH] Fix hpux10 string to real conversion defficiences
On 03/12/2011 02:04 PM, Jerry DeLisle wrote: On 03/12/2011 08:01 AM, John David Anglin wrote: I have reviewed the patch and FX'scomments. So far so good. I may have missed something in the thread, but are you planning modifications to the functions that call convert_real to allow the nan or inf strings to be passed to convert_real? The read_real function is already handling this for namelist and list directed reads and I believe it is not needed by convert_real for those functions. For formatted reads, read_f will error out on a nan or inf during the read before calling convert_real. Here is take three. The configure checks are eliminated and a new function, convert_infnan, is added to convert INFs and NANs using builtins. It relies to some extent on the processing done by read_f, parse_real and read_real. Tested on hppa1.1-hp-hpux10.20, hppa2.0w-hp-hpux11.11, hppa64-hp-hpux11.11 and i686-apple-darwin9 with no observed regressions. Ok? This is very intrusive this close to 4.6 release. With that said, I would like to regression test a few more different platforms. I will start on mine here shortly. Tested successful on x86-64 at -m64 and -m32. I will say OK, but you may want to check with release manager. I have not heard if we are in Freeze yet. Jerry
Re: [patch, fortran] Fix PR 48066
On 03/12/2011 03:04 PM, Mikael Morin wrote: On Saturday 12 March 2011 23:40:32 Thomas Koenig wrote: Hi Jerry, On 03/12/2011 02:09 PM, Thomas Koenig wrote: Hello world, the attached patch fixes PR 48066, a regression introduced way back when. It is pretty self-explanatory. Regression-tested. OK for trunk? OK and thanks for patch! Übertrage Daten ... ... Revision 170908 übertragen. Thanks for the ultra-quick review! Thomas There was a typo in the PR number (both in the testcases and in the changelogs). Sometimes our brains "see" what they want to see! ;) Jerry
Re: [x32] PATCH: Update gcc.target/i386 for x32
On Sat, Mar 12, 2011 at 02:44:26PM -0800, H.J. Lu wrote:
> Many tests gcc.target/i386 use ilp32 to check ia32 and use lp64 to
> check hardware long long support. I checked in this to fix it.
>
>
Another patch.
H.J.
diff --git a/gcc/testsuite/ChangeLog.x32 b/gcc/testsuite/ChangeLog.x32
index 40ba17d..f575587 100644
--- a/gcc/testsuite/ChangeLog.x32
+++ b/gcc/testsuite/ChangeLog.x32
@@ -1,5 +1,27 @@
2011-03-12 H.J. Lu
+ * g++.dg/torture/stackalign/eh-fastcall-1.C: Require ia32
+ instead of ilp32.
+ * g++.dg/torture/stackalign/eh-thiscall-1.C: Likewise.
+ * g++.dg/torture/stackalign/stdcall-1.C: Likewise.
+ * g++.dg/torture/stackalign/unwind-0.C: Likewise.
+ * g++.dg/torture/stackalign/unwind-1.C: Likewise.
+ * g++.dg/torture/stackalign/unwind-2.C: Likewise.
+ * g++.dg/torture/stackalign/unwind-3.C: Likewise.
+ * g++.dg/torture/stackalign/unwind-4.C: Likewise.
+ * g++.dg/torture/stackalign/unwind-5.C: Likewise.
+ * g++.dg/torture/stackalign/unwind-6.C: Likewise.
+ * gcc.dg/torture/stackalign/alloca-2.c: Likewise.
+ * gcc.dg/torture/stackalign/alloca-4.c: Likewise.
+ * gcc.dg/torture/stackalign/alloca-5.c: Likewise.
+ * gcc.dg/torture/stackalign/alloca-6.c: Likewise.
+ * gcc.dg/torture/stackalign/fastcall-1.c: Likewise.
+ * gcc.dg/torture/stackalign/push-1.c: Likewise.
+ * gcc.dg/torture/stackalign/regparm-1.c: Likewise.
+ * gcc.dg/torture/stackalign/thiscall-1.c: Likewise.
+
+2011-03-12 H.J. Lu
+
* gcc.target/i386/builtin-copysign.c: Remove __LP64__ check.
2011-03-12 H.J. Lu
diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-fastcall-1.C
b/gcc/testsuite/g++.dg/torture/stackalign/eh-fastcall-1.C
index 4b849a2..2c24ea3 100644
--- a/gcc/testsuite/g++.dg/torture/stackalign/eh-fastcall-1.C
+++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-fastcall-1.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
#include "check.h"
diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C
b/gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C
index de9bed5..403497a 100644
--- a/gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C
+++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-thiscall-1.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
#include "check.h"
diff --git a/gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C
b/gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C
index 393b37e..18c02be 100644
--- a/gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C
+++ b/gcc/testsuite/g++.dg/torture/stackalign/stdcall-1.C
@@ -1,4 +1,4 @@
-// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
+// { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } }
// This case is to detect an assertion failure in stack branch development.
diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-0.C
b/gcc/testsuite/g++.dg/torture/stackalign/unwind-0.C
index f8166eb..b1e79d8 100644
--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-0.C
+++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-0.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
#include "test-unwind.h"
diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-1.C
b/gcc/testsuite/g++.dg/torture/stackalign/unwind-1.C
index 70dce74..d61b1ba 100644
--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-1.C
+++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-1.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
#include "test-unwind.h"
diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-2.C
b/gcc/testsuite/g++.dg/torture/stackalign/unwind-2.C
index 791eeb5..7ed0a8d 100644
--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-2.C
+++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-2.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
#include "test-unwind.h"
diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-3.C
b/gcc/testsuite/g++.dg/torture/stackalign/unwind-3.C
index 29dee2d..e3368bf 100644
--- a/gcc/testsuite/g++.dg/torture/stackalign/unwind-3.C
+++ b/gcc/testsuite/g++.dg/torture/stackalign/unwind-3.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
#include "test-unwind.h"
diff --git a/gcc/testsuite/g++.dg/torture/stackalign/unwind-4.C
b/gcc/testsuite/g++.dg/torture/stackalign/unwind-4.C
index a896176..fddf276 100644
--- a/
Re: [PATCH] Fix hpux10 string to real conversion defficiences
> On 03/12/2011 02:04 PM, Jerry DeLisle wrote: > > On 03/12/2011 08:01 AM, John David Anglin wrote: > >>> I have reviewed the patch and FX'scomments. So far so good. > >>> > >>> I may have missed something in the thread, but are you planning > >>> modifications to the functions that call convert_real to allow the nan > >>> or inf strings to be passed to convert_real? > >>> > >>> The read_real function is already handling this for namelist and list > >>> directed reads and I believe it is not needed by convert_real for those > >>> functions. > >>> > >>> For formatted reads, read_f will error out on a nan or inf during the > >>> read before calling convert_real. > >> > >> Here is take three. The configure checks are eliminated and a new > >> function, convert_infnan, is added to convert INFs and NANs using > >> builtins. It relies to some extent on the processing done by read_f, > >> parse_real and read_real. > >> > >> Tested on hppa1.1-hp-hpux10.20, hppa2.0w-hp-hpux11.11, hppa64-hp-hpux11.11 > >> and i686-apple-darwin9 with no observed regressions. > >> > >> Ok? > > > > This is very intrusive this close to 4.6 release. With that said, I would > > like > > to regression test a few more different platforms. I will start on mine here > > shortly. > > > > Tested successful on x86-64 at -m64 and -m32. I will say OK, but you may > want > to check with release manager. I have not heard if we are in Freeze yet. I will hold to 4.7 as I don't think this is a regression, and there is some risk a platform like vax will break since it doesn't have nans. Dave -- J. David Anglin dave.ang...@nrc-cnrc.gc.ca National Research Council of Canada (613) 990-0752 (FAX: 952-6602)
Re: [PATCH RFA]: clean up -fdiagnostics-show-option and -Werror= docs slightly
OK.
Re: [PATCH, rs6000] Fix PR48053, ICEs in SPEC benchmarks
On Fri, Mar 11, 2011 at 1:34 PM, Peter Bergner wrote: > This patch fixes the two related bugs in PR48053. The problem here deals > with loading constants into VSX registers. The first bug occurs when we > try and load up a full constant into the VSX register. We end up calling > easy_vector_constant_msb which is supported only for V4SI and V4SF modes. > The fix here was to modify the easy_vector_constant_msb predicate to > reject V2DI and V2DF modes. > > The second bug was when we attempt to load a VSX register with a constant > for one half of the register and a variable for the other half. This > caused an ICE in int_mode_for_mode. I fixed this by first forcing the > correct scalar mode in rs6000_expand_vector_init() and then adding > special support in the movdi_internal* patterns to allow setting of > VSX registers to zero. > > These fixed both test cases in PR48053 and Pat Haugen verified that > they fixed the SPEC benchmarks the test cases were reduced from, > without introducing any new SPEC regressions. > > This patch passed bootstrapp and regtesting on powerpc64-linux > (test suite run in both 32-bit and 64-bit modes). Ok for mainline? > > Peter > > > gcc/ > PR target/48053 > * config/rs6000/predicates.md (easy_vector_constant_add_self, > easy_vector_constant_msb): Do not handle V2DImode and V2DFmode. > * config/rs6000/rs6000.c (const_vector_elt_as_int): Add assert that > mode is not V2DImode or V2DFmode. > (vspltis_constant): Do not handle V2DImode and V2DFmode. > (rs6000_expand_vector_init): Replace copy_to_reg with copy_to_mode_reg. > * config/rs6000/rs6000.md (movdi_internal32): Allow setting VSX > registers to 0. > (movdi_internal64): Likewise. > > gcc/testsuite/ > PR target/48053 > * gcc/testsuite/gcc.target/powerpc/pr48053-1.c: New test. > * gcc/testsuite/gcc.target/powerpc/pr48053-2.c: Likewise. Okay. Thanks, David
Re: [PATCH, rs6000] Fix PR48053, ICEs in SPEC benchmarks
On Sat, 2011-03-12 at 22:21 -0500, David Edelsohn wrote: > > gcc/ > >PR target/48053 > >* config/rs6000/predicates.md (easy_vector_constant_add_self, > >easy_vector_constant_msb): Do not handle V2DImode and V2DFmode. > >* config/rs6000/rs6000.c (const_vector_elt_as_int): Add assert that > >mode is not V2DImode or V2DFmode. > >(vspltis_constant): Do not handle V2DImode and V2DFmode. > >(rs6000_expand_vector_init): Replace copy_to_reg with > > copy_to_mode_reg. > >* config/rs6000/rs6000.md (movdi_internal32): Allow setting VSX > >registers to 0. > >(movdi_internal64): Likewise. > > > > gcc/testsuite/ > >PR target/48053 > >* gcc/testsuite/gcc.target/powerpc/pr48053-1.c: New test. > >* gcc/testsuite/gcc.target/powerpc/pr48053-2.c: Likewise. > > Okay. Thanks, committed as revision 170920. Peter
