[gcc r16-697] MAINTAINERS: add myself to write after approval

2025-05-16 Thread Spencer Abson via Gcc-cvs
https://gcc.gnu.org/g:e211c49f277f9c3d2a9d3031e9d583220e15ae4e

commit r16-697-ge211c49f277f9c3d2a9d3031e9d583220e15ae4e
Author: Spencer Abson 
Date:   Fri May 16 15:42:44 2025 +

MAINTAINERS: add myself to write after approval

ChangeLog:

* MAINTAINERS: Add myself to write after approval.

Diff:
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index a3e3f25d9d18..8993d176c22e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -329,6 +329,7 @@ from other maintainers or reviewers.
 NameBZ account  Email
 
 Soumya AR   soumyaa 
+Spencer Abson   sabson  
 Mark G. Adams   mgadams 
 Ajit Kumar Agarwal  aagarwa 
 Pedro Alves palves  


[gcc r16-1171] middle-end: Fix operation_could_trap_p for FIX_TRUNC expressions

2025-06-05 Thread Spencer Abson via Gcc-cvs
https://gcc.gnu.org/g:66fc62e9c7b55f287cc523854ca330b6531760b6

commit r16-1171-g66fc62e9c7b55f287cc523854ca330b6531760b6
Author: Spencer Abson 
Date:   Tue Jun 3 12:15:12 2025 +

middle-end: Fix operation_could_trap_p for FIX_TRUNC expressions

Floating-point to integer conversions can be inexact or invalid (e.g., due 
to
overflow or NaN).  However, since users of operation_could_trap_p infer the
bool FP_OPERATION argument from the expression's type, the FIX_TRUNC family
are considered non-trapping here.

This patch handles them explicitly.

gcc/ChangeLog:

* tree-eh.cc (operation_could_trap_helper_p): Cover FIX_TRUNC
expressions explicitly.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve/pr96357.c: Change to avoid producing
a conditional FIX_TRUNC_EXPR, whilst still reproducing the bug
in PR96357.
* gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c: New test.
* gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c: Likewise.

Diff:
---
 gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c | 19 +++
 gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c |  6 ++
 gcc/testsuite/gcc.target/aarch64/sve/pr96357.c|  8 
 gcc/tree-eh.cc|  7 +++
 4 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c
new file mode 100644
index ..801a53fa30bd
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c
@@ -0,0 +1,19 @@
+  /* { dg-do compile } */
+  /* { dg-options "-O2 -ftree-vectorize -fdump-tree-ifcvt-stats" } */
+
+void
+test (int *dst, float *arr, int *pred, int n)
+{
+  for (int i = 0; i < n; i++)
+{
+  int pred_i = pred[i];
+  float arr_i = arr[i];
+
+  dst[i] = pred_i ? (int)arr_i : 5;
+}
+}
+
+/* We expect this to fail if_convertible_loop_p so long as we have no
+   conditional IFN for FIX_TRUNC_EXPR.  */
+
+/* { dg-final { scan-tree-dump-times "Applying if-conversion" 0 "ifcvt" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c 
b/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c
new file mode 100644
index ..628b754e94d9
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -fno-trapping-math 
-fdump-tree-ifcvt-stats" } */
+
+#include "ifcvt-fix-trunc-1.c"
+
+/* { dg-final { scan-tree-dump-times "Applying if-conversion" 1 "ifcvt" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr96357.c 
b/gcc/testsuite/gcc.target/aarch64/sve/pr96357.c
index 9a7f912e529f..6dd0409f3c88 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pr96357.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr96357.c
@@ -5,10 +5,10 @@ int d;
 
 void
 f1(char f, char *g, char *h, char *l, char *n) {
-  double i = d, j = 1.0 - f, k = j ? d : j;
-  if (k == 1.0)
-i = 0.0;
-  *l = *n = *g = *h = i * 0.5;
+  double j = 1.0 - f, k = j ? d : j;
+
+  char i = (k == 1.0) ? 10 : 50;
+  *l = *n = *g = *h = i;
 }
 
 void
diff --git a/gcc/tree-eh.cc b/gcc/tree-eh.cc
index a4d59954c059..8cc81ebcf5e9 100644
--- a/gcc/tree-eh.cc
+++ b/gcc/tree-eh.cc
@@ -2538,6 +2538,13 @@ operation_could_trap_helper_p (enum tree_code op,
   /* Constructing an object cannot trap.  */
   return false;
 
+case FIX_TRUNC_EXPR:
+case VEC_PACK_FIX_TRUNC_EXPR:
+case VEC_UNPACK_FIX_TRUNC_HI_EXPR:
+case VEC_UNPACK_FIX_TRUNC_LO_EXPR:
+  /* The FIX_TRUNC family are always potentially trapping.  */
+  return flag_trapping_math;
+
 case COND_EXPR:
 case VEC_COND_EXPR:
   /* Whether *COND_EXPR can trap depends on whether the


[gcc r16-1505] aarch64: Fold NOT+PTEST to NOTS [PR118150]

2025-06-13 Thread Spencer Abson via Gcc-cvs
https://gcc.gnu.org/g:00742daf6cac0ad10835ba0657d0f1a20bdf83db

commit r16-1505-g00742daf6cac0ad10835ba0657d0f1a20bdf83db
Author: Spencer Abson 
Date:   Fri Jun 13 09:25:28 2025 +

aarch64: Fold NOT+PTEST to NOTS [PR118150]

Add combiner patterns for folding NOT+PTEST to NOTS when they share
the same governing predicate.

gcc/ChangeLog:
PR target/118150
* config/aarch64/aarch64-sve.md (*one_cmpl3_cc): New
combiner pattern.
(*one_cmpl3_ptest): Likewise.

gcc/testsuite/ChangeLog:
PR target/118150
* gcc.target/aarch64/sve/acle/general/not_1.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64-sve.md  | 37 ++
 .../gcc.target/aarch64/sve/acle/general/not_1.c| 22 +
 2 files changed, 59 insertions(+)

diff --git a/gcc/config/aarch64/aarch64-sve.md 
b/gcc/config/aarch64/aarch64-sve.md
index c5d3e8cd3b32..7cb13e73d0d4 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -3948,6 +3948,7 @@
 ;; -
 ;; Includes:
 ;; - NOT
+;; - NOTS
 ;; -
 
 ;; Unpredicated predicate inverse.
@@ -3972,6 +3973,42 @@
   "not\t%0.b, %1/z, %2.b"
 )
 
+;; Predicated predicate inverse in which the flags are set in the same
+;; way as a PTEST.
+(define_insn "*one_cmpl3_cc"
+  [(set (reg:CC_NZC CC_REGNUM)
+   (unspec:CC_NZC
+ [(match_operand:VNx16BI 1 "register_operand" "Upa")
+  (match_operand 3)
+  (match_operand:SI 4 "aarch64_sve_ptrue_flag")
+  (and:PRED_ALL
+(not:PRED_ALL
+  (match_operand:PRED_ALL 2 "register_operand" "Upa"))
+(match_dup 3))]
+ UNSPEC_PTEST))
+   (set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
+   (and:PRED_ALL (not:PRED_ALL (match_dup 2)) (match_dup 3)))]
+  "TARGET_SVE"
+  "nots\t%0.b, %1/z, %2.b"
+)
+
+;; Same, where only the flags result is interesting.
+(define_insn "*one_cmpl3_ptest"
+  [(set (reg:CC_NZC CC_REGNUM)
+   (unspec:CC_NZC
+ [(match_operand:VNx16BI 1 "register_operand" "Upa")
+  (match_operand 3)
+  (match_operand:SI 4 "aarch64_sve_ptrue_flag")
+  (and:PRED_ALL
+(not:PRED_ALL
+  (match_operand:PRED_ALL 2 "register_operand" "Upa"))
+(match_dup 3))]
+ UNSPEC_PTEST))
+   (clobber (match_scratch:PRED_ALL 0 "=Upa"))]
+  "TARGET_SVE"
+  "nots\t%0.b, %1/z, %2.b"
+)
+
 ;; =
 ;; == Binary arithmetic
 ;; =
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/not_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/not_1.c
new file mode 100644
index ..875d78885d60
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/not_1.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include 
+
+void
+test1 (svbool_t pg, svbool_t x, int *any, svbool_t *ptr)
+{
+  svbool_t res = svnot_z (pg, x);
+  *any = svptest_last (pg, res);
+  *ptr = res;
+}
+
+int
+test2 (svbool_t pg, svbool_t x)
+{
+  svbool_t res = svnot_z (pg, x);
+  return svptest_first (pg, res);
+}
+
+/* { dg-final { scan-assembler-times {\tnots\t} 2 } } */
+/* { dg-final { scan-assembler-not {\tnot\t} } } */