[gcc/aoliva/heads/testme] (390 commits) [vxworks] [x86] disable vxworks6 PIC on vxworks7

2025-07-07 Thread Alexandre Oliva via Gcc-cvs
The branch 'aoliva/heads/testme' was updated to point to:

 f2785c2d6795... [vxworks] [x86] disable vxworks6 PIC on vxworks7

It previously pointed to:

 6d0055d14fc6... [lra] catch all to-sp eliminations with nonzero offsets [PR

Diff:

Summary of changes (added commits):
---

  f2785c2... [vxworks] [x86] disable vxworks6 PIC on vxworks7
  e46933d... [vxworks] add aarch64 to vxworks-dummy.h set (*)
  bbf79f3... Daily bump. (*)
  ed912b1... libstdc++: Fix attribute order on __normal_iterator friends (*)
  5ca5e1d... libstdc++: Make VERIFY a variadic macro (*)
  9450fb7... libstdc++: Use template keyword in __mapping_of alias templ (*)
  54c640b... Revert "Extend "counted_by" attribute to pointer fields of  (*)
  bed3415... Revert "Use the counted_by attribute of pointers in builtin (*)
  c307085... Revert "Use the counted_by attribute of pointers in array b (*)
  3e34c54... check-function-bodies: Support "^[0-9]+:" (*)
  f555ee5... Ignore more clang warnings in contrib/filter-clang-warnings (*)
  5af316d... ranger: Mark three occurrences of verify_range with overide (*)
  2a6ac38... xtensa: Remove TARGET_PROMOTE_PROTOTYPES (*)
  c476f55... s390: Optimize fmin/fmax. (*)
  4b9f760... testsuite: add sve hw check to testcase [PR120817] (*)
  5abac04... c++: Fix FMV return type ambiguation (*)
  8abc2e6... c++: -Wno-abbreviated-auto-in-template-arg [PR120917] (*)
  0c73f2f... aarch64: Improve popcountti2 with SVE (*)
  8ad5968... libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's t (*)
  439b14e... tree-optimization/120817 - bogus DSE of .MASK_STORE (*)
  65c40c0... RISC-V: Add test cases for unsigned scalar SAT_MUL from uin (*)
  62b99e8... RISC-V: Implement unsigned scalar SAT_MUL from uint128_t (*)
  dc30f40... Widening-Mul: Support unsigned scalar SAT_MUL form 1 (*)
  35f5a18... Internal-fn: Introduce new IFN_SAT_MUL for unsigned int (*)
  add9319... Ada: Reapply tweaks to delay statements in ACATS 3&4 testsu (*)
  2a82d4c... libstdc++: Format __float128 as _Float128 only when long do (*)
  188acc9... s390: Add some missing vector patterns. (*)
  333e627... Update maintainers file (*)
  559ddec... aarch64: Add support for unpacked SVE FP comparisons (*)
  ec54a14... vect: Fix VEC_WIDEN_PLUS_HI/LO choice for big-endian [PR118 (*)
  bf3037e... ext-dce: Fix subreg_lsb is_constant assumption (*)
  69c839c... aarch64: Fix neon-sve-bridge.c failures for big-endian (*)
  cb2b547... aarch64: Fix ZIP1 order in aarch64_expand_vector_init [PR11 (*)
  7891c0b... Print discriminators in dump_scope_block (*)
  4011993... x86: Improve vector_loop/unrolled_loop for memset/memcpy (*)
  6645559... c++: Pedwarn on invalid decl specifiers for for-range-decla (*)
  849878d... fortran: Add the preliminary code of MOVE_ALLOC arguments (*)
  be07dd9... crc: Error out on non-constant poly arguments for the crc b (*)
  a96bcdf... Daily bump. (*)
  2a56f3c... libstdc++: Implement ranges::shift_left/right from P2440R1 (*)
  bac45dd... AVR: Fix a typo in avr-mcus.def. (*)
  76d6f40... AVR: Add support for AVR32DAxxS, AVR64DAxxS, AVR128DAxxS de (*)
  e17e3de... cdce: Fix non-call exceptions with signaling nans [PR120951 (*)
  5c2dc85... tree-cfg: Reject constants and addr on lhs for assign singl (*)
  5c0758c... Add cutoff information to profile_info and use it when forc (*)
  1757c32... Fix overflow check in profile_count::operator* (const sreal (*)
  5599f8a... Daily bump. (*)
  6c472b3... [vxworks] [ppc] match TARGET_VXWORKS64 to TARGET_64BIT (*)
  a90b869... Daily bump. (*)
  f2a3ab7... RISC-V: prefetch: fix LRA failing to allocate reg [PR118241 (*)
  b960201... RISC-V: prefetch: const offset needs to have 5 bits zero, n (*)
  eeea445... libstdc++: Avoid -Wswitch warning from chrono formatters (*)
  106591f... libstdc++: Fix typo in __size_to_integer(__GLIBCXX_TYPE_INT (*)
  eda5a15... sh: Recognize >> 31 in treg_set_expr_not_const01 (*)
  0b7c273... Fortran: Silence a clang warning (suggesting a brace) in io (*)
  f24015a... fold: Change comparison of error_mark_node to use error_ope (*)
  36d33ce... MAINTAINERS: replace tabs with spaces (*)
  35d6f55... c++: -Wtemplate-body and tentative parsing [PR120575] (*)
  2f19d94... RISC-V: Add test for vec_duplicate + vsadd.vv combine case  (*)
  ea86a5a... RISC-V: Add test for vec_duplicate + vsadd.vv combine case  (*)
  0601f46... RISC-V: Combine vec_duplicate + vsadd.vv to vsadd.vx on GR2 (*)
  8798425... MAINTAINERS: Add myself as an aarch64 port reviewer (*)
  6ed1e2a... tree-optimization/120944 - bogus VN with volatile copies (*)
  36599ed... Ada: Switch from ACATS 2.6 to ACATS 4.2 testsuite (*)
  cda156b... ada: Fix alignment violation for chain of aligned and misal (*)
  ccf6682... ada: Remove strange elaboration code generated for Cluster  (*)
  372c2b5... ada: Disable previous change for enumeration types (*)
  c7f8a5b... ada: Add missing guards to previous change (*)
  800ca47... ada: Improve code generated for return of Out parameter wit (

[gcc/aoliva/heads/testbase] (389 commits) [vxworks] add aarch64 to vxworks-dummy.h set

2025-07-07 Thread Alexandre Oliva via Gcc-cvs
The branch 'aoliva/heads/testbase' was updated to point to:

 e46933d3cc82... [vxworks] add aarch64 to vxworks-dummy.h set

It previously pointed to:

 407ae3aa7901... Daily bump.

Diff:

Summary of changes (added commits):
---

  e46933d... [vxworks] add aarch64 to vxworks-dummy.h set (*)
  bbf79f3... Daily bump. (*)
  ed912b1... libstdc++: Fix attribute order on __normal_iterator friends (*)
  5ca5e1d... libstdc++: Make VERIFY a variadic macro (*)
  9450fb7... libstdc++: Use template keyword in __mapping_of alias templ (*)
  54c640b... Revert "Extend "counted_by" attribute to pointer fields of  (*)
  bed3415... Revert "Use the counted_by attribute of pointers in builtin (*)
  c307085... Revert "Use the counted_by attribute of pointers in array b (*)
  3e34c54... check-function-bodies: Support "^[0-9]+:" (*)
  f555ee5... Ignore more clang warnings in contrib/filter-clang-warnings (*)
  5af316d... ranger: Mark three occurrences of verify_range with overide (*)
  2a6ac38... xtensa: Remove TARGET_PROMOTE_PROTOTYPES (*)
  c476f55... s390: Optimize fmin/fmax. (*)
  4b9f760... testsuite: add sve hw check to testcase [PR120817] (*)
  5abac04... c++: Fix FMV return type ambiguation (*)
  8abc2e6... c++: -Wno-abbreviated-auto-in-template-arg [PR120917] (*)
  0c73f2f... aarch64: Improve popcountti2 with SVE (*)
  8ad5968... libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's t (*)
  439b14e... tree-optimization/120817 - bogus DSE of .MASK_STORE (*)
  65c40c0... RISC-V: Add test cases for unsigned scalar SAT_MUL from uin (*)
  62b99e8... RISC-V: Implement unsigned scalar SAT_MUL from uint128_t (*)
  dc30f40... Widening-Mul: Support unsigned scalar SAT_MUL form 1 (*)
  35f5a18... Internal-fn: Introduce new IFN_SAT_MUL for unsigned int (*)
  add9319... Ada: Reapply tweaks to delay statements in ACATS 3&4 testsu (*)
  2a82d4c... libstdc++: Format __float128 as _Float128 only when long do (*)
  188acc9... s390: Add some missing vector patterns. (*)
  333e627... Update maintainers file (*)
  559ddec... aarch64: Add support for unpacked SVE FP comparisons (*)
  ec54a14... vect: Fix VEC_WIDEN_PLUS_HI/LO choice for big-endian [PR118 (*)
  bf3037e... ext-dce: Fix subreg_lsb is_constant assumption (*)
  69c839c... aarch64: Fix neon-sve-bridge.c failures for big-endian (*)
  cb2b547... aarch64: Fix ZIP1 order in aarch64_expand_vector_init [PR11 (*)
  7891c0b... Print discriminators in dump_scope_block (*)
  4011993... x86: Improve vector_loop/unrolled_loop for memset/memcpy (*)
  6645559... c++: Pedwarn on invalid decl specifiers for for-range-decla (*)
  849878d... fortran: Add the preliminary code of MOVE_ALLOC arguments (*)
  be07dd9... crc: Error out on non-constant poly arguments for the crc b (*)
  a96bcdf... Daily bump. (*)
  2a56f3c... libstdc++: Implement ranges::shift_left/right from P2440R1 (*)
  bac45dd... AVR: Fix a typo in avr-mcus.def. (*)
  76d6f40... AVR: Add support for AVR32DAxxS, AVR64DAxxS, AVR128DAxxS de (*)
  e17e3de... cdce: Fix non-call exceptions with signaling nans [PR120951 (*)
  5c2dc85... tree-cfg: Reject constants and addr on lhs for assign singl (*)
  5c0758c... Add cutoff information to profile_info and use it when forc (*)
  1757c32... Fix overflow check in profile_count::operator* (const sreal (*)
  5599f8a... Daily bump. (*)
  6c472b3... [vxworks] [ppc] match TARGET_VXWORKS64 to TARGET_64BIT (*)
  a90b869... Daily bump. (*)
  f2a3ab7... RISC-V: prefetch: fix LRA failing to allocate reg [PR118241 (*)
  b960201... RISC-V: prefetch: const offset needs to have 5 bits zero, n (*)
  eeea445... libstdc++: Avoid -Wswitch warning from chrono formatters (*)
  106591f... libstdc++: Fix typo in __size_to_integer(__GLIBCXX_TYPE_INT (*)
  eda5a15... sh: Recognize >> 31 in treg_set_expr_not_const01 (*)
  0b7c273... Fortran: Silence a clang warning (suggesting a brace) in io (*)
  f24015a... fold: Change comparison of error_mark_node to use error_ope (*)
  36d33ce... MAINTAINERS: replace tabs with spaces (*)
  35d6f55... c++: -Wtemplate-body and tentative parsing [PR120575] (*)
  2f19d94... RISC-V: Add test for vec_duplicate + vsadd.vv combine case  (*)
  ea86a5a... RISC-V: Add test for vec_duplicate + vsadd.vv combine case  (*)
  0601f46... RISC-V: Combine vec_duplicate + vsadd.vv to vsadd.vx on GR2 (*)
  8798425... MAINTAINERS: Add myself as an aarch64 port reviewer (*)
  6ed1e2a... tree-optimization/120944 - bogus VN with volatile copies (*)
  36599ed... Ada: Switch from ACATS 2.6 to ACATS 4.2 testsuite (*)
  cda156b... ada: Fix alignment violation for chain of aligned and misal (*)
  ccf6682... ada: Remove strange elaboration code generated for Cluster  (*)
  372c2b5... ada: Disable previous change for enumeration types (*)
  c7f8a5b... ada: Add missing guards to previous change (*)
  800ca47... ada: Improve code generated for return of Out parameter wit (*)
  37ee107... ada: Do not generate incorrect warning about redundant type (*)
  623ce60... ada: Pragma Short_C

[gcc(refs/users/aoliva/heads/testme)] [vxworks] [x86] disable vxworks6 PIC on vxworks7

2025-07-07 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:f2785c2d679541a4939e2de6b216ba3238082f4f

commit f2785c2d679541a4939e2de6b216ba3238082f4f
Author: Alexandre Oliva 
Date:   Mon Jul 7 22:25:58 2025 -0300

[vxworks] [x86] disable vxworks6 PIC on vxworks7

VxWorks6 used symbols __GOTT_BASE__ and __GOTT_INDEX__ to obtain the
address of the global offset table.  Starting with VxWorks7, that is
no longer the case, but we've still issued these symbols in
output_set_got.  Do that only with VxWorks<7.

Switching to the call-based PIC register sequence, we have to set the
flag that prevents the use of the red zone, and AFAICT the reasons
that ruled out GOTOFF and other relative addressing no longer apply to
VxWorks7+.


for  gcc/ChangeLog

* config/vxworks-dummy.h (TARGET_VXWORKS_VAROFF): New.
(TARGET_VXWORKS_GOTTPIC): New.
* config/vxworks.h (TARGET_VXWORKS_VAROFF): Override.
(TARGET_VXWORKS_GOTTPIC): Likewise.
* config/i386/i386.cc (output_set_got): Disable VxWorks6 GOT
sequence on VxWorks7.
(legitimize_pic_address): Accept relative addressing of
labels on VxWorks7.
(ix86_delegitimize_address_1): Likewise.
(ix86_output_addr_diff_elt): Likewise.
* config/i386/i386.md (tablejump): Likewise.
(set_got, set_got_labelled): Set no-red-zone flag on VxWorks7.

Diff:
---
 gcc/config/i386/i386.cc   |  8 
 gcc/config/i386/i386.md   |  6 +++---
 gcc/config/i386/predicates.md |  3 ++-
 gcc/config/vxworks-dummy.h| 12 
 gcc/config/vxworks.h  | 12 
 5 files changed, 33 insertions(+), 8 deletions(-)

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index b64175d6c939..fd3f35de14d3 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -6526,7 +6526,7 @@ output_set_got (rtx dest, rtx label)
 
   xops[0] = dest;
 
-  if (TARGET_VXWORKS_RTP && flag_pic)
+  if (TARGET_VXWORKS_GOTTPIC && TARGET_VXWORKS_RTP && flag_pic)
 {
   /* Load (*VXWORKS_GOTT_BASE) into the PIC register.  */
   xops[2] = gen_rtx_MEM (Pmode,
@@ -12245,7 +12245,7 @@ legitimize_pic_address (rtx orig, rtx reg)
   else if ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (addr) == 0)
   /* We can't always use @GOTOFF for text labels
  on VxWorks, see gotoff_operand.  */
-  || (TARGET_VXWORKS_RTP && GET_CODE (addr) == LABEL_REF))
+  || (TARGET_VXWORKS_VAROFF && GET_CODE (addr) == LABEL_REF))
 {
 #if TARGET_PECOFF
   rtx tmp = legitimize_pe_coff_symbol (addr, true);
@@ -13472,7 +13472,7 @@ ix86_delegitimize_address_1 (rtx x, bool base_term_p)
   else if (base_term_p
   && pic_offset_table_rtx
   && !TARGET_MACHO
-  && !TARGET_VXWORKS_RTP)
+  && !TARGET_VXWORKS_VAROFF)
{
  rtx tmp = gen_rtx_SYMBOL_REF (Pmode, GOT_SYMBOL_NAME);
  tmp = gen_rtx_MINUS (Pmode, copy_rtx (addend), tmp);
@@ -15872,7 +15872,7 @@ ix86_output_addr_diff_elt (FILE *file, int value, int 
rel)
   gcc_assert (!TARGET_64BIT);
 #endif
   /* We can't use @GOTOFF for text labels on VxWorks; see gotoff_operand.  */
-  if (TARGET_64BIT || TARGET_VXWORKS_RTP)
+  if (TARGET_64BIT || TARGET_VXWORKS_VAROFF)
 fprintf (file, "%s%s%d-%s%d\n",
 directive, LPREFIX, value, LPREFIX, rel);
 #if TARGET_MACHO
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 21b9f5ccd7a1..5825acabb946 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -20102,7 +20102,7 @@
 
   /* We can't use @GOTOFF for text labels on VxWorks;
 see gotoff_operand.  */
-  if (TARGET_64BIT || TARGET_VXWORKS_RTP)
+  if (TARGET_64BIT || TARGET_VXWORKS_VAROFF)
{
  code = PLUS;
  op0 = operands[0];
@@ -20970,7 +20970,7 @@
   (clobber (reg:CC FLAGS_REG))])]
   "!TARGET_64BIT"
 {
-  if (flag_pic && !TARGET_VXWORKS_RTP)
+  if (flag_pic && !TARGET_VXWORKS_GOTTPIC)
 ix86_pc_thunk_call_expanded = true;
 })
 
@@ -20991,7 +20991,7 @@
   (clobber (reg:CC FLAGS_REG))])]
   "!TARGET_64BIT"
 {
-  if (flag_pic && !TARGET_VXWORKS_RTP)
+  if (flag_pic && !TARGET_VXWORKS_GOTTPIC)
 ix86_pc_thunk_call_expanded = true;
 })
 
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 1bd63b2367e1..3afaf83a7a0c 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -664,8 +664,9 @@
 ;; same segment as the GOT.  Unfortunately, the flexibility of linker
 ;; scripts means that we can't be sure of that in general, so assume
 ;; @GOTOFF is not valid on VxWorks, except with the large code model.
+;; The comments above seem to apply only to VxWorks releases before 7.
 (define_predicate "gotoff_operand"
-  (and (ior (not (match_test "TARGET_VXWORKS_RTP"))
+  (and (ior (not (match_test "TARGET_VXWORKS_VAROFF"))
 (match_test "ix86_cm

[gcc(refs/users/mikael/heads/deplacement_reallocation_v01)] Annulation suppression mise à jour saved_offset

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:588b9d597052483d4a8e105d8a4718ab8097090b

commit 588b9d597052483d4a8e105d8a4718ab8097090b
Author: Mikael Morin 
Date:   Mon Jul 7 10:29:49 2025 +0200

Annulation suppression mise à jour saved_offset

Diff:
---
 gcc/fortran/trans-array.cc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index b7040bb7e6c9..7be2d7b11a62 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -11736,6 +11736,9 @@ gfc_alloc_allocatable_for_assignment (gfc_loopinfo 
*loop,
  running offset.  Use the saved_offset instead.  */
   tmp = gfc_conv_descriptor_offset (desc);
   gfc_add_modify (&fblock, tmp, offset);
+  if (linfo->saved_offset
+  && VAR_P (linfo->saved_offset))
+gfc_add_modify (&fblock, linfo->saved_offset, tmp);
 
   /* Now set the deltas for the lhs.  */
   for (n = 0; n < expr1->rank; n++)


[gcc r16-2048] Print discriminators in dump_scope_block

2025-07-07 Thread Jan Hubicka via Gcc-cvs
https://gcc.gnu.org/g:7891c0b450d5ba662fa1817af667b2ba35dee661

commit r16-2048-g7891c0b450d5ba662fa1817af667b2ba35dee661
Author: Jan Hubicka 
Date:   Mon Jul 7 10:07:53 2025 +0200

Print discriminators in dump_scope_block

gcc/ChangeLog:

* tree-ssa-live.cc (dump_scope_block): Print discriminators
of inlined functions.

Diff:
---
 gcc/tree-ssa-live.cc | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/tree-ssa-live.cc b/gcc/tree-ssa-live.cc
index 5b8bfd06bec1..5e0891361dc7 100644
--- a/gcc/tree-ssa-live.cc
+++ b/gcc/tree-ssa-live.cc
@@ -702,7 +702,10 @@ dump_scope_block (FILE *file, int indent, tree scope, 
dump_flags_t flags)
   if (LOCATION_LOCUS (BLOCK_SOURCE_LOCATION (scope)) != UNKNOWN_LOCATION)
 {
   expanded_location s = expand_location (BLOCK_SOURCE_LOCATION (scope));
-  fprintf (file, " %s:%i", s.file, s.line);
+  fprintf (file, " %s:%i:%i", s.file, s.line, s.column);
+  if (has_discriminator (BLOCK_SOURCE_LOCATION (scope)))
+   fprintf (file, " discrim %i",
+get_discriminator_from_loc (BLOCK_SOURCE_LOCATION (scope)));
 }
   if (BLOCK_ABSTRACT_ORIGIN (scope))
 {


[gcc r16-2049] aarch64: Fix ZIP1 order in aarch64_expand_vector_init [PR118891]

2025-07-07 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:cb2b5471516c3c469f65d927a2a30eb15357e429

commit r16-2049-gcb2b5471516c3c469f65d927a2a30eb15357e429
Author: Richard Sandiford 
Date:   Mon Jul 7 09:10:37 2025 +0100

aarch64: Fix ZIP1 order in aarch64_expand_vector_init [PR118891]

aarch64_expand_vector_init contains some divide-and-conquer code
that tries to load the odd and even elements into 64-bit registers
and then ZIP them together.  On big-endian targets, the even elements
are more significant than the odd elements and so should come second
in the ZIP.

This fixes many execution failures on aarch64_be-elf, including
gcc.c-torture/execute/pr28982a.c.

gcc/
PR target/118891
* config/aarch64/aarch64.cc (aarch64_expand_vector_init): Fix the
ZIP1 operand order for big-endian targets.

Diff:
---
 gcc/config/aarch64/aarch64.cc | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index f3ce3a15b095..0b4cd17c0ef9 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -24830,6 +24830,13 @@ aarch64_expand_vector_init (rtx target, rtx vals)
   emit_insn (rec_seq);
 }
 
+  /* The two halves should (by induction) be individually endian-correct.
+ However, in the memory layout provided by VALS, the nth element of
+ HALVES[0] comes immediately before the nth element HALVES[1].
+ This means that, on big-endian targets, the nth element of HALVES[0]
+ is more significant than the nth element HALVES[1].  */
+  if (BYTES_BIG_ENDIAN)
+std::swap (halves[0], halves[1]);
   rtvec v = gen_rtvec (2, halves[0], halves[1]);
   rtx_insn *zip1_insn
 = emit_set_insn (target, gen_rtx_UNSPEC (mode, v, UNSPEC_ZIP1));


[gcc r16-2051] ext-dce: Fix subreg_lsb is_constant assumption

2025-07-07 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:bf3037e923e9f91d93ab64bdf73a37f64f659fb9

commit r16-2051-gbf3037e923e9f91d93ab64bdf73a37f64f659fb9
Author: Richard Sandiford 
Date:   Mon Jul 7 09:10:38 2025 +0100

ext-dce: Fix subreg_lsb is_constant assumption

ext-dce had:

  if (SUBREG_P (dst) && SUBREG_BYTE (dst).is_constant ())
{
  bit = subreg_lsb (dst).to_constant ();
  if (bit >= HOST_BITS_PER_WIDE_INT)
bit = HOST_BITS_PER_WIDE_INT - 1;
  dst = SUBREG_REG (dst);

But a constant SUBREG_BYTE doesn't guarantee a constant subreg_lsb.
If the SUBREG_REG is a pair of N-bit registers on a big-endian target,
the most significant end has a SUBREG_BYTE of 0 but a subreg_lsb of N.
This N would then be non-constant for variable-length registers.

The patch fixes gcc.dg/torture/pr120276.c and other failures on
aarch64_be-elf.

gcc/
* ext-dce.cc (ext_dce_process_uses): Apply is_constant directly
to the subreg_lsb.

Diff:
---
 gcc/ext-dce.cc | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/gcc/ext-dce.cc b/gcc/ext-dce.cc
index afe7afe21fd7..e7635fb7a394 100644
--- a/gcc/ext-dce.cc
+++ b/gcc/ext-dce.cc
@@ -651,9 +651,8 @@ ext_dce_process_uses (rtx_insn *insn, rtx obj,
 
  /* ?!? How much of this should mirror SET handling, potentially
 being shared?   */
- if (SUBREG_P (dst) && SUBREG_BYTE (dst).is_constant ())
+ if (SUBREG_P (dst) && subreg_lsb (dst).is_constant (&bit))
{
- bit = subreg_lsb (dst).to_constant ();
  if (bit >= HOST_BITS_PER_WIDE_INT)
bit = HOST_BITS_PER_WIDE_INT - 1;
  dst = SUBREG_REG (dst);


[gcc r16-2050] aarch64: Fix neon-sve-bridge.c failures for big-endian

2025-07-07 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:69c839c7361430ec27d1f13f909531b872588f27

commit r16-2050-g69c839c7361430ec27d1f13f909531b872588f27
Author: Richard Sandiford 
Date:   Mon Jul 7 09:10:37 2025 +0100

aarch64: Fix neon-sve-bridge.c failures for big-endian

Lowpart subregs are generally disallowed on big-endian SVE vector
registers, since the first memory element is stored at the least
significant end of the register, rather than the most significant end.
(See the comment at the head of aarch64-sve.md for details,
and aarch64_modes_compatible_p for the implementation.)

This means that arm_sve_neon_bridge.h needs to use custom define_insns
for big-endian targets, in lieu of using lowpart subregs.  However,
one of those define_insns relied on the prohibited lowparts internally,
to convert an Advanced SIMD register to an SVE register.  Since the
lowpart is not allowed, the lowpart_subreg would return null, leading
to a later ICE.

The simplest fix seems to be to use %Z instead, to force the Advanced
SIMD register to be written as an SVE register.

gcc/
* config/aarch64/aarch64-sve.md (@aarch64_sve_set_neonq_):
Use %Z instead of lowpart_subreg.  Tweak formatting.

Diff:
---
 gcc/config/aarch64/aarch64-sve.md | 16 ++--
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-sve.md 
b/gcc/config/aarch64/aarch64-sve.md
index 4aecb3a6bf8a..87ae4cb0402f 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -11437,16 +11437,12 @@
 
 (define_insn "@aarch64_sve_set_neonq_"
   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
-  (unspec:SVE_FULL
-   [(match_operand:SVE_FULL 1 "register_operand" "w")
-   (match_operand: 2 "register_operand" "w")
-   (match_operand: 3 "register_operand" "Upl")]
-   UNSPEC_SET_NEONQ))]
+   (unspec:SVE_FULL
+ [(match_operand:SVE_FULL 1 "register_operand" "w")
+  (match_operand: 2 "register_operand" "w")
+  (match_operand: 3 "register_operand" "Upl")]
+ UNSPEC_SET_NEONQ))]
   "TARGET_SVE
&& BYTES_BIG_ENDIAN"
-  {
-operands[2] = lowpart_subreg (mode, operands[2],
-  GET_MODE (operands[2]));
-return "sel\t%0., %3, %2., %1.";
-  }
+  "sel\t%0., %3, %Z2., %1."
 )


[gcc r16-2052] vect: Fix VEC_WIDEN_PLUS_HI/LO choice for big-endian [PR118891]

2025-07-07 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:ec54a14239b12d03c600c14f3ce9710e65cd33f1

commit r16-2052-gec54a14239b12d03c600c14f3ce9710e65cd33f1
Author: Richard Sandiford 
Date:   Mon Jul 7 09:10:38 2025 +0100

vect: Fix VEC_WIDEN_PLUS_HI/LO choice for big-endian [PR118891]

In the tree codes and optabs, the "hi" in a vector hi/lo pair means
"most significant" and the "lo" means "least significant", with
sigificance following GCC's normal endian expectations.  Thus on
big-endian targets, the hi part handles the first half of the elements
in memory order and the lo part handles the second half.

For tree codes, supportable_widening_operation first chooses hi/lo
pairs based on little-endian order and then uses:

  if (BYTES_BIG_ENDIAN && c1 != VEC_WIDEN_MULT_EVEN_EXPR)
std::swap (c1, c2);

to adjust.  However, the handling for internal functions was missing
an equivalent fixup.  This led to several execution failures in vect.exp
on aarch64_be-elf.

If the hi/lo code fails, the internal function handling goes on to try
even/odd.  But I couldn't see anything obvious that would put the even/
odd results back into the right order later, so there might be a latent
bug there too.

gcc/
PR tree-optimization/118891
* tree-vect-stmts.cc (supportable_widening_operation): Swap the
hi and lo internal functions on big-endian targets.

Diff:
---
 gcc/tree-vect-stmts.cc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index 95406b4e3a3c..5767a351fdf9 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -14410,6 +14410,8 @@ supportable_widening_operation (vec_info *vinfo,
 
   internal_fn lo, hi, even, odd;
   lookup_hilo_internal_fn (ifn, &lo, &hi);
+  if (BYTES_BIG_ENDIAN)
+   std::swap (lo, hi);
   *code1 = as_combined_fn (lo);
   *code2 = as_combined_fn (hi);
   optab1 = direct_internal_fn_optab (lo, {vectype, vectype});


[gcc r16-2045] fortran: Add the preliminary code of MOVE_ALLOC arguments

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:849878d4fd40ad4ac2bff9a7bfe50176051d7176

commit r16-2045-g849878d4fd40ad4ac2bff9a7bfe50176051d7176
Author: Mikael Morin 
Date:   Mon Jul 7 09:03:03 2025 +0200

fortran: Add the preliminary code of MOVE_ALLOC arguments

Add the preliminary code produced for the evaluation of the FROM and TO
arguments of the MOVE_ALLOC intrinsic before using their values.
Before this change, the preliminary code was ignored and dropped,
limiting the validity of the implementation of MOVE_ALLOC to simple
cases without preliminary code.

This change also adds the cleanup code of the same arguments.  It
doesn't make any difference on the testcase though.  Because of the
limited set of arguments that are allowed (variables or components
without subreference), it is possible that the cleanup code is actually
guaranteed to be empty.  At least adding the cleanup code makes the
array case consistent with the scalar case.

gcc/fortran/ChangeLog:

* trans-intrinsic.cc (conv_intrinsic_move_alloc): Add pre and
post code for the FROM and TO arguments.

gcc/testsuite/ChangeLog:

* gfortran.dg/move_alloc_20.f03: New test.

Diff:
---
 gcc/fortran/trans-intrinsic.cc  |   5 +
 gcc/testsuite/gfortran.dg/move_alloc_20.f03 | 151 
 2 files changed, 156 insertions(+)

diff --git a/gcc/fortran/trans-intrinsic.cc b/gcc/fortran/trans-intrinsic.cc
index f1bfd3eee510..be984271d6a8 100644
--- a/gcc/fortran/trans-intrinsic.cc
+++ b/gcc/fortran/trans-intrinsic.cc
@@ -13101,6 +13101,8 @@ conv_intrinsic_move_alloc (gfc_code *code)
 }
   gfc_conv_expr_descriptor (&to_se, to_expr);
   gfc_conv_expr_descriptor (&from_se, from_expr);
+  gfc_add_block_to_block (&block, &to_se.pre);
+  gfc_add_block_to_block (&block, &from_se.pre);
 
   /* For coarrays, call SYNC ALL if TO is already deallocated as MOVE_ALLOC
  is an image control "statement", cf. IR F08/0040 in 12-006A.  */
@@ -13174,6 +13176,9 @@ conv_intrinsic_move_alloc (gfc_code *code)
   if (fin_label)
 gfc_add_expr_to_block (&block, build1_v (LABEL_EXPR, fin_label));
 
+  gfc_add_block_to_block (&block, &to_se.post);
+  gfc_add_block_to_block (&block, &from_se.post);
+
   return gfc_finish_block (&block);
 }
 
diff --git a/gcc/testsuite/gfortran.dg/move_alloc_20.f03 
b/gcc/testsuite/gfortran.dg/move_alloc_20.f03
new file mode 100644
index ..20403c300287
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/move_alloc_20.f03
@@ -0,0 +1,151 @@
+! { dg-do run }
+!
+! Check the presence of the pre and post code of the FROM and TO arguments
+! of the MOVE_ALLOC intrinsic subroutine.
+
+module m
+  implicit none
+  type :: t
+integer, allocatable :: a(:)
+  end type
+end module 
+
+module pre
+  use m
+  implicit none
+  private
+  public :: check_pre
+
+contains
+
+  subroutine check_pre
+integer, parameter :: n = 5
+type(t) :: x(n)
+integer, allocatable :: tmp(:)
+integer :: array(4) = [ -1, 0, 1, 2 ]
+integer :: i
+
+if (allocated(tmp)) error stop 1
+
+tmp = [17]
+
+if (.not. allocated(tmp)) error stop 11
+if (any(shape(tmp) /= [1])) error stop 12
+if (any(tmp /= [17])) error stop 13
+do i=1,n
+  if (allocated(x(i)%a)) error stop 14
+end do
+
+! Check that the index of X is properly computed for the evaluation of TO.
+call move_alloc(tmp, x(sum(array))%a)
+
+do i=1,n
+  if (i == 2) cycle
+  if (allocated(x(i)%a)) error stop 21
+end do
+if (.not. allocated(x(2)%a)) error stop 22
+if (any(shape(x(2)%a) /= [1])) error stop 23
+if (any(x(2)%a /= [17])) error stop 24
+if (allocated(tmp)) error stop 25
+
+! Check that the index of X is properly computed for the evaluation of 
FROM.
+call move_alloc(x(sum(array))%a, tmp)
+
+if (.not. allocated(tmp)) error stop 31
+if (any(shape(tmp) /= [1])) error stop 32
+if (any(tmp /= [17])) error stop 33
+do i=1,n
+  if (allocated(x(i)%a)) error stop 34
+end do
+  end subroutine
+
+end module
+
+module post
+  use m
+  implicit none
+  private
+  public :: check_post
+  integer, parameter :: n = 5
+  type(t), target :: x(n)
+  type :: u
+integer :: a
+  contains
+final :: finalize
+  end type
+  integer :: finalization_count = 0
+
+contains
+
+  function idx(arg)
+type(u) :: arg
+integer :: idx
+idx = mod(arg%a, n)
+  end function
+
+  subroutine check_post
+type(u) :: y
+integer, allocatable :: tmp(:)
+integer, target :: array(4) = [ -1, 0, 1, 2 ]
+integer :: i
+
+y%a = 12
+
+if (allocated(tmp)) error stop 1
+
+tmp = [37]
+
+if (.not. allocated(tmp)) error stop 11
+if (any(shape(tmp) /= [1])) error stop 12
+if (any(tmp /= [37])) error stop 13
+if (finalization_count /= 0) error stop 14
+do i=1,n
+  if (allocated(x(i)%a)) error stop 15
+end do
+
+! Check that the cleanup code for the

[gcc r12-11254] Revert "c++: Fix a pasto in the PR120471 fix [PR120940]"

2025-07-07 Thread Jakub Jelinek via Gcc-cvs
https://gcc.gnu.org/g:1d577bebe14c506713aee95080b8550a777586ba

commit r12-11254-g1d577bebe14c506713aee95080b8550a777586ba
Author: Jakub Jelinek 
Date:   Mon Jul 7 09:51:38 2025 +0200

Revert "c++: Fix a pasto in the PR120471 fix [PR120940]"

This reverts commit ed950a9ed384389ff07ac793b7065abe31bcae3f.

Diff:
---
 gcc/cp/typeck.cc  |  2 +-
 gcc/testsuite/g++.dg/parse/pr120940.C | 18 --
 gcc/testsuite/g++.dg/warn/Wduplicated-branches9.C | 11 ---
 3 files changed, 1 insertion(+), 30 deletions(-)

diff --git a/gcc/cp/typeck.cc b/gcc/cp/typeck.cc
index 2f67bb33ff04..19dfaf18928f 100644
--- a/gcc/cp/typeck.cc
+++ b/gcc/cp/typeck.cc
@@ -3814,7 +3814,7 @@ cp_build_array_ref (location_t loc, tree array, tree idx,
   tree op0, op1, op2;
   op0 = TREE_OPERAND (array, 0);
   op1 = TREE_OPERAND (array, 1);
-  op2 = TREE_OPERAND (array, 2);
+  op2 = TREE_OPERAND (array, 1);
   if (TREE_SIDE_EFFECTS (idx) || !tree_invariant_p (idx))
{
  /* If idx could possibly have some SAVE_EXPRs, turning
diff --git a/gcc/testsuite/g++.dg/parse/pr120940.C 
b/gcc/testsuite/g++.dg/parse/pr120940.C
deleted file mode 100644
index 5da36b2f88a0..
--- a/gcc/testsuite/g++.dg/parse/pr120940.C
+++ /dev/null
@@ -1,18 +0,0 @@
-// PR c++/120940
-// { dg-do run }
-
-int a[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
-int b[8] = { 9, 10, 11, 12, 13, 14, 15, 16 };
-
-__attribute__((noipa)) int
-foo (int x, int y)
-{
-  return (x ? a : b)[y];
-}
-
-int
-main ()
-{
-  if (foo (1, 4) != 5 || foo (0, 6) != 15)
-__builtin_abort ();
-}
diff --git a/gcc/testsuite/g++.dg/warn/Wduplicated-branches9.C 
b/gcc/testsuite/g++.dg/warn/Wduplicated-branches9.C
deleted file mode 100644
index f9fafcd467b4..
--- a/gcc/testsuite/g++.dg/warn/Wduplicated-branches9.C
+++ /dev/null
@@ -1,11 +0,0 @@
-// PR c++/120940
-// { dg-do compile }
-// { dg-options "-Wduplicated-branches" }
-
-static char a[16][8], b[16][8];
-
-char *
-foo (int x, int y)
-{
-  return (x ? a : b)[y];
-}


[gcc(refs/vendors/redhat/heads/gcc-15-branch)] Merge commit 'r15-9932-gf8f6879ae1eba077c5a2a4a743b21a81a23ee39c' into redhat/gcc-15-branch

2025-07-07 Thread Jakub Jelinek via Gcc-cvs
https://gcc.gnu.org/g:c138e88e24a87a165b741b7c6e3452a430aca820

commit c138e88e24a87a165b741b7c6e3452a430aca820
Merge: b9def1721b12 f8f6879ae1eb
Author: Jakub Jelinek 
Date:   Mon Jul 7 11:46:51 2025 +0200

Merge commit 'r15-9932-gf8f6879ae1eba077c5a2a4a743b21a81a23ee39c' into 
redhat/gcc-15-branch

Diff:

 gcc/ChangeLog  | 417 ++
 gcc/DATESTAMP  |   2 +-
 gcc/ada/ChangeLog  | 468 +++
 gcc/ada/checks.adb |  15 +-
 gcc/ada/contracts.adb  | 103 +--
 gcc/ada/doc/gnat_rm/gnat_language_extensions.rst   | 156 ++--
 .../gnat_rm/implementation_defined_attributes.rst  |   6 +-
 .../building_executable_programs_with_gnat.rst |  17 +-
 .../doc/gnat_ugn/gnat_and_program_execution.rst|  59 +-
 gcc/ada/einfo.ads  |   2 +-
 gcc/ada/exp_aggr.adb   | 535 +++-
 gcc/ada/exp_attr.adb   |  86 +-
 gcc/ada/exp_ch3.adb|  15 +-
 gcc/ada/exp_ch4.adb| 108 ++-
 gcc/ada/exp_ch5.adb|  24 +-
 gcc/ada/exp_ch6.adb| 121 +--
 gcc/ada/exp_ch7.adb| 221 ++---
 gcc/ada/exp_put_image.adb  |  55 +-
 gcc/ada/exp_util.adb   | 667 ---
 gcc/ada/exp_util.ads   |  38 +-
 gcc/ada/freeze.adb |  94 ++-
 gcc/ada/gcc-interface/Makefile.in  |  30 -
 gcc/ada/gcc-interface/decl.cc  |  16 +-
 gcc/ada/gcc-interface/trans.cc |  79 +-
 gcc/ada/gcc-interface/utils.cc |   4 +-
 gcc/ada/gnat_rm.texi   | 271 +++---
 gcc/ada/gnat_ugn.texi  | 102 ++-
 gcc/ada/libgnarl/s-stusta.adb  |   5 +-
 gcc/ada/libgnat/system-linux-loongarch.ads |   1 -
 gcc/ada/mutably_tagged.adb |  60 +-
 gcc/ada/sem_aggr.adb   |  10 +-
 gcc/ada/sem_attr.adb   |   5 +-
 gcc/ada/sem_case.adb   |   8 +-
 gcc/ada/sem_ch10.adb   |   2 +
 gcc/ada/sem_ch12.adb   |  15 +-
 gcc/ada/sem_ch13.adb   |   1 +
 gcc/ada/sem_ch3.adb|  47 +-
 gcc/ada/sem_ch4.adb| 923 +++--
 gcc/ada/sem_ch6.adb|  13 +-
 gcc/ada/sem_ch6.ads|   5 +-
 gcc/ada/sem_eval.adb   |  11 +-
 gcc/ada/sem_prag.adb   |  26 +-
 gcc/ada/sem_res.adb|   2 +
 gcc/ada/sem_util.adb   | 140 +++-
 gcc/ada/sprint.adb |   4 +-
 gcc/ada/usage.adb  |  10 +-
 gcc/c/ChangeLog|  26 +
 gcc/c/c-parser.cc  |  89 +-
 gcc/cfgexpand.cc   |  68 +-
 gcc/config.gcc |  12 +-
 gcc/config/aarch64/aarch64-cores.def   |   2 +-
 gcc/config/aarch64/aarch64-sme.md  |   2 +
 gcc/config/aarch64/aarch64.md  |   8 +
 gcc/config/avr/avr-mcus.def|  11 +
 gcc/config/avr/avr.md  |  35 +
 gcc/config/i386/driver-i386.cc |   2 +-
 gcc/config/i386/i386.cc|  10 +-
 gcc/config/i386/i386.h |   8 +-
 gcc/config/microblaze/microblaze.cc|   4 +
 gcc/config/riscv/bitmanip.md   |  59 +-
 gcc/config/riscv/riscv.md  |  37 +-
 gcc/cp/ChangeLog   | 104 +++
 gcc/cp/constexpr.cc|  13 +-
 gcc/cp/cp-gimplify.cc  |  21 +-
 gcc/cp/decl2.cc|  36 +-
 gcc/cp/lambda.cc   |   5 +-
 gcc/cp/module.cc   |   3 +-
 gcc/cp/parser.cc   |  18 +-
 gcc/cp/semantics.cc|   8 +-
 gcc/cp/typeck.cc   | 130 ++-
 gcc/dfp.cc |  79 +-
 gcc/doc/avr-mmcu.texi  |   6 +-
 gcc/doc/extend.texi|   6 +-
 gcc/doc/gcov.texi  |   2 +-
 gcc/doc/install.texi   |  10 +-
 gcc/doc/invoke.texi  

[gcc r12-11256] testsuite, Darwin: Remove an unnecessary flags addition.

2025-07-07 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:3290af072f4c6798988e8325084cd0e969ad28d8

commit r12-11256-g3290af072f4c6798988e8325084cd0e969ad28d8
Author: Iain Sandoe 
Date:   Sun Jun 19 20:47:43 2022 +0100

testsuite, Darwin: Remove an unnecessary flags addition.

The addition of the multiply_defined suppress flag has been handled for some
considerable time now in the Darwin specs; remove it from the testsuite 
libs.
Avoid duplicates in the specs.

Signed-off-by: Iain Sandoe 

gcc/ChangeLog:

* config/darwin.h: Avoid duplicate multiply_defined specs on
earlier Darwin versions with shared libgcc.

libstdc++-v3/ChangeLog:

* testsuite/lib/libstdc++.exp: Remove additional flag handled
by Darwin specs.

gcc/testsuite/ChangeLog:

* lib/g++.exp: Remove additional flag handled by Darwin specs.
* lib/obj-c++.exp: Likewise.

(cherry picked from commit 3c776fdf1a825818ad7248d442e846f532574ff7)

Diff:
---
 gcc/config/darwin.h  | 3 +--
 gcc/testsuite/lib/g++.exp| 4 
 gcc/testsuite/lib/obj-c++.exp| 4 
 libstdc++-v3/testsuite/lib/libstdc++.exp | 3 ---
 4 files changed, 1 insertion(+), 13 deletions(-)

diff --git a/gcc/config/darwin.h b/gcc/config/darwin.h
index a967f7bb814f..23708861166b 100644
--- a/gcc/config/darwin.h
+++ b/gcc/config/darwin.h
@@ -217,8 +217,7 @@ extern GTY(()) int darwin_ms_struct;
   "%{image_base*:-Xlinker -image_base -Xlinker %*} %

[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] fortran: generate array reallocation out of loops

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:ab0564fe6bd461b20c1f430fc3b8f3447270299a

commit ab0564fe6bd461b20c1f430fc3b8f3447270299a
Author: Mikael Morin 
Date:   Sun Jul 6 16:56:16 2025 +0200

fortran: generate array reallocation out of loops

Generate the array reallocation on assignment code before entering the
scalarization loops.  This doesn't move the generated code itself,
which was already put out of the outermost loop, but only changes the
current scope at the time the code is generated.  This is a prerequisite
for a followup patch that makes the reallocation code create new
variables.  Without this change the new variables would be declared in
the innermost loop body and couldn't be used outside of it.

gcc/fortran/ChangeLog:

* trans-expr.cc (gfc_trans_assignment_1): Generate array
reallocation code before entering the scalarisation loops.

Diff:
---
 gcc/fortran/trans-expr.cc | 20 +++-
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index 3e0d763d2fb0..65d0ee4ff235 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -12943,6 +12943,7 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
   rhs_caf_attr = gfc_caf_attr (expr2, false, &rhs_refs_comp);
 }
 
+  tree reallocation = NULL_TREE;
   if (lss != gfc_ss_terminator)
 {
   /* The assignment needs scalarization.  */
@@ -13011,6 +13012,14 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
  ompws_flags |= OMPWS_SCALARIZER_WS | OMPWS_SCALARIZER_BODY;
}
 
+  /* F2003: Allocate or reallocate lhs of allocatable array.  */
+  if (realloc_flag)
+   {
+ realloc_lhs_warning (expr1->ts.type, true, &expr1->where);
+ ompws_flags &= ~OMPWS_SCALARIZER_WS;
+ reallocation = gfc_alloc_allocatable_for_assignment (&loop, expr1, 
expr2);
+   }
+
   /* Start the scalarized loop body.  */
   gfc_start_scalarized_body (&loop, &body);
 }
@@ -13319,15 +13328,8 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
  gfc_add_expr_to_block (&body, tmp);
}
 
-  /* F2003: Allocate or reallocate lhs of allocatable array.  */
-  if (realloc_flag)
-   {
- realloc_lhs_warning (expr1->ts.type, true, &expr1->where);
- ompws_flags &= ~OMPWS_SCALARIZER_WS;
- tmp = gfc_alloc_allocatable_for_assignment (&loop, expr1, expr2);
- if (tmp != NULL_TREE)
-   gfc_add_expr_to_block (&loop.code[expr1->rank - 1], tmp);
-   }
+  if (reallocation != NULL_TREE)
+   gfc_add_expr_to_block (&loop.code[loop.dimen - 1], reallocation);
 
   if (maybe_workshare)
ompws_flags &= ~OMPWS_SCALARIZER_BODY;


[gcc] Deleted branch 'mikael/heads/stabilisation_descriptor_v01' in namespace 'refs/users'

2025-07-07 Thread Mikael Morin via Gcc-cvs
The branch 'mikael/heads/stabilisation_descriptor_v01' in namespace 
'refs/users' was deleted.
It previously pointed to:

 d008ebc84597... Sauvegarde data

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  d008ebc... Sauvegarde data
  16b3009... Déplacement variables après réallocation
  ab0564f... fortran: generate array reallocation out of loops


[gcc] Created branch 'mikael/heads/stabilisation_descriptor_v01' in namespace 'refs/users'

2025-07-07 Thread Mikael Morin via Gcc-cvs
The branch 'mikael/heads/stabilisation_descriptor_v01' was created in namespace 
'refs/users' pointing to:

 e9481e8a6a16... Essai simplification évaluation


[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Déplacement variables après réallocation

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:fd4776523c47f54afa8cc8cc82f7876059837e91

commit fd4776523c47f54afa8cc8cc82f7876059837e91
Author: Mikael Morin 
Date:   Mon Jul 7 11:46:08 2025 +0200

Déplacement variables après réallocation

Sauvegarde data

Renommage nom fonction.

Diff:
---
 gcc/fortran/gfortran.h |   4 --
 gcc/fortran/trans-array.cc | 167 ++---
 gcc/fortran/trans-expr.cc  |  14 ++--
 3 files changed, 102 insertions(+), 83 deletions(-)

diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h
index 6848bd1762d3..69367e638c5b 100644
--- a/gcc/fortran/gfortran.h
+++ b/gcc/fortran/gfortran.h
@@ -2028,10 +2028,6 @@ typedef struct gfc_symbol
   /* Set if this should be passed by value, but is not a VALUE argument
  according to the Fortran standard.  */
   unsigned pass_as_value:1;
-  /* Set if an allocatable array variable has been allocated in the current
- scope. Used in the suppression of uninitialized warnings in reallocation
- on assignment.  */
-  unsigned allocated_in_scope:1;
   /* Set if an external dummy argument is called with different argument lists.
  This is legal in Fortran, but can cause problems with autogenerated
  C prototypes for C23.  */
diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 7be2d7b11a62..3cd6d90f47e7 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -3420,6 +3420,23 @@ gfc_add_loop_ss_code (gfc_loopinfo * loop, gfc_ss * ss, 
bool subscript,
 }
 
 
+/* Given an array descriptor expression DESCR and its data pointer DATA, decide
+   whether to either save the data pointer to a variable and use the variable 
or
+   use the data pointer expression directly without any intermediary variable.
+   */
+
+static bool
+save_descriptor_data (tree descr, tree data)
+{
+  return !(DECL_P (data)
+  || (TREE_CODE (data) == ADDR_EXPR
+  && DECL_P (TREE_OPERAND (data, 0)))
+  || (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (descr))
+  && TREE_CODE (descr) == COMPONENT_REF
+  && GFC_CLASS_TYPE_P (TREE_TYPE (TREE_OPERAND (descr, 0);
+}
+
+
 /* Translate expressions for the descriptor and data pointer of a SS.  */
 /*GCC ARRAYS*/
 
@@ -3466,17 +3483,14 @@ gfc_conv_ss_descriptor (stmtblock_t * block, gfc_ss * 
ss, int base)
  Otherwise we must evaluate it now to avoid breaking dependency
 analysis by pulling the expressions for elemental array indices
 inside the loop.  */
-  if (!(DECL_P (tmp)
-   || (TREE_CODE (tmp) == ADDR_EXPR
-   && DECL_P (TREE_OPERAND (tmp, 0)))
-   || (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (se.expr))
-   && TREE_CODE (se.expr) == COMPONENT_REF
-   && GFC_CLASS_TYPE_P (TREE_TYPE (TREE_OPERAND (se.expr, 0))
+  if (save_descriptor_data (se.expr, tmp) && !ss->is_alloc_lhs)
tmp = gfc_evaluate_now (tmp, block);
   info->data = tmp;
 
   tmp = gfc_conv_array_offset (se.expr);
-  info->offset = gfc_evaluate_now (tmp, block);
+  if (!ss->is_alloc_lhs)
+   tmp = gfc_evaluate_now (tmp, block);
+  info->offset = tmp;
 
   /* Make absolutely sure that the saved_offset is indeed saved
 so that the variable is still accessible after the loops
@@ -4769,13 +4783,12 @@ gfc_trans_scalarized_loop_boundary (gfc_loopinfo * 
loop, stmtblock_t * body)
 
 static void
 evaluate_bound (stmtblock_t *block, tree *bounds, gfc_expr ** values,
-   tree desc, int dim, bool lbound, bool deferred)
+   tree desc, int dim, bool lbound, bool deferred, bool save_value)
 {
   gfc_se se;
   gfc_expr * input_val = values[dim];
   tree *output = &bounds[dim];
 
-
   if (input_val)
 {
   /* Specified section bound.  */
@@ -4801,7 +4814,8 @@ evaluate_bound (stmtblock_t *block, tree *bounds, 
gfc_expr ** values,
   *output = lbound ? gfc_conv_array_lbound (desc, dim) :
 gfc_conv_array_ubound (desc, dim);
 }
-  *output = gfc_evaluate_now (*output, block);
+  if (save_value)
+*output = gfc_evaluate_now (*output, block);
 }
 
 
@@ -4834,18 +4848,18 @@ gfc_conv_section_startstride (stmtblock_t * block, 
gfc_ss * ss, int dim)
  || ar->dimen_type[dim] == DIMEN_THIS_IMAGE);
   desc = info->descriptor;
   stride = ar->stride[dim];
-
+  bool save_value = !ss->is_alloc_lhs;
 
   /* Calculate the start of the range.  For vector subscripts this will
  be the range of the vector.  */
   evaluate_bound (block, info->start, ar->start, desc, dim, true,
- ar->as->type == AS_DEFERRED);
+ ar->as->type == AS_DEFERRED, save_value);
 
   /* Similarly calculate the end.  Although this is not used in the
  scalarizer, it is needed when checking bounds and where the end
  is an expression with side-effects.  */
   evaluate_bound (block, info->end, ar->end, desc, dim, false,
- ar->as->type == AS_DEFERRED);
+

[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Essai simplification évaluation

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:e9481e8a6a16cf5bdc85a1519da5943c2946fc4e

commit e9481e8a6a16cf5bdc85a1519da5943c2946fc4e
Author: Mikael Morin 
Date:   Mon Jul 7 14:50:14 2025 +0200

Essai simplification évaluation

Diff:
---
 gcc/fortran/trans-array.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index abf535cdaedb..832db1c3df4e 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -11380,7 +11380,7 @@ update_reallocated_descriptor (stmtblock_t *block, 
gfc_loopinfo *loop)
 #define UPDATE_VALUE(field, value) \
  do \
{ \
- if ((field) && VAR_P ((field))) \
+ if (false && (field) && VAR_P ((field))) \
{ \
  tree val = (value); \
  gfc_add_modify (block, (field), val); \


[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Ajout commentaire

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:b0bcdcaf3cca79ff4e9285edaece7575de45f564

commit b0bcdcaf3cca79ff4e9285edaece7575de45f564
Author: Mikael Morin 
Date:   Mon Jul 7 14:38:51 2025 +0200

Ajout commentaire

Diff:
---
 gcc/fortran/trans-array.cc | 13 +
 1 file changed, 13 insertions(+)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 3cd6d90f47e7..abf535cdaedb 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -11352,6 +11352,19 @@ concat_str_length (gfc_expr* expr)
 }
 
 
+/* Among the scalarization chain of LOOP, find the element associated with an
+   allocatable array on the lhs of an assignment and evaluate its fields
+   (bounds, offset, etc) to new variables, putting the new code in BLOCK.  This
+   function is to be called after putting the reallocation code in BLOCK and
+   before the beginning of the scalarization loop body.
+
+   The fields to be saved are expected to hold on entry to the function
+   expressions referencing the array descriptor.  Especially the expressions
+   shouldn't be already temporary variable references as the value saved before
+   reallocation would be incorrect after reallocation.
+   At the end of the function, the expressions have been replaced with variable
+   references.  */
+
 static void
 update_reallocated_descriptor (stmtblock_t *block, gfc_loopinfo *loop)
 {


[gcc r16-2065] c++: -Wno-abbreviated-auto-in-template-arg [PR120917]

2025-07-07 Thread Jason Merrill via Gcc-cvs
https://gcc.gnu.org/g:8abc2e66be72a34db8c3cc97e4fbd90b7abae61d

commit r16-2065-g8abc2e66be72a34db8c3cc97e4fbd90b7abae61d
Author: Jason Merrill 
Date:   Wed Jul 2 05:15:01 2025 -0400

c++: -Wno-abbreviated-auto-in-template-arg [PR120917]

In r14-1659 I added a missing error for a Concepts TS feature that we were
failing to diagnose, but this PR requests a way to disable that error for
code written thinking it was valid.  Which seems reasonable, since it
doesn't require any work beyond that and is a plausible extension by itself.

While looking at this, I also noticed we were still not giving the
diagnostic in a few cases, and fixing that affected a few of our old
concepts testcases.

PR c++/120917

gcc/ChangeLog:

* doc/invoke.texi: Add -Wno-abbreviated-auto-in-template-arg.

gcc/c-family/ChangeLog:

* c.opt: Add -Wno-abbreviated-auto-in-template-arg.
* c.opt.urls: Regenerate.

gcc/cp/ChangeLog:

* parser.cc (cp_parser_simple_type_specifier): Attach
auto in targ in parameter to -Wabbreviated-auto-in-template-arg.
(cp_parser_placeholder_type_specifier): Diagnose constrained auto in
template arg.

gcc/testsuite/ChangeLog:

* g++.dg/concepts/auto7a.C: Add diagnostic.
* g++.dg/concepts/auto7b.C: New test.
* g++.dg/concepts/auto7c.C: New test.
* g++.dg/cpp1y/pr85076.C: Expect 'auto' error.
* g++.dg/concepts/pr67249.C: Likewise.
* g++.dg/cpp1y/lambda-generic-variadic.C: Likewise.
* g++.dg/cpp2a/concepts-pr67210.C: Likewise.
* g++.dg/concepts/pr67249a.C: New test.
* g++.dg/cpp1y/lambda-generic-variadic-a.C: New test.
* g++.dg/cpp2a/concepts-pr67210a.C: New test.

Diff:
---
 gcc/doc/invoke.texi| 18 ++
 gcc/c-family/c.opt |  4 
 gcc/cp/parser.cc   | 12 +---
 gcc/testsuite/g++.dg/concepts/auto7a.C |  1 +
 gcc/testsuite/g++.dg/concepts/auto7b.C | 10 ++
 gcc/testsuite/g++.dg/concepts/auto7c.C | 12 
 gcc/testsuite/g++.dg/concepts/pr67249.C|  2 +-
 gcc/testsuite/g++.dg/concepts/pr67249a.C   |  7 +++
 gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic-a.C | 15 +++
 gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic.C   |  4 ++--
 gcc/testsuite/g++.dg/cpp1y/pr85076.C   |  2 +-
 gcc/testsuite/g++.dg/cpp2a/concepts-pr67210.C  |  2 +-
 gcc/testsuite/g++.dg/cpp2a/concepts-pr67210a.C | 11 +++
 gcc/c-family/c.opt.urls|  3 +++
 14 files changed, 95 insertions(+), 8 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 7640e7d88671..74f5ee26042d 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -3816,6 +3816,23 @@ Warn when a type with an ABI tag is used in a context 
that does not
 have that ABI tag.  See @ref{C++ Attributes} for more information
 about ABI tags.
 
+@opindex Wabbreviated-auto-in-template-arg
+@opindex Wno-abbreviated-auto-in-template-arg
+@item -Wno-abbreviated-auto-in-template-arg
+Disable the error for an @code{auto} placeholder type used within a
+template argument list to declare a C++20 abbreviated function
+template, e.g.
+
+@smallexample
+void f(S);
+@end smallexample
+
+This feature was proposed in the Concepts TS, but was not adopted into
+C++20; in the standard, a placeholder in a parameter declaration must
+appear as a decl-specifier.  The error can also be reduced to a
+warning by @option{-fpermissive} or
+@option{-Wno-error=abbreviated-auto-in-template-arg}.
+
 @opindex Wcomma-subscript
 @opindex Wno-comma-subscript
 @item -Wcomma-subscript @r{(C++ and Objective-C++ only)}
@@ -6443,6 +6460,7 @@ only by this flag, but it also downgrades some C and C++ 
diagnostics
 that have their own flag:
 
 @gccoptlist{
+-Wabbreviated-auto-in-template-arg @r{(C++ and Objective-C++ only)}
 -Wdeclaration-missing-parameter-type @r{(C and Objective-C only)}
 -Wimplicit-function-declaration @r{(C and Objective-C only)}
 -Wimplicit-int @r{(C and Objective-C only)}
diff --git a/gcc/c-family/c.opt b/gcc/c-family/c.opt
index 8af466d1ed1f..6a55e7118d12 100644
--- a/gcc/c-family/c.opt
+++ b/gcc/c-family/c.opt
@@ -397,6 +397,10 @@ Wassign-intercept
 ObjC ObjC++ Var(warn_assign_intercept) Warning
 Warn whenever an Objective-C assignment is being intercepted by the garbage 
collector.
 
+Wabbreviated-auto-in-template-arg
+C++ ObjC++ Warning Var(warn_abbev_auto_targ) Init(1)
+Diagnose a placeholder type in a template argument in a function parameter 
type.
+
 Wbad-function-cast
 C ObjC Var(warn_bad_function_cast) Warning
 Warn about casting functions to incompatible types.
diff --

[gcc r16-2061] RISC-V: Add test cases for unsigned scalar SAT_MUL from uint128_t

2025-07-07 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:65c40c0211f01579d1e7f259271cb79a8a19d533

commit r16-2061-g65c40c0211f01579d1e7f259271cb79a8a19d533
Author: Pan Li 
Date:   Wed Jul 2 10:52:25 2025 +0800

RISC-V: Add test cases for unsigned scalar SAT_MUL from uint128_t

Add run and tree-optimized check for unsigned scalar SAT_MUL from
uint128_t.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_arith_data.h: Add test data for
run test.
* gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-1-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-1-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u128.c: New test.

Signed-off-by: Pan Li 

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 23 
 .../gcc.target/riscv/sat/sat_arith_data.h  | 62 ++
 .../riscv/sat/sat_u_mul-1-u16-from-u128.c  | 11 
 .../riscv/sat/sat_u_mul-1-u32-from-u128.c  | 11 
 .../riscv/sat/sat_u_mul-1-u64-from-u128.c  | 11 
 .../riscv/sat/sat_u_mul-1-u8-from-u128.c   | 11 
 .../riscv/sat/sat_u_mul-run-1-u16-from-u128.c  | 16 ++
 .../riscv/sat/sat_u_mul-run-1-u32-from-u128.c  | 16 ++
 .../riscv/sat/sat_u_mul-run-1-u64-from-u128.c  | 16 ++
 .../riscv/sat/sat_u_mul-run-1-u8-from-u128.c   | 16 ++
 10 files changed, 193 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index 84f013ffa95e..3de89f47ae09 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -4,6 +4,8 @@
 #include 
 #include 
 
+typedef __uint128_t uint128_t;
+
 
/**/
 /* Saturation Add (unsigned and signed)   
*/
 
/**/
@@ -648,4 +650,25 @@ sat_s_trunc_##WT##_to_##NT##_fmt_8 (WT x) \
 #define RUN_SAT_S_TRUNC_FMT_8(NT, WT, x) sat_s_trunc_##WT##_to_##NT##_fmt_8 (x)
 #define RUN_SAT_S_TRUNC_FMT_8_WRAP(NT, WT, x) RUN_SAT_S_TRUNC_FMT_8(NT, WT, x)
 
+/**/
+/* Saturation Mult (unsigned and signed)  */
+/**/
+
+#define DEF_SAT_U_MUL_FMT_1(NT, WT) \
+NT __attribute__((noinline))\
+sat_u_mul_##NT##_from_##WT##_fmt_1 (NT a, NT b) \
+{   \
+  WT x = (WT)a * (WT)b; \
+  NT max = -1;  \
+  if (x > (WT)(max))\
+return max; \
+  else  \
+return (NT)x;   \
+}
+
+#define DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) DEF_SAT_U_MUL_FMT_1(NT, WT)
+#define RUN_SAT_U_MUL_FMT_1(NT, WT, a, b) \
+  sat_u_mul_##NT##_from_##WT##_fmt_1 (a, b)
+#define RUN_SAT_U_MUL_FMT_1_WRAP(NT, WT, a, b) RUN_SAT_U_MUL_FMT_1(NT, WT, a, 
b)
+
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith_data.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith_data.h
index f1006889d212..bd33ff1769a4 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith_data.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith_data.h
@@ -12,6 +12,7 @@
 
 #define TEST_BINARY_STRUCT_NAME(T, NAME) test_##T##_##NAME##_s
 #define TEST_BINARY_STRUCT_DECL(T, NAME) struct TEST_BINARY_STRUCT_NAME(T, 
NAME)
+#define TEST_BINARY_STRUCT_DECL_WRAP(T, NAME) TEST_BINARY_STRUCT_DECL(T, NAME)
 #define TEST_BINARY_STRUCT(T, NAME)   \
   struct TEST_BINARY_STRUCT_NAME(T, NAME) \
 { \
@@ -37,6 +38,11 @@ TEST_BINARY_STRUCT (uint16_t, usadd)
 TEST_BINARY_STRUCT (uint32_t, usadd)
 TEST_BINARY_STRUCT (uint64_t, usadd)
 
+TEST_BINARY_STRUCT (uint8_t, usmul)
+TEST_BINARY_STRUCT (uint16_t, usmul)
+TEST_BINARY_STRUCT (uint32_t, usmul)
+TEST_BINARY_STRUCT (uint64_t, usmul)
+
 TEST_BINARY_STRUCT (int8_t,  ssadd)
 TEST_BINARY_STRUCT (int16_t, ssadd)
 TEST_BINARY_STRUCT (int32_t, ssadd)
@@ -433,4 +439,60 @@ TEST_BINARY_STRUCT_DECL(int64_t, sssub) 
TEST_BINARY_DATA(int64_t, sssub)[] =
   {  9223372036854775806ll,   9223372036854775800ll,   6},
 };
 
+TEST_BINARY_STRUCT_DECL(uint8_t, usmul) TEST_BIN

[gcc r16-2060] RISC-V: Implement unsigned scalar SAT_MUL from uint128_t

2025-07-07 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:62b99e84b886fbdd70118cc260ae0f2516c2f3f5

commit r16-2060-g62b99e84b886fbdd70118cc260ae0f2516c2f3f5
Author: Pan Li 
Date:   Wed Jul 2 10:35:10 2025 +0800

RISC-V: Implement unsigned scalar SAT_MUL from uint128_t

This patch would like to implement the SAT_MUL scalar unsigned from
uint128_t, aka:

  NT __attribute__((noinline))
  sat_u_mul_##NT##_fmt_1 (NT a, NT b)
  {
uint128_t x = (uint128_t)a * (uint128_t)b;
NT max = -1;
if (x > (uint128_t)(max))
  return max;
else
  return (NT)x;
  }

Take uint64_t and uint8_t as example:

Before this patch for uint8_t:
  10   │ sat_u_mul_uint8_t_from_uint128_t_fmt_1:
  11   │ mulhu   a5,a0,a1
  12   │ mul a0,a0,a1
  13   │ bne a5,zero,.L3
  14   │ li  a5,255
  15   │ bleua0,a5,.L4
  16   │ .L3:
  17   │ li  a0,255
  18   │ .L4:
  19   │ andia0,a0,0xff
  20   │ ret

After this patch for uint8_t:
  10   │ sat_u_mul_uint8_t_from_uint128_t_fmt_1:
  11   │ mul a0,a0,a1
  12   │ li  a5,255
  13   │ sltua5,a5,a0
  14   │ neg a5,a5
  15   │ or  a0,a0,a5
  16   │ andia0,a0,0xff
  17   │ ret

Before this patch for uint64_t:
  10   │ sat_u_mul_uint64_t_from_uint128_t_fmt_1:
  11   │ mulhu   a5,a0,a1
  12   │ mul a0,a0,a1
  13   │ beq a5,zero,.L4
  14   │ li  a0,-1
  15   │ .L4:
  16   │ ret

After this patch for uint64_t:
  10   │ sat_u_mul_uint64_t_from_uint128_t_fmt_1:
  11   │ mulhsu  a5,a1,a0
  12   │ mul a0,a0,a1
  13   │ sneza5,a5
  14   │ neg a5,a5
  15   │ or  a0,a0,a5
  16   │ ret

gcc/ChangeLog:

* config/riscv/riscv-protos.h (riscv_expand_usmul): Add new func
decl.
* config/riscv/riscv.cc (riscv_expand_xmode_usmul): Add new func
to expand Xmode SAT_MUL.
(riscv_expand_non_xmode_usmul): Ditto but for non-Xmode.
(riscv_expand_usmul): Add new func to implment SAT_MUL.
* config/riscv/riscv.md (usmul3): Add new pattern to match
standard name usmul.

Signed-off-by: Pan Li 

Diff:
---
 gcc/config/riscv/riscv-protos.h |  1 +
 gcc/config/riscv/riscv.cc   | 82 +
 gcc/config/riscv/riscv.md   | 11 ++
 3 files changed, 94 insertions(+)

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index a0331204479f..38f63ea84248 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -137,6 +137,7 @@ extern void riscv_expand_usadd (rtx, rtx, rtx);
 extern void riscv_expand_ssadd (rtx, rtx, rtx);
 extern void riscv_expand_ussub (rtx, rtx, rtx);
 extern void riscv_expand_sssub (rtx, rtx, rtx);
+extern void riscv_expand_usmul (rtx, rtx, rtx);
 extern void riscv_expand_ustrunc (rtx, rtx);
 extern void riscv_expand_sstrunc (rtx, rtx);
 extern int riscv_register_move_cost (machine_mode, reg_class_t, reg_class_t);
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index ecdb61e18992..e09c189add92 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -13347,6 +13347,88 @@ riscv_expand_sssub (rtx dest, rtx x, rtx y)
   emit_move_insn (dest, gen_lowpart (mode, xmode_dest));
 }
 
+/* Implement the Xmode usmul.
+
+   b = SAT_MUL (a, b);
+   =>
+   _1 = a * b;
+   _2 = mulhu (a, b);
+   _overflow_p = _2 == 0;
+   _mask = - _overflow_p;
+   b = _1 | _mask;
+ */
+
+static void
+riscv_expand_xmode_usmul (rtx dest, rtx x, rtx y)
+{
+  machine_mode mode = GET_MODE (dest);
+
+  gcc_assert (mode == Xmode);
+
+  rtx mul = gen_reg_rtx (Xmode);
+  rtx mulhu = gen_reg_rtx (Xmode);
+  rtx overflow_p = gen_reg_rtx (Xmode);
+
+  riscv_emit_binary (MULT, mul, x, y);
+
+  if (TARGET_64BIT)
+emit_insn (gen_usmuldi3_highpart (mulhu, x, y));
+  else
+emit_insn (gen_usmulsi3_highpart (mulhu, x, y));
+
+  riscv_emit_binary (NE, overflow_p, mulhu, CONST0_RTX (Xmode));
+  riscv_emit_unary (NEG, overflow_p, overflow_p);
+  riscv_emit_binary (IOR, dest, mul, overflow_p);
+}
+
+/* Implement the non-Xmode usmul.
+
+   b = SAT_MUL (a, b);
+   =>
+   _1 = a * b;
+   _max = (T)-1
+   _overflow_p = _1 > _max;
+   _mask = - _overflow_p;
+   b = _1 | _mask;
+ */
+
+static void
+riscv_expand_non_xmode_usmul (rtx dest, rtx x, rtx y)
+{
+  machine_mode mode = GET_MODE (dest);
+  unsigned bitsize = GET_MODE_BITSIZE (mode).to_constant ();
+
+  gcc_assert (mode != Xmode);
+
+  rtx xmode_x = riscv_extend_to_xmode_reg (x, mode, ZERO_EXTEND);
+  rtx xmode_y = riscv_extend_to_xmode_reg (y, mode, ZERO_EXTEND);
+  rtx xmode_mul = gen_reg_rtx (Xmode);
+  rtx mul_max = gen_reg_rtx (Xmode);
+  rtx overflow_p = gen_reg_rtx (Xmode);
+
+  uint64_t max = ((uint64_t)1 << bitsize) - 1;
+
+  emit_mov

[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Déplacement variables après réallocation

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:1353289ab9ea814e9990b7aa1462fb032480063b

commit 1353289ab9ea814e9990b7aa1462fb032480063b
Author: Mikael Morin 
Date:   Mon Jul 7 11:46:08 2025 +0200

Déplacement variables après réallocation

Sauvegarde data

Renommage nom fonction.

Diff:
---
 gcc/fortran/gfortran.h |   4 --
 gcc/fortran/trans-array.cc | 167 ++---
 gcc/fortran/trans-expr.cc  |  14 ++--
 3 files changed, 102 insertions(+), 83 deletions(-)

diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h
index 6848bd1762d3..69367e638c5b 100644
--- a/gcc/fortran/gfortran.h
+++ b/gcc/fortran/gfortran.h
@@ -2028,10 +2028,6 @@ typedef struct gfc_symbol
   /* Set if this should be passed by value, but is not a VALUE argument
  according to the Fortran standard.  */
   unsigned pass_as_value:1;
-  /* Set if an allocatable array variable has been allocated in the current
- scope. Used in the suppression of uninitialized warnings in reallocation
- on assignment.  */
-  unsigned allocated_in_scope:1;
   /* Set if an external dummy argument is called with different argument lists.
  This is legal in Fortran, but can cause problems with autogenerated
  C prototypes for C23.  */
diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 7be2d7b11a62..3cd6d90f47e7 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -3420,6 +3420,23 @@ gfc_add_loop_ss_code (gfc_loopinfo * loop, gfc_ss * ss, 
bool subscript,
 }
 
 
+/* Given an array descriptor expression DESCR and its data pointer DATA, decide
+   whether to either save the data pointer to a variable and use the variable 
or
+   use the data pointer expression directly without any intermediary variable.
+   */
+
+static bool
+save_descriptor_data (tree descr, tree data)
+{
+  return !(DECL_P (data)
+  || (TREE_CODE (data) == ADDR_EXPR
+  && DECL_P (TREE_OPERAND (data, 0)))
+  || (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (descr))
+  && TREE_CODE (descr) == COMPONENT_REF
+  && GFC_CLASS_TYPE_P (TREE_TYPE (TREE_OPERAND (descr, 0);
+}
+
+
 /* Translate expressions for the descriptor and data pointer of a SS.  */
 /*GCC ARRAYS*/
 
@@ -3466,17 +3483,14 @@ gfc_conv_ss_descriptor (stmtblock_t * block, gfc_ss * 
ss, int base)
  Otherwise we must evaluate it now to avoid breaking dependency
 analysis by pulling the expressions for elemental array indices
 inside the loop.  */
-  if (!(DECL_P (tmp)
-   || (TREE_CODE (tmp) == ADDR_EXPR
-   && DECL_P (TREE_OPERAND (tmp, 0)))
-   || (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (se.expr))
-   && TREE_CODE (se.expr) == COMPONENT_REF
-   && GFC_CLASS_TYPE_P (TREE_TYPE (TREE_OPERAND (se.expr, 0))
+  if (save_descriptor_data (se.expr, tmp) && !ss->is_alloc_lhs)
tmp = gfc_evaluate_now (tmp, block);
   info->data = tmp;
 
   tmp = gfc_conv_array_offset (se.expr);
-  info->offset = gfc_evaluate_now (tmp, block);
+  if (!ss->is_alloc_lhs)
+   tmp = gfc_evaluate_now (tmp, block);
+  info->offset = tmp;
 
   /* Make absolutely sure that the saved_offset is indeed saved
 so that the variable is still accessible after the loops
@@ -4769,13 +4783,12 @@ gfc_trans_scalarized_loop_boundary (gfc_loopinfo * 
loop, stmtblock_t * body)
 
 static void
 evaluate_bound (stmtblock_t *block, tree *bounds, gfc_expr ** values,
-   tree desc, int dim, bool lbound, bool deferred)
+   tree desc, int dim, bool lbound, bool deferred, bool save_value)
 {
   gfc_se se;
   gfc_expr * input_val = values[dim];
   tree *output = &bounds[dim];
 
-
   if (input_val)
 {
   /* Specified section bound.  */
@@ -4801,7 +4814,8 @@ evaluate_bound (stmtblock_t *block, tree *bounds, 
gfc_expr ** values,
   *output = lbound ? gfc_conv_array_lbound (desc, dim) :
 gfc_conv_array_ubound (desc, dim);
 }
-  *output = gfc_evaluate_now (*output, block);
+  if (save_value)
+*output = gfc_evaluate_now (*output, block);
 }
 
 
@@ -4834,18 +4848,18 @@ gfc_conv_section_startstride (stmtblock_t * block, 
gfc_ss * ss, int dim)
  || ar->dimen_type[dim] == DIMEN_THIS_IMAGE);
   desc = info->descriptor;
   stride = ar->stride[dim];
-
+  bool save_value = !ss->is_alloc_lhs;
 
   /* Calculate the start of the range.  For vector subscripts this will
  be the range of the vector.  */
   evaluate_bound (block, info->start, ar->start, desc, dim, true,
- ar->as->type == AS_DEFERRED);
+ ar->as->type == AS_DEFERRED, save_value);
 
   /* Similarly calculate the end.  Although this is not used in the
  scalarizer, it is needed when checking bounds and where the end
  is an expression with side-effects.  */
   evaluate_bound (block, info->end, ar->end, desc, dim, false,
- ar->as->type == AS_DEFERRED);
+

[gcc] Created branch 'mikael/heads/stabilisation_descriptor_v01' in namespace 'refs/users'

2025-07-07 Thread Mikael Morin via Gcc-cvs
The branch 'mikael/heads/stabilisation_descriptor_v01' was created in namespace 
'refs/users' pointing to:

 2865e8dcb340... Essai simplification évaluation


[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Ajout commentaire

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:f09bd1d374208b14e61e5002a1f556e8c652fba5

commit f09bd1d374208b14e61e5002a1f556e8c652fba5
Author: Mikael Morin 
Date:   Mon Jul 7 14:38:51 2025 +0200

Ajout commentaire

Diff:
---
 gcc/fortran/trans-array.cc | 13 +
 1 file changed, 13 insertions(+)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 3cd6d90f47e7..abf535cdaedb 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -11352,6 +11352,19 @@ concat_str_length (gfc_expr* expr)
 }
 
 
+/* Among the scalarization chain of LOOP, find the element associated with an
+   allocatable array on the lhs of an assignment and evaluate its fields
+   (bounds, offset, etc) to new variables, putting the new code in BLOCK.  This
+   function is to be called after putting the reallocation code in BLOCK and
+   before the beginning of the scalarization loop body.
+
+   The fields to be saved are expected to hold on entry to the function
+   expressions referencing the array descriptor.  Especially the expressions
+   shouldn't be already temporary variable references as the value saved before
+   reallocation would be incorrect after reallocation.
+   At the end of the function, the expressions have been replaced with variable
+   references.  */
+
 static void
 update_reallocated_descriptor (stmtblock_t *block, gfc_loopinfo *loop)
 {


[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Essai simplification évaluation

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:2865e8dcb340723bfa7390ec82351fa80f6fb91d

commit 2865e8dcb340723bfa7390ec82351fa80f6fb91d
Author: Mikael Morin 
Date:   Mon Jul 7 14:50:14 2025 +0200

Essai simplification évaluation

Diff:
---
 gcc/fortran/trans-array.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index abf535cdaedb..832db1c3df4e 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -11380,7 +11380,7 @@ update_reallocated_descriptor (stmtblock_t *block, 
gfc_loopinfo *loop)
 #define UPDATE_VALUE(field, value) \
  do \
{ \
- if ((field) && VAR_P ((field))) \
+ if (false && (field) && VAR_P ((field))) \
{ \
  tree val = (value); \
  gfc_add_modify (block, (field), val); \


[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Correction array_constructor_1

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:8f05d8056216ae11b116891cd50d43bc7c20a1f1

commit 8f05d8056216ae11b116891cd50d43bc7c20a1f1
Author: Mikael Morin 
Date:   Sat Jul 5 15:05:20 2025 +0200

Correction array_constructor_1

Diff:
---
 gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90 | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90 
b/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90
index 45eafacd5a67..a0c55076a9ae 100644
--- a/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90
+++ b/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90
@@ -9,6 +9,8 @@ program grow_type_array
 
 type(container), allocatable :: list(:)
 
+allocate(list(0))
+
 list = [list, new_elem(5)]
 
 deallocate(list)


[gcc r16-2058] Internal-fn: Introduce new IFN_SAT_MUL for unsigned int

2025-07-07 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:35f5a18872127e18aadcbbc08df7885974280c79

commit r16-2058-g35f5a18872127e18aadcbbc08df7885974280c79
Author: Pan Li 
Date:   Wed Jul 2 09:46:08 2025 +0800

Internal-fn: Introduce new IFN_SAT_MUL for unsigned int

This patch would like to add the middle-end presentation for the
unsigend saturation mul.  Aka set the result of mul to the max
when overflow.

Take uint8_t as example, we will have:

* SAT_MUL (1, 127)   => 127.
* SAT_MUL (2, 127)   => 254.
* SAT_MUL (3, 127)   => 255.
* SAT_MUL (255, 127) => 255.

Given below example for uint16_t from uint128_t

  #define DEF_SAT_U_MUL_FMT_1(NT, WT) \
  NT __attribute__((noinline))\
  sat_u_mul_##NT##_from_##WT##_fmt_1 (NT a, NT b) \
  {   \
WT x = (WT)a * (WT)b; \
NT max = -1;  \
if (x > (WT)(max))\
  return max; \
else  \
  return (NT)x;   \
  }

  DEF_SAT_U_MUL_FMT_1(uint16_t, uint128_t)

Before this patch:
  15   │[local count: 1073741824]:
  16   │   _1 = (__int128 unsigned) a_4(D);
  17   │   _2 = (__int128 unsigned) b_5(D);
  18   │   _9 = (unsigned long) _1;
  19   │   _10 = (unsigned long) _2;
  20   │   x_6 = _9 w* _10;
  21   │   _7 = MIN_EXPR ;
  22   │   _3 = (uint8_t) _7;
  23   │   return _3;

After this patch:
   9   │[local count: 1073741824]:
  10   │   _3 = .SAT_MUL (a_4(D), b_5(D)); [tail call]
  11   │   return _3;

gcc/ChangeLog:

* internal-fn.cc (commutative_binary_fn_p): Add new case
for SAT_MUL.
* internal-fn.def (SAT_MUL): Add new IFN_SAT_MUL.
* optabs.def (OPTAB_NL): Remove fixed point limitation.

Signed-off-by: Pan Li 

Diff:
---
 gcc/internal-fn.cc  | 1 +
 gcc/internal-fn.def | 1 +
 gcc/optabs.def  | 4 ++--
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc
index 39048d77d23b..ed6ef0e4c647 100644
--- a/gcc/internal-fn.cc
+++ b/gcc/internal-fn.cc
@@ -4428,6 +4428,7 @@ commutative_binary_fn_p (internal_fn fn)
 case IFN_ADD_OVERFLOW:
 case IFN_MUL_OVERFLOW:
 case IFN_SAT_ADD:
+case IFN_SAT_MUL:
 case IFN_VEC_WIDEN_PLUS:
 case IFN_VEC_WIDEN_PLUS_LO:
 case IFN_VEC_WIDEN_PLUS_HI:
diff --git a/gcc/internal-fn.def b/gcc/internal-fn.def
index 8edfa3540f8c..914ee9f278cd 100644
--- a/gcc/internal-fn.def
+++ b/gcc/internal-fn.def
@@ -282,6 +282,7 @@ DEF_INTERNAL_SIGNED_OPTAB_FN (MULHRS, ECF_CONST | 
ECF_NOTHROW, first,
 
 DEF_INTERNAL_SIGNED_OPTAB_FN (SAT_ADD, ECF_CONST, first, ssadd, usadd, binary)
 DEF_INTERNAL_SIGNED_OPTAB_FN (SAT_SUB, ECF_CONST, first, sssub, ussub, binary)
+DEF_INTERNAL_SIGNED_OPTAB_FN (SAT_MUL, ECF_CONST, first, ssmul, usmul, binary)
 
 DEF_INTERNAL_SIGNED_OPTAB_FN (SAT_TRUNC, ECF_CONST, first, sstrunc, ustrunc, 
unary_convert)
 
diff --git a/gcc/optabs.def b/gcc/optabs.def
index 0c1435d4ecd7..87a8b85da159 100644
--- a/gcc/optabs.def
+++ b/gcc/optabs.def
@@ -134,8 +134,8 @@ OPTAB_NX(smul_optab, "mul$P$a3")
 OPTAB_NX(smul_optab, "mul$F$a3")
 OPTAB_VL(smulv_optab, "mulv$I$a3", MULT, "mul", '3', gen_intv_fp_libfunc)
 OPTAB_VX(smulv_optab, "mul$F$a3")
-OPTAB_NL(ssmul_optab, "ssmul$Q$a3", SS_MULT, "ssmul", '3', 
gen_signed_fixed_libfunc)
-OPTAB_NL(usmul_optab, "usmul$Q$a3", US_MULT, "usmul", '3', 
gen_unsigned_fixed_libfunc)
+OPTAB_NL(ssmul_optab, "ssmul$a3", SS_MULT, "ssmul", '3', 
gen_signed_fixed_libfunc)
+OPTAB_NL(usmul_optab, "usmul$a3", US_MULT, "usmul", '3', 
gen_unsigned_fixed_libfunc)
 OPTAB_NL(sdiv_optab, "div$a3", DIV, "div", '3', 
gen_int_fp_signed_fixed_libfunc)
 OPTAB_VL(sdivv_optab, "divv$I$a3", DIV, "divv", '3', gen_int_libfunc)
 OPTAB_VX(sdivv_optab, "div$F$a3")


[gcc r16-2059] Widening-Mul: Support unsigned scalar SAT_MUL form 1

2025-07-07 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:dc30f404170f538af6bf2457ccff252b08302dec

commit r16-2059-gdc30f404170f538af6bf2457ccff252b08302dec
Author: Pan Li 
Date:   Wed Jul 2 09:59:26 2025 +0800

Widening-Mul: Support unsigned scalar SAT_MUL form 1

This patch would like to try to match the SAT_MUL during
widening-mul pass, aka below pattern.

  NT __attribute__((noinline))
  sat_u_mul_##NT##_fmt_1 (NT a, NT b)
  {
uint128_t x = (uint128_t)a * (uint128_t)b;
NT max = -1;
if (x > (uint128_t)(max))
  return max;
else
  return (NT)x;
  }

while the NT can be uint8_t, uint16_t, uint32_t and uint64_t.

gcc/ChangeLog:

* match.pd: Add new match pattern for unsigned SAT_MUL.
* tree-ssa-math-opts.cc (gimple_unsigned_integer_sat_mul):
new decl for pattern match func.
(match_unsigned_saturation_mul): Add new func to match unsigned
SAT_MUL.
(math_opts_dom_walker::after_dom_children): Try to match
unsigned SAT_MUL on NOP.

Signed-off-by: Pan Li 

Diff:
---
 gcc/match.pd  | 31 +++
 gcc/tree-ssa-math-opts.cc | 26 ++
 2 files changed, 57 insertions(+)

diff --git a/gcc/match.pd b/gcc/match.pd
index 10c2b97f494e..ec2f5603d9c0 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -3583,6 +3583,37 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 || (wi::eq_p (int_cst_1, itype_max) && wi::eq_p (int_cst_2, limit_1)))
 && wi::eq_p (int_cst_3, otype_max)))
 
+/* Saturation mult for unsigned integer.  */
+(if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type))
+  (match (unsigned_integer_sat_mul @0 @1)
+   /* SAT_U_MUL (X, Y) = {
+   WT x = (WT)a * (WT)b;
+   T max = -1;
+   if (x > (WT)(max))
+ return max;
+   else
+ return (T)x;
+  }
+  while WT is uint128_t, T is uint8_t, uint16_t, uint32_t or uint64_t.  */
+   (convert@4 (min (widen_mult:c@3 (convert@5 (convert @0))
+  (convert@6 (convert @1)))
+  INTEGER_CST@2))
+   (if (types_match (type, @0, @1) && types_match (type, @4))
+(with
+ {
+  unsigned prec = TYPE_PRECISION (type);
+  unsigned widen_prec = TYPE_PRECISION (TREE_TYPE (@3));
+  unsigned cvt5_prec = TYPE_PRECISION (TREE_TYPE (@5));
+  unsigned cvt6_prec = TYPE_PRECISION (TREE_TYPE (@6));
+  unsigned hw_int_prec = sizeof (HOST_WIDE_INT) * 8;
+  wide_int c2 = wi::to_wide (@2);
+  wide_int max = wi::mask (prec, false, widen_prec);
+  bool c2_is_max_p = wi::eq_p (c2, max);
+  bool widen_mult_p = cvt5_prec == cvt6_prec && hw_int_prec == cvt5_prec;
+ }
+ (if (widen_prec > prec && c2_is_max_p && widen_mult_p)
+)
+
 /* The boundary condition for case 10: IMM = 1:
SAT_U_SUB = X >= IMM ? (X - IMM) : 0.
simplify (X != 0 ? X + ~0 : 0) to X - (X != 0).  */
diff --git a/gcc/tree-ssa-math-opts.cc b/gcc/tree-ssa-math-opts.cc
index 4cfcc420fea5..ca98205d58f8 100644
--- a/gcc/tree-ssa-math-opts.cc
+++ b/gcc/tree-ssa-math-opts.cc
@@ -4064,6 +4064,7 @@ arith_overflow_check_p (gimple *stmt, gimple *cast_stmt, 
gimple *&use_stmt,
 extern bool gimple_unsigned_integer_sat_add (tree, tree*, tree (*)(tree));
 extern bool gimple_unsigned_integer_sat_sub (tree, tree*, tree (*)(tree));
 extern bool gimple_unsigned_integer_sat_trunc (tree, tree*, tree (*)(tree));
+extern bool gimple_unsigned_integer_sat_mul (tree, tree*, tree (*)(tree));
 
 extern bool gimple_signed_integer_sat_add (tree, tree*, tree (*)(tree));
 extern bool gimple_signed_integer_sat_sub (tree, tree*, tree (*)(tree));
@@ -4216,6 +4217,30 @@ match_unsigned_saturation_sub (gimple_stmt_iterator 
*gsi, gassign *stmt)
ops[0], ops[1]);
 }
 
+/*
+ * Try to match saturation unsigned mul.
+ *   _1 = (unsigned int) a_6(D);
+ *   _2 = (unsigned int) b_7(D);
+ *   x_8 = _1 * _2;
+ *   overflow_9 = x_8 > 255;
+ *   _3 = (unsigned char) overflow_9;
+ *   _4 = -_3;
+ *   _5 = (unsigned char) x_8;
+ *   _10 = _4 | _5;
+ *   =>
+ *   _10 = .SAT_SUB (a_6, b_7);  */
+
+static void
+match_unsigned_saturation_mul (gimple_stmt_iterator *gsi, gassign *stmt)
+{
+  tree ops[2];
+  tree lhs = gimple_assign_lhs (stmt);
+
+  if (gimple_unsigned_integer_sat_mul (lhs, ops, NULL))
+build_saturation_binary_arith_call_and_replace (gsi, IFN_SAT_MUL, lhs,
+   ops[0], ops[1]);
+}
+
 /*
  * Try to match saturation unsigned sub.
  *   [local count: 1073741824]:
@@ -6469,6 +6494,7 @@ math_opts_dom_walker::after_dom_children (basic_block bb)
  break;
 
case NOP_EXPR:
+ match_unsigned_saturation_mul (&gsi, as_a (stmt));
  match_unsigned_saturation_trunc (&gsi, as_a (stmt));
  match_saturation_add_with_assign (&gsi, as_a (stmt));
  break;


[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] fortran: generate array reallocation out of loops

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:2ef2bbc514dc386d795b38515f2caefa4ab3b7dc

commit 2ef2bbc514dc386d795b38515f2caefa4ab3b7dc
Author: Mikael Morin 
Date:   Sun Jul 6 16:56:16 2025 +0200

fortran: generate array reallocation out of loops

Generate the array reallocation on assignment code before entering the
scalarization loops.  This doesn't move the generated code itself,
which was already put out of the outermost loop, but only changes the
current scope at the time the code is generated.  This is a prerequisite
for a followup patch that makes the reallocation code create new
variables.  Without this change the new variables would be declared in
the innermost loop body and couldn't be used outside of it.

gcc/fortran/ChangeLog:

* trans-expr.cc (gfc_trans_assignment_1): Generate array
reallocation code before entering the scalarisation loops.

Diff:
---
 gcc/fortran/trans-expr.cc | 20 +++-
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index 3e0d763d2fb0..65d0ee4ff235 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -12943,6 +12943,7 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
   rhs_caf_attr = gfc_caf_attr (expr2, false, &rhs_refs_comp);
 }
 
+  tree reallocation = NULL_TREE;
   if (lss != gfc_ss_terminator)
 {
   /* The assignment needs scalarization.  */
@@ -13011,6 +13012,14 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
  ompws_flags |= OMPWS_SCALARIZER_WS | OMPWS_SCALARIZER_BODY;
}
 
+  /* F2003: Allocate or reallocate lhs of allocatable array.  */
+  if (realloc_flag)
+   {
+ realloc_lhs_warning (expr1->ts.type, true, &expr1->where);
+ ompws_flags &= ~OMPWS_SCALARIZER_WS;
+ reallocation = gfc_alloc_allocatable_for_assignment (&loop, expr1, 
expr2);
+   }
+
   /* Start the scalarized loop body.  */
   gfc_start_scalarized_body (&loop, &body);
 }
@@ -13319,15 +13328,8 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
  gfc_add_expr_to_block (&body, tmp);
}
 
-  /* F2003: Allocate or reallocate lhs of allocatable array.  */
-  if (realloc_flag)
-   {
- realloc_lhs_warning (expr1->ts.type, true, &expr1->where);
- ompws_flags &= ~OMPWS_SCALARIZER_WS;
- tmp = gfc_alloc_allocatable_for_assignment (&loop, expr1, expr2);
- if (tmp != NULL_TREE)
-   gfc_add_expr_to_block (&loop.code[expr1->rank - 1], tmp);
-   }
+  if (reallocation != NULL_TREE)
+   gfc_add_expr_to_block (&loop.code[loop.dimen - 1], reallocation);
 
   if (maybe_workshare)
ompws_flags &= ~OMPWS_SCALARIZER_BODY;


[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Prise en charge affichage TARGET_MEM_REF

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:8b7bf0d4fa6a7527b2b1ac509952a4a5a826ee42

commit 8b7bf0d4fa6a7527b2b1ac509952a4a5a826ee42
Author: Mikael Morin 
Date:   Mon Jul 7 08:52:38 2025 +0200

Prise en charge affichage TARGET_MEM_REF

Diff:
---
 gcc/gimple-simulate.cc| 87 ---
 gcc/selftest-run-tests.cc |  2 ++
 gcc/selftest.h|  1 +
 3 files changed, 86 insertions(+), 4 deletions(-)

diff --git a/gcc/gimple-simulate.cc b/gcc/gimple-simulate.cc
index aa29b68b748c..a85e6f63cc92 100644
--- a/gcc/gimple-simulate.cc
+++ b/gcc/gimple-simulate.cc
@@ -903,6 +903,9 @@ static tree
 find_mem_ref_replacement (simul_scope & context, tree data_ref,
  unsigned offset, unsigned min_size)
 {
+  gcc_assert (TREE_CODE (data_ref) == MEM_REF
+ || TREE_CODE (data_ref) == TARGET_MEM_REF);
+
   tree ptr = TREE_OPERAND (data_ref, 0);
   data_value ptr_val = context.evaluate (ptr);
   if (ptr_val.classify () != VAL_ADDRESS)
@@ -923,12 +926,30 @@ find_mem_ref_replacement (simul_scope & context, tree 
data_ref,
 {
   tree access_offset = TREE_OPERAND (data_ref, 1);
   gcc_assert (TREE_CONSTANT (access_offset));
-  gcc_assert (tree_fits_shwi_p (access_offset));
-  HOST_WIDE_INT shwi_offset = tree_to_shwi (access_offset);
-  gcc_assert (offset < UINT_MAX - shwi_offset);
-  HOST_WIDE_INT remaining_offset = shwi_offset * CHAR_BIT
+  gcc_assert (tree_fits_uhwi_p (access_offset));
+  HOST_WIDE_INT uhwi_offset = tree_to_uhwi (access_offset);
+  gcc_assert (offset < UINT_MAX - uhwi_offset);
+  HOST_WIDE_INT remaining_offset = uhwi_offset * CHAR_BIT
   + offset + ptr_address->offset;
 
+  if (TREE_CODE (data_ref) == TARGET_MEM_REF)
+   {
+ tree idx = TREE_OPERAND (data_ref, 2);
+ data_value idx_val = context.evaluate (idx);
+ gcc_assert (idx_val.classify () == VAL_KNOWN);
+ wide_int wi_idx = idx_val.get_known ();
+
+ tree step = TREE_OPERAND (data_ref, 3);
+ data_value step_val = context.evaluate (step);
+ gcc_assert (step_val.classify () == VAL_KNOWN);
+ wide_int wi_step = step_val.get_known ();
+
+ wi_idx *= wi_step;
+ gcc_assert (wi::fits_uhwi_p (wi_idx));
+ HOST_WIDE_INT idx_offset = wi_idx.to_uhwi ();
+ remaining_offset += idx_offset * CHAR_BIT;
+   }
+
   return pick_subref_at (var_ref, remaining_offset, nullptr, min_size);
 }
 }
@@ -957,6 +978,7 @@ context_printer::print_first_data_ref_part (simul_scope & 
context,
   switch (TREE_CODE (data_ref))
 {
 case MEM_REF:
+case TARGET_MEM_REF:
   {
tree mem_replacement = find_mem_ref_replacement (context, data_ref,
 offset, min_size);
@@ -4432,6 +4454,63 @@ context_printer_print_value_update_tests ()
   printer9.print_value_update (ctx9, ref9, val9_addr_i);
   const char *str9 = pp_formatted_text (&pp9);
   ASSERT_STREQ (str9, "# v17c[8B:+8B] = &i\n");
+
+
+  heap_memory mem10;
+  context_printer printer10;
+  pretty_printer & pp10 = printer10.pp;
+  pp_buffer (&pp10)->m_flush_p = false;
+
+  tree a11c_10 = build_array_type_nelts (char_type_node, 11);
+  tree v11c_10 = create_var (a11c_10, "v11c");
+  tree p_10 = create_var (ptr_type_node, "p");
+  tree i_10 = create_var (size_type_node, "i");
+
+  vec decls10{};
+  decls10.safe_push (v11c_10);
+  decls10.safe_push (p_10);
+  decls10.safe_push (i_10);
+
+  context_builder builder10;
+  builder10.add_decls (&decls10);
+  simul_scope ctx10 = builder10.build (mem10, printer10);
+
+  data_storage *strg10_v11 = ctx10.find_reachable_var (v11c_10);
+  gcc_assert (strg10_v11 != nullptr);
+  storage_address addr10_v11 (strg10_v11->get_ref (), 0);
+
+  data_value val10_addr_v11 (ptr_type_node);
+  val10_addr_v11.set_address (addr10_v11);
+
+  data_storage *strg10_p = ctx10.find_reachable_var (p_10);
+  gcc_assert (strg10_p != nullptr);
+  strg10_p->set (val10_addr_v11);
+
+  data_value val10_cst_2 (size_type_node);
+  wide_int cst2_10 = wi::uhwi (2, TYPE_PRECISION (size_type_node));
+  val10_cst_2.set_known (cst2_10);
+
+  data_storage *strg10_i = ctx10.find_reachable_var (i_10);
+  gcc_assert (strg10_i != nullptr);
+  strg10_i->set (val10_cst_2);
+
+  tree int_ptr_10 = build_pointer_type (integer_type_node);
+
+  tree ref10 = build5 (TARGET_MEM_REF, integer_type_node, p_10,
+  build_int_cst (int_ptr_10, -4), i_10,
+  build_int_cst (size_type_node, 4), NULL_TREE);
+
+  data_value val10_cst_13 (integer_type_node);
+  wide_int wi10_13 = wi::shwi (13, TYPE_PRECISION (integer_type_node));
+  val10_cst_13.set_known (wi10_13);
+
+  printer10.print_value_update (ctx10, ref10, val10_cst_13);
+  const char *str10 = pp_formatted_text (&pp10);
+  ASSERT_STREQ (str10,
+   "# v11c[4] = 13\n"
+   "# v11c[5] = 0\n"
+   "# v11c[6] = 0\n"
+  

[gcc] Deleted branch 'mikael/heads/stabilisation_descriptor_v01' in namespace 'refs/users'

2025-07-07 Thread Mikael Morin via Gcc-cvs
The branch 'mikael/heads/stabilisation_descriptor_v01' in namespace 
'refs/users' was deleted.
It previously pointed to:

 e9481e8a6a16... Essai simplification évaluation

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  e9481e8... Essai simplification évaluation
  b0bcdca... Ajout commentaire
  fd47765... Déplacement variables après réallocation
  ab0564f... fortran: generate array reallocation out of loops


[gcc r16-2062] tree-optimization/120817 - bogus DSE of .MASK_STORE

2025-07-07 Thread Richard Biener via Gcc-cvs
https://gcc.gnu.org/g:439b14e222571da76da2bfec04b9035fb9f1862d

commit r16-2062-g439b14e222571da76da2bfec04b9035fb9f1862d
Author: Richard Biener 
Date:   Mon Jul 7 09:56:50 2025 +0200

tree-optimization/120817 - bogus DSE of .MASK_STORE

DSE used ao_ref_init_from_ptr_and_size for .MASK_STORE but
alias-analysis will use the specified size to disambiguate
against smaller objects.  For .MASK_STORE we instead have to
make the access size unspecified but we can still constrain
the access extent based on the maximum size possible.

PR tree-optimization/120817
* tree-ssa-dse.cc (initialize_ao_ref_for_dse): Use
ao_ref_init_from_ptr_and_range with unknown size for
.MASK_STORE and .MASK_LEN_STORE.

* gcc.dg/vect/pr120817.c: New testcase.

Diff:
---
 gcc/testsuite/gcc.dg/vect/pr120817.c | 40 
 gcc/tree-ssa-dse.cc  |  8 
 2 files changed, 44 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/vect/pr120817.c 
b/gcc/testsuite/gcc.dg/vect/pr120817.c
new file mode 100644
index ..d8f55c9b98d2
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr120817.c
@@ -0,0 +1,40 @@
+/* { dg-additional-options "-O1" } */
+/* { dg-additional-options "-mcpu=neoverse-n2" { target aarch64*-*-* } } */
+
+#include "tree-vect.h"
+
+typedef struct {
+int _M_current;
+} __normal_iterator;
+
+typedef struct {
+char _M_elems[5];
+} array_5;
+
+__normal_iterator __trans_tmp_1 = {-5};
+
+__attribute__((noipa))
+array_5 copySourceIntoTarget() {
+array_5 target;
+char* target_it = target._M_elems;
+
+while (__trans_tmp_1._M_current != 0) {
+*target_it = 1;
+__trans_tmp_1._M_current++;
+target_it++;
+}
+
+return target;
+}
+
+int main ()
+{
+  check_vect ();
+
+  array_5 res = copySourceIntoTarget();
+
+#pragma GCC novector
+  for (int i = 0; i < 5; i++)
+if (res._M_elems[i] != 1)
+  __builtin_abort ();
+}
diff --git a/gcc/tree-ssa-dse.cc b/gcc/tree-ssa-dse.cc
index 5ac4280ee361..51a572316cdc 100644
--- a/gcc/tree-ssa-dse.cc
+++ b/gcc/tree-ssa-dse.cc
@@ -181,10 +181,10 @@ initialize_ao_ref_for_dse (gimple *stmt, ao_ref *write, 
bool may_def_ok = false)
   can provide a may-def variant.  */
if (may_def_ok)
  {
-   ao_ref_init_from_ptr_and_size (
- write, gimple_call_arg (stmt, 0),
- TYPE_SIZE_UNIT (
-   TREE_TYPE (gimple_call_arg (stmt, stored_value_index;
+   ao_ref_init_from_ptr_and_range (
+ write, gimple_call_arg (stmt, 0), true, 0, -1,
+ tree_to_poly_int64 (TYPE_SIZE (
+   TREE_TYPE (gimple_call_arg (stmt, stored_value_index);
return true;
  }
break;


[gcc(refs/vendors/ibm/heads/mmaplus)] MMA+: Add int8 and bfloat16 ger builtins

2025-07-07 Thread Surya Kumari Jangala via Gcc-cvs
https://gcc.gnu.org/g:b09338d1e4411cd85819e86025811ba8a87d1ea3

commit b09338d1e4411cd85819e86025811ba8a87d1ea3
Author: Surya Kumari Jangala 
Date:   Mon Jul 7 03:14:48 2025 -0500

MMA+: Add int8 and bfloat16 ger builtins

Add builtins __builtin_mma_dmxvbf16gerx2, __builtin_mma_dmxvbf16gerx2nn,
__builtin_mma_mxvbf16gerx2np, __builtin_mma_dmxvbf16gerx2pn,
__builtin_mma_dmxvbf16gerx2pp, __builtin_mma_pmdmxvbf16gerx2,
__builtin_mma_pmdmxvbf16gerx2nn, __builtin_mma_pmdmxvbf16gerx2np,
__builtin_mma_pmdmxvbf16gerx2pn, __builtin_mma_pmdmxvbf16gerx2pp,
__builtin_mma_dmxvi8gerx4spp, __builtin_mma_pmdmxvi8gerx4spp

Diff:
---
 gcc/config/rs6000/mma.md |  94 ++-
 gcc/config/rs6000/rs6000-builtins.def|  85 ++
 gcc/testsuite/gcc.target/powerpc/dmf-builtin-1.c | 202 +++
 3 files changed, 372 insertions(+), 9 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index fd3a0e592d88..14f33724d69c 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -100,8 +100,20 @@
UNSPEC_DMF_DMXOR
UNSPEC_DMF_DMXVI8GERX4
UNSPEC_DMF_DMXVI8GERX4PP
+   UNSPEC_DMF_DMXVI8GERX4SPP
UNSPEC_DMF_PMDMXVI8GERX4
UNSPEC_DMF_PMDMXVI8GERX4PP
+   UNSPEC_DMF_PMDMXVI8GERX4SPP
+   UNSPEC_DMF_DMXVBF16GERX2
+   UNSPEC_DMF_DMXVBF16GERX2PP
+   UNSPEC_DMF_DMXVBF16GERX2PN
+   UNSPEC_DMF_DMXVBF16GERX2NP
+   UNSPEC_DMF_DMXVBF16GERX2NN
+   UNSPEC_DMF_PMDMXVBF16GERX2
+   UNSPEC_DMF_PMDMXVBF16GERX2PP
+   UNSPEC_DMF_PMDMXVBF16GERX2PN
+   UNSPEC_DMF_PMDMXVBF16GERX2NP
+   UNSPEC_DMF_PMDMXVBF16GERX2NN
   ])
 
 (define_c_enum "unspecv"
@@ -145,7 +157,8 @@
 (define_int_iterator MMA_PV[UNSPEC_MMA_XVF64GER])
 
 ;; DMF instructions with 1 vector pair and 1 vector arguments
-(define_int_iterator DMF_PV[UNSPEC_DMF_DMXVI8GERX4])
+(define_int_iterator DMF_PV[UNSPEC_DMF_DMXVI8GERX4
+UNSPEC_DMF_DMXVBF16GERX2])
 
 ;; MMA instructions with 1 accumulator, 1 vector pair and 1 vector arguments
 (define_int_iterator MMA_APV   [UNSPEC_MMA_XVF64GERPP
@@ -154,7 +167,12 @@
 UNSPEC_MMA_XVF64GERNN])
 
 ;; DMF instructions with 1 dmr, 1 vector pair and 1 vector arguments
-(define_int_iterator DMF_DPV   [UNSPEC_DMF_DMXVI8GERX4PP])
+(define_int_iterator DMF_DPV   [UNSPEC_DMF_DMXVI8GERX4PP
+UNSPEC_DMF_DMXVI8GERX4SPP
+UNSPEC_DMF_DMXVBF16GERX2PP
+UNSPEC_DMF_DMXVBF16GERX2PN
+UNSPEC_DMF_DMXVBF16GERX2NP
+UNSPEC_DMF_DMXVBF16GERX2NN])
 
 ;; MMA instructions with 2 vector, 2 4-bit and 1 8-bit arguments
 (define_int_iterator MMA_VVI4I4I8  [UNSPEC_MMA_PMXVI4GER8])
@@ -211,7 +229,19 @@
 
 ;; DMF instructions with 1dmr, 1 vector pair, 1 vector and 1 8-bit and
 ;; 2 4-bit arguments
-(define_int_iterator DMF_DPVI8I4I4 [UNSPEC_DMF_PMDMXVI8GERX4PP])
+(define_int_iterator DMF_DPVI8I4I4 [UNSPEC_DMF_PMDMXVI8GERX4PP
+UNSPEC_DMF_PMDMXVI8GERX4SPP])
+
+;; DMF instructions with 1 vector pair, 1 vector, 1 8-bit, 1 4-bit
+;; and 1 2-bit arguments
+(define_int_iterator DMF_PVI8I4I2  [UNSPEC_DMF_PMDMXVBF16GERX2])
+
+;; DMF instructions with 1dmr, 1 vector pair, 1 vector, 1 8-bit,
+;; 1 4-bit and 1 2-bit arguments
+(define_int_iterator DMF_DPVI8I4I2 [UNSPEC_DMF_PMDMXVBF16GERX2PP
+UNSPEC_DMF_PMDMXVBF16GERX2PN
+UNSPEC_DMF_PMDMXVBF16GERX2NP
+UNSPEC_DMF_PMDMXVBF16GERX2NN])
 
 (define_int_attr acc   [(UNSPEC_MMA_XXMFACC"xxmfacc")
 (UNSPEC_MMA_XXMTACC"xxmtacc")])
@@ -243,13 +273,20 @@
 (UNSPEC_MMA_XVF32GERNN "xvf32gernn")])
 
 (define_int_attr pv[(UNSPEC_MMA_XVF64GER   "xvf64ger")
-(UNSPEC_DMF_DMXVI8GERX4"dmxvi8gerx4")])
+(UNSPEC_DMF_DMXVI8GERX4"dmxvi8gerx4")
+(UNSPEC_DMF_DMXVBF16GERX2  
"dmxvbf16gerx2")])
 
 (define_int_attr apv   [(UNSPEC_MMA_XVF64GERPP "xvf64gerpp")
 (UNSPEC_MMA_XVF64GERPN "xvf64gerpn")
 (UNSPEC_MMA_XVF64GERNP "xvf64gernp")
-(UNSPEC_MMA_XVF64GERNN "xvf64gernn")
-(UNSPEC_DMF_DMXVI8GERX4PP  
"dmxvi8gerx4pp")])
+(UNSPEC_MMA_XVF64GERNN "xvf64gernn")])
+
+(define_int_attr dpv   [(UNSPEC_DMF_DMXVI8GERX4PP  "dmxvi8gerx4pp")
+(UNSPEC_DMF_DMXVI8GERX4SPP 
"dmx

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: prefetch: fix LRA failing to allocate reg [PR118241]

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:46f3e46cf0f5321519a8f690c09e3285595f5a05

commit 46f3e46cf0f5321519a8f690c09e3285595f5a05
Author: Vineet Gupta 
Date:   Fri Jul 4 12:33:51 2025 -0700

RISC-V: prefetch: fix LRA failing to allocate reg [PR118241]

prefetch was recently fixed/tightened (with Q reg constraint) to only
support right address patterns (REG or REG+D with lower 5 bits clear).
However in some cases that's too restrictive for LRA and it fails to
allocate a reg resulting in following ICE...

| gcc/testsuite/gcc.target/riscv/pr118241-b.cc:31:19: error: unable to 
generate reloads for:
|   31 | void m() { a.l(); }
|  |   ^
|(insn 26 25 27 7 (prefetch (mem/f:DI (plus:DI (reg/f:DI 143 [ _5 ])
|(const_int 56 [0x38])) [5 _5->batch[6]+0 S8 A64])
|(const_int 0 [0])
|(const_int 3 [0x3])) 
"gcc/testsuite/gcc.target/riscv/pr118241-b.cc":18:29 498 {prefetch}
| (expr_list:REG_DEAD (reg/f:DI 142 [ _5->batch[6] ])
|(nil)))
|during RTL pass: reload

Fix that by providing a fallback alternative register constraint to reload 
the address.

PR target/118241

gcc/ChangeLog:

* config/riscv/riscv.md (prefetch): Add alternative "r".

gcc/testsuite/ChangeLog:

* gcc.target/riscv/pr118241-b.cc: New test.

Signed-off-by: Vineet Gupta 
(cherry picked from commit f2a3ab7ebf3c40da77f54e8329272fe048ec48a6)

Diff:
---
 gcc/config/riscv/riscv.md|  2 +-
 gcc/testsuite/gcc.target/riscv/pr118241-b.cc | 33 
 2 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 893c925b6b94..f5ec0c5170f5 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -4402,7 +4402,7 @@
 )
 
 (define_insn "prefetch"
-  [(prefetch (match_operand 0 "prefetch_operand" "Q")
+  [(prefetch (match_operand 0 "prefetch_operand" "Qr")
  (match_operand 1 "imm5_operand" "i")
  (match_operand 2 "const_int_operand" "n"))]
   "TARGET_ZICBOP"
diff --git a/gcc/testsuite/gcc.target/riscv/pr118241-b.cc 
b/gcc/testsuite/gcc.target/riscv/pr118241-b.cc
new file mode 100644
index ..b2cc73faa3a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr118241-b.cc
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=rv64imafdc_zba_zbb_zbs_zicbom_zicbop -mabi=lp64d" 
} */
+
+/* Reduced from libsanitizer::asan_allocator.  */
+
+enum a { c };
+class d;
+struct e {
+  long count;
+  void *batch[];
+};
+template  class f {
+public:
+  void g() {
+if (e *b = h->i())
+  for (; b->count;)
+if (6 < b->count)
+  __builtin_prefetch(b->batch[6]);
+  }
+  d *h;
+};
+class d {
+public:
+  e *i();
+};
+struct j {
+  f k;
+  j(a);
+  void l() { k.g(); }
+} a(c);
+void m() { a.l(); }
+
+/* { dg-final { scan-assembler-times "prefetch.r\t0\\(\[a-x0-9\]+\\)" 1 } } */


[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for unsigned scalar SAT_MUL from uint128_t

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:85ae875672710f92b9d3253bd017cf7516970b9d

commit 85ae875672710f92b9d3253bd017cf7516970b9d
Author: Pan Li 
Date:   Wed Jul 2 10:52:25 2025 +0800

RISC-V: Add test cases for unsigned scalar SAT_MUL from uint128_t

Add run and tree-optimized check for unsigned scalar SAT_MUL from
uint128_t.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_arith_data.h: Add test data for
run test.
* gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-1-u32-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-1-u64-from-u128.c: New test.
* gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u128.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit 65c40c0211f01579d1e7f259271cb79a8a19d533)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 23 
 .../gcc.target/riscv/sat/sat_arith_data.h  | 62 ++
 .../riscv/sat/sat_u_mul-1-u16-from-u128.c  | 11 
 .../riscv/sat/sat_u_mul-1-u32-from-u128.c  | 11 
 .../riscv/sat/sat_u_mul-1-u64-from-u128.c  | 11 
 .../riscv/sat/sat_u_mul-1-u8-from-u128.c   | 11 
 .../riscv/sat/sat_u_mul-run-1-u16-from-u128.c  | 16 ++
 .../riscv/sat/sat_u_mul-run-1-u32-from-u128.c  | 16 ++
 .../riscv/sat/sat_u_mul-run-1-u64-from-u128.c  | 16 ++
 .../riscv/sat/sat_u_mul-run-1-u8-from-u128.c   | 16 ++
 10 files changed, 193 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index 84f013ffa95e..3de89f47ae09 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -4,6 +4,8 @@
 #include 
 #include 
 
+typedef __uint128_t uint128_t;
+
 
/**/
 /* Saturation Add (unsigned and signed)   
*/
 
/**/
@@ -648,4 +650,25 @@ sat_s_trunc_##WT##_to_##NT##_fmt_8 (WT x) \
 #define RUN_SAT_S_TRUNC_FMT_8(NT, WT, x) sat_s_trunc_##WT##_to_##NT##_fmt_8 (x)
 #define RUN_SAT_S_TRUNC_FMT_8_WRAP(NT, WT, x) RUN_SAT_S_TRUNC_FMT_8(NT, WT, x)
 
+/**/
+/* Saturation Mult (unsigned and signed)  */
+/**/
+
+#define DEF_SAT_U_MUL_FMT_1(NT, WT) \
+NT __attribute__((noinline))\
+sat_u_mul_##NT##_from_##WT##_fmt_1 (NT a, NT b) \
+{   \
+  WT x = (WT)a * (WT)b; \
+  NT max = -1;  \
+  if (x > (WT)(max))\
+return max; \
+  else  \
+return (NT)x;   \
+}
+
+#define DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) DEF_SAT_U_MUL_FMT_1(NT, WT)
+#define RUN_SAT_U_MUL_FMT_1(NT, WT, a, b) \
+  sat_u_mul_##NT##_from_##WT##_fmt_1 (a, b)
+#define RUN_SAT_U_MUL_FMT_1_WRAP(NT, WT, a, b) RUN_SAT_U_MUL_FMT_1(NT, WT, a, 
b)
+
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith_data.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith_data.h
index f1006889d212..bd33ff1769a4 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith_data.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith_data.h
@@ -12,6 +12,7 @@
 
 #define TEST_BINARY_STRUCT_NAME(T, NAME) test_##T##_##NAME##_s
 #define TEST_BINARY_STRUCT_DECL(T, NAME) struct TEST_BINARY_STRUCT_NAME(T, 
NAME)
+#define TEST_BINARY_STRUCT_DECL_WRAP(T, NAME) TEST_BINARY_STRUCT_DECL(T, NAME)
 #define TEST_BINARY_STRUCT(T, NAME)   \
   struct TEST_BINARY_STRUCT_NAME(T, NAME) \
 { \
@@ -37,6 +38,11 @@ TEST_BINARY_STRUCT (uint16_t, usadd)
 TEST_BINARY_STRUCT (uint32_t, usadd)
 TEST_BINARY_STRUCT (uint64_t, usadd)
 
+TEST_BINARY_STRUCT (uint8_t, usmul)
+TEST_BINARY_STRUCT (uint16_t, usmul)
+TEST_BINARY_STRUCT (uint32_t, usmul)
+TEST_BINARY_STRUCT (uint64_t, usmul)
+
 TEST_BINARY_STRUCT (int8_t,  ssadd)
 TEST_BINARY_STRUCT (int16_t, ssadd)
 TEST_BINARY_STRUCT (int32_t, ssadd)
@@ -433,4 +439,60 @@ TEST_BINARY_STRUCT_DECL(int64_t, sssub) 
TEST_BINARY_DATA(int64_t, sssub)[] =
   {  9223372036854775806ll,   9223372036854775800ll,   

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: prefetch: const offset needs to have 5 bits zero, not 4

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:ae406c5d93ad230c5861717700ed25ef45b8a999

commit ae406c5d93ad230c5861717700ed25ef45b8a999
Author: Vineet Gupta 
Date:   Fri Jul 4 12:33:09 2025 -0700

RISC-V: prefetch: const offset needs to have 5 bits zero, not 4

Spotted this by chance as I saw a similar fixup in comment.
From comments, I think this is needed, but I've not hit any issues due
to this.

gcc/ChangeLog:

* config/riscv/predicates.md (prefetch_operand): mack 5 bits.

Signed-off-by: Vineet Gupta 
(cherry picked from commit b960201091fcab631a34a8c8d5b30e9f297dfbe5)

Diff:
---
 gcc/config/riscv/predicates.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 061904b6e000..8baad2fae7a9 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -33,11 +33,11 @@
 (define_predicate "prefetch_operand"
   (ior (match_operand 0 "register_operand")
(and (match_test "const_arith_operand (op, VOIDmode)")
-   (match_test "(INTVAL (op) & 0xf) == 0"))
+   (match_test "(INTVAL (op) & 0x1f) == 0"))
(and (match_code "plus")
(match_test "register_operand (XEXP (op, 0), word_mode)")
(match_test "const_arith_operand (XEXP (op, 1), VOIDmode)")
-   (match_test "(INTVAL (XEXP (op, 1)) & 0xf) == 0"
+   (match_test "(INTVAL (XEXP (op, 1)) & 0x1f) == 0"
 
 (define_predicate "lui_operand"
   (and (match_code "const_int")


[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsadd.vv combine case 0 with GR2VR cost 0, 2 and 15

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:60e19287795ef881f897b087a5519eec12d56455

commit 60e19287795ef881f897b087a5519eec12d56455
Author: Pan Li 
Date:   Thu Jul 3 17:16:21 2025 +0800

RISC-V: Add test for vec_duplicate + vsadd.vv combine case 0 with GR2VR 
cost 0, 2 and 15

Add asm dump check and run test for vec_duplicate + vsadd.vv
combine to vsadd.vx, with the GR2VR cost is 0, 2 and 15.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test
helper macros.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
data for run test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i8.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit ea86a5a111f3bc883035b0783fe419e5bd2722a0)

Diff:
---
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h |  49 --
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h   | 196 +
 .../riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i16.c   |  17 ++
 .../riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i32.c   |  17 ++
 .../riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i64.c   |  17 ++
 .../riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i8.c|  17 ++
 18 files changed, 311 insertions(+), 14 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
index c86d77c3d4e6..25652ec0e7b8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
@@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T)
 /* { dg-final { scan-assembler-times {vrem.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vmax.vx} 2 } } */
 /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */
+/* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
index f6524cb8398f..cbf4e2898243 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
@@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T)
 /* { dg-final { scan-assembler-times {vrem.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vmax.vx} 2 } } */
 /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */
+/* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
index f1e8627c8d98..e5519e6699fd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
@@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T)
 /* { dg-final { scan-assembler-times {vrem.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vmax.vx} 2 } } */
 /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */
+/* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
index 9b0cbd29603a..beaf1741efba 100644
--- a/gcc/testsuite

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement unsigned scalar SAT_MUL from uint128_t

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:03d7be4ac9b0f81757ab3cffbf42478d733d5c56

commit 03d7be4ac9b0f81757ab3cffbf42478d733d5c56
Author: Pan Li 
Date:   Wed Jul 2 10:35:10 2025 +0800

RISC-V: Implement unsigned scalar SAT_MUL from uint128_t

This patch would like to implement the SAT_MUL scalar unsigned from
uint128_t, aka:

  NT __attribute__((noinline))
  sat_u_mul_##NT##_fmt_1 (NT a, NT b)
  {
uint128_t x = (uint128_t)a * (uint128_t)b;
NT max = -1;
if (x > (uint128_t)(max))
  return max;
else
  return (NT)x;
  }

Take uint64_t and uint8_t as example:

Before this patch for uint8_t:
  10   │ sat_u_mul_uint8_t_from_uint128_t_fmt_1:
  11   │ mulhu   a5,a0,a1
  12   │ mul a0,a0,a1
  13   │ bne a5,zero,.L3
  14   │ li  a5,255
  15   │ bleua0,a5,.L4
  16   │ .L3:
  17   │ li  a0,255
  18   │ .L4:
  19   │ andia0,a0,0xff
  20   │ ret

After this patch for uint8_t:
  10   │ sat_u_mul_uint8_t_from_uint128_t_fmt_1:
  11   │ mul a0,a0,a1
  12   │ li  a5,255
  13   │ sltua5,a5,a0
  14   │ neg a5,a5
  15   │ or  a0,a0,a5
  16   │ andia0,a0,0xff
  17   │ ret

Before this patch for uint64_t:
  10   │ sat_u_mul_uint64_t_from_uint128_t_fmt_1:
  11   │ mulhu   a5,a0,a1
  12   │ mul a0,a0,a1
  13   │ beq a5,zero,.L4
  14   │ li  a0,-1
  15   │ .L4:
  16   │ ret

After this patch for uint64_t:
  10   │ sat_u_mul_uint64_t_from_uint128_t_fmt_1:
  11   │ mulhsu  a5,a1,a0
  12   │ mul a0,a0,a1
  13   │ sneza5,a5
  14   │ neg a5,a5
  15   │ or  a0,a0,a5
  16   │ ret

gcc/ChangeLog:

* config/riscv/riscv-protos.h (riscv_expand_usmul): Add new func
decl.
* config/riscv/riscv.cc (riscv_expand_xmode_usmul): Add new func
to expand Xmode SAT_MUL.
(riscv_expand_non_xmode_usmul): Ditto but for non-Xmode.
(riscv_expand_usmul): Add new func to implment SAT_MUL.
* config/riscv/riscv.md (usmul3): Add new pattern to match
standard name usmul.

Signed-off-by: Pan Li 
(cherry picked from commit 62b99e84b886fbdd70118cc260ae0f2516c2f3f5)

Diff:
---
 gcc/config/riscv/riscv-protos.h |  1 +
 gcc/config/riscv/riscv.cc   | 82 +
 gcc/config/riscv/riscv.md   | 11 ++
 3 files changed, 94 insertions(+)

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index a0331204479f..38f63ea84248 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -137,6 +137,7 @@ extern void riscv_expand_usadd (rtx, rtx, rtx);
 extern void riscv_expand_ssadd (rtx, rtx, rtx);
 extern void riscv_expand_ussub (rtx, rtx, rtx);
 extern void riscv_expand_sssub (rtx, rtx, rtx);
+extern void riscv_expand_usmul (rtx, rtx, rtx);
 extern void riscv_expand_ustrunc (rtx, rtx);
 extern void riscv_expand_sstrunc (rtx, rtx);
 extern int riscv_register_move_cost (machine_mode, reg_class_t, reg_class_t);
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index ecdb61e18992..e09c189add92 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -13347,6 +13347,88 @@ riscv_expand_sssub (rtx dest, rtx x, rtx y)
   emit_move_insn (dest, gen_lowpart (mode, xmode_dest));
 }
 
+/* Implement the Xmode usmul.
+
+   b = SAT_MUL (a, b);
+   =>
+   _1 = a * b;
+   _2 = mulhu (a, b);
+   _overflow_p = _2 == 0;
+   _mask = - _overflow_p;
+   b = _1 | _mask;
+ */
+
+static void
+riscv_expand_xmode_usmul (rtx dest, rtx x, rtx y)
+{
+  machine_mode mode = GET_MODE (dest);
+
+  gcc_assert (mode == Xmode);
+
+  rtx mul = gen_reg_rtx (Xmode);
+  rtx mulhu = gen_reg_rtx (Xmode);
+  rtx overflow_p = gen_reg_rtx (Xmode);
+
+  riscv_emit_binary (MULT, mul, x, y);
+
+  if (TARGET_64BIT)
+emit_insn (gen_usmuldi3_highpart (mulhu, x, y));
+  else
+emit_insn (gen_usmulsi3_highpart (mulhu, x, y));
+
+  riscv_emit_binary (NE, overflow_p, mulhu, CONST0_RTX (Xmode));
+  riscv_emit_unary (NEG, overflow_p, overflow_p);
+  riscv_emit_binary (IOR, dest, mul, overflow_p);
+}
+
+/* Implement the non-Xmode usmul.
+
+   b = SAT_MUL (a, b);
+   =>
+   _1 = a * b;
+   _max = (T)-1
+   _overflow_p = _1 > _max;
+   _mask = - _overflow_p;
+   b = _1 | _mask;
+ */
+
+static void
+riscv_expand_non_xmode_usmul (rtx dest, rtx x, rtx y)
+{
+  machine_mode mode = GET_MODE (dest);
+  unsigned bitsize = GET_MODE_BITSIZE (mode).to_constant ();
+
+  gcc_assert (mode != Xmode);
+
+  rtx xmode_x = riscv_extend_to_xmode_reg (x, mode, ZERO_EXTEND);
+  rtx xmode_y = riscv_extend_to_xmode_reg (y, mode, ZERO_EXTEND);
+  rtx xmode_mul = gen_reg_rtx (Xmode);
+  rtx mul_max = gen_reg_rtx (Xmode);
+  rtx overflow_p = gen_reg_rtx (Xmode);

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:ede8592ee23e90d478ec1a4d516a275ab995225e

commit ede8592ee23e90d478ec1a4d516a275ab995225e
Author: panciyan 
Date:   Tue Jun 24 09:58:14 2025 +0800

RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2

This patch adds testcase for form2, as shown below:

T __attribute__((noinline))  \
sat_s_add_imm_##T##_fmt_2##_##INDEX (T x)\
{\
  T sum = (T)((UT)x + (UT)IMM);   \
  return ((x ^ sum) < 0 && (x ^ IMM) >= 0) ? \
(-(T)(x < 0) ^ MAX) : sum; \
}

Passed the rv64gcv regression test.

Signed-off-by: Ciyan Pan 
gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add signed scalar SAT_ADD IMM 
form2.
* gcc.target/riscv/sat/sat_s_add_imm-2-i16.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm-2-i32.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm-2-i64.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm-2-i8.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i16.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i32.c: New test.
* gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i8.c: New test.

(cherry picked from commit d6ed12ed5ebac8e50da9defea6af832039782cbf)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 12 +
 .../gcc.target/riscv/sat/sat_s_add_imm-2-i16.c | 57 ++
 .../gcc.target/riscv/sat/sat_s_add_imm-2-i32.c | 54 
 .../gcc.target/riscv/sat/sat_s_add_imm-2-i64.c | 48 ++
 .../gcc.target/riscv/sat/sat_s_add_imm-2-i8.c  | 49 +++
 .../gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c | 48 ++
 .../gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c | 48 ++
 .../gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c | 48 ++
 .../gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c  | 49 +++
 .../riscv/sat/sat_s_add_imm_type_check-2-i16.c |  9 
 .../riscv/sat/sat_s_add_imm_type_check-2-i32.c |  9 
 .../riscv/sat/sat_s_add_imm_type_check-2-i8.c  |  9 
 12 files changed, 440 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index 6e97cae96e6e..84f013ffa95e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -227,6 +227,18 @@ sat_s_add_imm_##T##_fmt_1##_##INDEX (T x) \
 #define RUN_SAT_S_ADD_IMM_FMT_1(INDEX, T, x, expect) \
   if (sat_s_add_imm##_##T##_fmt_1##_##INDEX(x) != expect) __builtin_abort ()
 
+#define DEF_SAT_S_ADD_IMM_FMT_2(INDEX, T, UT, IMM, MIN, MAX) \
+T __attribute__((noinline))  \
+sat_s_add_imm_##T##_fmt_2##_##INDEX (T x)\
+{\
+  T sum = (T)((UT)x + (UT)IMM);   \
+  return ((x ^ sum) < 0 && (x ^ IMM) >= 0) ? \
+(-(T)(x < 0) ^ MAX) : sum; \
+}
+
+#define RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect) \
+  if (sat_s_add_imm##_##T##_fmt_2##_##INDEX(x) != expect) __builtin_abort ()
+
 
/**/
 /* Saturation Sub (Unsigned and Signed)   
*/
 
/**/
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
new file mode 100644
index ..14c5d511aabb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
@@ -0,0 +1,57 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized 
-fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_imm_int16_t_fmt_2_0:
+** addi\s+[atx][0-9]+,\s*a0,\s*-7
+** xori\s+[atx][0-9]+,\s*a0,\s*-7
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+a0,\s*a0,\s*63
+** li\s+[atx][0-9]+,\s*32768
+** addi\s+[atx][0-9]+,\

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsadd.vv to vsadd.vx on GR2VR cost

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:b3df1cb98ddf0975d10ba741a61a5d8ea97c339b

commit b3df1cb98ddf0975d10ba741a61a5d8ea97c339b
Author: Pan Li 
Date:   Thu Jul 3 17:07:44 2025 +0800

RISC-V: Combine vec_duplicate + vsadd.vv to vsadd.vx on GR2VR cost

This patch would like to combine the vec_duplicate + vsadd.vv to the
vsadd.vx.  From example as below code.  The related pattern will depend
on the cost of vec_duplicate from GR2VR.  Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.

Assume we have example code like below, GR2VR cost is 0.

  #define DEF_SAT_S_ADD(T, UT, MIN, MAX) \
  T  \
  test_##T##_sat_add (T x, T y)  \
  {  \
T sum = (UT)x + (UT)y;   \
return (x ^ y) < 0   \
  ? sum  \
  : (sum ^ x) >= 0   \
? sum\
: x < 0 ? MIN : MAX; \
  }

  DEF_SAT_S_ADD(int32_t, uint32_t, INT32_MIN, INT32_MAX)
  DEF_VX_BINARY_CASE_2_WRAP(T, SAT_S_ADD_FUNC(T), sat_add)

Before this patch:
  10   │ test_vx_binary_or_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ vsetvli a5,zero,e32,m1,ta,ma
  13   │ vmv.v.x v2,a2
  14   │ sllia3,a3,32
  15   │ srlia3,a3,32
  16   │ .L3:
  17   │ vsetvli a5,a3,e32,m1,ta,ma
  18   │ vle32.v v1,0(a1)
  19   │ sllia4,a5,2
  20   │ sub a3,a3,a5
  21   │ add a1,a1,a4
  22   │ vsadd.vv v1,v1,v2
  23   │ vse32.v v1,0(a0)
  24   │ add a0,a0,a4
  25   │ bne a3,zero,.L3

After this patch:
  10   │ test_vx_binary_or_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ sllia3,a3,32
  13   │ srlia3,a3,32
  14   │ .L3:
  15   │ vsetvli a5,a3,e32,m1,ta,ma
  16   │ vle32.v v1,0(a1)
  17   │ sllia4,a5,2
  18   │ sub a3,a3,a5
  19   │ add a1,a1,a4
  20   │ vsadd.vx v1,v1,a2
  21   │ vse32.v v1,0(a0)
  22   │ add a0,a0,a4
  23   │ bne a3,zero,.L3

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add
new case SS_PLUS.
(expand_vx_binary_vec_vec_dup): Ditto.
* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
* config/riscv/vector-iterators.md: Add new op ss_plus.

Signed-off-by: Pan Li 
(cherry picked from commit 0601f461649323c7d6c7bb33c6839f60949116c2)

Diff:
---
 gcc/config/riscv/riscv-v.cc  | 2 ++
 gcc/config/riscv/riscv.cc| 1 +
 gcc/config/riscv/vector-iterators.md | 4 ++--
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index ce1633c72dee..a5ab8dd4e2fe 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -5544,6 +5544,7 @@ expand_vx_binary_vec_dup_vec (rtx op_0, rtx op_1, rtx 
op_2,
 case SMIN:
 case UMIN:
 case US_PLUS:
+case SS_PLUS:
   icode = code_for_pred_scalar (code, mode);
   break;
 case MINUS:
@@ -5584,6 +5585,7 @@ expand_vx_binary_vec_vec_dup (rtx op_0, rtx op_1, rtx 
op_2,
 case UMIN:
 case US_PLUS:
 case US_MINUS:
+case SS_PLUS:
   icode = code_for_pred_scalar (code, mode);
   break;
 default:
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 167e78d41ef4..ecdb61e18992 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3997,6 +3997,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int 
outer_code, int opno ATTRIBUTE_UN
case UMOD:
case US_PLUS:
case US_MINUS:
+   case SS_PLUS:
  *total = get_vector_binary_rtx_cost (op, scalar2vr_cost);
  break;
default:
diff --git a/gcc/config/riscv/vector-iterators.md 
b/gcc/config/riscv/vector-iterators.md
index 782544423c41..fd0959c1a4b4 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -4042,11 +4042,11 @@
 ])
 
 (define_code_iterator any_int_binop_no_shift_v_vdup [
-  plus minus and ior xor mult div udiv mod umod smax umax smin umin us_plus 
us_minus
+  plus minus and ior xor mult div udiv mod umod smax umax smin umin us_plus 
us_minus ss_plus
 ])
 
 (define_code_iterator any_int_binop_no_shift_vdup_v [
-  plus minus and ior xor mult smax umax smin umin us_plus
+  plus minus and ior xor mult smax umax smin umin us_plus ss_plus
 ])
 
 (define_code_iterator any_int_unop [neg not])


[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsadd.vv combine case 1 with GR2VR cost 0, 1 and 2

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:2c8e307289d06a3a59dcf2599d5502f26ab04352

commit 2c8e307289d06a3a59dcf2599d5502f26ab04352
Author: Pan Li 
Date:   Thu Jul 3 17:17:28 2025 +0800

RISC-V: Add test for vec_duplicate + vsadd.vv combine case 1 with GR2VR 
cost 0, 1 and 2

Add asm dump check test for vec_duplicate + vsadd.vv combine to
vsadd.vx, with the GR2VR cost is 0, 1 and 2.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto.

Signed-off-by: Pan Li 
(cherry picked from commit 2f19d9408477829ab7de465310fa0068be0f43ff)

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c  | 2 ++
 12 files changed, 24 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
index 199f8a758b44..92f1b7b15965 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
@@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, 
VX_BINARY_FUNC_BODY_X8)
 DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X8)
 DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8)
 DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8)
+DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, 
VX_BINARY_FUNC_BODY_X8)
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */
@@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, 
VX_BINARY_FUNC_BODY_X8)
 /* { dg-final { scan-assembler {vrem.vx} } } */
 /* { dg-final { scan-assembler {vmax.vx} } } */
 /* { dg-final { scan-assembler {vmin.vx} } } */
+/* { dg-final { scan-assembler {vsadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
index 392f4fe106ef..31594cec3595 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
@@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, 
VX_BINARY_FUNC_BODY_X4)
 DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X4)
 DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4)
 DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4)
+DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, 
VX_BINARY_FUNC_BODY_X4)
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */
@@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, 
VX_BINARY_FUNC_BODY_X4)
 /* { dg-final { scan-assembler {vrem.vx} } } */
 /* { dg-final { scan-assembler {vmax.vx} } } */
 /* { dg-final { scan-assembler {vmin.vx} } } */
+/* { dg-final { scan-assembler {vsadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
index d22c3875948d..02e03ec4d3f8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
@@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, 
VX_BINARY_FUNC_BODY)
 DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY)
 DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINA

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add basic instrumentation to fusion detection

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:d7f7353440ff3c6856cf1bfb4bb79c86ed4c3efe

commit d7f7353440ff3c6856cf1bfb4bb79c86ed4c3efe
Author: Shreya Munnangi 
Date:   Thu Jul 3 21:03:03 2025 -0600

[RISC-V] Add basic instrumentation to fusion detection

We were looking to evaluate some changes from Artemiy that improve GCC's
ability to discover fusible instruction pairs.  There was no good way to get
any static data out of the compiler about what kinds of fusions were 
happening.
Yea, you could grub around the .sched dumps looking for the magic '+'
annotation, then look around at the slim RTL representation and make an
educated guess about what fused.  But boy that was inconvenient.

All we really needed was a quick note in the dump file that the target hook
found a fusion pair and what kind was discovered.  That made it easy to spot
invalid fusions, evaluate the effectiveness of Artemiy's work, 
write/discover
testcases for existing fusions and implement new fusions.

So from a codegen standpoint this is NFC, it only affects dump file output.

It's gone through the usual testing and I'll wait for pre-commit CI to churn
through it before moving forward.

gcc/
* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Add basic
instrumentation to all cases where fusion is detected.  Fix
minor formatting goofs found in the process.

(cherry picked from commit 053a678cc59a0c8adbdbb78802ff33a619b57b41)

Diff:
---
 gcc/config/riscv/riscv.cc | 80 +--
 1 file changed, 64 insertions(+), 16 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 8fa1082f7c13..167e78d41ef4 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -10253,11 +10253,15 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn 
*curr)
  && CONST_INT_P (XEXP (SET_SRC (prev_set), 1))
  && CONST_INT_P (XEXP (SET_SRC (curr_set), 1))
  && INTVAL (XEXP (SET_SRC (prev_set), 1)) == 32
- && (( INTVAL (XEXP (SET_SRC (curr_set), 1)) == 32
-   && riscv_fusion_enabled_p(RISCV_FUSE_ZEXTW) )
- || ( INTVAL (XEXP (SET_SRC (curr_set), 1)) < 32
-  && riscv_fusion_enabled_p(RISCV_FUSE_ZEXTWS
-   return true;
+ && ((INTVAL (XEXP (SET_SRC (curr_set), 1)) == 32
+  && riscv_fusion_enabled_p (RISCV_FUSE_ZEXTW) )
+ || (INTVAL (XEXP (SET_SRC (curr_set), 1)) < 32
+ && riscv_fusion_enabled_p (RISCV_FUSE_ZEXTWS
+   {
+ if (dump_file)
+   fprintf (dump_file, "RISCV_FUSE_ZEXTWS\n");
+ return true;
+   }
 }
 
   if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_ZEXTH)
@@ -10278,7 +10282,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn 
*curr)
  && CONST_INT_P (XEXP (SET_SRC (curr_set), 1))
  && INTVAL (XEXP (SET_SRC (prev_set), 1)) == 48
  && INTVAL (XEXP (SET_SRC (curr_set), 1)) == 48)
-   return true;
+   {
+ if (dump_file)
+   fprintf (dump_file,"RISCV_FUSE_ZEXTH\n");
+ return true;
+   }
 }
 
   if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LDINDEXED)
@@ -10297,7 +10305,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn 
*curr)
  && GET_CODE (SET_SRC (prev_set)) == PLUS
  && REG_P (XEXP (SET_SRC (prev_set), 0))
  && REG_P (XEXP (SET_SRC (prev_set), 1)))
-   return true;
+   {
+ if (dump_file)
+   fprintf (dump_file, "RISCV_FUSE_LDINDEXED\n");
+ return true;
+   }
 
   /* We are trying to match the following:
   prev (add) == (set (reg:DI rD)
@@ -10313,7 +10325,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn 
*curr)
  && GET_CODE (SET_SRC (prev_set)) == PLUS
  && REG_P (XEXP (SET_SRC (prev_set), 0))
  && REG_P (XEXP (SET_SRC (prev_set), 1)))
-   return true;
+   {
+ if (dump_file)
+   fprintf (dump_file, "RISCV_FUSE_LDINDEXED\n");
+ return true;
+   }
 }
 
   if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LDPREINCREMENT)
@@ -10332,7 +10348,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn 
*curr)
  && GET_CODE (SET_SRC (prev_set)) == PLUS
  && REG_P (XEXP (SET_SRC (prev_set), 0))
  && CONST_INT_P (XEXP (SET_SRC (prev_set), 1)))
-   return true;
+   {
+ if (dump_file)
+   fprintf (dump_file, "RISCV_FUSE_LDPREINCREMENT\n");
+ return true;
+   }
 }
 
   if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LUI_ADDI)
@@ -10350,7 +10370,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn 
*curr)
  && (GET_CODE (SET_SRC (prev_set)) == HIGH
  || (CONST_INT_P (SET_SRC (prev_set))
  && LUI_OPERAND (INTVAL (SET_SRC (prev_set))
-   return true;
+   {
+

[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Déplacement variables après réallocation

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:16b300980924ac5d361b271d026aac9296e5c326

commit 16b300980924ac5d361b271d026aac9296e5c326
Author: Mikael Morin 
Date:   Mon Jul 7 11:46:08 2025 +0200

Déplacement variables après réallocation

Diff:
---
 gcc/fortran/gfortran.h |   4 --
 gcc/fortran/trans-array.cc | 144 -
 gcc/fortran/trans-expr.cc  |  14 ++---
 3 files changed, 84 insertions(+), 78 deletions(-)

diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h
index 6848bd1762d3..69367e638c5b 100644
--- a/gcc/fortran/gfortran.h
+++ b/gcc/fortran/gfortran.h
@@ -2028,10 +2028,6 @@ typedef struct gfc_symbol
   /* Set if this should be passed by value, but is not a VALUE argument
  according to the Fortran standard.  */
   unsigned pass_as_value:1;
-  /* Set if an allocatable array variable has been allocated in the current
- scope. Used in the suppression of uninitialized warnings in reallocation
- on assignment.  */
-  unsigned allocated_in_scope:1;
   /* Set if an external dummy argument is called with different argument lists.
  This is legal in Fortran, but can cause problems with autogenerated
  C prototypes for C23.  */
diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 7be2d7b11a62..6af8ee0a9544 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -3471,12 +3471,15 @@ gfc_conv_ss_descriptor (stmtblock_t * block, gfc_ss * 
ss, int base)
&& DECL_P (TREE_OPERAND (tmp, 0)))
|| (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (se.expr))
&& TREE_CODE (se.expr) == COMPONENT_REF
-   && GFC_CLASS_TYPE_P (TREE_TYPE (TREE_OPERAND (se.expr, 0))
+   && GFC_CLASS_TYPE_P (TREE_TYPE (TREE_OPERAND (se.expr, 0)
+ && !ss->is_alloc_lhs)
tmp = gfc_evaluate_now (tmp, block);
   info->data = tmp;
 
   tmp = gfc_conv_array_offset (se.expr);
-  info->offset = gfc_evaluate_now (tmp, block);
+  if (!ss->is_alloc_lhs)
+   tmp = gfc_evaluate_now (tmp, block);
+  info->offset = tmp;
 
   /* Make absolutely sure that the saved_offset is indeed saved
 so that the variable is still accessible after the loops
@@ -4769,13 +4772,12 @@ gfc_trans_scalarized_loop_boundary (gfc_loopinfo * 
loop, stmtblock_t * body)
 
 static void
 evaluate_bound (stmtblock_t *block, tree *bounds, gfc_expr ** values,
-   tree desc, int dim, bool lbound, bool deferred)
+   tree desc, int dim, bool lbound, bool deferred, bool save_value)
 {
   gfc_se se;
   gfc_expr * input_val = values[dim];
   tree *output = &bounds[dim];
 
-
   if (input_val)
 {
   /* Specified section bound.  */
@@ -4801,7 +4803,8 @@ evaluate_bound (stmtblock_t *block, tree *bounds, 
gfc_expr ** values,
   *output = lbound ? gfc_conv_array_lbound (desc, dim) :
 gfc_conv_array_ubound (desc, dim);
 }
-  *output = gfc_evaluate_now (*output, block);
+  if (save_value)
+*output = gfc_evaluate_now (*output, block);
 }
 
 
@@ -4834,18 +4837,18 @@ gfc_conv_section_startstride (stmtblock_t * block, 
gfc_ss * ss, int dim)
  || ar->dimen_type[dim] == DIMEN_THIS_IMAGE);
   desc = info->descriptor;
   stride = ar->stride[dim];
-
+  bool save_value = !ss->is_alloc_lhs;
 
   /* Calculate the start of the range.  For vector subscripts this will
  be the range of the vector.  */
   evaluate_bound (block, info->start, ar->start, desc, dim, true,
- ar->as->type == AS_DEFERRED);
+ ar->as->type == AS_DEFERRED, save_value);
 
   /* Similarly calculate the end.  Although this is not used in the
  scalarizer, it is needed when checking bounds and where the end
  is an expression with side-effects.  */
   evaluate_bound (block, info->end, ar->end, desc, dim, false,
- ar->as->type == AS_DEFERRED);
+ ar->as->type == AS_DEFERRED, save_value);
 
 
   /* Calculate the stride.  */
@@ -4856,7 +4859,11 @@ gfc_conv_section_startstride (stmtblock_t * block, 
gfc_ss * ss, int dim)
   gfc_init_se (&se, NULL);
   gfc_conv_expr_type (&se, stride, gfc_array_index_type);
   gfc_add_block_to_block (block, &se.pre);
-  info->stride[dim] = gfc_evaluate_now (se.expr, block);
+  tree value = se.expr;
+  if (save_value)
+   info->stride[dim] = gfc_evaluate_now (value, block);
+  else
+   info->stride[dim] = value;
 }
 }
 
@@ -5991,7 +5998,10 @@ gfc_set_delta (gfc_loopinfo *loop)
 gfc_array_index_type,
 info->start[dim], tmp);
 
- info->delta[dim] = gfc_evaluate_now (tmp, &outer_loop->pre);
+ if (ss->is_alloc_lhs)
+   info->delta[dim] = tmp;
+ else 
+   info->delta[dim] = gfc_evaluate_now (tmp, &outer_loop->pre);
}
}
 }
@@ -6779,8 +6789,6 @@ gfc_array_allocate (gfc_se * se, gfc_exp

[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] fortran: generate array reallocation out of loops

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:ab0564fe6bd461b20c1f430fc3b8f3447270299a

commit ab0564fe6bd461b20c1f430fc3b8f3447270299a
Author: Mikael Morin 
Date:   Sun Jul 6 16:56:16 2025 +0200

fortran: generate array reallocation out of loops

Generate the array reallocation on assignment code before entering the
scalarization loops.  This doesn't move the generated code itself,
which was already put out of the outermost loop, but only changes the
current scope at the time the code is generated.  This is a prerequisite
for a followup patch that makes the reallocation code create new
variables.  Without this change the new variables would be declared in
the innermost loop body and couldn't be used outside of it.

gcc/fortran/ChangeLog:

* trans-expr.cc (gfc_trans_assignment_1): Generate array
reallocation code before entering the scalarisation loops.

Diff:
---
 gcc/fortran/trans-expr.cc | 20 +++-
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index 3e0d763d2fb0..65d0ee4ff235 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -12943,6 +12943,7 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
   rhs_caf_attr = gfc_caf_attr (expr2, false, &rhs_refs_comp);
 }
 
+  tree reallocation = NULL_TREE;
   if (lss != gfc_ss_terminator)
 {
   /* The assignment needs scalarization.  */
@@ -13011,6 +13012,14 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
  ompws_flags |= OMPWS_SCALARIZER_WS | OMPWS_SCALARIZER_BODY;
}
 
+  /* F2003: Allocate or reallocate lhs of allocatable array.  */
+  if (realloc_flag)
+   {
+ realloc_lhs_warning (expr1->ts.type, true, &expr1->where);
+ ompws_flags &= ~OMPWS_SCALARIZER_WS;
+ reallocation = gfc_alloc_allocatable_for_assignment (&loop, expr1, 
expr2);
+   }
+
   /* Start the scalarized loop body.  */
   gfc_start_scalarized_body (&loop, &body);
 }
@@ -13319,15 +13328,8 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
  gfc_add_expr_to_block (&body, tmp);
}
 
-  /* F2003: Allocate or reallocate lhs of allocatable array.  */
-  if (realloc_flag)
-   {
- realloc_lhs_warning (expr1->ts.type, true, &expr1->where);
- ompws_flags &= ~OMPWS_SCALARIZER_WS;
- tmp = gfc_alloc_allocatable_for_assignment (&loop, expr1, expr2);
- if (tmp != NULL_TREE)
-   gfc_add_expr_to_block (&loop.code[expr1->rank - 1], tmp);
-   }
+  if (reallocation != NULL_TREE)
+   gfc_add_expr_to_block (&loop.code[loop.dimen - 1], reallocation);
 
   if (maybe_workshare)
ompws_flags &= ~OMPWS_SCALARIZER_BODY;


[gcc/redhat/heads/gcc-15-branch] (214 commits) Merge commit 'r15-9932-gf8f6879ae1eba077c5a2a4a743b21a81a23

2025-07-07 Thread Jakub Jelinek via Gcc-cvs
The branch 'redhat/heads/gcc-15-branch' was updated to point to:

 c138e88e24a8... Merge commit 'r15-9932-gf8f6879ae1eba077c5a2a4a743b21a81a23

It previously pointed to:

 b9def1721b12... Merge commit 'r15-9719-g7e580225e57086e335a16f9258d0401a21e

Diff:

Summary of changes (added commits):
---

  c138e88... Merge commit 'r15-9932-gf8f6879ae1eba077c5a2a4a743b21a81a23
  f8f6879... Daily bump. (*)
  17f282c... AVR: Fix a typo in avr-mcus.def. (*)
  7d27ffd... AVR: Add support for AVR32DAxxS, AVR64DAxxS, AVR128DAxxS de (*)
  980a8fe... Daily bump. (*)
  ea99ca7... Daily bump. (*)
  799dfe7... c++: -Wtemplate-body and tentative parsing [PR120575] (*)
  433fcdb... ada: Fix alignment violation for chain of aligned and misal (*)
  7b4e397... ada: Fix selection of Finalize subprogram in untagged case (*)
  e6e1d88... ada: Fix inefficient Unchecked_Conversion to large array ty (*)
  992fb2a... ada: Improved error message when size of descendant type ex (*)
  216fc3b... ada: Fix error on Designated_Storage_Model with extensions  (*)
  9fae682... Daily bump. (*)
  f9c4314... c++: Fix a pasto in the PR120471 fix [PR120940] (*)
  733cd21... Ada: Remove left-overs of front-end exception mechanism (*)
  2cb1108... middle-end: Fix complex lowering of cabs with no LHS [PR120 (*)
  6126909... libstdc++: Update LWG 4166 changes to concat_view::end() [P (*)
  6b19e40... c++: uninitialized TARGET_EXPR and constexpr [PR120684] (*)
  c612c50... libstdc++: Fix regression in std::uninitialized_fill for C+ (*)
  8b7a779... Fortran: Fix out of bounds access in structure constructor' (*)
  22b8806... ada: Fix alignment violation for mix of aligned and misalig (*)
  aa622ab... ada: Fix wrong finalization of constrained subtype of uncon (*)
  a30e425... ada: Fix missing error on too large Component_Size not mult (*)
  81645c6... ada: Refine sanity check in Insert_Actions (*)
  ce51aec... ada: Fix missing finalization with conditional expression i (*)
  36b7726... ada: Fix crash with Finalizable in corner case (*)
  181d761... ada: Fix crash with Finalizable in corner case (*)
  c9c6392... ada: Fix assertion failure on finalizable aggregate (*)
  4ea7021... ada: Fix wrong conversion of controlled array with represen (*)
  2498cbb... Fixup dropping REG_EQUAL note in ext-dce (*)
  8b3e6db... [committed][PR rtl-optimization/120550] Drop REG_EQUAL note (*)
  698fefe... Daily bump. (*)
  3b59959... Do not query further vector epilogues after a masked epilog (*)
  977b8fb... i386: Change Diamond Rapids feature detect when model numbe (*)
  9f44730... Daily bump. (*)
  98bc42f... testsuite: Fix up gcc.target/powerpc/builtin_altivec_tr_stx (*)
  79b82eb... Ada: Fix assertion failure for Finalizable aspect on tagged (*)
  7fdf475... c++: Fix up cp_build_array_ref COND_EXPR handling [PR120471 (*)
  fc36a90... libstdc++: Format %r, %x and %X using locale's time_put fac (*)
  c3a639d... s390: Add -fno-stack-protector to 3 tests (*)
  debd1cd... ada: Fix for compiler crash on function return with Relaxed (*)
  177050b... ada: Compiler fails on unchecked deallocation for constrain (*)
  25e6c44... ada: Small tweak to latest change (*)
  5bd0302... ada: Fix wrong finalization of constrained subtype of uncon (*)
  74cc201... ada: Dispatching call with mutably tagged objects (*)
  484fb60... ada: Fix wrong finalization of constrained array derived fr (*)
  54b5f78... ada: Small cleanup in the finalization machinery (*)
  affc5eb... ada: Fix wrong finalization of temporary constrained array  (*)
  ce86985... tailc: Handle musttail in case of non-cleaned-up cleanups,  (*)
  497cb08... testsuite: Fix up pr119318.c test for big-endian [PR120082] (*)
  a352fb3... Daily bump. (*)
  9b7f1ec... ada: Make class-wide Max_Size_In_Storage_Elements return a  (*)
  411c1ee... ada: Fix bogus error for pragma No_Component_Reordering on  (*)
  29042b6... ada: Record type Put_Image procedures omitting discriminant (*)
  cabca4d... ada: Fix crash on nested access-to-subprogram types (*)
  36332b8... ada: Fix internal error on Ghost aspect applied to Big_Inte (*)
  e94c683... ada: Fix internal error on expression function called for d (*)
  53d2ca1... libstdc++: Report compilation error on formatting "%d" from (*)
  4297261... Daily bump. (*)
  ccaff41... Daily bump. (*)
  06a26f4... Fix compilation of concatenation with illegal character con (*)
  80c55b1... Ada: Fix assertion failure on problematic container aggrega (*)
  c0a55fc... Daily bump. (*)
  5808dd2... Fix misoptimization of CONSTRUCTOR with reverse SSO (*)
  1b8a32a... Fortran: follow-up fix to checking of renamed-on-use interf (*)
  e4c99f1... Daily bump. (*)
  58323d4... Fortran: fix checking of renamed-on-use interface name [PR1 (*)
  8d600e9... Bump LTO_minor_version (*)
  59e5e86... tree-optimization/120729 - limit compile time in uninit_ana (*)
  d8a9467... tree-optimization/120654 - ICE with range query from IVOPTs (*)
  4a253f1... Daily bump. (*)
  f48873c... [RISC-V] Fix

[gcc] Created branch 'mikael/heads/stabilisation_descriptor_v01' in namespace 'refs/users'

2025-07-07 Thread Mikael Morin via Gcc-cvs
The branch 'mikael/heads/stabilisation_descriptor_v01' was created in namespace 
'refs/users' pointing to:

 d008ebc84597... Sauvegarde data


[gcc(refs/users/mikael/heads/stabilisation_descriptor_v01)] Sauvegarde data

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:d008ebc84597e5a5e89cdca5a031e3d4c75f1063

commit d008ebc84597e5a5e89cdca5a031e3d4c75f1063
Author: Mikael Morin 
Date:   Sun Jul 6 18:41:32 2025 +0200

Sauvegarde data

Diff:
---
 gcc/fortran/trans-array.cc | 20 ++--
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 6af8ee0a9544..5d1312bb8c4c 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -3420,6 +3420,17 @@ gfc_add_loop_ss_code (gfc_loopinfo * loop, gfc_ss * ss, 
bool subscript,
 }
 
 
+static bool
+non_saved_descriptor_data_p (tree descr, tree data)
+{
+  return DECL_P (data)
+|| (TREE_CODE (data) == ADDR_EXPR
+&& DECL_P (TREE_OPERAND (data, 0)))
+|| (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (descr))
+&& TREE_CODE (descr) == COMPONENT_REF
+&& GFC_CLASS_TYPE_P (TREE_TYPE (TREE_OPERAND (descr, 0;
+}
+
 /* Translate expressions for the descriptor and data pointer of a SS.  */
 /*GCC ARRAYS*/
 
@@ -3466,12 +3477,7 @@ gfc_conv_ss_descriptor (stmtblock_t * block, gfc_ss * 
ss, int base)
  Otherwise we must evaluate it now to avoid breaking dependency
 analysis by pulling the expressions for elemental array indices
 inside the loop.  */
-  if (!(DECL_P (tmp)
-   || (TREE_CODE (tmp) == ADDR_EXPR
-   && DECL_P (TREE_OPERAND (tmp, 0)))
-   || (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (se.expr))
-   && TREE_CODE (se.expr) == COMPONENT_REF
-   && GFC_CLASS_TYPE_P (TREE_TYPE (TREE_OPERAND (se.expr, 0)
+  if (!non_saved_descriptor_data_p (se.expr, tmp)
  && !ss->is_alloc_lhs)
tmp = gfc_evaluate_now (tmp, block);
   info->data = tmp;
@@ -11366,6 +11372,8 @@ update_reallocated_descriptor (stmtblock_t *block, 
gfc_loopinfo *loop)
} \
  while (0)
 
+  if (!non_saved_descriptor_data_p (desc, info->data))
+   UPDATE_VALUE (info->data, gfc_conv_descriptor_data_get (desc)); 
   UPDATE_VALUE (info->offset, gfc_conv_descriptor_offset_get (desc));
   info->saved_offset = info->offset;
   for (int i = 0; i < s->dimen; i++)


[gcc r16-2053] aarch64: Add support for unpacked SVE FP comparisons

2025-07-07 Thread Spencer Abson via Gcc-cvs
https://gcc.gnu.org/g:559ddecabef9c23210c84fdb05fceaf9cee81bd9

commit r16-2053-g559ddecabef9c23210c84fdb05fceaf9cee81bd9
Author: Spencer Abson 
Date:   Mon Jun 16 16:54:04 2025 +

aarch64: Add support for unpacked SVE FP comparisons

This patch extends our vec_cmp expander to support partial FP modes.

We use a predicate mode that is narrower the operation's VPRED to govern
unpacked FP operations under flag_trapping_math, so the expansion must
handle cases where the comparison's target and governing predicates have
different modes.

While such predicates enable all of the defined part of the operation, they
are not all-true.  Their false bits contribute to the (trapping) behavior of
the operation, so we cannot have SVE_KNOWN_PTRUE.

gcc/ChangeLog:

* config/aarch64/aarch64-sve.md (vec_cmp): Extend
to handle partial FP modes.
(@aarch64_pred_fcm): Likewise.
(@aarch64_pred_fcmuo): Likewise.
(*one_cmpl3): Rename to...
(@aarch64_pred_one_cmpl_z): ... this.
* config/aarch64/aarch64.cc (aarch64_emit_sve_fp_cond): Allow the
target and governing predicates to have different modes.
(aarch64_emit_sve_or_fp_conds): Likewise.
(aarch64_emit_sve_invert_fp_cond): Likewise.
(aarch64_expand_sve_vec_cmp_float): Likewise.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve/unpacked_fcm_1.c: New test.
* gcc.target/aarch64/sve/unpacked_fcm_2.c: Likewise.

Diff:
---
 gcc/config/aarch64/aarch64-sve.md  |  18 +-
 gcc/config/aarch64/aarch64.cc  |  56 +-
 .../gcc.target/aarch64/sve/unpacked_fcm_1.c| 602 +
 .../gcc.target/aarch64/sve/unpacked_fcm_2.c|  50 ++
 4 files changed, 701 insertions(+), 25 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-sve.md 
b/gcc/config/aarch64/aarch64-sve.md
index 87ae4cb0402f..6b5113eb70fe 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -3966,7 +3966,7 @@
 )
 
 ;; Predicated predicate inverse.
-(define_insn "*one_cmpl3"
+(define_insn "@aarch64_pred_one_cmpl_z"
   [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
(and:PRED_ALL
  (not:PRED_ALL (match_operand:PRED_ALL 2 "register_operand" "Upa"))
@@ -8637,8 +8637,8 @@
 (define_expand "vec_cmp"
   [(set (match_operand: 0 "register_operand")
(match_operator: 1 "comparison_operator"
- [(match_operand:SVE_FULL_F 2 "register_operand")
-  (match_operand:SVE_FULL_F 3 "aarch64_simd_reg_or_zero")]))]
+ [(match_operand:SVE_F 2 "register_operand")
+  (match_operand:SVE_F 3 "aarch64_simd_reg_or_zero")]))]
   "TARGET_SVE"
   {
 aarch64_expand_sve_vec_cmp_float (operands[0], GET_CODE (operands[1]),
@@ -8651,10 +8651,10 @@
 (define_insn "@aarch64_pred_fcm"
   [(set (match_operand: 0 "register_operand")
(unspec:
- [(match_operand: 1 "register_operand")
+ [(match_operand: 1 "aarch64_predicate_operand")
   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
-  (match_operand:SVE_FULL_F 3 "register_operand")
-  (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero")]
+  (match_operand:SVE_F 3 "register_operand")
+  (match_operand:SVE_F 4 "aarch64_simd_reg_or_zero")]
  SVE_COND_FP_CMP_I0))]
   "TARGET_SVE"
   {@ [ cons: =0 , 1   , 3 , 4   ]
@@ -8667,10 +8667,10 @@
 (define_insn "@aarch64_pred_fcmuo"
   [(set (match_operand: 0 "register_operand" "=Upa")
(unspec:
- [(match_operand: 1 "register_operand" "Upl")
+ [(match_operand: 1 "aarch64_predicate_operand" "Upl")
   (match_operand:SI 2 "aarch64_sve_ptrue_flag")
-  (match_operand:SVE_FULL_F 3 "register_operand" "w")
-  (match_operand:SVE_FULL_F 4 "register_operand" "w")]
+  (match_operand:SVE_F 3 "register_operand" "w")
+  (match_operand:SVE_F 4 "register_operand" "w")]
  UNSPEC_COND_FCMUO))]
   "TARGET_SVE"
   "fcmuo\t%0., %1/z, %3., %4."
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 0b4cd17c0ef9..7960b639f903 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -27307,7 +27307,7 @@ aarch64_emit_sve_fp_cond (rtx target, rtx_code code, 
rtx pred,
  bool known_ptrue_p, rtx op0, rtx op1)
 {
   rtx flag = gen_int_mode (known_ptrue_p, SImode);
-  rtx unspec = gen_rtx_UNSPEC (GET_MODE (pred),
+  rtx unspec = gen_rtx_UNSPEC (GET_MODE (target),
   gen_rtvec (4, pred, flag, op0, op1),
   aarch64_unspec_cond_code (code));
   emit_set_insn (target, unspec);
@@ -27326,10 +27326,10 @@ static void
 aarch64_emit_sve_or_fp_conds (rtx target, rtx_code code1, rtx_code code2,
  rtx pred, bool known_ptrue_p, rtx op0, rtx op1)
 {

[gcc r16-2054] Update maintainers file

2025-07-07 Thread Tamar Christina via Gcc-cvs
https://gcc.gnu.org/g:333e627e49597143b5837231be900603fdc72463

commit r16-2054-g333e627e49597143b5837231be900603fdc72463
Author: Tamar Christina 
Date:   Mon Jul 7 11:58:36 2025 +0100

Update maintainers file

Update MAINTAINERS file to include myself in AArch64 port.

ChangeLog:

* MAINTAINERS: Add myself to AArch64 pot.

Diff:
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index f2ad65007b6d..2cd2ec650b6f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -57,6 +57,7 @@ docs, and the testsuite related to that.
 aarch64 ldp/stp Alex Coplan 
 aarch64 portRichard Earnshaw
 aarch64 portRichard Sandiford   
+aarch64 portTamar Christina 
 aarch64 portKyrylo Tkachov  
 alpha port  Richard Henderson   
 amdgcn port Julian Brown


[gcc r16-2063] libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's time_put [PR117214]

2025-07-07 Thread Tomasz Kaminski via Libstdc++-cvs
https://gcc.gnu.org/g:8ad5968a8dcb472cbff8e4c48217fd65e125b2f2

commit r16-2063-g8ad5968a8dcb472cbff8e4c48217fd65e125b2f2
Author: XU Kailiang 
Date:   Wed Jul 2 15:10:29 2025 +0800

libstdc++: Format chrono %a/%A/%b/%h/%B/%p using locale's time_put 
[PR117214]

C++ formatting locale could have a custom time_put that performs
differently from the C locale, so do not use __timepunct directly,
instead all of above specifiers use _M_locale_fmt.

For %a/%A/%b/%h/%B, the code handling the exception is now moved
to the _M_check_ok function, that is invoked before handling of the
conversion specifier. For time_points the values of months/weekday
are computed, and thus are always ok(), this information is indicated
by new _M_time_point member of the _ChronoSpec.

The different behavior of j specifier for durations and time_points/calendar
types, is now handled using only _ChronoParts, and _M_time_only in 
_ChronoSpec
is no longer needed, thus it was removed.

PR libstdc++/117214

libstdc++-v3/ChangeLog:

* include/bits/chrono_io.h (_ChronoSpec::_M_time_only): Remove.
(_ChronoSpec::_M_time_point): Define.
(__formatter_chrono::_M_parse): Use __parts to determine
interpretation of j.
(__formatter_chrono::_M_check_ok): Define.
(__formatter_chrono::_M_format_to): Invoke _M_check_ok.
(__formatter_chrono::_M_a_A, __formatter_chrono::_M_b_B): Move
exception throwing to _M_check_ok.
(__formatter_chrono::_M_j): Use _M_needs to define interpretation.
(__formatter_duration::_S_spec_for): Set _M_time_point.
* testsuite/std/time/format/format.cc: Test for exception for !ok()
months/weekday.
* testsuite/std/time/format/pr117214_custom_timeput.cc: New
test.

Co-authored-by: Tomasz Kaminski 
Reviewed-by: Jonathan Wakely 
Signed-off-by: XU Kailiang 
Signed-off-by: Tomasz Kaminski 

Diff:
---
 libstdc++-v3/include/bits/chrono_io.h  | 61 --
 libstdc++-v3/testsuite/std/time/format/format.cc   |  7 +++
 .../std/time/format/pr117214_custom_timeput.cc | 37 +
 3 files changed, 90 insertions(+), 15 deletions(-)

diff --git a/libstdc++-v3/include/bits/chrono_io.h 
b/libstdc++-v3/include/bits/chrono_io.h
index 72cd569ccd65..75ee7e818b2f 100644
--- a/libstdc++-v3/include/bits/chrono_io.h
+++ b/libstdc++-v3/include/bits/chrono_io.h
@@ -280,8 +280,8 @@ namespace __format
   // in the format-spec, e.g. "{:L%a}" is localized and locale-specific,
   // but "{:L}" is only localized and "{:%a}" is only locale-specific.
   unsigned _M_locale_specific : 1;
-  // Indicates that we are handling duration.
-  unsigned _M_time_only : 1;
+  // Indicates that we are handling time_point.
+  unsigned _M_time_point : 1;
   // Indicates that duration should be treated as floating point.
   unsigned _M_floating_point_rep : 1;
   // Indicate that duration uses user-defined representation.
@@ -693,8 +693,11 @@ namespace __format
  __allowed_mods = _Mod_O;
  break;
case 'j':
- __needed = __spec._M_time_only ? _HoursMinutesSeconds
-: _DayOfYear;
+ __needed = __parts & _DayOfYear;
+ // If we do not know day-of-year then we must have a duration,
+ // which is to be formatted as decimal number of days.
+ if (__needed == _None)
+   __needed = _HoursMinutesSeconds;
  break;
case 'm':
  __needed = _Month;
@@ -919,7 +922,13 @@ namespace __format
   {
switch (__conv)
  {
+ case 'a':
+ case 'A':
+ case 'b':
+ case 'B':
  case 'c':
+ case 'h':
+ case 'p':
  case 'r':
  case 'x':
  case 'X':
@@ -947,6 +956,32 @@ namespace __format
  return __out;
}
 
+  void
+  _M_check_ok(const _ChronoData<_CharT>& __t, _CharT __conv) const
+  {
+   // n.b. for time point all date parts are computed, so
+   // they are always ok.
+   if (_M_spec._M_time_point || _M_spec._M_debug)
+ return;
+
+   switch (__conv)
+   {
+   case 'a':
+   case 'A':
+ if (!__t._M_weekday.ok()) [[unlikely]]
+   __throw_format_error("format error: invalid weekday");
+ return;
+   case 'b':
+   case 'h':
+   case 'B':
+ if (!__t._M_month.ok()) [[unlikely]]
+   __throw_format_error("format error: invalid month");
+ return;
+   default:
+ return;
+   }
+  }
+
   template
_OutIter
_M_format_to(const _ChronoData<_CharT>& __t, _OutIter __out,
@@ -1003,6 +1038,8 @@ namespac

[gcc r16-2064] aarch64: Improve popcountti2 with SVE

2025-07-07 Thread Kyrylo Tkachov via Gcc-cvs
https://gcc.gnu.org/g:0c73f2f1f92c135f50dcc2ab76d5e53236262a4e

commit r16-2064-g0c73f2f1f92c135f50dcc2ab76d5e53236262a4e
Author: Kyrylo Tkachov 
Date:   Fri Jul 4 06:49:15 2025 -0700

aarch64: Improve popcountti2 with SVE

The TImode popcount sequence can be slightly improved with SVE.
If we generate:
ldr q31, [x0]
ptrue   p7.b, vl16
cnt z31.d, p7/m, z31.d
addpd31, v31.2d
fmovx0, d31
ret

instead of:
h128:
ldr q31, [x0]
cnt v31.16b, v31.16b
addvb31, v31.16b
fmovw0, s31
ret

we use the ADDP instruction for reduction, which is cheaper on all CPUs 
AFAIK,
as it is only a single 64-bit addition vs the tree of additions for ADDV.
For example, on a CPU like Grace we get a latency and throughput of 2,4 vs 
4,1
for ADDV.
We do generate one more instruction due to the PTRUE being materialised, 
but that
is cheap itself and can be scheduled away from the critical path or even 
CSE'd
with other PTRUE constants.
As this sequence is larger code size-wise it is avoided for -Os.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov 

gcc/

* config/aarch64/aarch64.md (popcountti2): Add TARGET_SVE path.

gcc/testsuite/

* gcc.target/aarch64/popcnt9.c: Add +nosve to target pragma.
* gcc.target/aarch64/popcnt13.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64.md   | 13 +
 gcc/testsuite/gcc.target/aarch64/popcnt13.c | 24 
 gcc/testsuite/gcc.target/aarch64/popcnt9.c  |  2 +-
 3 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 509ef4c0f2f2..27efc9155dcb 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -5771,6 +5771,19 @@
(match_operand:TI 1 "register_operand")]
   "TARGET_SIMD && !TARGET_CSSC"
 {
+  /* For SVE we can do popcount on DImode chunks of the TImode argument
+ and then use a cheap ADDP reduction.  The SVE CNT instruction requires
+ materializing a PTRUE so don't do this if optimizing for size.  */
+  if (TARGET_SVE && !optimize_function_for_size_p (cfun))
+{
+  rtx v = gen_reg_rtx (V2DImode);
+  rtx v1 = gen_reg_rtx (V2DImode);
+  emit_move_insn (v, gen_lowpart (V2DImode, operands[1]));
+  rtx p = aarch64_ptrue_reg (VNx2BImode, 16);
+  emit_insn (gen_aarch64_pred_popcountv2di (v1, p, v));
+  emit_insn (gen_reduc_plus_scal_v2di (operands[0], v1));
+  DONE;
+}
   rtx v = gen_reg_rtx (V16QImode);
   rtx v1 = gen_reg_rtx (V16QImode);
   emit_move_insn (v, gen_lowpart (V16QImode, operands[1]));
diff --git a/gcc/testsuite/gcc.target/aarch64/popcnt13.c 
b/gcc/testsuite/gcc.target/aarch64/popcnt13.c
new file mode 100644
index ..2a30e9843322
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/popcnt13.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#pragma GCC target "+nocssc+sve"
+
+/*
+** h128:
+** ldr q([0-9]+), \[x0\]
+** ptrue   p([0-9]+).b, vl16
+** cnt z([0-9]+).d, p\2/m, z\1.d
+** addpd([0-9]+), v\3.2d
+** fmovx0, d\4
+** ret
+*/
+
+unsigned h128 (const unsigned __int128 *a) {
+ return __builtin_popcountg (a[0]);
+}
+
+/* There should be only one POPCOUNT. */
+/* { dg-final { scan-tree-dump-times "POPCOUNT " 1 "optimized" } } */
+/* { dg-final { scan-tree-dump-not " __builtin_popcount"  "optimized" } } */
+
diff --git a/gcc/testsuite/gcc.target/aarch64/popcnt9.c 
b/gcc/testsuite/gcc.target/aarch64/popcnt9.c
index c778fc7f4206..cfed8c58b7e0 100644
--- a/gcc/testsuite/gcc.target/aarch64/popcnt9.c
+++ b/gcc/testsuite/gcc.target/aarch64/popcnt9.c
@@ -3,7 +3,7 @@
 /* { dg-final { check-function-bodies "**" "" } } */
 /* PR target/113042 */
 
-#pragma GCC target "+nocssc"
+#pragma GCC target "+nocssc+nosve"
 
 /*
 ** h128:


[gcc r16-2046] c++: Pedwarn on invalid decl specifiers for for-range-declaration [PR84009]

2025-07-07 Thread Jakub Jelinek via Gcc-cvs
https://gcc.gnu.org/g:66455591fac1e80b5acc615598cbf556d565e080

commit r16-2046-g66455591fac1e80b5acc615598cbf556d565e080
Author: Jakub Jelinek 
Date:   Mon Jul 7 09:17:34 2025 +0200

c++: Pedwarn on invalid decl specifiers for for-range-declaration [PR84009]

https://eel.is/c++draft/stmt.ranged#2
says that in for-range-declaration only type-specifier or constexpr
can appear.  As the following testcases show, we've emitted some
diagnostics in most cases, but not for static/thread_local (the patch
handles __thread too) and register in the non-sb case.
For extern there was an error that it is both extern and has an
initializer (again, non-sb only, sb errors on extern).

The following patch diagnoses those cases with pedwarn.
I've used for-range-declaration in the diagnostics wording (there was
already a case of that for the typedef), so that in the future
we don't need to differentiate it between range for and expansion
statements.

2025-07-07  Jakub Jelinek  

PR c++/84009
* parser.cc (cp_parser_decomposition_declaration): Pedwarn
on thread_local, __thread or static in decl_specifiers for
for-range-declaration.
(cp_parser_init_declarator): Likewise, and also for extern
or register.

* g++.dg/cpp0x/range-for40.C: New test.
* g++.dg/cpp0x/range-for41.C: New test.
* g++.dg/cpp0x/range-for42.C: New test.
* g++.dg/cpp0x/range-for43.C: New test.

Diff:
---
 gcc/cp/parser.cc | 30 ++-
 gcc/testsuite/g++.dg/cpp0x/range-for40.C | 41 +++
 gcc/testsuite/g++.dg/cpp0x/range-for41.C | 42 
 gcc/testsuite/g++.dg/cpp0x/range-for42.C | 41 +++
 gcc/testsuite/g++.dg/cpp0x/range-for43.C | 42 
 5 files changed, 195 insertions(+), 1 deletion(-)

diff --git a/gcc/cp/parser.cc b/gcc/cp/parser.cc
index cac74e36ece9..44a78324c6e6 100644
--- a/gcc/cp/parser.cc
+++ b/gcc/cp/parser.cc
@@ -16919,6 +16919,15 @@ cp_parser_decomposition_declaration (cp_parser *parser,
   /* Ensure DECL_VALUE_EXPR is created for all the decls but
 the underlying DECL.  */
   cp_finish_decomp (decl, &decomp);
+  if (decl_spec_seq_has_spec_p (decl_specifiers, ds_thread))
+   pedwarn (decl_specifiers->locations[ds_thread],
+0, "for-range-declaration cannot be %qs",
+decl_specifiers->gnu_thread_keyword_p
+? "__thread" : "thread_local");
+  else if (decl_specifiers->storage_class == sc_static)
+   pedwarn (decl_specifiers->locations[ds_storage_class],
+0, "for-range-declaration cannot be %qs",
+"static");
 }
 
   if (pushed_scope)
@@ -24162,7 +24171,26 @@ cp_parser_init_declarator (cp_parser* parser,
  && token->type != CPP_SEMICOLON)
{
  if (maybe_range_for_decl && *maybe_range_for_decl != error_mark_node)
-   range_for_decl_p = true;
+   {
+ range_for_decl_p = true;
+ if (decl_spec_seq_has_spec_p (decl_specifiers, ds_thread))
+   pedwarn (decl_specifiers->locations[ds_thread],
+0, "for-range-declaration cannot be %qs",
+decl_specifiers->gnu_thread_keyword_p
+? "__thread" : "thread_local");
+ else if (decl_specifiers->storage_class == sc_static)
+   pedwarn (decl_specifiers->locations[ds_storage_class],
+0, "for-range-declaration cannot be %qs",
+"static");
+ else if (decl_specifiers->storage_class == sc_extern)
+   pedwarn (decl_specifiers->locations[ds_storage_class],
+0, "for-range-declaration cannot be %qs",
+"extern");
+ else if (decl_specifiers->storage_class == sc_register)
+   pedwarn (decl_specifiers->locations[ds_storage_class],
+0, "for-range-declaration cannot be %qs",
+"register");
+   }
  else
{
  if (!maybe_range_for_decl)
diff --git a/gcc/testsuite/g++.dg/cpp0x/range-for40.C 
b/gcc/testsuite/g++.dg/cpp0x/range-for40.C
new file mode 100644
index ..dea4a2a1ba8f
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/range-for40.C
@@ -0,0 +1,41 @@
+// PR c++/84009
+// { dg-do compile { target c++11 } }
+
+int z[64];
+
+void
+foo ()
+{
+  for (static auto a : z)  // { dg-error "for-range-declaration 
cannot be 'static'" }
+;
+  for (thread_local auto a : z)// { dg-error 
"for-range-declaration cannot be 'thread_local'" }
+;
+  for (__thread auto a : z)// { dg-error "for-range-declaration 
cannot be '__thread'" }
+;

[gcc r16-2057] Ada: Reapply tweaks to delay statements in ACATS 3&4 testsuites

2025-07-07 Thread Eric Botcazou via Gcc-cvs
https://gcc.gnu.org/g:add93190d3afd209e40b3f9a5211d622b7b1d770

commit r16-2057-gadd93190d3afd209e40b3f9a5211d622b7b1d770
Author: Eric Botcazou 
Date:   Mon Jul 7 13:52:58 2025 +0200

Ada: Reapply tweaks to delay statements in ACATS 3&4 testsuites

They had originally been applied to the ACATS 2 testsuite and I forgot to
reapply them to the ACATS 4 testsuite altogether.

gcc/testsuite/
* ada/acats-3/tests/c9/c94001c.ada: Tweak delay statements.
* ada/acats-4/tests/c9/c94001c.ada: Likewise.
* ada/acats-4/tests/c9/c94006a.ada: Likewise.
* ada/acats-4/tests/c9/c94008c.ada: Likewise.
* ada/acats-4/tests/c9/c951002.a: Likewise.
* ada/acats-4/tests/c9/c954a01.a: Likewise.
* ada/acats-4/tests/c9/c940005.a: Tweak duration constants.
* ada/acats-4/tests/c9/c940007.a: Likewise.
* ada/acats-4/tests/c9/c96001a.ada: Likewise.

Diff:
---
 gcc/testsuite/ada/acats-3/tests/c9/c94001c.ada | 4 ++--
 gcc/testsuite/ada/acats-4/tests/c9/c940005.a   | 2 +-
 gcc/testsuite/ada/acats-4/tests/c9/c940007.a   | 2 +-
 gcc/testsuite/ada/acats-4/tests/c9/c94001c.ada | 4 ++--
 gcc/testsuite/ada/acats-4/tests/c9/c94006a.ada | 3 ++-
 gcc/testsuite/ada/acats-4/tests/c9/c94008c.ada | 9 +
 gcc/testsuite/ada/acats-4/tests/c9/c951002.a   | 8 
 gcc/testsuite/ada/acats-4/tests/c9/c954a01.a   | 4 ++--
 gcc/testsuite/ada/acats-4/tests/c9/c96001a.ada | 7 ---
 9 files changed, 23 insertions(+), 20 deletions(-)

diff --git a/gcc/testsuite/ada/acats-3/tests/c9/c94001c.ada 
b/gcc/testsuite/ada/acats-3/tests/c9/c94001c.ada
index 0cc14f495cd4..df38f99d7352 100644
--- a/gcc/testsuite/ada/acats-3/tests/c9/c94001c.ada
+++ b/gcc/testsuite/ada/acats-3/tests/c9/c94001c.ada
@@ -211,7 +211,7 @@ BEGIN
 
  BEGIN -- (E)
   WHILE NOT(OUT_TSK'TERMINATED) AND DELAY_COUNT < 60 LOOP
-   DELAY 1.0;
+   DELAY 1.0 * Impdef.One_Long_Second;
DELAY_COUNT := DELAY_COUNT + 1;
   END LOOP;
   IF DELAY_COUNT = 60 THEN
@@ -254,7 +254,7 @@ BEGIN
 
  BEGIN
   WHILE NOT(OUT_TSK'TERMINATED) AND DELAY_COUNT < 60 LOOP
-   DELAY 1.0;
+   DELAY 1.0 * Impdef.One_Long_Second;
DELAY_COUNT := DELAY_COUNT + 1;
   END LOOP;
   IF DELAY_COUNT = 60 THEN
diff --git a/gcc/testsuite/ada/acats-4/tests/c9/c940005.a 
b/gcc/testsuite/ada/acats-4/tests/c9/c940005.a
index adb58b18ca4b..47a97bf2de65 100644
--- a/gcc/testsuite/ada/acats-4/tests/c9/c940005.a
+++ b/gcc/testsuite/ada/acats-4/tests/c9/c940005.a
@@ -85,7 +85,7 @@ begin
   -- In reality one would expect a time of 5 to 10 seconds.  In
   -- the interests of speeding up the test suite a shorter time
   -- is used
-  Pulse_Time_Delta : constant duration := ImpDef.Switch_To_New_Task;
+  Pulse_Time_Delta : constant duration := ImpDef.Long_Switch_To_New_Task;
 
   -- control over stopping tasks
   protected Control is
diff --git a/gcc/testsuite/ada/acats-4/tests/c9/c940007.a 
b/gcc/testsuite/ada/acats-4/tests/c9/c940007.a
index c678463633a2..41e80f4e25ee 100644
--- a/gcc/testsuite/ada/acats-4/tests/c9/c940007.a
+++ b/gcc/testsuite/ada/acats-4/tests/c9/c940007.a
@@ -90,7 +90,7 @@ begin
   -- In reality one would expect a time of 5 to 10 seconds.  In
   -- the interests of speeding up the test suite a shorter time
   -- is used
-  Pulse_Time_Delta : constant duration := ImpDef.Switch_To_New_Task;
+  Pulse_Time_Delta : constant duration := ImpDef.Long_Switch_To_New_Task;
 
 
   -- control over stopping tasks
diff --git a/gcc/testsuite/ada/acats-4/tests/c9/c94001c.ada 
b/gcc/testsuite/ada/acats-4/tests/c9/c94001c.ada
index 0cc14f495cd4..df38f99d7352 100644
--- a/gcc/testsuite/ada/acats-4/tests/c9/c94001c.ada
+++ b/gcc/testsuite/ada/acats-4/tests/c9/c94001c.ada
@@ -211,7 +211,7 @@ BEGIN
 
  BEGIN -- (E)
   WHILE NOT(OUT_TSK'TERMINATED) AND DELAY_COUNT < 60 LOOP
-   DELAY 1.0;
+   DELAY 1.0 * Impdef.One_Long_Second;
DELAY_COUNT := DELAY_COUNT + 1;
   END LOOP;
   IF DELAY_COUNT = 60 THEN
@@ -254,7 +254,7 @@ BEGIN
 
  BEGIN
   WHILE NOT(OUT_TSK'TERMINATED) AND DELAY_COUNT < 60 LOOP
-   DELAY 1.0;
+   DELAY 1.0 * Impdef.One_Long_Second;
DELAY_COUNT := DELAY_COUNT + 1;
   END LOOP;
   IF DELAY_COUNT = 60 THEN
diff --git a/gcc/testsuite/ada/acats-4/tests/c9/c94006a.ada 
b/gcc/testsuite/ada/acats-4/tests/c9/c94006a.ada
index 6b9c85f490e2..cac5fc6e09c4 100644
--- a/gcc/testsuite/ada/acats-4/tests/c9/c94006a.ada
+++ b/gcc/testsuite/ada/acats-4/tests/c9/c94006a.ada
@@ -28,6 +28,7 @@
 -- TBN  9/17/86
 -- PWN 01/31/95  REMOVED PRAGMA PRIORITY FOR ADA 9X.
 
+with Impdef;
 WITH REPORT; USE REPORT;
 WITH SYSTEM; USE SYSTEM;
 PROCEDURE C94006A IS
@@ -41,7 +42,7 @@ PROCEDURE C94006A IS
   SELECT

[gcc(refs/users/mikael/heads/deplacement_reallocation_v01)] Essai déplacement

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:49f6b6e7026b602baeb0b6b04f46362119e479ae

commit 49f6b6e7026b602baeb0b6b04f46362119e479ae
Author: Mikael Morin 
Date:   Sun Jul 6 16:56:16 2025 +0200

Essai déplacement

Diff:
---
 gcc/fortran/trans-array.cc |  3 ---
 gcc/fortran/trans-expr.cc  | 20 +++-
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 7be2d7b11a62..b7040bb7e6c9 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -11736,9 +11736,6 @@ gfc_alloc_allocatable_for_assignment (gfc_loopinfo 
*loop,
  running offset.  Use the saved_offset instead.  */
   tmp = gfc_conv_descriptor_offset (desc);
   gfc_add_modify (&fblock, tmp, offset);
-  if (linfo->saved_offset
-  && VAR_P (linfo->saved_offset))
-gfc_add_modify (&fblock, linfo->saved_offset, tmp);
 
   /* Now set the deltas for the lhs.  */
   for (n = 0; n < expr1->rank; n++)
diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index 3e0d763d2fb0..65d0ee4ff235 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -12943,6 +12943,7 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
   rhs_caf_attr = gfc_caf_attr (expr2, false, &rhs_refs_comp);
 }
 
+  tree reallocation = NULL_TREE;
   if (lss != gfc_ss_terminator)
 {
   /* The assignment needs scalarization.  */
@@ -13011,6 +13012,14 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
  ompws_flags |= OMPWS_SCALARIZER_WS | OMPWS_SCALARIZER_BODY;
}
 
+  /* F2003: Allocate or reallocate lhs of allocatable array.  */
+  if (realloc_flag)
+   {
+ realloc_lhs_warning (expr1->ts.type, true, &expr1->where);
+ ompws_flags &= ~OMPWS_SCALARIZER_WS;
+ reallocation = gfc_alloc_allocatable_for_assignment (&loop, expr1, 
expr2);
+   }
+
   /* Start the scalarized loop body.  */
   gfc_start_scalarized_body (&loop, &body);
 }
@@ -13319,15 +13328,8 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr * 
expr2, bool init_flag,
  gfc_add_expr_to_block (&body, tmp);
}
 
-  /* F2003: Allocate or reallocate lhs of allocatable array.  */
-  if (realloc_flag)
-   {
- realloc_lhs_warning (expr1->ts.type, true, &expr1->where);
- ompws_flags &= ~OMPWS_SCALARIZER_WS;
- tmp = gfc_alloc_allocatable_for_assignment (&loop, expr1, expr2);
- if (tmp != NULL_TREE)
-   gfc_add_expr_to_block (&loop.code[expr1->rank - 1], tmp);
-   }
+  if (reallocation != NULL_TREE)
+   gfc_add_expr_to_block (&loop.code[loop.dimen - 1], reallocation);
 
   if (maybe_workshare)
ompws_flags &= ~OMPWS_SCALARIZER_BODY;


[gcc(refs/users/mikael/heads/deplacement_reallocation_v01)] Correction array_constructor_1

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:f1c499c7b1c0a4e06ed22fd8dd48919ed35e46f7

commit f1c499c7b1c0a4e06ed22fd8dd48919ed35e46f7
Author: Mikael Morin 
Date:   Sat Jul 5 15:05:20 2025 +0200

Correction array_constructor_1

Diff:
---
 gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90 | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90 
b/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90
index 45eafacd5a67..a0c55076a9ae 100644
--- a/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90
+++ b/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90
@@ -9,6 +9,8 @@ program grow_type_array
 
 type(container), allocatable :: list(:)
 
+allocate(list(0))
+
 list = [list, new_elem(5)]
 
 deallocate(list)


[gcc] Deleted branch 'mikael/heads/deplacement_reallocation_v01' in namespace 'refs/users'

2025-07-07 Thread Mikael Morin via Gcc-cvs
The branch 'mikael/heads/deplacement_reallocation_v01' in namespace 
'refs/users' was deleted.
It previously pointed to:

 3e76083a905e... Essai déplacement

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  3e76083... Essai déplacement


[gcc] Created branch 'mikael/heads/deplacement_reallocation_v01' in namespace 'refs/users'

2025-07-07 Thread Mikael Morin via Gcc-cvs
The branch 'mikael/heads/deplacement_reallocation_v01' was created in namespace 
'refs/users' pointing to:

 49f6b6e7026b... Essai déplacement


[gcc r16-2047] x86: Improve vector_loop/unrolled_loop for memset/memcpy

2025-07-07 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:401199377c50045ede560daf3f6e8b51749c2a87

commit r16-2047-g401199377c50045ede560daf3f6e8b51749c2a87
Author: H.J. Lu 
Date:   Tue Jun 17 10:17:17 2025 +0800

x86: Improve vector_loop/unrolled_loop for memset/memcpy

1. Don't generate the loop if the loop count is 1.
2. For memset with vector on small size, use vector if small size supports
vector, otherwise use the scalar value.
3. Always expand vector-version of memset for vector_loop.
4. Always duplicate the promoted scalar value for vector_loop if not 0 nor
-1.
5. Use misaligned prologue if alignment isn't needed.  When misaligned
prologue is used, check if destination is actually aligned and update
destination alignment if aligned.
6. Use move_by_pieces and store_by_pieces for memcpy and memset epilogues
with the fixed epilogue size to enable overlapping moves and stores.

The included tests show that codegen of vector_loop/unrolled_loop for
memset/memcpy are significantly improved.  For

void
foo (void *p1, size_t len)
{
  __builtin_memset (p1, 0, len);
}

with

-O2 -minline-all-stringops 
-mmemset-strategy=vector_loop:256:noalign,libcall:-1:noalign -march=x86-64

we used to generate

foo:
.LFB0:
.cfi_startproc
movq%rdi, %rax
pxor%xmm0, %xmm0
cmpq$64, %rsi
jnb .L18
.L2:
andl$63, %esi
je  .L1
xorl%edx, %edx
testb   $1, %sil
je  .L5
movl$1, %edx
movb$0, (%rax)
cmpq%rsi, %rdx
jnb .L19
.L5:
movb$0, (%rax,%rdx)
movb$0, 1(%rax,%rdx)
addq$2, %rdx
cmpq%rsi, %rdx
jb  .L5
.L1:
ret
.p2align 4,,10
.p2align 3
.L18:
movq%rsi, %rdx
xorl%eax, %eax
andq$-64, %rdx
.L3:
movups  %xmm0, (%rdi,%rax)
movups  %xmm0, 16(%rdi,%rax)
movups  %xmm0, 32(%rdi,%rax)
movups  %xmm0, 48(%rdi,%rax)
addq$64, %rax
cmpq%rdx, %rax
jb  .L3
addq%rdi, %rax
jmp .L2
.L19:
ret
.cfi_endproc

with very poor prologue/epilogue.  With this patch, we now generate:

foo:
.LFB0:
.cfi_startproc
pxor%xmm0, %xmm0
cmpq$64, %rsi
jnb .L2
testb   $32, %sil
jne .L19
testb   $16, %sil
jne .L20
testb   $8, %sil
jne .L21
testb   $4, %sil
jne .L22
testq   %rsi, %rsi
jne .L23
.L1:
ret
.p2align 4,,10
.p2align 3
.L2:
movups  %xmm0, -64(%rdi,%rsi)
movups  %xmm0, -48(%rdi,%rsi)
movups  %xmm0, -32(%rdi,%rsi)
movups  %xmm0, -16(%rdi,%rsi)
subq$1, %rsi
cmpq$64, %rsi
jb  .L1
andq$-64, %rsi
xorl%eax, %eax
.L9:
movups  %xmm0, (%rdi,%rax)
movups  %xmm0, 16(%rdi,%rax)
movups  %xmm0, 32(%rdi,%rax)
movups  %xmm0, 48(%rdi,%rax)
addq$64, %rax
cmpq%rsi, %rax
jb  .L9
ret
.p2align 4,,10
.p2align 3
.L23:
movb$0, (%rdi)
testb   $2, %sil
je  .L1
xorl%eax, %eax
movw%ax, -2(%rdi,%rsi)
ret
.p2align 4,,10
.p2align 3
.L19:
movups  %xmm0, (%rdi)
movups  %xmm0, 16(%rdi)
movups  %xmm0, -32(%rdi,%rsi)
movups  %xmm0, -16(%rdi,%rsi)
ret
.p2align 4,,10
.p2align 3
.L20:
movups  %xmm0, (%rdi)
movups  %xmm0, -16(%rdi,%rsi)
ret
.p2align 4,,10
.p2align 3
.L21:
movq$0, (%rdi)
movq$0, -8(%rdi,%rsi)
ret
.p2align 4,,10
.p2align 3
.L22:
movl$0, (%rdi)
movl$0, -4(%rdi,%rsi)
ret
.cfi_endproc

gcc/

PR target/120670
PR target/120683
* config/i386/i386-expand.cc (expand_set_or_cpymem_via_loop):
Don't generate the loop if the loop count is 1.
(expand_cpymem_epilogue): Use move_by_pieces.
(setmem_epilogue_gen_val): New.
(expand_setmem_epilogue): Use store_by_pieces.
(expand_small_cpymem_or_setmem): Choose cpymem mode from MOVE_MAX.
For memset with vec

[gcc r16-2056] libstdc++: Format __float128 as _Float128 only when long double is not 128 IEEE [PR120976]

2025-07-07 Thread Tomasz Kaminski via Libstdc++-cvs
https://gcc.gnu.org/g:2a82d4c859bd0eca4fe31fc79d234abd05e6a9d8

commit r16-2056-g2a82d4c859bd0eca4fe31fc79d234abd05e6a9d8
Author: Tomasz Kamiński 
Date:   Fri May 16 07:12:36 2025 +0200

libstdc++: Format __float128 as _Float128 only when long double is not 128 
IEEE [PR120976]

For powerpc64 and sparc architectures that both have __float128 and 128bit 
long double,
the __float128 is same type as long double/__ieee128 and already 
formattable.

The remaining specialization makes __float128 formattable on x86_64 via 
_Float128,
however __float128 is now not formattable on x86_32 (-m32) with 
-mlong-double-128,
where __float128 is distinct type from long double that is 128bit IEEE.

PR libstdc++/120976

libstdc++-v3/ChangeLog:

* include/std/format (formatter<__float128, _Char_T): Define if
_GLIBCXX_FORMAT_F128 == 2.

Reviewed-by: Jonathan Wakely 
Signed-off-by: Tomasz Kamiński 

Diff:
---
 libstdc++-v3/include/std/format | 11 +++
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/libstdc++-v3/include/std/format b/libstdc++-v3/include/std/format
index 46bd5d5ee6a0..5749aa1995a9 100644
--- a/libstdc++-v3/include/std/format
+++ b/libstdc++-v3/include/std/format
@@ -2998,11 +2998,9 @@ namespace __format
 };
 #endif
 
-#if defined(__SIZEOF_FLOAT128__) && _GLIBCXX_FORMAT_F128 > 1
-  // Reuse __formatter_fp::format<__format::__flt128_t, Out> for __float128.
-  // This formatter is not declared if _GLIBCXX_LONG_DOUBLE_ALT128_COMPAT is 
true,
-  // as __float128 when present is same type as __ieee128, which may be same as
-  // long double.
+#if defined(__SIZEOF_FLOAT128__) && _GLIBCXX_FORMAT_F128 == 2
+  // Use __formatter_fp::format<__format::__flt128_t, Out> for __float128,
+  // when long double is not 128bit IEEE type.
   template<__format::__char _CharT>
 struct formatter<__float128, _CharT>
 {
@@ -3020,9 +3018,6 @@ namespace __format
 
 private:
   __format::__formatter_fp<_CharT> _M_f;
-
-  static_assert( !is_same_v<__float128, long double>,
-"This specialization should not be used for long double" );
 };
 #endif


[gcc(refs/users/omachota/heads/rtl-ssa-dce)] rtl-ssa-dce: improve code, do not mark uses inside notes

2025-07-07 Thread Ondrej Machota via Gcc-cvs
https://gcc.gnu.org/g:d1b901b1b3a2335abacdf4a3b69df3c5d8b9fdbc

commit d1b901b1b3a2335abacdf4a3b69df3c5d8b9fdbc
Author: Ondřej Machota 
Date:   Fri Jun 27 13:24:06 2025 +0200

rtl-ssa-dce: improve code, do not mark uses inside notes

Diff:
---
 gcc/dce.cc | 108 +
 gcc/rtl-ssa/changes.cc |   4 +-
 2 files changed, 76 insertions(+), 36 deletions(-)

diff --git a/gcc/dce.cc b/gcc/dce.cc
index 1aa5c6539664..3654a5101106 100644
--- a/gcc/dce.cc
+++ b/gcc/dce.cc
@@ -1374,6 +1374,8 @@ private:
   bool can_delete_call (const_rtx);
   bool is_rtx_prelive (const_rtx);
   bool is_prelive (insn_info *);
+  bool mark_if_not_visited (const set_info *);
+  void append_not_visited_sets (auto_vec &, use_array &);
   void mark_prelive_insn (insn_info *, auto_vec &);
   auto_vec mark_prelive ();
   void mark ();
@@ -1507,25 +1509,84 @@ rtl_ssa_dce::is_prelive (insn_info *insn)
   return is_rtx_prelive (insn->rtl ());
 }
 
-// Marks INSN and adds its uses to worklist if INSN is not a debug instruction
+
+// Mark SET as visited and return true if SET->insn() is not nullptr and SET
+// has not been visited. Otherwise return false.
+bool
+rtl_ssa_dce::mark_if_not_visited (const set_info *set)
+{
+  insn_info *insn = set->insn ();
+  if (!insn)
+return false;
+
+  if (insn->is_phi ())
+  {
+const phi_info *phi = static_cast (set);
+ auto uid = phi->uid ();
+
+if (bitmap_bit_p (m_marked_phis, uid))
+   return false;
+
+bitmap_set_bit (m_marked_phis, uid);
+if (dump_file)
+  fprintf (dump_file, "Phi node %d:%d marked as live\n", set->regno () 
,insn->uid ());
+  } else
+  {
+auto uid = insn->uid ();
+if (m_marked.get_bit (uid))
+  return false;
+
+m_marked.set_bit (uid);
+if (dump_file)
+  fprintf (dump_file, "Insn %d marked as live\n", insn->uid ());
+  }
+
+  return true;
+}
+
+// For each use in USES, if use->def () is non-null and has not been visited,
+// mark it as visited and append it to WORKLIST.
+void
+rtl_ssa_dce::append_not_visited_sets (auto_vec& worklist, 
use_array& uses) {
+  for (use_info *use : uses)
+  {
+// This seems to be a good idea, however there is a problem is 
process_uses_of_deleted_def
+if (use->only_occurs_in_notes())
+  continue;
+
+set_info *parent_set = use->def ();
+ if (!parent_set)
+   continue;
+
+if (!mark_if_not_visited (parent_set))
+  continue;
+
+// mark_if_not_visited will return false if insn is nullptr
+// insn_info *insn = parent_set->insn ();
+// gcc_checking_assert (insn);
+
+// if (dump_file)
+ //   fprintf (dump_file, "Adding insn %d to worklist\n", insn->uid 
());
+worklist.safe_push (parent_set);
+  }
+}
+
+// Mark INSN and add its uses to WORKLIST if INSN is not a debug instruction
 void
 rtl_ssa_dce::mark_prelive_insn (insn_info *insn, auto_vec 
&worklist)
 {
   if (dump_file)
 fprintf (dump_file, "Insn %d marked as prelive\n", insn->uid ());
 
+  // A phi node will never be prelive.
   m_marked.set_bit(insn->uid ());
   // Debug instruction are not added to worklist. They would wake up possibly 
dead
   // instructions
   if (insn->is_debug_insn ())
 return;
 
-  for (use_info *use : insn->uses ())
-{
-  set_info *set = use->def ();
-  if (set)
-   worklist.safe_push (set);
-}
+  use_array uses = insn->uses ();
+  append_not_visited_sets (worklist, uses);
 }
 
 // Scans all instructions and marks all which are prelive
@@ -1556,41 +1617,18 @@ rtl_ssa_dce::mark ()
 {
   set_info *set = worklist.pop ();
   insn_info *insn = set->insn ();
-  if (!insn)
-   continue;
-
-  // Skip already visited visited instructions.
-  auto uid = insn->uid ();
-  if (m_marked.get_bit(uid) && !insn->is_phi ())
-   continue;
-
-  m_marked.set_bit (uid);
 
+  // a set without an insn will not be added to the worklist
+  gcc_checking_assert (insn);
 
   use_array uses = insn->uses ();
   if (insn->is_phi ())
{
  phi_info *phi = static_cast (set);
- auto phi_uid = phi->uid ();
- // Skip already visited phi node.
- if (bitmap_bit_p(m_marked_phis, phi_uid))
-   continue;
-
-bitmap_set_bit (m_marked_phis, phi_uid);
  uses = phi->inputs ();
}
 
-  if (dump_file)
-   fprintf (dump_file, "Adding insn %d to worklist\n", insn->uid ());
-
-  for (use_info *use : uses)
-   {
- set_info *parent_set = use->def ();
- if (!parent_set)
-   continue;
-
- worklist.safe_push (parent_set);
-   }
+  append_not_visited_sets(worklist, uses);
 }
 }
 
@@ -1630,9 +1668,9 @@ rtl_ssa_dce::reset_dead_debug ()
 bool is_parent_marked = false;
 if (parent_insn->is_phi ()) {
   auto phi = static_cast (def);
-  is_parent_marked = bitmap_bit_p(m_marked_phis, phi->uid ());
+  is_parent_marked = bitmap_bit_p (m_marked_

[gcc(refs/users/omachota/heads/rtl-ssa-web)] rtl-ssa-web: init pass, rtl-ssa accesses support uid

2025-07-07 Thread Ondrej Machota via Gcc-cvs
https://gcc.gnu.org/g:414ce41976ae9ffe0349be181ae333e1616ece1c

commit 414ce41976ae9ffe0349be181ae333e1616ece1c
Author: Ondřej Machota 
Date:   Tue Jun 24 09:54:54 2025 +0200

rtl-ssa-web: init pass, rtl-ssa accesses support uid

Diff:
---
 gcc/passes.def|   1 +
 gcc/rtl-ssa/accesses.h|  17 ++-
 gcc/rtl-ssa/internals.inl |   4 ++
 gcc/rtlanal.cc|   4 +-
 gcc/rtlanal.h |  16 --
 gcc/tree-pass.h   |   1 +
 gcc/web.cc| 122 ++
 7 files changed, 159 insertions(+), 6 deletions(-)

diff --git a/gcc/passes.def b/gcc/passes.def
index 3b251052e53a..777f1dc7e075 100644
--- a/gcc/passes.def
+++ b/gcc/passes.def
@@ -482,6 +482,7 @@ along with GCC; see the file COPYING3.  If not see
  NEXT_PASS (pass_rtl_loop_done);
   POP_INSERT_PASSES ()
   NEXT_PASS (pass_lower_subreg2);
+  NEXT_PASS (pass_web_ssa);
   NEXT_PASS (pass_web);
   NEXT_PASS (pass_rtl_cprop);
   NEXT_PASS (pass_cse2);
diff --git a/gcc/rtl-ssa/accesses.h b/gcc/rtl-ssa/accesses.h
index 98403f78b37b..318fde10ee05 100644
--- a/gcc/rtl-ssa/accesses.h
+++ b/gcc/rtl-ssa/accesses.h
@@ -19,6 +19,8 @@
 
 namespace rtl_ssa {
 
+#include "coretypes.h"
+
 // Forward declarations.
 class bb_info;
 class clobber_group;
@@ -131,6 +133,8 @@ public:
   // otherwise return MEM_REGNO.
   unsigned int regno () const { return m_regno; }
 
+  const_rtx reg () const { return m_reg; }
+
   // For sets, return the mode of the value to which the resource is being set.
   // For uses, return the mode in which the resource is being used (which for
   // hard registers might be different from the mode in which the resource
@@ -208,6 +212,11 @@ public:
   // an insn that is about to be inserted.
   bool is_temporary () const { return m_is_temp; }
 
+// User definable uid for use_info
+  unsigned int& uid () { return m_uid; }
+
+  unsigned int uid () const { return m_uid; }
+
 protected:
   access_info (resource_info, access_kind);
 
@@ -246,6 +255,12 @@ protected:
   // a phi node.
   unsigned int m_is_in_debug_insn_or_phi : 1;
 
+  // Not null if is_reg is true. In that case it points to the reg.
+  const_rtx m_reg;
+
+  // The value of uid ().
+  unsigned int m_uid;
+
 private:
   // Used as a flag during various update routines; has no long-lasting
   // meaning.
@@ -285,7 +300,7 @@ public:
 // resource's value.
 class use_info : public access_info
 {
-  // Overall size: 5 LP64 words.
+  // Overall size: 6 LP64 words.
   friend class set_info;
   friend class function_info;
 
diff --git a/gcc/rtl-ssa/internals.inl b/gcc/rtl-ssa/internals.inl
index 0de18bbefe67..b4b3e2da6b4a 100644
--- a/gcc/rtl-ssa/internals.inl
+++ b/gcc/rtl-ssa/internals.inl
@@ -95,6 +95,8 @@ use_info::record_reference (rtx_obj_reference ref, bool 
is_first)
   m_includes_multiregs |= ref.is_multireg ();
   m_only_occurs_in_notes &= ref.in_note ();
 }
+
+  m_reg = ref.reg ();
 }
 
 // Change the value of insn () to INSN.
@@ -208,6 +210,8 @@ def_info::record_reference (rtx_obj_reference ref, bool 
is_first)
   m_includes_subregs |= ref.in_subreg ();
   m_includes_multiregs |= ref.is_multireg ();
 }
+
+  m_reg = ref.reg ();
 }
 
 // Return the last definition in the list.  Only valid when is_first ()
diff --git a/gcc/rtlanal.cc b/gcc/rtlanal.cc
index 86a5e4733088..3963fd14ce5e 100644
--- a/gcc/rtlanal.cc
+++ b/gcc/rtlanal.cc
@@ -2102,7 +2102,7 @@ rtx_properties::try_to_add_reg (const_rtx x, unsigned int 
flags)
   for (unsigned int regno = start_regno; regno < end_regno; ++regno)
 if (ref_iter != ref_end)
   *ref_iter++ = rtx_obj_reference (regno, flags, mode,
-  regno - start_regno);
+  regno - start_regno, x);
 }
 
 /* Add a description of destination X to this object.  FLAGS is a bitmask
@@ -2169,7 +2169,7 @@ rtx_properties::try_to_add_dest (const_rtx x, unsigned 
int flags)
 anti-dependent on later deallocations, so both types of
 stack operation are akin to a memory write.  */
  if (ref_iter != ref_end)
-   *ref_iter++ = rtx_obj_reference (MEM_REGNO, flags, BLKmode);
+   *ref_iter++ = rtx_obj_reference (MEM_REGNO, flags, BLKmode, 0, x);
 
  /* We want to keep sp alive everywhere - by making all
 writes to sp also use sp.  */
diff --git a/gcc/rtlanal.h b/gcc/rtlanal.h
index 33f171624c92..3c4c1747891c 100644
--- a/gcc/rtlanal.h
+++ b/gcc/rtlanal.h
@@ -23,6 +23,9 @@ along with GCC; see the file COPYING3.  If not see
 #ifndef GCC_RTLANAL_H
 #define GCC_RTLANAL_H
 
+#include "coretypes.h"
+#include "rtl.h"
+
 /* A dummy register value that represents the whole of variable memory.
Using ~0U means that arrays that track both registers and memory can
be indexed by regno + 1.  */
@@ -53,11 +56,14 @@ class rtx_obj_reference
 public:
   rtx_obj_reference () = default;
   rtx_obj_reference (un

[gcc] Created branch 'omachota/heads/rtl-ssa-web' in namespace 'refs/users'

2025-07-07 Thread Ondrej Machota via Gcc-cvs
The branch 'omachota/heads/rtl-ssa-web' was created in namespace 'refs/users' 
pointing to:

 414ce41976ae... rtl-ssa-web: init pass, rtl-ssa accesses support uid


[gcc(refs/users/omachota/heads/rtl-ssa-dce)] rtl-ssa-dce: improve code

2025-07-07 Thread Ondrej Machota via Gcc-cvs
https://gcc.gnu.org/g:1bda298251f57d8942796fe141746a23db99f56f

commit 1bda298251f57d8942796fe141746a23db99f56f
Author: Ondřej Machota 
Date:   Mon Jul 7 23:06:56 2025 +0200

rtl-ssa-dce: improve code

Diff:
---
 gcc/dce.cc  | 184 +---
 gcc/rtl-ssa/changes.cc  |  49 ++---
 gcc/rtl-ssa/functions.h |   1 +
 3 files changed, 134 insertions(+), 100 deletions(-)

diff --git a/gcc/dce.cc b/gcc/dce.cc
index d564935a82f3..67fb42541d84 100644
--- a/gcc/dce.cc
+++ b/gcc/dce.cc
@@ -1324,7 +1324,8 @@ make_pass_fast_rtl_dce (gcc::context *ctxt)
 }
 
 namespace {
-// offset_bitmap is a wrapper around sbitmap that also handles negative 
indices from RTL SSA
+// offset_bitmap is a wrapper around sbitmap that also handles negative indices
+// from RTL SSA
 struct offset_bitmap
 {
 private:
@@ -1332,9 +1333,7 @@ private:
   sbitmap m_bitmap;
 
 public:
-  offset_bitmap ()
-: m_offset{0}, m_bitmap{sbitmap_alloc(0)}
-  {}
+  offset_bitmap () : m_offset{0}, m_bitmap{sbitmap_alloc (0)} {}
 
   offset_bitmap (size_t size, int offset)
 : m_offset{offset}, m_bitmap{sbitmap_alloc (size)}
@@ -1344,15 +1343,15 @@ public:
 : offset_bitmap (size_t (max_index - min_index + 1), -min_index)
   {}
 
-  void resize(size_t size, int offset)
+  void resize (size_t size, int offset)
   {
-m_bitmap = sbitmap_resize(m_bitmap, (unsigned int)size, 0); 
-m_offset = offset; 
+m_bitmap = sbitmap_resize (m_bitmap, (unsigned int) size, 0);
+m_offset = offset;
   }
 
-  void resize(int min_index, int max_index)
+  void resize (int min_index, int max_index)
   {
-resize(size_t (max_index - min_index + 1), -min_index);
+resize (size_t (max_index - min_index + 1), -min_index);
   }
 
   void clear_bit (int index) { bitmap_clear_bit (m_bitmap, index + m_offset); }
@@ -1411,13 +1410,12 @@ rtl_ssa_dce::can_delete_call (const_rtx insn)
   // We cannot delete pure or const sibling calls because it is
   // hard to see the result.
   return !SIBLING_CALL_P (insn)
-// We can delete dead const or pure calls as long as they do not
-// infinite loop.
-&& (RTL_CONST_OR_PURE_CALL_P (insn)
-  && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn))
-// Don't delete calls that may throw if we cannot do so.
-&& cfun->can_delete_dead_exceptions 
-&& insn_nothrow_p (insn);
+// We can delete dead const or pure calls as long as they do not
+// infinite loop.
+&& (RTL_CONST_OR_PURE_CALL_P (insn)
+&& !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn))
+// Don't delete calls that may throw if we cannot do so.
+&& cfun->can_delete_dead_exceptions && insn_nothrow_p (insn);
 }
 
 bool
@@ -1508,7 +1506,6 @@ rtl_ssa_dce::is_prelive (insn_info *insn)
   return is_rtx_prelive (insn->rtl ());
 }
 
-
 // Mark SET as visited and return true if SET->insn() is not nullptr and SET
 // has not been visited. Otherwise return false.
 bool
@@ -1519,26 +1516,28 @@ rtl_ssa_dce::mark_if_not_visited (const set_info *set)
 return false;
 
   if (insn->is_phi ())
-  {
-const phi_info *phi = static_cast (set);
- auto uid = phi->uid ();
+{
+  const phi_info *phi = static_cast (set);
+  auto uid = phi->uid ();
 
-if (bitmap_bit_p (m_marked_phis, uid))
-   return false;
+  if (bitmap_bit_p (m_marked_phis, uid))
+   return false;
 
-bitmap_set_bit (m_marked_phis, uid);
-if (dump_file)
-  fprintf (dump_file, "Phi node %d:%d marked as live\n", set->regno () 
,insn->uid ());
-  } else
-  {
-auto uid = insn->uid ();
-if (m_marked.get_bit (uid))
-  return false;
+  bitmap_set_bit (m_marked_phis, uid);
+  if (dump_file)
+   fprintf (dump_file, "Phi node %d:%d marked as live\n", set->regno (),
+insn->uid ());
+}
+  else
+{
+  auto uid = insn->uid ();
+  if (m_marked.get_bit (uid))
+   return false;
 
-m_marked.set_bit (uid);
-if (dump_file)
-  fprintf (dump_file, "Insn %d marked as live\n", insn->uid ());
-  }
+  m_marked.set_bit (uid);
+  if (dump_file)
+   fprintf (dump_file, "Insn %d marked as live\n", insn->uid ());
+}
 
   return true;
 }
@@ -1546,28 +1545,31 @@ rtl_ssa_dce::mark_if_not_visited (const set_info *set)
 // For each use in USES, if use->def () is non-null and has not been visited,
 // mark it as visited and append it to WORKLIST.
 void
-rtl_ssa_dce::append_not_visited_sets (auto_vec& worklist, 
use_array& uses) {
+rtl_ssa_dce::append_not_visited_sets (auto_vec &worklist,
+ use_array &uses)
+{
   for (use_info *use : uses)
-  {
-// This seems to be a good idea, however there is a problem is 
process_uses_of_deleted_def
-if (use->only_occurs_in_notes())
-  continue;
+{
+  // This seems to be a good idea, however there is a problem is
+  // process_uses_of_deleted_def
+  if (use->only_occurs_in_notes ())
+   continue;
 
-s

[gcc(refs/users/omachota/heads/rtl-ssa-dce)] rtl-ssa-dce: remove uses of dead notes

2025-07-07 Thread Ondrej Machota via Gcc-cvs
https://gcc.gnu.org/g:5846fcf649c0df58099b5825d3c1ca6f29ece6c3

commit 5846fcf649c0df58099b5825d3c1ca6f29ece6c3
Author: Ondřej Machota 
Date:   Mon Jul 7 18:04:25 2025 +0200

rtl-ssa-dce: remove uses of dead notes

Diff:
---
 gcc/dce.cc | 26 --
 gcc/rtl-ssa/changes.cc | 12 +++-
 2 files changed, 23 insertions(+), 15 deletions(-)

diff --git a/gcc/dce.cc b/gcc/dce.cc
index 3654a5101106..d564935a82f3 100644
--- a/gcc/dce.cc
+++ b/gcc/dce.cc
@@ -1402,14 +1402,22 @@ rtl_ssa_dce::is_rtx_pattern_prelive (const_rtx insn)
 }
 }
 
+// Return true if an call INSN can be deleted
 bool
 rtl_ssa_dce::can_delete_call (const_rtx insn)
 {
   gcc_checking_assert (CALL_P (insn));
 
-  if (cfun->can_delete_dead_exceptions)
-return true;
-  return insn_nothrow_p (insn);
+  // We cannot delete pure or const sibling calls because it is
+  // hard to see the result.
+  return !SIBLING_CALL_P (insn)
+// We can delete dead const or pure calls as long as they do not
+// infinite loop.
+&& (RTL_CONST_OR_PURE_CALL_P (insn)
+  && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn))
+// Don't delete calls that may throw if we cannot do so.
+&& cfun->can_delete_dead_exceptions 
+&& insn_nothrow_p (insn);
 }
 
 bool
@@ -1417,16 +1425,7 @@ rtl_ssa_dce::is_rtx_prelive (const_rtx insn)
 {
   gcc_checking_assert (insn != nullptr);
 
-  if (CALL_P (insn)
-  // We cannot delete pure or const sibling calls because it is
-  // hard to see the result.
-  && (!SIBLING_CALL_P (insn))
-  // We can delete dead const or pure calls as long as they do not
-  // infinite loop.
-  && (RTL_CONST_OR_PURE_CALL_P (insn)
- && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn))
-  // Don't delete calls that may throw if we cannot do so.
-  && can_delete_call (insn))
+  if (CALL_P (insn) && can_delete_call (insn))
 return false;
 
   if (!NONJUMP_INSN_P (insn))
@@ -1690,7 +1689,6 @@ rtl_ssa_dce::sweep ()
 
   auto_vec to_delete;
 
-  // Previously created debug instructions won't be visited here
   for (insn_info *insn : crtl->ssa->nondebug_insns ())
 {
   // Artificial (bb_head, bb_end, phi), marked or debug instructions
diff --git a/gcc/rtl-ssa/changes.cc b/gcc/rtl-ssa/changes.cc
index 6598ebc1df13..a9b1a00475dd 100644
--- a/gcc/rtl-ssa/changes.cc
+++ b/gcc/rtl-ssa/changes.cc
@@ -287,7 +287,17 @@ function_info::process_uses_of_deleted_def (set_info *set)
{
  // following assert causes crash when running rtl_ssa_dce with
  // deleting eq_notes on testsuite
- // gcc_assert (use->is_live_out_use ());
+ if (use->only_occurs_in_notes ())
+ {
+   insn_info *insn =  use->insn ();
+   rtx_insn *rtl = insn->rtl ();
+   // TODO: remove note from rtl
+ }
+ else
+ {
+   gcc_assert (use->is_live_out_use ());
+ }
+
  remove_use (use);
}
   // The phi handling above might have removed multiple uses of this_set.


[gcc(refs/users/omachota/heads/rtl-ssa-dce)] rtl-ssa: Rewrite process_uses_of_deleted_def

2025-07-07 Thread Ondrej Machota via Gcc-cvs
https://gcc.gnu.org/g:9f3f2a809e771ab43dfa31d55762436c989f5e85

commit 9f3f2a809e771ab43dfa31d55762436c989f5e85
Author: Richard Sandiford 
Date:   Mon Jun 23 16:18:56 2025 +0100

rtl-ssa: Rewrite process_uses_of_deleted_def

process_uses_of_deleted_def seems to have been written on
the assumption that non-degenerate phis would be explicitly
deleted by an insn_change, and that the function therefore
only needed to delete degenerate phis.  But that was inconsistent
with the rest of the code, and wouldn't be very convenient in
any case.

This patch therefore rewrites process_uses_of_deleted_def
to handle general phis.

gcc/
* rtl-ssa/changes.cc (process_uses_of_deleted_def): Rewrite to
handle deletions of non-degenerate phis.

Diff:
---
 gcc/rtl-ssa/changes.cc | 36 
 1 file changed, 24 insertions(+), 12 deletions(-)

diff --git a/gcc/rtl-ssa/changes.cc b/gcc/rtl-ssa/changes.cc
index eb89eb664de0..3c0fb51cc866 100644
--- a/gcc/rtl-ssa/changes.cc
+++ b/gcc/rtl-ssa/changes.cc
@@ -258,28 +258,40 @@ rtl_ssa::changes_are_worthwhile (array_slice changes,
 void
 function_info::process_uses_of_deleted_def (set_info *set)
 {
-  if (!set->has_any_uses ())
-return;
-
-  auto *use = *set->all_uses ().begin ();
-  do
+  // Each member of the worklist is either SET or a dead phi.
+  auto_vec worklist;
+  worklist.quick_push (set);
+  while (!worklist.is_empty ())
 {
-  auto *next_use = use->next_use ();
+  auto *this_set = worklist.pop ();
+  auto *use = this_set->first_use ();
+  if (!use)
+   {
+ if (this_set != set)
+   delete_phi (as_a (this_set));
+ continue;
+   }
   if (use->is_in_phi ())
{
- // This call will not recurse.
- process_uses_of_deleted_def (use->phi ());
- delete_phi (use->phi ());
+ // Removing all uses from the phi ensures that we'll only add
+ // it to the worklist once.
+ auto *phi = use->phi ();
+ for (auto *input : phi->inputs ())
+   {
+ remove_use (input);
+ input->set_def (nullptr);
+   }
+ worklist.safe_push (phi);
}
   else
{
  gcc_assert (use->is_live_out_use ());
  remove_use (use);
}
-  use = next_use;
+  // The phi handling above might have removed multiple uses of this_set.
+  if (this_set->has_any_uses ())
+   worklist.safe_push (this_set);
 }
-  while (use);
-  gcc_assert (!set->has_any_uses ());
 }
 
 // Update the REG_NOTES of INSN, whose pattern has just been changed.


[gcc r16-2067] testsuite: add sve hw check to testcase [PR120817]

2025-07-07 Thread Tamar Christina via Gcc-cvs
https://gcc.gnu.org/g:4b9f760c511a4ef3a390dd6cfab80bada57c2535

commit r16-2067-g4b9f760c511a4ef3a390dd6cfab80bada57c2535
Author: Tamar Christina 
Date:   Mon Jul 7 17:05:01 2025 +0100

testsuite: add sve hw check to testcase [PR120817]

Drop down from SVE2 to SVE1 as that's the minimum
required for the test, and since it's a mid-end test
add the aarch64_sve_hw check.

gcc/testsuite/ChangeLog:

PR tree-optimization/120817
* gcc.dg/vect/pr120817.c: Add SVE HW check.

Diff:
---
 gcc/testsuite/gcc.dg/vect/pr120817.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.dg/vect/pr120817.c 
b/gcc/testsuite/gcc.dg/vect/pr120817.c
index d8f55c9b98d2..199189a8b9ad 100644
--- a/gcc/testsuite/gcc.dg/vect/pr120817.c
+++ b/gcc/testsuite/gcc.dg/vect/pr120817.c
@@ -1,5 +1,6 @@
 /* { dg-additional-options "-O1" } */
-/* { dg-additional-options "-mcpu=neoverse-n2" { target aarch64*-*-* } } */
+/* { dg-require-effective-target aarch64_sve_hw { target aarch64*-*-* } } */
+/* { dg-additional-options "-march=armv8-a+sve -mtune=neoverse-n2" { target 
aarch64*-*-* } } */
 
 #include "tree-vect.h"


[gcc r16-2068] s390: Optimize fmin/fmax.

2025-07-07 Thread Juergen Christ via Gcc-cvs
https://gcc.gnu.org/g:c476f554e3f52086181d5c85701db34f6f390e3c

commit r16-2068-gc476f554e3f52086181d5c85701db34f6f390e3c
Author: Juergen Christ 
Date:   Fri Jun 20 16:08:34 2025 +0200

s390: Optimize fmin/fmax.

On VXE targets, we can directly use the fp min/max instruction instead of
calling into libm for fmin/fmax etc.

Provide fmin/fmax versions also for vectors even though it cannot be
called directly.  This will be exploited with a follow-up patch when
reductions are introduced.

gcc/ChangeLog:

* config/s390/s390.md: Update UNSPECs
* config/s390/vector.md (fmax3): New expander.
(fmin3): New expander.
* config/s390/vx-builtins.md (*fmin): New insn.
(vfmin): Redefined to use new insn.
(*fmax): New insn.
(vfmax): Redefined to use new insn.

gcc/testsuite/ChangeLog:

* gcc.target/s390/fminmax-1.c: New test.
* gcc.target/s390/fminmax-2.c: New test.

Signed-off-by: Juergen Christ 

Diff:
---
 gcc/config/s390/s390.md   |  6 +--
 gcc/config/s390/vector.md | 25 ++
 gcc/config/s390/vx-builtins.md| 21 -
 gcc/testsuite/gcc.target/s390/fminmax-1.c | 77 +++
 gcc/testsuite/gcc.target/s390/fminmax-2.c | 29 
 5 files changed, 144 insertions(+), 14 deletions(-)

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 440ce93574f4..f6db36e0ac38 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -238,9 +238,6 @@
 
UNSPEC_VEC_MSUM
 
-   UNSPEC_VEC_VFMIN
-   UNSPEC_VEC_VFMAX
-
UNSPEC_VEC_VBLEND
UNSPEC_VEC_VEVAL
UNSPEC_VEC_VGEM
@@ -253,6 +250,9 @@
 
UNSPEC_NNPA_VCFN_V8HI
UNSPEC_NNPA_VCNF_V8HI
+
+   UNSPEC_FMAX
+   UNSPEC_FMIN
 ])
 
 ;;
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 7c706ecd89c7..26753c099cda 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -89,6 +89,13 @@
 (define_mode_iterator VF_HW [(V4SF "TARGET_VXE") V2DF (V1TF "TARGET_VXE")
 (TF "TARGET_VXE")])
 
+; FP scalar and vector modes
+(define_mode_iterator VFT_BFP [SF DF
+ (V1SF "TARGET_VXE") (V2SF "TARGET_VXE") (V4SF 
"TARGET_VXE")
+ V1DF V2DF
+ (V1TF "TARGET_VXE") (TF "TARGET_VXE")])
+
+
 (define_mode_iterator V_8   [V1QI])
 (define_mode_iterator V_16  [V2QI  V1HI])
 (define_mode_iterator V_32  [V4QI  V2HI V1SI V1SF])
@@ -3602,3 +3609,21 @@
(umul_highpart:VIT_HW_VXE3_DT (match_operand:VIT_HW_VXE3_DT 1 
"register_operand")
  (match_operand:VIT_HW_VXE3_DT 2 
"register_operand")))]
   "TARGET_VX")
+
+; fmax
+(define_expand "fmax3"
+  [(set (match_operand:VFT_BFP  0 "register_operand")
+   (unspec:VFT_BFP [(match_operand:VFT_BFP 1 "register_operand")
+  (match_operand:VFT_BFP   2 "register_operand")
+  (const_int 4)]
+ UNSPEC_FMAX))]
+  "TARGET_VXE")
+
+; fmin
+(define_expand "fmin3"
+  [(set (match_operand:VFT_BFP  0 "register_operand")
+   (unspec:VFT_BFP [(match_operand:VFT_BFP 1 "register_operand")
+  (match_operand:VFT_BFP   2 "register_operand")
+  (const_int 4)]
+ UNSPEC_FMIN))]
+  "TARGET_VXE")
diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index 9e5d18bcb8f4..9b89b131a81f 100644
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -2134,23 +2134,22 @@
   "fchebs\t%v2,%v0,%v1"
   [(set_attr "op_type" "VRR")])
 
-
 (define_insn "vfmin"
-  [(set (match_operand:VF_HW0 "register_operand"  "=v")
-   (unspec:VF_HW [(match_operand:VF_HW 1 "register_operand"   "v")
-  (match_operand:VF_HW 2 "register_operand"   "v")
-  (match_operand:QI3 "const_mask_operand" "C")]
- UNSPEC_VEC_VFMIN))]
+  [(set (match_operand:VFT_BFP  0 "register_operand"  "=v")
+   (unspec:VFT_BFP [(match_operand:VFT_BFP 1 "register_operand"   "v")
+(match_operand:VFT_BFP 2 "register_operand"   "v")
+(match_operand:QI  3 "const_mask_operand" "C")]
+   UNSPEC_FMIN))]
   "TARGET_VXE"
   "fminb\t%v0,%v1,%v2,%b3"
   [(set_attr "op_type" "VRR")])
 
 (define_insn "vfmax"
-  [(set (match_operand:VF_HW0 "register_operand"  "=v")
-   (unspec:VF_HW [(match_operand:VF_HW 1 "register_operand"   "v")
-  (match_operand:VF_HW 2 "register_operand"   "v")
-  (match_operand:QI3 "const_mask_operand" "C")]
- UNSPEC_VEC_VFMAX))]
+  [(set (match_operand:VFT_BFP  0 "register_operand"  "=v")
+   (unspec:VFT_BFP [(match_operand:VFT_BFP 1 "

[gcc r16-2066] c++: Fix FMV return type ambiguation

2025-07-07 Thread Alfie Richards via Gcc-cvs
https://gcc.gnu.org/g:5abac04ffc7cc877ff5e1fa6562923b7b05b8289

commit r16-2066-g5abac04ffc7cc877ff5e1fa6562923b7b05b8289
Author: Alfie Richards 
Date:   Thu Feb 13 15:59:43 2025 +

c++: Fix FMV return type ambiguation

Add logic for the case of two FMV annotated functions with identical
signature other than the return type.

Previously this was ignored, this changes the behavior to emit a diagnostic.

gcc/cp/ChangeLog:
PR c++/119498
* decl.cc (duplicate_decls): Change logic to not always exclude FMV
annotated functions in cases of return type non-ambiguation.

gcc/testsuite/ChangeLog:
PR c++/119498
* g++.target/aarch64/pr119498.C: New test.

Diff:
---
 gcc/cp/decl.cc  |  6 --
 gcc/testsuite/g++.target/aarch64/pr119498.C | 19 +++
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
index 83c8e283b56a..be26bd39b225 100644
--- a/gcc/cp/decl.cc
+++ b/gcc/cp/decl.cc
@@ -2014,8 +2014,10 @@ duplicate_decls (tree newdecl, tree olddecl, bool 
hiding, bool was_hidden)
}
  /* For function versions, params and types match, but they
 are not ambiguous.  */
- else if ((!DECL_FUNCTION_VERSIONED (newdecl)
-   && !DECL_FUNCTION_VERSIONED (olddecl))
+ else if (((!DECL_FUNCTION_VERSIONED (newdecl)
+&& !DECL_FUNCTION_VERSIONED (olddecl))
+   || !same_type_p (fndecl_declared_return_type (newdecl),
+fndecl_declared_return_type (olddecl)))
   /* Let constrained hidden friends coexist for now, we'll
  check satisfaction later.  */
   && !member_like_constrained_friend_p (newdecl)
diff --git a/gcc/testsuite/g++.target/aarch64/pr119498.C 
b/gcc/testsuite/g++.target/aarch64/pr119498.C
new file mode 100644
index ..03f1659068dc
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/pr119498.C
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O0" } */
+/* { dg-additional-options "-Wno-experimental-fmv-target" } */
+
+__attribute__ ((target_version ("default"))) int
+foo ();
+
+__attribute__ ((target_version ("default"))) int
+foo () { return 1; } /* { dg-message "old declaration" } */
+
+__attribute__ ((target_version ("dotprod"))) float
+foo () { return 3; } /* { dg-error "ambiguating new declaration" } */
+
+__attribute__ ((target_version ("sve"))) int
+foo2 () { return 1; } /* { dg-message "old declaration" } */
+
+__attribute__ ((target_version ("dotprod"))) float
+foo2 () { return 3; } /* { dg-error "ambiguating new declaration of" } */


[gcc r16-2072] check-function-bodies: Support "^[0-9]+:"

2025-07-07 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:3e34c54d72f6e3723601bcd936409af4a42d17b8

commit r16-2072-g3e34c54d72f6e3723601bcd936409af4a42d17b8
Author: H.J. Lu 
Date:   Wed Jul 2 08:51:47 2025 +0800

check-function-bodies: Support "^[0-9]+:"

While working on

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120936

I tried to use check-function-bodies to verify that label for mcount
and __fentry__ is only generated by "-pg" if it is used by __mcount_loc
section:

1:  callmcount
.section __mcount_loc, "a",@progbits
.quad 1b
.previous

Add "^[0-9]+:" to check-function-bodies to allow:

1:  callmcount

PR testsuite/120881
* lib/scanasm.exp (check-function-bodies): Allow "^[0-9]+:".

Signed-off-by: H.J. Lu 

Diff:
---
 gcc/testsuite/lib/scanasm.exp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/testsuite/lib/scanasm.exp b/gcc/testsuite/lib/scanasm.exp
index 97935cb23c3c..a2311de5704b 100644
--- a/gcc/testsuite/lib/scanasm.exp
+++ b/gcc/testsuite/lib/scanasm.exp
@@ -1109,6 +1109,8 @@ proc check-function-bodies { args } {
append function_regexp ".*"
} elseif { [regexp {^\.L} $line] } {
append function_regexp $line "\n"
+   } elseif { [regexp {^[0-9]+:} $line] } {
+   append function_regexp $line "\n"
} else {
append function_regexp $config(line_prefix) $line "\n"
}


[gcc r16-2075] Revert "Extend "counted_by" attribute to pointer fields of structures. Convert a pointer reference w

2025-07-07 Thread Qing Zhao via Gcc-cvs
https://gcc.gnu.org/g:54c640ba3971d00b65cc48fef91dac6edc11dd09

commit r16-2075-g54c640ba3971d00b65cc48fef91dac6edc11dd09
Author: Qing Zhao 
Date:   Mon Jul 7 20:36:12 2025 +

Revert "Extend "counted_by" attribute to pointer fields of structures. 
Convert a pointer reference with counted_by attribute to .ACCESS_WITH_SIZE." 
due to PR120929.

This reverts commit 687727375769dd41971bad369f3553f1163b3e7a.

Diff:
---
 gcc/c-family/c-attribs.cc|  44 ++
 gcc/c/c-decl.cc  |  91 ---
 gcc/c/c-typeck.cc|  60 -
 gcc/doc/extend.texi  |  41 ++---
 gcc/testsuite/gcc.dg/flex-array-counted-by.c |   2 +-
 gcc/testsuite/gcc.dg/pointer-counted-by-1.c  |  34 ---
 gcc/testsuite/gcc.dg/pointer-counted-by-2.c  |  10 ---
 gcc/testsuite/gcc.dg/pointer-counted-by-3.c  | 127 ---
 gcc/testsuite/gcc.dg/pointer-counted-by.c| 111 ---
 9 files changed, 70 insertions(+), 450 deletions(-)

diff --git a/gcc/c-family/c-attribs.cc b/gcc/c-family/c-attribs.cc
index ea04ed7f0d45..5d7a31fd99b6 100644
--- a/gcc/c-family/c-attribs.cc
+++ b/gcc/c-family/c-attribs.cc
@@ -2906,53 +2906,22 @@ handle_counted_by_attribute (tree *node, tree name,
" declaration %q+D", name, decl);
   *no_add_attrs = true;
 }
-  /* This attribute only applies to a field with array type or pointer type.  
*/
-  else if (TREE_CODE (TREE_TYPE (decl)) != ARRAY_TYPE
-  && TREE_CODE (TREE_TYPE (decl)) != POINTER_TYPE)
+  /* This attribute only applies to field with array type.  */
+  else if (TREE_CODE (TREE_TYPE (decl)) != ARRAY_TYPE)
 {
   error_at (DECL_SOURCE_LOCATION (decl),
-   "%qE attribute is not allowed for a non-array"
-   " or non-pointer field", name);
+   "%qE attribute is not allowed for a non-array field",
+   name);
   *no_add_attrs = true;
 }
   /* This attribute only applies to a C99 flexible array member type.  */
-  else if (TREE_CODE (TREE_TYPE (decl)) == ARRAY_TYPE
-  && !c_flexible_array_member_type_p (TREE_TYPE (decl)))
+  else if (! c_flexible_array_member_type_p (TREE_TYPE (decl)))
 {
   error_at (DECL_SOURCE_LOCATION (decl),
"%qE attribute is not allowed for a non-flexible"
" array member field", name);
   *no_add_attrs = true;
 }
-  /* This attribute cannot be applied to a pointer to void type.  */
-  else if (TREE_CODE (TREE_TYPE (decl)) == POINTER_TYPE
-  && TREE_CODE (TREE_TYPE (TREE_TYPE (decl))) == VOID_TYPE)
-{
-  error_at (DECL_SOURCE_LOCATION (decl),
-   "%qE attribute is not allowed for a pointer to void",
-   name);
-  *no_add_attrs = true;
-}
-  /* This attribute cannot be applied to a pointer to function type.  */
-  else if (TREE_CODE (TREE_TYPE (decl)) == POINTER_TYPE
-  && TREE_CODE (TREE_TYPE (TREE_TYPE (decl))) == FUNCTION_TYPE)
-{
-  error_at (DECL_SOURCE_LOCATION (decl),
-   "%qE attribute is not allowed for a pointer to"
-   " function", name);
-  *no_add_attrs = true;
-}
-  /* This attribute cannot be applied to a pointer to structure or union
- with flexible array member.  */
-  else if (TREE_CODE (TREE_TYPE (decl)) == POINTER_TYPE
-  && RECORD_OR_UNION_TYPE_P (TREE_TYPE (TREE_TYPE (decl)))
-  && TYPE_INCLUDES_FLEXARRAY (TREE_TYPE (TREE_TYPE (decl
-{
-   error_at (DECL_SOURCE_LOCATION (decl),
- "%qE attribute is not allowed for a pointer to"
- " structure or union with flexible array member", name);
-   *no_add_attrs = true;
-}
   /* The argument should be an identifier.  */
   else if (TREE_CODE (argval) != IDENTIFIER_NODE)
 {
@@ -2961,8 +2930,7 @@ handle_counted_by_attribute (tree *node, tree name,
   *no_add_attrs = true;
 }
   /* Issue error when there is a counted_by attribute with a different
- field as the argument for the same flexible array member or
- pointer field.  */
+ field as the argument for the same flexible array member field.  */
   else if (old_counted_by != NULL_TREE)
 {
   tree old_fieldname = TREE_VALUE (TREE_VALUE (old_counted_by));
diff --git a/gcc/c/c-decl.cc b/gcc/c/c-decl.cc
index 7e1c197a7ed6..8bbd6ebc66ad 100644
--- a/gcc/c/c-decl.cc
+++ b/gcc/c/c-decl.cc
@@ -9432,62 +9432,56 @@ c_update_type_canonical (tree t)
 }
 }
 
-/* Verify the argument of the counted_by attribute of each of the
-   FIELDS_WITH_COUNTED_BY is a valid field of the containing structure,
-   STRUCT_TYPE, Report error and remove the corresponding attribute
-   when it's not.  */
+/* Verify the argument of the counted_by attribute of the flexible array
+   member FIELD_DECL is a valid field of the containing structure,
+   STRUCT_TYPE, Report error and remove this attribute when 

[gcc r16-2074] Revert "Use the counted_by attribute of pointers in builtinin-object-size." due to PR120929

2025-07-07 Thread Qing Zhao via Gcc-cvs
https://gcc.gnu.org/g:bed34151d51c8b3ebcd9731651a276e02ca6e804

commit r16-2074-gbed34151d51c8b3ebcd9731651a276e02ca6e804
Author: Qing Zhao 
Date:   Mon Jul 7 20:35:53 2025 +

Revert "Use the counted_by attribute of pointers in builtinin-object-size." 
due to PR120929

This reverts commit 7165ca43caf47007f5ceaa46c034618d397d42ec.

Diff:
---
 gcc/testsuite/gcc.dg/pointer-counted-by-4-char.c   |  6 --
 gcc/testsuite/gcc.dg/pointer-counted-by-4-float.c  |  6 --
 gcc/testsuite/gcc.dg/pointer-counted-by-4-struct.c | 10 ---
 gcc/testsuite/gcc.dg/pointer-counted-by-4-union.c  | 10 ---
 gcc/testsuite/gcc.dg/pointer-counted-by-4.c| 77 --
 gcc/testsuite/gcc.dg/pointer-counted-by-5.c| 56 
 gcc/testsuite/gcc.dg/pointer-counted-by-6.c| 56 
 gcc/testsuite/gcc.dg/pointer-counted-by-7.c| 32 -
 gcc/tree-object-size.cc| 19 +-
 9 files changed, 3 insertions(+), 269 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/pointer-counted-by-4-char.c 
b/gcc/testsuite/gcc.dg/pointer-counted-by-4-char.c
deleted file mode 100644
index c404e5b8ccec..
--- a/gcc/testsuite/gcc.dg/pointer-counted-by-4-char.c
+++ /dev/null
@@ -1,6 +0,0 @@
-/* Test the attribute counted_by for pointer field and its usage in
- * __builtin_dynamic_object_size.  */ 
-/* { dg-do run } */
-/* { dg-options "-O2" } */
-#define PTR_TYPE char
-#include "pointer-counted-by-4.c"
diff --git a/gcc/testsuite/gcc.dg/pointer-counted-by-4-float.c 
b/gcc/testsuite/gcc.dg/pointer-counted-by-4-float.c
deleted file mode 100644
index 383d8fb656df..
--- a/gcc/testsuite/gcc.dg/pointer-counted-by-4-float.c
+++ /dev/null
@@ -1,6 +0,0 @@
-/* Test the attribute counted_by for pointer field and its usage in
- * __builtin_dynamic_object_size.  */ 
-/* { dg-do run } */
-/* { dg-options "-O2" } */
-#define PTR_TYPE float 
-#include "pointer-counted-by-4.c"
diff --git a/gcc/testsuite/gcc.dg/pointer-counted-by-4-struct.c 
b/gcc/testsuite/gcc.dg/pointer-counted-by-4-struct.c
deleted file mode 100644
index 50246d29477b..
--- a/gcc/testsuite/gcc.dg/pointer-counted-by-4-struct.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* Test the attribute counted_by for pointer field and its usage in
- * __builtin_dynamic_object_size.  */ 
-/* { dg-do run } */
-/* { dg-options "-O2" } */
-struct A {
-  int a;
-  char *b;
-};
-#define PTR_TYPE struct A 
-#include "pointer-counted-by-4.c"
diff --git a/gcc/testsuite/gcc.dg/pointer-counted-by-4-union.c 
b/gcc/testsuite/gcc.dg/pointer-counted-by-4-union.c
deleted file mode 100644
index e786d9961475..
--- a/gcc/testsuite/gcc.dg/pointer-counted-by-4-union.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* Test the attribute counted_by for pointer field and its usage in
- * __builtin_dynamic_object_size.  */ 
-/* { dg-do run } */
-/* { dg-options "-O2" } */
-union A {
-  int a;
-  float b;
-};
-#define PTR_TYPE union A 
-#include "pointer-counted-by-4.c"
diff --git a/gcc/testsuite/gcc.dg/pointer-counted-by-4.c 
b/gcc/testsuite/gcc.dg/pointer-counted-by-4.c
deleted file mode 100644
index c4b36311c704..
--- a/gcc/testsuite/gcc.dg/pointer-counted-by-4.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/* Test the attribute counted_by for pointer field and its usage in
- * __builtin_dynamic_object_size.  */ 
-/* { dg-do run } */
-/* { dg-options "-O2" } */
-
-#include "builtin-object-size-common.h"
-#ifndef PTR_TYPE
-#define PTR_TYPE int
-#endif
-struct pointer_array {
-  int b;
-  PTR_TYPE *c;
-} *p_array;
-
-struct annotated {
-  PTR_TYPE *c __attribute__ ((counted_by (b)));
-  int b;
-} *p_array_annotated;
-
-struct nested_annotated {
-  PTR_TYPE *c __attribute__ ((counted_by (b)));
-  struct {
-union {
-  int b;
-  float f; 
-};
-int n;
-  };
-} *p_array_nested_annotated;
-
-void __attribute__((__noinline__)) setup (int normal_count, int attr_count)
-{
-  p_array
-= (struct pointer_array *) malloc (sizeof (struct pointer_array));
-  p_array->c = (PTR_TYPE *) malloc (sizeof (PTR_TYPE) * normal_count);
-  p_array->b = normal_count;
-
-  p_array_annotated
-= (struct annotated *) malloc (sizeof (struct annotated));
-  p_array_annotated->c = (PTR_TYPE *) malloc (sizeof (PTR_TYPE) * attr_count);
-  p_array_annotated->b = attr_count;
-
-  p_array_nested_annotated
-= (struct nested_annotated *) malloc (sizeof (struct nested_annotated));
-  p_array_nested_annotated->c = (PTR_TYPE *) malloc (sizeof (PTR_TYPE) * 
attr_count);
-  p_array_nested_annotated->b = attr_count;
-
-  return;
-}
-
-void __attribute__((__noinline__)) test ()
-{
-  EXPECT(__builtin_dynamic_object_size(p_array->c, 1), -1);
-  EXPECT(__builtin_dynamic_object_size(p_array_annotated->c, 1),
-p_array_annotated->b * sizeof (PTR_TYPE));
-  EXPECT(__builtin_dynamic_object_size(p_array_nested_annotated->c, 1),
-p_array_nested_annotated->b * sizeof (PTR_TYPE));
-}
-
-void cleanup ()
-{
-  free (p_array->c); 
-  free 

[gcc r16-2073] Revert "Use the counted_by attribute of pointers in array bound checker." due to PR120929

2025-07-07 Thread Qing Zhao via Gcc-cvs
https://gcc.gnu.org/g:c30708568bcf6ff94f8c7ccf621cb5f3c153f6e4

commit r16-2073-gc30708568bcf6ff94f8c7ccf621cb5f3c153f6e4
Author: Qing Zhao 
Date:   Mon Jul 7 20:35:14 2025 +

Revert "Use the counted_by attribute of pointers in array bound checker." 
due to PR120929

This reverts commit 9d579c522d551eaa807e438206e19a91a3def67f.

Diff:
---
 gcc/c-family/c-gimplify.cc |  28 --
 gcc/c-family/c-ubsan.cc| 316 ++---
 .../gcc.dg/ubsan/pointer-counted-by-bounds-2.c |  51 
 .../gcc.dg/ubsan/pointer-counted-by-bounds-3.c |  42 ---
 .../gcc.dg/ubsan/pointer-counted-by-bounds-4.c |  42 ---
 .../gcc.dg/ubsan/pointer-counted-by-bounds-5.c |  40 ---
 .../gcc.dg/ubsan/pointer-counted-by-bounds.c   |  46 ---
 7 files changed, 16 insertions(+), 549 deletions(-)

diff --git a/gcc/c-family/c-gimplify.cc b/gcc/c-family/c-gimplify.cc
index e905059708f7..c6fb7646567e 100644
--- a/gcc/c-family/c-gimplify.cc
+++ b/gcc/c-family/c-gimplify.cc
@@ -66,20 +66,6 @@ along with GCC; see the file COPYING3.  If not see
 walk back up, we check that they fit our constraints, and copy them
 into temporaries if not.  */
 
-
-/* Check whether TP is an address computation whose base is a call to
-   .ACCESS_WITH_SIZE.  */
-
-static bool
-is_address_with_access_with_size (tree tp)
-{
-  if (TREE_CODE (tp) == POINTER_PLUS_EXPR
-  && (TREE_CODE (TREE_OPERAND (tp, 0)) == INDIRECT_REF)
-  && (is_access_with_size_p (TREE_OPERAND (TREE_OPERAND (tp, 0), 0
-   return true;
-  return false;
-}
-
 /* Callback for c_genericize.  */
 
 static tree
@@ -135,20 +121,6 @@ ubsan_walk_array_refs_r (tree *tp, int *walk_subtrees, 
void *data)
   walk_tree (&TREE_OPERAND (*tp, 1), ubsan_walk_array_refs_r, pset, pset);
   walk_tree (&TREE_OPERAND (*tp, 0), ubsan_walk_array_refs_r, pset, pset);
 }
-  else if (TREE_CODE (*tp) == INDIRECT_REF
-  && is_address_with_access_with_size (TREE_OPERAND (*tp, 0)))
-{
-  ubsan_maybe_instrument_array_ref (&TREE_OPERAND (*tp, 0), false);
-  /* Make sure ubsan_maybe_instrument_array_ref is not called again on
-the POINTER_PLUS_EXPR, so ensure it is not walked again and walk
-its subtrees manually.  */
-  tree aref = TREE_OPERAND (*tp, 0);
-  pset->add (aref);
-  *walk_subtrees = 0;
-  walk_tree (&TREE_OPERAND (aref, 0), ubsan_walk_array_refs_r, pset, pset);
-}
-  else if (is_address_with_access_with_size (*tp))
-ubsan_maybe_instrument_array_ref (tp, true);
   return NULL_TREE;
 }
 
diff --git a/gcc/c-family/c-ubsan.cc b/gcc/c-family/c-ubsan.cc
index 38514a4046c3..78b786854699 100644
--- a/gcc/c-family/c-ubsan.cc
+++ b/gcc/c-family/c-ubsan.cc
@@ -554,322 +554,38 @@ ubsan_instrument_bounds (location_t loc, tree array, 
tree *index,
   *index, bound);
 }
 
-
-/* Instrument array bounds for the pointer array address which is
-   an INDIRECT_REF to the call to .ACCESS_WITH_SIZE.  We create special
-   builtin, that gets expanded in the sanopt pass, and make an array
-   dimention of it.  POINTER_ADDR is the pointer array's base address.
-   *INDEX is an index to the array.
-   IGNORE_OFF_BY_ONE is true if the POINTER_ADDR is not inside an
-   INDIRECT_REF.
-   Return NULL_TREE if no instrumentation is emitted.  */
-
-tree
-ubsan_instrument_bounds_pointer_address (location_t loc, tree pointer_addr,
-tree *index,
-bool ignore_off_by_one)
-{
-  gcc_assert (TREE_CODE (pointer_addr) == INDIRECT_REF);
-  tree call = TREE_OPERAND (pointer_addr, 0);
-  if (!is_access_with_size_p (call))
-return NULL_TREE;
-  tree bound = get_bound_from_access_with_size (call);
-
-  if (ignore_off_by_one)
-bound = fold_build2 (PLUS_EXPR, TREE_TYPE (bound), bound,
-build_int_cst (TREE_TYPE (bound),
-1));
-
-  /* Don't emit instrumentation in the most common cases.  */
-  tree idx = NULL_TREE;
-  if (TREE_CODE (*index) == INTEGER_CST)
-idx = *index;
-  else if (TREE_CODE (*index) == BIT_AND_EXPR
-  && TREE_CODE (TREE_OPERAND (*index, 1)) == INTEGER_CST)
-idx = TREE_OPERAND (*index, 1);
-  if (idx
-  && TREE_CODE (bound) == INTEGER_CST
-  && tree_int_cst_sgn (idx) >= 0
-  && tree_int_cst_lt (idx, bound))
-return NULL_TREE;
-
-  *index = save_expr (*index);
-
-  /* Create an array_type for the corresponding pointer array.  */
-  tree itype = build_range_type (sizetype, size_zero_node, NULL_TREE);
-  /* The array's element type can be get from the return type of the call to
- .ACCESS_WITH_SIZE.  */
-  tree element_type = TREE_TYPE (TREE_TYPE (TREE_TYPE (call)));
-  tree array_type = build_array_type (element_type, itype);
-  /* Create a "(T *) 0" tree node to describe the array type.  */
-  tree zero_with_type = build_int_cst (build_pointer_type (array_type), 0);
- 

[gcc r16-2077] libstdc++: Make VERIFY a variadic macro

2025-07-07 Thread Jonathan Wakely via Libstdc++-cvs
https://gcc.gnu.org/g:5ca5e1d54f237770ef5f32ff20c69711f720551c

commit r16-2077-g5ca5e1d54f237770ef5f32ff20c69711f720551c
Author: Jonathan Wakely 
Date:   Tue Jul 1 12:44:04 2025 +0100

libstdc++: Make VERIFY a variadic macro

This defines the testsuite assertion macro VERIFY so that it allows
un-parenthesized expressions containing commas. This matches how assert
is defined in C++26, following the approval of P2264R7.

The primary motivation is to allow expressions that the preprocessor
splits into multiple arguments, e.g.
VERIFY( vec == std::vector{1,2,3,4} );

To achieve this, VERIFY is redefined as a variadic macro and then the
arguments are grouped together again through the use of __VA_ARGS__.

The implementation is complex due to the following points:

- The arguments __VA_ARGS__ are contextually-converted to bool, so that
  scoped enums and types that are not contextually convertible to bool
  cannot be used with VERIFY.
- bool(__VA_ARGS__) is used so that multiple arguments (i.e. those which
  are separated by top-level commas) are ill-formed. Nested commas are
  allowed, but likely mistakes such as VERIFY( cond, "some string" ) are
  ill-formed.
- The bool(__VA_ARGS__) expression needs to be unevaluated, so that we
  don't evaluate __VA_ARGS__ more than once. The simplest way to do that
  would be just sizeof bool(__VA_ARGS__), without parentheses to avoid a
  vexing parse for VERIFY(bool(i)). However that wouldn't work for e.g.
  VERIFY( []{ return true; }() ), because lambda expressions are not
  allowed in unevaluated contexts until C++20. So we use another
  conditional expression with bool(__VA_ARGS__) as the unevaluated
  operand.

libstdc++-v3/ChangeLog:

* testsuite/util/testsuite_hooks.h (VERIFY): Define as variadic
macro.
* testsuite/ext/verify_neg.cc: New test.

Reviewed-by: Tomasz Kamiński 

Diff:
---
 libstdc++-v3/testsuite/ext/verify_neg.cc  | 28 +++
 libstdc++-v3/testsuite/util/testsuite_hooks.h | 17 +++-
 2 files changed, 35 insertions(+), 10 deletions(-)

diff --git a/libstdc++-v3/testsuite/ext/verify_neg.cc 
b/libstdc++-v3/testsuite/ext/verify_neg.cc
new file mode 100644
index ..ce033741beeb
--- /dev/null
+++ b/libstdc++-v3/testsuite/ext/verify_neg.cc
@@ -0,0 +1,28 @@
+// { dg-do compile { target c++11 } }
+
+#include 
+
+struct X { explicit operator void*() const { return nullptr; } };
+
+void
+test_VERIFY(int i)
+{
+  // This should not be parsed as a function type bool(bool(i)):
+  VERIFY( bool(i) );
+
+  // This should not produce warnings about lambda in unevaluated context:
+  VERIFY( []{ return 1; }() );
+
+  // Only one expression allowed:
+  VERIFY(1, 2); // { dg-error "in expansion of macro" }
+  // { dg-error "compound expression in functional cast" "" { target *-*-* } 0 
}
+
+  // A scoped enum is not contextually convertible to bool:
+  enum class E { E0 };
+  VERIFY( E::E0 ); // { dg-error "could not convert" }
+
+  // explicit conversion to void* is not contextually convertible to bool:
+  X x;
+  VERIFY( x ); // { dg-error "in expansion of macro" }
+  // { dg-error "invalid cast .* to type 'bool'" "" { target *-*-* } 0 }
+}
diff --git a/libstdc++-v3/testsuite/util/testsuite_hooks.h 
b/libstdc++-v3/testsuite/util/testsuite_hooks.h
index faa01ba6abd8..bf34fd121c1b 100644
--- a/libstdc++-v3/testsuite/util/testsuite_hooks.h
+++ b/libstdc++-v3/testsuite/util/testsuite_hooks.h
@@ -58,16 +58,13 @@
 # define _VERIFY_PRINT(S, F, L, P, C) __builtin_printf(S, F, L, P, C)
 #endif
 
-#define VERIFY(fn)  \
-  do\
-  { \
-if (! (fn))
\
-  {
\
-   _VERIFY_PRINT("%s:%d: %s: Assertion '%s' failed.\n",\
- __FILE__, __LINE__, __PRETTY_FUNCTION__, #fn);\
-   __builtin_abort();  \
-  }
\
-  } while (false)
+#define VERIFY(...)\
+   ((void)((__VA_ARGS__)   \
+? (void)(true ? true : bool(__VA_ARGS__))  \
+: (_VERIFY_PRINT("%s:%d: %s: Assertion '%s' failed.\n",\
+ __FILE__, __LINE__, __PRETTY_FUNCTION__,  \
+ #__VA_ARGS__),\
+   __builtin_abort(
 
 #ifdef _GLIBCXX_HAVE_UNISTD_H
 # include 


[gcc r16-2076] libstdc++: Use template keyword in __mapping_of alias template

2025-07-07 Thread Jonathan Wakely via Gcc-cvs
https://gcc.gnu.org/g:9450fb705caca3df0f968e66768eec6e38458a9f

commit r16-2076-g9450fb705caca3df0f968e66768eec6e38458a9f
Author: Jonathan Wakely 
Date:   Mon Jul 7 11:32:48 2025 +0100

libstdc++: Use template keyword in __mapping_of alias template

This is needed to fix an error with Clang 19:

include/c++/16.0.0/mdspan:512:30: error: use 'template' keyword to treat 
'mapping' as a dependent template name
 512 | is_same_v,
 | ^

libstdc++-v3/ChangeLog:

* include/std/mdspan (__mapping_of): Add template keyword.

Diff:
---
 libstdc++-v3/include/std/mdspan | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libstdc++-v3/include/std/mdspan b/libstdc++-v3/include/std/mdspan
index c72a64094b73..4a06fb2d3a86 100644
--- a/libstdc++-v3/include/std/mdspan
+++ b/libstdc++-v3/include/std/mdspan
@@ -509,7 +509,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
 template
   concept __mapping_of =
-   is_same_v,
+   is_same_v,
  _Mapping>;
 
 template


[gcc r16-2078] libstdc++: Fix attribute order on __normal_iterator friends [PR120949]

2025-07-07 Thread Jonathan Wakely via Gcc-cvs
https://gcc.gnu.org/g:ed912b1ee5ad0f241f968d5fd1a54a7e9e0e20dd

commit r16-2078-ged912b1ee5ad0f241f968d5fd1a54a7e9e0e20dd
Author: Jonathan Wakely 
Date:   Fri Jul 4 21:19:52 2025 +0100

libstdc++: Fix attribute order on __normal_iterator friends [PR120949]

In r16-1911-g6596f5ab746533 I claimed to have reordered some attributes
for compatibility with Clang, but it looks like I got the Clang
restriction backwards and put them all in the wrong order. Clang trunk
accepts either order (probably since the llvm/llvm-project#133107 fix)
but released versions still require a particular order.

There were also some cases where the attributes were after the friend
keyword, which Clang trunk still rejects.

libstdc++-v3/ChangeLog:

PR libstdc++/120949
* include/bits/stl_iterator.h (__normal_iterator): Fix order of
always_inline and nodiscard attributes for Clang compatibility.

Diff:
---
 libstdc++-v3/include/bits/stl_iterator.h | 30 --
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/libstdc++-v3/include/bits/stl_iterator.h 
b/libstdc++-v3/include/bits/stl_iterator.h
index a7188f46f6db..75e794f6c020 100644
--- a/libstdc++-v3/include/bits/stl_iterator.h
+++ b/libstdc++-v3/include/bits/stl_iterator.h
@@ -1211,7 +1211,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 #else
// Forward iterator requirements
   template
-   __attribute__((__always_inline__)) _GLIBCXX_NODISCARD
+   _GLIBCXX_NODISCARD __attribute__((__always_inline__))
friend
_GLIBCXX_CONSTEXPR
bool
@@ -1220,7 +1220,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
_GLIBCXX_NOEXCEPT
{ return __lhs.base() == __rhs.base(); }
 
-  __attribute__((__always_inline__)) _GLIBCXX_NODISCARD
+  _GLIBCXX_NODISCARD __attribute__((__always_inline__))
   friend
   _GLIBCXX_CONSTEXPR
   bool
@@ -1229,7 +1229,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { return __lhs.base() == __rhs.base(); }
 
   template
-   __attribute__((__always_inline__)) _GLIBCXX_NODISCARD
+   _GLIBCXX_NODISCARD __attribute__((__always_inline__))
friend
_GLIBCXX_CONSTEXPR
bool
@@ -1238,7 +1238,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
_GLIBCXX_NOEXCEPT
{ return __lhs.base() != __rhs.base(); }
 
-  __attribute__((__always_inline__)) _GLIBCXX_NODISCARD
+  _GLIBCXX_NODISCARD __attribute__((__always_inline__))
   friend
   _GLIBCXX_CONSTEXPR
   bool
@@ -1248,15 +1248,16 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   // Random access iterator requirements
   template
+   _GLIBCXX_NODISCARD __attribute__((__always_inline__))
friend
-   __attribute__((__always_inline__)) _GLIBCXX_NODISCARD _GLIBCXX_CONSTEXPR
+   _GLIBCXX_CONSTEXPR
inline bool
operator<(const __normal_iterator& __lhs,
  const __normal_iterator<_Iter, _Container>& __rhs)
_GLIBCXX_NOEXCEPT
{ return __lhs.base() < __rhs.base(); }
 
-  __attribute__((__always_inline__)) _GLIBCXX_NODISCARD
+  _GLIBCXX_NODISCARD __attribute__((__always_inline__))
   friend
   _GLIBCXX20_CONSTEXPR
   bool
@@ -1265,15 +1266,16 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { return __lhs.base() < __rhs.base(); }
 
   template
+   _GLIBCXX_NODISCARD __attribute__((__always_inline__))
friend
-   __attribute__((__always_inline__)) _GLIBCXX_NODISCARD _GLIBCXX_CONSTEXPR
+   _GLIBCXX_CONSTEXPR
bool
operator>(const __normal_iterator& __lhs,
  const __normal_iterator<_Iter, _Container>& __rhs)
_GLIBCXX_NOEXCEPT
{ return __lhs.base() > __rhs.base(); }
 
-  __attribute__((__always_inline__)) _GLIBCXX_NODISCARD
+  _GLIBCXX_NODISCARD __attribute__((__always_inline__))
   friend
   _GLIBCXX_CONSTEXPR
   bool
@@ -1282,7 +1284,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { return __lhs.base() > __rhs.base(); }
 
   template
-   __attribute__((__always_inline__)) _GLIBCXX_NODISCARD
+   _GLIBCXX_NODISCARD __attribute__((__always_inline__))
friend
_GLIBCXX_CONSTEXPR
bool
@@ -1291,7 +1293,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
_GLIBCXX_NOEXCEPT
{ return __lhs.base() <= __rhs.base(); }
 
-  __attribute__((__always_inline__)) _GLIBCXX_NODISCARD
+  _GLIBCXX_NODISCARD __attribute__((__always_inline__))
   friend
   _GLIBCXX_CONSTEXPR
   bool
@@ -1300,7 +1302,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { return __lhs.base() <= __rhs.base(); }
 
   template
-   __attribute__((__always_inline__)) _GLIBCXX_NODISCARD
+   _GLIBCXX_NODISCARD __attribute__((__always_inline__))
friend
_GLIBCXX_CONSTEXPR
bool
@@ -1309,7 +1311,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
_GLIBCXX_NOEXCEPT
{ return __lhs.base() >= __rhs.base(); }
 
-  __attribute__((__al

[gcc(refs/users/mikael/heads/deplacement_reallocation_v01)] Prise en charge affichage TARGET_MEM_REF

2025-07-07 Thread Mikael Morin via Gcc-cvs
https://gcc.gnu.org/g:1b037a0e524fa6bd4eba3889751e6f7b24018934

commit 1b037a0e524fa6bd4eba3889751e6f7b24018934
Author: Mikael Morin 
Date:   Mon Jul 7 08:52:38 2025 +0200

Prise en charge affichage TARGET_MEM_REF

Diff:
---
 gcc/gimple-simulate.cc| 87 ---
 gcc/selftest-run-tests.cc |  2 ++
 gcc/selftest.h|  1 +
 3 files changed, 86 insertions(+), 4 deletions(-)

diff --git a/gcc/gimple-simulate.cc b/gcc/gimple-simulate.cc
index aa29b68b748c..a85e6f63cc92 100644
--- a/gcc/gimple-simulate.cc
+++ b/gcc/gimple-simulate.cc
@@ -903,6 +903,9 @@ static tree
 find_mem_ref_replacement (simul_scope & context, tree data_ref,
  unsigned offset, unsigned min_size)
 {
+  gcc_assert (TREE_CODE (data_ref) == MEM_REF
+ || TREE_CODE (data_ref) == TARGET_MEM_REF);
+
   tree ptr = TREE_OPERAND (data_ref, 0);
   data_value ptr_val = context.evaluate (ptr);
   if (ptr_val.classify () != VAL_ADDRESS)
@@ -923,12 +926,30 @@ find_mem_ref_replacement (simul_scope & context, tree 
data_ref,
 {
   tree access_offset = TREE_OPERAND (data_ref, 1);
   gcc_assert (TREE_CONSTANT (access_offset));
-  gcc_assert (tree_fits_shwi_p (access_offset));
-  HOST_WIDE_INT shwi_offset = tree_to_shwi (access_offset);
-  gcc_assert (offset < UINT_MAX - shwi_offset);
-  HOST_WIDE_INT remaining_offset = shwi_offset * CHAR_BIT
+  gcc_assert (tree_fits_uhwi_p (access_offset));
+  HOST_WIDE_INT uhwi_offset = tree_to_uhwi (access_offset);
+  gcc_assert (offset < UINT_MAX - uhwi_offset);
+  HOST_WIDE_INT remaining_offset = uhwi_offset * CHAR_BIT
   + offset + ptr_address->offset;
 
+  if (TREE_CODE (data_ref) == TARGET_MEM_REF)
+   {
+ tree idx = TREE_OPERAND (data_ref, 2);
+ data_value idx_val = context.evaluate (idx);
+ gcc_assert (idx_val.classify () == VAL_KNOWN);
+ wide_int wi_idx = idx_val.get_known ();
+
+ tree step = TREE_OPERAND (data_ref, 3);
+ data_value step_val = context.evaluate (step);
+ gcc_assert (step_val.classify () == VAL_KNOWN);
+ wide_int wi_step = step_val.get_known ();
+
+ wi_idx *= wi_step;
+ gcc_assert (wi::fits_uhwi_p (wi_idx));
+ HOST_WIDE_INT idx_offset = wi_idx.to_uhwi ();
+ remaining_offset += idx_offset * CHAR_BIT;
+   }
+
   return pick_subref_at (var_ref, remaining_offset, nullptr, min_size);
 }
 }
@@ -957,6 +978,7 @@ context_printer::print_first_data_ref_part (simul_scope & 
context,
   switch (TREE_CODE (data_ref))
 {
 case MEM_REF:
+case TARGET_MEM_REF:
   {
tree mem_replacement = find_mem_ref_replacement (context, data_ref,
 offset, min_size);
@@ -4432,6 +4454,63 @@ context_printer_print_value_update_tests ()
   printer9.print_value_update (ctx9, ref9, val9_addr_i);
   const char *str9 = pp_formatted_text (&pp9);
   ASSERT_STREQ (str9, "# v17c[8B:+8B] = &i\n");
+
+
+  heap_memory mem10;
+  context_printer printer10;
+  pretty_printer & pp10 = printer10.pp;
+  pp_buffer (&pp10)->m_flush_p = false;
+
+  tree a11c_10 = build_array_type_nelts (char_type_node, 11);
+  tree v11c_10 = create_var (a11c_10, "v11c");
+  tree p_10 = create_var (ptr_type_node, "p");
+  tree i_10 = create_var (size_type_node, "i");
+
+  vec decls10{};
+  decls10.safe_push (v11c_10);
+  decls10.safe_push (p_10);
+  decls10.safe_push (i_10);
+
+  context_builder builder10;
+  builder10.add_decls (&decls10);
+  simul_scope ctx10 = builder10.build (mem10, printer10);
+
+  data_storage *strg10_v11 = ctx10.find_reachable_var (v11c_10);
+  gcc_assert (strg10_v11 != nullptr);
+  storage_address addr10_v11 (strg10_v11->get_ref (), 0);
+
+  data_value val10_addr_v11 (ptr_type_node);
+  val10_addr_v11.set_address (addr10_v11);
+
+  data_storage *strg10_p = ctx10.find_reachable_var (p_10);
+  gcc_assert (strg10_p != nullptr);
+  strg10_p->set (val10_addr_v11);
+
+  data_value val10_cst_2 (size_type_node);
+  wide_int cst2_10 = wi::uhwi (2, TYPE_PRECISION (size_type_node));
+  val10_cst_2.set_known (cst2_10);
+
+  data_storage *strg10_i = ctx10.find_reachable_var (i_10);
+  gcc_assert (strg10_i != nullptr);
+  strg10_i->set (val10_cst_2);
+
+  tree int_ptr_10 = build_pointer_type (integer_type_node);
+
+  tree ref10 = build5 (TARGET_MEM_REF, integer_type_node, p_10,
+  build_int_cst (int_ptr_10, -4), i_10,
+  build_int_cst (size_type_node, 4), NULL_TREE);
+
+  data_value val10_cst_13 (integer_type_node);
+  wide_int wi10_13 = wi::shwi (13, TYPE_PRECISION (integer_type_node));
+  val10_cst_13.set_known (wi10_13);
+
+  printer10.print_value_update (ctx10, ref10, val10_cst_13);
+  const char *str10 = pp_formatted_text (&pp10);
+  ASSERT_STREQ (str10,
+   "# v11c[4] = 13\n"
+   "# v11c[5] = 0\n"
+   "# v11c[6] = 0\n"
+  

[gcc r12-11255] Revert "c++: Fix up cp_build_array_ref COND_EXPR handling [PR120471]"

2025-07-07 Thread Jakub Jelinek via Gcc-cvs
https://gcc.gnu.org/g:486c32501aafce188649da2c234229dfbd2fd202

commit r12-11255-g486c32501aafce188649da2c234229dfbd2fd202
Author: Jakub Jelinek 
Date:   Mon Jul 7 09:51:51 2025 +0200

Revert "c++: Fix up cp_build_array_ref COND_EXPR handling [PR120471]"

This reverts commit b5f0faa4eb71650a9dde3938c3a98eda710534de.

Diff:
---
 gcc/cp/typeck.cc  | 130 ++
 gcc/testsuite/g++.dg/parse/pr120471.C |  42 ---
 gcc/testsuite/g++.dg/ubsan/pr120471.C |  21 --
 3 files changed, 7 insertions(+), 186 deletions(-)

diff --git a/gcc/cp/typeck.cc b/gcc/cp/typeck.cc
index 19dfaf18928f..89ff595ec513 100644
--- a/gcc/cp/typeck.cc
+++ b/gcc/cp/typeck.cc
@@ -3811,129 +3811,13 @@ cp_build_array_ref (location_t loc, tree array, tree 
idx,
   }
 
 case COND_EXPR:
-  tree op0, op1, op2;
-  op0 = TREE_OPERAND (array, 0);
-  op1 = TREE_OPERAND (array, 1);
-  op2 = TREE_OPERAND (array, 1);
-  if (TREE_SIDE_EFFECTS (idx) || !tree_invariant_p (idx))
-   {
- /* If idx could possibly have some SAVE_EXPRs, turning
-(op0 ? op1 : op2)[idx] into
-op0 ? op1[idx] : op2[idx] can lead into temporaries
-initialized in one conditional path and uninitialized
-uses of them in the other path.
-And if idx is a really large expression, evaluating it
-twice is also not optimal.
-On the other side, op0 must be sequenced before evaluation
-of op1 and op2 and for C++17 op0, op1 and op2 must be
-sequenced before idx.
-If idx is INTEGER_CST, we can just do the optimization
-without any SAVE_EXPRs, if op1 and op2 are both ARRAY_TYPE
-VAR_DECLs or COMPONENT_REFs thereof (so their address
-is constant or relative to frame), optimize into
-(SAVE_EXPR , SAVE_EXPR , SAVE_EXPR )
-? op1[SAVE_EXPR ] : op2[SAVE_EXPR ]
-Otherwise avoid this optimization.  */
- if (flag_strong_eval_order == 2)
-   {
- if (TREE_CODE (TREE_TYPE (array)) == ARRAY_TYPE)
-   {
- tree xop1 = op1;
- tree xop2 = op2;
- while (xop1 && handled_component_p (xop1))
-   {
- switch (TREE_CODE (xop1))
-   {
-   case ARRAY_REF:
-   case ARRAY_RANGE_REF:
- if (!tree_invariant_p (TREE_OPERAND (xop1, 1))
- || TREE_OPERAND (xop1, 2) != NULL_TREE
- || TREE_OPERAND (xop1, 3) != NULL_TREE)
-   {
- xop1 = NULL_TREE;
- continue;
-   }
- break;
-
-   case COMPONENT_REF:
- if (TREE_OPERAND (xop1, 2) != NULL_TREE)
-   {
- xop1 = NULL_TREE;
- continue;
-   }
- break;
-
-   default:
- break;
-   }
- xop1 = TREE_OPERAND (xop1, 0);
-   }
- if (xop1)
-   STRIP_ANY_LOCATION_WRAPPER (xop1);
- while (xop2 && handled_component_p (xop2))
-   {
- switch (TREE_CODE (xop2))
-   {
-   case ARRAY_REF:
-   case ARRAY_RANGE_REF:
- if (!tree_invariant_p (TREE_OPERAND (xop2, 1))
- || TREE_OPERAND (xop2, 2) != NULL_TREE
- || TREE_OPERAND (xop2, 3) != NULL_TREE)
-   {
- xop2 = NULL_TREE;
- continue;
-   }
- break;
-
-   case COMPONENT_REF:
- if (TREE_OPERAND (xop2, 2) != NULL_TREE)
-   {
- xop2 = NULL_TREE;
- continue;
-   }
- break;
-
-   default:
- break;
-   }
- xop2 = TREE_OPERAND (xop2, 0);
-   }
- if (xop2)
-   STRIP_ANY_LOCATION_WRAPPER (xop2);
-
- if (!xop1
- || !xop2
- || !(CONSTANT_CLASS_P (xop1)
-  || decl_address_invariant_p (xop1))
- || !(CONSTANT_CLASS_P (xop2)
-  || decl_address_invariant_p (xop2)))
-   {
- /* Force default conversion on array if
-   

[gcc r16-2055] s390: Add some missing vector patterns.

2025-07-07 Thread Juergen Christ via Gcc-cvs
https://gcc.gnu.org/g:188acc9e8bacdbba56ed2b32d09f191da759500a

commit r16-2055-g188acc9e8bacdbba56ed2b32d09f191da759500a
Author: Juergen Christ 
Date:   Mon Jun 23 12:04:20 2025 +0200

s390: Add some missing vector patterns.

Some patterns that are detected by the autovectorizer can be supported by
s390.  Add expanders such that autovectorization of these patterns works.

RTL for the builtins used unspec to represent highpart multiplication.
Replace this by the correct RTL to allow further simplification.

gcc/ChangeLog:

* config/s390/s390.md: Removed unused unspecs.
* config/s390/vector.md (avg3_ceil): New expander.
(uavg3_ceil): New expander.
(smul3_highpart): New expander.
(umul3_highpart): New expander.
* config/s390/vx-builtins.md (vec_umulh): Remove unspec.
(vec_smulh): Remove unspec.

gcc/testsuite/ChangeLog:

* gcc.target/s390/vector/pattern-avg-1.c: New test.
* gcc.target/s390/vector/pattern-mulh-1.c: New test.

Signed-off-by: Juergen Christ 

Diff:
---
 gcc/config/s390/s390.md|  3 ---
 gcc/config/s390/vector.md  | 26 +++
 gcc/config/s390/vx-builtins.md | 14 +--
 .../gcc.target/s390/vector/pattern-avg-1.c | 26 +++
 .../gcc.target/s390/vector/pattern-mulh-1.c| 29 ++
 5 files changed, 87 insertions(+), 11 deletions(-)

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 97a4bdf96b2d..440ce93574f4 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -139,9 +139,6 @@
UNSPEC_LCBB
 
; Vector
-   UNSPEC_VEC_SMULT_HI
-   UNSPEC_VEC_UMULT_HI
-   UNSPEC_VEC_SMULT_LO
UNSPEC_VEC_SMULT_EVEN
UNSPEC_VEC_UMULT_EVEN
UNSPEC_VEC_SMULT_ODD
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 7251a76c3aea..7c706ecd89c7 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -3576,3 +3576,29 @@
 ; vec_unpacks_float_lo
 ; vec_unpacku_float_hi
 ; vec_unpacku_float_lo
+
+(define_expand "avg3_ceil"
+  [(set (match_operand:VIT_HW_VXE3_T0 
"register_operand")
+   (unspec:VIT_HW_VXE3_T [(match_operand:VIT_HW_VXE3_T 1 
"register_operand")
+  (match_operand:VIT_HW_VXE3_T 2 
"register_operand")]
+ UNSPEC_VEC_AVG))]
+  "TARGET_VX")
+
+(define_expand "uavg3_ceil"
+  [(set (match_operand:VIT_HW_VXE3_T0 
"register_operand")
+   (unspec:VIT_HW_VXE3_T [(match_operand:VIT_HW_VXE3_T 1 
"register_operand")
+  (match_operand:VIT_HW_VXE3_T 2 
"register_operand")]
+ UNSPEC_VEC_AVGU))]
+  "TARGET_VX")
+
+(define_expand "smul3_highpart"
+  [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand")
+   (smul_highpart:VIT_HW_VXE3_DT (match_operand:VIT_HW_VXE3_DT 1 
"register_operand")
+ (match_operand:VIT_HW_VXE3_DT 2 
"register_operand")))]
+  "TARGET_VX")
+
+(define_expand "umul3_highpart"
+  [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand")
+   (umul_highpart:VIT_HW_VXE3_DT (match_operand:VIT_HW_VXE3_DT 1 
"register_operand")
+ (match_operand:VIT_HW_VXE3_DT 2 
"register_operand")))]
+  "TARGET_VX")
diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index a7bb7ff92f5e..9e5d18bcb8f4 100644
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -982,20 +982,18 @@
 
 ; vmhb, vmhh, vmhf, vmhg, vmhq
 (define_insn "vec_smulh"
-  [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" 
  "=v")
-   (unspec:VIT_HW_VXE3_DT [(match_operand:VIT_HW_VXE3_DT 1 
"register_operand" "v")
-   (match_operand:VIT_HW_VXE3_DT 2 
"register_operand" "v")]
-  UNSPEC_VEC_SMULT_HI))]
+  [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" 
 "=v")
+   (smul_highpart:VIT_HW_VXE3_DT (match_operand:VIT_HW_VXE3_DT 1 
"register_operand" "v")
+ (match_operand:VIT_HW_VXE3_DT 2 
"register_operand" "v")))]
   "TARGET_VX"
   "vmh\t%v0,%v1,%v2"
   [(set_attr "op_type" "VRR")])
 
 ; vmlhb, vmlhh, vmlhf, vmlhg, vmlhq
 (define_insn "vec_umulh"
-  [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" 
  "=v")
-   (unspec:VIT_HW_VXE3_DT [(match_operand:VIT_HW_VXE3_DT 1 
"register_operand" "v")
-   (match_operand:VIT_HW_VXE3_DT 2 
"register_operand" "v")]
-  UNSPEC_VEC_UMULT_HI))]
+  [(set (match_operand:VIT_HW_VXE3_DT 0 "register_operand" 
 "=v")
+   (umul_highpart:VIT_HW_VXE3_DT (match_operand:VIT_HW_VXE3_DT 1 
"register_op

[gcc r16-2069] xtensa: Remove TARGET_PROMOTE_PROTOTYPES

2025-07-07 Thread Max Filippov via Gcc-cvs
https://gcc.gnu.org/g:2a6ac385076a0d43a529e84e7f7ebcbfc3831437

commit r16-2069-g2a6ac385076a0d43a529e84e7f7ebcbfc3831437
Author: H.J. Lu 
Date:   Tue Jul 1 04:46:31 2025 +0800

xtensa: Remove TARGET_PROMOTE_PROTOTYPES

xtensa ABI requires sign extension of signed 8/16-bit arguments to 32
bits and zero extension of unsigned 8/16-bit arguments to 32 bits.
TARGET_PROMOTE_PROTOTYPES is an optimization, not an ABI requirement.
Remove TARGET_PROMOTE_PROTOTYPES and define xtensa_promote_function_mode
to properly extend 8/16-bit arguments to 32 bits.

gcc/

PR target/120888
* config/xtensa/xtensa.cc (xtensa_promote_function_mode): New.
(TARGET_PROMOTE_FUNCTION_MODE): Use.
(TARGET_PROMOTE_PROTOTYPES): Removed.

gcc/testsuite/

PR target/120888
* gcc.target/xtensa/pr120888-1.c: New test.
* gcc.target/xtensa/pr120888-2.c: Likewise.

Signed-off-by: H.J. Lu 

Diff:
---
 gcc/config/xtensa/xtensa.cc  | 21 ++---
 gcc/testsuite/gcc.target/xtensa/pr120888-1.c | 11 +++
 gcc/testsuite/gcc.target/xtensa/pr120888-2.c | 11 +++
 3 files changed, 40 insertions(+), 3 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index 92a236440c4a..8c43a69f4cd9 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -159,6 +159,10 @@ static void xtensa_asm_trampoline_template (FILE *);
 static void xtensa_trampoline_init (rtx, tree, rtx);
 static bool xtensa_output_addr_const_extra (FILE *, rtx);
 static bool xtensa_cannot_force_const_mem (machine_mode, rtx);
+static machine_mode xtensa_promote_function_mode (const_tree,
+ machine_mode,
+ int *, const_tree,
+ int);
 
 static reg_class_t xtensa_preferred_reload_class (rtx, reg_class_t);
 static reg_class_t xtensa_preferred_output_reload_class (rtx, reg_class_t);
@@ -235,9 +239,7 @@ static HARD_REG_SET xtensa_zero_call_used_regs 
(HARD_REG_SET);
 #define TARGET_EXPAND_BUILTIN_VA_START xtensa_va_start
 
 #undef TARGET_PROMOTE_FUNCTION_MODE
-#define TARGET_PROMOTE_FUNCTION_MODE 
default_promote_function_mode_always_promote
-#undef TARGET_PROMOTE_PROTOTYPES
-#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
+#define TARGET_PROMOTE_FUNCTION_MODE xtensa_promote_function_mode
 
 #undef TARGET_RETURN_IN_MEMORY
 #define TARGET_RETURN_IN_MEMORY xtensa_return_in_memory
@@ -4801,6 +4803,19 @@ xtensa_insn_cost (rtx_insn *insn, bool speed)
   return pattern_cost (PATTERN (insn), speed);
 }
 
+/* Worker function for TARGET_PROMOTE_FUNCTION_MODE.  */
+
+static machine_mode
+xtensa_promote_function_mode (const_tree type, machine_mode mode,
+ int *punsignedp, const_tree, int)
+{
+  if (GET_MODE_CLASS (mode) == MODE_INT
+  && GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
+return SImode;
+
+  return promote_mode (type, mode, punsignedp);
+}
+
 /* Worker function for TARGET_RETURN_IN_MEMORY.  */
 
 static bool
diff --git a/gcc/testsuite/gcc.target/xtensa/pr120888-1.c 
b/gcc/testsuite/gcc.target/xtensa/pr120888-1.c
new file mode 100644
index ..f438e4c676cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/xtensa/pr120888-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -fdump-rtl-expand" } */
+
+void u8(unsigned char c);
+void cu8(unsigned char *p)
+{
+  u8(*p);
+}
+
+/* { dg-final { scan-rtl-dump "zero_extend" "expand" } } */
+/* { dg-final { scan-rtl-dump-not "sign_extend" "expand" } } */
diff --git a/gcc/testsuite/gcc.target/xtensa/pr120888-2.c 
b/gcc/testsuite/gcc.target/xtensa/pr120888-2.c
new file mode 100644
index ..9b5caad83298
--- /dev/null
+++ b/gcc/testsuite/gcc.target/xtensa/pr120888-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -fdump-rtl-expand" } */
+
+void s8(signed char c);
+void cs8(signed char *p)
+{
+  s8(*p);
+}
+
+/* { dg-final { scan-rtl-dump "sign_extend" "expand" } } */
+/* { dg-final { scan-rtl-dump-not "zero_extend" "expand" } } */


[gcc r16-2070] ranger: Mark three occurrences of verify_range with overide

2025-07-07 Thread Martin Jambor via Gcc-cvs
https://gcc.gnu.org/g:5af316dfce2aabd802b15146086cf5fe7075f4fe

commit r16-2070-g5af316dfce2aabd802b15146086cf5fe7075f4fe
Author: Martin Jambor 
Date:   Mon Jul 7 21:48:16 2025 +0200

ranger: Mark three occurrences of verify_range with overide

In line with my previous patches introducing override where clang
warnings indicate that they are missing, this patch adds it to three
new member functions overriding ancestor virtual functions that do not
have them.

Since Andrew has pre-approved such changes for ranger, I am going to
push it to master after bootstrapping it on x86_64-linux.

Thanks,

Martin

gcc/ChangeLog:

2025-07-07  Martin Jambor  

* value-range.h (class irange): Mark member function verify_range
with override.
(class prange): Mark member function verify_range with final 
override.
(class frange): Mark member function verify_range with override.

Diff:
---
 gcc/value-range.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/value-range.h b/gcc/value-range.h
index 5c358f3c70cd..3bc02db43a50 100644
--- a/gcc/value-range.h
+++ b/gcc/value-range.h
@@ -324,7 +324,7 @@ public:
   virtual void update_bitmask (const class irange_bitmask &) override;
   virtual irange_bitmask get_bitmask () const override;
 
-  virtual void verify_range () const;
+  virtual void verify_range () const override;
 protected:
   void maybe_resize (int needed);
   virtual void set (tree, tree, value_range_kind = VR_RANGE) override;
@@ -422,7 +422,7 @@ public:
   bool contains_p (const wide_int &) const;
   wide_int lower_bound () const;
   wide_int upper_bound () const;
-  virtual void verify_range () const;
+  virtual void verify_range () const final override;
   irange_bitmask get_bitmask () const final override;
   void update_bitmask (const irange_bitmask &) final override;
 protected:
@@ -594,7 +594,7 @@ public:
   bool nan_signbit_p (bool &signbit) const;
   bool known_isnormal () const;
   bool known_isdenormal_or_zero () const;
-  virtual void verify_range () const;
+  virtual void verify_range () const override;
 protected:
   virtual bool contains_p (tree cst) const override;
   virtual void set (tree, tree, value_range_kind = VR_RANGE) override;


[gcc r16-2071] Ignore more clang warnings in contrib/filter-clang-warnings.py

2025-07-07 Thread Martin Jambor via Gcc-cvs
https://gcc.gnu.org/g:f555ee597ac4fa522da798e9c6a966903a5b7113

commit r16-2071-gf555ee597ac4fa522da798e9c6a966903a5b7113
Author: Martin Jambor 
Date:   Mon Jul 7 21:50:19 2025 +0200

Ignore more clang warnings in contrib/filter-clang-warnings.py

in contrib we have a script filter-clang-warnings.py which supposedly
filters out uninteresting warnings emitted by clang when it compiles
GCC.  I'm not sure if anyone else uses it but our internal SUSE
testing infrastructure does.

Since Martin Liška left, I have mostly ignored the warnings and so
they have multiplied.  In an effort to improve the situation, I have
tried to fix those warnings which I think are worth it and would like
to adjust the filtering script so that we get to zero "interesting"
warnings again.

The changes are the following:

1. Ignore -Woverloaded-shift-op-parentheses warnings.  IIUC, those
   make some sense when << and >> are used for I/O but since that is
   not the case in GCC they are not really interesting.

2. Ignore -Wunused-function and -Wunneeded-internal-declaration.  I
   think it is OK to occasionally prepare APIs before they are used
   (and with our LTO we should be able to get rid of them).

3. Ignore -Wvla-cxx-extension and -Wunused-command-line-argument which
   just don't seem to be useful.

4. Ignore -Wunused-private-field warning in diagnostic-path-output.cc
   which can only be correct if quite a few functions are removed and
   looks like it is just not an oversight:

 gcc/diagnostic-path-output.cc:271:35: warning: private field 
'm_logical_loc_mgr' is not used [-Wunused-private-field]

5. Ignore a case in -Wunused-but-set-variable about named_args which
   is used in a piece of code behind an ifdef in ipa-strub.cc.

6. Adjust the gimple-match and generic-match filters to the fact that
   we now have multiple such files.

7. Ignore warnings about using memcpy to copy around wide_ints, like
   the one below.  I seem to remember wide-int has undergone fairly
   rigorous review and TBH I just hope I know what we are doing.

 gcc/wide-int.h:1198:11: warning: first argument in call to 'memcpy' is 
a pointer to non-trivially copyable type 'wide_int_storage' 
[-Wnontrivial-memcall]

8. Ignore -Wc++11-narrowing warning reported in omp-builtins.def when
   it is included from JIT.  The code probably has a bigger issue
   described in PR 120960.

9. Since the patch number 14 in the original series did not get
   approved, I assume that private member field m_wanted_type of class
   element_expected_type_with_indirection in c-family/c-format.cc will
   get a use sooner or later, so I ignore a warning about it being
   unused.

10. I have decided to ignore warnings in m2/gm2-compiler-boot about
unused stuff (all reported unused stuff are variables).  These
sources are in the build directory so I assume they are somehow
generated and so warnings about unused things are a bit expected
and probably not too bad.

11. On the Zulip chat, I have informed Rust folks they have a bunch of
-Wunused-private-field cases in the FE.  Until they sort it out
I'm ignoring these.  I might add the missing explicit type-cast
case here too if it takes time for the patch I'm posting in this
series to reach master.

12. I ignore warning about use of offsetof in libiberty/sha1.c which is
apparently only a "C23 extension:"

  libiberty/sha1.c:239:11: warning: defining a type within 'offsetof' 
is a C23 extension [-Wc23-extensions]
  libiberty/sha1.c:460:11: warning: defining a type within 'offsetof' 
is a C23 extension [-Wc23-extensions]

13. I have enlarged the list of .texi files where warnings somehow got
reported.  Not sure why that happens.

14. In analyzer/sm.cc there are several "no-op" methods which have
named but unused parameters.  It seems this is deliberate and so I
have filtered the -Wunused-parameter warning for this file.

I have also re-arranged the entries in a way which hopefully makes
somewhat more sense.

Thanks,

Martin

contrib/ChangeLog:

2025-07-07  Martin Jambor  

* filter-clang-warnings.py (skip_warning): Also ignore
-Woverloaded-shift-op-parentheses, -Wunused-function,
-Wunneeded-internal-declaration, -Wvla-cxx-extension', and
-Wunused-command-line-argument everywhere and a warning about
m_logical_loc_mgr in diagnostic-path-output.cc.  Adjust gimple-match
and generic-match "filenames."  Ignore -Wnontrivial-memcall warnings
in wide-int.h, all warnings about unused stuff in files under
m2/gm2-compiler-boot, all -Wunus

[gcc r16-2084] libstdc++: Make debug iterator pointer sequence const [PR116369]

2025-07-07 Thread Francois Dumont via Gcc-cvs
https://gcc.gnu.org/g:2fd6f42c17a8040dbd3460ca34d93695dacf8575

commit r16-2084-g2fd6f42c17a8040dbd3460ca34d93695dacf8575
Author: François Dumont 
Date:   Thu Mar 27 19:02:59 2025 +0100

libstdc++: Make debug iterator pointer sequence const [PR116369]

In revision a35dd276cbf6236e08bcf6e56e62c2be41cf6e3c the debug sequence
have been made mutable to allow attach iterators to const containers.
This change completes this fix by also declaring debug unordered container
members mutable.

Additionally the debug iterator sequence is now a pointer-to-const and so
_Safe_sequence_base _M_attach and all other methods are const qualified.
Not-const methods exported are preserved for abi backward compatibility.

libstdc++-v3/ChangeLog:

PR c++/116369
* config/abi/pre/gnu-versioned-namespace.ver: Use new const 
qualified symbols.
* config/abi/pre/gnu.ver: Add new const qualified symbols.
* include/debug/safe_base.h
(_Safe_iterator_base::_M_sequence): Declare as pointer-to-const.
(_Safe_iterator_base::_M_attach, _M_attach_single): New, take 
pointer-to-const
_Safe_sequence_base.
(_Safe_sequence_base::_M_detach_all, _M_detach_singular, 
_M_revalidate_singular)
(_M_swap, _M_get_mutex): New, const qualified.
(_Safe_sequence_base::_M_attach, _M_attach_single, _M_detach, 
_M_detach_single):
const qualify.
* include/debug/safe_container.h (_Safe_container<>::_M_cont): Add 
const qualifier.
(_Safe_container<>::_M_swap_base): New.
(_Safe_container(_Safe_container&&, const _Alloc&, 
std::false_type)):
Adapt to use latter.
(_Safe_container<>::operator=(_Safe_container&&)): Likewise.
(_Safe_container<>::_M_swap): Likewise and take parameter as const 
reference.
* include/debug/safe_unordered_base.h
(_Safe_local_iterator_base::_M_safe_container): New.
(_Safe_local_iterator_base::_Safe_local_iterator_base): Take
_Safe_unordered_container_base as pointer-to-const.
(_Safe_unordered_container_base::_M_attach, _M_attach_single): New, 
take
container as _Safe_unordered_container_base pointer-to-const.
(_Safe_unordered_container_base::_M_local_iterators, 
_M_const_local_iterators):
Add mutable.
(_Safe_unordered_container_base::_M_detach_all, _M_swap): New, 
const qualify.
(_Safe_unordered_container_base::_M_attach_local, 
_M_attach_local_single)
(_M_detach_local, _M_detach_local_single): Add const qualifier.
* include/debug/safe_unordered_container.h 
(_Safe_unordered_container::_M_self()): New.
* include/debug/safe_unordered_container.tcc
(_Safe_unordered_container::_M_invalidate_if, 
_M_invalidated_local_if): Use latter.
* include/debug/safe_iterator.h (_Safe_iterator<>::_M_attach, 
_M_attach_single):
Take _Safe_sequence_base as pointer-to-const.
(_Safe_iterator<>::_M_get_sequence): Add const_cast and comment 
about it.
* include/debug/safe_local_iterator.h (_Safe_local_iterator<>): 
Replace usages
of _M_sequence member by _M_safe_container().
(_Safe_local_iterator<>::_M_attach, _M_attach_single): Take
_Safe_unordered_container_base as pointer-to-const.
(_Safe_local_iterator<>::_M_get_sequence): Rename into...
(_Safe_local_iterator<>::_M_get_ucontainer): ...this. Add necessary 
const_cast and
comment to explain it.
(_Safe_local_iterator<>::_M_is_begin, _M_is_end): Adapt.
* include/debug/safe_local_iterator.tcc: Adapt.
* include/debug/safe_sequence.h
(_Safe_sequence<>::_M_invalidate_if, _M_transfer_from_if): Add 
const qualifier.
* include/debug/safe_sequence.tcc: Adapt.
* include/debug/deque (std::__debug::deque::erase): Adapt to use 
new const
qualified methods.
* include/debug/formatter.h: Adapt.
* include/debug/forward_list (_Safe_forward_list::_M_this): Add 
const
qualification and return pointer for consistency with 'this' 
keyword.
(_Safe_forward_list::_M_swap_aux): Rename into...
(_Safe_forward_list::_S_swap_aux): ...this and take sequence as 
const reference.
(forward_list<>::resize): Adapt to use const methods.
* include/debug/list (list<>::resize): Likewise.
* src/c++11/debug.cc: Adapt to const qualification.
* testsuite/util/testsuite_containers.h
(forward_members_unordered::forward_members_unordered): Add check 
on local_iterator
conversion to const_local_iterator.
(forward_members::forward_members): Add check on iterator 
conversion to
const_iterator.

[gcc r16-2080] [vxworks] add aarch64 to vxworks-dummy.h set

2025-07-07 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:e46933d3cc82b644467a47dd90c7169efa5c2158

commit r16-2080-ge46933d3cc82b644467a47dd90c7169efa5c2158
Author: Alexandre Oliva 
Date:   Mon Jul 7 21:25:18 2025 -0300

[vxworks] add aarch64 to vxworks-dummy.h set

It's not strictly necessary, because nothing defined therein is
referenced by anything in gcc/config/aarch64, but it was an oversight
to not have it there.


for  gcc/ChangeLog

* config.gcc (vxworks-dummy.h): Add to aarch64-*-* as well.

Diff:
---
 gcc/config.gcc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index a6f6efec4e10..5953ace0afff 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5894,7 +5894,7 @@ esac
 # distinguish VxWorks variants such as VxWorks 7 or 64).
 
 case ${target} in
-arm*-*-* | i[34567]86-*-* | mips*-*-* | powerpc*-*-* | sh*-*-* \
+aarch64*-*-* | arm*-*-* | i[34567]86-*-* | mips*-*-* | powerpc*-*-* | sh*-*-* \
 | sparc*-*-* | x86_64-*-*)
tm_file="vxworks-dummy.h ${tm_file}"
;;


[gcc r16-2083] [vxworks] [x86] disable vxworks6 PIC on vxworks7

2025-07-07 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:a90dad293ce4919a44b20a4a329551c4b9e1348f

commit r16-2083-ga90dad293ce4919a44b20a4a329551c4b9e1348f
Author: Alexandre Oliva 
Date:   Mon Jul 7 23:57:02 2025 -0300

[vxworks] [x86] disable vxworks6 PIC on vxworks7

VxWorks6 used symbols __GOTT_BASE__ and __GOTT_INDEX__ to obtain the
address of the global offset table.  Starting with VxWorks7, that is
no longer the case, but we've still issued these symbols in
output_set_got.  Do that only with VxWorks<7.

Switching to the call-based PIC register sequence, we have to set the
flag that prevents the use of the red zone, and AFAICT the reasons
that ruled out GOTOFF and other relative addressing no longer apply to
VxWorks7+.


for  gcc/ChangeLog

* config/vxworks-dummy.h (TARGET_VXWORKS_VAROFF): New.
(TARGET_VXWORKS_GOTTPIC): New.
* config/vxworks.h (TARGET_VXWORKS_VAROFF): Override.
(TARGET_VXWORKS_GOTTPIC): Likewise.
* config/i386/i386.cc (output_set_got): Disable VxWorks6 GOT
sequence on VxWorks7.
(legitimize_pic_address): Accept relative addressing of
labels on VxWorks7.
(ix86_delegitimize_address_1): Likewise.
(ix86_output_addr_diff_elt): Likewise.
* config/i386/i386.md (tablejump): Likewise.
(set_got, set_got_labelled): Set no-red-zone flag on VxWorks7.
* config/i386/predicates.md (gotoff_operand): Test
TARGET_VXWORKS_VAROFF.

Diff:
---
 gcc/config/i386/i386.cc   |  8 
 gcc/config/i386/i386.md   |  6 +++---
 gcc/config/i386/predicates.md |  3 ++-
 gcc/config/vxworks-dummy.h| 12 
 gcc/config/vxworks.h  | 12 
 5 files changed, 33 insertions(+), 8 deletions(-)

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index b64175d6c939..fd3f35de14d3 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -6526,7 +6526,7 @@ output_set_got (rtx dest, rtx label)
 
   xops[0] = dest;
 
-  if (TARGET_VXWORKS_RTP && flag_pic)
+  if (TARGET_VXWORKS_GOTTPIC && TARGET_VXWORKS_RTP && flag_pic)
 {
   /* Load (*VXWORKS_GOTT_BASE) into the PIC register.  */
   xops[2] = gen_rtx_MEM (Pmode,
@@ -12245,7 +12245,7 @@ legitimize_pic_address (rtx orig, rtx reg)
   else if ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (addr) == 0)
   /* We can't always use @GOTOFF for text labels
  on VxWorks, see gotoff_operand.  */
-  || (TARGET_VXWORKS_RTP && GET_CODE (addr) == LABEL_REF))
+  || (TARGET_VXWORKS_VAROFF && GET_CODE (addr) == LABEL_REF))
 {
 #if TARGET_PECOFF
   rtx tmp = legitimize_pe_coff_symbol (addr, true);
@@ -13472,7 +13472,7 @@ ix86_delegitimize_address_1 (rtx x, bool base_term_p)
   else if (base_term_p
   && pic_offset_table_rtx
   && !TARGET_MACHO
-  && !TARGET_VXWORKS_RTP)
+  && !TARGET_VXWORKS_VAROFF)
{
  rtx tmp = gen_rtx_SYMBOL_REF (Pmode, GOT_SYMBOL_NAME);
  tmp = gen_rtx_MINUS (Pmode, copy_rtx (addend), tmp);
@@ -15872,7 +15872,7 @@ ix86_output_addr_diff_elt (FILE *file, int value, int 
rel)
   gcc_assert (!TARGET_64BIT);
 #endif
   /* We can't use @GOTOFF for text labels on VxWorks; see gotoff_operand.  */
-  if (TARGET_64BIT || TARGET_VXWORKS_RTP)
+  if (TARGET_64BIT || TARGET_VXWORKS_VAROFF)
 fprintf (file, "%s%s%d-%s%d\n",
 directive, LPREFIX, value, LPREFIX, rel);
 #if TARGET_MACHO
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 21b9f5ccd7a1..5825acabb946 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -20102,7 +20102,7 @@
 
   /* We can't use @GOTOFF for text labels on VxWorks;
 see gotoff_operand.  */
-  if (TARGET_64BIT || TARGET_VXWORKS_RTP)
+  if (TARGET_64BIT || TARGET_VXWORKS_VAROFF)
{
  code = PLUS;
  op0 = operands[0];
@@ -20970,7 +20970,7 @@
   (clobber (reg:CC FLAGS_REG))])]
   "!TARGET_64BIT"
 {
-  if (flag_pic && !TARGET_VXWORKS_RTP)
+  if (flag_pic && !TARGET_VXWORKS_GOTTPIC)
 ix86_pc_thunk_call_expanded = true;
 })
 
@@ -20991,7 +20991,7 @@
   (clobber (reg:CC FLAGS_REG))])]
   "!TARGET_64BIT"
 {
-  if (flag_pic && !TARGET_VXWORKS_RTP)
+  if (flag_pic && !TARGET_VXWORKS_GOTTPIC)
 ix86_pc_thunk_call_expanded = true;
 })
 
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 1bd63b2367e1..3afaf83a7a0c 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -664,8 +664,9 @@
 ;; same segment as the GOT.  Unfortunately, the flexibility of linker
 ;; scripts means that we can't be sure of that in general, so assume
 ;; @GOTOFF is not valid on VxWorks, except with the large code model.
+;; The comments above seem to apply only to VxWorks releases before 7.
 (define_predicate "gotoff_operand"
-  (and (ior (not (match_test "TAR

[gcc r16-2081] [committed][RISC-V] Fix testsuite fallout from check-function-bodies change

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:7b1e8e0e85ec6f9d80ceb0d38355b2fcd4785f67

commit r16-2081-g7b1e8e0e85ec6f9d80ceb0d38355b2fcd4785f67
Author: Jeff Law 
Date:   Mon Jul 7 20:42:04 2025 -0600

[committed][RISC-V] Fix testsuite fallout from check-function-bodies change

Minor fallout from HJ's recent change to the check-function-bodies code in 
the testsuite.

The label isn't at all important here, so forcing it match is just a waste 
of time.  So this patch just skips over the label.  It fixes a handful of 
failures in testsuite:

> unix//-march=rv32gcv: gcc: 
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies 
atomic_add_fetch_int_acq_rel
> unix//-march=rv32gcv: gcc: 
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies 
atomic_add_fetch_int_acquire
> unix//-march=rv32gcv: gcc: 
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies 
atomic_add_fetch_int_relaxed
> unix//-march=rv32gcv: gcc: 
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies 
atomic_add_fetch_int_release
> unix//-march=rv32gcv: gcc: 
gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c check-function-bodies 
atomic_add_fetch_int_seq_cst
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c 
check-function-bodies atomic_add_fetch_int_acq_rel
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c 
check-function-bodies atomic_add_fetch_int_acquire
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c 
check-function-bodies atomic_add_fetch_int_relaxed
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c 
check-function-bodies atomic_add_fetch_int_release
> unix//-march=rv32gcv: gcc: gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c 
check-function-bodies atomic_add_fetch_int_seq_cst

gcc/testsuite
* gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c: Adjust expected
output.
* gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c: Likewise.

Diff:
---
 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c | 10 +-
 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c  | 10 +-
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c 
b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
index 4cf617d60357..0dfe816ba291 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
@@ -9,7 +9,7 @@
 
 /*
 ** atomic_add_fetch_int_relaxed:
-** 1:
+**...
 ** lr.w\t[atx][0-9]+, 0\(a0\)
 ** add\t[atx][0-9]+, [atx][0-9]+, a1
 ** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -23,7 +23,7 @@ void atomic_add_fetch_int_relaxed (int* bar, int baz)
 
 /*
 ** atomic_add_fetch_int_acquire:
-** 1:
+**...
 ** lr.w.aq\t[atx][0-9]+, 0\(a0\)
 ** add\t[atx][0-9]+, [atx][0-9]+, a1
 ** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -37,7 +37,7 @@ void atomic_add_fetch_int_acquire (int* bar, int baz)
 
 /*
 ** atomic_add_fetch_int_release:
-** 1:
+**...
 ** lr.w\t[atx][0-9]+, 0\(a0\)
 ** add\t[atx][0-9]+, [atx][0-9]+, a1
 ** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -51,7 +51,7 @@ void atomic_add_fetch_int_release (int* bar, int baz)
 
 /*
 ** atomic_add_fetch_int_acq_rel:
-** 1:
+**...
 ** lr.w.aq\t[atx][0-9]+, 0\(a0\)
 ** add\t[atx][0-9]+, [atx][0-9]+, a1
 ** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -65,7 +65,7 @@ void atomic_add_fetch_int_acq_rel (int* bar, int baz)
 
 /*
 ** atomic_add_fetch_int_seq_cst:
-** 1:
+**...
 ** lr.w.aqrl\t[atx][0-9]+, 0\(a0\)
 ** add\t[atx][0-9]+, [atx][0-9]+, a1
 ** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c 
b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
index 3fb16c011918..658b0404b972 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
@@ -9,7 +9,7 @@
 
 /*
 ** atomic_add_fetch_int_relaxed:
-** 1:
+**...
 ** lr.w\t[atx][0-9]+, 0\(a0\)
 ** add\t[atx][0-9]+, [atx][0-9]+, a1
 ** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -23,7 +23,7 @@ void atomic_add_fetch_int_relaxed (int* bar, int baz)
 
 /*
 ** atomic_add_fetch_int_acquire:
-** 1:
+**...
 ** lr.w\t[atx][0-9]+, 0\(a0\)
 ** add\t[atx][0-9]+, [atx][0-9]+, a1
 ** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -37,7 +37,7 @@ void atomic_add_fetch_int_acquire (int* bar, int baz)
 
 /*
 ** atomic_add_fetch_int_release:
-** 1:
+**...
 ** lr.w\t[atx][0-9]+, 0\(a0\)
 ** add\t[atx][0-9]+, [atx][0-9]+, a1
 ** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
@@ -51,7 +51,7 @@ void atomic_add_fetch_int_release (int* bar, int baz)
 
 /*
 ** atomic_add_fetch_int_acq_rel:
-** 1:
+**...

[gcc r16-2082] [committed] Minor fix to gcc.dg/torture/pr120654.c

2025-07-07 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:477abe67d34f7f8d1b0b12408e08769995b6ca9e

commit r16-2082-g477abe67d34f7f8d1b0b12408e08769995b6ca9e
Author: Jeff Law 
Date:   Mon Jul 7 20:48:17 2025 -0600

[committed] Minor fix to gcc.dg/torture/pr120654.c

I don't recall which port complained, but pr120654.c was failing on one or 
more
of the embedded targets due to the use of malloc/free.  This change just 
turns
them into the __builtin variants which makes everyone happy again.

gcc/testsuite
* gcc.dg/torture/pr120654.c: Use __builtin variants of malloc and 
free.

Diff:
---
 gcc/testsuite/gcc.dg/torture/pr120654.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/torture/pr120654.c 
b/gcc/testsuite/gcc.dg/torture/pr120654.c
index 3819b78281d0..aacfeea29c9c 100644
--- a/gcc/testsuite/gcc.dg/torture/pr120654.c
+++ b/gcc/testsuite/gcc.dg/torture/pr120654.c
@@ -2,8 +2,6 @@
 
 int a, c, e, f, h, j;
 long g, k;
-void *malloc(long);
-void free(void *);
 int b(int m) {
   if (m || a)
 return 1;
@@ -16,9 +14,9 @@ int i() {
 }
 void n() {
   long o;
-  int *p = malloc(sizeof(int));
+  int *p = __builtin_malloc(sizeof(int));
   k = 1 % j;
   for (; i() + f + h; o++)
 if (p[d(j + 6, (int)k + 1992695866) + h + f + j + (int)k - 1 + o])
-  free(p);
+  __builtin_free(p);
 }