[gcc r16-1126] c++, coroutines: Simplify initial_await_resume_called.

[Iain D Sandoe via Gcc-cvs]

https://gcc.gnu.org/g:bfd4aae0a999375cf008b75c14607c7b94daced3

commit r16-1126-gbfd4aae0a999375cf008b75c14607c7b94daced3
Author: Iain Sandoe 
Date:   Thu May 29 13:43:37 2025 +0100

c++, coroutines: Simplify initial_await_resume_called.

We do not need to generate this code early, since it does not affect
any of the analysis.  Lowering it later takes less code, and avoids
modifying the initial await expresssion which will simplify changes
to analysis to deal with open PRs.

gcc/cp/ChangeLog:

* coroutines.cc (expand_one_await_expression): Set the
initial_await_resume_called flag here.
(build_actor_fn): Populate the frame accessor for the
initial_await_resume_called flag.
(cp_coroutine_transform::wrap_original_function_body): Do
not modify the initial_await expression to include the
initial_await_resume_called flag here.

Signed-off-by: Iain Sandoe 

Diff:
---
 gcc/cp/coroutines.cc | 43 ---
 1 file changed, 16 insertions(+), 27 deletions(-)

diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc
index 7f5d30cf9afd..8ec309af3ca6 100644
--- a/gcc/cp/coroutines.cc
+++ b/gcc/cp/coroutines.cc
@@ -2027,8 +2027,10 @@ expand_one_await_expression (tree *expr, tree 
*await_expr, void *d)
   tree awaiter_calls = TREE_OPERAND (saved_co_await, 3);
 
   tree source = TREE_OPERAND (saved_co_await, 4);
-  bool is_final = (source
-  && TREE_INT_CST_LOW (source) == (int) FINAL_SUSPEND_POINT);
+  bool is_final
+= (source && TREE_INT_CST_LOW (source) == (int) FINAL_SUSPEND_POINT);
+  bool is_initial
+= (source && TREE_INT_CST_LOW (source) == (int) INITIAL_SUSPEND_POINT);
 
   /* Build labels for the destinations of the control flow when we are resuming
  or destroying.  */
@@ -2156,6 +2158,13 @@ expand_one_await_expression (tree *expr, tree 
*await_expr, void *d)
   /* Resume point.  */
   add_stmt (build_stmt (loc, LABEL_EXPR, resume_label));
 
+  if (is_initial && data->i_a_r_c)
+{
+  r = cp_build_modify_expr (loc, data->i_a_r_c, NOP_EXPR, 
boolean_true_node,
+   tf_warning_or_error);
+  finish_expr_stmt (r);
+}
+
   /* This will produce the value (if one is provided) from the co_await
  expression.  */
   tree resume_call = TREE_VEC_ELT (awaiter_calls, 2); /* await_resume().  */
@@ -2654,8 +2663,12 @@ build_actor_fn (location_t loc, tree coro_frame_type, 
tree actor, tree fnbody,
 
   /* We've now rewritten the tree and added the initial and final
  co_awaits.  Now pass over the tree and expand the co_awaits.  */
+  tree i_a_r_c = NULL_TREE;
+  if (flag_exceptions)
+i_a_r_c = coro_build_frame_access_expr (actor_frame, coro_frame_i_a_r_c_id,
+  false, tf_warning_or_error);
 
-  coro_aw_data data = {actor, actor_fp, resume_idx_var, NULL_TREE,
+  coro_aw_data data = {actor, actor_fp, resume_idx_var, i_a_r_c,
   ash, del_promise_label, ret_label,
   continue_label, restart_dispatch_label, continuation, 2};
   cp_walk_tree (&actor_body, await_statement_expander, &data, NULL);
@@ -4435,30 +4448,6 @@ cp_coroutine_transform::wrap_original_function_body ()
   tree tcb = build_stmt (loc, TRY_BLOCK, NULL_TREE, NULL_TREE);
   add_stmt (tcb);
   TRY_STMTS (tcb) = push_stmt_list ();
-  if (initial_await != error_mark_node)
-   {
- /* Build a compound expression that sets the
-initial-await-resume-called variable true and then calls the
-initial suspend expression await resume.
-In the case that the user decides to make the initial await
-await_resume() return a value, we need to discard it and, it is
-a reference type, look past the indirection.  */
- if (INDIRECT_REF_P (initial_await))
-   initial_await = TREE_OPERAND (initial_await, 0);
- /* In the case that the initial_await returns a target expression
-we might need to look through that to update the await expr.  */
- tree iaw = initial_await;
- if (TREE_CODE (iaw) == TARGET_EXPR)
-   iaw = TARGET_EXPR_INITIAL (iaw);
- gcc_checking_assert (TREE_CODE (iaw) == CO_AWAIT_EXPR);
- tree vec = TREE_OPERAND (iaw, 3);
- tree aw_r = TREE_VEC_ELT (vec, 2);
- aw_r = convert_to_void (aw_r, ICV_STATEMENT, tf_warning_or_error);
- tree update = build2 (MODIFY_EXPR, boolean_type_node, i_a_r_c,
-   boolean_true_node);
- aw_r = cp_build_compound_expr (update, aw_r, tf_warning_or_error);
- TREE_VEC_ELT (vec, 2) = aw_r;
-   }
   /* Add the initial await to the start of the user-authored function.  */
   finish_expr_stmt (initial_await);
   /* Append the original function body.  */

[gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction régression ISO_Fortran_binding_1

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:e933412b6704bbce44f6c2e97715cce3dcb749a0

commit e933412b6704bbce44f6c2e97715cce3dcb749a0
Author: Mikael Morin 
Date:   Thu Jun 5 11:40:37 2025 +0200

Correction régression ISO_Fortran_binding_1

Diff:
---
 gcc/fortran/trans-expr.cc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index 09cdea6e2b8b..220bffc3426d 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -5969,8 +5969,6 @@ gfc_conv_gfc_desc_to_cfi_desc (gfc_se *parmse, gfc_expr 
*e, gfc_symbol *fsym)
 While sm is fine as it uses span*stride and not elem_len.  */
   if (POINTER_TYPE_P (TREE_TYPE (gfc)))
gfc = build_fold_indirect_ref_loc (input_location, gfc);
-  else if (is_subref_array (e) && e->ts.type != BT_CHARACTER)
-   gfc_get_dataptr_offset (&se.pre, gfc, gfc, NULL_TREE, true, e);
 }
   if (e->ts.type == BT_CHARACTER)
 {

[gcc r16-1165] ada: Fix SFN_Patterns documentation comment

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:8a419accb7741c317cede9466c369666d2ee2462

commit r16-1165-g8a419accb7741c317cede9466c369666d2ee2462
Author: Ronan Desplanques 
Date:   Mon Feb 3 14:22:22 2025 +0100

ada: Fix SFN_Patterns documentation comment

The documentation comment under SFN_Patterns was misleading. This patch
fixes it and also fixes Get_Default_File_Name which assumed the comment
was correct.

gcc/ada/ChangeLog:

* fname-uf.adb: Fix documentation comment.
(Get_Default_File_Name): Fix indices of default patterns.

Diff:
---
 gcc/ada/fname-uf.adb | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/gcc/ada/fname-uf.adb b/gcc/ada/fname-uf.adb
index 39a09c4ce133..ec22ad7a3d2a 100644
--- a/gcc/ada/fname-uf.adb
+++ b/gcc/ada/fname-uf.adb
@@ -90,8 +90,9 @@ package body Fname.UF is
  Table_Initial=> 10,
  Table_Increment  => 100,
  Table_Name   => "SFN_Patterns");
-   --  Table recording calls to Set_File_Name_Pattern. Note that the first two
-   --  entries are set to represent the standard GNAT rules for file naming.
+   --  Table recording calls to Set_File_Name_Pattern. Note that the last two
+   --  entries are set to represent the standard GNAT rules for file naming;
+   --  that invariant is maintained by Set_File_Name_Pattern.
 
procedure Instantiate_SFN_Pattern
  (Pattern   : SFN_Pattern_Entry;
@@ -178,6 +179,8 @@ package body Fname.UF is
---
 
function Get_Default_File_Name (Uname : Unit_Name_Type) return String is
+  L : constant Int := SFN_Patterns.Last;
+
   Buf : Bounded_String;
 
   Pattern : SFN_Pattern_Entry;
@@ -185,10 +188,10 @@ package body Fname.UF is
   Get_Unit_Name_String (Buf, Uname, False);
 
   if Is_Spec_Name (Uname) then
- Pattern := SFN_Patterns.Table (1);
+ Pattern := SFN_Patterns.Table (L - 1);
   else
  pragma Assert (Is_Body_Name (Uname));
- Pattern := SFN_Patterns.Table (2);
+ Pattern := SFN_Patterns.Table (L);
   end if;
 
   Instantiate_SFN_Pattern (Pattern, Buf);

[gcc r16-1170] libstdc++: Fix formatting of 3-digits months, day, weekday and hour [PR120481]

[Tomasz Kaminski via Gcc-cvs]

https://gcc.gnu.org/g:c45cc9423d5fca4635865e1d4bc858a4a6f4d65b

commit r16-1170-gc45cc9423d5fca4635865e1d4bc858a4a6f4d65b
Author: Tomasz Kamiński 
Date:   Mon Jun 2 09:06:56 2025 +0200

libstdc++: Fix formatting of 3-digits months,day,weekday and hour [PR120481]

This patch fixes the handle multiple digits values for the month, day, 
weekday
and hour, when used with the %m, %d, %e, %m, %u, %w, %H, and %D, %F 
specifiers.
The values are now  printed unmodified. This patch also fixes printing 
negative
year with %F, where the values was not padded to four digits.

Furthemore, the %I,%p are adjusted to handle input with hours values set to
over 24 hours. In the case the values is interpretd modulo 24. This was 
already
the case for %r (locale's 12-hour clock), as we convert the input into 
seconds.

In case of %u, %w we print values unchanged, this makes the behavior of this
specifiers equivalent to printing the iso_encoding and c_encoding 
respectively.
As constructing weekday from value 7, initializes it with 0, the !ok() 
weekdays
values are always greater of equal eight, so they are clearly 
distinguishable.

The months, weekday, day values that can have 3 decimal digit as maximum
(range [0, 255]), we are using new _S_str_d1, _S_str_d2 that return 
string_view
containing textual representation, without padding or padded to two digits.
This function accepts are 3 character buffer, that are used for 3 digits 
number.
In other cases, we return _S_digit and _S_two_digits result directly. The 
former
is changed to return string_view to facilitate this.

For %F and %D when at least one component have more digits that expected (2 
for
month and day, 4 for year), we produce output using format_to with 
appropriate
format string. Otherwise the representation is produced in local char 
buffer.
Two simply fill this buffer, _S_fill_two_digits function was added. We also
make sure that minus is not included in year width for %F.

The handling of %C, %Y, %y was adjusted to use similar pattern, for years 
with
more than two digits. To support that the order of characters in _S_chars 
was
adjusted so it contain "-{}" string.

For handling of %H, we print 3 or more digits values using format_to. The 
handling
for large hours values in %T and %R was changed, so they printed using 
format_to,
and otherwise we use same stack buffer as for minutes to print them.

PR libstdc++/120481

libstdc++-v3/ChangeLog:

* include/bits/chrono_io.h (__format::_S_chars): Reorder so it
contains "-{}".
(__format::_S_colon, __format::_S_slash, __format::_S_space)
(__format::_S_plus_minus): Updated starting indicies.
(__format::_S_minus_empty_spec): Define.
(__formatter_chrono::_M_C_y_Y, __formatter_chrono::_M_R_T):
Rework implementation.
(__formatter_chrono::_M_d_e, __formatter_chrono::_M_F)
(__formatter_chrono::_M_m, __formatter_chrono::_M_u_w)
(__formatter_chrono::_M_H_I, __formatter_chrono::_M_p):
Handle multi digits values.
(__formatter_chrono::_S_digit): Return string view.
(__formatter_chrono::_S_str_d1, __formatter_chrono::_S_str_d2)
(__formatter_chrono::_S_fill_two_digits): Define.
* testsuite/std/time/format/empty_spec.cc: Update test for
year_month_day, that uses '%F'.
* testsuite/std/time/format/pr120481.cc: New test.

Reviewed-by: Jonathan Wakely 
Signed-off-by: Tomasz Kamiński 

Diff:
---
 libstdc++-v3/include/bits/chrono_io.h  | 217 +-
 .../testsuite/std/time/format/empty_spec.cc|  12 +-
 libstdc++-v3/testsuite/std/time/format/pr120481.cc | 324 +
 3 files changed, 480 insertions(+), 73 deletions(-)

diff --git a/libstdc++-v3/include/bits/chrono_io.h 
b/libstdc++-v3/include/bits/chrono_io.h
index 239f9c780094..9711a83cebed 100644
--- a/libstdc++-v3/include/bits/chrono_io.h
+++ b/libstdc++-v3/include/bits/chrono_io.h
@@ -785,11 +785,12 @@ namespace __format
}
 
   static constexpr const _CharT* _S_chars
-   = _GLIBCXX_WIDEN("0123456789+-:/ {}");
-  static constexpr const _CharT* _S_plus_minus = _S_chars + 10;
-  static constexpr _CharT _S_colon = _S_chars[12];
-  static constexpr _CharT _S_slash = _S_chars[13];
-  static constexpr _CharT _S_space = _S_chars[14];
+   = _GLIBCXX_WIDEN("0123456789:/ +-{}");
+  static constexpr _CharT _S_colon = _S_chars[10];
+  static constexpr _CharT _S_slash = _S_chars[11];
+  static constexpr _CharT _S_space = _S_chars[12];
+  static constexpr const _CharT* _S_plus_minus = _S_chars + 13;
+  static constexpr const _CharT* _S_minus_empty_spec = _S_chars + 14;
   static constexpr const _CharT* _S_empty_spec = _

[gcc r16-1171] middle-end: Fix operation_could_trap_p for FIX_TRUNC expressions

[Spencer Abson via Gcc-cvs]

https://gcc.gnu.org/g:66fc62e9c7b55f287cc523854ca330b6531760b6

commit r16-1171-g66fc62e9c7b55f287cc523854ca330b6531760b6
Author: Spencer Abson 
Date:   Tue Jun 3 12:15:12 2025 +

middle-end: Fix operation_could_trap_p for FIX_TRUNC expressions

Floating-point to integer conversions can be inexact or invalid (e.g., due 
to
overflow or NaN).  However, since users of operation_could_trap_p infer the
bool FP_OPERATION argument from the expression's type, the FIX_TRUNC family
are considered non-trapping here.

This patch handles them explicitly.

gcc/ChangeLog:

* tree-eh.cc (operation_could_trap_helper_p): Cover FIX_TRUNC
expressions explicitly.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/sve/pr96357.c: Change to avoid producing
a conditional FIX_TRUNC_EXPR, whilst still reproducing the bug
in PR96357.
* gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c: New test.
* gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c: Likewise.

Diff:
---
 gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c | 19 +++
 gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c |  6 ++
 gcc/testsuite/gcc.target/aarch64/sve/pr96357.c|  8 
 gcc/tree-eh.cc|  7 +++
 4 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c 
b/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c
new file mode 100644
index ..801a53fa30bd
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-1.c
@@ -0,0 +1,19 @@
+  /* { dg-do compile } */
+  /* { dg-options "-O2 -ftree-vectorize -fdump-tree-ifcvt-stats" } */
+
+void
+test (int *dst, float *arr, int *pred, int n)
+{
+  for (int i = 0; i < n; i++)
+{
+  int pred_i = pred[i];
+  float arr_i = arr[i];
+
+  dst[i] = pred_i ? (int)arr_i : 5;
+}
+}
+
+/* We expect this to fail if_convertible_loop_p so long as we have no
+   conditional IFN for FIX_TRUNC_EXPR.  */
+
+/* { dg-final { scan-tree-dump-times "Applying if-conversion" 0 "ifcvt" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c 
b/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c
new file mode 100644
index ..628b754e94d9
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ifcvt-fix-trunc-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -fno-trapping-math 
-fdump-tree-ifcvt-stats" } */
+
+#include "ifcvt-fix-trunc-1.c"
+
+/* { dg-final { scan-tree-dump-times "Applying if-conversion" 1 "ifcvt" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr96357.c 
b/gcc/testsuite/gcc.target/aarch64/sve/pr96357.c
index 9a7f912e529f..6dd0409f3c88 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pr96357.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr96357.c
@@ -5,10 +5,10 @@ int d;
 
 void
 f1(char f, char *g, char *h, char *l, char *n) {
-  double i = d, j = 1.0 - f, k = j ? d : j;
-  if (k == 1.0)
-i = 0.0;
-  *l = *n = *g = *h = i * 0.5;
+  double j = 1.0 - f, k = j ? d : j;
+
+  char i = (k == 1.0) ? 10 : 50;
+  *l = *n = *g = *h = i;
 }
 
 void
diff --git a/gcc/tree-eh.cc b/gcc/tree-eh.cc
index a4d59954c059..8cc81ebcf5e9 100644
--- a/gcc/tree-eh.cc
+++ b/gcc/tree-eh.cc
@@ -2538,6 +2538,13 @@ operation_could_trap_helper_p (enum tree_code op,
   /* Constructing an object cannot trap.  */
   return false;
 
+case FIX_TRUNC_EXPR:
+case VEC_PACK_FIX_TRUNC_EXPR:
+case VEC_UNPACK_FIX_TRUNC_HI_EXPR:
+case VEC_UNPACK_FIX_TRUNC_LO_EXPR:
+  /* The FIX_TRUNC family are always potentially trapping.  */
+  return flag_trapping_math;
+
 case COND_EXPR:
 case VEC_COND_EXPR:
   /* Whether *COND_EXPR can trap depends on whether the

[gcc r16-1160] ada: Exception-raising loop incorrectly eliminated

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:429628e9d38663b15b919d65ef5db8a6e85db89f

commit r16-1160-g429628e9d38663b15b919d65ef5db8a6e85db89f
Author: Steve Baird 
Date:   Thu Jan 30 13:28:50 2025 -0800

ada: Exception-raising loop incorrectly eliminated

If the body of a loop includes a raise statement then the loop should not be
considered to be free of side-effects and therefore eligible for elimination
by the compiler.

gcc/ada/ChangeLog:

* sem_util.adb
(Side_Effect_Free_Statements): Return False if the statement list
includes an explicit (i.e. Comes_From_Source) raise statement.

Diff:
---
 gcc/ada/sem_util.adb | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index ce54deaab850..97dc4c0af8b9 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -12425,9 +12425,14 @@ package body Sem_Util is
 
   while Present (Node) loop
  case Nkind (Node) is
-when N_Null_Statement | N_Call_Marker | N_Raise_xxx_Error =>
+when N_Null_Statement | N_Call_Marker =>
null;
 
+when N_Raise_xxx_Error =>
+   if Comes_From_Source (Node) then
+  return False;
+   end if;
+
 when N_Object_Declaration =>
if Present (Expression (Node))
  and then not Side_Effect_Free (Expression (Node))

[gcc r16-1168] ada: Confusing "modified by call, but value overwritten" warning

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:abc2efc4fba94bc4043031dc891d45ba9ad10919

commit r16-1168-gabc2efc4fba94bc4043031dc891d45ba9ad10919
Author: squirek 
Date:   Mon Jan 13 21:04:51 2025 +

ada: Confusing "modified by call, but value overwritten" warning

The patch fixes an issue in the compiler whereby not referencing a local
variable used in multiple procedure calls as an "out" actual in between
calls would lead to a warning despite "-gnatw.o" not being present.
Additionally, this meant that using pragma Unreferenced on such variables
would not be able to silence such warnings.

gcc/ada/ChangeLog:

* sem_warn.adb
(Warn_On_Useless_Assignment): Disable out value "overwritten" 
warning
when we are not warning on unread out parameters (e.g. "-gnatw.o").

Diff:
---
 gcc/ada/sem_warn.adb | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/gcc/ada/sem_warn.adb b/gcc/ada/sem_warn.adb
index 35ef61664723..1bc97a851039 100644
--- a/gcc/ada/sem_warn.adb
+++ b/gcc/ada/sem_warn.adb
@@ -4670,9 +4670,11 @@ package body Sem_Warn is
  if Nkind (Parent (LA)) in N_Procedure_Call_Statement
  | N_Parameter_Association
  then
-Error_Msg_NE
-  ("?m?& modified by call, but value overwritten #!",
-   LA, Ent);
+if Warn_On_All_Unread_Out_Parameters then
+   Error_Msg_NE
+("?m?& modified by call, but value overwritten #!",
+ LA, Ent);
+end if;
  else
 Error_Msg_NE -- CODEFIX
   ("?m?useless assignment to&, value overwritten #!",

[gcc r16-1172] libstdc++: Export std::indirect and std::polymorphic from std module [PR119152]

[Tomasz Kaminski via Gcc-cvs]

https://gcc.gnu.org/g:a37f996fceef901dd2fbbdd768b1abfa1415754f

commit r16-1172-ga37f996fceef901dd2fbbdd768b1abfa1415754f
Author: Tomasz Kamiński 
Date:   Wed Jun 4 16:39:43 2025 +0200

libstdc++: Export std::indirect and std::polymorphic from std module 
[PR119152]

PR libstdc++/119152

libstdc++-v3/ChangeLog:

* src/c++23/std.cc.in (std::indirect, pmr::indirect)
[__cpp_lib_indirect]
(std::polymorphic, pmr::polymorphic) [__cpp_lib_polymorphic]: 
Export.

Diff:
---
 libstdc++-v3/src/c++23/std.cc.in | 8 
 1 file changed, 8 insertions(+)

diff --git a/libstdc++-v3/src/c++23/std.cc.in b/libstdc++-v3/src/c++23/std.cc.in
index d9a265e2256b..4cd3e52c8bbf 100644
--- a/libstdc++-v3/src/c++23/std.cc.in
+++ b/libstdc++-v3/src/c++23/std.cc.in
@@ -1956,6 +1956,14 @@ export namespace std
   using std::out_ptr;
   using std::inout_ptr;
 #endif
+#if __cpp_lib_indirect
+  using std::indirect;
+  namespace pmr { using std::pmr::indirect; }
+#endif
+#if __cpp_lib_polymorphic
+  using std::polymorphic;
+  namespace pmr { using std::pmr::polymorphic; }
+#endif
 }
 
 // 20.4 

[gcc r16-1141] ada: Mark the types of operator arguments as used

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:f60377fd66e5d10d58ee667230a3e1f4f6f150e2

commit r16-1141-gf60377fd66e5d10d58ee667230a3e1f4f6f150e2
Author: Viljar Indus 
Date:   Thu Jan 9 12:37:56 2025 +0200

ada: Mark the types of operator arguments as used

When a use type clause is used then it makes the type and
all of its operators use visible in the context. When analyzing
whether a use type clause is effective we should additionally
mark the types of an overloaded operator as cases where the
use type clause is effective.

gcc/ada/ChangeLog:

* sem_ch8.adb (Mark_Use_Type): Additionally mark the types
of the parameters and return values as used when analyzing an
operator.

Diff:
---
 gcc/ada/sem_ch8.adb | 5 +
 1 file changed, 5 insertions(+)

diff --git a/gcc/ada/sem_ch8.adb b/gcc/ada/sem_ch8.adb
index 0a9ef419db78..6fb9a9a1f5a7 100644
--- a/gcc/ada/sem_ch8.adb
+++ b/gcc/ada/sem_ch8.adb
@@ -9504,6 +9504,11 @@ package body Sem_Ch8 is
and then Present (Scope (Entity (E)))
  then
 Mark_Use_Package (Scope (Entity (E)));
+
+--  Additionally mark the types of the formals and the return
+--  types as used when dealing with an overloaded operator.
+
+Mark_Parameters (Entity (E));
  end if;
 
  Curr := Current_Use_Clause (Base);

[gcc r16-1176] RISC-V: Support Ssccptr extension.

[Jiawei Chen via Gcc-cvs]

https://gcc.gnu.org/g:a84b388c84aa7bfed62bf370f3c82d37c943

commit r16-1176-ga84b388c84aa7bfed62bf370f3c82d37c943
Author: Jiawei 
Date:   Thu Jun 5 13:15:02 2025 +0800

RISC-V: Support Ssccptr extension.

Support the Ssccptr extension, which allows the main memory to support
page table reads.

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New extension definition.
* config/riscv/riscv-ext.opt: New extension mask.
* doc/riscv-ext.texi: Document the new extension.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-ssccptr.c: New test.

Signed-off-by: Jiawei 

Diff:
---
 gcc/config/riscv/riscv-ext.def| 13 +
 gcc/config/riscv/riscv-ext.opt|  2 ++
 gcc/doc/riscv-ext.texi|  4 
 gcc/testsuite/gcc.target/riscv/arch-ssccptr.c |  5 +
 4 files changed, 24 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index 98e7b82c8d17..ec0a08c3282c 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1805,6 +1805,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ ssccptr,
+  /* UPPERCASE_NAME */ SSCCPTR,
+  /* FULL_NAME */ "Main memory supports page table reads",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ ss,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ sscofpmf,
   /* UPPERCASE_NAME */ SSCOFPMF,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index 73868798db68..f851678236bd 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -355,6 +355,8 @@ Mask(SMDBLTRP) Var(riscv_sm_subext)
 
 Mask(SSAIA) Var(riscv_ss_subext)
 
+Mask(SSCCPTR) Var(riscv_ss_subext)
+
 Mask(SSCOFPMF) Var(riscv_ss_subext)
 
 Mask(SSCSRIND) Var(riscv_ss_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index 2d2631e726dc..83aa436b4665 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -534,6 +534,10 @@
 @tab 1.0
 @tab Advanced interrupt architecture extension for supervisor-mode
 
+@item ssccptr
+@tab 1.0
+@tab Main memory supports page table reads
+
 @item sscofpmf
 @tab 1.0
 @tab Count overflow & filtering extension
diff --git a/gcc/testsuite/gcc.target/riscv/arch-ssccptr.c 
b/gcc/testsuite/gcc.target/riscv/arch-ssccptr.c
new file mode 100644
index ..902155a0818c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-ssccptr.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_ssccptr -mabi=lp64" } */
+int foo()
+{
+}

[gcc r16-1180] RISC-V: Support Ssu64xl extension.

[Jiawei Chen via Gcc-cvs]

https://gcc.gnu.org/g:8e1f06d1d1c8bb25c44c321f90c39f36eb18f344

commit r16-1180-g8e1f06d1d1c8bb25c44c321f90c39f36eb18f344
Author: Jiawei 
Date:   Thu Jun 5 13:59:14 2025 +0800

RISC-V: Support Ssu64xl extension.

Support the Ssu64xl extension, which requires UXLEN to be 64.

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New extension definition.
* config/riscv/riscv-ext.opt: New extension mask.
* doc/riscv-ext.texi: Document the new extension.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-ssu64xl.c: New test.

Signed-off-by: Jiawei 

Diff:
---
 gcc/config/riscv/riscv-ext.def| 13 +
 gcc/config/riscv/riscv-ext.opt|  2 ++
 gcc/doc/riscv-ext.texi|  4 
 gcc/testsuite/gcc.target/riscv/arch-ssu64xl.c |  5 +
 4 files changed, 24 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index 2b34276fb95e..816acaa34f4a 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1961,6 +1961,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ ssu64xl,
+  /* UPPERCASE_NAME */ SSU64XL,
+  /* FULL_NAME */ "UXLEN=64 must be supported",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ ss,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ supm,
   /* UPPERCASE_NAME */ SUPM,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index 8eb447c2dc01..9f8c5451d497 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -379,6 +379,8 @@ Mask(SSSTRICT) Var(riscv_ss_subext)
 
 Mask(SSDBLTRP) Var(riscv_ss_subext)
 
+Mask(SSU64XL) Var(riscv_ss_subext)
+
 Mask(SUPM) Var(riscv_su_subext)
 
 Mask(SVINVAL) Var(riscv_sv_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index fd9cbef1d9dc..e69a2df768d4 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -582,6 +582,10 @@
 @tab 1.0
 @tab Double Trap Extensions
 
+@item ssu64xl
+@tab 1.0
+@tab UXLEN=64 must be supported
+
 @item supm
 @tab 1.0
 @tab supm extension
diff --git a/gcc/testsuite/gcc.target/riscv/arch-ssu64xl.c 
b/gcc/testsuite/gcc.target/riscv/arch-ssu64xl.c
new file mode 100644
index ..6e151c14f9b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-ssu64xl.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_ssu64xl -mabi=lp64" } */
+int foo()
+{
+}

[gcc r16-1178] RISC-V: Support Sstvala extension.

[Jiawei Chen via Gcc-cvs]

https://gcc.gnu.org/g:37f0e8395c279b5eb969bf678e5c571c1f3d3b32

commit r16-1178-g37f0e8395c279b5eb969bf678e5c571c1f3d3b32
Author: Jiawei 
Date:   Thu Jun 5 13:46:39 2025 +0800

RISC-V: Support Sstvala extension.

Support the Sstvala extension, which provides all needed values in
Supervisor Trap Value register (stval).

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New extension definition.
* config/riscv/riscv-ext.opt: New extension mask.
* doc/riscv-ext.texi: Document the new extension.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-sstvala.c: New test.

Signed-off-by: Jiawei 

Diff:
---
 gcc/config/riscv/riscv-ext.def| 13 +
 gcc/config/riscv/riscv-ext.opt|  2 ++
 gcc/doc/riscv-ext.texi|  4 
 gcc/testsuite/gcc.target/riscv/arch-sstvala.c |  5 +
 4 files changed, 24 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index dab8cb8d69d6..69ff712d8e57 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1909,6 +1909,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ sstvala,
+  /* UPPERCASE_NAME */ SSTVALA,
+  /* FULL_NAME */ "Stval provides all needed values",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ ss,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ ssstrict,
   /* UPPERCASE_NAME */ SSSTRICT,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index ad9e1d68069c..115a1c5de8dc 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -371,6 +371,8 @@ Mask(SSSTATEEN) Var(riscv_ss_subext)
 
 Mask(SSTC) Var(riscv_ss_subext)
 
+Mask(SSTVALA) Var(riscv_ss_subext)
+
 Mask(SSSTRICT) Var(riscv_ss_subext)
 
 Mask(SSDBLTRP) Var(riscv_ss_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index 2b23366607d5..075cef2c7d8c 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -566,6 +566,10 @@
 @tab 1.0
 @tab Supervisor-mode timer interrupts extension
 
+@item sstvala
+@tab 1.0
+@tab Stval provides all needed values
+
 @item ssstrict
 @tab 1.0
 @tab ssstrict extension
diff --git a/gcc/testsuite/gcc.target/riscv/arch-sstvala.c 
b/gcc/testsuite/gcc.target/riscv/arch-sstvala.c
new file mode 100644
index ..21ea8a6360c0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-sstvala.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_sstvala -mabi=lp64" } */
+int foo()
+{
+}

[gcc r16-1174] RISC-V: Support Sm/scsrind extensions.

[Jiawei Chen via Gcc-cvs]

https://gcc.gnu.org/g:d4129d83135527823730566468ac111067d0dc2d

commit r16-1174-gd4129d83135527823730566468ac111067d0dc2d
Author: Jiawei 
Date:   Thu Jun 5 10:16:19 2025 +0800

RISC-V: Support Sm/scsrind extensions.

Support the Sm/scsrind extensions, which provide indirect access to
machine-level CSRs.

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New extension definition.
* config/riscv/riscv-ext.opt: New extension mask.
* doc/riscv-ext.texi: Document the new extension.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-smcsrind.c: New test.

Signed-off-by: Jiawei 

Diff:
---
 gcc/config/riscv/riscv-ext.def | 26 ++
 gcc/config/riscv/riscv-ext.opt |  4 
 gcc/doc/riscv-ext.texi |  8 
 gcc/testsuite/gcc.target/riscv/arch-smcsrind.c |  5 +
 4 files changed, 43 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index 0d715a163c74..6c122c3987b0 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1701,6 +1701,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ smcsrind,
+  /* UPPERCASE_NAME */ SMCSRIND,
+  /* FULL_NAME */ "Machine-Level Indirect CSR Access",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr", "sscsrind"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ sm,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ smepmp,
   /* UPPERCASE_NAME */ SMEPMP,
@@ -1792,6 +1805,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ sscsrind,
+  /* UPPERCASE_NAME */ SSCSRIND,
+  /* FULL_NAME */ "Supervisor-Level Indirect CSR Access",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ ss,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ ssnpm,
   /* UPPERCASE_NAME */ SSNPM,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index 3e5cbb34898e..725dc8793494 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -339,6 +339,8 @@ Mask(SMAIA) Var(riscv_sm_subext)
 
 Mask(SMCNTRPMF) Var(riscv_sm_subext)
 
+Mask(SMCSRIND) Var(riscv_sm_subext)
+
 Mask(SMEPMP) Var(riscv_sm_subext)
 
 Mask(SMMPM) Var(riscv_sm_subext)
@@ -353,6 +355,8 @@ Mask(SSAIA) Var(riscv_ss_subext)
 
 Mask(SSCOFPMF) Var(riscv_ss_subext)
 
+Mask(SSCSRIND) Var(riscv_ss_subext)
+
 Mask(SSNPM) Var(riscv_ss_subext)
 
 Mask(SSPM) Var(riscv_ss_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index 3e6541ac732b..ca7414e0c7a0 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -502,6 +502,10 @@
 @tab 1.0
 @tab Cycle and instret privilege mode filtering
 
+@item smcsrind
+@tab 1.0
+@tab Machine-Level Indirect CSR Access
+
 @item smepmp
 @tab 1.0
 @tab PMP Enhancements for memory access and execution prevention on Machine 
mode
@@ -530,6 +534,10 @@
 @tab 1.0
 @tab Count overflow & filtering extension
 
+@item sscsrind
+@tab 1.0
+@tab Supervisor-Level Indirect CSR Access
+
 @item ssnpm
 @tab 1.0
 @tab ssnpm extension
diff --git a/gcc/testsuite/gcc.target/riscv/arch-smcsrind.c 
b/gcc/testsuite/gcc.target/riscv/arch-smcsrind.c
new file mode 100644
index ..4d1c10453993
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-smcsrind.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_smcsrind -mabi=lp64" } */
+int foo()
+{
+}

[gcc r16-1175] RISC-V: Support Smrnmi extension.

[Jiawei Chen via Gcc-cvs]

https://gcc.gnu.org/g:f955831312bbc6426460f18b59a85933bc11ebf4

commit r16-1175-gf955831312bbc6426460f18b59a85933bc11ebf4
Author: Jiawei 
Date:   Thu Jun 5 11:24:43 2025 +0800

RISC-V: Support Smrnmi extension.

Support the Smrnmi extension, which provides new CSRs
for Machine mode Non-Maskable Interrupts.

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New extension definition.
* config/riscv/riscv-ext.opt: New extension mask.
* doc/riscv-ext.texi: Document the new extension.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-smrnmi.c: New test.

Signed-off-by: Jiawei 

Diff:
---
 gcc/config/riscv/riscv-ext.def   | 13 +
 gcc/config/riscv/riscv-ext.opt   |  2 ++
 gcc/doc/riscv-ext.texi   |  4 
 gcc/testsuite/gcc.target/riscv/arch-smrnmi.c |  5 +
 4 files changed, 24 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index 6c122c3987b0..98e7b82c8d17 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1753,6 +1753,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ smrnmi,
+  /* UPPERCASE_NAME */ SMRNMI,
+  /* FULL_NAME */ "Resumable non-maskable interrupts",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ sm,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ smstateen,
   /* UPPERCASE_NAME */ SMSTATEEN,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index 725dc8793494..73868798db68 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -347,6 +347,8 @@ Mask(SMMPM) Var(riscv_sm_subext)
 
 Mask(SMNPM) Var(riscv_sm_subext)
 
+Mask(SMRNMI) Var(riscv_sm_subext)
+
 Mask(SMSTATEEN) Var(riscv_sm_subext)
 
 Mask(SMDBLTRP) Var(riscv_sm_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index ca7414e0c7a0..2d2631e726dc 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -518,6 +518,10 @@
 @tab 1.0
 @tab smnpm extension
 
+@item smrnmi
+@tab 1.0
+@tab Resumable Non-Maskable Interrupts
+
 @item smstateen
 @tab 1.0
 @tab State enable extension
diff --git a/gcc/testsuite/gcc.target/riscv/arch-smrnmi.c 
b/gcc/testsuite/gcc.target/riscv/arch-smrnmi.c
new file mode 100644
index ..8e6254043fa3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-smrnmi.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_smrnmi -mabi=lp64" } */
+int foo()
+{
+}

[gcc r16-1173] Fix crash with constant initializer caused by IPA

[Eric Botcazou via Gcc-cvs]

https://gcc.gnu.org/g:da96bdfff0806e5a6f3f5ceb113add47037614c6

commit r16-1173-gda96bdfff0806e5a6f3f5ceb113add47037614c6
Author: Eric Botcazou 
Date:   Thu Jun 5 13:20:26 2025 +0200

Fix crash with constant initializer caused by IPA

The testcase compiled with -O2 -gnatn makes the compiler crash in
vect_can_force_dr_alignment_p during SLP vectorization:

  if (decl_in_symtab_p (decl)
  && !symtab_node::get (decl)->can_increase_alignment_p ())
return false;

because symtab_node::get (decl) returns a null node.  The phenomenon occurs
for a pair of twin symbols listed like so in .cgraph:

Opt7_Pkg.T12b/17 (Opt7_Pkg.T12b)
  Type: variable definition analyzed
  Visibility: semantic_interposition external public artificial
  Aux: @0x44d45e0
  References:
  Referring: opt7_pkg__enum_name_table/13 (addr) 
opt7_pkg__enum_name_table/13
(addr)
  Availability: not-ready
  Varpool flags: initialized read-only const-value-known

Opt7_Pkg.T8b/16 (Opt7_Pkg.T8b)
  Type: variable definition analyzed
  Visibility: semantic_interposition external public artificial
  Aux: @0x7f9fda3fff00
  References:
  Referring: opt7_pkg__enum_name_table/13 (addr) 
opt7_pkg__enum_name_table/13
(addr)
  Availability: not-ready
  Varpool flags: initialized read-only const-value-known

with:

opt7_pkg__enum_name_table/13 (Opt7_Pkg.Enum_Name_Table)
  Type: variable definition analyzed
  Visibility: semantic_interposition external public
  Aux: @0x44d45e0
  References: Opt7_Pkg.T8b/16 (addr) Opt7_Pkg.T8b/16 (addr) Opt7_Pkg.T12b/17
(addr) Opt7_Pkg.T12b/17 (addr)
  Referring: opt7_pkg__image/2 (read) opt7_pkg__image/2 (read)
opt7_pkg__image/2 (read) opt7_pkg__image/2 (read) opt7_pkg__image/2 (read)
opt7_pkg__image/2 (read) opt7_pkg__image/2 (read) opt7_pkg__image/2 (read)
  Availability: not-ready
  Varpool flags: initialized read-only const-value-known

being the crux of the matter.

What happens is that symtab_remove_unreachable_nodes leaves the last symbol
in kind of a limbo state: in .remove_symbols, we have:

opt7_pkg__enum_name_table/13 (Opt7_Pkg.Enum_Name_Table)
  Type: variable
  Body removed by symtab_remove_unreachable_nodes
  Visibility: externally_visible semantic_interposition external public
  References:
  Referring: opt7_pkg__image/2 (read) opt7_pkg__image/2 (read)
  Availability: not_available
  Varpool flags: initialized read-only const-value-known

This means that the "body" (DECL_INITIAL) of the symbol has been disregarded
during reachability analysis, causing the first two symbols to be discarded:

Reclaiming variables: Opt7_Pkg.T12b/17 Opt7_Pkg.T8b/16

but the DECL_INITIAL is explicitly preserved for later constant folding,
which makes it possible to retrofit the DECLs corresponding to the first
two symbols in the GIMPLE IR and ultimately leads to the crash.

gcc/
* tree-vect-data-refs.cc (vect_can_force_dr_alignment_p): Return
false if the variable has no symtab node.

gcc/testsuite/
* gnat.dg/specs/opt7.ads: New test.
* gnat.dg/specs/opt7_pkg.ads: New helper.
* gnat.dg/specs/opt7_pkg.adb: Likewise.

Diff:
---
 gcc/testsuite/gnat.dg/specs/opt7.ads | 15 +++
 gcc/testsuite/gnat.dg/specs/opt7_pkg.adb | 15 +++
 gcc/testsuite/gnat.dg/specs/opt7_pkg.ads |  9 +
 gcc/tree-vect-data-refs.cc   |  3 ++-
 4 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gnat.dg/specs/opt7.ads 
b/gcc/testsuite/gnat.dg/specs/opt7.ads
new file mode 100644
index ..ee151f082a88
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/specs/opt7.ads
@@ -0,0 +1,15 @@
+-- { dg-do compile }
+-- { dg-options "-O2 -gnatn" }
+
+with Opt7_Pkg; use Opt7_Pkg;
+
+package Opt7 is
+
+  type Rec is record
+E : Enum;
+  end record;
+
+  function Image (R : Rec) return String is
+(if R.E = A then Image (R.E) else "");
+
+end Opt7;
diff --git a/gcc/testsuite/gnat.dg/specs/opt7_pkg.adb 
b/gcc/testsuite/gnat.dg/specs/opt7_pkg.adb
new file mode 100644
index ..1c9d79bb8721
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/specs/opt7_pkg.adb
@@ -0,0 +1,15 @@
+package body Opt7_Pkg is
+
+  type Constant_String_Access is access constant String;
+
+  type Enum_Name is array (Enum) of Constant_String_Access;
+
+  Enum_Name_Table : constant Enum_Name :=
+(A => new String'("A"), B => new String'("B"));
+
+  function Image (E : Enum) return String is
+  begin
+return Enum_Name_Table (E).all;
+  end Image;
+
+end Opt7_Pkg;
diff --git a/gcc/testsuite/gnat.dg/specs/opt7_pkg.ads 
b/gcc/testsuite/gnat.dg/specs/opt7_pkg.ads
new file mode 100644
index ..2dd271b63adb
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/specs/opt7_pkg.ads
@@ -0,0 +1,9 @@

[gcc r16-1177] RISC-V: Support Sscounterenw extension.

[Jiawei Chen via Gcc-cvs]

https://gcc.gnu.org/g:6a2a0ab8b71e0985f6950f450f8c34437a2fbdcc

commit r16-1177-g6a2a0ab8b71e0985f6950f450f8c34437a2fbdcc
Author: Jiawei 
Date:   Thu Jun 5 13:33:21 2025 +0800

RISC-V: Support Sscounterenw extension.

Support the Sscounterenw extension, which allows writeable enables for any
supported counter.

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New extension definition.
* config/riscv/riscv-ext.opt: New extension mask.
* doc/riscv-ext.texi: Document the new extension.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-sscounterenw.c: New test.

Signed-off-by: Jiawei 

Diff:
---
 gcc/config/riscv/riscv-ext.def | 13 +
 gcc/config/riscv/riscv-ext.opt |  2 ++
 gcc/doc/riscv-ext.texi |  4 
 gcc/testsuite/gcc.target/riscv/arch-sscounterenw.c |  5 +
 4 files changed, 24 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index ec0a08c3282c..dab8cb8d69d6 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1831,6 +1831,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ sscounterenw,
+  /* UPPERCASE_NAME */ SSCOUNTERENW,
+  /* FULL_NAME */ "Support writeable enables for any supported counter",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ ss,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ sscsrind,
   /* UPPERCASE_NAME */ SSCSRIND,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index f851678236bd..ad9e1d68069c 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -359,6 +359,8 @@ Mask(SSCCPTR) Var(riscv_ss_subext)
 
 Mask(SSCOFPMF) Var(riscv_ss_subext)
 
+Mask(SSCOUNTERENW) Var(riscv_ss_subext)
+
 Mask(SSCSRIND) Var(riscv_ss_subext)
 
 Mask(SSNPM) Var(riscv_ss_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index 83aa436b4665..2b23366607d5 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -542,6 +542,10 @@
 @tab 1.0
 @tab Count overflow & filtering extension
 
+@item sscounterenw
+@tab 1.0
+@tab Support writeable enables for any supported counter
+
 @item sscsrind
 @tab 1.0
 @tab Supervisor-Level Indirect CSR Access
diff --git a/gcc/testsuite/gcc.target/riscv/arch-sscounterenw.c 
b/gcc/testsuite/gcc.target/riscv/arch-sscounterenw.c
new file mode 100644
index ..901b6bc6c9e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-sscounterenw.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_sscounterenw -mabi=lp64" } */
+int foo()
+{
+}

[gcc r16-1179] RISC-V: Support Sstvecd extension.

[Jiawei Chen via Gcc-cvs]

https://gcc.gnu.org/g:a3c4f30ecfc4f7b23df9aa2827068a1bfa57637e

commit r16-1179-ga3c4f30ecfc4f7b23df9aa2827068a1bfa57637e
Author: Jiawei 
Date:   Thu Jun 5 13:52:08 2025 +0800

RISC-V: Support Sstvecd extension.

Support the Sstvecd extension, which allows Supervisor Trap Vector
Base Address register (stvec) to support Direct mode.

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New extension definition.
* config/riscv/riscv-ext.opt: New extension mask.
* doc/riscv-ext.texi: Document the new extension.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-sstvecd.c: New test.

Signed-off-by: Jiawei 

Diff:
---
 gcc/config/riscv/riscv-ext.def| 13 +
 gcc/config/riscv/riscv-ext.opt|  2 ++
 gcc/doc/riscv-ext.texi|  4 
 gcc/testsuite/gcc.target/riscv/arch-sstvecd.c |  5 +
 4 files changed, 24 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index 69ff712d8e57..2b34276fb95e 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1922,6 +1922,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ sstvecd,
+  /* UPPERCASE_NAME */ SSTVECD,
+  /* FULL_NAME */ "Stvec supports Direct mode",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ ss,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ ssstrict,
   /* UPPERCASE_NAME */ SSSTRICT,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index 115a1c5de8dc..8eb447c2dc01 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -373,6 +373,8 @@ Mask(SSTC) Var(riscv_ss_subext)
 
 Mask(SSTVALA) Var(riscv_ss_subext)
 
+Mask(SSTVECD) Var(riscv_ss_subext)
+
 Mask(SSSTRICT) Var(riscv_ss_subext)
 
 Mask(SSDBLTRP) Var(riscv_ss_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index 075cef2c7d8c..fd9cbef1d9dc 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -570,6 +570,10 @@
 @tab 1.0
 @tab Stval provides all needed values
 
+@item sstvecd
+@tab 1.0
+@tab Stvec supports Direct mode
+
 @item ssstrict
 @tab 1.0
 @tab ssstrict extension
diff --git a/gcc/testsuite/gcc.target/riscv/arch-sstvecd.c 
b/gcc/testsuite/gcc.target/riscv/arch-sstvecd.c
new file mode 100644
index ..e76f78818ee1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-sstvecd.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_sstvecd -mabi=lp64" } */
+int foo()
+{
+}

[gcc r16-1188] c++: substituting fn parm redeclared with dep alias tmpl [PR120224]

[Patrick Palka via Gcc-cvs]

https://gcc.gnu.org/g:51e93aadc94940e2da854cf1321a7ab1aebf8d1a

commit r16-1188-g51e93aadc94940e2da854cf1321a7ab1aebf8d1a
Author: Patrick Palka 
Date:   Thu Jun 5 11:07:25 2025 -0400

c++: substituting fn parm redeclared with dep alias tmpl [PR120224]

Here we declare f twice, the second time around using a dependent
alias template.  Due to alias template transparency these are logically
the same overload.  But now the function type of f (produced from the
first declaration) diverges from the type of its formal parameter
(produced from the subsequent redefinition) in that substituting T=int
succeeds for the function type but not for the formal parameter type.
This eventually causes us to produce an undiagnosed error_mark_node in
the AST of the function call, leading to failure of the sanity check
check added in r14-6343-g0c018a74eb1aff.

Before r14-6343 we would still go on to reject the testcase later at
instantiation time, from regenerate_decl_from_template, making this a
regression.

To fix this, it seems we just need to propagate error_mark_node upon
substitution failure into the type of a PARM_DECL.

PR c++/120224

gcc/cp/ChangeLog:

* pt.cc (tsubst_function_decl): Return error_mark_node if
substituting into the formal parameter list failed.
(tsubst_decl) : Return error_mark_node
upon TREE_TYPE substitution failure, when in a SFINAE
context.  Return error_mark_node upon DECL_CHAIN substitution
failure.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/alias-decl-80.C: New test.

Reviewed-by: Jason Merrill 

Diff:
---
 gcc/cp/pt.cc   | 14 --
 gcc/testsuite/g++.dg/cpp0x/alias-decl-80.C | 21 +
 2 files changed, 33 insertions(+), 2 deletions(-)

diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index c5a3abe6d8b9..b5c877a385f5 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -14983,6 +14983,8 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t 
complain,
   if (closure && DECL_IOBJ_MEMBER_FUNCTION_P (t))
 parms = DECL_CHAIN (parms);
   parms = tsubst (parms, args, complain, t);
+  if (parms == error_mark_node)
+return error_mark_node;
   for (tree parm = parms; parm; parm = DECL_CHAIN (parm))
 DECL_CONTEXT (parm) = r;
   if (closure && DECL_IOBJ_MEMBER_FUNCTION_P (t))
@@ -1,6 +15557,9 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain,
   /* We're dealing with a normal parameter.  */
   type = tsubst (TREE_TYPE (t), args, complain, in_decl);
 
+   if (type == error_mark_node && !(complain & tf_error))
+ RETURN (error_mark_node);
+
 type = type_decays_to (type);
 TREE_TYPE (r) = type;
 cp_apply_type_quals_to_decl (cp_type_quals (type), r);
@@ -15592,8 +15597,13 @@ tsubst_decl (tree t, tree args, tsubst_flags_t 
complain,
/* If cp_unevaluated_operand is set, we're just looking for a
   single dummy parameter, so don't keep going.  */
if (DECL_CHAIN (t) && !cp_unevaluated_operand)
- DECL_CHAIN (r) = tsubst (DECL_CHAIN (t), args,
-  complain, DECL_CHAIN (t));
+ {
+   tree chain = tsubst (DECL_CHAIN (t), args,
+complain, DECL_CHAIN (t));
+   if (chain == error_mark_node)
+ RETURN (error_mark_node);
+   DECL_CHAIN (r) = chain;
+ }
 
 /* FIRST_R contains the start of the chain we've built.  */
 r = first_r;
diff --git a/gcc/testsuite/g++.dg/cpp0x/alias-decl-80.C 
b/gcc/testsuite/g++.dg/cpp0x/alias-decl-80.C
new file mode 100644
index ..9c0eadc967c0
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/alias-decl-80.C
@@ -0,0 +1,21 @@
+// PR c++/120224
+// { dg-do compile { target c++11 } }
+
+template using void_t = void;
+
+template
+void f(void*); // #1
+
+template
+void f(void_t*) { } // { dg-error "not a class" } defn of #1
+
+template
+void g(int, void*); // #2
+
+template
+void g(int, void_t*) { } // { dg-error "not a class" } defn 
of #2
+
+int main() {
+  f(0); // { dg-error "no match" }
+  g(0, 0); // { dg-error "no match" }
+}

[gcc/devel/omp/gcc-15] ChangeLog.omp bump

[Sandra Loosemore via Gcc-cvs]

https://gcc.gnu.org/g:54c4c45120851c7bd9857a15a7e6e087338e14cf

commit 54c4c45120851c7bd9857a15a7e6e087338e14cf
Author: Sandra Loosemore 
Date:   Thu Jun 5 15:06:43 2025 +

ChangeLog.omp bump

Diff:
---
 gcc/ChangeLog.omp   |  9 +
 gcc/DATESTAMP.omp   |  2 +-
 gcc/c/ChangeLog.omp |  9 +
 gcc/cp/ChangeLog.omp| 12 
 gcc/testsuite/ChangeLog.omp | 13 +
 5 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp
index 34e615771b1f..d5b60db31bab 100644
--- a/gcc/ChangeLog.omp
+++ b/gcc/ChangeLog.omp
@@ -1,3 +1,12 @@
+2025-06-05  Sandra Loosemore  
+
+   Backported from master:
+   2025-06-04  Sandra Loosemore  
+
+   PR c++/120518
+   * omp-general.cc (omp_device_num_check): Look inside a
+   CLEANUP_POINT_EXPR when trying to optimize special cases.
+
 2025-06-04  Thomas Schwinge  
 
Backported from master:
diff --git a/gcc/DATESTAMP.omp b/gcc/DATESTAMP.omp
index 932c2dd9fa20..520e78d76964 100644
--- a/gcc/DATESTAMP.omp
+++ b/gcc/DATESTAMP.omp
@@ -1 +1 @@
-20250604
+20250605
diff --git a/gcc/c/ChangeLog.omp b/gcc/c/ChangeLog.omp
index ff881b5a7be4..d3e1d0ef438b 100644
--- a/gcc/c/ChangeLog.omp
+++ b/gcc/c/ChangeLog.omp
@@ -1,3 +1,12 @@
+2025-06-05  Sandra Loosemore  
+
+   Backported from master:
+   2025-06-02  Sandra Loosemore  
+
+   * c-parser.cc (c_parser_omp_context_selector): Call
+   convert_lvalue_to_rvalue and c_objc_common_truthvalue_conversion
+   on the expression for OMP_TRAIT_PROPERTY_BOOL_EXPR.
+
 2025-05-15  waffl3x  
 
PR c++/119659
diff --git a/gcc/cp/ChangeLog.omp b/gcc/cp/ChangeLog.omp
index 3f2574acaa73..c9026b454b74 100644
--- a/gcc/cp/ChangeLog.omp
+++ b/gcc/cp/ChangeLog.omp
@@ -1,3 +1,15 @@
+2025-06-05  Sandra Loosemore  
+
+   Backported from master:
+   2025-06-02  Sandra Loosemore  
+
+   * cp-tree.h (maybe_convert_cond): Declare.
+   * parser.cc (cp_parser_omp_context_selector): Call
+   maybe_convert_cond and fold_build_cleanup_point_expr on the
+   expression for OMP_TRAIT_PROPERTY_BOOL_EXPR.
+   * pt.cc (tsubst_omp_context_selector): Likewise.
+   * semantics.cc (maybe_convert_cond): Remove static declaration.
+
 2025-05-15  Sandra Loosemore  
Tobias Burnus  
 
diff --git a/gcc/testsuite/ChangeLog.omp b/gcc/testsuite/ChangeLog.omp
index 621a45de7643..d82620804163 100644
--- a/gcc/testsuite/ChangeLog.omp
+++ b/gcc/testsuite/ChangeLog.omp
@@ -1,3 +1,16 @@
+2025-06-05  Sandra Loosemore  
+
+   Backported from master:
+   2025-06-02  Sandra Loosemore  
+
+   * c-c++-common/gomp/declare-variant-2.c: Update expected output.
+   * c-c++-common/gomp/metadirective-condition-constexpr.c: New.
+   * c-c++-common/gomp/metadirective-condition.c: New.
+   * c-c++-common/gomp/metadirective-error-recovery.c: Update expected
+   output.
+   * g++.dg/gomp/metadirective-condition-class.C: New.
+   * g++.dg/gomp/metadirective-condition-template.C: New.
+
 2025-05-22  Thomas Schwinge  
 
Backported from master:

[gcc/devel/omp/gcc-15] OpenMP: Handle more cases in user/condition selector

[Sandra Loosemore via Gcc-cvs]

https://gcc.gnu.org/g:98f8571728647a8f650c85f7b5d3d31666ef902a

commit 98f8571728647a8f650c85f7b5d3d31666ef902a
Author: Sandra Loosemore 
Date:   Mon Jun 2 03:26:42 2025 +

OpenMP: Handle more cases in user/condition selector

Tobias had noted that the C front end was not treating C23 constexprs
as constant in the user/condition selector property, which led to
missed opportunities to resolve metadirectives at parse time.
Additionally neither C nor C++ was permitting the expression to have
pointer or floating-point type -- the former being a common idiom in
other C/C++ conditional expressions.  By using the existing front-end
hooks for the implicit conversion to bool in conditional expressions,
we also get free support for using a C++ class object that has a bool
conversion operator in the user/condition selector.

gcc/c/ChangeLog
* c-parser.cc (c_parser_omp_context_selector): Call
convert_lvalue_to_rvalue and c_objc_common_truthvalue_conversion
on the expression for OMP_TRAIT_PROPERTY_BOOL_EXPR.

gcc/cp/ChangeLog
* cp-tree.h (maybe_convert_cond): Declare.
* parser.cc (cp_parser_omp_context_selector): Call
maybe_convert_cond and fold_build_cleanup_point_expr on the
expression for OMP_TRAIT_PROPERTY_BOOL_EXPR.
* pt.cc (tsubst_omp_context_selector): Likewise.
* semantics.cc (maybe_convert_cond): Remove static declaration.

gcc/testsuite/ChangeLog
* c-c++-common/gomp/declare-variant-2.c: Update expected output.
* c-c++-common/gomp/metadirective-condition-constexpr.c: New.
* c-c++-common/gomp/metadirective-condition.c: New.
* c-c++-common/gomp/metadirective-error-recovery.c: Update expected
output.
* g++.dg/gomp/metadirective-condition-class.C: New.
* g++.dg/gomp/metadirective-condition-template.C: New.

(cherry picked from commit 08c299a410b9314957e48a87f5bf50a4c034b744)

Diff:
---
 gcc/c/c-parser.cc  | 19 --
 gcc/cp/cp-tree.h   |  1 +
 gcc/cp/parser.cc   | 21 +--
 gcc/cp/pt.cc   | 30 +++
 gcc/cp/semantics.cc|  3 +-
 .../c-c++-common/gomp/declare-variant-2.c  |  2 +-
 .../gomp/metadirective-condition-constexpr.c   | 13 +++
 .../c-c++-common/gomp/metadirective-condition.c| 25 +
 .../gomp/metadirective-error-recovery.c|  9 -
 .../g++.dg/gomp/metadirective-condition-class.C| 43 ++
 .../g++.dg/gomp/metadirective-condition-template.C | 41 +
 11 files changed, 188 insertions(+), 19 deletions(-)

diff --git a/gcc/c/c-parser.cc b/gcc/c/c-parser.cc
index d132704c197d..368caf898e00 100644
--- a/gcc/c/c-parser.cc
+++ b/gcc/c/c-parser.cc
@@ -28425,17 +28425,30 @@ c_parser_omp_context_selector (c_parser *parser, enum 
omp_tss_code set,
  break;
case OMP_TRAIT_PROPERTY_DEV_NUM_EXPR:
case OMP_TRAIT_PROPERTY_BOOL_EXPR:
- t = c_parser_expr_no_commas (parser, NULL).value;
+ {
+   c_expr texpr = c_parser_expr_no_commas (parser, NULL);
+   texpr = convert_lvalue_to_rvalue (token->location, texpr,
+ true, true);
+   t = texpr.value;
+ }
  if (t == error_mark_node)
return error_mark_node;
  mark_exp_read (t);
- t = c_fully_fold (t, false, NULL);
- if (!INTEGRAL_TYPE_P (TREE_TYPE (t)))
+ if (property_kind == OMP_TRAIT_PROPERTY_BOOL_EXPR)
+   {
+ t = c_objc_common_truthvalue_conversion (token->location,
+  t,
+  boolean_type_node);
+ if (t == error_mark_node)
+   return error_mark_node;
+   }
+ else if (!INTEGRAL_TYPE_P (TREE_TYPE (t)))
{
  error_at (token->location,
"property must be integer expression");
  return error_mark_node;
}
+ t = c_fully_fold (t, false, NULL);
  properties = make_trait_property (NULL_TREE, t, properties);
  break;
case OMP_TRAIT_PROPERTY_CLAUSE_LIST:
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index f984940981ca..e512c72aab3b 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -7951,6 +7951,7 @@ extern bool perform_deferred_access_checks
(tsubst_flags_t);
 extern bool perform_or_defer_access_check  (tree, tree, tree,
 tsubst_flags_t,
   

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Smrnmi extension.

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:11d80e3207f54627e5ec6520bfb26df72e71c2ed

commit 11d80e3207f54627e5ec6520bfb26df72e71c2ed
Author: Jiawei 
Date:   Thu Jun 5 11:24:43 2025 +0800

RISC-V: Support Smrnmi extension.

Support the Smrnmi extension, which provides new CSRs
for Machine mode Non-Maskable Interrupts.

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New extension definition.
* config/riscv/riscv-ext.opt: New extension mask.
* doc/riscv-ext.texi: Document the new extension.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-smrnmi.c: New test.

Signed-off-by: Jiawei 
(cherry picked from commit f955831312bbc6426460f18b59a85933bc11ebf4)

Diff:
---
 gcc/config/riscv/riscv-ext.def   | 13 +
 gcc/config/riscv/riscv-ext.opt   |  2 ++
 gcc/doc/riscv-ext.texi   |  4 
 gcc/testsuite/gcc.target/riscv/arch-smrnmi.c |  5 +
 4 files changed, 24 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index 6c122c3987b0..98e7b82c8d17 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1753,6 +1753,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ smrnmi,
+  /* UPPERCASE_NAME */ SMRNMI,
+  /* FULL_NAME */ "Resumable non-maskable interrupts",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ sm,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ smstateen,
   /* UPPERCASE_NAME */ SMSTATEEN,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index 725dc8793494..73868798db68 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -347,6 +347,8 @@ Mask(SMMPM) Var(riscv_sm_subext)
 
 Mask(SMNPM) Var(riscv_sm_subext)
 
+Mask(SMRNMI) Var(riscv_sm_subext)
+
 Mask(SMSTATEEN) Var(riscv_sm_subext)
 
 Mask(SMDBLTRP) Var(riscv_sm_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index ca7414e0c7a0..2d2631e726dc 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -518,6 +518,10 @@
 @tab 1.0
 @tab smnpm extension
 
+@item smrnmi
+@tab 1.0
+@tab Resumable Non-Maskable Interrupts
+
 @item smstateen
 @tab 1.0
 @tab State enable extension
diff --git a/gcc/testsuite/gcc.target/riscv/arch-smrnmi.c 
b/gcc/testsuite/gcc.target/riscv/arch-smrnmi.c
new file mode 100644
index ..8e6254043fa3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-smrnmi.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_smrnmi -mabi=lp64" } */
+int foo()
+{
+}

[gcc/devel/omp/gcc-15] OpenMP: Fix regressions in metadirective-target-device-2.c [PR120518]

[Sandra Loosemore via Gcc-cvs]

https://gcc.gnu.org/g:f2a61a287dbe1dea763b54868b4068ea112cb7d9

commit f2a61a287dbe1dea763b54868b4068ea112cb7d9
Author: Sandra Loosemore 
Date:   Wed Jun 4 04:03:03 2025 +

OpenMP: Fix regressions in metadirective-target-device-2.c [PR120518]

My previous patch that added a CLEANUP_POINT_EXPR around the device_num
selector expression in the C++ front end broke the testcase
c-c++-common/gomp/metadirective-target-device-2.c on offload targets.
It confused the code in omp_device_num_check that tries to bypass error
checking and do early resolution when the expression is a call to one
of the OpenMP library functions.  The solution is to make that code smart
enough to look inside a CLEANUP_POINT_EXPR.

gcc/ChangeLog
PR c++/120518
* omp-general.cc (omp_device_num_check): Look inside a
CLEANUP_POINT_EXPR when trying to optimize special cases.

(cherry picked from commit 9788a1e2486b55dd1ab521e34bfaf9f4974d)

Diff:
---
 gcc/omp-general.cc | 14 ++
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/gcc/omp-general.cc b/gcc/omp-general.cc
index 0eaa43156a5f..6580a5f08ae8 100644
--- a/gcc/omp-general.cc
+++ b/gcc/omp-general.cc
@@ -2759,10 +2759,16 @@ omp_selector_is_dynamic (tree ctx)
 static tree
 omp_device_num_check (tree *device_num, bool *is_host)
 {
+  /* C++ may wrap the device_num expr in a CLEANUP_POINT_EXPR; we want
+ to look inside of it for the special cases.  */
+  tree t = *device_num;
+  if (TREE_CODE (t) == CLEANUP_POINT_EXPR)
+t = TREE_OPERAND (t, 0);
+
   /* First check for some constant values we can treat specially.  */
-  if (tree_fits_shwi_p (*device_num))
+  if (tree_fits_shwi_p (t))
 {
-  HOST_WIDE_INT num = tree_to_shwi (*device_num);
+  HOST_WIDE_INT num = tree_to_shwi (t);
   if (num < -1)
return integer_zero_node;
   /* Initial device?  */
@@ -2781,9 +2787,9 @@ omp_device_num_check (tree *device_num, bool *is_host)
 
   /* Also test for direct calls to OpenMP routines that return valid
  device numbers.  */
-  if (TREE_CODE (*device_num) == CALL_EXPR)
+  if (TREE_CODE (t) == CALL_EXPR)
 {
-  tree fndecl = get_callee_fndecl (*device_num);
+  tree fndecl = get_callee_fndecl (t);
   if (fndecl && omp_runtime_api_call (fndecl))
{
  const char *fnname = IDENTIFIER_POINTER (DECL_NAME (fndecl));

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 1/2] The following changes enable P8700 processor for RISCV and P8700 is a high-performanc

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:208a74e05db9a2d9e2558f1dea92d15d69243ff8

commit 208a74e05db9a2d9e2558f1dea92d15d69243ff8
Author: Umesh Kalappa 
Date:   Tue May 20 11:50:46 2025 -0600

[PATCH v2 1/2] The following changes enable P8700 processor for RISCV and 
P8700 is a high-performance processor from MIPS by extending RISCV with custom 
instructions

Add support for the p8700 design from MIPS.

gcc/
* config/riscv/mips-p8700.md: New scheduler model.
* config/riscv/riscv-cores.def (mips-p87000): New tuning model
and core architecture.
* config/riscv/riscv-opts.h (riscv_microarchitecture_type); Add
mips-p8700.
* config/riscv/riscv.cc (mips_p8700_tune_info): New uarch
tuning parameters.
* config/riscv/riscv.md (tune): Add mips_p8700.
Include mips-p8700.md
* doc/invoke.texi: Document tune/cpu options for the MIPS P8700.

Co-authored-by: Jeff Law 

(cherry picked from commit 1186a2bd6e187d512030233171293ee87b608189)

Diff:
---
 gcc/config/riscv/mips-p8700.md   | 139 +++
 gcc/config/riscv/riscv-cores.def |   5 ++
 gcc/config/riscv/riscv-opts.h|   3 +-
 gcc/config/riscv/riscv.cc|  22 +++
 gcc/config/riscv/riscv.md|   3 +-
 gcc/doc/invoke.texi  |  14 ++--
 6 files changed, 177 insertions(+), 9 deletions(-)

diff --git a/gcc/config/riscv/mips-p8700.md b/gcc/config/riscv/mips-p8700.md
new file mode 100644
index ..11d0b1ca7930
--- /dev/null
+++ b/gcc/config/riscv/mips-p8700.md
@@ -0,0 +1,139 @@
+;; DFA-based pipeline description for MIPS P8700.
+;;
+;; Copyright (C) 2025 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 3, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; .
+
+(define_automaton "mips_p8700_agen_alq_pipe, mips_p8700_mdu_pipe, 
mips_p8700_fpu_pipe")
+
+;; The address generation queue (AGQ) has AL2, CTISTD and LDSTA pipes
+(define_cpu_unit "mips_p8700_agq, mips_p8700_al2, mips_p8700_ctistd, 
mips_p8700_lsu"
+"mips_p8700_agen_alq_pipe")
+
+(define_cpu_unit "mips_p8700_gpmul, mips_p8700_gpdiv" "mips_p8700_mdu_pipe")
+
+;; The arithmetic-logic-unit queue (ALQ) has ALU pipe
+(define_cpu_unit "mips_p8700_alq, mips_p8700_alu" "mips_p8700_agen_alq_pipe")
+
+;; The floating-point-unit queue (FPQ) has short and long pipes
+(define_cpu_unit "mips_p8700_fpu_short, mips_p8700_fpu_long" 
"mips_p8700_fpu_pipe")
+
+;; Long FPU pipeline.
+(define_cpu_unit "mips_p8700_fpu_apu" "mips_p8700_fpu_pipe")
+
+(define_reservation "mips_p8700_agq_al2" "mips_p8700_agq, mips_p8700_al2")
+(define_reservation "mips_p8700_agq_ctistd" "mips_p8700_agq, 
mips_p8700_ctistd")
+(define_reservation "mips_p8700_agq_lsu" "mips_p8700_agq, mips_p8700_lsu")
+(define_reservation "mips_p8700_alq_alu" "mips_p8700_alq, mips_p8700_alu")
+
+;;
+;; FPU pipe
+;;
+
+(define_insn_reservation "mips_p8700_fpu_fadd" 4
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "fadd"))
+  "mips_p8700_fpu_long, mips_p8700_fpu_apu")
+
+(define_insn_reservation "mips_p8700_fpu_fabs" 2
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "fcmp,fmove"))
+  "mips_p8700_fpu_short, mips_p8700_fpu_apu")
+
+(define_insn_reservation "mips_p8700_fpu_fload" 8
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "fpload"))
+  "mips_p8700_agq_lsu")
+
+(define_insn_reservation "mips_p8700_fpu_fstore" 1
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "fpstore"))
+  "mips_p8700_agq_lsu")
+
+(define_insn_reservation "mips_p8700_fpu_fmadd" 8
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "fmadd"))
+  "mips_p8700_fpu_long, mips_p8700_fpu_apu")
+
+(define_insn_reservation "mips_p8700_fpu_fmul" 5
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "fmul"))
+  "mips_p8700_fpu_long, mips_p8700_fpu_apu")
+
+(define_insn_reservation "mips_p8700_fpu_div" 17
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "fdiv,fsqrt"))
+  "mips_p8700_fpu_long, mips_p8700_fpu_apu*17")
+
+(define_insn_reservation "mips_p8700_fpu_fcvt" 4
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "fcvt,fcvt_i2f,fcvt_f2i"))
+  "mips_p8700_fpu_long, mips_p8700_fpu_apu")
+
+(define_insn_reservation "mips_p8700_fpu_fmtc" 7
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "mtc"))
+  

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Infrastructure of synthesizing logical AND with constant

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:4787ad29a5421b607e535beb749ad3344748c477

commit 4787ad29a5421b607e535beb749ad3344748c477
Author: Shreya Munnangi 
Date:   Tue May 20 20:15:42 2025 -0600

[RISC-V] Infrastructure of synthesizing logical AND with constant

So this is the next step on the path to mvconst_internal removal and is work
from Shreya and myself.

This puts in the infrastructure to allow us to synthesize logical AND much 
like
we're doing with logical IOR/XOR.

Unlike IOR/XOR, AND has many more special cases that can be profitable. For
example, you can use shifts to clear many bits.  You can use zero extension 
to
clear bits, you can use rotate+andi+rotate, shift pairs, etc.

So to make potential bisecting easy the plan is to drop in the work on 
logical
AND in several steps, essentially one new case at a time.

This step just puts the basics of a operation synthesis in place.  It still
uses the same code generation strategies as we are currently using.

I'd like to say this is NFC, but unfortunately that's not true.  While the 
code
generation strategy is the same, this does indirectly introduce new 
REG_EQUAL
notes.  Those additional notes in turn can impact how various optimizers 
behave
in very minor ways.

As usual, this has survived my tester on riscv32-elf and riscv64-elf.

Waiting on pre-commit to do its thing.  And I'll start queuing up the
additional cases we want to handle while waiting 😉

gcc/
* config/riscv/riscv-protos.h (synthesize_and): Prototype.
* config/riscv/riscv.cc (synthesize_and): New function.
* config/riscv/riscv.md (and3): Use it.

Co-Authored-By: Jeff Law  

(cherry picked from commit 5568277c005f5edda0ce444e11abd1d5845d6ee7)

Diff:
---
 gcc/config/riscv/riscv-protos.h |  1 +
 gcc/config/riscv/riscv.cc   | 64 +
 gcc/config/riscv/riscv.md   | 21 ++
 3 files changed, 63 insertions(+), 23 deletions(-)

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index b39b858acac8..d8c8f6b5079f 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -141,6 +141,7 @@ extern void riscv_expand_ustrunc (rtx, rtx);
 extern void riscv_expand_sstrunc (rtx, rtx);
 extern int riscv_register_move_cost (machine_mode, reg_class_t, reg_class_t);
 extern bool synthesize_ior_xor (rtx_code, rtx [3]);
+extern bool synthesize_and (rtx [3]);
 
 #ifdef RTX_CODE
 extern void riscv_expand_int_scc (rtx, enum rtx_code, rtx, rtx, bool 
*invert_ptr = 0);
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 4c5bb02754df..1a88e96d8c6f 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -14300,7 +14300,7 @@ synthesize_ior_xor (rtx_code code, rtx operands[3])
  we clear bits in IVAL.  Once IVAL is zero, then synthesis of the
  operation is complete.  */
   unsigned HOST_WIDE_INT ival = INTVAL (operands[2]);
-  
+
   /* Check if we want to use [x]ori. Then get the remaining bits
  and decrease the budget by one. */
   if ((ival & HOST_WIDE_INT_UC (0x7ff)) != 0)
@@ -14435,14 +14435,14 @@ synthesize_ior_xor (rtx_code code, rtx operands[3])
}
 }
 
-  /* If after accounting for bseti the remaining budget has 
+  /* If after accounting for bseti the remaining budget has
  gone to less than zero, it forces the value into a
  register and performs the IOR operation.  It returns
  TRUE to the caller so the caller knows code generation
  is complete. */
   if (budget < 0)
 {
-  rtx x = force_reg (word_mode, operands[2]); 
+  rtx x = force_reg (word_mode, operands[2]);
   x = gen_rtx_fmt_ee (code, word_mode, operands[1], x);
   emit_insn (gen_rtx_SET (operands[0], x));
   return true;
@@ -14466,8 +14466,8 @@ synthesize_ior_xor (rtx_code code, rtx operands[3])
 }
 
   /* We figure out a single bit as a constant and
- generate a CONST_INT node for that.  Then we 
- construct the IOR node, then the SET node and 
+ generate a CONST_INT node for that.  Then we
+ construct the IOR node, then the SET node and
  emit it.  An IOR with a suitable constant that is
  a single bit will be implemented with a bseti. */
   while (ival)
@@ -14486,6 +14486,60 @@ synthesize_ior_xor (rtx_code code, rtx operands[3])
   return true;
 }
 
+/* Synthesize OPERANDS[0] = OPERANDS[1] & OPERANDS[2].
+
+OPERANDS[0] and OPERANDS[1] will be a REG and may be the same
+REG.
+
+OPERANDS[2] is a CONST_INT.
+
+Return TRUE if the operation was fully synthesized and the caller
+need not generate additional code.  Return FALSE if the operation
+was not synthesized and the caller is responsible for emitting the
+proper sequence.  */
+
+bool
+synthesize_and (rtx operands[3])
+{
+  /* Trivial cases that don't need synthesis.  

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add autovec mode param.

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:15cc995ae507e4a5f8ace9e9cb6941943ddc2153

commit 15cc995ae507e4a5f8ace9e9cb6941943ddc2153
Author: Robin Dapp 
Date:   Wed May 7 21:02:21 2025 +0200

RISC-V: Add autovec mode param.

This patch adds a --param=autovec-mode=.  When the param is
specified we make autovectorize_vector_modes return exactly this mode if
it is available.  This helps when testing different vectorizer settings.

gcc/ChangeLog:

* config/riscv/riscv-v.cc (autovectorize_vector_modes): Return
user-specified mode if available.
* config/riscv/riscv.opt: New param.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/param-autovec-mode.c: New test.

(cherry picked from commit b949d048e914a4cd11a63004a9a2d42e51bc3ac8)

Diff:
---
 gcc/config/riscv/riscv-v.cc| 22 ++
 gcc/config/riscv/riscv.opt |  4 
 .../riscv/rvv/autovec/param-autovec-mode.c | 16 
 3 files changed, 42 insertions(+)

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index e406e7a7f590..be6147b80a2c 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -2821,6 +2821,28 @@ autovectorize_vector_modes (vector_modes *modes, bool)
i++;
size = base_size / (1U << i);
  }
+
+  /* If the user specified the exact mode to use look if it is available and
+ remove all other ones before returning.  */
+  if (riscv_autovec_mode)
+{
+  auto_vector_modes ms;
+  ms.safe_splice (*modes);
+  modes->truncate (0);
+
+  for (machine_mode mode : ms)
+   {
+ if (!strcmp (GET_MODE_NAME (mode), riscv_autovec_mode))
+   {
+ modes->safe_push (mode);
+ return 0;
+   }
+   }
+
+  /* Nothing found, fall back to regular handling.  */
+  modes->safe_splice (ms);
+}
+
   /* Enable LOOP_VINFO comparison in COST model.  */
   return VECT_COMPARE_COSTS;
 }
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 527e09549a8a..b2b9d3311f4e 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -286,6 +286,10 @@ Max number of bytes to compare as part of inlined 
strcmp/strncmp routines (defau
 Target RejectNegative Joined UInteger Var(gpr2vr_cost) 
Init(GPR2VR_COST_UNPROVIDED)
 Set the cost value of the rvv instruction when operate from GPR to VR.
 
+-param=riscv-autovec-mode=
+Target Undocumented RejectNegative Joined Var(riscv_autovec_mode) Save
+Set the only autovec mode to try.
+
 Enum
 Name(rvv_max_lmul) Type(enum rvv_max_lmul_enum)
 The RVV possible LMUL (-mrvv-max-lmul=):
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/param-autovec-mode.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/param-autovec-mode.c
new file mode 100644
index ..b2ec8f9dc774
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/param-autovec-mode.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=rv64gcv -mabi=lp64d --param=autovec-mode=V4QI 
-fdump-tree-vect-details" } */
+
+/* By default we will use RVVM1SI mode for vectorization because N is not
+   known.  Check that we use V4QI and create an epilogue when the autovec-mode
+   param is specified.  */
+
+void
+foo (int *a, int *b, int n)
+{
+  for (int i = 0; i < n; i++)
+a[i] = b[i] + 1;
+}
+
+/* { dg-final { scan-tree-dump "Choosing vector mode V4QI" "vect" } } */
+/* { dg-final { scan-tree-dump "Choosing epilogue vector mode RVVM1SI" "vect" 
} } */

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Default-initialize variable.

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:cb1ec115f13d037bcc84c2d58862e9b946e0a3ac

commit cb1ec115f13d037bcc84c2d58862e9b946e0a3ac
Author: Robin Dapp 
Date:   Thu May 8 10:17:26 2025 +0200

RISC-V: Default-initialize variable.

This patch initializes saved_vxrm_mode to VXRM_MODE_NONE.  This is a
warning (but no error) when building the compiler so better fix it.

gcc/ChangeLog:

* config/riscv/riscv.cc (singleton_vxrm_need): Init
saved_vxrm_mode.

(cherry picked from commit e6fea0a8be95e2a1cbe733301a205b8c00db9202)

Diff:
---
 gcc/config/riscv/riscv.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 358d1ec5d32e..5c0c8beec3bd 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -12321,7 +12321,7 @@ singleton_vxrm_need (void)
   /* Walk the IL noting if VXRM is needed and if there's more than one
  mode needed.  */
   bool found = false;
-  int saved_vxrm_mode;
+  int saved_vxrm_mode = VXRM_MODE_NONE;
   for (rtx_insn *insn = get_insns (); insn; insn = NEXT_INSN (insn))
 {
   if (!INSN_P (insn) || DEBUG_INSN_P (insn))

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clear both upper and lower bits using 3 shifts

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:129a47471f7743101b9bf5470679bcb9f0641e3f

commit 129a47471f7743101b9bf5470679bcb9f0641e3f
Author: Shreya Munnangi 
Date:   Thu May 22 11:51:01 2025 -0600

[RISC-V] Clear both upper and lower bits using 3 shifts

So the next step in Shreya's work.  In the prior patch we used two shifts to
clear bits at the high or low end of an object.  In this patch we use 3 
shifts
to clear bits on both ends.

Nothing really special here.  With mvconst_internal still in the tree it's 
of
marginal value, though Shreya and I have confirmed the code coming out of
expand looks good.  It's just that combine reconstitutes the operation via
mvconst_internal+and which looks cheaper.

When I was playing in this space earlier I definitely saw testsuite cases 
that
need this case handled to not regress with mvconst_internal removed.

This has spun in my tester on rv32 and rv64 and it's bootstrap + testing on 
my
BPI with a mere 23 hours to go.  Waiting on pre-commit testing to render a
verdict before moving forward.

gcc/
* config/riscv/riscv.cc (synthesize_and): When profitable, use a 
three
shift sequence to clear bits at both upper and lower bits rather 
than
synthesizing the constant mask.

(cherry picked from commit 65f27c18e349e2ccdfac34cef8640d8c6ca1d3c1)

Diff:
---
 gcc/config/riscv/riscv.cc | 28 
 1 file changed, 28 insertions(+)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 41a164bc7783..358d1ec5d32e 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -14562,6 +14562,34 @@ synthesize_and (rtx operands[3])
   return true;
 }
 
+  /* If there are all zeros, except for a run of 1s somewhere in the middle
+ of the constant, then this is at worst 3 shifts.  */
+  t = INTVAL (operands[2]);
+  if (budget >= 3
+  && consecutive_bits_operand (GEN_INT (t), word_mode)
+  && popcount_hwi (t) > 3)
+{
+  /* Shift right to clear the low order bits.  */
+  int count = ctz_hwi (INTVAL (operands[2]));
+  rtx x = gen_rtx_LSHIFTRT (word_mode, operands[1], GEN_INT (count));
+  output = gen_reg_rtx (word_mode);
+  emit_insn (gen_rtx_SET (output, x));
+  input = output;
+
+  /* Shift left to clear the high order bits.  */
+  count += clz_hwi (INTVAL (operands[2])) % BITS_PER_WORD;
+  x = gen_rtx_ASHIFT (word_mode, input, GEN_INT (count));
+  output = gen_reg_rtx (word_mode);
+  emit_insn (gen_rtx_SET (output, x));
+  input = output;
+
+  /* And shift back right to put the bits into position.  */
+  count = clz_hwi (INTVAL (operands[2])) % BITS_PER_WORD;
+  x = gen_rtx_LSHIFTRT (word_mode, input, GEN_INT (count));
+  emit_insn (gen_rtx_SET (operands[0], x));
+  return true;
+}
+
   /* If the remaining budget has gone to less than zero, it
  forces the value into a register and performs the AND
  operation.  It returns TRUE to the caller so the caller

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Combine vec_duplicate + vand.vv to vand.vx on GR2VR cost

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:726454e4d06d107605d3d34fe4a2f9bc1a2a1a99

commit 726454e4d06d107605d3d34fe4a2f9bc1a2a1a99
Author: Pan Li 
Date:   Tue May 20 15:00:15 2025 +0800

RISC-V: RISC-V: Combine vec_duplicate + vand.vv to vand.vx on GR2VR cost

This patch would like to combine the vec_duplicate + vand.vv to the
vand.vx.  From example as below code.  The related pattern will depend
on the cost of vec_duplicate from GR2VR.  Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.

Assume we have example code like below, GR2VR cost is 0.

  #define DEF_VX_BINARY(T, OP)\
  void\
  test_vx_binary (T * restrict out, T * restrict in, T x, unsigned n) \
  {   \
for (unsigned i = 0; i < n; i++)  \
  out[i] = in[i] OP x;\
  }

  DEF_VX_BINARY(int32_t, &)

Before this patch:
  10   │ test_vx_binary_and_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ vsetvli a5,zero,e32,m1,ta,ma
  13   │ vmv.v.x v2,a2
  14   │ sllia3,a3,32
  15   │ srlia3,a3,32
  16   │ .L3:
  17   │ vsetvli a5,a3,e32,m1,ta,ma
  18   │ vle32.v v1,0(a1)
  19   │ sllia4,a5,2
  20   │ sub a3,a3,a5
  21   │ add a1,a1,a4
  22   │ vand.vv v1,v1,v2
  23   │ vse32.v v1,0(a0)
  24   │ add a0,a0,a4
  25   │ bne a3,zero,.L3

After this patch:
  10   │ test_vx_binary_and_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ sllia3,a3,32
  13   │ srlia3,a3,32
  14   │ .L3:
  15   │ vsetvli a5,a3,e32,m1,ta,ma
  16   │ vle32.v v1,0(a1)
  17   │ sllia4,a5,2
  18   │ sub a3,a3,a5
  19   │ add a1,a1,a4
  20   │ vand.vx v1,v1,a2
  21   │ vse32.v v1,0(a0)
  22   │ add a0,a0,a4
  23   │ bne a3,zero,.L3

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add new
case for rtx code AND.
(expand_vx_binary_vec_vec_dup): Ditto.
* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
* config/riscv/vector-iterators.md: Add new op and to 
no_shift_vx_ops.

Signed-off-by: Pan Li 
(cherry picked from commit ad041944f1060be0c9280421a065037aa14e169e)

Diff:
---
 gcc/config/riscv/riscv-v.cc  | 2 ++
 gcc/config/riscv/riscv.cc| 1 +
 gcc/config/riscv/vector-iterators.md | 2 +-
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 1b5ef51886e3..e406e7a7f590 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -5511,6 +5511,7 @@ expand_vx_binary_vec_dup_vec (rtx op_0, rtx op_1, rtx 
op_2,
   switch (code)
 {
 case PLUS:
+case AND:
   icode = code_for_pred_scalar (code, mode);
   break;
 case MINUS:
@@ -5537,6 +5538,7 @@ expand_vx_binary_vec_vec_dup (rtx op_0, rtx op_1, rtx 
op_2,
   switch (code)
 {
 case MINUS:
+case AND:
   icode = code_for_pred_scalar (code, mode);
   break;
 default:
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 1a88e96d8c6f..03dcc347fb87 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3916,6 +3916,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int 
outer_code, int opno ATTRIBUTE_UN
break;
  case PLUS:
  case MINUS:
+ case AND:
{
  rtx op_0 = XEXP (x, 0);
  rtx op_1 = XEXP (x, 1);
diff --git a/gcc/config/riscv/vector-iterators.md 
b/gcc/config/riscv/vector-iterators.md
index 23cb940310f2..026be6f65d39 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -4042,7 +4042,7 @@
 ])
 
 (define_code_iterator any_int_binop_no_shift_vx [
-  plus minus
+  plus minus and
 ])
 
 (define_code_iterator any_int_unop [neg not])

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vand.vv combine case 1 with GR2VR cost 0, 1 and 2

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:80459040aadce5e2e87b113aee7fad6185c14e51

commit 80459040aadce5e2e87b113aee7fad6185c14e51
Author: Pan Li 
Date:   Tue May 20 22:30:04 2025 +0800

RISC-V: Add test for vec_duplicate + vand.vv combine case 1 with GR2VR cost 
0, 1 and 2

Add asm dump check test for vec_duplicate + vand.vv combine to vand.vx,
with the GR2VR cost is 0, 1 and 2.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check
for vand.vx combine.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c: Ditto.

Signed-off-by: Pan Li 
(cherry picked from commit 4f02bfb62da3a0e32a86cc2ac1171b11da026e7c)

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c  | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c  | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c  | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c  | 4 +++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c  | 6 --
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c  | 2 ++
 24 files changed, 66 insertions(+), 18 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
index 6f59b07d236c..62fd4e39c018 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
@@ -7,8 +7,10 @@
 
 DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X16)
 DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
-DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16);
+DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, &, and, VX_BINARY_BODY_X16)
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */
 /* { dg-final { scan-assembler {vrsub.vx} } } */
+/* { dg-final { scan-assembler {vand.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/v

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] testsuite: RISC-V: Update the cset-sext-sfb/zba-slliuw test optimization level.

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:a02a5bc24013f9e05f1c514ad37ec6aa67947cc0

commit a02a5bc24013f9e05f1c514ad37ec6aa67947cc0
Author: Dongyan Chen 
Date:   Wed May 21 21:46:52 2025 -0600

[PATCH] testsuite: RISC-V: Update the cset-sext-sfb/zba-slliuw test 
optimization level.

Failed testcases occurred in the regression test of gcc: cset-sext-sfb.c 
failed
the -Oz test, and zba-slliuw.c failed the -Og test.
This patch solves the problem by skipping the optimization.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/cset-sext-sfb.c: Skip for -Oz.
* gcc.target/riscv/zba-slliuw.c: Skip for -Og.

(cherry picked from commit d8636b05c559e6f060e16652bb10c59d9fb0fb54)

Diff:
---
 gcc/testsuite/gcc.target/riscv/cset-sext-sfb.c | 2 +-
 gcc/testsuite/gcc.target/riscv/zba-slliuw.c| 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/cset-sext-sfb.c 
b/gcc/testsuite/gcc.target/riscv/cset-sext-sfb.c
index 4a8477e81621..3d46306f1e19 100644
--- a/gcc/testsuite/gcc.target/riscv/cset-sext-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/cset-sext-sfb.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target { ! riscv_abi_e } } } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O1" "-Os" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O1" "-Os" "-Oz" } } */
 /* { dg-options "-march=rv32gc -mtune=sifive-7-series -mbranch-cost=1 
-fno-ssa-phiopt -fdump-rtl-ce1" { target { rv32 } } } */
 /* { dg-options "-march=rv64gc -mtune=sifive-7-series -mbranch-cost=1 
-fno-ssa-phiopt -fdump-rtl-ce1" { target { rv64 } } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zba-slliuw.c 
b/gcc/testsuite/gcc.target/riscv/zba-slliuw.c
index c123bb5ece0f..69914db95a2c 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-slliuw.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-slliuw.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gc_zba_zbs -mabi=lp64" } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
 
 long
 foo (long i)

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix some dynamic LMUL costing.

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:0e627a67f17ff9f94c698b6db78111d5da063a5c

commit 0e627a67f17ff9f94c698b6db78111d5da063a5c
Author: Robin Dapp 
Date:   Fri Feb 7 15:42:28 2025 +0100

RISC-V: Fix some dynamic LMUL costing.

With all-SLP we annotate statements slightly differently.  This patch
uses STMT_VINFO_RELEVANT_P in order to walk through potential program
points.

Also it makes the LMUL estimate always use the same path.  This helps
fix a number of test cases that regressed since GCC 14.

There are still some failing ones but it appears to me that the chosen
LMUL is still correct and we just expect different log messages.

gcc/ChangeLog:

* config/riscv/riscv-vector-costs.cc (compute_estimated_lmul):
Always use vect_vf_for_cost and TARGET_MIN_VLEN.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c: Adjust
expectations.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c: Ditto.

(cherry picked from commit 1eb30ea5e36a0cf01e356337f5fabcd3e05fd373)

Diff:
---
 gcc/config/riscv/riscv-vector-costs.cc | 25 ++
 .../vect/costmodel/riscv/rvv/dynamic-lmul4-3.c |  2 +-
 .../vect/costmodel/riscv/rvv/dynamic-lmul8-9.c |  1 -
 3 files changed, 3 insertions(+), 25 deletions(-)

diff --git a/gcc/config/riscv/riscv-vector-costs.cc 
b/gcc/config/riscv/riscv-vector-costs.cc
index c28eecd1110e..a39b611e4cef 100644
--- a/gcc/config/riscv/riscv-vector-costs.cc
+++ b/gcc/config/riscv/riscv-vector-costs.cc
@@ -205,9 +205,7 @@ compute_local_program_points (
  if (!is_gimple_assign_or_call (gsi_stmt (si)))
continue;
  stmt_vec_info stmt_info = vinfo->lookup_stmt (gsi_stmt (si));
- enum stmt_vec_info_type type
-   = STMT_VINFO_TYPE (vect_stmt_to_vectorize (stmt_info));
- if (type != undef_vec_info_type)
+ if (STMT_VINFO_RELEVANT_P (stmt_info))
{
  stmt_point info = {point, gsi_stmt (si), stmt_info};
  program_points.safe_push (info);
@@ -626,7 +624,7 @@ compute_estimated_lmul (loop_vec_info loop_vinfo, 
machine_mode mode)
   int regno_alignment = riscv_get_v_regno_alignment (loop_vinfo->vector_mode);
   if (riscv_v_ext_vls_mode_p (loop_vinfo->vector_mode))
 return regno_alignment;
-  else if (known_eq (LOOP_VINFO_SLP_UNROLLING_FACTOR (loop_vinfo), 1U))
+  else
 {
   int estimated_vf = vect_vf_for_cost (loop_vinfo);
   int estimated_lmul = estimated_vf * GET_MODE_BITSIZE (mode).to_constant 
()
@@ -636,25 +634,6 @@ compute_estimated_lmul (loop_vec_info loop_vinfo, 
machine_mode mode)
   else
return estimated_lmul;
 }
-  else
-{
-  /* Estimate the VLA SLP LMUL.  */
-  if (regno_alignment > RVV_M1)
-   return regno_alignment;
-  else if (mode != QImode
-  || LOOP_VINFO_SLP_UNROLLING_FACTOR (loop_vinfo).is_constant ())
-   {
- int ratio;
- if (can_div_trunc_p (BYTES_PER_RISCV_VECTOR,
-  GET_MODE_SIZE (loop_vinfo->vector_mode), &ratio))
-   {
- if (ratio == 1)
-   return RVV_M4;
- else if (ratio == 2)
-   return RVV_M2;
-   }
-   }
-}
   return 0;
 }
 
diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c 
b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c
index 85e3021f1c2b..b5a7f180228a 100644
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c
@@ -45,4 +45,4 @@ void foo2 (int64_t *__restrict a,
 /* { dg-final { scan-tree-dump-not "Preferring smaller LMUL loop because it 
has unexpected spills" "vect" } } */
 /* { dg-final { scan-tree-dump-times "Maximum lmul = 8" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Maximum lmul = 4" 1 "vect" } } */
-/* { dg-final { scan-tree-dump-times "Maximum lmul = 2" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Maximum lmul = 2" 3 "vect" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c 
b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c
index 793d16418bf1..56234580fa82 100644
--- a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c
@@ -14,6 +14,5 @@ foo (int64_t *__restrict a, int64_t init, int n)
 /* { dg-final { scan-assembler {e64,m8} } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
 /* { dg-final { scan-tree-dump-not "Preferring smaller LMUL loop because it 
has unexpected spills" "vect" } } */
-/* { dg-final { scan-tree-dump-times "Maximum lmul = 8" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Maximum lmul = 4" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Maximum lmul = 2" 1 "vect" } } */

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][RISC-V][PR target/70557] Improve storing 0 to memory on rv32

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:2828c84e635ebdfbb942adacabed1737c4b19cc2

commit 2828c84e635ebdfbb942adacabed1737c4b19cc2
Author: Siarhei Volkau 
Date:   Thu May 22 08:52:17 2025 -0600

[PATCH][RISC-V][PR target/70557] Improve storing 0 to memory on rv32

Patch is originally from Siarhei Volkau .

RISC-V has a zero register (x0) which we can use to store zero into memory
without loading the constant into a distinct register. Adjust the 
constraints
of the 32-bit movdi_32bit pattern to recognize that we can store 0.0 into
memory using x0 as the source register.

This patch only affects RISC-V. It has been regression tested on 
riscv64-elf.
Jeff has also tested this in his tester (riscv64-elf and riscv32-elf) with 
no
regressions.

PR target/70557
gcc/
* config/riscv/riscv.md (movdi_32bit): Add "J" constraint to allow 
storing 0
directly to memory.

(cherry picked from commit c77085970ec98916e12e079a5a9d9530b86aae71)

Diff:
---
 gcc/config/riscv/riscv.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index a5b3abbe5d45..92fe7c7741a2 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2501,8 +2501,8 @@
 })
 
 (define_insn "*movdi_32bit"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,m,  
*f,*f,*r,*f,*m,r")
-   (match_operand:DI 1 "move_operand" " 
r,i,m,r,*J*r,*m,*f,*f,*f,vp"))]
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r, m,  
*f,*f,*r,*f,*m,r")
+   (match_operand:DI 1 "move_operand" " 
r,i,m,rJ,*J*r,*m,*f,*f,*f,vp"))]
   "!TARGET_64BIT
&& (register_operand (operands[0], DImode)
|| reg_or_0_operand (operands[1], DImode))"

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 2/2] MIPS p8700 doesn't have vector extension and added the dummies reservation for the sa

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:78a47aa5682375680a612b363beb5aa24f5d4860

commit 78a47aa5682375680a612b363beb5aa24f5d4860
Author: Umesh Kalappa 
Date:   Tue May 20 11:57:00 2025 -0600

[PATCH v2 2/2] MIPS p8700 doesn't have vector extension and added the 
dummies reservation for the same.

The RISC-V backend requires all types to map to a reservation in the
scheduler model.  This adds types to a dummy reservation for all the
types not currently handled by the p8700 model.

gcc/
* config/riscv/mips-p8700.md (mips_p8700_dummies): New
reservation.
(mips_p8700_unknown): Reservation for all the dummies.

(cherry picked from commit 18f272ec3364bcffac2d798a3a744ff2d4c0f7d5)

Diff:
---
 gcc/config/riscv/mips-p8700.md | 28 
 1 file changed, 28 insertions(+)

diff --git a/gcc/config/riscv/mips-p8700.md b/gcc/config/riscv/mips-p8700.md
index 11d0b1ca7930..ae0ea8dc896f 100644
--- a/gcc/config/riscv/mips-p8700.md
+++ b/gcc/config/riscv/mips-p8700.md
@@ -35,6 +35,11 @@
 ;; Long FPU pipeline.
 (define_cpu_unit "mips_p8700_fpu_apu" "mips_p8700_fpu_pipe")
 
+;; P8700 unsupported insns are mapped to dummies reservations
+(define_reservation "mips_p8700_dummies"
+ "mips_p8700_agq |  mips_p8700_al2 |  mips_p8700_ctistd |  mips_p8700_lsu |
+ mips_p8700_fpu_short |  mips_p8700_fpu_long")
+
 (define_reservation "mips_p8700_agq_al2" "mips_p8700_agq, mips_p8700_al2")
 (define_reservation "mips_p8700_agq_ctistd" "mips_p8700_agq, 
mips_p8700_ctistd")
 (define_reservation "mips_p8700_agq_lsu" "mips_p8700_agq, mips_p8700_lsu")
@@ -137,3 +142,26 @@
   (and (eq_attr "tune" "mips_p8700")
(eq_attr "type" "call,jalr"))
   "mips_p8700_agq_ctistd")
+
+;; mips-p8700 dummies insn and placeholder that had no mapping to p8700 
hardware.
+(define_insn_reservation "mips_p8700_unknown" 1
+  (and (eq_attr "tune" "mips_p8700")
+   (eq_attr "type" "rdvlenb,rdvl,wrvxrm,wrfrm,
+   rdfrm,vsetvl,vsetvl_pre,vlde,vste,vldm,vstm,vlds,vsts,
+   vldux,vldox,vstux,vstox,vldff,vldr,vstr,
+   
vlsegde,vssegte,vlsegds,vssegts,vlsegdux,vlsegdox,vssegtux,vssegtox,vlsegdff,
+   vialu,viwalu,vext,vicalu,vshift,vnshift,vicmp,viminmax,
+   vimul,vidiv,viwmul,vimuladd,sf_vqmacc,viwmuladd,vimerge,vimov,
+   vsalu,vaalu,vsmul,vsshift,vnclip,sf_vfnrclip,
+   vfalu,vfwalu,vfmul,vfdiv,vfwmul,vfmuladd,vfwmuladd,vfsqrt,vfrecp,
+   vfcmp,vfminmax,vfsgnj,vfclass,vfmerge,vfmov,
+   vfcvtitof,vfcvtftoi,vfwcvtitof,vfwcvtftoi,
+   vfwcvtftof,vfncvtitof,vfncvtftoi,vfncvtftof,
+   vired,viwred,vfredu,vfredo,vfwredu,vfwredo,
+   vmalu,vmpop,vmffs,vmsfs,vmiota,vmidx,vimovvx,vimovxv,vfmovvf,vfmovfv,
+   vslideup,vslidedown,vislide1up,vislide1down,vfslide1up,vfslide1down,
+   
vgather,vcompress,vmov,vector,vandn,vbrev,vbrev8,vrev8,vclz,vctz,vcpop,vrol,vror,vwsll,
+   
vclmul,vclmulh,vghsh,vgmul,vaesef,vaesem,vaesdf,vaesdm,vaeskf1,vaeskf2,vaesz,
+   
vsha2ms,vsha2ch,vsha2cl,vsm4k,vsm4r,vsm3me,vsm3c,vfncvtbf16,vfwcvtbf16,vfwmaccbf16,
+   sf_vc,sf_vc_se"))
+  "mips_p8700_dummies")

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120368] Fix 32bit shift on rv64

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:1384d5ed1a80d2089bd7d13815e401c26cf26c9a

commit 1384d5ed1a80d2089bd7d13815e401c26cf26c9a
Author: Jeff Law 
Date:   Wed May 21 14:15:23 2025 -0600

[RISC-V][PR target/120368] Fix 32bit shift on rv64

So a followup to last week's bugfix.  In last week's change we we stopped 
using
define_insn_and_split to rewrite instructions.  That change was done to 
avoid
dropping a masking instruction out of the RTL.

As a result the pattern(s) were changed into simple define_insns, which is
good.  One of them uses the GPR iterator since it's supposed to work for 
both
32bit and 64bit shifts on rv64.

But we failed to emit the right opcode for a 32bit shift on rv64. Thankfully
the fix is trivial.  If the mode is anything but word_mode, then we must be
doing a 32-bit shift on rv64, ie the various "w" shift instructions.

It's run through my tester.  Just waiting on the upstream CI system to spin 
it.

PR target/120368
gcc/
* config/riscv/riscv.md (shift with masked shift count): Fix
opcode when generating an SImode shift on rv64.

gcc/testsuite/
* gcc.target/riscv/pr120368.c: New test.

(cherry picked from commit 8459c546197dc9178d250994db021b36405f1bd6)

Diff:
---
 gcc/config/riscv/riscv.md |  9 -
 gcc/testsuite/gcc.target/riscv/pr120368.c | 19 +++
 2 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 7f6d0bbab3eb..7e35d7877ed9 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2938,7 +2938,14 @@
   (match_operand:GPR2 2 "register_operand"  "r")
   (match_operand 3 ""))])))]
   ""
-  "\t%0,%1,%2"
+{
+  /* If the shift mode is not word mode, then it must be the
+ case that we're generating rv64 code, but this is a 32-bit
+ operation.  Thus we need to use the "w" variant.  */
+  if (E_mode != word_mode)
+return "w\t%0,%1,%2";
+  return "\t%0,%1,%2";
+}
   [(set_attr "type" "shift")
(set_attr "mode" "")])
 
diff --git a/gcc/testsuite/gcc.target/riscv/pr120368.c 
b/gcc/testsuite/gcc.target/riscv/pr120368.c
new file mode 100644
index ..4fea8e6fe7c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr120368.c
@@ -0,0 +1,19 @@
+/* { dg-do run } */
+
+int g;
+
+int
+foo (int s, int v)
+{
+  __builtin_memset (&g, v >> (s & 31), sizeof(g));
+  return g;
+}
+
+int
+main ()
+{
+  int x = foo (-16, 0xd);
+  if (x != 0x0d0d0d0d)
+__builtin_abort();
+  __builtin_exit (0);
+}

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V:Add testcases for signed .SAT_ADD IMM form 1 with IMM = -1.

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:3e7ab4752c4d8c2ea4b23c33639895b0e2e2ec6a

commit 3e7ab4752c4d8c2ea4b23c33639895b0e2e2ec6a
Author: xuli 
Date:   Fri Dec 27 07:59:31 2024 +

RISC-V:Add testcases for signed .SAT_ADD IMM form 1 with IMM = -1.

This patch adds testcase for form1, as shown below:

T __attribute__((noinline))  \
sat_s_add_imm_##T##_fmt_1##_##INDEX (T x) \
{\
  T sum = (UT)x + (UT)IMM; \
  return (x ^ IMM) < 0 \
? sum\
: (sum ^ x) >= 0 \
  ? sum  \
  : x < 0 ? MIN : MAX;   \
}

Passed the rv64gcv regression test.

Signed-off-by: Li Xu 

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_s_add_imm-2.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm-1-i16.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-3.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm-1-i32.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-4.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm-1-i64.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-1.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm-1-i8.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-run-2.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm-run-1-i16.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-run-3.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm-run-1-i32.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-run-4.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm-run-1-i64.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-run-1.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm-run-1-i8.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-2-1.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm_type_check-1-i16.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-3-1.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm_type_check-1-i32.c: ...here.
* gcc.target/riscv/sat/sat_s_add_imm-1-1.c: Move to...
* gcc.target/riscv/sat/sat_s_add_imm_type_check-1-i8.c: ...here.

(cherry picked from commit 4962e6d0810823d68349cd019f5dd53524a62ac5)

Diff:
---
 .../{sat_s_add_imm-2.c => sat_s_add_imm-1-i16.c}   | 27 +-
 .../{sat_s_add_imm-3.c => sat_s_add_imm-1-i32.c}   | 26 -
 .../{sat_s_add_imm-4.c => sat_s_add_imm-1-i64.c}   | 22 +-
 .../{sat_s_add_imm-1.c => sat_s_add_imm-1-i8.c}| 22 +-
 ...s_add_imm-run-2.c => sat_s_add_imm-run-1-i16.c} |  6 +
 ...s_add_imm-run-3.c => sat_s_add_imm-run-1-i32.c} |  6 +
 ...s_add_imm-run-4.c => sat_s_add_imm-run-1-i64.c} |  6 +
 ..._s_add_imm-run-1.c => sat_s_add_imm-run-1-i8.c} |  6 +
 ..._imm-2-1.c => sat_s_add_imm_type_check-1-i16.c} |  0
 ..._imm-3-1.c => sat_s_add_imm_type_check-1-i32.c} |  0
 ...d_imm-1-1.c => sat_s_add_imm_type_check-1-i8.c} |  0
 11 files changed, 117 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c
similarity index 53%
rename from gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2.c
rename to gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c
index 3878286d207b..2e23af5d86b7 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c
@@ -29,4 +29,29 @@
 */
 DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/*
+** sat_s_add_imm_int16_t_fmt_1_1:
+** addi\s+[atx][0-9]+,\s*a0,\s*-1
+** not\s+[atx][0-9]+,\s*a0
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+a0,\s*a0,\s*63
+** li\s+[atx][0-9]+,\s*32768
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+** neg\s+a0,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*a0,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*16
+** sraiw\s+a0,\s*a0,\s*16
+** ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_1(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-3.c 
b/gcc/testsuite/gcc.target/riscv

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed vector SAT_ADD IMM form 1

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:c97e4137dd1e50420faf90e86b9745cd4603ab32

commit c97e4137dd1e50420faf90e86b9745cd4603ab32
Author: xuli 
Date:   Thu Dec 26 09:39:08 2024 +

RISC-V: Add testcases for signed vector SAT_ADD IMM form 1

This patch adds testcase for form1, as shown below:

void __attribute__((noinline))   \
vec_sat_s_add_imm_##T##_fmt_1##_##INDEX (T *out, T *op_1, unsigned limit) \
{\
  unsigned i;\
  for (i = 0; i < limit; i++)\
{\
  T x = op_1[i]; \
  T sum = (UT)x + (UT)IMM;   \
  out[i] = (x ^ IMM) < 0 \
? sum\
: (sum ^ x) >= 0 \
  ? sum  \
  : x < 0 ? MIN : MAX;   \
}\
}

Passed the rv64gcv regression test.

Signed-off-by: Li Xu 
gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h: add signed vec 
SAT_ADD IMM form1.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h: add 
sat_s_add_imm data.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-1-i16.c: New 
test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-1-i32.c: New 
test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-1-i64.c: New 
test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-1-i8.c: New 
test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-run-1-i16.c: 
New test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-run-1-i32.c: 
New test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-run-1-i64.c: 
New test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-run-1-i8.c: 
New test.
* 
gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm_type_check-1-i16.c: New test.
* 
gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm_type_check-1-i32.c: New test.
* 
gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm_type_check-1-i8.c: New test.

(cherry picked from commit a91679a3d9f7cbc079880f201fd8292c1d54baa7)

Diff:
---
 .../riscv/rvv/autovec/sat/vec_sat_arith.h  |  25 +++
 .../riscv/rvv/autovec/sat/vec_sat_data.h   | 240 +
 .../rvv/autovec/sat/vec_sat_s_add_imm-1-i16.c  |  10 +
 .../rvv/autovec/sat/vec_sat_s_add_imm-1-i32.c  |  10 +
 .../rvv/autovec/sat/vec_sat_s_add_imm-1-i64.c  |  10 +
 .../riscv/rvv/autovec/sat/vec_sat_s_add_imm-1-i8.c |  10 +
 .../rvv/autovec/sat/vec_sat_s_add_imm-run-1-i16.c  |  28 +++
 .../rvv/autovec/sat/vec_sat_s_add_imm-run-1-i32.c  |  28 +++
 .../rvv/autovec/sat/vec_sat_s_add_imm-run-1-i64.c  |  28 +++
 .../rvv/autovec/sat/vec_sat_s_add_imm-run-1-i8.c   |  28 +++
 .../sat/vec_sat_s_add_imm_type_check-1-i16.c   |   9 +
 .../sat/vec_sat_s_add_imm_type_check-1-i32.c   |   9 +
 .../sat/vec_sat_s_add_imm_type_check-1-i8.c|  10 +
 13 files changed, 445 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h
index 983c9b440abc..f78bdc047ca1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h
@@ -345,6 +345,31 @@ vec_sat_s_add_##T##_fmt_4 (T *out, T *op_1, T *op_2, 
unsigned limit) \
 #define RUN_VEC_SAT_S_ADD_FMT_4_WRAP(T, out, op_1, op_2, N) \
   RUN_VEC_SAT_S_ADD_FMT_4(T, out, op_1, op_2, N)
 
+#define DEF_VEC_SAT_S_ADD_IMM_FMT_1(INDEX, T, UT, IMM, MIN, MAX) \
+void __attribute__((noinline))   \
+vec_sat_s_add_imm_##T##_fmt_1##_##INDEX (T *out, T *op_1, unsigned limit) \
+{\
+  unsigned i;\
+  for (i = 0; i < limit; i++)\
+{\
+  T x = op_1[i]; \
+  T sum = (UT)x + (UT)IMM;   \
+  out[i] = (x ^ IMM) < 0 \
+? sum\
+: (sum ^ x) >= 0 \
+  ? sum   

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 1 with GR2VR cost 0, 1 and 2

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:2112e84154c3d9ea77b9ba01b191127fc7fb2754

commit 2112e84154c3d9ea77b9ba01b191127fc7fb2754
Author: Pan Li 
Date:   Sun May 25 17:17:34 2025 +0800

RISC-V: Add test for vec_duplicate + vxor.vv combine case 1 with GR2VR cost 
0, 1 and 2

Add asm dump check test for vec_duplicate + vxor.vv combine to vxor.vx,
with the GR2VR cost is 0, 1 and 2.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check
for vxor.vx combine.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c: Ditto.

Signed-off-by: Pan Li 
(cherry picked from commit f11e5e96cac227885d444318a60fa2a1cf614867)

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c  | 2 ++
 24 files changed, 48 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
index ffad2a27f921..58dc66dcec9c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
@@ -10,9 +10,11 @@ DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
 DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16)
 DEF_VX_BINARY_CASE_1_WRAP(T, &, and, VX_BINARY_BODY_X16)
 DEF_VX_BINARY_CASE_1_WRAP(T, |, or, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, ^, xor, VX_BINARY_BODY_X16)
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */
 /* { dg-final { scan-assembler {vrsub.vx} } } */
 /* { dg-final { scan-assembler {vand.vx} } } */
 /* { dg-final { scan-assembler {vor.vx} } } */
+/* { dg-final { scan-assembler {vxor.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c 
b/gcc/testsuite/gcc.target/r

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 0 with GR2VR cost 0, 2 and 15

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:6cee635f8075fb7285f3bbc00a1e8fc43f77bac5

commit 6cee635f8075fb7285f3bbc00a1e8fc43f77bac5
Author: Pan Li 
Date:   Sun May 25 17:16:09 2025 +0800

RISC-V: Add test for vec_duplicate + vxor.vv combine case 0 with GR2VR cost 
0, 2 and 15

Add asm dump check test for vec_duplicate + vxor.vv combine to vxor.vx,
with the GR2VR cost is 0, 2 and 15.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check
for vxor.vx combine.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
data for vxor run test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i8.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u8.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit 8c6f583d3d87b63c5ecace779ef359b568f7b747)

Diff:
---
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c   |   2 +
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h   | 392 +
 .../riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i16.c|  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i32.c|  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i64.c|  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i8.c |  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u16.c|  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u32.c|  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u64.c|  15 +
 .../ri

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vor.vv to vor.vx on GR2VR cost

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:be69c3922f6b95d2b263469d62b3135f2f090d8b

commit be69c3922f6b95d2b263469d62b3135f2f090d8b
Author: Pan Li 
Date:   Fri May 23 13:22:35 2025 +0800

RISC-V: Combine vec_duplicate + vor.vv to vor.vx on GR2VR cost

This patch would like to combine the vec_duplicate + vor.vv to the
vor.vx.  From example as below code.  The related pattern will depend
on the cost of vec_duplicate from GR2VR.  Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.

Assume we have example code like below, GR2VR cost is 0.

  #define DEF_VX_BINARY(T, OP)\
  void\
  test_vx_binary (T * restrict out, T * restrict in, T x, unsigned n) \
  {   \
for (unsigned i = 0; i < n; i++)  \
  out[i] = in[i] OP x;\
  }

  DEF_VX_BINARY(int32_t, |)

Before this patch:
  10   │ test_vx_binary_or_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ vsetvli a5,zero,e32,m1,ta,ma
  13   │ vmv.v.x v2,a2
  14   │ sllia3,a3,32
  15   │ srlia3,a3,32
  16   │ .L3:
  17   │ vsetvli a5,a3,e32,m1,ta,ma
  18   │ vle32.v v1,0(a1)
  19   │ sllia4,a5,2
  20   │ sub a3,a3,a5
  21   │ add a1,a1,a4
  22   │ vor.vv v1,v1,v2
  23   │ vse32.v v1,0(a0)
  24   │ add a0,a0,a4
  25   │ bne a3,zero,.L3

After this patch:
  10   │ test_vx_binary_or_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ sllia3,a3,32
  13   │ srlia3,a3,32
  14   │ .L3:
  15   │ vsetvli a5,a3,e32,m1,ta,ma
  16   │ vle32.v v1,0(a1)
  17   │ sllia4,a5,2
  18   │ sub a3,a3,a5
  19   │ add a1,a1,a4
  20   │ vor.vx v1,v1,a2
  21   │ vse32.v v1,0(a0)
  22   │ add a0,a0,a4
  23   │ bne a3,zero,.L3

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add new
case for IOR op.
(expand_vx_binary_vec_vec_dup): Ditto.
* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
* config/riscv/vector-iterators.md: Add new op or to 
no_shift_vx_ops.

Signed-off-by: Pan Li 
(cherry picked from commit 2fab99bb95db4dd47dbd07137a4c03776f476c55)

Diff:
---
 gcc/config/riscv/riscv-v.cc  | 2 ++
 gcc/config/riscv/riscv.cc| 1 +
 gcc/config/riscv/vector-iterators.md | 2 +-
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index be6147b80a2c..a6ee582f87e6 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -5534,6 +5534,7 @@ expand_vx_binary_vec_dup_vec (rtx op_0, rtx op_1, rtx 
op_2,
 {
 case PLUS:
 case AND:
+case IOR:
   icode = code_for_pred_scalar (code, mode);
   break;
 case MINUS:
@@ -5561,6 +5562,7 @@ expand_vx_binary_vec_vec_dup (rtx op_0, rtx op_1, rtx 
op_2,
 {
 case MINUS:
 case AND:
+case IOR:
   icode = code_for_pred_scalar (code, mode);
   break;
 default:
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 5c0c8beec3bd..18c8e188f23b 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3917,6 +3917,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int 
outer_code, int opno ATTRIBUTE_UN
  case PLUS:
  case MINUS:
  case AND:
+ case IOR:
{
  rtx op_0 = XEXP (x, 0);
  rtx op_1 = XEXP (x, 1);
diff --git a/gcc/config/riscv/vector-iterators.md 
b/gcc/config/riscv/vector-iterators.md
index 026be6f65d39..a50b7fde9c6d 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -4042,7 +4042,7 @@
 ])
 
 (define_code_iterator any_int_binop_no_shift_vx [
-  plus minus and
+  plus minus and ior
 ])
 
 (define_code_iterator any_int_unop [neg not])

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 0 with GR2VR cost 0, 2 and 15

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:cfb49a118d73915be9551550b3fd00ba0f622a93

commit cfb49a118d73915be9551550b3fd00ba0f622a93
Author: Pan Li 
Date:   Fri May 23 13:26:41 2025 +0800

RISC-V: Add test for vec_duplicate + vor.vv combine case 0 with GR2VR cost 
0, 2 and 15

Add asm dump check test for vec_duplicate + vor.vv combine to vor.vx,
with the GR2VR cost is 0, 2 and 15.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add test cases
for vor vx combine case 0 on GR2VR cost.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
data for vor.vx run test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vor-run-1-i16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vor-run-1-i32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vor-run-1-i64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vor-run-1-i8.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vor-run-1-u16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vor-run-1-u32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vor-run-1-u64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vor-run-1-u8.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit 2e09013aef8326b52a9bd0b4baf8cd16ebe5fece)

Diff:
---
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c   |   2 +
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h   | 392 +
 .../riscv/rvv/autovec/vx_vf/vx_vor-run-1-i16.c |  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vor-run-1-i32.c |  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vor-run-1-i64.c |  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vor-run-1-i8.c  |  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vor-run-1-u16.c |  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vor-run-1-u32.c |  15 +
 .../riscv/rvv/autovec/vx_vf/vx_vor-run-1-u64.c |  

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] shift+and+shift for logical and synthesis

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:b2e7fd2c4fa3a8a094d03d71cdb2526f2a2dcbff

commit b2e7fd2c4fa3a8a094d03d71cdb2526f2a2dcbff
Author: Shreya Munnangi 
Date:   Sat May 24 13:52:55 2025 -0600

[RISC-V] shift+and+shift for logical and synthesis

The next chunk of Shreya's work.

For this expansion we want to detect cases when the mask fits in a simm12 
after
shifting right by the number of trailing zeros in the mask.

In that case we can synthesize the AND with a shift right, andi and shift 
left.
I saw this case come up when doing some experimentation with 
mvconst_internal
removed.

This doesn't make any difference in spec right now, mvconst_internal will 
turn
the sequence back into a constant load + and with register. But Shreya and I
have reviewed the .expand dump on hand written tests and verified we're 
getting
the synthesis we want.

Tested on riscv32-elf and riscv64-elf.  Waiting on upstream CI's verdict 
before
moving forward.

gcc/
* config/riscv/riscv.cc (synthesize_and): Use a srl+andi+sll
sequence when the mask fits in a simm12 after shifting by the
number of trailing zeros.

Co-authored-by: Jeff Law 

(cherry picked from commit 2e2557d160cc0b893a7bcad1bee1683ad948dc60)

Diff:
---
 gcc/config/riscv/riscv.cc | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 18c8e188f23b..eaaca3649835 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -14563,6 +14563,36 @@ synthesize_and (rtx operands[3])
   return true;
 }
 
+  /* If we shift right to eliminate the trailing zeros and
+ the result is a SMALL_OPERAND, then it's a shift right,
+ andi and shift left.  */
+  t = INTVAL (operands[2]);
+  t >>= ctz_hwi (t);
+  if (budget >= 3 && SMALL_OPERAND (t) && popcount_hwi (t) > 2)
+{
+  /* Shift right to clear the low order bits.  */
+  unsigned HOST_WIDE_INT count = ctz_hwi (INTVAL (operands[2]));
+  rtx x = gen_rtx_LSHIFTRT (word_mode, operands[1], GEN_INT (count));
+  output = gen_reg_rtx (word_mode);
+  emit_insn (gen_rtx_SET (output, x));
+  input = output;
+
+  /* Now emit the ANDI.  */
+  unsigned HOST_WIDE_INT mask = INTVAL (operands[2]);
+  mask >>= ctz_hwi (mask);
+  x = gen_rtx_AND (word_mode, input, GEN_INT (mask));
+  output = gen_reg_rtx (word_mode);
+  emit_insn (gen_rtx_SET (output, x));
+  input = output;
+
+  /* Shift left to move bits into position.  */
+  count = INTVAL (operands[2]);
+  count = ctz_hwi (count);
+  x = gen_rtx_ASHIFT (word_mode, input, GEN_INT (count));
+  emit_insn (gen_rtx_SET (operands[0], x));
+  return true;
+}
+
   /* If there are all zeros, except for a run of 1s somewhere in the middle
  of the constant, then this is at worst 3 shifts.  */
   t = INTVAL (operands[2]);

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 1 with GR2VR cost 0, 1 and 2

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:aba64354a5abf4a965d85c4150c4ecbfd6c16066

commit aba64354a5abf4a965d85c4150c4ecbfd6c16066
Author: Pan Li 
Date:   Fri May 23 13:29:32 2025 +0800

RISC-V: Add test for vec_duplicate + vor.vv combine case 1 with GR2VR cost 
0, 1 and 2

Add asm dump check test for vec_duplicate + vor.vv combine to vor.vx,
with the GR2VR cost is 0, 1 and 2.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check
for vor.vx combine.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c: Ditto.

Signed-off-by: Pan Li 
(cherry picked from commit 736ae0a005d21230b141e9eb94cfd61032f8db19)

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c  | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c | 2 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c  | 2 ++
 24 files changed, 48 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
index 62fd4e39c018..ffad2a27f921 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
@@ -9,8 +9,10 @@ DEF_VX_BINARY_CASE_1_WRAP(T, +, add, VX_BINARY_BODY_X16)
 DEF_VX_BINARY_CASE_1_WRAP(T, -, sub, VX_BINARY_BODY_X16)
 DEF_VX_BINARY_REVERSE_CASE_1_WRAP(T, -, rsub, VX_BINARY_REVERSE_BODY_X16)
 DEF_VX_BINARY_CASE_1_WRAP(T, &, and, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1_WRAP(T, |, or, VX_BINARY_BODY_X16)
 
 /* { dg-final { scan-assembler {vadd.vx} } } */
 /* { dg-final { scan-assembler {vsub.vx} } } */
 /* { dg-final { scan-assembler {vrsub.vx} } } */
 /* { dg-final { scan-assembler {vand.vx} } } */
+/* { dg-final { scan-assembler {vor.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
index d047458b81d0..2

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support CPUs in -march.

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:736bdd7569f4775e19e1256ac6bb565636f93dee

commit 736bdd7569f4775e19e1256ac6bb565636f93dee
Author: Robin Dapp 
Date:   Thu May 8 09:51:45 2025 +0200

RISC-V: Support CPUs in -march.

This patch allows an -march string like

  -march=sifive-p670

in order override a previous -march in a simple way.

Suppose we have a Makefile that specifies -march=rv64gc by default.
A user-specified -mcpu=sifive-p670 would be after the -march in the
options string and thus only set -mtune=sifive-p670 (as -mcpu does not
override a previously specified -march or -mtune).

So if we wanted to override we would need to specify the full, lengthy
-march=rv64gcv_... string instead of a simple -mcpu=...

Therefore this patch always first tries to interpret -march= as CPU
string.  If it is a supported CPU we use its march properties and let it
override previously specified options.  Otherwise the behavior is as
before.  This enables the "last-specified option wins" behavior GCC
normally employs.

Note that -march does not imply -mtune like on x86 or other targets.
So an -march=CPU won't override a previously specified -mtune=other-CPU.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc 
(riscv_subset_list::parse_base_ext):
Adjust error message.
(riscv_handle_option): Parse as CPU string first.
(riscv_expand_arch): Ditto.
* doc/invoke.texi: Document.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-56.c: New test.

(cherry picked from commit 4a182418c89666e7594bcb0e5edc5194aa147910)

Diff:
---
 gcc/common/config/riscv/riscv-common.cc  | 19 ---
 gcc/doc/invoke.texi  |  2 +-
 gcc/testsuite/gcc.target/riscv/arch-56.c | 13 +
 3 files changed, 26 insertions(+), 8 deletions(-)

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index c843393998cb..a6d8763f032b 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -980,8 +980,9 @@ riscv_subset_list::parse_base_ext (const char *p)
 }
   else
 {
-  error_at (m_loc, "%<-march=%s%>: ISA string must begin with rv32, rv64 "
-   "or Profiles", m_arch);
+  error_at (m_loc, "%<-march=%s%>: ISA string must begin with rv32, rv64,"
+   " a supported RVA profile or refer to a supported CPU",
+   m_arch);
   return NULL;
 }
 
@@ -1708,7 +1709,8 @@ riscv_handle_option (struct gcc_options *opts,
   switch (decoded->opt_index)
 {
 case OPT_march_:
-  riscv_parse_arch_string (decoded->arg, opts, loc);
+  if (riscv_find_cpu (decoded->arg) == NULL)
+   riscv_parse_arch_string (decoded->arg, opts, loc);
   return true;
 
 case OPT_mcpu_:
@@ -1725,15 +1727,18 @@ riscv_handle_option (struct gcc_options *opts,
 /* Expand arch string with implied extensions.  */
 
 const char *
-riscv_expand_arch (int argc ATTRIBUTE_UNUSED,
+riscv_expand_arch (int argc,
   const char **argv)
 {
   gcc_assert (argc == 1);
   location_t loc = UNKNOWN_LOCATION;
-  riscv_parse_arch_string (argv[0], NULL, loc);
+  /* Try to interpret the arch as CPU first.  */
+  const char *arch_str = riscv_expand_arch_from_cpu (argc, argv);
+  if (!strlen (arch_str))
+riscv_parse_arch_string (argv[0], NULL, loc);
   const std::string arch = riscv_arch_str (false);
-  if (arch.length())
-return xasprintf ("-march=%s", arch.c_str());
+  if (arch.length ())
+return xasprintf ("-march=%s", arch.c_str ());
   else
 return "";
 }
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index c98c2532c18a..cfcb4b3cf978 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1267,7 +1267,7 @@ See RS/6000 and PowerPC Options.
 -mfence-tso  -mno-fence-tso
 -mdiv  -mno-div
 -misa-spec=@var{ISA-spec-string}
--march=@var{ISA-string|Profiles|Profiles_ISA-string}
+-march=@var{ISA-string|Profiles|Profiles_ISA-string|CPU/processor string}
 -mtune=@var{processor-string}
 -mpreferred-stack-boundary=@var{num}
 -msmall-data-limit=@var{N-bytes}
diff --git a/gcc/testsuite/gcc.target/riscv/arch-56.c 
b/gcc/testsuite/gcc.target/riscv/arch-56.c
new file mode 100644
index ..e075f9661eef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-56.c
@@ -0,0 +1,13 @@
+/* Check whether the second -march overrides the first.  */
+/* { dg-do compile { target rv64 } } */
+/* { dg-options "-O3 -march=rv64gc -march=sifive-p670" } */
+
+void
+foo (char *a, char *b, int n)
+{
+  for (int i = 0; i < n; i++)
+a[i] = b[i] + 1;
+}
+
+/* { dg-final { scan-assembler "vset" } } */
+/* { dg-final { scan-assembler "zvl128b" } } */

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vxor.vv to vxor.vx on GR2VR cost

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:9b0d303b9d02e149d4438001d2eff96d2c077b33

commit 9b0d303b9d02e149d4438001d2eff96d2c077b33
Author: Pan Li 
Date:   Sun May 25 17:13:09 2025 +0800

RISC-V: Combine vec_duplicate + vxor.vv to vxor.vx on GR2VR cost

This patch would like to combine the vec_duplicate + vxor.vv to the
vxor.vx.  From example as below code.  The related pattern will depend
on the cost of vec_duplicate from GR2VR.  Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.

Assume we have example code like below, GR2VR cost is 0.

  #define DEF_VX_BINARY(T, OP)\
  void\
  test_vx_binary (T * restrict out, T * restrict in, T x, unsigned n) \
  {   \
for (unsigned i = 0; i < n; i++)  \
  out[i] = in[i] OP x;\
  }

  DEF_VX_BINARY(int32_t, |)

Before this patch:
  10   │ test_vx_binary_or_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ vsetvli a5,zero,e32,m1,ta,ma
  13   │ vmv.v.x v2,a2
  14   │ sllia3,a3,32
  15   │ srlia3,a3,32
  16   │ .L3:
  17   │ vsetvli a5,a3,e32,m1,ta,ma
  18   │ vle32.v v1,0(a1)
  19   │ sllia4,a5,2
  20   │ sub a3,a3,a5
  21   │ add a1,a1,a4
  22   │ vxor.vv v1,v1,v2
  23   │ vse32.v v1,0(a0)
  24   │ add a0,a0,a4
  25   │ bne a3,zero,.L3

After this patch:
  10   │ test_vx_binary_or_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ sllia3,a3,32
  13   │ srlia3,a3,32
  14   │ .L3:
  15   │ vsetvli a5,a3,e32,m1,ta,ma
  16   │ vle32.v v1,0(a1)
  17   │ sllia4,a5,2
  18   │ sub a3,a3,a5
  19   │ add a1,a1,a4
  20   │ vxor.vx v1,v1,a2
  21   │ vse32.v v1,0(a0)
  22   │ add a0,a0,a4
  23   │ bne a3,zero,.L3

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add
new case for XOR op.
(expand_vx_binary_vec_vec_dup): Diito.
* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
* config/riscv/vector-iterators.md: Add new op or to 
no_shift_vx_ops.

Signed-off-by: Pan Li 
(cherry picked from commit df691d8de1f4ea21763ca579bc6fb1fab38512da)

Diff:
---
 gcc/config/riscv/riscv-v.cc  | 2 ++
 gcc/config/riscv/riscv.cc| 1 +
 gcc/config/riscv/vector-iterators.md | 2 +-
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index a6ee582f87e6..eedcda2b8ff5 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -5535,6 +5535,7 @@ expand_vx_binary_vec_dup_vec (rtx op_0, rtx op_1, rtx 
op_2,
 case PLUS:
 case AND:
 case IOR:
+case XOR:
   icode = code_for_pred_scalar (code, mode);
   break;
 case MINUS:
@@ -5563,6 +5564,7 @@ expand_vx_binary_vec_vec_dup (rtx op_0, rtx op_1, rtx 
op_2,
 case MINUS:
 case AND:
 case IOR:
+case XOR:
   icode = code_for_pred_scalar (code, mode);
   break;
 default:
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index eaaca3649835..87f20528aebe 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3918,6 +3918,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int 
outer_code, int opno ATTRIBUTE_UN
  case MINUS:
  case AND:
  case IOR:
+ case XOR:
{
  rtx op_0 = XEXP (x, 0);
  rtx op_1 = XEXP (x, 1);
diff --git a/gcc/config/riscv/vector-iterators.md 
b/gcc/config/riscv/vector-iterators.md
index a50b7fde9c6d..77d72a78c1be 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -4042,7 +4042,7 @@
 ])
 
 (define_code_iterator any_int_binop_no_shift_vx [
-  plus minus and ior
+  plus minus and ior xor
 ])
 
 (define_code_iterator any_int_unop [neg not])

[gcc r16-1187] c++: quadratic constexpr folding of arith expr [PR118340]

[Patrick Palka via Gcc-cvs]

https://gcc.gnu.org/g:e71c0157478e49188cd754693dcc2059d63573e9

commit r16-1187-ge71c0157478e49188cd754693dcc2059d63573e9
Author: Patrick Palka 
Date:   Thu Jun 5 11:06:04 2025 -0400

c++: quadratic constexpr folding of arith expr [PR118340]

Here the PR's testcase demonstrates that the cp_fully_fold calls in
cp_build_binary_op (for diagnosing arithmetic overflow) lead to
quadratic behavior when building up a large arithmetic constant
expression.  The problem is ultimately that maybe_constant_value's
caching doesn't reuse intermediate values, unlike cp_fold.  (And
unfortunately we can't leverage the cp_fold cache in this call site
because here we want to evaluate constexpr calls even in -O0, which
cp_fold avoids.)

This patch fixes this by making maybe_constant_value look up each
operand of the given expression to see if we've previously reduced it,
and if so, rebuild the expression using the (presumably) reduced
operands and evaluate that.  After this patch each version of the
testcase from the PR compiles in ~0.1s on my machine.

PR c++/118340

gcc/cp/ChangeLog:

* constexpr.cc (maybe_constant_value): First try looking up each
operand in the cv_cache and reusing the result.

Reviewed-by: Jason Merrill 

Diff:
---
 gcc/cp/constexpr.cc | 33 -
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc
index c0e37b2fd35c..707883955b10 100644
--- a/gcc/cp/constexpr.cc
+++ b/gcc/cp/constexpr.cc
@@ -9488,8 +9488,35 @@ tree
 maybe_constant_value (tree t, tree decl /* = NULL_TREE */,
  mce_value manifestly_const_eval /* = mce_unknown */)
 {
+  tree orig_t = t;
   tree r;
 
+  if (EXPR_P (t) && manifestly_const_eval == mce_unknown)
+{
+  /* Look up each operand in the cv_cache first to see if we've already
+reduced it, and reuse that result to avoid quadratic behavior if
+we're called when building up a large expression.  */
+  int n = cp_tree_operand_length (t);
+  tree *ops = XALLOCAVEC (tree, n);
+  bool rebuild = false;
+  for (int i = 0; i < n; ++i)
+   {
+ ops[i] = TREE_OPERAND (t, i);
+ if (tree *cached = hash_map_safe_get (cv_cache, ops[i]))
+   if (*cached != ops[i])
+ {
+   ops[i] = *cached;
+   rebuild = true;
+ }
+   }
+  if (rebuild)
+   {
+ t = copy_node (t);
+ for (int i = 0; i < n; ++i)
+   TREE_OPERAND (t, i) = ops[i];
+   }
+}
+
   if (!is_nondependent_constant_expression (t))
 {
   if (TREE_OVERFLOW_P (t)
@@ -9507,6 +9534,10 @@ maybe_constant_value (tree t, tree decl /* = NULL_TREE 
*/,
 return fold_to_constant (t);
 
   if (manifestly_const_eval != mce_unknown)
+/* TODO: Extend the cache to be mce_value aware.  And if we have a
+   previously cached mce_unknown result that's TREE_CONSTANT, it means
+   the reduced value is independent of mce_value and so we should
+   be able to reuse it in the mce_true/false case.  */
 return cxx_eval_outermost_constant_expr (t, true, true,
 manifestly_const_eval, false, 
decl);
 
@@ -9536,7 +9567,7 @@ maybe_constant_value (tree t, tree decl /* = NULL_TREE */,
   || (TREE_CONSTANT (t) && !TREE_CONSTANT (r))
   || !cp_tree_equal (r, t));
   if (!c.evaluation_restricted_p ())
-cv_cache->put (t, r);
+cv_cache->put (orig_t, r);
   return r;
 }

[gcc r13-9741] Fix crash with constant initializer caused by IPA

[Eric Botcazou via Gcc-cvs]

https://gcc.gnu.org/g:195c76fb53c7c751c25b864bef255c7ee1195f07

commit r13-9741-g195c76fb53c7c751c25b864bef255c7ee1195f07
Author: Eric Botcazou 
Date:   Thu Jun 5 13:20:26 2025 +0200

Fix crash with constant initializer caused by IPA

The testcase compiled with -O2 -gnatn makes the compiler crash in
vect_can_force_dr_alignment_p during SLP vectorization:

  if (decl_in_symtab_p (decl)
  && !symtab_node::get (decl)->can_increase_alignment_p ())
return false;

because symtab_node::get (decl) returns a null node.  The phenomenon occurs
for a pair of twin symbols listed like so in .cgraph:

Opt7_Pkg.T12b/17 (Opt7_Pkg.T12b)
  Type: variable definition analyzed
  Visibility: semantic_interposition external public artificial
  Aux: @0x44d45e0
  References:
  Referring: opt7_pkg__enum_name_table/13 (addr) 
opt7_pkg__enum_name_table/13
(addr)
  Availability: not-ready
  Varpool flags: initialized read-only const-value-known

Opt7_Pkg.T8b/16 (Opt7_Pkg.T8b)
  Type: variable definition analyzed
  Visibility: semantic_interposition external public artificial
  Aux: @0x7f9fda3fff00
  References:
  Referring: opt7_pkg__enum_name_table/13 (addr) 
opt7_pkg__enum_name_table/13
(addr)
  Availability: not-ready
  Varpool flags: initialized read-only const-value-known

with:

opt7_pkg__enum_name_table/13 (Opt7_Pkg.Enum_Name_Table)
  Type: variable definition analyzed
  Visibility: semantic_interposition external public
  Aux: @0x44d45e0
  References: Opt7_Pkg.T8b/16 (addr) Opt7_Pkg.T8b/16 (addr) Opt7_Pkg.T12b/17
(addr) Opt7_Pkg.T12b/17 (addr)
  Referring: opt7_pkg__image/2 (read) opt7_pkg__image/2 (read)
opt7_pkg__image/2 (read) opt7_pkg__image/2 (read) opt7_pkg__image/2 (read)
opt7_pkg__image/2 (read) opt7_pkg__image/2 (read) opt7_pkg__image/2 (read)
  Availability: not-ready
  Varpool flags: initialized read-only const-value-known

being the crux of the matter.

What happens is that symtab_remove_unreachable_nodes leaves the last symbol
in kind of a limbo state: in .remove_symbols, we have:

opt7_pkg__enum_name_table/13 (Opt7_Pkg.Enum_Name_Table)
  Type: variable
  Body removed by symtab_remove_unreachable_nodes
  Visibility: externally_visible semantic_interposition external public
  References:
  Referring: opt7_pkg__image/2 (read) opt7_pkg__image/2 (read)
  Availability: not_available
  Varpool flags: initialized read-only const-value-known

This means that the "body" (DECL_INITIAL) of the symbol has been disregarded
during reachability analysis, causing the first two symbols to be discarded:

Reclaiming variables: Opt7_Pkg.T12b/17 Opt7_Pkg.T8b/16

but the DECL_INITIAL is explicitly preserved for later constant folding,
which makes it possible to retrofit the DECLs corresponding to the first
two symbols in the GIMPLE IR and ultimately leads to the crash.

gcc/
* tree-vect-data-refs.cc (vect_can_force_dr_alignment_p): Return
false if the variable has no symtab node.

gcc/testsuite/
* gnat.dg/specs/opt7.ads: New test.
* gnat.dg/specs/opt7_pkg.ads: New helper.
* gnat.dg/specs/opt7_pkg.adb: Likewise.

Diff:
---
 gcc/testsuite/gnat.dg/specs/opt7.ads | 15 +++
 gcc/testsuite/gnat.dg/specs/opt7_pkg.adb | 15 +++
 gcc/testsuite/gnat.dg/specs/opt7_pkg.ads |  9 +
 gcc/tree-vect-data-refs.cc   |  3 ++-
 4 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gnat.dg/specs/opt7.ads 
b/gcc/testsuite/gnat.dg/specs/opt7.ads
new file mode 100644
index ..ee151f082a88
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/specs/opt7.ads
@@ -0,0 +1,15 @@
+-- { dg-do compile }
+-- { dg-options "-O2 -gnatn" }
+
+with Opt7_Pkg; use Opt7_Pkg;
+
+package Opt7 is
+
+  type Rec is record
+E : Enum;
+  end record;
+
+  function Image (R : Rec) return String is
+(if R.E = A then Image (R.E) else "");
+
+end Opt7;
diff --git a/gcc/testsuite/gnat.dg/specs/opt7_pkg.adb 
b/gcc/testsuite/gnat.dg/specs/opt7_pkg.adb
new file mode 100644
index ..1c9d79bb8721
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/specs/opt7_pkg.adb
@@ -0,0 +1,15 @@
+package body Opt7_Pkg is
+
+  type Constant_String_Access is access constant String;
+
+  type Enum_Name is array (Enum) of Constant_String_Access;
+
+  Enum_Name_Table : constant Enum_Name :=
+(A => new String'("A"), B => new String'("B"));
+
+  function Image (E : Enum) return String is
+  begin
+return Enum_Name_Table (E).all;
+  end Image;
+
+end Opt7_Pkg;
diff --git a/gcc/testsuite/gnat.dg/specs/opt7_pkg.ads 
b/gcc/testsuite/gnat.dg/specs/opt7_pkg.ads
new file mode 100644
index ..2dd271b63adb
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/specs/opt7_pkg.ads
@@ -0,0 +1,9 @@

[gcc r13-9740] Bump BASE-VER.

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:500b22d867605421113f593ef85a79ec394006ba

commit r13-9740-g500b22d867605421113f593ef85a79ec394006ba
Author: Jakub Jelinek 
Date:   Thu Jun 5 18:50:16 2025 +0200

Bump BASE-VER.

2025-06-05  Jakub Jelinek  

* BASE-VER: Set to 13.4.1.

Diff:
---
 gcc/BASE-VER | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/BASE-VER b/gcc/BASE-VER
index 74302c5119c9..c27905ac3dc9 100644
--- a/gcc/BASE-VER
+++ b/gcc/BASE-VER
@@ -1 +1 @@
-13.4.0
+13.4.1

[gcc r13-9742] libstdc++: fix compile error when converting std::weak_ptr

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:6e8dcc0aa0ba5de2c44ceeb7bc2323def4724cd1

commit r13-9742-g6e8dcc0aa0ba5de2c44ceeb7bc2323def4724cd1
Author: Giuseppe D'Angelo 
Date:   Tue Dec 10 00:56:13 2024 +0100

libstdc++: fix compile error when converting std::weak_ptr

A std::weak_ptr can be converted to a compatible
std::weak_ptr. This is implemented by having suitable converting
constructors to std::weak_ptr which dispatch to the __weak_ptr base
class (implementation detail).

In __weak_ptr, lock() is supposed to return a __shared_ptr,
not a __shared_ptr (that is, __shared_ptr).

Unfortunately the return type of lock() and the type of the returned
__shared_ptr were mismatching and that was causing a compile error: when
converting a __weak_ptr to a __weak_ptr through __weak_ptr's
converting constructor, the code calls lock(), and that simply fails to
build.

Fix it by removing the usage of element_type inside lock(), and using
_Tp instead.

Note that std::weak_ptr::lock() itself was already correct; the one in
__weak_ptr was faulty (and that is the one called by __weak_ptr's
converting constructors).

libstdc++-v3/ChangeLog:

* include/bits/shared_ptr_base.h (lock): Fixed a compile error
when calling lock() on a weak_ptr, by removing an
erroneous usage of element_type from within lock().
* 
testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc:
Add more tests for array types.
* 
testsuite/20_util/weak_ptr/requirements/explicit_instantiation/1.cc:
Likewise.
* testsuite/20_util/shared_ptr/requirements/1.cc: New test.
* testsuite/20_util/weak_ptr/requirements/1.cc: New test.

(cherry picked from commit df0e6509bf74421ea68a2e025300bcd6ca63722f)

Diff:
---
 libstdc++-v3/include/bits/shared_ptr_base.h|  2 +-
 .../testsuite/20_util/shared_ptr/requirements/1.cc | 33 ++
 .../requirements/explicit_instantiation/1.cc   | 12 
 .../testsuite/20_util/weak_ptr/requirements/1.cc   | 33 ++
 .../requirements/explicit_instantiation/1.cc   | 12 
 5 files changed, 91 insertions(+), 1 deletion(-)

diff --git a/libstdc++-v3/include/bits/shared_ptr_base.h 
b/libstdc++-v3/include/bits/shared_ptr_base.h
index 2c948d5b8384..d300adfcc4af 100644
--- a/libstdc++-v3/include/bits/shared_ptr_base.h
+++ b/libstdc++-v3/include/bits/shared_ptr_base.h
@@ -2065,7 +2065,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   __shared_ptr<_Tp, _Lp>
   lock() const noexcept
-  { return __shared_ptr(*this, std::nothrow); }
+  { return __shared_ptr<_Tp, _Lp>(*this, std::nothrow); }
 
   long
   use_count() const noexcept
diff --git a/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/1.cc 
b/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/1.cc
new file mode 100644
index ..8ddb5d220ac7
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/1.cc
@@ -0,0 +1,33 @@
+// { dg-do compile { target c++11 } }
+// { dg-require-effective-target hosted }
+
+#include 
+#include 
+
+using namespace __gnu_test;
+
+void
+test01()
+{
+  std::shared_ptr ptr;
+  std::shared_ptr ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+  std::shared_ptr ptr_array;
+  std::shared_ptr ptr_array2 = ptr_array;
+  std::shared_ptr ptr_array3 = ptr_array;
+#endif
+}
+
+void
+test02()
+{
+  std::shared_ptr ptr;
+  std::shared_ptr ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+  std::shared_ptr ptr_array;
+  std::shared_ptr ptr_array2 = ptr_array;
+  std::shared_ptr ptr_array3 = ptr_array;
+#endif
+}
diff --git 
a/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc
 
b/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc
index 03d2fe10d484..892dd6e8f1e4 100644
--- 
a/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc
+++ 
b/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc
@@ -28,3 +28,15 @@ template class std::shared_ptr;
 template class std::shared_ptr;
 template class std::shared_ptr;
 template class std::shared_ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+template class std::shared_ptr;
+template class std::shared_ptr;
+template class std::shared_ptr;
+template class std::shared_ptr;
+
+template class std::shared_ptr;
+template class std::shared_ptr;
+template class std::shared_ptr;
+template class std::shared_ptr;
+#endif
diff --git a/libstdc++-v3/testsuite/20_util/weak_ptr/requirements/1.cc 
b/libstdc++-v3/testsuite/20_util/weak_ptr/requirements/1.cc
new file mode 100644
index ..04ea837d85a7
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/weak_ptr/requirements/1.cc
@@ -0,0 +1,33 @@
+// { dg-do compile { target c++11 } }
+// { dg-require-effective-target hosted }
+
+#include 
+#includ

[gcc r13-9743] c++: lambda this capture and requires [PR120123]

[Jason Merrill via Gcc-cvs]

https://gcc.gnu.org/g:561607ff94a9c602de3cb6c09518a72c7ad6160f

commit r13-9743-g561607ff94a9c602de3cb6c09518a72c7ad6160f
Author: Jason Merrill 
Date:   Fri May 30 18:27:45 2025 -0400

c++: lambda this capture and requires [PR120123]

We shouldn't need to be within the lambda body to look through it to the
enclosing non-static member function.

This change is a small subset of r16-970.

PR c++/120123

gcc/cp/ChangeLog:

* lambda.cc (nonlambda_method_basetype): Look through lambdas
even when current_class_ref is null.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-lambda24.C: New test.

Diff:
---
 gcc/cp/lambda.cc   |  5 +
 gcc/testsuite/g++.dg/cpp2a/concepts-lambda24.C | 13 +
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/gcc/cp/lambda.cc b/gcc/cp/lambda.cc
index 9925209b2ed0..ce2bcbe9a7fe 100644
--- a/gcc/cp/lambda.cc
+++ b/gcc/cp/lambda.cc
@@ -975,12 +975,9 @@ current_nonlambda_function (void)
 tree
 nonlambda_method_basetype (void)
 {
-  if (!current_class_ref)
-return NULL_TREE;
-
   tree type = current_class_type;
   if (!type || !LAMBDA_TYPE_P (type))
-return type;
+return current_class_ref ? type : NULL_TREE;
 
   while (true)
 {
diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-lambda24.C 
b/gcc/testsuite/g++.dg/cpp2a/concepts-lambda24.C
new file mode 100644
index ..28f56ca2335e
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp2a/concepts-lambda24.C
@@ -0,0 +1,13 @@
+// PR c++/120123
+// { dg-do compile { target c++20 } }
+
+struct H {
+void member(int) {}
+void call() {
+[this]() {
+[this](const auto& v)
+requires requires { /*this->*/member(v); }
+{ return member(v); }(0);
+};
+}
+};

[gcc r16-1195] doc: update links to c99status.html

[Marek Polacek via Gcc-cvs]

https://gcc.gnu.org/g:a27540cf24368aa377fa33f1055432d8ae68f6a6

commit r16-1195-ga27540cf24368aa377fa33f1055432d8ae68f6a6
Author: Marek Polacek 
Date:   Thu Jun 5 15:50:45 2025 -0400

doc: update links to c99status.html

gcc/ChangeLog:

* doc/invoke.texi: Update a link to c99status.html.
* doc/standards.texi: Likewise.

Diff:
---
 gcc/doc/invoke.texi| 4 ++--
 gcc/doc/standards.texi | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 8de00854a05e..f943d3a70aa7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -2440,8 +2440,8 @@ ISO C99.  This standard is substantially completely 
supported, modulo
 bugs and floating-point issues
 (mainly but not entirely relating to optional C99 features from
 Annexes F and G).  See
-@w{@uref{https://gcc.gnu.org/c99status.html}} for more information.  The
-names @samp{c9x} and @samp{iso9899:199x} are deprecated.
+@w{@uref{https://gcc.gnu.org/projects/c-status.html}} for more information.
+The names @samp{c9x} and @samp{iso9899:199x} are deprecated.
 
 @item c11
 @itemx c1x
diff --git a/gcc/doc/standards.texi b/gcc/doc/standards.texi
index 011f7e292079..0d765b17aa2a 100644
--- a/gcc/doc/standards.texi
+++ b/gcc/doc/standards.texi
@@ -96,8 +96,8 @@ A new edition of the ISO C standard was published in 1999 as 
ISO/IEC
 development, drafts of this standard version were referred to as
 @dfn{C9X}.)  GCC has substantially
 complete support for this standard version; see
-@uref{https://gcc.gnu.org/c99status.html} for details.  To select this
-standard, use @option{-std=c99} or @option{-std=iso9899:1999}.  
+@uref{https://gcc.gnu.org/projects/c-status.html} for details.  To select
+this standard, use @option{-std=c99} or @option{-std=iso9899:1999}.
 
 Errors in the 1999 ISO C standard were corrected in three Technical
 Corrigenda published in 2001, 2004 and 2007.  GCC does not support the

[gcc r16-1196] [i386] Improve "movcc" expander for DImode immediates [PR120553]

[Uros Bizjak via Gcc-cvs]

https://gcc.gnu.org/g:ed57e5de634eda91f32e0e61724d8f103ef648dd

commit r16-1196-ged57e5de634eda91f32e0e61724d8f103ef648dd
Author: Uros Bizjak 
Date:   Thu Jun 5 22:53:35 2025 +0200

[i386] Improve "movcc" expander for DImode immediates [PR120553]

"movcc" expander uses x86_64_general_operand predicate that limits the
range of immediate operands to 32-bit size.  The usage of this predicate
causes ifcvt to force out-of-range immediates to registers when converting
through noce_try_cmove.  The testcase:

long long foo (long long c) { return c >= 0 ? 0x4ll : -1ll; }

compiles (-O2) to:

foo:
testq   %rdi, %rdi
movq$-1, %rax
movabsq $0x4, %rdx
cmovns  %rdx, %rax
ret

The above testcase can be compiled to a more optimized code without
problematic CMOV instruction if 64-bit immediates are allowed in
"movcc" expander:

foo:
movq%rdi, %rax
sarq$63, %rax
btsq$34, %rax
ret

The expander calls the ix86_expand_int_movcc function which internally
sanitizes arguments of emitted logical insns using expand_simple_binop.
The out-of-range immediates are forced to a temporary register just
before the instruction, so the instruction combiner is then able to
synthesize 64-bit BTS instruction.

The code improves even for non-exact-log2 64-bit immediates, e.g.

long long foo (long long c) { return c >= 0 ? 0x41234ll : -1ll; }

that now compiles to:

foo:
movabsq $0x41234, %rdx
movq%rdi, %rax
sarq$63, %rax
orq %rdx, %rax
ret

again avoiding problematic CMOV instruction.

PR target/120553

gcc/ChangeLog:

* config/i386/i386.md (movcc): Use "general_operand"
predicate for operands 2 and 3 for all modes.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr120553.c: New test.

Diff:
---
 gcc/config/i386/i386.md  | 4 ++--
 gcc/testsuite/gcc.target/i386/pr120553.c | 6 ++
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 40b43cf092ac..8eee44756eba 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -26478,8 +26478,8 @@
 (define_expand "movcc"
   [(set (match_operand:SWIM 0 "register_operand")
(if_then_else:SWIM (match_operand 1 "comparison_operator")
-  (match_operand:SWIM 2 "")
-  (match_operand:SWIM 3 "")))]
+  (match_operand:SWIM 2 "general_operand")
+  (match_operand:SWIM 3 "general_operand")))]
   ""
   "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;")
 
diff --git a/gcc/testsuite/gcc.target/i386/pr120553.c 
b/gcc/testsuite/gcc.target/i386/pr120553.c
new file mode 100644
index ..abbf58c67223
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr120553.c
@@ -0,0 +1,6 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2" } */
+
+long long foo (long long c) { return c >= 0 ? 0x4ll : -1ll; }
+
+/* { dg-final { scan-assembler "bts" } } */

[gcc r16-1128] tree-sra: Use MOVE_MAX for sra size limit [PR112824]

[Hongyu Wang via Gcc-cvs]

https://gcc.gnu.org/g:2d4312bca252738f81528623d36b45a1eae4321c

commit r16-1128-g2d4312bca252738f81528623d36b45a1eae4321c
Author: Hongyu Wang 
Date:   Thu Jun 5 14:45:08 2025 +0800

tree-sra: Use MOVE_MAX for sra size limit [PR112824]

Current sra use UNITS_PER_WORD to define max scalarization size, but
for targets like x86 it allows operations on larger size, so the
components like vector variables in an aggregate can be larger than
just UNITS_PER_WORD. Use MOVE_MAX instead of UNITS_PER_WORD to allow
sra for aggregates with vector components.

gcc/ChangeLog:

PR middle-end/112824
* tree-sra.cc (sra_get_max_scalarization_size): Use MOVE_MAX
instead of UNITS_PER_WORD to define max_scalarization_size.

gcc/testsuite/ChangeLog:

* g++.target/i386/pr112824-2.C: New test.

Diff:
---
 gcc/testsuite/g++.target/i386/pr112824-2.C | 10 ++
 gcc/tree-sra.cc|  2 +-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/g++.target/i386/pr112824-2.C 
b/gcc/testsuite/g++.target/i386/pr112824-2.C
new file mode 100644
index ..036a47b7280f
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr112824-2.C
@@ -0,0 +1,10 @@
+/* PR target/112824 */
+/* { dg-do compile } */
+/* { dg-options "-std=c++23 -O3 -march=skylake-avx512 
-mprefer-vector-width=512" } */
+/* { dg-final { scan-assembler-not "vmov.*\[ \\t\]+\[^\n\]*%rsp" } } */
+
+#include "pr112824-1.C"
+
+void prod(Dual,2> &c, const Dual,2> &a, const 
Dual,2>&b){
+c = a*b;
+}
diff --git a/gcc/tree-sra.cc b/gcc/tree-sra.cc
index 4b6daf772841..23236fc65377 100644
--- a/gcc/tree-sra.cc
+++ b/gcc/tree-sra.cc
@@ -3760,7 +3760,7 @@ sra_get_max_scalarization_size (void)
   /* If the user didn't set PARAM_SRA_MAX_SCALARIZATION_SIZE_<...>,
  fall back to a target default.  */
   unsigned HOST_WIDE_INT max_scalarization_size
-= get_move_ratio (optimize_speed_p) * UNITS_PER_WORD;
+= get_move_ratio (optimize_speed_p) * MOVE_MAX;
 
   if (optimize_speed_p)
 {

[gcc r16-1152] ada: Implement built-in-place expansion of two-pass array aggregates

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:9d7bdc266174b3e477dd51818e095cdf149eb2d1

commit r16-1152-g9d7bdc266174b3e477dd51818e095cdf149eb2d1
Author: Eric Botcazou 
Date:   Fri Jan 24 10:26:13 2025 +0100

ada: Implement built-in-place expansion of two-pass array aggregates

These are array aggregates containing only component associations that are
iterated with iterator specifications, as per RM 4.3.3(20.2/5-20.4/5).

It is implemented for the array aggregates that are used to initialize an
object, as specified by RM 7.6(17.2/3-17.3/3) for immutably limited types
and types that need finalization, but for all types like other aggregates.

gcc/ada/ChangeLog:

* exp_aggr.adb (Build_Two_Pass_Aggr_Code): New function containing
most of the code initially present in Two_Pass_Aggregate_Expansion.
(Two_Pass_Aggregate_Expansion): Remove redundant N parameter.
Implement built-in-place expansion for (static) object declarations
and allocators, using Build_Two_Pass_Aggr_Code for the main work.
(Expand_Array_Aggregate): Adjust Two_Pass_Aggregate_Expansion call.
Replace Etype (N) by Typ in a couple of places.
* exp_ch3.adb (Expand_Freeze_Array_Type): Remove special case for
two-pass array aggregates.
(Expand_N_Object_Declaration): Do not adjust the object when it is
initialized by a two-pass array aggregate.
* exp_ch4.adb (Expand_Allocator_Expression): Apply the processing
used for container aggregates to two-pass array aggregates.
* exp_ch6.adb (Validate_Subprogram_Calls): Skip calls present in
initialization expressions of N_Object_Declaration nodes that have
No_Initialization set.
* sem_ch3.adb (Analyze_Object_Declaration): Detect the cases of an
array originally initialized by an aggregate consistently.

Diff:
---
 gcc/ada/exp_aggr.adb | 498 +++
 gcc/ada/exp_ch3.adb  |  11 +-
 gcc/ada/exp_ch4.adb  |  13 +-
 gcc/ada/exp_ch6.adb  |   7 +
 gcc/ada/sem_ch3.adb  |  11 +-
 5 files changed, 324 insertions(+), 216 deletions(-)

diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
index 3c4576df3b83..f2e7ad76e98f 100644
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -4956,6 +4956,14 @@ package body Exp_Aggr is
   --  type using the computable sizes of the aggregate and its sub-
   --  aggregates.
 
+  function Build_Two_Pass_Aggr_Code
+(Lhs  : Node_Id;
+ Aggr_Typ : out Entity_Id) return List_Id;
+  --  The aggregate consists only of iterated associations and Lhs is an
+  --  expression containing the location of the anonymous object, which
+  --  may be built in place. Returns the dynamic subtype of the aggregate
+  --  in Aggr_Typ and the list of statements needed to build it.
+
   procedure Check_Bounds (Aggr_Bounds_Node, Index_Bounds_Node : Node_Id);
   --  Checks that the bounds of Aggr_Bounds are within the bounds defined
   --  by Index_Bounds. For null array aggregate (Ada 2022) check that the
@@ -4983,7 +4991,7 @@ package body Exp_Aggr is
   --  built directly into the target of an assignment, the target must
   --  be free of side effects. N is the target of the assignment.
 
-  procedure Two_Pass_Aggregate_Expansion (N : Node_Id);
+  procedure Two_Pass_Aggregate_Expansion;
   --  If the aggregate consists only of iterated associations then the
   --  aggregate is constructed in two steps:
   --  a) Build an expression to compute the number of elements
@@ -5053,6 +5061,221 @@ package body Exp_Aggr is
  Freeze_Itype (Agg_Type, N);
   end Build_Constrained_Type;
 
+  --
+  -- Build_Two_Pass_Aggr_Code --
+  --
+
+  function Build_Two_Pass_Aggr_Code
+(Lhs  : Node_Id;
+ Aggr_Typ : out Entity_Id) return List_Id
+  is
+ Index_Id   : constant Entity_Id := Make_Temporary (Loc, 'I', N);
+ Index_Type : constant Entity_Id := Etype (First_Index (Typ));
+ Index_Base : constant Entity_Id := Base_Type (Index_Type);
+ Size_Id: constant Entity_Id := Make_Temporary (Loc, 'I', N);
+ Size_Type  : constant Entity_Id :=
+Integer_Type_For
+  (Esize (Index_Base), Is_Unsigned_Type (Index_Base));
+
+ Assoc: Node_Id;
+ Incr : Node_Id;
+ Iter : Node_Id;
+ New_Comp : Node_Id;
+ One_Loop : Node_Id;
+ Iter_Id  : Entity_Id;
+
+ Aggr_Code  : List_Id;
+ Size_Expr_Code : List_Id;
+
+  begin
+ Size_Expr_Code := New_List (
+   Make_Object_Declaration (Loc,
+ Defining_Identifier => Size_Id,
+ Object_Definition   => New_Occurrence_Of (Size_Type, Loc),
+  

[gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Modif span/elem_len descripteurs de sous-références.

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:fa108d6ba5262ddac74bd2e391fba79b6e5adf9a

commit fa108d6ba5262ddac74bd2e391fba79b6e5adf9a
Author: Mikael Morin 
Date:   Thu Jun 5 10:45:19 2025 +0200

Modif span/elem_len descripteurs de sous-références.

Diff:
---
 gcc/fortran/trans-array.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 5b18df0e9679..486b5d280986 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -7819,7 +7819,8 @@ gfc_conv_expr_descriptor (gfc_se *se, gfc_expr *expr)
   else
{
  /* Otherwise make a new one.  */
- if (expr->ts.type == BT_CHARACTER)
+ if (expr->ts.type == BT_CHARACTER
+ || subref_array_target)
parmtype = gfc_typenode_for_spec (&expr->ts);
  else
parmtype = gfc_get_element_type (TREE_TYPE (desc));

[gcc r16-1163] ada: Activate SPARK_Mode in Ada.Numerics.*_Random specs

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:c657fe1488649a919f7cc48ea2b74c8aa062c5b8

commit r16-1163-gc657fe1488649a919f7cc48ea2b74c8aa062c5b8
Author: Andres Toom 
Date:   Tue Jan 28 15:41:27 2025 +0200

ada: Activate SPARK_Mode in Ada.Numerics.*_Random specs

gcc/ada/ChangeLog:

* libgnat/a-nudira.ads: Activate SPARK mode and add missing
basic contracts. Mark the unit as always terminating.
* libgnat/a-nuflra.ads: Idem.

Diff:
---
 gcc/ada/libgnat/a-nudira.ads | 42 --
 gcc/ada/libgnat/a-nuflra.ads | 34 +-
 2 files changed, 57 insertions(+), 19 deletions(-)

diff --git a/gcc/ada/libgnat/a-nudira.ads b/gcc/ada/libgnat/a-nudira.ads
index 647470b7890e..3b2ca1868e8d 100644
--- a/gcc/ada/libgnat/a-nudira.ads
+++ b/gcc/ada/libgnat/a-nudira.ads
@@ -44,38 +44,60 @@ generic
type Result_Subtype is (<>);
 
 package Ada.Numerics.Discrete_Random with
-  SPARK_Mode => Off
+  SPARK_Mode => On,
+  Always_Terminates
 is
 
--  Basic facilities
 
-   type Generator is limited private;
+   type Generator is limited private with Default_Initial_Condition;
 
-   function Random (Gen : Generator) return Result_Subtype;
+   function Random (Gen : Generator) return Result_Subtype with
+ Global => null,
+ Side_Effects;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
 
function Random
  (Gen   : Generator;
   First : Result_Subtype;
   Last  : Result_Subtype) return Result_Subtype
- with Post => Random'Result in First .. Last;
+ with
+   Post => Random'Result in First .. Last,
+   Global => null,
+   Side_Effects;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
 
-   procedure Reset (Gen : Generator; Initiator : Integer);
-   procedure Reset (Gen : Generator);
+   procedure Reset (Gen : Generator; Initiator : Integer) with
+ Global => null;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
+
+   procedure Reset (Gen : Generator) with
+ Global => null;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
 
--  Advanced facilities
 
type State is private;
 
-   procedure Save  (Gen : Generator; To_State   : out State);
-   procedure Reset (Gen : Generator; From_State : State);
+   procedure Save  (Gen : Generator; To_State   : out State) with
+ Global => null;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
+
+   procedure Reset (Gen : Generator; From_State : State) with
+ Global => null;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
 
Max_Image_Width : constant := System.Random_Numbers.Max_Image_Width;
 
-   function Image (Of_State: State)  return String;
-   function Value (Coded_State : String) return State;
+   function Image (Of_State: State)  return String with
+ Global => null;
+   function Value (Coded_State : String) return State with
+ Global => null;
 
 private
 
+   pragma SPARK_Mode (Off);
+
type Generator is new System.Random_Numbers.Generator;
 
type State is new System.Random_Numbers.State;
diff --git a/gcc/ada/libgnat/a-nuflra.ads b/gcc/ada/libgnat/a-nuflra.ads
index 7eb0494bded0..9ea73d432a6f 100644
--- a/gcc/ada/libgnat/a-nuflra.ads
+++ b/gcc/ada/libgnat/a-nuflra.ads
@@ -39,34 +39,50 @@
 with System.Random_Numbers;
 
 package Ada.Numerics.Float_Random with
-  SPARK_Mode => Off
+  SPARK_Mode => On,
+  Always_Terminates
 is
 
--  Basic facilities
 
-   type Generator is limited private;
+   type Generator is limited private with Default_Initial_Condition;
 
subtype Uniformly_Distributed is Float range 0.0 .. 1.0;
 
-   function Random (Gen : Generator) return Uniformly_Distributed;
+   function Random (Gen : Generator) return Uniformly_Distributed with
+ Global => null,
+ Side_Effects;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
+   procedure Reset (Gen : Generator) with
+ Global => null;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
 
-   procedure Reset (Gen : Generator);
-   procedure Reset (Gen : Generator; Initiator : Integer);
+   procedure Reset (Gen : Generator; Initiator : Integer) with
+ Global => null;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
 
--  Advanced facilities
 
type State is private;
 
-   procedure Save  (Gen : Generator; To_State   : out State);
-   procedure Reset (Gen : Generator; From_State : State);
+   procedure Save  (Gen : Generator; To_State   : out State) with
+ Global => null;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
+   procedure Reset (Gen : Generator; From_State : State) with
+ Global => null;
+   pragma Annotate (GNATprove, Mutable_In_Parameters, Generator);
 
Max_Image_Width : constant := System.Random_Numbers.Max_Image_Width;
 
-   function Image (Of_State: State)  return String;
-   function Value (Coded_State : String) return 

[gcc r16-1157] ada: Fix crash on access to protected return

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:201fd7899da99767f88fbd75d61b20fdc0cc190d

commit r16-1157-g201fd7899da99767f88fbd75d61b20fdc0cc190d
Author: Ronan Desplanques 
Date:   Mon Jan 27 12:04:41 2025 +0100

ada: Fix crash on access to protected return

The generation of the check mandated by Ada issue AI05-0073 was not done
handled properly for protected types when used through subtypes. This
patch fixes the issue.

gcc/ada/ChangeLog:

* exp_ch4.adb (Tagged_Membership): Fix for protected types.

Diff:
---
 gcc/ada/exp_ch4.adb | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
index 8c724844eb32..eb9fb6bba569 100644
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -15036,10 +15036,11 @@ package body Exp_Ch4 is
 
   --  Handle entities from the limited view
 
-  Orig_Right_Type : constant Entity_Id := Available_View (Etype (Right));
+  Orig_Right_Type : constant Entity_Id :=
+Base_Type (Available_View (Etype (Right)));
 
   Full_R_Typ   : Entity_Id;
-  Left_Type: Entity_Id := Available_View (Etype (Left));
+  Left_Type: Entity_Id := Base_Type (Available_View (Etype (Left)));
   Right_Type   : Entity_Id := Orig_Right_Type;
   Obj_Tag  : Node_Id;

[gcc r16-1149] ada: Reject Valid_Value arguments originating from Standard

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:ed34ee07843e07932411ecf2d0582faa96b57380

commit r16-1149-ged34ee07843e07932411ecf2d0582faa96b57380
Author: Viljar Indus 
Date:   Mon Jan 20 15:10:22 2025 +0200

ada: Reject Valid_Value arguments originating from Standard

The constraint for Valid_Value not applying to types from Standard
should also apply to all types derived from those types.

gcc/ada/ChangeLog:

* doc/gnat_rm/implementation_defined_attributes.rst: Update the
documentation for Valid_Value.
* sem_attr.adb (Analyze_Attribute): Reject types where
the root type originates from Standard.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.

Diff:
---
 gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst | 6 +++---
 gcc/ada/gnat_rm.texi  | 6 +++---
 gcc/ada/gnat_ugn.texi | 2 +-
 gcc/ada/sem_attr.adb  | 5 +++--
 4 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst 
b/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst
index f0518106853f..86d2a815e1e0 100644
--- a/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst
+++ b/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst
@@ -1629,9 +1629,9 @@ Attribute Valid_Value
 .. index:: Valid_Value
 
 The ``'Valid_Value`` attribute is defined for enumeration types other than
-those in package Standard. This attribute is a function that takes
-a String, and returns Boolean. ``T'Valid_Value (S)`` returns True
-if and only if ``T'Value (S)`` would not raise Constraint_Error.
+those in package Standard or types derived from those types. This attribute is
+a function that takes a String, and returns Boolean. ``T'Valid_Value (S)``
+returns True if and only if ``T'Value (S)`` would not raise Constraint_Error.
 
 Attribute Valid_Scalars
 ===
diff --git a/gcc/ada/gnat_rm.texi b/gcc/ada/gnat_rm.texi
index 00236ee6c5ca..5719d0d3e62d 100644
--- a/gcc/ada/gnat_rm.texi
+++ b/gcc/ada/gnat_rm.texi
@@ -12360,9 +12360,9 @@ which changes element (1,2) to 20 and (3,4) to 30.
 @geindex Valid_Value
 
 The @code{'Valid_Value} attribute is defined for enumeration types other than
-those in package Standard. This attribute is a function that takes
-a String, and returns Boolean. @code{T'Valid_Value (S)} returns True
-if and only if @code{T'Value (S)} would not raise Constraint_Error.
+those in package Standard or types derived from those types. This attribute is
+a function that takes a String, and returns Boolean. @code{T'Valid_Value (S)}
+returns True if and only if @code{T'Value (S)} would not raise 
Constraint_Error.
 
 @node Attribute Valid_Scalars,Attribute VADS_Size,Attribute 
Valid_Value,Implementation Defined Attributes
 @anchor{gnat_rm/implementation_defined_attributes 
attribute-valid-scalars}@anchor{1c5}
diff --git a/gcc/ada/gnat_ugn.texi b/gcc/ada/gnat_ugn.texi
index ca1d7bcc1abf..5331a318c0d8 100644
--- a/gcc/ada/gnat_ugn.texi
+++ b/gcc/ada/gnat_ugn.texi
@@ -29833,8 +29833,8 @@ to permit their use in free software.
 
 @printindex ge
 
-@anchor{gnat_ugn/gnat_utility_programs switches-related-to-project-files}@w{   
   }
 @anchor{d2}@w{  }
+@anchor{gnat_ugn/gnat_utility_programs switches-related-to-project-files}@w{   
   }
 
 @c %**end of body
 @bye
diff --git a/gcc/ada/sem_attr.adb b/gcc/ada/sem_attr.adb
index af08fdb2e33f..08da29a21984 100644
--- a/gcc/ada/sem_attr.adb
+++ b/gcc/ada/sem_attr.adb
@@ -7511,13 +7511,14 @@ package body Sem_Attr is
  Set_Etype (N, Standard_Boolean);
  Validate_Non_Static_Attribute_Function_Call;
 
- if P_Type in Standard_Boolean
+ if Root_Type (P_Type) in Standard_Boolean
 | Standard_Character
 | Standard_Wide_Character
 | Standard_Wide_Wide_Character
  then
 Error_Attr_P
-  ("prefix of % attribute must not be a type in Standard");
+  ("prefix of % attribute must not be a type originating from " &
+   "Standard");
  end if;
 
  if Discard_Names (First_Subtype (P_Type)) then

[gcc r16-1153] ada: Mitigate issue with tracebacks

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:d46138a434b1b372b84dfeef25e8b79679196179

commit r16-1153-gd46138a434b1b372b84dfeef25e8b79679196179
Author: Ronan Desplanques 
Date:   Thu Jan 30 16:02:31 2025 +0100

ada: Mitigate issue with tracebacks

The way we fetch the path to shared objects for traceback generation is
not perfectly precise. This patch adds a sanity check to mitigate the
consequences of incorrect shared object paths. It's motivated by a real
world failure in a GNATSAS test.

gcc/ada/ChangeLog:

* libgnat/s-trasym__dwarf.adb (Init_Module): Add mitigation.

Diff:
---
 gcc/ada/libgnat/s-trasym__dwarf.adb | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/gcc/ada/libgnat/s-trasym__dwarf.adb 
b/gcc/ada/libgnat/s-trasym__dwarf.adb
index 45af884b61fe..1b4b807f5669 100644
--- a/gcc/ada/libgnat/s-trasym__dwarf.adb
+++ b/gcc/ada/libgnat/s-trasym__dwarf.adb
@@ -41,6 +41,7 @@ with System.Soft_Links;
 with System.CRTL;
 with System.Dwarf_Lines;
 with System.Exception_Traces;
+with System.OS_Lib;
 with System.Standard_Library;
 with System.Traceback_Entries;
 with System.Strings;
@@ -413,6 +414,23 @@ package body System.Traceback.Symbolic is
  return;
   end if;
 
+  --  On some platforms, we use dladdr and the dli_fname field to get the
+  --  pathname, but that pathname might be relative and not point to the
+  --  right thing in our context. That happens when the executable is
+  --  dynamically linked and was started through execvp; dli_fname only
+  --  contains the executable name passed to execvp in that case.
+  --
+  --  Because of this, we might be about to open a file that's in fact not
+  --  a shared object but something completely unrelated. It's hard to
+  --  detect this in general, but we perform a sanity check that
+  --  Module_Name does not designate a directory; if it does, it's
+  --  definitely not a shared object.
+
+  if System.OS_Lib.Is_Directory (Module_Name) then
+ Success := False;
+ return;
+  end if;
+
   Open (Module_Name, Module.C, Success);
 
   --  If a module can't be opened just return now, we just cannot give more

[gcc r16-1151] ada: Add missing Ghost aspect to Lemma_Not_In_Range_Big2xx32 in s-arit32.adb

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:d4325877f35c8984680319c76af8274dd35c40fb

commit r16-1151-gd4325877f35c8984680319c76af8274dd35c40fb
Author: Johannes Kliemann 
Date:   Tue Jan 28 12:13:31 2025 +

ada: Add missing Ghost aspect to Lemma_Not_In_Range_Big2xx32 in s-arit32.adb

gcc/ada/ChangeLog:

* libgnat/s-arit32.adb (Lemma_Not_In_Range_Big2xx32): Add missing
Ghost aspect.

Diff:
---
 gcc/ada/libgnat/s-arit32.adb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/ada/libgnat/s-arit32.adb b/gcc/ada/libgnat/s-arit32.adb
index 91082e7692ab..5172d1dba0e6 100644
--- a/gcc/ada/libgnat/s-arit32.adb
+++ b/gcc/ada/libgnat/s-arit32.adb
@@ -203,6 +203,7 @@ is
 
procedure Lemma_Not_In_Range_Big2xx32
with
+ Ghost,
  Post => not In_Int32_Range (Big_2xx32)
and then not In_Int32_Range (-Big_2xx32);

[gcc r16-1130] ada: Avoid calling Resolve with Stand.Any_Fixed as the expected type

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:ef505b3a829acdba9e0a8df75aed8dcda4afce81

commit r16-1130-gef505b3a829acdba9e0a8df75aed8dcda4afce81
Author: Steve Baird 
Date:   Fri Jan 10 13:15:18 2025 -0800

ada: Avoid calling Resolve with Stand.Any_Fixed as the expected type

When we call Resolve for an expression, we pass in the expected type
for that expression. In the absence of semantic errors, that expected type
should never be any of the "Any_xxx" types declared in stand.ads (e.g.,
Any_Array, Any_Numeric, Any_Real). In particular, it should never be 
Any_Fixed.
Fix a case in which this rule was being violated.

gcc/ada/ChangeLog:

* sem_res.adb
(Set_Mixed_Mode_Operand): If we are about to call Resolve
passing in Any_Fixed as the expected type, then instead pass in
the fixed point type of the other operand (i.e., B_Typ).

Diff:
---
 gcc/ada/sem_res.adb | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
index b73b947c9a25..0df6c27c30d7 100644
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -6101,6 +6101,8 @@ package body Sem_Res is
elsif Is_Fixed_Point_Type (It.Typ) then
   if Analyzed (N) then
  Error_Msg_N ("ambiguous operand in fixed operation", N);
+  elsif It.Typ = Any_Fixed then
+ Resolve (N, B_Typ);
   else
  Resolve (N, It.Typ);
   end if;

[gcc r16-1155] ada: Tweak caching of streaming subprograms

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:700f14ab3240d4ea1b594976f6a0c278581df7d9

commit r16-1155-g700f14ab3240d4ea1b594976f6a0c278581df7d9
Author: Ronan Desplanques 
Date:   Fri Jan 31 10:40:42 2025 +0100

ada: Tweak caching of streaming subprograms

gcc/ada/ChangeLog:

* exp_attr.adb (Interunit_Ref_OK): Tweak categorization of 
compilation
units.

Diff:
---
 gcc/ada/exp_attr.adb | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/exp_attr.adb b/gcc/ada/exp_attr.adb
index aea9e8ad3afd..4e0052e9ee41 100644
--- a/gcc/ada/exp_attr.adb
+++ b/gcc/ada/exp_attr.adb
@@ -284,8 +284,8 @@ package body Exp_Attr is
(In_Same_Extended_Unit (Subp_Unit, Attr_Ref_Unit)
  --  If subp declared in unit body, then we don't want to refer
  --  to it from within unit spec so return False in that case.
- and then not (Body_Required (Attr_Ref_Unit)
-   and not Body_Required (Subp_Unit)));
+ and then not (not Is_Body (Unit (Attr_Ref_Unit))
+   and Is_Body (Unit (Subp_Unit;
--  Returns True if it is ok to refer to a cached subprogram declared in
--  Subp_Unit from the point of an attribute reference occurring in
--  Attr_Ref_Unit. Both arguments are usually N_Compilation_Nodes,

[gcc r16-1164] ada: Tweak wording of documentation comments in Atree

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:b35d2322d7b970e1e6eab2094bfebbccf661ae17

commit r16-1164-gb35d2322d7b970e1e6eab2094bfebbccf661ae17
Author: Ronan Desplanques 
Date:   Fri Feb 7 14:43:37 2025 +0100

ada: Tweak wording of documentation comments in Atree

This patch removes an outdated reference to the concept of node
extensions in comments. It also slightly clarifies the documentation of
Atree.Relocate_Node.

gcc/ada/ChangeLog:

* atree.ads (New_Copy, Relocate_Node): Tweak documentation comments.

Diff:
---
 gcc/ada/atree.ads | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/gcc/ada/atree.ads b/gcc/ada/atree.ads
index dc5fe0d8ad61..c8cc2bcf0c4f 100644
--- a/gcc/ada/atree.ads
+++ b/gcc/ada/atree.ads
@@ -299,20 +299,19 @@ package Atree is
--  This function allocates a new node, and then initializes it by copying
--  the contents of the source node into it. The contents of the source node
--  is not affected. The target node is always marked as not being in a list
-   --  (even if the source is a list member), and not overloaded. The new node
-   --  will have an extension if the source has an extension. New_Copy (Empty)
-   --  returns Empty, and New_Copy (Error) returns Error. Note that, unlike
-   --  Copy_Separate_Tree, New_Copy does not recursively copy any descendants,
-   --  so in general parent pointers are not set correctly for the descendants
-   --  of the copied node.
+   --  (even if the source is a list member), and not overloaded.
+   --  New_Copy (Empty) returns Empty, and New_Copy (Error) returns Error. Note
+   --  that, unlike Copy_Separate_Tree, New_Copy does not recursively copy any
+   --  descendants, so in general parent pointers are not set correctly for the
+   --  descendants of the copied node.
 
function Relocate_Node (Source : Node_Id) return Node_Id;
--  Source is a non-entity node that is to be relocated. A new node is
--  allocated, and the contents of Source are copied to this node, using
--  New_Copy. The parent pointers of descendants of the node are then
--  adjusted to point to the relocated copy. The original node is not
-   --  modified, but the parent pointers of its descendants are no longer
-   --  valid. The new copy is always marked as not overloaded. This routine is
+   --  modified, but the parent pointers of its children no longer point back
+   --  at it. The new copy is always marked as not overloaded. This routine is
--  used in conjunction with the tree rewrite routines (see descriptions of
--  Replace/Rewrite).
--

[gcc r16-1158] ada: Add Ghost aspect to Lo in s-arit32.adb

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:4405925143b620b9c18889cc79433d90100416d7

commit r16-1158-g4405925143b620b9c18889cc79433d90100416d7
Author: Aleksandra Pasek 
Date:   Mon Feb 3 18:09:36 2025 +

ada: Add Ghost aspect to Lo in s-arit32.adb

gcc/ada/ChangeLog:

* libgnat/s-arit32.adb: Add Ghost aspect to Lo.

Diff:
---
 gcc/ada/libgnat/s-arit32.adb | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/libgnat/s-arit32.adb b/gcc/ada/libgnat/s-arit32.adb
index 5172d1dba0e6..eb4e6e5590f6 100644
--- a/gcc/ada/libgnat/s-arit32.adb
+++ b/gcc/ada/libgnat/s-arit32.adb
@@ -96,7 +96,8 @@ is
--  Convert absolute value of X to unsigned. Note that we can't just use
--  the expression of the Else since it overflows for X = Int32'First.
 
-   function Lo (A : Uns64) return Uns32 is (Uns32 (A and (2 ** 32 - 1)));
+   function Lo (A : Uns64) return Uns32 is (Uns32 (A and (2 ** 32 - 1)))
+   with Ghost;
--  Low order half of 64-bit value
 
function Hi (A : Uns64) return Uns32 is (Uns32 (Shift_Right (A, 32)));

[gcc r16-1159] ada: Missing error on expression function returning incomplete type

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:9fc6eedace2607c5e322f4b874f290975f0d2b0e

commit r16-1159-g9fc6eedace2607c5e322f4b874f290975f0d2b0e
Author: Javier Miranda 
Date:   Tue Feb 4 19:41:53 2025 +

ada: Missing error on expression function returning incomplete type

When the type of the expression of an expression function is
an incomplete type, the frontend does not report the expected
error.

gcc/ada/ChangeLog:

* sem_ch6.adb (Analyze_Expression_Function): Add missing check
on premature use of incomplete type.

Diff:
---
 gcc/ada/sem_ch6.adb | 5 +
 1 file changed, 5 insertions(+)

diff --git a/gcc/ada/sem_ch6.adb b/gcc/ada/sem_ch6.adb
index 0cfcc1cb263b..d4e6d1693263 100644
--- a/gcc/ada/sem_ch6.adb
+++ b/gcc/ada/sem_ch6.adb
@@ -591,6 +591,11 @@ package body Sem_Ch6 is
 End_Scope;
  end if;
 
+ if Is_Incomplete_Type (Typ) then
+Error_Msg_NE
+  ("premature usage of incomplete}", Expr, First_Subtype (Typ));
+ end if;
+
  --  In the case of an expression function marked with the aspect
  --  Static, we need to check the requirement that the function's
  --  expression is a potentially static expression. This is done

[gcc r16-1162] ada: Spurious compilation error with repeated loop index

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:5ece6a808254ca1653872cc2ca64a72e91d19731

commit r16-1162-g5ece6a808254ca1653872cc2ca64a72e91d19731
Author: Javier Miranda 
Date:   Thu Feb 6 09:40:57 2025 +

ada: Spurious compilation error with repeated loop index

When multiple for-loop statements in the same scope use the
same index name to iterate through container elements, the
compiler reports a spurious error indicating a conflict
between index names.

gcc/ada/ChangeLog:

* exp_ch7.adb (Process_Object_Declaration): Avoid generating
duplicate names for master nodes.

Diff:
---
 gcc/ada/exp_ch7.adb | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/gcc/ada/exp_ch7.adb b/gcc/ada/exp_ch7.adb
index 67af1d772631..905094c7e404 100644
--- a/gcc/ada/exp_ch7.adb
+++ b/gcc/ada/exp_ch7.adb
@@ -2783,16 +2783,31 @@ package body Exp_Ch7 is
 Master_Node_Id :=
   Make_Defining_Identifier (Master_Node_Loc,
 Chars => New_External_Name (Chars (Obj_Id), Suffix => "MN"));
+
 Master_Node_Decl :=
   Make_Master_Node_Declaration (Master_Node_Loc,
 Master_Node_Id, Obj_Id);
 
 Push_Scope (Scope (Obj_Id));
+
+--  Avoid generating duplicate names for master nodes
+
+if Ekind (Obj_Id) = E_Loop_Parameter
+  and then
+Present (Current_Entity_In_Scope (Chars (Master_Node_Id)))
+then
+   Set_Chars (Master_Node_Id,
+ New_External_Name (Chars (Obj_Id),
+   Suffix => "MN",
+   Suffix_Index => -1));
+end if;
+
 if not Has_Strict_Ctrl_Objs or else Count = 1 then
Prepend_To (Decls, Master_Node_Decl);
 else
Insert_Before (Decl, Master_Node_Decl);
 end if;
+
 Analyze (Master_Node_Decl);
 Pop_Scope;

[gcc r16-1131] ada: Use absolute paths in SARIF reports

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:0827f611f87041f1b0fadba68c0f08506d44ce3e

commit r16-1131-g0827f611f87041f1b0fadba68c0f08506d44ce3e
Author: Viljar Indus 
Date:   Mon Dec 2 12:18:06 2024 +0200

ada: Use absolute paths in SARIF reports

gcc/ada/ChangeLog:

* diagnostics-json_utils.adb: Add new method To_File_Uri to
convert any path to the URI standard.
* diagnostics-json_utils.ads: Likewise.
* diagnostics-sarif_emitter.adb: Converted Artifact_Change
types to use the Source_File_Index instead of the file name
to store the source file.
Removed the body from Destroy (Elem : in out Artifact_Change)
since it no longer contained elements with dynamic memory.
Updated the implementation of Equals (L, R : Artifact_Change)
to take into account the changes for Artifact_Change.
Print_Artifact_Location: Use the Source_File_Index as an
input argument. Now prints the uriBaseId attribute and a
relative path from the uriBaseId to the file in question as
the value of the uri attribute.
New method Print_Original_Uri_Base_Ids to print the
originalUriBaseIds node.
Print_Run no prints the originalUriBaseIds node.
Use constants instead of strings for all the SARIF attributes.
* osint.adb: Add new method Relative_Path to calculate the
relative path from a base directory.
Add new method Root to calculate the root of each directory.
Add new method Get_Current_Dir to get the current working
directory for the execution environment.
* osint.ads: Likewise.
* clean.adb: Use full names for calls to Get_Current_Dir.
* gnatls.adb: Likewise.

Diff:
---
 gcc/ada/clean.adb |   7 +-
 gcc/ada/diagnostics-json_utils.adb| 139 ++
 gcc/ada/diagnostics-json_utils.ads|   5 +
 gcc/ada/diagnostics-sarif_emitter.adb | 263 --
 gcc/ada/gnatls.adb|   4 +-
 gcc/ada/osint.adb | 118 +--
 gcc/ada/osint.ads |  10 ++
 7 files changed, 460 insertions(+), 86 deletions(-)

diff --git a/gcc/ada/clean.adb b/gcc/ada/clean.adb
index f28cf691cf9d..dcbeffe1b8e9 100644
--- a/gcc/ada/clean.adb
+++ b/gcc/ada/clean.adb
@@ -319,7 +319,9 @@ package body Clean is
   Delete ("", Executable);
end if;
 
-   Delete_Binder_Generated_Files (Get_Current_Dir, Source);
+   Delete_Binder_Generated_Files
+ (GNAT.Directory_Operations.Get_Current_Dir,
+  Source);
 end;
  end if;
   end loop;
@@ -405,7 +407,8 @@ package body Clean is
   Source : File_Name_Type)
is
   Source_Name : constant String   := Get_Name_String (Source);
-  Current : constant String   := Get_Current_Dir;
+  Current : constant String :=
+GNAT.Directory_Operations.Get_Current_Dir;
   Last: constant Positive := B_Start'Length + Source_Name'Length;
   File_Name   : String (1 .. Last + 4);
 
diff --git a/gcc/ada/diagnostics-json_utils.adb 
b/gcc/ada/diagnostics-json_utils.adb
index 072cab4a4928..8ce04c4631f6 100644
--- a/gcc/ada/diagnostics-json_utils.adb
+++ b/gcc/ada/diagnostics-json_utils.adb
@@ -22,7 +22,11 @@
 -- Extensive contributions were provided by Ada Core Technologies Inc.  --
 --  --
 --
+
+with Namet; use Namet;
+with Osint;
 with Output; use Output;
+with System.OS_Lib;
 
 package body Diagnostics.JSON_Utils is
 
@@ -64,6 +68,141 @@ package body Diagnostics.JSON_Utils is
   end if;
end NL_And_Indent;
 
+   -
+   -- To_File_Uri --
+   -
+
+   function To_File_Uri (Path : String) return String is
+
+  function Normalize_Uri (Path : String) return String;
+  --  Construct a normalized URI from the path name by replacing reserved
+  --  URI characters that can appear in paths with their escape character
+  --  combinations.
+  --
+  --  According to the URI standard reserved charcthers within the paths
+  --  should be percent encoded:
+  --
+  --  https://www.rfc-editor.org/info/rfc3986
+  --
+  --  Reserved charcters are defined as:
+  --
+  --  reserved = gen-delims / sub-delims
+  --  gen-delims = ":" / "/" / "?" / "#" / "[" / "]" / "@"
+  --  sub-delims = "!" / "$" / "&" / "’" / "(" / ")"
+  --  / "*" / "+" / "," / ";" / "="
+
+  ---
+  -- Normalize_Uri --
+  ---
+
+  function Normalize_Uri (Path : String) return String is
+ Buf : Bounded_String;
+  begin
+ for C of Path loop
+ 

[gcc r16-1138] ada: Fix New_Char_Array with empty arrays

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:ac936aa57ee0b0a867e80233efefa204b2ae2bc7

commit r16-1138-gac936aa57ee0b0a867e80233efefa204b2ae2bc7
Author: Ronan Desplanques 
Date:   Thu Jan 16 12:55:37 2025 +0100

ada: Fix New_Char_Array with empty arrays

This patch fixes an integer underflow issue on calls of the form
New_Char_Array (X) with X'Last < X'First - 2. That integer underflow
caused attempts at allocating impossibly large amount of memory in some
cases.

gcc/ada/ChangeLog:

* libgnat/i-cstrin.adb (Position_Of_Nul): Change specification and
adjust body accordingly.
(New_Char_Array): Fix size of allocation.
(To_Chars_Ptr): Adapt to Position_Of_Nul change.

Diff:
---
 gcc/ada/libgnat/i-cstrin.adb | 62 +---
 1 file changed, 35 insertions(+), 27 deletions(-)

diff --git a/gcc/ada/libgnat/i-cstrin.adb b/gcc/ada/libgnat/i-cstrin.adb
index 7bf881f87167..6d329254aff3 100644
--- a/gcc/ada/libgnat/i-cstrin.adb
+++ b/gcc/ada/libgnat/i-cstrin.adb
@@ -66,8 +66,11 @@ is
pragma Inline ("+");
--  Address arithmetic on chars_ptr value
 
-   function Position_Of_Nul (Into : char_array) return size_t;
-   --  Returns position of the first Nul in Into or Into'Last + 1 if none
+   procedure Position_Of_Nul
+ (Into : char_array; Found : out Boolean; Index : out size_t);
+   --  If into contains a Nul character, Found is set to True and Index
+   --  contains the position of the first Nul character in Into. Otherwise
+   --  Found is set to False and the value of Index is not meaningful.
 
--  We can't use directly System.Memory because the categorization is not
--  compatible, so we directly import here the malloc and free routines.
@@ -107,6 +110,7 @@ is

 
function New_Char_Array (Chars : char_array) return chars_ptr is
+  Found   : Boolean;
   Index   : size_t;
   Pointer : chars_ptr;
 
@@ -114,24 +118,25 @@ is
   --  Get index of position of null. If Index > Chars'Last,
   --  nul is absent and must be added explicitly.
 
-  Index := Position_Of_Nul (Into => Chars);
-  Pointer := Memory_Alloc ((Index - Chars'First + 1));
+  Position_Of_Nul (Into => Chars, Found => Found, Index => Index);
 
   --  If nul is present, transfer string up to and including nul
 
-  if Index <= Chars'Last then
- Update (Item   => Pointer,
- Offset => 0,
- Chars  => Chars (Chars'First .. Index),
- Check  => False);
+  if Found then
+ Pointer := Memory_Alloc (Index - Chars'First + 1);
+
+ Update
+   (Item   => Pointer,
+Offset => 0,
+Chars  => Chars (Chars'First .. Index),
+Check  => False);
   else
  --  If original string has no nul, transfer whole string and add
  --  terminator explicitly.
 
- Update (Item   => Pointer,
- Offset => 0,
- Chars  => Chars,
- Check  => False);
+ Pointer := Memory_Alloc (Chars'Length + 1);
+
+ Update (Item => Pointer, Offset => 0, Chars => Chars, Check => False);
  Poke (nul, Into => Pointer + size_t'(Chars'Length));
   end if;
 
@@ -187,19 +192,19 @@ is
-- Position_Of_Nul --
-
 
-   function Position_Of_Nul (Into : char_array) return size_t is
+   procedure Position_Of_Nul
+ (Into : char_array; Found : out Boolean; Index : out size_t) is
begin
-  pragma Annotate (Gnatcheck, Exempt_On, "Improper_Returns",
-   "early returns for performance");
+  Found := False;
+  Index := 0;
+
   for J in Into'Range loop
  if Into (J) = nul then
-return J;
+Found := True;
+Index := J;
+return;
  end if;
   end loop;
-
-  return Into'Last + 1;
-
-  pragma Annotate (Gnatcheck, Exempt_Off, "Improper_Returns");
end Position_Of_Nul;
 

@@ -231,19 +236,22 @@ is
  (Item  : char_array_access;
   Nul_Check : Boolean := False) return chars_ptr
is
+  Found : Boolean;
+  Index : size_t;
begin
   pragma Annotate (Gnatcheck, Exempt_On, "Improper_Returns",
"early returns for performance");
   if Item = null then
  return Null_Ptr;
-  elsif Nul_Check
-and then Position_Of_Nul (Into => Item.all) > Item'Last
-  then
- raise Terminator_Error;
-  else
- return To_chars_ptr (Item (Item'First)'Address);
+  elsif Nul_Check then
+ Position_Of_Nul (Item.all, Found, Index);
+ if not Found then
+raise Terminator_Error;
+ end if;
   end if;
 
+  return To_chars_ptr (Item (Item'First)'Address);
+
   pragma Annotate (Gnatcheck, Exempt_Off, "Improper_Returns");
end To_Chars_Ptr;

[gcc r16-1132] ada: Spurious accessibility error with -gnatc

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:b56a782224d90205710311a3623769a5d8befe28

commit r16-1132-gb56a782224d90205710311a3623769a5d8befe28
Author: squirek 
Date:   Tue Jan 14 06:40:08 2025 +

ada: Spurious accessibility error with -gnatc

The patch fixes an issue in the compiler whereby a spurious accessibility
error gets generated in semantic checking mode (-gnatc) when an explicitly
aliased formal gets used as an actual for an access disriminant in a return
object.

gcc/ada/ChangeLog:

* accessibility.adb
(Check_Return_Construct_Accessibility): Disable check generation
when we are only checking semantics.

Diff:
---
 gcc/ada/accessibility.adb | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/gcc/ada/accessibility.adb b/gcc/ada/accessibility.adb
index 8c85173aa34c..200f892a96f0 100644
--- a/gcc/ada/accessibility.adb
+++ b/gcc/ada/accessibility.adb
@@ -1642,6 +1642,13 @@ package body Accessibility is
  (No (Extra_Accessibility_Of_Result (Scope_Id))
and then Is_Formal_Of_Current_Function (Assoc_Expr)
and then Is_Tagged_Type (Etype (Scope_Id)))
+
+   --  Disable the check generation when we are only checking semantics
+   --  since required locals do not get generated (e.g. extra
+   --  accessibility of result), and constant folding can occur and
+   --  lead to spurious errors.
+
+   and then Operating_Mode /= Check_Semantics
  then
 --  Generate a dynamic check based on the extra accessibility of
 --  the result or the scope of the current function.

[gcc r16-1140] ada: Fix couple of remaining incompatibilities with CHERI architecture

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:9a6162488992afca390e01d4c1ba9264fd10eab8

commit r16-1140-g9a6162488992afca390e01d4c1ba9264fd10eab8
Author: Eric Botcazou 
Date:   Thu Jan 16 15:51:00 2025 +0100

ada: Fix couple of remaining incompatibilities with CHERI architecture

These are the usual problematic patterns in the expanded code.

gcc/ada/ChangeLog:

* exp_ch9.adb (Build_Dispatching_Requeue): Take 'Tag of the
concurrent object instead of doing an unchecked conversion.
* exp_pakd.adb (Expand_Packed_Address_Reference): Perform address
arithmetic using an operator of System.Storage_Elements.

Diff:
---
 gcc/ada/exp_ch9.adb  |  6 --
 gcc/ada/exp_pakd.adb | 31 +--
 2 files changed, 21 insertions(+), 16 deletions(-)

diff --git a/gcc/ada/exp_ch9.adb b/gcc/ada/exp_ch9.adb
index d75fd3a68256..dd59af970f56 100644
--- a/gcc/ada/exp_ch9.adb
+++ b/gcc/ada/exp_ch9.adb
@@ -9877,7 +9877,7 @@ package body Exp_Ch9 is
  --  (T=> To_Tag_Ptr (Obj'Address).all,
  --   Position =>
  -- Ada.Tags.Get_Offset_Index
- --   (Ada.Tags.Tag (Concval),
+ --   (Concval._Tag,
  --));
 
  --  Note that Obj'Address is recursively expanded into a call to
@@ -9898,7 +9898,9 @@ package body Exp_Ch9 is
   Make_Function_Call (Loc,
 Name => New_Occurrence_Of (RTE (RE_Get_Offset_Index), Loc),
 Parameter_Associations => New_List (
-  Unchecked_Convert_To (RTE (RE_Tag), Concval),
+  Make_Attribute_Reference (Loc,
+Prefix => Concval,
+Attribute_Name => Name_Tag),
   Make_Integer_Literal (Loc,
 DT_Position (Entity (Ename;
 
diff --git a/gcc/ada/exp_pakd.adb b/gcc/ada/exp_pakd.adb
index 26ef065b529b..f04016fa8117 100644
--- a/gcc/ada/exp_pakd.adb
+++ b/gcc/ada/exp_pakd.adb
@@ -1526,21 +1526,24 @@ package body Exp_Pakd is
 
   Get_Base_And_Bit_Offset (Prefix (N), Base, Offset);
 
+  Offset := Unchecked_Convert_To (RTE (RE_Storage_Offset), Offset);
+
   Rewrite (N,
-Unchecked_Convert_To (RTE (RE_Address),
-  Make_Op_Add (Loc,
-Left_Opnd =>
-  Unchecked_Convert_To (RTE (RE_Integer_Address),
-Make_Attribute_Reference (Loc,
-  Prefix => Base,
-  Attribute_Name => Name_Address)),
-
-Right_Opnd =>
-  Unchecked_Convert_To (RTE (RE_Integer_Address),
-Make_Op_Divide (Loc,
-  Left_Opnd => Offset,
-  Right_Opnd =>
-Make_Integer_Literal (Loc, System_Storage_Unit));
+Make_Function_Call (Loc,
+  Name =>
+Make_Expanded_Name (Loc,
+  Chars => Name_Op_Add,
+  Prefix=>
+New_Occurrence_Of (RTU_Entity (System_Storage_Elements), Loc),
+  Selector_Name => Make_Identifier (Loc, Name_Op_Add)),
+  Parameter_Associations => New_List (
+Make_Attribute_Reference (Loc,
+  Prefix => Base,
+  Attribute_Name => Name_Address),
+Make_Op_Divide (Loc,
+  Left_Opnd  => Offset,
+  Right_Opnd =>
+Make_Integer_Literal (Loc, System_Storage_Unit);
 
   Analyze_And_Resolve (N, RTE (RE_Address));
end Expand_Packed_Address_Reference;

[gcc r16-1133] ada: Cleanup preanalysis of static expressions (part 6)

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:3c95e0e8938e26298534eceb70a3ffb7b56c413e

commit r16-1133-g3c95e0e8938e26298534eceb70a3ffb7b56c413e
Author: Javier Miranda 
Date:   Tue Jan 14 11:08:57 2025 +

ada: Cleanup preanalysis of static expressions (part 6)

Rename Preanalyze_Spec_Expression as Preanalyze_And_Resolve_Spec_Expression,
Preanalyze_Assert_Expression as Preanalyze_And_Resolve_Assert_Expression,
and Preanalyze_Default_Expression as 
Preanalyze_And_Resolve_Default_Expression;
cleanup the version of Preanalyze_Assert_Expression without context type.

gcc/ada/ChangeLog:

* sem.ads: Update reference to renamed subprogram in documentation.
* sem_ch3.ads (Preanalyze_Assert_Expression): Renamed.
(Preanalyze_Spec_Expression): Renamed.
* sem_ch3.adb (Preanalyze_Assert_Expression): Renamed and code 
cleanup.
(Preanalyze_Spec_Expression): Renamed.
(Preanalyze_Default_Expression): Renamed.
* contracts.adb: Update calls to renamed subprograms.
* exp_pakd.adb: Ditto.
* exp_util.adb: Ditto.
* freeze.adb: Ditto.
* sem_ch12.adb: Ditto.
* sem_ch13.adb: Ditto.
* sem_ch6.adb: Ditto.
* sem_prag.adb: Ditto.
* sem_res.adb (Preanalyze_And_Resolve): Add to the version without
context type the special handling for GNATprove mode provided by
the version with context type; required to cleanup the body of
Preanalyze_Assert_Expression.

Diff:
---
 gcc/ada/contracts.adb |  2 +-
 gcc/ada/exp_pakd.adb  |  3 +-
 gcc/ada/exp_util.adb  | 12 +++
 gcc/ada/freeze.adb|  9 ++---
 gcc/ada/sem.ads   | 12 +++
 gcc/ada/sem_ch12.adb  |  4 +--
 gcc/ada/sem_ch13.adb  | 38 ++--
 gcc/ada/sem_ch3.adb   | 99 +++
 gcc/ada/sem_ch3.ads   | 17 ++---
 gcc/ada/sem_ch6.adb   | 12 +++
 gcc/ada/sem_prag.adb  | 60 ++-
 gcc/ada/sem_res.adb   | 11 +++---
 12 files changed, 155 insertions(+), 124 deletions(-)

diff --git a/gcc/ada/contracts.adb b/gcc/ada/contracts.adb
index 8b94a67639f2..c0a57e6d0bae 100644
--- a/gcc/ada/contracts.adb
+++ b/gcc/ada/contracts.adb
@@ -4909,7 +4909,7 @@ package body Contracts is
   Install_Formals (Subp);
   Inside_Class_Condition_Preanalysis := True;
 
-  Preanalyze_Spec_Expression (Expr, Standard_Boolean);
+  Preanalyze_And_Resolve_Spec_Expression (Expr, Standard_Boolean);
 
   Inside_Class_Condition_Preanalysis := False;
   End_Scope;
diff --git a/gcc/ada/exp_pakd.adb b/gcc/ada/exp_pakd.adb
index 4eb93c3192a6..26ef065b529b 100644
--- a/gcc/ada/exp_pakd.adb
+++ b/gcc/ada/exp_pakd.adb
@@ -904,7 +904,8 @@ package body Exp_Pakd is
  --  discriminants, so we treat it as a default/per-object expression.
 
  Set_Parent (Len_Expr, Typ);
- Preanalyze_Spec_Expression (Len_Expr, Standard_Long_Long_Integer);
+ Preanalyze_And_Resolve_Spec_Expression
+   (Len_Expr, Standard_Long_Long_Integer);
 
  --  Use a modular type if possible. We can do this if we have
  --  static bounds, and the length is small enough, and the length
diff --git a/gcc/ada/exp_util.adb b/gcc/ada/exp_util.adb
index b8c6a9f8848b..513662af383a 100644
--- a/gcc/ada/exp_util.adb
+++ b/gcc/ada/exp_util.adb
@@ -1956,7 +1956,7 @@ package body Exp_Util is
  --  time capture the visibility of the proper package part.
 
  Set_Parent (Expr, Typ_Decl);
- Preanalyze_Assert_Expression (Expr, Any_Boolean);
+ Preanalyze_And_Resolve_Assert_Expression (Expr, Any_Boolean);
 
  --  Save a copy of the expression with all replacements and analysis
  --  already taken place in case a derived type inherits the pragma.
@@ -1969,8 +1969,8 @@ package body Exp_Util is
 
  --  If the pragma comes from an aspect specification, replace the
  --  saved expression because all type references must be substituted
- --  for the call to Preanalyze_Spec_Expression in Check_Aspect_At_xxx
- --  routines.
+ --  for the call to Preanalyze_And_Resolve_Spec_Expression in
+ --  Check_Aspect_At_xxx routines.
 
  if Present (DIC_Asp) then
 Set_Expression_Copy (DIC_Asp, New_Copy_Tree (Expr));
@@ -3217,7 +3217,7 @@ package body Exp_Util is
--  part.
 
Set_Parent (Expr, Parent (Prag_Expr));
-   Preanalyze_Assert_Expression (Expr, Any_Boolean);
+   Preanalyze_And_Resolve_Assert_Expression (Expr, Any_Boolean);
 
--  Save a copy of the expression when T is tagged to detect
--  errors and capture the visibility of the proper package part
@@ -3229,8 +3229,8 @@ package body Exp_Util is
 
--  If the pragma comes from an aspect specification, replace
--  the saved expre

[gcc r16-1150] ada: Fix reproducer generation

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:df0d3b2491c5ee7859762c4b677b17b3dede3dc5

commit r16-1150-gdf0d3b2491c5ee7859762c4b677b17b3dede3dc5
Author: Ronan Desplanques 
Date:   Mon Jan 20 16:14:21 2025 +0100

ada: Fix reproducer generation

This patch fixes reproducer generation in the case of crashes in the
back end in the presence of preprocessing dependencies.

gcc/ada/ChangeLog:

* generate_minimal_reproducer.adb (Generate_Minimal_Reproducer): Fix
handling of preprocessing dependencies.

Diff:
---
 gcc/ada/generate_minimal_reproducer.adb | 50 +
 1 file changed, 26 insertions(+), 24 deletions(-)

diff --git a/gcc/ada/generate_minimal_reproducer.adb 
b/gcc/ada/generate_minimal_reproducer.adb
index 2378f60c4729..5a5ae16193e5 100644
--- a/gcc/ada/generate_minimal_reproducer.adb
+++ b/gcc/ada/generate_minimal_reproducer.adb
@@ -140,28 +140,30 @@ begin
   end if;
 
   for J in Main_Unit .. Lib.Last_Unit loop
- declare
-Path : File_Name_Type :=
-  Fmap.Mapped_Path_Name (Lib.Unit_File_Name (J));
-
-Unit_Name : constant Unit_Name_Type :=
-  (if J = Main_Unit then Main_Unit_Name else Lib.Unit_Name (J));
-
-Default_File_Name : constant String :=
-  Fname.UF.Get_Default_File_Name (Unit_Name);
-
-File_Copy_Path : constant String :=
-  Src_Dir_Path & Directory_Separator & Default_File_Name;
-
---  We may have synthesized units for child subprograms without
---  spec files. We need to filter out those units because we would
---  create bogus spec files that break compilation if we didn't.
-Is_Synthetic_Subprogram_Spec : constant Boolean :=
-  not Comes_From_Source (Lib.Cunit (J));
- begin
-if not Lib.Is_Internal_Unit (J)
-  and then not Is_Synthetic_Subprogram_Spec
-then
+ --  We skip library units that fall under one of the following cases:
+ --  - Internal library units.
+ --  - Units that were synthesized for child subprograms without spec
+ --files.
+ --  - Dummy entries that Add_Preprocessing_Dependency puts in
+ --Lib.Units.
+ --  Those cases correspond to the conjuncts in the condition below.
+ if not Lib.Is_Internal_Unit (J)
+   and then Comes_From_Source (Lib.Cunit (J))
+   and then Lib.Unit_Name (J) /= No_Unit_Name
+ then
+declare
+   Path : File_Name_Type :=
+ Fmap.Mapped_Path_Name (Lib.Unit_File_Name (J));
+
+   Unit_Name : constant Unit_Name_Type :=
+ (if J = Main_Unit then Main_Unit_Name else Lib.Unit_Name (J));
+
+   Default_File_Name : constant String :=
+ Fname.UF.Get_Default_File_Name (Unit_Name);
+
+   File_Copy_Path : constant String :=
+ Src_Dir_Path & Directory_Separator & Default_File_Name;
+begin
--  Mapped_Path_Name might have returned No_File. This has been
--  observed for files with a Source_File_Name pragma.
if Path = No_File then
@@ -178,8 +180,8 @@ begin
 
   pragma Assert (Success);
end;
-end if;
- end;
+end;
+ end if;
   end loop;
end Create_Semantic_Closure_Project;

[gcc r16-1142] ada: Spurious accessibility error with -gnatc

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:c328b54f15d81b021bb3ae3084f49b61cd52b1d3

commit r16-1142-gc328b54f15d81b021bb3ae3084f49b61cd52b1d3
Author: squirek 
Date:   Thu Jan 16 17:09:49 2025 +

ada: Spurious accessibility error with -gnatc

The patch fixes an issue in the compiler whereby a spurious accessibility
error gets generated in semantic checking mode (-gnatc) when an explicitly
aliased formal gets used as an actual for an access disriminant in a return
object.

gcc/ada/ChangeLog:

* accessibility.adb (Check_Return_Construct_Accessibility):
Disable check generation when we are only checking semantics.
* opt.ads: Add new flag for -gnatc mode
* switch-c.adb (Scan_Front_End_Switches): Set flag for -gnatc mode

Diff:
---
 gcc/ada/accessibility.adb | 6 +++---
 gcc/ada/opt.ads   | 4 
 gcc/ada/switch-c.adb  | 1 +
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/gcc/ada/accessibility.adb b/gcc/ada/accessibility.adb
index 200f892a96f0..0b8d3f7746d7 100644
--- a/gcc/ada/accessibility.adb
+++ b/gcc/ada/accessibility.adb
@@ -1648,7 +1648,7 @@ package body Accessibility is
--  accessibility of result), and constant folding can occur and
--  lead to spurious errors.
 
-   and then Operating_Mode /= Check_Semantics
+   and then not Check_Semantics_Only_Mode
  then
 --  Generate a dynamic check based on the extra accessibility of
 --  the result or the scope of the current function.
@@ -1691,8 +1691,8 @@ package body Accessibility is
   and then Entity (Check_Cond) = Standard_True
 then
Error_Msg_N
- ("access discriminant in return object would be a dangling"
-  & " reference", Return_Stmt);
+ ("access discriminant in return object could be a dangling"
+  & " reference??", Return_Stmt);
 end if;
  end if;
 
diff --git a/gcc/ada/opt.ads b/gcc/ada/opt.ads
index 687d1ed8836a..87ce3a1d4639 100644
--- a/gcc/ada/opt.ads
+++ b/gcc/ada/opt.ads
@@ -308,6 +308,10 @@ package Opt is
--  GNATMAKE
--  Set to True to check readonly files during the make process
 
+   Check_Semantics_Only_Mode : Boolean := False;
+   --  GNATMAKE
+   --  Set to True when -gnatc is present to only perform semantic checking.
+
Check_Source_Files : Boolean := True;
--  GNATBIND, GNATMAKE
--  Set to True to enable consistency checking for any source files that
diff --git a/gcc/ada/switch-c.adb b/gcc/ada/switch-c.adb
index 6344a0b3a3cf..1e54340d5202 100644
--- a/gcc/ada/switch-c.adb
+++ b/gcc/ada/switch-c.adb
@@ -335,6 +335,7 @@ package body Switch.C is
end if;
 
Ptr := Ptr + 1;
+   Check_Semantics_Only_Mode := True;
Operating_Mode := Check_Semantics;
 
 --  -gnatC (Generate CodePeer information)

[gcc r16-1143] ada: Extend and clarify documentation of stack size settings for Windows

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:59772414183d2df27efbd7bff7aaabba19e32309

commit r16-1143-g59772414183d2df27efbd7bff7aaabba19e32309
Author: Piotr Trojanek 
Date:   Thu Jan 16 17:41:56 2025 +0100

ada: Extend and clarify documentation of stack size settings for Windows

The original documentation for more recent versions of Windows didn't 
specify
whether the specified stack size acts as a "reserved" or "committed" stack
size.

Also, clarify the wording for older versions of Windows.

gcc/ada/ChangeLog:

* doc/gnat_ugn/platform_specific_information.rst
(Setting Stack Size from gnatlink): Improve documentation.
* gnat-style.texi: Regenerate.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.

Diff:
---
 gcc/ada/doc/gnat_ugn/platform_specific_information.rst |  7 ---
 gcc/ada/gnat-style.texi|  4 ++--
 gcc/ada/gnat_rm.texi   | 14 +++---
 gcc/ada/gnat_ugn.texi  | 13 +++--
 4 files changed, 20 insertions(+), 18 deletions(-)

diff --git a/gcc/ada/doc/gnat_ugn/platform_specific_information.rst 
b/gcc/ada/doc/gnat_ugn/platform_specific_information.rst
index f2fc737f90d2..6493a065960d 100644
--- a/gcc/ada/doc/gnat_ugn/platform_specific_information.rst
+++ b/gcc/ada/doc/gnat_ugn/platform_specific_information.rst
@@ -2212,11 +2212,12 @@ Setting Stack Size from ``gnatlink``
 You can specify the program stack size at link time. On most versions
 of Windows, starting with XP, this is mostly useful to set the size of
 the main stack (environment task). The other task stacks are set with
-pragma Storage_Size or with the *gnatbind -d* command.
+pragma Storage_Size or with the *gnatbind -d* command. The specified size will
+become the reserved memory size of the underlying thread.
 
 Since very old versions of Windows (2000, NT4, etc.) don't allow setting the
-reserve size of individual tasks, the link-time stack size applies to all
-tasks, and pragma Storage_Size has no effect.
+reserve size of individual tasks, for those versions the link-time stack size
+applies to all tasks, and pragma Storage_Size has no effect.
 In particular, Stack Overflow checks are made against this
 link-time specified size.
 
diff --git a/gcc/ada/gnat-style.texi b/gcc/ada/gnat-style.texi
index dde6ec4a6e7d..0880400bd28a 100644
--- a/gcc/ada/gnat-style.texi
+++ b/gcc/ada/gnat-style.texi
@@ -3,7 +3,7 @@
 @setfilename gnat-style.info
 @documentencoding UTF-8
 @ifinfo
-@*Generated by Sphinx 8.0.2.@*
+@*Generated by Sphinx 8.2.3.@*
 @end ifinfo
 @settitle GNAT Coding Style A Guide for GNAT Developers
 @defindex ge
@@ -19,7 +19,7 @@
 
 @copying
 @quotation
-GNAT Coding Style: A Guide for GNAT Developers , Jan 03, 2025
+GNAT Coding Style: A Guide for GNAT Developers , Jun 02, 2025
 
 AdaCore
 
diff --git a/gcc/ada/gnat_rm.texi b/gcc/ada/gnat_rm.texi
index 97469d739520..00236ee6c5ca 100644
--- a/gcc/ada/gnat_rm.texi
+++ b/gcc/ada/gnat_rm.texi
@@ -3,7 +3,7 @@
 @setfilename gnat_rm.info
 @documentencoding UTF-8
 @ifinfo
-@*Generated by Sphinx 8.0.2.@*
+@*Generated by Sphinx 8.2.3.@*
 @end ifinfo
 @settitle GNAT Reference Manual
 @defindex ge
@@ -19,7 +19,7 @@
 
 @copying
 @quotation
-GNAT Reference Manual , Jan 03, 2025
+GNAT Reference Manual , Jun 02, 2025
 
 AdaCore
 
@@ -4682,8 +4682,8 @@ pragma Interrupt_State
 Normally certain interrupts are reserved to the implementation.  Any attempt
 to attach an interrupt causes Program_Error to be raised, as described in
 RM C.3.2(22).  A typical example is the @code{SIGINT} interrupt used in
-many systems for an @code{Ctrl-C} interrupt.  Normally this interrupt is
-reserved to the implementation, so that @code{Ctrl-C} can be used to
+many systems for an @code{Ctrl}-@code{C} interrupt.  Normally this interrupt is
+reserved to the implementation, so that @code{Ctrl}-@code{C} can be used to
 interrupt execution.  Additionally, signals such as @code{SIGSEGV},
 @code{SIGABRT}, @code{SIGFPE} and @code{SIGILL} are often mapped to specific
 Ada exceptions, or used to implement run-time functions such as the
@@ -8837,15 +8837,15 @@ pragma Unreserve_All_Interrupts;
 Normally certain interrupts are reserved to the implementation.  Any attempt
 to attach an interrupt causes Program_Error to be raised, as described in
 RM C.3.2(22).  A typical example is the @code{SIGINT} interrupt used in
-many systems for a @code{Ctrl-C} interrupt.  Normally this interrupt is
-reserved to the implementation, so that @code{Ctrl-C} can be used to
+many systems for a @code{Ctrl}-@code{C} interrupt.  Normally this interrupt is
+reserved to the implementation, so that @code{Ctrl}-@code{C} can be used to
 interrupt execution.
 
 If the pragma @code{Unreserve_All_Interrupts} appears anywhere in any unit in
 a program, then all such interrupts are unreserved.  This allows the
 program to handle these interrupts, but disables their standard

[gcc r16-1129] ada: Compiler crash on array aggregate association iterating over function result

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:1869441107b42ab00e8ea3d69c496dfb1cb9aecd

commit r16-1129-g1869441107b42ab00e8ea3d69c496dfb1cb9aecd
Author: Gary Dismukes 
Date:   Fri Jan 10 22:39:52 2025 +

ada: Compiler crash on array aggregate association iterating over function 
result

The compiler triggers a bug box when compiling an array aggregate with
an iterated_component_association that iterates over another array object,
failing when trying to retrieve a Choices field, which isn't an allowed
field for N_Iterated_Component_Association nodes. This occurs in procedure
Check_Function_Writable_Actuals, which wasn't accounting for the iterated
association forms.

gcc/ada/ChangeLog:

* sem_util.adb (Check_Function_Writable_Actuals): Add handling for
N_Iterated_Component_Association and N_Iterated_Element_Association.
Fix a typo in an RM reference (6.4.1(20/3) => 6.4.1(6.20/3)).
(Collect_Expression_Ids): New procedure factoring code for 
collecting
identifiers from expressions of aggregate associations.
(Handle_Association_Choices): New procedure factoring code for 
handling
id collection for expressions of aggregate associations with 
multiple
choices. Removed redundant test of Box_Present from original code.

Diff:
---
 gcc/ada/sem_util.adb | 115 ++-
 1 file changed, 86 insertions(+), 29 deletions(-)

diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index 0e1505bbdbe6..5f9f2755c949 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -3025,7 +3025,7 @@ package body Sem_Util is
 
--  For an array aggregate, a discrete_choice_list that has
--  a nonstatic range is considered as two or more separate
-   --  occurrences of the expression (RM 6.4.1(20/3)).
+   --  occurrences of the expression (RM 6.4.1(6.20/3)).
 
elsif Is_Array_Type (Etype (N))
  and then Nkind (N) = N_Aggregate
@@ -3110,48 +3110,105 @@ package body Sem_Util is
   end loop;
end if;
 
-   --  Handle discrete associations
+   --  Handle named associations
 
if Present (Component_Associations (N)) then
   Assoc := First (Component_Associations (N));
   while Present (Assoc) loop
 
- if not Box_Present (Assoc) then
-Choice := First (Choices (Assoc));
-while Present (Choice) loop
+ Handle_Association : declare
 
-   --  For now we skip discriminants since it requires
-   --  performing the analysis in two phases: first one
-   --  analyzing discriminants and second one analyzing
-   --  the rest of components since discriminants are
-   --  evaluated prior to components: too much extra
-   --  work to detect a corner case???
+procedure Collect_Expression_Ids (Expr : Node_Id);
+--  Collect identifiers in association expression Expr
 
-   if Nkind (Choice) in N_Has_Entity
- and then Present (Entity (Choice))
- and then Ekind (Entity (Choice)) = E_Discriminant
-   then
-  null;
+procedure Handle_Association_Choices
+  (Choices : List_Id; Expr : Node_Id);
+--  Collect identifiers in an association expression
+--  Expr for each choice in Choices.
 
-   elsif Box_Present (Assoc) then
-  null;
+
+-- Collect_Expression_Ids --
+
 
+procedure Collect_Expression_Ids (Expr : Node_Id) is
+   Comp_Expr : Node_Id;
+
+begin
+   if not Analyzed (Expr) then
+  Comp_Expr := New_Copy_Tree (Expr);
+  Set_Parent (Comp_Expr, Parent (N));
+  Preanalyze_Without_Errors (Comp_Expr);
else
-  if not Analyzed (Expression (Assoc)) then
- Comp_Expr :=
-   New_Copy_Tree (Expression (Assoc));
- Set_Parent (Comp_Expr, Parent (N));
- Preanalyze_Without_Errors (Comp_Expr);
+  Comp_Expr := Expr;
+   end if;
+
+

[gcc r16-1136] ada: Fix Generate_Minimal_Reproducer on instantiations

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:2f65e9eaafbc5aec42fbb3bf0a01c1a930e8ac9e

commit r16-1136-g2f65e9eaafbc5aec42fbb3bf0a01c1a930e8ac9e
Author: Ronan Desplanques 
Date:   Wed Jan 15 09:54:45 2025 +0100

ada: Fix Generate_Minimal_Reproducer on instantiations

Before this patch, the code that creates a copy of the semantic closure
with the default naming convention was incorrect when the compiler was
processing a library unit that was an instantiation of a generic with a
body. This patch adds code to detect that situation and adjusts the
copying process accordingly.

gcc/ada/ChangeLog:

* generate_minimal_reproducer.adb (Generate_Minimal_Reproducer):
Fix when main library item is an instantiation.

Diff:
---
 gcc/ada/generate_minimal_reproducer.adb | 41 ++---
 1 file changed, 33 insertions(+), 8 deletions(-)

diff --git a/gcc/ada/generate_minimal_reproducer.adb 
b/gcc/ada/generate_minimal_reproducer.adb
index 66d34fe1a4f3..d13709af6bba 100644
--- a/gcc/ada/generate_minimal_reproducer.adb
+++ b/gcc/ada/generate_minimal_reproducer.adb
@@ -23,16 +23,18 @@
 --  --
 --
 
+with Atree;
 with Fmap;
 with Fname.UF;
 with Lib;
-with Namet; use Namet;
-with Osint; use Osint;
-with Output; use Output;
-with Sinfo.Nodes;
+with Namet; use Namet;
+with Osint; use Osint;
+with Output;use Output;
+with Sinfo.Nodes;   use Sinfo.Nodes;
 with System.CRTL;
 with System.OS_Lib; use System.OS_Lib;
-with Types; use Types;
+with Types; use Types;
+with Uname;
 
 procedure Generate_Minimal_Reproducer is
Reproducer_Generation_Failed : exception;
@@ -85,6 +87,26 @@ procedure Generate_Minimal_Reproducer is
Oracle_Path : constant String :=
  Dirname & Directory_Separator & Executable_Name ("oracle");
 
+   Main_Library_Item : constant Node_Id := Unit (Lib.Cunit (Main_Unit));
+
+   --  There is a special case that we need to detect: when the main library
+   --  item is the instantiation of a generic that has a body, and the
+   --  instantiation of generic bodies has started. We start by binding whether
+   --  the main library item is an instantiation to the following constant.
+   Main_Is_Instantiation : constant Boolean :=
+ Nkind (Atree.Original_Node (Main_Library_Item))
+ in N_Generic_Instantiation;
+
+   --  If the main library item is an instantiation and its unit name is a body
+   --  name, it means that Make_Instance_Unit has been called. We need to use
+   --  the corresponding spec name to reconstruct the on-disk form of the
+   --  semantic closure.
+   Main_Unit_Name : constant Unit_Name_Type :=
+ (if Main_Is_Instantiation
+and then Uname.Is_Body_Name (Lib.Unit_Name (Main_Unit))
+  then Uname.Get_Spec_Name (Lib.Unit_Name (Main_Unit))
+  else Lib.Unit_Name (Main_Unit));
+
Result : Integer;
 begin
Create_Semantic_Closure_Project :
@@ -122,8 +144,11 @@ begin
 Path : File_Name_Type :=
   Fmap.Mapped_Path_Name (Lib.Unit_File_Name (J));
 
+Unit_Name : constant Unit_Name_Type :=
+  (if J = Main_Unit then Main_Unit_Name else Lib.Unit_Name (J));
+
 Default_File_Name : constant String :=
-  Fname.UF.Get_Default_File_Name (Lib.Unit_Name (J));
+  Fname.UF.Get_Default_File_Name (Unit_Name);
 
 File_Copy_Path : constant String :=
   Src_Dir_Path & Directory_Separator & Default_File_Name;
@@ -132,7 +157,7 @@ begin
 --  spec files. We need to filter out those units because we would
 --  create bogus spec files that break compilation if we didn't.
 Is_Synthetic_Subprogram_Spec : constant Boolean :=
-  not Sinfo.Nodes.Comes_From_Source (Lib.Cunit (J));
+  not Comes_From_Source (Lib.Cunit (J));
  begin
 if not Lib.Is_Internal_Unit (J)
   and then not Is_Synthetic_Subprogram_Spec
@@ -197,7 +222,7 @@ begin
  (Fmap.Mapped_Path_Name (Lib.Unit_File_Name (Main_Unit)));
 
  Default_Main_Name : constant String :=
-   Fname.UF.Get_Default_File_Name (Lib.Unit_Name (Main_Unit));
+   Fname.UF.Get_Default_File_Name (Main_Unit_Name);
 
  New_Main_Path : constant String :=
Src_Dir_Path & Directory_Separator & Default_Main_Name;

[gcc r16-1137] ada: Fix adareducer oracle generation

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:f606f2417b33d88f70b735c1f94f52de5d121ae7

commit r16-1137-gf606f2417b33d88f70b735c1f94f52de5d121ae7
Author: Ronan Desplanques 
Date:   Wed Jan 15 09:57:10 2025 +0100

ada: Fix adareducer oracle generation

This patch adds a missing "-quiet" switch to the compiler invocations
performed by generated oracles. Without that switch, log lines could be
present before bug boxes for crashes in gigi and that caused the crash
detection logic to fail.

gcc/ada/ChangeLog:

* generate_minimal_reproducer.adb (Generate_Minimal_Reproducer): Fix
oracle generation.

Diff:
---
 gcc/ada/generate_minimal_reproducer.adb | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/generate_minimal_reproducer.adb 
b/gcc/ada/generate_minimal_reproducer.adb
index d13709af6bba..2378f60c4729 100644
--- a/gcc/ada/generate_minimal_reproducer.adb
+++ b/gcc/ada/generate_minimal_reproducer.adb
@@ -253,7 +253,8 @@ begin
  Write_Eol;
  Write_Line ("   Args : constant GNAT.OS_Lib.Argument_List :=");
 
- Write_Str (" (new String'(""-gnatd_M"")");
+ Write_Str
+   (" (new String'(""-quiet""), new String'(""-gnatd_M"")");
 
  --  The following way of iterating through the command line arguments
  --  was copied from Set_Targ. TODO factorize???

[gcc r16-1139] ada: Fix buffer overflow for function call returning discriminated limited record

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:484795c24b2f4629db8b91e37656c0e6bd514156

commit r16-1139-g484795c24b2f4629db8b91e37656c0e6bd514156
Author: Eric Botcazou 
Date:   Wed Jan 15 20:37:48 2025 +0100

ada: Fix buffer overflow for function call returning discriminated limited 
record

This occurs when the discriminated limited record type is declared with
default values for its discriminants, is not controlled, and the context
of the call is anonymous, i.e. the result of the call is not assigned
to an object.  In this case, a temporary is created to hold the result
of the call, with the default values of the discriminants, but the result
may have different values for the discriminants and, in particular, may
be larger than the temporary, which leads to a buffer overflow.

This problem does not occur when the context is an object declaration, so
the fix just makes sure that the expansion in an anonymous context always
uses the model of an object declaration.  It requires a minor tweak to the
helper function Entity_Of of the Sem_Util package.

gcc/ada/ChangeLog:

* exp_ch6.adb (Expand_Actuals): Remove obsolete comment.
(Make_Build_In_Place_Call_In_Anonymous_Context): Always use a proper
object declaration initialized with the function call in the cases
where a temporary is needed, with Assignment_OK set on it.
* sem_util.adb (Entity_Of): Deal with rewritten function call first.

Diff:
---
 gcc/ada/exp_ch6.adb  | 100 +--
 gcc/ada/sem_util.adb |  18 +-
 2 files changed, 33 insertions(+), 85 deletions(-)

diff --git a/gcc/ada/exp_ch6.adb b/gcc/ada/exp_ch6.adb
index 7e464541be25..d5667b423deb 100644
--- a/gcc/ada/exp_ch6.adb
+++ b/gcc/ada/exp_ch6.adb
@@ -2470,11 +2470,6 @@ package body Exp_Ch6 is
 --  (and ensure that we have an activation chain defined for tasks
 --  and a Master variable).
 
---  Currently we limit such functions to those with inherently
---  limited result subtypes, but eventually we plan to expand the
---  functions that are treated as build-in-place to include other
---  composite result types.
-
 --  But do not do it here for intrinsic subprograms since this will
 --  be done properly after the subprogram is expanded.
 
@@ -8562,12 +8557,10 @@ package body Exp_Ch6 is
procedure Make_Build_In_Place_Call_In_Anonymous_Context
  (Function_Call : Node_Id)
is
-  Loc : constant Source_Ptr := Sloc (Function_Call);
-  Func_Call   : constant Node_Id := Unqual_Conv (Function_Call);
-  Function_Id : Entity_Id;
-  Result_Subt : Entity_Id;
-  Return_Obj_Id   : Entity_Id;
-  Return_Obj_Decl : Entity_Id;
+  Loc : constant Source_Ptr := Sloc (Function_Call);
+  Func_Call   : constant Node_Id:= Unqual_Conv (Function_Call);
+  Function_Id : Entity_Id;
+  Result_Subt : Entity_Id;
 
begin
   --  If the call has already been processed to add build-in-place actuals
@@ -8580,10 +8573,6 @@ package body Exp_Ch6 is
  return;
   end if;
 
-  --  Mark the call as processed as a build-in-place call
-
-  Set_Is_Expanded_Build_In_Place_Call (Func_Call);
-
   if Is_Entity_Name (Name (Func_Call)) then
  Function_Id := Entity (Name (Func_Call));
 
@@ -8601,8 +8590,13 @@ package body Exp_Ch6 is
   --  If the build-in-place function returns a controlled object, then the
   --  object needs to be finalized immediately after the context. Since
   --  this case produces a transient scope, the servicing finalizer needs
-  --  to name the returned object. Create a temporary which is initialized
-  --  with the function call:
+  --  to name the returned object.
+
+  --  If the build-in-place function returns a definite subtype, then an
+  --  object also needs to be created and an access value designating it
+  --  passed as an actual.
+
+  --  Create a temporary which is initialized with the function call:
   --
   --Temp_Id : Func_Type := BIP_Func_Call;
   --
@@ -8610,75 +8604,25 @@ package body Exp_Ch6 is
   --  the expander using the appropriate mechanism in Make_Build_In_Place_
   --  Call_In_Object_Declaration.
 
-  if Needs_Finalization (Result_Subt) then
+  if Needs_Finalization (Result_Subt)
+or else Caller_Known_Size (Func_Call, Result_Subt)
+  then
  declare
 Temp_Id   : constant Entity_Id := Make_Temporary (Loc, 'R');
-Temp_Decl : Node_Id;
-
- begin
---  Reset the guard on the function call since the following does
---  not perform actual call expansion.
-
-Set_Is_Expanded_Build_In_Place_Call (Func_Call, False);
-
-Temp_Decl :=
+Temp_Decl : constant Node_Id

[gcc r16-1145] ada: Fix unnecessarily large allocation in New_String

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:d8610fb01b7a380acdd5872f4eb080599643f903

commit r16-1145-gd8610fb01b7a380acdd5872f4eb080599643f903
Author: Ronan Desplanques 
Date:   Mon Jan 20 13:37:08 2025 +0100

ada: Fix unnecessarily large allocation in New_String

This patches fixes an issue where Interfaces.C.Strings.New_String
allocates more memory than necessary when passed a string that contains
a NUL character.

gcc/ada/ChangeLog:

* libgnat/i-cstrin.adb (New_String): Fix size of allocation.

Diff:
---
 gcc/ada/libgnat/i-cstrin.adb | 35 ---
 1 file changed, 24 insertions(+), 11 deletions(-)

diff --git a/gcc/ada/libgnat/i-cstrin.adb b/gcc/ada/libgnat/i-cstrin.adb
index 6d329254aff3..974ba3a0e8ca 100644
--- a/gcc/ada/libgnat/i-cstrin.adb
+++ b/gcc/ada/libgnat/i-cstrin.adb
@@ -153,20 +153,33 @@ is
   --  the result, and doesn't copy the string on the stack, otherwise its
   --  use is limited when used from tasks on large strings.
 
-  Result : constant chars_ptr := Memory_Alloc (Str'Length + 1);
+  Len : Natural := 0;
+  --  Length of the longest prefix of Str that doesn't contain NUL
 
-  Result_Array : char_array  (1 .. Str'Length + 1);
-  for Result_Array'Address use To_Address (Result);
-  pragma Import (Ada, Result_Array);
+  Result : chars_ptr;
+   begin
+  for C of Str loop
+ if C = ASCII.NUL then
+exit;
+ end if;
+ Len := Len + 1;
+  end loop;
 
-  Count : size_t;
+  Result := Memory_Alloc (size_t (Len) + 1);
+
+  declare
+ Result_Array : char_array (1 .. size_t (Len) + 1)
+ with Address => To_Address (Result), Import, Convention => Ada;
+
+ Count : size_t;
+  begin
+ To_C
+   (Item   => Str (Str'First .. Str'First + Len - 1),
+Target => Result_Array,
+Count  => Count,
+Append_Nul => True);
+  end;
 
-   begin
-  To_C
-(Item   => Str,
- Target => Result_Array,
- Count  => Count,
- Append_Nul => True);
   return Result;
end New_String;

[gcc r16-1135] ada: Fix compile-time failure due to duplicated attribute subprograms.

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:755f3d9ba29953f2bee6e46644a5233b31ea2f4f

commit r16-1135-g755f3d9ba29953f2bee6e46644a5233b31ea2f4f
Author: Steve Baird 
Date:   Mon Jan 13 14:18:26 2025 -0800

ada: Fix compile-time failure due to duplicated attribute subprograms.

For a given type, and for certain attributes (the 4 streaming attributes
and, for Ada2022, the Put_Image attribute), the compiler needs to keep track
of whether a subprogram has already been generated for the given
type/attribute pair. In some cases this was being done incorrectly;
the compiler ended up generating duplicate subprograms (with the same
name), resulting in compilation failures. This could occur if the prefix
of an attribute reference denoted a subtype (more precisely, a non-first
subtype). This includes the case of a subtype declaration that is implicitly
introduced by the compiler to capture the binding between a formal type
in a generic and the corresponding actual type in an instantiation.

gcc/ada/ChangeLog:

* exp_attr.adb (Expand_N_Attribute_Reference): When accessing the
maps declared in package Cached_Attribute_Ops, the key value
passed to Get or to Set should never be the entity node for a
subtype. Use the entity of the corresponding type declaration
instead.

Diff:
---
 gcc/ada/exp_attr.adb | 39 ---
 1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/gcc/ada/exp_attr.adb b/gcc/ada/exp_attr.adb
index b896228a70e3..aea9e8ad3afd 100644
--- a/gcc/ada/exp_attr.adb
+++ b/gcc/ada/exp_attr.adb
@@ -88,8 +88,10 @@ package body Exp_Attr is
   function Attribute_Op_Hash (Id : Entity_Id) return Header_Num is
 (Header_Num (Id mod Map_Size));
 
-  --  Cache used to avoid building duplicate subprograms for a single
-  --  type/streaming-attribute pair.
+  --  Caches used to avoid building duplicate subprograms for a single
+  --  type/attribute pair (where the attribute is either Put_Image or
+  --  one of the four streaming attributes). The type used as a key in
+  --  in accessing these maps should not be the entity of a subtype.
 
   package Read_Map is new GNAT.HTable.Simple_HTable
 (Header_Num => Header_Num,
@@ -4669,7 +4671,7 @@ package body Exp_Attr is
  end if;
 
  if not Is_Tagged_Type (P_Type) then
-Cached_Attribute_Ops.Input_Map.Set (P_Type, Fname);
+Cached_Attribute_Ops.Input_Map.Set (U_Type, Fname);
  end if;
   end Input;
 
@@ -5750,7 +5752,7 @@ package body Exp_Attr is
  Rewrite_Attribute_Proc_Call (Pname);
 
  if not Is_Tagged_Type (P_Type) then
-Cached_Attribute_Ops.Output_Map.Set (P_Type, Pname);
+Cached_Attribute_Ops.Output_Map.Set (U_Type, Pname);
  end if;
   end Output;
 
@@ -6669,7 +6671,7 @@ package body Exp_Attr is
  Rewrite_Attribute_Proc_Call (Pname);
 
  if not Is_Tagged_Type (P_Type) then
-Cached_Attribute_Ops.Read_Map.Set (P_Type, Pname);
+Cached_Attribute_Ops.Read_Map.Set (U_Type, Pname);
  end if;
   end Read;
 
@@ -8349,7 +8351,7 @@ package body Exp_Attr is
  Rewrite_Attribute_Proc_Call (Pname);
 
  if not Is_Tagged_Type (P_Type) then
-Cached_Attribute_Ops.Write_Map.Set (P_Type, Pname);
+Cached_Attribute_Ops.Write_Map.Set (U_Type, Pname);
  end if;
   end Write;
 
@@ -8951,15 +8953,22 @@ package body Exp_Attr is
  return Empty;
   end if;
 
-  if Nam = TSS_Stream_Read then
- Ent := Cached_Attribute_Ops.Read_Map.Get (Typ);
-  elsif Nam = TSS_Stream_Write then
- Ent := Cached_Attribute_Ops.Write_Map.Get (Typ);
-  elsif Nam = TSS_Stream_Input then
- Ent := Cached_Attribute_Ops.Input_Map.Get (Typ);
-  elsif Nam = TSS_Stream_Output then
- Ent := Cached_Attribute_Ops.Output_Map.Get (Typ);
-  end if;
+  declare
+ function U_Base return Entity_Id is
+   (Underlying_Type (Base_Type (Typ)));
+ --  Return the right type node for use in a C_A_O map lookup.
+ --  In particular, we do not want the entity for a subtype.
+  begin
+ if Nam = TSS_Stream_Read then
+Ent := Cached_Attribute_Ops.Read_Map.Get (U_Base);
+ elsif Nam = TSS_Stream_Write then
+Ent := Cached_Attribute_Ops.Write_Map.Get (U_Base);
+ elsif Nam = TSS_Stream_Input then
+Ent := Cached_Attribute_Ops.Input_Map.Get (U_Base);
+ elsif Nam = TSS_Stream_Output then
+Ent := Cached_Attribute_Ops.Output_Map.Get (U_Base);
+ end if;
+  end;
 
   Cached_Attribute_Ops.Validate_Cached_Candidate
 (Subp => Ent, Attr_Ref => Attr_Ref);

[gcc r16-1134] ada: Mark constants inside a declare expression as referenced

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:453724978e48cc0fb9854cbb961ba2cd96192ba8

commit r16-1134-g453724978e48cc0fb9854cbb961ba2cd96192ba8
Author: Viljar Indus 
Date:   Tue Jan 14 13:31:04 2025 +0200

ada: Mark constants inside a declare expression as referenced

Expressions within a declare expression were simply bound to
locally defined constants. However they were never marked as
referenced. This would trigger an unreferenced constant warning
if -gnatwu was used.

gcc/ada/ChangeLog:

* sem_res.adb (Resolve_Declare_Expression): Mark used
local variables inside a declare expression as referenced.

Diff:
---
 gcc/ada/sem_res.adb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
index bbf7bb95ed84..865f967a5b93 100644
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -7806,6 +7806,7 @@ package body Sem_Res is
  then
 Set_Entity (N, Local);
 Set_Etype (N, Etype (Local));
+Generate_Reference (Local, N);
  end if;
 
  return OK;

[gcc r16-1146] ada: Fix various issues in the SARIF report

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:64d277b6b823966fefd2818005de1789de9ca016

commit r16-1146-g64d277b6b823966fefd2818005de1789de9ca016
Author: Viljar Indus 
Date:   Mon Jan 20 20:04:59 2025 +0200

ada: Fix various issues in the SARIF report

gcc/ada/ChangeLog:

* diagnostics-sarif_emitter.adb (Print_Invocations): fix
commandLine and executionSuccessful nodes.
Fix typo in the name for startLine.
* osint.adb (Modified Get_Current_Dir) Fix generation of
the current directory.
(Relative_Path): Avoid relative paths starting with a
path separator.
* osint.ads: Update the documentation for Relative_Path.

Diff:
---
 gcc/ada/diagnostics-sarif_emitter.adb |  7 +--
 gcc/ada/osint.adb | 22 ++
 gcc/ada/osint.ads |  5 +
 3 files changed, 28 insertions(+), 6 deletions(-)

diff --git a/gcc/ada/diagnostics-sarif_emitter.adb 
b/gcc/ada/diagnostics-sarif_emitter.adb
index bae2dc0a88e6..d7f923437012 100644
--- a/gcc/ada/diagnostics-sarif_emitter.adb
+++ b/gcc/ada/diagnostics-sarif_emitter.adb
@@ -66,7 +66,7 @@ package body Diagnostics.SARIF_Emitter is
N_RUNS  : constant String := "runs";
N_SCHEMA: constant String := "$schema";
N_START_COLUMN  : constant String := "startColumn";
-   N_START_LINE: constant String := "strartLine";
+   N_START_LINE: constant String := "startLine";
N_TEXT  : constant String := "text";
N_TOOL  : constant String := "tool";
N_URI   : constant String := "uri";
@@ -687,6 +687,9 @@ package body Diagnostics.SARIF_Emitter is
   function Compose_Command_Line return String is
  Buffer : Bounded_String;
   begin
+ Find_Program_Name;
+ Append (Buffer, Name_Buffer (1 .. Name_Len));
+ Append (Buffer, ' ');
  Append (Buffer, Get_First_Main_File_Name);
  for I in 1 .. Compilation_Switches_Last loop
 declare
@@ -718,7 +721,7 @@ package body Diagnostics.SARIF_Emitter is
 
   --  Print executionSuccessful
 
-  Write_Boolean_Attribute (N_EXECUTION_SUCCESSFUL, Compilation_Errors);
+  Write_Boolean_Attribute (N_EXECUTION_SUCCESSFUL, not Compilation_Errors);
 
   End_Block;
   NL_And_Indent;
diff --git a/gcc/ada/osint.adb b/gcc/ada/osint.adb
index 46334aa97af1..26b0dbb1ae46 100644
--- a/gcc/ada/osint.adb
+++ b/gcc/ada/osint.adb
@@ -1439,11 +1439,17 @@ package body Osint is
-
 
function Get_Current_Dir return String is
-  Current_Dir : String (1 .. Max_Path + 1);
-  Last: Natural;
+  Path_Len : Natural := Max_Path;
+  Buffer   : String (1 .. 1 + Max_Path + 1);
+
begin
-  Get_Current_Dir (Current_Dir'Address, Last'Address);
-  return Current_Dir (1 .. Last);
+  Get_Current_Dir (Buffer'Address, Path_Len'Address);
+
+  if Path_Len = 0 then
+ raise Program_Error;
+  end if;
+
+  return Buffer (1 .. Path_Len);
end Get_Current_Dir;
 
---
@@ -2801,6 +2807,14 @@ package body Osint is
  Append (Rel_Path, ".." & System.OS_Lib.Directory_Separator);
   end loop;
 
+  --  Avoid starting the relative path with a directory separator
+
+  if Last < Norm_Path'Length
+and then Is_Directory_Separator (Norm_Path (Norm_Path'First + Last))
+  then
+ Last := Last + 1;
+  end if;
+
   --  Add the rest of the path from the common point
 
   Append
diff --git a/gcc/ada/osint.ads b/gcc/ada/osint.ads
index 5dbbfd8fd7ff..77aaf04a7712 100644
--- a/gcc/ada/osint.ads
+++ b/gcc/ada/osint.ads
@@ -236,6 +236,11 @@ package Osint is
function Relative_Path (Path : String; Ref : String) return String;
--  Given an absolute path Path calculate its relative path from a reference
--  directory Ref.
+   --
+   --  If the paths are the same it will return ".".
+   --
+   --  If the paths are on different drives on Windows based systems then it
+   --  will return the normalized version of Path.
 
function Relocate_Path
  (Prefix : String;

[gcc r16-1144] ada: Implement use implies with experimental extension

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:83790d83c9f3eb0c2819d0e22e529cf785c71bd9

commit r16-1144-g83790d83c9f3eb0c2819d0e22e529cf785c71bd9
Author: squirek 
Date:   Fri Jan 17 15:38:43 2025 +

ada: Implement use implies with experimental extension

The patch implements the experimental feature to allow use package
clauses within the context area to imply with.

gcc/ada/ChangeLog:

* sem_ch8.adb (Analyze_Package_Name): Add code to expand use
clauses such that they have an implicit with associated with them
when extensions are enabled.
* sem_ch10.ads (Analyze_With_Clause): New.
* sem_ch10.adb (Analyze_With_Clause): Add comes from source check
for warning.
(Expand_With_Clause): Moved to the spec.
* sem_util.adb, sem_util.ads
(Is_In_Context_Clause): Moved from sem_prag.
* sem_prag.adb (Analyze_Pragma): Update calls to
Is_In_Context_Clause.
(Is_In_Context_Clause): Moved to sem_util.

Diff:
---
 gcc/ada/sem_ch10.adb | 10 +-
 gcc/ada/sem_ch10.ads |  9 +
 gcc/ada/sem_ch8.adb  | 39 +++
 gcc/ada/sem_prag.adb | 31 +++
 gcc/ada/sem_util.adb | 21 +
 gcc/ada/sem_util.ads |  4 
 6 files changed, 77 insertions(+), 37 deletions(-)

diff --git a/gcc/ada/sem_ch10.adb b/gcc/ada/sem_ch10.adb
index de5a8c846ba7..9af96fc41b6b 100644
--- a/gcc/ada/sem_ch10.adb
+++ b/gcc/ada/sem_ch10.adb
@@ -123,15 +123,6 @@ package body Sem_Ch10 is
--  Verify that a stub is declared immediately within a compilation unit,
--  and not in an inner frame.
 
-   procedure Expand_With_Clause (Item : Node_Id; Nam : Node_Id; N : Node_Id);
-   --  When a child unit appears in a context clause, the implicit withs on
-   --  parents are made explicit, and with clauses are inserted in the context
-   --  clause before the one for the child. If a parent in the with_clause
-   --  is a renaming, the implicit with_clause is on the renaming whose name
-   --  is mentioned in the with_clause, and not on the package it renames.
-   --  N is the compilation unit whose list of context items receives the
-   --  implicit with_clauses.
-
procedure Generate_Parent_References (N : Node_Id; P_Id : Entity_Id);
--  Generate cross-reference information for the parents of child units
--  and of subunits. N is a defining_program_unit_name, and P_Id is the
@@ -2955,6 +2946,7 @@ package body Sem_Ch10 is
 
   if Ada_Version >= Ada_95
 and then In_Predefined_Renaming (U)
+and then Comes_From_Source (N)
   then
  if Restriction_Check_Required (No_Obsolescent_Features) then
 Check_Restriction (No_Obsolescent_Features, N);
diff --git a/gcc/ada/sem_ch10.ads b/gcc/ada/sem_ch10.ads
index c80c41295064..9585785f10a6 100644
--- a/gcc/ada/sem_ch10.ads
+++ b/gcc/ada/sem_ch10.ads
@@ -45,6 +45,15 @@ package Sem_Ch10 is
--  set when Ent is a tagged type and its class-wide type needs to appear
--  in the tree.
 
+   procedure Expand_With_Clause (Item : Node_Id; Nam : Node_Id; N : Node_Id);
+   --  When a child unit appears in a context clause, the implicit withs on
+   --  parents are made explicit, and with clauses are inserted in the context
+   --  clause before the one for the child. If a parent in the with_clause
+   --  is a renaming, the implicit with_clause is on the renaming whose name
+   --  is mentioned in the with_clause, and not on the package it renames.
+   --  N is the compilation unit whose list of context items receives the
+   --  implicit with_clauses.
+
procedure Install_Context (N : Node_Id; Chain : Boolean := True);
--  Installs the entities from the context clause of the given compilation
--  unit into the visibility chains. This is done before analyzing a unit.
diff --git a/gcc/ada/sem_ch8.adb b/gcc/ada/sem_ch8.adb
index 6fb9a9a1f5a7..65d30967ae02 100644
--- a/gcc/ada/sem_ch8.adb
+++ b/gcc/ada/sem_ch8.adb
@@ -77,6 +77,7 @@ with Style;
 with Table;
 with Tbuild; use Tbuild;
 with Uintp;  use Uintp;
+with Uname;  use Uname;
 with Warnsw; use Warnsw;
 
 package body Sem_Ch8 is
@@ -4300,6 +4301,44 @@ package body Sem_Ch8 is
 
   begin
  pragma Assert (Nkind (Clause) = N_Use_Package_Clause);
+
+ --  Perform "use implies with" expansion (when extensions are enabled)
+ --  by inserting an extra with clause since redundant clauses don't
+ --  really matter.
+
+ if All_Extensions_Allowed and then Is_In_Context_Clause (Clause) then
+declare
+   Unum: Unit_Number_Type;
+   With_Clause : constant Node_Id :=
+ Make_With_Clause (Sloc (Clause),
+   Name => New_Copy_Tree (Pack));
+begin
+   --  Attempt to load the unit mentioned in the use clause
+
+   Unum := 

[gcc r16-1147] ada: Add error message for a declared-too-late abstract state constituent

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:2172d3efbc6ad5fad78288ece54cd0149838e8cf

commit r16-1147-g2172d3efbc6ad5fad78288ece54cd0149838e8cf
Author: Steve Baird 
Date:   Tue Jan 14 15:53:57 2025 -0800

ada: Add error message for a declared-too-late abstract state constituent

In the error case of an undefined abstract state constituent, we want to
help users distinguish between the case where the constituent is
"really" undefined versus being defined "too late" (i.e., after a body).
So in the latter case we generate an additional message.

gcc/ada/ChangeLog:

* sem_prag.adb
(Analyze_Constituent): In the specific case case of a 
defined-too-late
abstract state constituent, generate an additional error message.

Diff:
---
 gcc/ada/sem_prag.adb | 79 +---
 1 file changed, 56 insertions(+), 23 deletions(-)

diff --git a/gcc/ada/sem_prag.adb b/gcc/ada/sem_prag.adb
index dcee8600d7c3..83aae7c89a62 100644
--- a/gcc/ada/sem_prag.adb
+++ b/gcc/ada/sem_prag.adb
@@ -30940,34 +30940,67 @@ package body Sem_Prag is
   --end Pack;
 
   if Constit_Id = Any_Id then
- SPARK_Msg_NE ("& is undefined", Constit, Constit_Id);
+ --  A "Foo is undefined" message has already been
+ --  generated for this constituent. Emit an additional
+ --  message in the special case where the named
+ --  would-be constituent was declared too late in the
+ --  declaration list (as opposed to, for example, not
+ --  being declared at all).
+
+ --  Look for named constituent after freezing point
+ if Present (Freeze_Id) then
+declare
+   Decl : Node_Id;
+begin
+   Decl := Enclosing_Declaration (Freeze_Id);
 
- --  Emit a specialized info message when the contract of
- --  the related package body was "frozen" by another body.
- --  Note that it is not possible to precisely identify why
- --  the constituent is undefined because it is not visible
- --  when pragma Refined_State is analyzed. This message is
- --  a reasonable approximation.
+   while Present (Decl) loop
+  if Nkind (Decl) = N_Object_Declaration
+and then Same_Name (Defining_Identifier (Decl),
+Constit)
+and then not Constant_Present (Decl)
+  then
+ Error_Msg_Node_1 := Constit;
+ Error_Msg_Sloc :=
+   Sloc (Defining_Identifier (Decl));
 
- if Present (Freeze_Id) and then not Freeze_Posted then
-Freeze_Posted := True;
+ SPARK_Msg_NE
+  ("abstract state constituent & declared"
+   & " too late #!", Constit, Constit);
 
-Error_Msg_Name_1 := Chars (Body_Id);
-Error_Msg_Sloc   := Sloc (Freeze_Id);
-SPARK_Msg_NE
-  ("body & declared # freezes the contract of %",
-   N, Freeze_Id);
-SPARK_Msg_N
-  ("\all constituents must be declared before body #",
-   N);
+ exit;
+  end if;
+  Next (Decl);
+   end loop;
+end;
+
+--  Emit a specialized info message when the contract
+--  of the related package body was "frozen" by
+--  another body. If a "declared too late" message
+--  is generated, this will clarify what is meant by
+--  "too late".
+
+if not Freeze_Posted then
+   Freeze_Posted := True;
 
---  A misplaced constituent is a critical error because
---  pragma Refined_Depends or Refined_Global depends on
---  the proper link between a state and a constituent.
---  Stop the compilation, as this leads to a multitude
---  of misleading cascaded errors.
+   Error_Msg_Name_1 := Chars (Body_Id);
+   Error_Msg_Sloc   := Sloc (Freeze_Id);
+   SPARK_Msg_NE
+  

[gcc r16-1148] ada: Error about assignment to limited target on aggregate with "for of" iterator

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:69f1d543edeb192a05bac7ff8a07350dbb3d986f

commit r16-1148-g69f1d543edeb192a05bac7ff8a07350dbb3d986f
Author: Gary Dismukes 
Date:   Sat Jan 18 01:11:12 2025 +

ada: Error about assignment to limited target on aggregate with "for of" 
iterator

The compiler reports a spurious error about an assignment to a limited
object on an aggregate of a array type with limited components that has
an association with a "for of" iterator. This is fixed by arranging to
have the Assignment_OK flag set on the indexed_names generated by the
expander for initializing the aggregate object.

gcc/ada/ChangeLog:

* exp_aggr.adb (Two_Pass_Aggregate_Expansion): Change call to 
Make_Assignment
for the indexed aggregate object to call Change_Make_OK_Assignment 
instead.

Diff:
---
 gcc/ada/exp_aggr.adb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
index 7cb26ce1af51..3c4576df3b83 100644
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -5749,7 +5749,7 @@ package body Exp_Aggr is
  while Present (Assoc) loop
 Iter := Iterator_Specification (Assoc);
 Iter_Id := Defining_Identifier (Iter);
-New_Comp := Make_Assignment_Statement (Loc,
+New_Comp := Make_OK_Assignment_Statement (Loc,
Name =>
  Make_Indexed_Component (Loc,
 Prefix => New_Occurrence_Of (TmpE, Loc),

[gcc r16-1161] ada: Remove useless global variable

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:cf1f3f7c34292a11ee831b61d44b5cbab280e272

commit r16-1161-gcf1f3f7c34292a11ee831b61d44b5cbab280e272
Author: Ronan Desplanques 
Date:   Wed Feb 5 14:45:28 2025 +0100

ada: Remove useless global variable

This patch removes a global variable that was made useless by a previous
change and mistakenly hadn't been removed then.

gcc/ada/ChangeLog:

* opt.ads: Remove useless variable.
* sem_ch9.adb (Analyze_Abort_Statement, Analyze_Accept_Alternative,
Analyze_Accept_Statement, Analyze_Asynchronous_Select,
Analyze_Conditional_Entry_Call, Analyze_Delay_Alternative,
Analyze_Delay_Relative, Analyze_Delay_Until, Analyze_Entry_Body,
Analyze_Entry_Body_Formal_Part, Analyze_Entry_Call_Alternative,
Analyze_Entry_Declaration, Analyze_Entry_Index_Specification,
Analyze_Protected_Body, Analyze_Protected_Definition,
Analyze_Protected_Type_Declaration, Analyze_Requeue,
Analyze_Selective_Accept, Analyze_Single_Protected_Declaration,
Analyze_Single_Task_Declaration, Analyze_Task_Body,
Analyze_Task_Definition, Analyze_Task_Type_Declaration,
Analyze_Terminate_Alternative, Analyze_Timed_Entry_Call,
Analyze_Triggering_Alternative): Remove useless assignments.

Diff:
---
 gcc/ada/opt.ads |  4 
 gcc/ada/sem_ch9.adb | 37 -
 2 files changed, 41 deletions(-)

diff --git a/gcc/ada/opt.ads b/gcc/ada/opt.ads
index 87ce3a1d4639..cbe470105fd1 100644
--- a/gcc/ada/opt.ads
+++ b/gcc/ada/opt.ads
@@ -1522,10 +1522,6 @@ package Opt is
--  used for inconsistency error messages. A value of System_Location is
--  used if the policy is set in package System.
 
-   Tasking_Used : Boolean := False;
-   --  Set True if any tasking construct is encountered. Used to activate the
-   --  output of the Q, L and T lines in ALI files.
-
Time_Slice_Set : Boolean := False;
--  GNATBIND
--  Set True if a pragma Time_Slice is processed in the main unit, or
diff --git a/gcc/ada/sem_ch9.adb b/gcc/ada/sem_ch9.adb
index 71394aa563ff..031c49f0e362 100644
--- a/gcc/ada/sem_ch9.adb
+++ b/gcc/ada/sem_ch9.adb
@@ -753,8 +753,6 @@ package body Sem_Ch9 is
   T_Name : Node_Id;
 
begin
-  Tasking_Used := True;
-
   T_Name := First (Names (N));
   while Present (T_Name) loop
  Analyze (T_Name);
@@ -790,8 +788,6 @@ package body Sem_Ch9 is
 
procedure Analyze_Accept_Alternative (N : Node_Id) is
begin
-  Tasking_Used := True;
-
   if Present (Pragmas_Before (N)) then
  Analyze_List (Pragmas_Before (N));
   end if;
@@ -823,8 +819,6 @@ package body Sem_Ch9 is
   Task_Nam  : Entity_Id := Empty;  -- initialize to prevent warning
 
begin
-  Tasking_Used := True;
-
   --  Entry name is initialized to Any_Id. It should get reset to the
   --  matching entry entity. An error is signalled if it is not reset.
 
@@ -1064,7 +1058,6 @@ package body Sem_Ch9 is
   Trigger: Node_Id;
 
begin
-  Tasking_Used := True;
   Check_Restriction (Max_Asynchronous_Select_Nesting, N);
   Check_Restriction (No_Select_Statements, N);
 
@@ -1109,7 +1102,6 @@ package body Sem_Ch9 is
   Is_Disp_Select : Boolean := False;
 
begin
-  Tasking_Used := True;
   Check_Restriction (No_Select_Statements, N);
 
   --  Ada 2005 (AI-345): The trigger may be a dispatching call
@@ -1154,7 +1146,6 @@ package body Sem_Ch9 is
   Typ  : Entity_Id;
 
begin
-  Tasking_Used := True;
   Check_Restriction (No_Delay, N);
 
   if Present (Pragmas_Before (N)) then
@@ -1206,7 +1197,6 @@ package body Sem_Ch9 is
   E : constant Node_Id := Expression (N);
 
begin
-  Tasking_Used := True;
   Check_Restriction (No_Relative_Delay, N);
   Check_Restriction (No_Delay, N);
   Check_Potentially_Blocking_Operation (N);
@@ -1231,7 +1221,6 @@ package body Sem_Ch9 is
   Typ : Entity_Id;
 
begin
-  Tasking_Used := True;
   Check_Restriction (No_Delay, N);
   Check_Potentially_Blocking_Operation (N);
   Analyze_And_Resolve (E);
@@ -1266,8 +1255,6 @@ package body Sem_Ch9 is
 
   Freeze_Previous_Contracts (N);
 
-  Tasking_Used := True;
-
   --  Entry_Name is initialized to Any_Id. It should get reset to the
   --  matching entry entity. An error is signalled if it is not reset.
 
@@ -1518,8 +1505,6 @@ package body Sem_Ch9 is
   Formals : constant List_Id   := Parameter_Specifications (N);
 
begin
-  Tasking_Used := True;
-
   if Present (Index) then
  Analyze (Index);
 
@@ -1545,8 +1530,6 @@ package body Sem_Ch9 is
   Call : constant Node_Id := Entry_Call_Statement (N);
 
begin
-  Tasking_Used := True;
-
   if Present (Pragmas_Before (N)) then
  Analyze_List (Pragmas_Before (N));
   end if;
@@ -1589,8 +1572,6 @@ package body

[gcc r16-1154] ada: Add missing Ghost aspect to Lemma_Not_In_Range_Big2xx64 in s-aridou.adb

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:d57eddd9b211d4f7ded33e59f173bb2694afb835

commit r16-1154-gd57eddd9b211d4f7ded33e59f173bb2694afb835
Author: Aleksandra Pasek 
Date:   Mon Feb 3 16:29:21 2025 +

ada: Add missing Ghost aspect to Lemma_Not_In_Range_Big2xx64 in s-aridou.adb

gcc/ada/ChangeLog:

* libgnat/s-aridou.adb: Add missing Ghost aspect to
Lemma_Not_In_Range_Big2xx64.

Diff:
---
 gcc/ada/libgnat/s-aridou.adb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/ada/libgnat/s-aridou.adb b/gcc/ada/libgnat/s-aridou.adb
index e4140e837799..e3f83ca2aca0 100644
--- a/gcc/ada/libgnat/s-aridou.adb
+++ b/gcc/ada/libgnat/s-aridou.adb
@@ -508,6 +508,7 @@ is
 
procedure Lemma_Not_In_Range_Big2xx64
with
+ Ghost,
  Post => not In_Double_Int_Range (Big_2xxDouble)
and then not In_Double_Int_Range (-Big_2xxDouble);

[gcc r16-1167] ada: Add explicit null pointer check in C.Strings.Update

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:35260dd303a1f5c911310f87e7ddc3f1b580abbd

commit r16-1167-g35260dd303a1f5c911310f87e7ddc3f1b580abbd
Author: Tonu Naks 
Date:   Fri Feb 7 12:55:30 2025 +

ada: Add explicit null pointer check in C.Strings.Update

gcc/ada/ChangeLog:

* libgnat/i-cstrin.adb: null pointer check in Update

Diff:
---
 gcc/ada/libgnat/i-cstrin.adb | 5 +
 1 file changed, 5 insertions(+)

diff --git a/gcc/ada/libgnat/i-cstrin.adb b/gcc/ada/libgnat/i-cstrin.adb
index 974ba3a0e8ca..82795627a290 100644
--- a/gcc/ada/libgnat/i-cstrin.adb
+++ b/gcc/ada/libgnat/i-cstrin.adb
@@ -281,6 +281,11 @@ is
   Index : chars_ptr := Item + Offset;
 
begin
+  --  Check for null pointer as mandated by the RM.
+  if Item = Null_Ptr then
+ raise Dereference_Error;
+  end if;
+
   if Check and then Offset + Chars'Length  > Strlen (Item) then
  raise Update_Error;
   end if;

[gcc r16-1169] gcn: Update --with-arch= for newer archs

[Tobias Burnus via Gcc-cvs]

https://gcc.gnu.org/g:61a6430cf663e3c980c2ee966f094fea7d99f8e7

commit r16-1169-g61a6430cf663e3c980c2ee966f094fea7d99f8e7
Author: Tobias Burnus 
Date:   Thu Jun 5 10:36:21 2025 +0200

gcn: Update --with-arch= for newer archs

Replace hard-coded list of supported devices by directly checking
config/gcn/gcn-devices.def.

gcc/ChangeLog:

* config.gcc (--with-{arch,tune}): Use .def file to validate gcn
processor names.
* doc/install.texi (amdgcn*-*-*): Update list of devices supported
by --with-arch/--with-tune.

Diff:
---
 gcc/config.gcc   | 12 +---
 gcc/doc/install.texi | 10 +++---
 2 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 1e386a469e0e..8365b9170687 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4611,15 +4611,13 @@ case "${target}" in
 
for which in arch tune; do
eval "val=\$with_$which"
-   case ${val} in
-   "" | gfx900 | gfx906 | gfx908 | gfx90a | gfx90c | 
gfx1030 | gfx1036 | gfx1100 | gfx1103)
-   # OK
-   ;;
-   *)
+   if test x"$val" != x \
+  && ! grep -q "GCN_DEVICE($val," \
+   "${srcdir}/config/gcn/gcn-devices.def";
+   then
echo "Unknown cpu used in --with-$which=$val." 
1>&2
exit 1
-   ;;
-   esac
+   fi
done
[ "x$with_arch" = x ] && with_arch=gfx900
 
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index ff083360be21..fb921b326f17 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -1342,9 +1342,13 @@ default set of libraries is selected based on the value 
of
 
 @item amdgcn*-*-*
 @var{list} is a comma separated list of ISA names (allowed values:
-@code{gfx900}, @code{gfx906}, @code{gfx908}, @code{gfx90a}, @code{gfx90c}, 
-@code{gfx1030}, @code{gfx1036}, @code{gfx1100}, @code{gfx1103}).
-It ought not include the name of the default
+@code{gfx900}, @code{gfx902}, @code{gfx904}, @code{gfx906}, @code{gfx908},
+@code{gfx909}, @code{gfx90a}, @code{gfx90c}, @code{gfx9-generic},
+@code{gfx1030}, @code{gfx1031}, @code{gfx1032}, @code{gfx1033},
+@code{gfx1034}, @code{gfx1035}, @code{gfx1036}, @code{gfx10-3-generic},
+@code{gfx1100}, @code{gfx1101}, @code{gfx1102}, @code{gfx1103},
+@code{gfx1150}, @code{gfx1151}, @code{gfx1152}, @code{gfx1153},
+@code{gfx11-generic}).  It ought not include the name of the default
 ISA, specified via @option{--with-arch}.  If @var{list} is empty, then there
 will be no multilibs and only the default run-time library will be built.  If
 @var{list} is @code{default} or @option{--with-multilib-list=} is not

[gcc r16-1156] ada: Improve efficiency of very large shift counts

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:a7c5e316e28c993952337ea7a5570cb5d1df1daa

commit r16-1156-ga7c5e316e28c993952337ea7a5570cb5d1df1daa
Author: Bob Duff 
Date:   Tue Feb 4 14:36:03 2025 -0500

ada: Improve efficiency of very large shift counts

For a call to an intrinsic shift function with a large Amount, for
example Shift_Right(..., Amount => Natural'Last), and a
compile-time-known value, the compiler would take an absurdly long time
to compute the value. This patch fixes that by special-casing shift
counts that are larger than the size of the thing being shifted.

gcc/ada/ChangeLog:

* sem_eval.adb (Fold_Shift): If the Amount parameter is greater
than the size in bits, use the size. For example, if we are
shifting an Unsigned_8 value, then Amount => 1_000_001 gives the
same result as Amount => 8. This change avoids computing the value
of 2**1_000_000, which takes too long and uses too much memory.
Note that the computation we're talking about is a compile-time
computation. Minor cleanup. DRY.
* sem_eval.ads (Fold_Str, Fold_Uint, Fold_Ureal): Fold the
comments into one comment, because DRY. Remove useless
verbiage.

Diff:
---
 gcc/ada/sem_eval.adb | 95 ++--
 gcc/ada/sem_eval.ads | 37 +++-
 2 files changed, 51 insertions(+), 81 deletions(-)

diff --git a/gcc/ada/sem_eval.adb b/gcc/ada/sem_eval.adb
index b7dfe01f2973..5d1506364956 100644
--- a/gcc/ada/sem_eval.adb
+++ b/gcc/ada/sem_eval.adb
@@ -4989,27 +4989,41 @@ package body Sem_Eval is
  end if;
   end Check_Elab_Call;
 
-  Modulus, Val : Uint;
-
begin
-  if Compile_Time_Known_Value (Left)
-and then Compile_Time_Known_Value (Right)
+  if not (Compile_Time_Known_Value (Left)
+  and then Compile_Time_Known_Value (Right))
   then
- pragma Assert (not Non_Binary_Modulus (Typ));
+ return;
+  end if;
+
+  pragma Assert (not Non_Binary_Modulus (Typ));
+  pragma Assert (Expr_Value (Right) >= Uint_0); -- Amount is always Natural
+
+  --  Shift by zero bits is a no-op
 
+  if Expr_Value (Right) = Uint_0 then
+ Fold_Uint (N, Expr_Value (Left), Static => Static);
+ return;
+  end if;
+
+  declare
+ Modulus : constant Uint :=
+   (if Is_Modular_Integer_Type (Typ) then Einfo.Entities.Modulus (Typ)
+else Uint_2 ** RM_Size (Typ));
+ Amount : constant Uint := UI_Min (Expr_Value (Right), RM_Size (Typ));
+ --  Shift by an Amount greater than the size is all-zeros or all-ones.
+ --  Without this "min", we could use huge amounts of time and memory
+ --  below (e.g. 2**Amount, if Amount were a billion).
+
+ Val : Uint;
+  begin
  if Op = N_Op_Shift_Left then
 Check_Elab_Call;
 
-if Is_Modular_Integer_Type (Typ) then
-   Modulus := Einfo.Entities.Modulus (Typ);
-else
-   Modulus := Uint_2 ** RM_Size (Typ);
-end if;
-
 --  Fold Shift_Left (X, Y) by computing
 --  (X * 2**Y) rem modulus [- Modulus]
 
-Val := (Expr_Value (Left) * (Uint_2 ** Expr_Value (Right)))
+Val := (Expr_Value (Left) * (Uint_2 ** Amount))
  rem Modulus;
 
 if Is_Modular_Integer_Type (Typ)
@@ -5023,49 +5037,32 @@ package body Sem_Eval is
  elsif Op = N_Op_Shift_Right then
 Check_Elab_Call;
 
---  X >> 0 is a no-op
+--  Fold X >> Y by computing (X [+ Modulus]) / 2**Y.
+--  Note that after a Shift_Right operation (with Y > 0), the
+--  result is always positive, even if the original operand was
+--  negative.
 
-if Expr_Value (Right) = Uint_0 then
-   Fold_Uint (N, Expr_Value (Left), Static => Static);
-else
-   if Is_Modular_Integer_Type (Typ) then
-  Modulus := Einfo.Entities.Modulus (Typ);
+declare
+   M : Unat;
+begin
+   if Expr_Value (Left) >= Uint_0 then
+  M := Uint_0;
else
-  Modulus := Uint_2 ** RM_Size (Typ);
+  M := Modulus;
end if;
 
-   --  Fold X >> Y by computing (X [+ Modulus]) / 2**Y
-   --  Note that after a Shift_Right operation (with Y > 0), the
-   --  result is always positive, even if the original operand was
-   --  negative.
-
-   declare
-  M : Unat;
-   begin
-  if Expr_Value (Left) >= Uint_0 then
- M := Uint_0;
-  else
- M := Modulus;
-  end if;
+   Fold_Uint
+ (N,
+  

[gcc(refs/users/mikael/heads/refactor_descriptor_v05)] Correction mvbits_8

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:c77ed2c7c01541e79c9ddc94bbff755c737ce7a0

commit c77ed2c7c01541e79c9ddc94bbff755c737ce7a0
Author: Mikael Morin 
Date:   Thu Jun 5 11:15:36 2025 +0200

Correction mvbits_8

Diff:
---
 gcc/fortran/trans-stmt.cc | 8 
 1 file changed, 8 deletions(-)

diff --git a/gcc/fortran/trans-stmt.cc b/gcc/fortran/trans-stmt.cc
index 6949e00a3460..441d6fa3ce63 100644
--- a/gcc/fortran/trans-stmt.cc
+++ b/gcc/fortran/trans-stmt.cc
@@ -200,14 +200,6 @@ replace_ss (gfc_se *se, gfc_ss *old_ss, gfc_ss *new_ss)
   *sess = new_ss;
   new_ss->next = old_ss->next;
 
-  /* Make sure that trailing references are not lost.  */
-  if (old_ss->info
-  && old_ss->info->data.array.ref
-  && old_ss->info->data.array.ref->next
-  && !(new_ss->info->data.array.ref
-  && new_ss->info->data.array.ref->next))
-new_ss->info->data.array.ref = old_ss->info->data.array.ref;
-
   for (loopss = &(se->loop->ss); *loopss != gfc_ss_terminator;
loopss = &((*loopss)->loop_chain))
 if (*loopss == old_ss)

[gcc r16-1185] real: Fix up real_from_integer [PR120547]

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:ea9ea72e448e391d4be781b74956a0190f93afc8

commit r16-1185-gea9ea72e448e391d4be781b74956a0190f93afc8
Author: Jakub Jelinek 
Date:   Thu Jun 5 15:47:19 2025 +0200

real: Fix up real_from_integer [PR120547]

The function has 2 problems, one is _BitInt specific and the other is
most likely also reproduceable only with it.

The first issue is that I've missed updating the function for _BitInt,
maxbitlen as MAX_BITSIZE_MODE_ANY_INT + HOST_BITS_PER_WIDE_INT
obviously isn't guaranteed to be larger than any integral type we might
want to convert at compile time from wide_int to REAL_VALUE_FORMAT.
Just using len instead of it works fine, at least when used after
HOST_BITS_PER_WIDE_INT is added to it and it is truncated to multiples
of HOST_BITS_PER_WIDE_INT.

The other bug is that if the value has too many significant bits (formerly
maxbitlen - cnt_l_z, now len - cnt_l_z), the code just shifts it right and
adds the shift count to the future exponent.  That isn't correct for
rounding as the testcase attempts to show, the internal real format has more
bits than any precision in supported format, but we still need to
distinguish bewtween values exactly half way between representable floating
point values (those should be rounded to even) and the case when we've
shifted away some non-zero bits, so the value was tiny bit larger than half
way and then we should round up.

The patch uses something like e.g. soft-fp uses in these cases, right shift
with sticky bit in the least significant bit.

2025-06-05  Jakub Jelinek  

PR middle-end/120547
* real.cc (real_from_integer): Remove maxbitlen variable, use
len instead of that.  When shifting right, or in 1 if any of the
shifted away bits are non-zero.  Formatting fix.

* gcc.dg/bitint-123.c: New test.

Diff:
---
 gcc/real.cc   | 27 +++
 gcc/testsuite/gcc.dg/bitint-123.c | 26 ++
 2 files changed, 41 insertions(+), 12 deletions(-)

diff --git a/gcc/real.cc b/gcc/real.cc
index b64bad0e9b27..95a933220b5d 100644
--- a/gcc/real.cc
+++ b/gcc/real.cc
@@ -2230,7 +2230,6 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
 {
   unsigned int len = val_in.get_precision ();
   int i, j, e = 0;
-  int maxbitlen = MAX_BITSIZE_MODE_ANY_INT + HOST_BITS_PER_WIDE_INT;
   const unsigned int realmax = (SIGNIFICAND_BITS / HOST_BITS_PER_WIDE_INT
* HOST_BITS_PER_WIDE_INT);
 
@@ -2238,12 +2237,6 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
   r->cl = rvc_normal;
   r->sign = wi::neg_p (val_in, sgn);
 
-  /* We have to ensure we can negate the largest negative number.  */
-  wide_int val = wide_int::from (val_in, maxbitlen, sgn);
-
-  if (r->sign)
-   val = -val;
-
   /* Ensure a multiple of HOST_BITS_PER_WIDE_INT, ceiling, as elt
 won't work with precisions that are not a multiple of
 HOST_BITS_PER_WIDE_INT.  */
@@ -2252,7 +2245,13 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
   /* Ensure we can represent the largest negative number.  */
   len += 1;
 
-  len = len/HOST_BITS_PER_WIDE_INT * HOST_BITS_PER_WIDE_INT;
+  len = len / HOST_BITS_PER_WIDE_INT * HOST_BITS_PER_WIDE_INT;
+
+  /* We have to ensure we can negate the largest negative number.  */
+  wide_int val = wide_int::from (val_in, len, sgn);
+
+  if (r->sign)
+   val = -val;
 
   /* Cap the size to the size allowed by real.h.  */
   if (len > realmax)
@@ -2260,14 +2259,18 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper 
fmt,
  HOST_WIDE_INT cnt_l_z;
  cnt_l_z = wi::clz (val);
 
- if (maxbitlen - cnt_l_z > realmax)
+ if (len - cnt_l_z > realmax)
{
- e = maxbitlen - cnt_l_z - realmax;
+ e = len - cnt_l_z - realmax;
 
  /* This value is too large, we must shift it right to
 preserve all the bits we can, and then bump the
-exponent up by that amount.  */
- val = wi::lrshift (val, e);
+exponent up by that amount, but or in 1 if any of
+the shifted out bits are non-zero.  */
+ if (wide_int::from (val, e, UNSIGNED) != 0)
+   val = wi::set_bit (wi::lrshift (val, e), 0);
+ else
+   val = wi::lrshift (val, e);
}
  len = realmax;
}
diff --git a/gcc/testsuite/gcc.dg/bitint-123.c 
b/gcc/testsuite/gcc.dg/bitint-123.c
new file mode 100644
index ..4d019a98fdfc
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/bitint-123.c
@@ -0,0 +1,26 @@
+/* PR middle-end/120547 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2" } */
+/* { dg-add-options float64 } */
+/* { dg-require

[gcc r15-9770] ada: Error about assignment to limited target on aggregate with "for of" iterator

[Eric Botcazou via Gcc-cvs]

https://gcc.gnu.org/g:a871b236c17b818baa7437a313793058110e70f3

commit r15-9770-ga871b236c17b818baa7437a313793058110e70f3
Author: Gary Dismukes 
Date:   Sat Jan 18 01:11:12 2025 +

ada: Error about assignment to limited target on aggregate with "for of" 
iterator

The compiler reports a spurious error about an assignment to a limited
object on an aggregate of a array type with limited components that has
an association with a "for of" iterator. This is fixed by arranging to
have the Assignment_OK flag set on the indexed_names generated by the
expander for initializing the aggregate object.

gcc/ada/ChangeLog:

* exp_aggr.adb (Two_Pass_Aggregate_Expansion): Change call to 
Make_Assignment
for the indexed aggregate object to call Change_Make_OK_Assignment 
instead.

Diff:
---
 gcc/ada/exp_aggr.adb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
index 7cb26ce1af51..3c4576df3b83 100644
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -5749,7 +5749,7 @@ package body Exp_Aggr is
  while Present (Assoc) loop
 Iter := Iterator_Specification (Assoc);
 Iter_Id := Defining_Identifier (Iter);
-New_Comp := Make_Assignment_Statement (Loc,
+New_Comp := Make_OK_Assignment_Statement (Loc,
Name =>
  Make_Indexed_Component (Loc,
 Prefix => New_Occurrence_Of (TmpE, Loc),

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add andi+bclr synthesis

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:6bece8413ef4fa261d45447d262562f57260b0c5

commit 6bece8413ef4fa261d45447d262562f57260b0c5
Author: Shreya Munnangi 
Date:   Tue May 27 06:43:29 2025 -0600

[RISC-V] Add andi+bclr synthesis

So this patch from Shreya adds the ability to use andi + a series of bclr 
insns
to synthesize a logical AND, much like we're doing for IOR/XOR using 
ori+bset
or their xor equivalents.

This would regress from a code quality standpoint if we didn't make some
adjustments to a handful of define_insn_and_split patterns in the riscv 
backend
which support the same kind of idioms.

Essentially we turn those define_insn_and_split patterns into the simple
define_splits they always should have been.  That's been the plan since we
started down this path -- now is the time to make that change for a subset 
of
patterns.  It may be the case that when we're finished we may not even need
those patterns.  That's still TBD.

I'm aware of one minor regression in xalan.  As seen elsewhere, combine
reconstructs the mask value, uses mvconst_internal to load it into a reg 
then
an and instruction.  That looks better than the operation synthesis, but 
only
because of the mvconst_internal little white lie.

This patch does help in a variety of places.  It's fairly common in gimple.c
from 502.gcc to see cases where we'd use bclr to clear a bit, then set the
exact same bit a few instructions later.  That was an artifact of using a
define_insn_and_split -- it wasn't obvious to combine that we had two
instructions manipulating the same bit.  Now that is obvious to combine and 
the
redundant operation gets removed.

This has spun in my tester with no regressions on riscv32-elf and 
riscv64-elf.
Hopefully the baseline for the tester as stepped forward 🙂

gcc/
* config/riscv/bitmanip.md (andi+bclr splits): Simplified from
prior define_insn_and_splits.
* config/riscv/riscv.cc (synthesize_and): Add support for andi+bclr
sequences.

Co-authored-by: Jeff Law  

(cherry picked from commit c86125a62d153965a7d7eb17a2bd0d0507326fde)

Diff:
---
 gcc/config/riscv/bitmanip.md | 45 +++--
 gcc/config/riscv/riscv.cc| 53 +++-
 2 files changed, 70 insertions(+), 28 deletions(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 85ace285ff0a..21426f496798 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -846,14 +846,12 @@
   [(set_attr "type" "bitmanip")])
 
 ;; In case we have "val & ~IMM" where ~IMM has 2 bits set.
-(define_insn_and_split "*bclri_nottwobits"
-  [(set (match_operand:X 0 "register_operand" "=r")
-   (and:X (match_operand:X 1 "register_operand" "r")
-  (match_operand:X 2 "const_nottwobits_not_arith_operand" "i")))
-   (clobber (match_scratch:X 3 "=&r"))]
+(define_split
+  [(set (match_operand:X 0 "register_operand")
+   (and:X (match_operand:X 1 "register_operand")
+  (match_operand:X 2 "const_nottwobits_not_arith_operand")))
+   (clobber (match_operand:X 3 "register_operand"))]
   "TARGET_ZBS && !paradoxical_subreg_p (operands[1])"
-  "#"
-  "&& reload_completed"
   [(set (match_dup 3) (and:X (match_dup 1) (match_dup 4)))
(set (match_dup 0) (and:X (match_dup 3) (match_dup 5)))]
 {
@@ -862,20 +860,17 @@
 
   operands[4] = GEN_INT (~bits | topbit);
   operands[5] = GEN_INT (~topbit);
-}
-[(set_attr "type" "bitmanip")])
+})
 
 ;; In case of a paradoxical subreg, the sign bit and the high bits are
 ;; not allowed to be changed
-(define_insn_and_split "*bclridisi_nottwobits"
-  [(set (match_operand:DI 0 "register_operand" "=r")
-   (and:DI (match_operand:DI 1 "register_operand" "r")
-   (match_operand:DI 2 "const_nottwobits_not_arith_operand" "i")))
-   (clobber (match_scratch:DI 3 "=&r"))]
+(define_split
+  [(set (match_operand:DI 0 "register_operand")
+   (and:DI (match_operand:DI 1 "register_operand")
+   (match_operand:DI 2 "const_nottwobits_not_arith_operand")))
+   (clobber (match_operand:DI 3 "register_operand"))]
   "TARGET_64BIT && TARGET_ZBS
&& clz_hwi (~UINTVAL (operands[2])) > 33"
-  "#"
-  "&& reload_completed"
   [(set (match_dup 3) (and:DI (match_dup 1) (match_dup 4)))
(set (match_dup 0) (and:DI (match_dup 3) (match_dup 5)))]
 {
@@ -884,8 +879,7 @@
 
   operands[4] = GEN_INT (~bits | topbit);
   operands[5] = GEN_INT (~topbit);
-}
-[(set_attr "type" "bitmanip")])
+})
 
 ;; An outer AND with a constant where bits 31..63 are 0 can be seen as
 ;; a virtual zero extension from 31 to 64 bits.
@@ -1061,14 +1055,12 @@
 [(set_attr "type" "bitmanip")])
 
 ;; Same to use blcri + andi and blcri + bclri
-(define_insn_and_split "*andi_extrabit"
-  [(set (match_operand:X 0 "register_operand" "=r")
-   (and:X (match_oper

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage vaadd.vv for signed standard name avg_floor

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:85805f10c0e00165e559cf834236718570649a60

commit 85805f10c0e00165e559cf834236718570649a60
Author: Pan Li 
Date:   Tue May 27 09:53:56 2025 +0800

RISC-V: Leverage vaadd.vv for signed standard name avg_floor

The signed avg_floor totally match the sematics of fixed point
rvv insn vaadd, within round down.  Thus, leverage it directly
to implement the avf_floor.

The spec of RVV is somehow not that clear about the difference
between the float point and fixed point for the rounding that
discard least-significant information.

For float point which is not two's complement, the "discard
least-significant information" indicates truncation round.  For
example as below:

* 3.5 -> 3
* -2.3 -> -2

For fixed point which is two's complement, the "discard
least-significant information" indicates round down.  For
example as below:

* 3.5 -> 3
* -2.3 -> -3

And the vaadd takes the round down which is totally matching
the sematics of the avf_floor.

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

gcc/ChangeLog:

* config/riscv/autovec.md (avg3_floor): Add insn
expand to leverage vaadd directly.

Signed-off-by: Pan Li 
(cherry picked from commit f4456ea9e955b971573cdfebd1d10797fd30ad3a)

Diff:
---
 gcc/config/riscv/autovec.md | 19 ++-
 1 file changed, 6 insertions(+), 13 deletions(-)

diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
index 9e51e3ce6a30..a54f552a80ce 100644
--- a/gcc/config/riscv/autovec.md
+++ b/gcc/config/riscv/autovec.md
@@ -2491,19 +2491,12 @@
   (sign_extend:VWEXTI
(match_operand: 2 "register_operand"))]
   "TARGET_VECTOR"
-{
-  /* First emit a widening addition.  */
-  rtx tmp1 = gen_reg_rtx (mode);
-  rtx ops1[] = {tmp1, operands[1], operands[2]};
-  insn_code icode = code_for_pred_dual_widen (PLUS, SIGN_EXTEND, mode);
-  riscv_vector::emit_vlmax_insn (icode, riscv_vector::BINARY_OP, ops1);
-
-  /* Then a narrowing shift.  */
-  rtx ops2[] = {operands[0], tmp1, const1_rtx};
-  icode = code_for_pred_narrow_scalar (ASHIFTRT, mode);
-  riscv_vector::emit_vlmax_insn (icode, riscv_vector::BINARY_OP, ops2);
-  DONE;
-})
+  {
+insn_code icode = code_for_pred (UNSPEC_VAADD, mode);
+riscv_vector::emit_vlmax_insn (icode, riscv_vector::BINARY_OP_VXRM_RDN, 
operands);
+DONE;
+  }
+)
 
 (define_expand "avg3_ceil"
  [(set (match_operand: 0 "register_operand")

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for avg_floor

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:474b25ded43f69251b2a1ce23b1d375c0e3cb46c

commit 474b25ded43f69251b2a1ce23b1d375c0e3cb46c
Author: Pan Li 
Date:   Tue May 27 10:24:56 2025 +0800

RISC-V: Reconcile the existing test for avg_floor

Some existing avg_floor test need updated due to change to
leverage vaadd.vv directly.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/avg-1.c: Update asm check
to vaadd.
* gcc.target/riscv/rvv/autovec/vls/avg-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/avg-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/widen/vec-avg-rv64gcv.c: Ditto.

Signed-off-by: Pan Li 
(cherry picked from commit ef0c2ed1382d6edc26ba63322e1009f9acf97efd)

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c | 5 ++---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c | 5 ++---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c | 5 ++---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c | 7 ++-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv64gcv.c | 7 ++-
 5 files changed, 10 insertions(+), 19 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c
index 30e60d520d68..4920fa6ad417 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-1.c
@@ -25,9 +25,8 @@ DEF_AVG_FLOOR (uint8_t, uint16_t, 512)
 DEF_AVG_FLOOR (uint8_t, uint16_t, 1024)
 DEF_AVG_FLOOR (uint8_t, uint16_t, 2048)
 
-/* { dg-final { scan-assembler-times {vwadd\.vv} 10 } } */
-/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 10 } } */
-/* { dg-final { scan-assembler-times {vnsra\.wi} 10 } } */
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 20 } } */
+/* { dg-final { scan-assembler-times {vaadd\.vv} 10 } } */
 /* { dg-final { scan-assembler-times {vaaddu\.vv} 10 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
 /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c
index 33df429a634e..c6a120b76137 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-2.c
@@ -23,9 +23,8 @@ DEF_AVG_FLOOR (uint16_t, uint32_t, 256)
 DEF_AVG_FLOOR (uint16_t, uint32_t, 512)
 DEF_AVG_FLOOR (uint16_t, uint32_t, 1024)
 
-/* { dg-final { scan-assembler-times {vwadd\.vv} 9 } } */
-/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 9 } } */
-/* { dg-final { scan-assembler-times {vnsra\.wi} 9 } } */
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 18 } } */
+/* { dg-final { scan-assembler-times {vaadd\.vv} 9 } } */
 /* { dg-final { scan-assembler-times {vaaddu\.vv} 9 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
 /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c
index 9058905e3f5b..2838c1ed106d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-3.c
@@ -21,9 +21,8 @@ DEF_AVG_FLOOR (uint32_t, uint64_t, 128)
 DEF_AVG_FLOOR (uint32_t, uint64_t, 256)
 DEF_AVG_FLOOR (uint32_t, uint64_t, 512)
 
-/* { dg-final { scan-assembler-times {vwadd\.vv} 8 } } */
-/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 8 } } */
-/* { dg-final { scan-assembler-times {vnsra\.wi} 8 } } */
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 16 } } */
+/* { dg-final { scan-assembler-times {vaadd\.vv} 8 } } */
 /* { dg-final { scan-assembler-times {vaaddu\.vv} 8 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
 /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c
index 5880ccca4775..b7246a38dba7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c
@@ -3,9 +3,6 @@
 
 #include "vec-avg-template.h"
 
-/* { dg-final { scan-assembler-times {\tvwadd\.vv} 6 } } */
-/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 3 } } */
-/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 3 } } */
-/* { dg-final { scan-assembler-times {\tvadd\.vi} 3 } } */
-/* { dg-final { scan-assembler-times {\tvnsra.wi} 6 } } */
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 6 } } */
 /* { dg-final { scan-assembler-times {vaaddu\.vv} 6 } } */
+/* { dg-final { scan-assembler-times {vaadd\.vv} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmul.vv to vmul.vx on GR2VR cost

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:87b360b889a83b5cf6c535e77e16e5ccb0ea8b0f

commit 87b360b889a83b5cf6c535e77e16e5ccb0ea8b0f
Author: Pan Li 
Date:   Wed May 28 16:16:49 2025 +0800

RISC-V: Combine vec_duplicate + vmul.vv to vmul.vx on GR2VR cost

This patch would like to combine the vec_duplicate + vmul.vv to the
vmul.vx.  From example as below code.  The related pattern will depend
on the cost of vec_duplicate from GR2VR.  Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.

Assume we have example code like below, GR2VR cost is 0.

  #define DEF_VX_BINARY(T, OP)\
  void\
  test_vx_binary (T * restrict out, T * restrict in, T x, unsigned n) \
  {   \
for (unsigned i = 0; i < n; i++)  \
  out[i] = in[i] OP x;\
  }

  DEF_VX_BINARY(int32_t, |)

Before this patch:
  10   │ test_vx_binary_or_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ vsetvli a5,zero,e32,m1,ta,ma
  13   │ vmv.v.x v2,a2
  14   │ sllia3,a3,32
  15   │ srlia3,a3,32
  16   │ .L3:
  17   │ vsetvli a5,a3,e32,m1,ta,ma
  18   │ vle32.v v1,0(a1)
  19   │ sllia4,a5,2
  20   │ sub a3,a3,a5
  21   │ add a1,a1,a4
  22   │ vmul.vv v1,v1,v2
  23   │ vse32.v v1,0(a0)
  24   │ add a0,a0,a4
  25   │ bne a3,zero,.L3

After this patch:
  10   │ test_vx_binary_or_int32_t_case_0:
  11   │ beq a3,zero,.L8
  12   │ sllia3,a3,32
  13   │ srlia3,a3,32
  14   │ .L3:
  15   │ vsetvli a5,a3,e32,m1,ta,ma
  16   │ vle32.v v1,0(a1)
  17   │ sllia4,a5,2
  18   │ sub a3,a3,a5
  19   │ add a1,a1,a4
  20   │ vmul.vx v1,v1,a2
  21   │ vse32.v v1,0(a0)
  22   │ add a0,a0,a4
  23   │ bne a3,zero,.L3

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_vx_binary_vec_dup_vec): Add
new case for MULT op.
(expand_vx_binary_vec_vec_dup): Ditto.
* config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
* config/riscv/vector-iterators.md: Add new op mult to 
no_shift_vx_ops.

Signed-off-by: Pan Li 
(cherry picked from commit 2e4267a6fe143bd72376653812f59f343cb1c101)

Diff:
---
 gcc/config/riscv/riscv-v.cc  | 2 ++
 gcc/config/riscv/riscv.cc| 1 +
 gcc/config/riscv/vector-iterators.md | 2 +-
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index eedcda2b8ff5..616279757250 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -5536,6 +5536,7 @@ expand_vx_binary_vec_dup_vec (rtx op_0, rtx op_1, rtx 
op_2,
 case AND:
 case IOR:
 case XOR:
+case MULT:
   icode = code_for_pred_scalar (code, mode);
   break;
 case MINUS:
@@ -5565,6 +5566,7 @@ expand_vx_binary_vec_vec_dup (rtx op_0, rtx op_1, rtx 
op_2,
 case AND:
 case IOR:
 case XOR:
+case MULT:
   icode = code_for_pred_scalar (code, mode);
   break;
 default:
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 2cc69b4458a9..d3cee96d3aad 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3919,6 +3919,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int 
outer_code, int opno ATTRIBUTE_UN
  case AND:
  case IOR:
  case XOR:
+ case MULT:
{
  rtx op_0 = XEXP (x, 0);
  rtx op_1 = XEXP (x, 1);
diff --git a/gcc/config/riscv/vector-iterators.md 
b/gcc/config/riscv/vector-iterators.md
index 77d72a78c1be..2bd99ee5372b 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -4042,7 +4042,7 @@
 ])
 
 (define_code_iterator any_int_binop_no_shift_vx [
-  plus minus and ior xor
+  plus minus and ior xor mult
 ])
 
 (define_code_iterator any_int_unop [neg not])

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for avg_ceil

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:580b98e1d79589ccfa01121680ac127e895798fe

commit 580b98e1d79589ccfa01121680ac127e895798fe
Author: Pan Li 
Date:   Thu May 29 21:31:54 2025 +0800

RISC-V: Reconcile the existing test for avg_ceil

Some existing avg_floor test need updated due to change to
leverage vaadd.vv directly.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/avg-4.c: Update asm check
to vaadd.
* gcc.target/riscv/rvv/autovec/vls/avg-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/avg-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/widen/vec-avg-rv64gcv.c: Ditto.

Signed-off-by: Pan Li 
(cherry picked from commit 6d4c38b232e1d58c85de7959411cc1562a7a0bdc)

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-4.c | 6 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-5.c | 6 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-6.c | 6 ++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv64gcv.c | 2 +-
 5 files changed, 8 insertions(+), 14 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-4.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-4.c
index 8d106aaeed09..986a0ff21cfd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-4.c
@@ -25,11 +25,9 @@ DEF_AVG_CEIL (uint8_t, uint16_t, 512)
 DEF_AVG_CEIL (uint8_t, uint16_t, 1024)
 DEF_AVG_CEIL (uint8_t, uint16_t, 2048)
 
-/* { dg-final { scan-assembler-times {vwadd\.vv} 10 } } */
-/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 10 } } */
-/* { dg-final { scan-assembler-times {vnsra\.wi} 10 } } */
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 20 } } */
+/* { dg-final { scan-assembler-times {vaadd\.vv} 10 } } */
 /* { dg-final { scan-assembler-times {vaaddu\.vv} 10 } } */
-/* { dg-final { scan-assembler-times {vadd\.vi} 10 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
 /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
 /* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-5.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-5.c
index 981abd515888..c450f80291a0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-5.c
@@ -23,11 +23,9 @@ DEF_AVG_CEIL (uint16_t, uint32_t, 256)
 DEF_AVG_CEIL (uint16_t, uint32_t, 512)
 DEF_AVG_CEIL (uint16_t, uint32_t, 1024)
 
-/* { dg-final { scan-assembler-times {vwadd\.vv} 9 } } */
-/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 9 } } */
-/* { dg-final { scan-assembler-times {vnsra\.wi} 9 } } */
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 18 } } */
 /* { dg-final { scan-assembler-times {vaaddu\.vv} 9 } } */
-/* { dg-final { scan-assembler-times {vadd\.vi} 9 } } */
+/* { dg-final { scan-assembler-times {vaadd\.vv} 9 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
 /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
 /* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-6.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-6.c
index bfe4ba3c4bda..3473e193a5cb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/avg-6.c
@@ -21,11 +21,9 @@ DEF_AVG_CEIL (uint16_t, uint32_t, 128)
 DEF_AVG_CEIL (uint16_t, uint32_t, 256)
 DEF_AVG_CEIL (uint16_t, uint32_t, 512)
 
-/* { dg-final { scan-assembler-times {vwadd\.vv} 8 } } */
-/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 8 } } */
-/* { dg-final { scan-assembler-times {vnsra\.wi} 8 } } */
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 16 } } */
 /* { dg-final { scan-assembler-times {vaaddu\.vv} 8 } } */
-/* { dg-final { scan-assembler-times {vadd\.vi} 8 } } */
+/* { dg-final { scan-assembler-times {vaadd\.vv} 8 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
 /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
 /* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c
index b7246a38dba7..a5224e78d94a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/vec-avg-rv32gcv.c
@@ -5,4 +5,4 @@
 
 /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 6 } } */
 /* { dg-final { scan-assembler-times {vaaddu\.vv} 6 } } */
-/* { dg-final { scan-assembler-times {vaadd\.vv} 3 } } */
+/* { dg-final { scan-assembler-times {vaadd\.vv} 6 } } */
diff --git a/gcc/t

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmul.vv combine case 0 with GR2VR cost 0, 2 and 15

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:1a15db2f74c66f090f2f405450b6544ef5d1c15e

commit 1a15db2f74c66f090f2f405450b6544ef5d1c15e
Author: Pan Li 
Date:   Wed May 28 16:20:32 2025 +0800

RISC-V: Add test for vec_duplicate + vmul.vv combine case 0 with GR2VR cost 
0, 2 and 15

Add asm dump check test for vec_duplicate + vmul.vv combine to vmul.vx,
with the GR2VR cost is 0, 2 and 15.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check
for vmul.vx combine.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
data for vmul run test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmul-run-1-i16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmul-run-1-i32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmul-run-1-i64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmul-run-1-i8.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit b36bde2fc5cc7048f294adee45fb9a0be0092d13)

Diff:
---
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c   |   2 +
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h   | 196 +
 .../riscv/rvv/autovec/vx_vf/vx_vmul-run-1-i16.c|  15 ++
 .../riscv/rvv/autovec/vx_vf/vx_vmul-run-1-i32.c|  15 ++
 .../riscv/rvv/autovec/vx_vf/vx_vmul-run-1-i64.c|  15 ++
 .../riscv/rvv/autovec/vx_vf/vx_vmul-run-1-i8.c |  15 ++
 17 files changed, 280 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
index b9be0f674aec..144d1bad6afc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
@@ -11,6 +11,7 @@ DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
 DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
 DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
+DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
@@ -18,3 +19,4 @@ DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
 /* { dg-final { scan-assembler-times {vand.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vor.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vxor.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vmul.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
index 2a84980cb503..74d35d13cf6a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
@@ -11,6 +11,7 @@ DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
 DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
 DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
 DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
+DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
 
 /* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
@@ -18,3 +19,4 @@ DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
 /* { dg-final { scan-assembler-times {vand.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vor.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vxor.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vmul.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
index 9c7ea5fa413

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for avg_floor vaadd implementation

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:9f09bc511db814ba928a495995ea44efae3a15cf

commit 9f09bc511db814ba928a495995ea44efae3a15cf
Author: Pan Li 
Date:   Tue May 27 10:27:01 2025 +0800

RISC-V: Add test cases for avg_floor vaadd implementation

Add asm and run testcase for avg_floor vaadd implementation.

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/avg.h: New test.
* gcc.target/riscv/rvv/autovec/avg_data.h: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c: New 
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c: New 
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c: New 
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c: New 
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c: New 
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c: New 
test.
* gcc.target/riscv/rvv/autovec/avg_run.h: New test.

Signed-off-by: Pan Li 
(cherry picked from commit d4a2f9ba6ece32fb8500f10204fcf409aa26fbfb)

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h   |  23 +++
 .../gcc.target/riscv/rvv/autovec/avg_data.h| 185 +
 .../riscv/rvv/autovec/avg_floor-1-i16-from-i32.c   |  12 ++
 .../riscv/rvv/autovec/avg_floor-1-i16-from-i64.c   |  12 ++
 .../riscv/rvv/autovec/avg_floor-1-i32-from-i64.c   |  12 ++
 .../riscv/rvv/autovec/avg_floor-1-i8-from-i16.c|  12 ++
 .../riscv/rvv/autovec/avg_floor-1-i8-from-i32.c|  12 ++
 .../riscv/rvv/autovec/avg_floor-1-i8-from-i64.c|  12 ++
 .../rvv/autovec/avg_floor-run-1-i16-from-i32.c |  16 ++
 .../rvv/autovec/avg_floor-run-1-i16-from-i64.c |  16 ++
 .../rvv/autovec/avg_floor-run-1-i32-from-i64.c |  16 ++
 .../rvv/autovec/avg_floor-run-1-i8-from-i16.c  |  16 ++
 .../rvv/autovec/avg_floor-run-1-i8-from-i32.c  |  16 ++
 .../rvv/autovec/avg_floor-run-1-i8-from-i64.c  |  16 ++
 .../gcc.target/riscv/rvv/autovec/avg_run.h |  26 +++
 15 files changed, 402 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h
new file mode 100644
index ..746c635ae577
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h
@@ -0,0 +1,23 @@
+#ifndef HAVE_DEFINED_AVG_H
+#define HAVE_DEFINED_AVG_H
+
+#include 
+
+#define DEF_AVG_0(NT, WT, NAME) \
+__attribute__((noinline))   \
+void\
+test_##NAME##_##WT##_##NT##_0(NT * restrict a, NT * restrict b, \
+ NT * restrict out, int n) \
+{   \
+  for (int i = 0; i < n; i++) { \
+out[i] = (NT)(((WT)a[i] + (WT)b[i]) >> 1);  \
+  } \
+}
+#define DEF_AVG_0_WRAP(NT, WT, NAME) DEF_AVG_0(NT, WT, NAME)
+
+#define RUN_AVG_0(NT, WT, NAME, a, b, out, n) \
+  test_##NAME##_##WT##_##NT##_0(a, b, out, n)
+#define RUN_AVG_0_WRAP(NT, WT, NAME, a, b, out, n) \
+  RUN_AVG_0(NT, WT, NAME, a, b, out, n)
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h
new file mode 100644
index ..cbeed147a565
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h
@@ -0,0 +1,185 @@
+#ifndef HAVE_DEFINED_AVG_DATA_H
+#define HAVE_DEFINED_AVG_DATA_H
+
+#define N 16
+
+#define TEST_AVG_DATA(T, NAME)  test_##T##_##NAME##_data
+#define TEST_AVG_DATA_WRAP(T, NAME) TEST_AVG_DATA(T, NAME)
+
+int8_t TEST_AVG_DATA(int8_t, avg_floor)[][3][N] =
+{
+  {
+{
+   0,  0,  0,  0,
+   1,  1,  1,  1,
+  -1, -1, -1, -1,
+   8,  8,  8,  8,
+},
+{
+   0,  0,  0,  0,
+   0,  0,  0,  0,
+  -2, -2, -2, -2,
+   1,  1,  1,  1,
+},
+{
+   0,  0,  0,  0,
+   0,  0,  0,  0,
+  -2, -2, -2, -2,
+   4,  4,  4,  4,
+},
+  },
+  {
+{
+   127,  127,  127,  127,
+   127,  127,  127,  127,
+  -128, -128, -128, -128,
+  -128, -128, -128, -128,
+},
+{
+   126,  126,  126,  126,
+-2,   -2,   -2,   -2,
+  

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add minimal support of double trap extension 1.0

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:ae57b36ec4490523ccacb499aa8c240346e6c39a

commit ae57b36ec4490523ccacb499aa8c240346e6c39a
Author: Jerry Zhang Jian 
Date:   Wed May 28 10:17:36 2025 +0800

RISC-V: Add minimal support of double trap extension 1.0

Add support of double trap extension [1], enabling GCC
to recognize the following extensions at compile time.

New extensions:
- ssdbltrp
- smdbltrp

[1] 
https://github.com/riscv/riscv-double-trap/releases/download/v1.0/riscv-double-trap.pdf

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New extensions
* config/riscv/riscv-ext.opt: Auto re-generated
* doc/riscv-ext.texi: Auto re-generated

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-57.c: New test
* gcc.target/riscv/arch-58.c: New test

Signed-off-by: Jerry Zhang Jian 
(cherry picked from commit 077cdc9dc0ff7f5c9d12829bfed220d1e63b1525)

Diff:
---
 gcc/config/riscv/riscv-ext.def   | 26 ++
 gcc/config/riscv/riscv-ext.opt   |  4 
 gcc/doc/riscv-ext.texi   |  8 
 gcc/testsuite/gcc.target/riscv/arch-57.c |  6 ++
 gcc/testsuite/gcc.target/riscv/arch-58.c |  6 ++
 5 files changed, 50 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index 97b576617add..dbda8ded3974 100644
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1727,6 +1727,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ smdbltrp,
+  /* UPPERCAE_NAME */ SMDBLTRP,
+  /* FULL_NAME */ "Double Trap Extensions",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ sm,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ ssaia,
   /* UPPERCAE_NAME */ SSAIA,
@@ -1818,6 +1831,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ ssdbltrp,
+  /* UPPERCAE_NAME */ SSDBLTRP,
+  /* FULL_NAME */ "Double Trap Extensions",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ ss,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ supm,
   /* UPPERCAE_NAME */ SUPM,
diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index 9199aa31b420..5e9c5f56ad67 100644
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -343,6 +343,8 @@ Mask(SMNPM) Var(riscv_sm_subext)
 
 Mask(SMSTATEEN) Var(riscv_sm_subext)
 
+Mask(SMDBLTRP) Var(riscv_sm_subext)
+
 Mask(SSAIA) Var(riscv_ss_subext)
 
 Mask(SSCOFPMF) Var(riscv_ss_subext)
@@ -357,6 +359,8 @@ Mask(SSTC) Var(riscv_ss_subext)
 
 Mask(SSSTRICT) Var(riscv_ss_subext)
 
+Mask(SSDBLTRP) Var(riscv_ss_subext)
+
 Mask(SUPM) Var(riscv_su_subext)
 
 Mask(SVINVAL) Var(riscv_sv_subext)
diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index bd3d29c75ab5..7a22d841d1b6 100644
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -510,6 +510,10 @@
 @tab 1.0
 @tab State enable extension
 
+@item smdbltrp
+@tab 1.0
+@tab Double Trap Extensions
+
 @item ssaia
 @tab 1.0
 @tab Advanced interrupt architecture extension for supervisor-mode
@@ -538,6 +542,10 @@
 @tab 1.0
 @tab ssstrict extension
 
+@item ssdbltrp
+@tab 1.0
+@tab Double Trap Extensions
+
 @item supm
 @tab 1.0
 @tab supm extension
diff --git a/gcc/testsuite/gcc.target/riscv/arch-57.c 
b/gcc/testsuite/gcc.target/riscv/arch-57.c
new file mode 100644
index ..08d3761a4700
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-57.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_smdbltrp -mabi=lp64" } */
+
+void foo(){}
+
+/* { dg-final { scan-assembler ".attribute arch, 
\"rv64i2p1_zicsr2p0_smdbltrp1p0\"" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/arch-58.c 
b/gcc/testsuite/gcc.target/riscv/arch-58.c
new file mode 100644
index ..1481da5ecdbe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-58.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_ssdbltrp -mabi=lp64" } */
+
+void foo(){}
+
+/* { dg-final { scan-assembler ".attribute arch, 
\"rv64i2p1_zicsr2p0_ssdbltrp1p0\"" } } */