[gcc r15-8680] AVR: Clarify some optimization options.
https://gcc.gnu.org/g:070bbc5842f64b36299c264c137e4ee414da1ddc
commit r15-8680-g070bbc5842f64b36299c264c137e4ee414da1ddc
Author: Georg-Johann Lay
Date: Sun Mar 23 12:58:54 2025 +0100
AVR: Clarify some optimization options.
gcc/
* doc/invoke.texi (AVR Optimization Options)
<-maccumulate-args>: Refer to -fdefer-pop.
<-muse-nonzero-bits>: Re-formulate what the option does.
Diff:
---
gcc/doc/invoke.texi | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 81bfacfc35d4..36b252be387f 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -24555,6 +24555,8 @@ Accumulate outgoing function arguments and
acquire/release the needed
stack space for outgoing function arguments once in function
prologue/epilogue. Without this option, outgoing arguments are pushed
before calling a function and popped afterwards.
+See also the @option{-fdefer-pop}
+@ref{Optimize Options,,optimization option}.
Popping the arguments after the function call can be expensive on
AVR so that accumulating the stack space might lead to smaller
@@ -24632,7 +24634,8 @@ This optimization is turned on per default for
@option{-O2} and higher.
@opindex muse-nonzero-bits
@item -muse-nonzero-bits
-Enable some patterns for bit optimizations that depend on specific values.
+Enable optimizations that are only possible when some bits in a
+register are always zero.
This optimization is turned on per default for @option{-O2} and higher.
@end table
[gcc r15-8681] AVR: Add AVR-SD devices.
https://gcc.gnu.org/g:82e3832760600135764443b1a2ac8c200392f2f3
commit r15-8681-g82e3832760600135764443b1a2ac8c200392f2f3
Author: Georg-Johann Lay
Date: Sun Mar 23 13:23:25 2025 +0100
AVR: Add AVR-SD devices.
gcc/
* config/avr/avr-mcus.def: Add AVR32SD20, AVR32SD28, AVR32SD32,
AVR64SD28, AVR64SD32, AVR64SD48.
* doc/avr-mmcu.texi: Rebuild.
Diff:
---
gcc/config/avr/avr-mcus.def | 6 ++
gcc/doc/avr-mmcu.texi | 4 ++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/gcc/config/avr/avr-mcus.def b/gcc/config/avr/avr-mcus.def
index 9f79a9a45795..ad640501541f 100644
--- a/gcc/config/avr/avr-mcus.def
+++ b/gcc/config/avr/avr-mcus.def
@@ -326,6 +326,9 @@ AVR_MCU ("avr64du32",ARCH_AVRXMEGA2, AVR_CVT |
AVR_ISA_FLMAP, "__AVR_AVR
AVR_MCU ("avr64ea28",ARCH_AVRXMEGA2, AVR_CVT | AVR_ISA_FLMAP,
"__AVR_AVR64EA28__", 0x6800, 0x0, 0x1, 0)
AVR_MCU ("avr64ea32",ARCH_AVRXMEGA2, AVR_CVT | AVR_ISA_FLMAP,
"__AVR_AVR64EA32__", 0x6800, 0x0, 0x1, 0)
AVR_MCU ("avr64ea48",ARCH_AVRXMEGA2, AVR_CVT | AVR_ISA_FLMAP,
"__AVR_AVR64EA48__", 0x6800, 0x0, 0x1, 0)
+AVR_MCU ("avr64sd28",ARCH_AVRXMEGA2, AVR_CVT | AVR_ISA_FLMAP,
"__AVR_AVR64SD28__", 0x6000, 0x0, 0x1, 0)
+AVR_MCU ("avr64sd32",ARCH_AVRXMEGA2, AVR_CVT | AVR_ISA_FLMAP,
"__AVR_AVR64SD32__", 0x6000, 0x0, 0x1, 0)
+AVR_MCU ("avr64sd48",ARCH_AVRXMEGA2, AVR_CVT | AVR_ISA_FLMAP,
"__AVR_AVR64SD48__", 0x6000, 0x0, 0x1, 0)
/* Xmega, Flash + RAM < 64K, flash visible in RAM address space */
AVR_MCU ("avrxmega3",ARCH_AVRXMEGA3, AVR_ISA_NONE,NULL,
0x3f00, 0x0, 0x8000, 0)
AVR_MCU ("attiny202",ARCH_AVRXMEGA3, AVR_CVT | AVR_ISA_RCALL,
"__AVR_ATtiny202__", 0x3f80, 0x0, 0x800, 0x8000)
@@ -407,6 +410,9 @@ AVR_MCU ("avr16ea48",ARCH_AVRXMEGA3, AVR_CVT,
"__AVR_AVR
AVR_MCU ("avr32ea28",ARCH_AVRXMEGA3, AVR_CVT,
"__AVR_AVR32EA28__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32ea32",ARCH_AVRXMEGA3, AVR_CVT,
"__AVR_AVR32EA32__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32ea48",ARCH_AVRXMEGA3, AVR_CVT,
"__AVR_AVR32EA48__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32sd20",ARCH_AVRXMEGA3, AVR_CVT,
"__AVR_AVR32SD20__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32sd28",ARCH_AVRXMEGA3, AVR_CVT,
"__AVR_AVR32SD28__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32sd32",ARCH_AVRXMEGA3, AVR_CVT,
"__AVR_AVR32SD32__", 0x7000, 0x0, 0x8000, 0x8000)
/* Xmega, 64K < Flash <= 128K, RAM <= 64K */
AVR_MCU ("avrxmega4",ARCH_AVRXMEGA4, AVR_ISA_NONE, NULL,
0x2000, 0x0, 0x11000, 0)
AVR_MCU ("atxmega64a3", ARCH_AVRXMEGA4, AVR_ISA_NONE,
"__AVR_ATxmega64A3__", 0x2000, 0x0, 0x11000, 0)
diff --git a/gcc/doc/avr-mmcu.texi b/gcc/doc/avr-mmcu.texi
index 18101a8d6c61..feb772549a43 100644
--- a/gcc/doc/avr-mmcu.texi
+++ b/gcc/doc/avr-mmcu.texi
@@ -50,11 +50,11 @@
@item @anchor{avrxmega2}avrxmega2
``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program
memory.
-@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u},
@code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4},
@code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4},
@code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28},
@code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28},
@code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14},
@code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64du28},
@code{avr64du32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48}.
+@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u},
@code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4},
@code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4},
@code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28},
@code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28},
@code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14},
@code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64du28},
@code{avr64du32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48},
@code{avr64sd28}, @code{avr64sd32}, @code{avr64sd48}.
@item @anchor{avrxmega3}avrxmega3
``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM,
and with program memory visible in the RAM address space.
-@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212},
@code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406},
@code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto},
@code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427},
@code{attiny804}, @code{att
[gcc r15-8682] d: Fix ICE type variant differs by TYPE_PACKED [PR117621]
https://gcc.gnu.org/g:597168191e2909aec745f4dc084e1f8d44fdb3e4
commit r15-8682-g597168191e2909aec745f4dc084e1f8d44fdb3e4
Author: Iain Buclaw
Date: Sun Mar 23 12:57:27 2025 +0100
d: Fix ICE type variant differs by TYPE_PACKED [PR117621]
Introduced by r13-1104-gf4c3ce32fa54c1, which had an accidental self
assignment of TYPE_PACKED when it should have been assigned to the
type's variants.
PR d/117621
gcc/d/ChangeLog:
* types.cc (finish_aggregate_type): Propagate TYPE_PACKED to
variants.
gcc/testsuite/ChangeLog:
* gdc.dg/pr117621.d: New test.
Diff:
---
gcc/d/types.cc | 2 +-
gcc/testsuite/gdc.dg/pr117621.d | 11 +++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/gcc/d/types.cc b/gcc/d/types.cc
index 47ef66c25807..98074f1fb687 100644
--- a/gcc/d/types.cc
+++ b/gcc/d/types.cc
@@ -704,7 +704,7 @@ finish_aggregate_type (unsigned structsize, unsigned
alignsize, tree type)
TYPE_LANG_SPECIFIC (t) = TYPE_LANG_SPECIFIC (type);
TYPE_SIZE (t) = TYPE_SIZE (type);
TYPE_SIZE_UNIT (t) = TYPE_SIZE_UNIT (type);
- TYPE_PACKED (type) = TYPE_PACKED (type);
+ TYPE_PACKED (t) = TYPE_PACKED (type);
SET_TYPE_ALIGN (t, TYPE_ALIGN (type));
TYPE_USER_ALIGN (t) = TYPE_USER_ALIGN (type);
}
diff --git a/gcc/testsuite/gdc.dg/pr117621.d b/gcc/testsuite/gdc.dg/pr117621.d
new file mode 100644
index ..f0b96cbff2cd
--- /dev/null
+++ b/gcc/testsuite/gdc.dg/pr117621.d
@@ -0,0 +1,11 @@
+// { dg-do "compile" }
+// { dg-options "-g" }
+void pr117621()
+{
+auto fun()(inout int)
+{
+struct S {}
+return inout(S)();
+}
+auto s = fun(0);
+}
[gcc r14-11439] d: Fix ICE type variant differs by TYPE_PACKED [PR117621]
https://gcc.gnu.org/g:e4e7d446ec3efba0c70bebfa9ba6385c233ef083
commit r14-11439-ge4e7d446ec3efba0c70bebfa9ba6385c233ef083
Author: Iain Buclaw
Date: Sun Mar 23 12:57:27 2025 +0100
d: Fix ICE type variant differs by TYPE_PACKED [PR117621]
Introduced by r13-1104-gf4c3ce32fa54c1, which had an accidental self
assignment of TYPE_PACKED when it should have been assigned to the
type's variants.
PR d/117621
gcc/d/ChangeLog:
* types.cc (finish_aggregate_type): Propagate TYPE_PACKED to
variants.
gcc/testsuite/ChangeLog:
* gdc.dg/pr117621.d: New test.
(cherry picked from commit a12dd79ff4e469652be6d8ef501e1d70178b44cd)
Diff:
---
gcc/d/types.cc | 2 +-
gcc/testsuite/gdc.dg/pr117621.d | 11 +++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/gcc/d/types.cc b/gcc/d/types.cc
index 9fa2f888cb22..02f69af166d6 100644
--- a/gcc/d/types.cc
+++ b/gcc/d/types.cc
@@ -704,7 +704,7 @@ finish_aggregate_type (unsigned structsize, unsigned
alignsize, tree type)
TYPE_LANG_SPECIFIC (t) = TYPE_LANG_SPECIFIC (type);
TYPE_SIZE (t) = TYPE_SIZE (type);
TYPE_SIZE_UNIT (t) = TYPE_SIZE_UNIT (type);
- TYPE_PACKED (type) = TYPE_PACKED (type);
+ TYPE_PACKED (t) = TYPE_PACKED (type);
SET_TYPE_ALIGN (t, TYPE_ALIGN (type));
TYPE_USER_ALIGN (t) = TYPE_USER_ALIGN (type);
}
diff --git a/gcc/testsuite/gdc.dg/pr117621.d b/gcc/testsuite/gdc.dg/pr117621.d
new file mode 100644
index ..f0b96cbff2cd
--- /dev/null
+++ b/gcc/testsuite/gdc.dg/pr117621.d
@@ -0,0 +1,11 @@
+// { dg-do "compile" }
+// { dg-options "-g" }
+void pr117621()
+{
+auto fun()(inout int)
+{
+struct S {}
+return inout(S)();
+}
+auto s = fun(0);
+}
[gcc r13-9445] d: Fix ICE type variant differs by TYPE_PACKED [PR117621]
https://gcc.gnu.org/g:72d85f2163306c8ba234d228d8071ed368cbd2f2
commit r13-9445-g72d85f2163306c8ba234d228d8071ed368cbd2f2
Author: Iain Buclaw
Date: Sun Mar 23 12:57:27 2025 +0100
d: Fix ICE type variant differs by TYPE_PACKED [PR117621]
Introduced by r13-1104-gf4c3ce32fa54c1, which had an accidental self
assignment of TYPE_PACKED when it should have been assigned to the
type's variants.
PR d/117621
gcc/d/ChangeLog:
* types.cc (finish_aggregate_type): Propagate TYPE_PACKED to
variants.
gcc/testsuite/ChangeLog:
* gdc.dg/pr117621.d: New test.
(cherry picked from commit a12dd79ff4e469652be6d8ef501e1d70178b44cd)
Diff:
---
gcc/d/types.cc | 2 +-
gcc/testsuite/gdc.dg/pr117621.d | 11 +++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/gcc/d/types.cc b/gcc/d/types.cc
index 05050f9edd02..32b322c87190 100644
--- a/gcc/d/types.cc
+++ b/gcc/d/types.cc
@@ -704,7 +704,7 @@ finish_aggregate_type (unsigned structsize, unsigned
alignsize, tree type)
TYPE_LANG_SPECIFIC (t) = TYPE_LANG_SPECIFIC (type);
TYPE_SIZE (t) = TYPE_SIZE (type);
TYPE_SIZE_UNIT (t) = TYPE_SIZE_UNIT (type);
- TYPE_PACKED (type) = TYPE_PACKED (type);
+ TYPE_PACKED (t) = TYPE_PACKED (type);
SET_TYPE_ALIGN (t, TYPE_ALIGN (type));
TYPE_USER_ALIGN (t) = TYPE_USER_ALIGN (type);
}
diff --git a/gcc/testsuite/gdc.dg/pr117621.d b/gcc/testsuite/gdc.dg/pr117621.d
new file mode 100644
index ..f0b96cbff2cd
--- /dev/null
+++ b/gcc/testsuite/gdc.dg/pr117621.d
@@ -0,0 +1,11 @@
+// { dg-do "compile" }
+// { dg-options "-g" }
+void pr117621()
+{
+auto fun()(inout int)
+{
+struct S {}
+return inout(S)();
+}
+auto s = fun(0);
+}
[gcc r13-9446] AVR: Add AVR-SD devices.
https://gcc.gnu.org/g:dd2610bd9be39623d405df27b7d1e771aa1b0ad3
commit r13-9446-gdd2610bd9be39623d405df27b7d1e771aa1b0ad3
Author: Georg-Johann Lay
Date: Sun Mar 23 13:23:25 2025 +0100
AVR: Add AVR-SD devices.
gcc/
* config/avr/avr-mcus.def: Add AVR32SD20, AVR32SD28, AVR32SD32,
AVR64SD28, AVR64SD32, AVR64SD48.
* doc/avr-mmcu.texi: Rebuild.
(cherry picked from commit 82e3832760600135764443b1a2ac8c200392f2f3)
Diff:
---
gcc/config/avr/avr-mcus.def | 6 ++
gcc/doc/avr-mmcu.texi | 4 ++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/gcc/config/avr/avr-mcus.def b/gcc/config/avr/avr-mcus.def
index d869f8720f2d..941a4c41be62 100644
--- a/gcc/config/avr/avr-mcus.def
+++ b/gcc/config/avr/avr-mcus.def
@@ -326,6 +326,9 @@ AVR_MCU ("avr64du32",ARCH_AVRXMEGA2, AVR_ISA_NONE,
"__AVR_AVR64DU32__",
AVR_MCU ("avr64ea28",ARCH_AVRXMEGA2, AVR_ISA_NONE,
"__AVR_AVR64EA28__",0x6800, 0x0, 0x1, 0)
AVR_MCU ("avr64ea32",ARCH_AVRXMEGA2, AVR_ISA_NONE,
"__AVR_AVR64EA32__",0x6800, 0x0, 0x1, 0)
AVR_MCU ("avr64ea48",ARCH_AVRXMEGA2, AVR_ISA_NONE,
"__AVR_AVR64EA48__",0x6800, 0x0, 0x1, 0)
+AVR_MCU ("avr64sd28",ARCH_AVRXMEGA2, AVR_ISA_NONE,
"__AVR_AVR64SD28__",0x6000, 0x0, 0x1, 0)
+AVR_MCU ("avr64sd32",ARCH_AVRXMEGA2, AVR_ISA_NONE,
"__AVR_AVR64SD32__",0x6000, 0x0, 0x1, 0)
+AVR_MCU ("avr64sd48",ARCH_AVRXMEGA2, AVR_ISA_NONE,
"__AVR_AVR64SD48__",0x6000, 0x0, 0x1, 0)
/* Xmega, Flash + RAM < 64K, flash visible in RAM address space */
AVR_MCU ("avrxmega3",ARCH_AVRXMEGA3, AVR_ISA_NONE, NULL,
0x3f00, 0x0, 0x8000, 0)
AVR_MCU ("attiny202",ARCH_AVRXMEGA3, AVR_ISA_RCALL,
"__AVR_ATtiny202__", 0x3f80, 0x0, 0x800, 0x8000)
@@ -407,6 +410,9 @@ AVR_MCU ("avr16ea48",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16EA48__",
AVR_MCU ("avr32ea28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32EA28__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32ea32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32EA32__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32ea48",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32EA48__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32sd20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32SD20__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32sd28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32SD28__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32sd32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32SD32__", 0x7000, 0x0, 0x8000, 0x8000)
/* Xmega, 64K < Flash <= 128K, RAM <= 64K */
AVR_MCU ("avrxmega4",ARCH_AVRXMEGA4, AVR_ISA_NONE, NULL,
0x2000, 0x0, 0x11000, 0)
AVR_MCU ("atxmega64a3", ARCH_AVRXMEGA4, AVR_ISA_NONE,
"__AVR_ATxmega64A3__", 0x2000, 0x0, 0x11000, 0)
diff --git a/gcc/doc/avr-mmcu.texi b/gcc/doc/avr-mmcu.texi
index 50c7d3fa94d5..a8757d2c8473 100644
--- a/gcc/doc/avr-mmcu.texi
+++ b/gcc/doc/avr-mmcu.texi
@@ -50,11 +50,11 @@
@item avrxmega2
``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program
memory.
-@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u},
@code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4},
@code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4},
@code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28},
@code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28},
@code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14},
@code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64du28},
@code{avr64du32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48}.
+@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u},
@code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4},
@code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4},
@code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28},
@code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28},
@code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14},
@code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64du28},
@code{avr64du32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48},
@code{avr64sd28}, @code{avr64sd32}, @code{avr64sd48}.
@item avrxmega3
``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM,
and with program memory visible in the RAM address space.
-@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212},
@code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406},
@code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto},
@code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427},
@code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814},
@code{attiny816}, @code{attiny817}, @code{attiny824},
[gcc r14-11440] AVR: Add AVR-SD devices.
https://gcc.gnu.org/g:18f6f549013f6ab67ad079439c9ae44b38878803
commit r14-11440-g18f6f549013f6ab67ad079439c9ae44b38878803
Author: Georg-Johann Lay
Date: Sun Mar 23 13:23:25 2025 +0100
AVR: Add AVR-SD devices.
gcc/
* config/avr/avr-mcus.def: Add AVR32SD20, AVR32SD28, AVR32SD32,
AVR64SD28, AVR64SD32, AVR64SD48.
* doc/avr-mmcu.texi: Rebuild.
(cherry picked from commit 82e3832760600135764443b1a2ac8c200392f2f3)
Diff:
---
gcc/config/avr/avr-mcus.def | 6 ++
gcc/doc/avr-mmcu.texi | 4 ++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/gcc/config/avr/avr-mcus.def b/gcc/config/avr/avr-mcus.def
index 068875a2c60e..d8512ab3a677 100644
--- a/gcc/config/avr/avr-mcus.def
+++ b/gcc/config/avr/avr-mcus.def
@@ -326,6 +326,9 @@ AVR_MCU ("avr64du32",ARCH_AVRXMEGA2, AVR_ISA_FLMAP,
"__AVR_AVR64DU32__",
AVR_MCU ("avr64ea28",ARCH_AVRXMEGA2, AVR_ISA_FLMAP,
"__AVR_AVR64EA28__", 0x6800, 0x0, 0x1, 0)
AVR_MCU ("avr64ea32",ARCH_AVRXMEGA2, AVR_ISA_FLMAP,
"__AVR_AVR64EA32__", 0x6800, 0x0, 0x1, 0)
AVR_MCU ("avr64ea48",ARCH_AVRXMEGA2, AVR_ISA_FLMAP,
"__AVR_AVR64EA48__", 0x6800, 0x0, 0x1, 0)
+AVR_MCU ("avr64sd28",ARCH_AVRXMEGA2, AVR_ISA_FLMAP,
"__AVR_AVR64SD28__", 0x6000, 0x0, 0x1, 0)
+AVR_MCU ("avr64sd32",ARCH_AVRXMEGA2, AVR_ISA_FLMAP,
"__AVR_AVR64SD32__", 0x6000, 0x0, 0x1, 0)
+AVR_MCU ("avr64sd48",ARCH_AVRXMEGA2, AVR_ISA_FLMAP,
"__AVR_AVR64SD48__", 0x6000, 0x0, 0x1, 0)
/* Xmega, Flash + RAM < 64K, flash visible in RAM address space */
AVR_MCU ("avrxmega3",ARCH_AVRXMEGA3, AVR_ISA_NONE, NULL,
0x3f00, 0x0, 0x8000, 0)
AVR_MCU ("attiny202",ARCH_AVRXMEGA3, AVR_ISA_RCALL,
"__AVR_ATtiny202__", 0x3f80, 0x0, 0x800, 0x8000)
@@ -407,6 +410,9 @@ AVR_MCU ("avr16ea48",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16EA48__",
AVR_MCU ("avr32ea28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32EA28__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32ea32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32EA32__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32ea48",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32EA48__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32sd20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32SD20__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32sd28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32SD28__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32sd32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32SD32__", 0x7000, 0x0, 0x8000, 0x8000)
/* Xmega, 64K < Flash <= 128K, RAM <= 64K */
AVR_MCU ("avrxmega4",ARCH_AVRXMEGA4, AVR_ISA_NONE, NULL,
0x2000, 0x0, 0x11000, 0)
AVR_MCU ("atxmega64a3", ARCH_AVRXMEGA4, AVR_ISA_NONE,
"__AVR_ATxmega64A3__", 0x2000, 0x0, 0x11000, 0)
diff --git a/gcc/doc/avr-mmcu.texi b/gcc/doc/avr-mmcu.texi
index 671e66e7ffb4..b9013502d2fb 100644
--- a/gcc/doc/avr-mmcu.texi
+++ b/gcc/doc/avr-mmcu.texi
@@ -50,11 +50,11 @@
@item @anchor{avrxmega2}avrxmega2
``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of program
memory.
-@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u},
@code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4},
@code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4},
@code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28},
@code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28},
@code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14},
@code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64du28},
@code{avr64du32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48}.
+@*@var{mcu}@tie{}= @code{atxmega8e5}, @code{atxmega16a4}, @code{atxmega16a4u},
@code{atxmega16c4}, @code{atxmega16d4}, @code{atxmega16e5}, @code{atxmega32a4},
@code{atxmega32a4u}, @code{atxmega32c3}, @code{atxmega32c4},
@code{atxmega32d3}, @code{atxmega32d4}, @code{atxmega32e5}, @code{avr64da28},
@code{avr64da32}, @code{avr64da48}, @code{avr64da64}, @code{avr64db28},
@code{avr64db32}, @code{avr64db48}, @code{avr64db64}, @code{avr64dd14},
@code{avr64dd20}, @code{avr64dd28}, @code{avr64dd32}, @code{avr64du28},
@code{avr64du32}, @code{avr64ea28}, @code{avr64ea32}, @code{avr64ea48},
@code{avr64sd28}, @code{avr64sd32}, @code{avr64sd48}.
@item @anchor{avrxmega3}avrxmega3
``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM,
and with program memory visible in the RAM address space.
-@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212},
@code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406},
@code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto},
@code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427},
@code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814},
@code{attiny816
[gcc/devel/omp/gcc-14] c++: ICE with ptr-to-member-fn [PR119344]
https://gcc.gnu.org/g:1425cf8691eb018d0df8cc5ea373b2a8ca0e32bb
commit 1425cf8691eb018d0df8cc5ea373b2a8ca0e32bb
Author: Marek Polacek
Date: Mon Mar 17 17:46:02 2025 -0400
c++: ICE with ptr-to-member-fn [PR119344]
This ICE appeared with the removal of NON_DEPENDENT_EXPR. Previously
skip_simple_arithmetic would get NON_DEPENDENT_EXPR> and
since NON_DEPENDENT_EXPR is neither BINARY_CLASS_P nor UNARY_CLASS_P,
there was no problem. But now we pass just CAST_EXPR<> and a CAST_EXPR
is a tcc_unary, so we extract its null operand and crash.
skip_simple_arithmetic is called from save_expr. cp_save_expr already
avoids calling save_expr in a template, so that seems like an appropriate
way to fix this.
PR c++/119344
gcc/cp/ChangeLog:
* typeck.cc (cp_build_binary_op): Use cp_save_expr instead of
save_expr.
gcc/testsuite/ChangeLog:
* g++.dg/conversion/ptrmem10.C: New test.
Reviewed-by: Patrick Palka
Reviewed-by: Jason Merrill
(cherry picked from commit 6fc1f70f0b7b50fd85aa58a0f29dd1e17f2113d1)
Diff:
---
gcc/cp/typeck.cc | 20 ++--
gcc/testsuite/g++.dg/conversion/ptrmem10.C | 14 ++
2 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/gcc/cp/typeck.cc b/gcc/cp/typeck.cc
index 1e73dd7d0e57..7ae4535788ba 100644
--- a/gcc/cp/typeck.cc
+++ b/gcc/cp/typeck.cc
@@ -5434,7 +5434,7 @@ cp_build_binary_op (const op_location_t &location,
case stv_firstarg:
{
op0 = convert (TREE_TYPE (type1), op0);
- op0 = save_expr (op0);
+ op0 = cp_save_expr (op0);
op0 = build_vector_from_val (type1, op0);
orig_type0 = type0 = TREE_TYPE (op0);
code0 = TREE_CODE (type0);
@@ -5444,7 +5444,7 @@ cp_build_binary_op (const op_location_t &location,
case stv_secondarg:
{
op1 = convert (TREE_TYPE (type0), op1);
- op1 = save_expr (op1);
+ op1 = cp_save_expr (op1);
op1 = build_vector_from_val (type0, op1);
orig_type1 = type1 = TREE_TYPE (op1);
code1 = TREE_CODE (type1);
@@ -5968,9 +5968,9 @@ cp_build_binary_op (const op_location_t &location,
return error_mark_node;
if (TREE_SIDE_EFFECTS (op0))
- op0 = save_expr (op0);
+ op0 = cp_save_expr (op0);
if (TREE_SIDE_EFFECTS (op1))
- op1 = save_expr (op1);
+ op1 = cp_save_expr (op1);
pfn0 = pfn_from_ptrmemfunc (op0);
pfn0 = cp_fully_fold (pfn0);
@@ -6206,8 +6206,8 @@ cp_build_binary_op (const op_location_t &location,
&& !processing_template_decl
&& sanitize_flags_p (SANITIZE_POINTER_COMPARE))
{
- op0 = save_expr (op0);
- op1 = save_expr (op1);
+ op0 = cp_save_expr (op0);
+ op1 = cp_save_expr (op1);
tree tt = builtin_decl_explicit (BUILT_IN_ASAN_POINTER_COMPARE);
instrument_expr = build_call_expr_loc (location, tt, 2, op0, op1);
@@ -6467,14 +6467,14 @@ cp_build_binary_op (const op_location_t &location,
return error_mark_node;
if (first_complex)
{
- op0 = save_expr (op0);
+ op0 = cp_save_expr (op0);
real = cp_build_unary_op (REALPART_EXPR, op0, true, complain);
imag = cp_build_unary_op (IMAGPART_EXPR, op0, true, complain);
switch (code)
{
case MULT_EXPR:
case TRUNC_DIV_EXPR:
- op1 = save_expr (op1);
+ op1 = cp_save_expr (op1);
imag = build2 (resultcode, real_type, imag, op1);
/* Fall through. */
case PLUS_EXPR:
@@ -6487,13 +6487,13 @@ cp_build_binary_op (const op_location_t &location,
}
else
{
- op1 = save_expr (op1);
+ op1 = cp_save_expr (op1);
real = cp_build_unary_op (REALPART_EXPR, op1, true, complain);
imag = cp_build_unary_op (IMAGPART_EXPR, op1, true, complain);
switch (code)
{
case MULT_EXPR:
- op0 = save_expr (op0);
+ op0 = cp_save_expr (op0);
imag = build2 (resultcode, real_type, op0, imag);
/* Fall through. */
case PLUS_EXPR:
diff --git a/gcc/testsuite/g++.dg/conversion/ptrmem10.C
b/gcc/testsuite/g++.dg/conversion/ptrmem10.C
new file mode 100644
index ..b5fc050ee814
--- /dev/null
+++ b/gcc/testsuite/g++.dg/conversion/ptrmem10.C
@@ -0,0 +1,14 @@
+// PR c++/119344
+// { dg-do compile { target c++11 } }
+
+struct S {
+void fn();
+};
+typedef void (S::*T)(void);
+template
+struct s
+{
+ static const bool t = Ptr != T();
+};
+
+int t1 = s<&S::fn>::t;
[gcc r15-8520] gccrs: hir: Mark AttrVec::get_outer_attrs as override
https://gcc.gnu.org/g:71c8af9c894eb36c78df44b06f8dde4cfbea9163
commit r15-8520-g71c8af9c894eb36c78df44b06f8dde4cfbea9163
Author: Arthur Cohen
Date: Wed Nov 6 15:15:02 2024 +0100
gccrs: hir: Mark AttrVec::get_outer_attrs as override
gcc/rust/ChangeLog:
* hir/tree/rust-hir.h: Add override qualifier to overriden method.
Diff:
---
gcc/rust/hir/tree/rust-hir.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/rust/hir/tree/rust-hir.h b/gcc/rust/hir/tree/rust-hir.h
index 8ce5cf4d1025..8544d0d5f09d 100644
--- a/gcc/rust/hir/tree/rust-hir.h
+++ b/gcc/rust/hir/tree/rust-hir.h
@@ -673,7 +673,7 @@ public:
// Returns whether the lifetime param has an outer attribute.
bool has_outer_attribute () const override { return outer_attrs.size () > 1;
}
- AST::AttrVec &get_outer_attrs () { return outer_attrs; }
+ AST::AttrVec &get_outer_attrs () override { return outer_attrs; }
// Returns whether the lifetime param is in an error state.
bool is_error () const { return lifetime.is_error (); }
[gcc r15-8691] i386: Remove 256 bit rounding for AVX10.2 minmax and convert instructions
https://gcc.gnu.org/g:1a5a77f1eb43acdf90fff2da0a0f37186aecbdf4
commit r15-8691-g1a5a77f1eb43acdf90fff2da0a0f37186aecbdf4
Author: Haochen Jiang
Date: Mon Mar 24 14:23:37 2025 +0800
i386: Remove 256 bit rounding for AVX10.2 minmax and convert instructions
Since we will support 512 bit on both P-core and E-core, 256 bit
rounding is not that useful because we currently have rounding feature
directly on E-core now and no need to use 256-bit rounding as somehow
a workaround. This patch will remove those in AVX10.2 minmax and convert
intrins.
gcc/ChangeLog:
* config/i386/avx10_2convertintrin.h: Remove rounding intrins.
Use non-round builtins.
* config/i386/avx10_2minmaxintrin.h: Ditto.
* config/i386/i386-builtin.def (BDESC): Ditto.
* config/i386/i386-builtin-types.def: Remove unused type.
* config/i386/i386-expand.cc
(ix86_expand_args_builtin): Ditto.
(ix86_expand_round_builtin): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx-1.c: Remove rounding tests.
* gcc.target/i386/avx10_2-convert-1.c: Ditto.
* gcc.target/i386/avx10_2-minmax-1.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
Diff:
---
gcc/config/i386/avx10_2convertintrin.h| 94 +--
gcc/config/i386/avx10_2minmaxintrin.h | 318 +-
gcc/config/i386/i386-builtin-types.def| 3 +-
gcc/config/i386/i386-builtin.def | 8 +-
gcc/config/i386/i386-expand.cc| 3 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 9 +-
gcc/testsuite/gcc.target/i386/avx10_2-convert-1.c | 6 -
gcc/testsuite/gcc.target/i386/avx10_2-minmax-1.c | 27 --
gcc/testsuite/gcc.target/i386/sse-13.c| 9 +-
gcc/testsuite/gcc.target/i386/sse-14.c| 12 -
gcc/testsuite/gcc.target/i386/sse-22.c| 12 -
gcc/testsuite/gcc.target/i386/sse-23.c| 9 +-
12 files changed, 98 insertions(+), 412 deletions(-)
diff --git a/gcc/config/i386/avx10_2convertintrin.h
b/gcc/config/i386/avx10_2convertintrin.h
index 7c9c238a3b43..4513b35050c0 100644
--- a/gcc/config/i386/avx10_2convertintrin.h
+++ b/gcc/config/i386/avx10_2convertintrin.h
@@ -70,100 +70,34 @@ extern __inline __m256h
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cvtx2ps_ph (__m256 __A, __m256 __B)
{
- return (__m256h) __builtin_ia32_vcvt2ps2phx256_mask_round ((__v8sf) __A,
-(__v8sf) __B,
-(__v16hf)
-_mm256_setzero_ph
(),
-(__mmask16) -1,
-
_MM_FROUND_CUR_DIRECTION);
+ return (__m256h) __builtin_ia32_vcvt2ps2phx256_mask ((__v8sf) __A,
+ (__v8sf) __B,
+ (__v16hf)
+ _mm256_setzero_ph (),
+ (__mmask16) -1);
}
extern __inline __m256h
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_cvtx2ps_ph (__m256h __W, __mmask16 __U, __m256 __A, __m256 __B)
{
- return (__m256h) __builtin_ia32_vcvt2ps2phx256_mask_round ((__v8sf) __A,
-(__v8sf) __B,
-(__v16hf) __W,
-(__mmask16) __U,
-
_MM_FROUND_CUR_DIRECTION);
+ return (__m256h) __builtin_ia32_vcvt2ps2phx256_mask ((__v8sf) __A,
+ (__v8sf) __B,
+ (__v16hf) __W,
+ (__mmask16) __U);
}
extern __inline __m256h
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_maskz_cvtx2ps_ph ( __mmask16 __U, __m256 __A, __m256 __B)
{
- return (__m256h) __builtin_ia32_vcvt2ps2phx256_mask_round ((__v8sf) __A,
-(__v8sf) __B,
-(__v16hf)
-_mm256_setzero_ph
(),
-(__mmask16) __U,
-
_MM_FROUND_CUR_DIRECTION);
-}
-
-#ifdef __OPTIMIZE__
-extern __inline _
[gcc r15-8696] Revert "AVX10.2 ymm rounding: Support vmulp{s, d, h} and vrangep{s, d} intrins"
https://gcc.gnu.org/g:f2367fcb3377cf95869095514be99e7633aad3d2
commit r15-8696-gf2367fcb3377cf95869095514be99e7633aad3d2
Author: Haochen Jiang
Date: Mon Mar 24 14:23:51 2025 +0800
Revert "AVX10.2 ymm rounding: Support vmulp{s,d,h} and vrangep{s,d} intrins"
This reverts commit 90cc5b0c4609a9fb3257d2cce7b7abc896c6faab.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 313 -
gcc/config/i386/i386-builtin-types.def | 2 -
gcc/config/i386/i386-builtin.def | 5 -
gcc/config/i386/i386-expand.cc | 2 -
gcc/testsuite/gcc.target/i386/avx-1.c | 5 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 43 ---
gcc/testsuite/gcc.target/i386/sse-13.c | 5 -
gcc/testsuite/gcc.target/i386/sse-14.c | 15 -
gcc/testsuite/gcc.target/i386/sse-22.c | 15 -
gcc/testsuite/gcc.target/i386/sse-23.c | 5 -
10 files changed, 410 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index f42bb4f0d0a0..f6551039fbba 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -3454,198 +3454,6 @@ _mm256_maskz_min_round_ps (__mmask8 __U, __m256 __A,
__m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mul_round_pd (__m256d __A, __m256d __B, const int __R)
-{
- return (__m256d) __builtin_ia32_mulpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df)
- _mm256_undefined_pd (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_mul_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
- __m256d __B, const int __R)
-{
- return (__m256d) __builtin_ia32_mulpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_mul_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
- const int __R)
-{
- return (__m256d) __builtin_ia32_mulpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mul_round_ph (__m256h __A, __m256h __B, const int __R)
-{
- return (__m256h) __builtin_ia32_mulph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf)
- _mm256_undefined_ph (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_mul_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
- __m256h __B, const int __R)
-{
- return (__m256h) __builtin_ia32_mulph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_mul_round_ph (__mmask16 __U, __m256h __A, __m256h __B,
- const int __R)
-{
- return (__m256h) __builtin_ia32_mulph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
- __R);
[gcc r15-8712] Revert "AVX10.2 ymm rounding: Support vcvtpd2{, u}{dq, qq} intrins"
https://gcc.gnu.org/g:1d15565adb7d68c00b95151a078303f1e2fd1892
commit r15-8712-g1d15565adb7d68c00b95151a078303f1e2fd1892
Author: Haochen Jiang
Date: Mon Mar 24 14:24:29 2025 +0800
Revert "AVX10.2 ymm rounding: Support vcvtpd2{,u}{dq,qq} intrins"
This reverts commit 508ac49e1a94c28346642bff512d0ed5f4f58b64.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 218 -
gcc/config/i386/i386-builtin-types.def | 2 -
gcc/config/i386/i386-builtin.def | 4 -
gcc/config/i386/i386-expand.cc | 2 -
gcc/config/i386/sse.md | 13 +-
gcc/config/i386/subst.md | 1 -
gcc/testsuite/gcc.target/i386/avx-1.c | 4 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c | 33
gcc/testsuite/gcc.target/i386/sse-13.c | 4 -
gcc/testsuite/gcc.target/i386/sse-14.c | 12 --
gcc/testsuite/gcc.target/i386/sse-22.c | 12 --
gcc/testsuite/gcc.target/i386/sse-23.c | 4 -
12 files changed, 6 insertions(+), 303 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index 1576f17be3bf..d27444912563 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -348,144 +348,6 @@ _mm256_maskz_cvt_roundpd_ps (__mmask8 __U, __m256d __A,
const int __R)
(__mmask8) __U,
__R);
}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundpd_epi32 (__m256d __A, const int __R)
-{
- return
-(__m128i) __builtin_ia32_cvtpd2dq256_mask_round ((__v4df) __A,
-(__v4si)
-_mm_undefined_si128 (),
-(__mmask8) -1,
-__R);
-}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundpd_epi32 (__m128i __W, __mmask8 __U, __m256d __A,
- const int __R)
-{
- return (__m128i) __builtin_ia32_cvtpd2dq256_mask_round ((__v4df) __A,
- (__v4si) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundpd_epi32 (__mmask8 __U, __m256d __A, const int __R)
-{
- return (__m128i) __builtin_ia32_cvtpd2dq256_mask_round ((__v4df) __A,
- (__v4si)
- _mm_setzero_si128 (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundpd_epi64 (__m256d __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_cvtpd2qq256_mask_round ((__v4df) __A,
-(__v4di)
-_mm256_setzero_si256 (),
-(__mmask8) -1,
-__R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundpd_epi64 (__m256i __W, __mmask8 __U, __m256d __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_cvtpd2qq256_mask_round ((__v4df) __A,
- (__v4di) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundpd_epi64 (__mmask8 __U, __m256d __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_cvtpd2qq256_mask_round ((__v4df) __A,
-(__v4di)
-_mm256_setzero_si256 (),
-(__mmask8) __U,
-__R);
-}
-
-extern __inline __m128i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundpd_epu32 (__m256d __A, const int __R)
-{
- return
-(__m128i) __builtin_ia32_cvtpd2udq256_mask_round ((__v4df) __A,
- (__v4si)
-
[gcc r15-8713] Revert "AVX10.2 ymm rounding: Support vcvtdq2p{s, h} and vcvtpd2p{s, h} intrins"
https://gcc.gnu.org/g:a5caa9ad987533d83313e9cfce3285f51528775e
commit r15-8713-ga5caa9ad987533d83313e9cfce3285f51528775e
Author: Haochen Jiang
Date: Mon Mar 24 14:24:31 2025 +0800
Revert "AVX10.2 ymm rounding: Support vcvtdq2p{s,h} and vcvtpd2p{s,h}
intrins"
This reverts commit 85e874d19548f0dcb9a3f14f9e4b1e3411c88c4b.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 210 -
gcc/config/i386/i386-builtin-types.def | 4 -
gcc/config/i386/i386-builtin.def | 4 -
gcc/config/i386/i386-expand.cc | 4 -
gcc/config/i386/sse.md | 32 +---
gcc/config/i386/subst.md | 4 -
gcc/testsuite/gcc.target/i386/avx-1.c | 4 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c | 44 +
gcc/testsuite/gcc.target/i386/sse-13.c | 4 -
gcc/testsuite/gcc.target/i386/sse-14.c | 12 --
gcc/testsuite/gcc.target/i386/sse-22.c | 12 --
gcc/testsuite/gcc.target/i386/sse-23.c | 4 -
12 files changed, 16 insertions(+), 322 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index d27444912563..9d6a49742ae7 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -216,138 +216,6 @@ _mm256_mask_cmp_round_ps_mask (__mmask8 __U, __m256 __A,
__m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepi32_ph (__m256i __A, const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtdq2ph256_mask_round ((__v8si) __A,
- (__v8hf)
- _mm_setzero_ph (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundepi32_ph (__m128h __W, __mmask8 __U, __m256i __A,
- const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtdq2ph256_mask_round ((__v8si) __A,
- (__v8hf) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundepi32_ph (__mmask8 __U, __m256i __A, const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtdq2ph256_mask_round ((__v8si) __A,
- (__v8hf)
- _mm_setzero_ph (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepi32_ps (__m256i __A, const int __R)
-{
- return (__m256) __builtin_ia32_cvtdq2ps256_mask_round ((__v8si) __A,
-(__v8sf)
-_mm256_undefined_ps (),
-(__mmask8) -1,
-__R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundepi32_ps (__m256 __W, __mmask8 __U, __m256i __A,
- const int __R)
-{
- return (__m256) __builtin_ia32_cvtdq2ps256_mask_round ((__v8si) __A,
-(__v8sf) __W,
-(__mmask8) __U,
-__R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundepi32_ps (__mmask8 __U, __m256i __A, const int __R)
-{
- return (__m256) __builtin_ia32_cvtdq2ps256_mask_round ((__v8si) __A,
-(__v8sf)
-_mm256_setzero_ps (),
-(__mmask8) __U,
-__R);
-}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundpd_ph (__m256d __A, const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtpd2ph256_mask_round ((__v4df) __A,
- (__v8hf
[gcc r15-8692] i386: Remove 256 bit rounding for AVX10.2 saturation convert instructions
https://gcc.gnu.org/g:bf54429c8dc0118587b969b4f9ce0f08c8c08115
commit r15-8692-gbf54429c8dc0118587b969b4f9ce0f08c8c08115
Author: Haochen Jiang
Date: Mon Mar 24 14:23:40 2025 +0800
i386: Remove 256 bit rounding for AVX10.2 saturation convert instructions
Since we will support 512 bit on both P-core and E-core, 256 bit
rounding is not that useful because we currently have rounding feature
directly on E-core now and no need to use 256-bit rounding as somehow
a workaround. This patch will remove 256 bit rounding in AVX10.2 satcvt
intrins.
gcc/ChangeLog:
* config/i386/avx10_2satcvtintrin.h: Remove rounding intrins.
Use non-round intrins.
* config/i386/i386-builtin.def (BDESC): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c: Adjust condition
for rounding test.
* gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c: Ditto.
* gcc.target/i386/avx-1.c: Remove rounding tests.
* gcc.target/i386/avx10_2-satcvt-1.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
Diff:
---
gcc/config/i386/avx10_2satcvtintrin.h | 1103 +---
gcc/config/i386/i386-builtin.def | 16 -
gcc/testsuite/gcc.target/i386/avx-1.c | 16 -
.../gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c |2 +-
.../gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c|2 +-
.../gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c |2 +-
.../gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c|2 +-
.../gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c|2 +-
.../gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c|2 +-
.../gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c |2 +-
.../gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c |2 +-
.../gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c|2 +-
.../gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c |2 +-
.../gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c|2 +-
.../gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c|2 +-
.../gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c |2 +-
.../gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c|2 +-
.../gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c |2 +-
.../gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c |2 +-
gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c | 104 +-
gcc/testsuite/gcc.target/i386/sse-13.c | 16 -
gcc/testsuite/gcc.target/i386/sse-14.c | 48 -
gcc/testsuite/gcc.target/i386/sse-22.c | 48 -
gcc/testsuite/gcc.target/i386/sse-23.c | 16 -
24 files changed, 25 insertions(+), 1374 deletions(-)
diff --git a/gcc/config/i386/avx10_2satcvtintrin.h
b/gcc/config/i386/avx10_2satcvtintrin.h
index c662c4b76309..e68a066ae5e9 100644
--- a/gcc/config/i386/avx10_2satcvtintrin.h
+++ b/gcc/config/i386/avx10_2satcvtintrin.h
@@ -1267,566 +1267,6 @@ _mm_cvtts_ss_epu32 (__m128 __A)
}
#ifdef __OPTIMIZE__
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_ipcvts_roundph_epi8 (__m256h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_cvtph2ibs256_mask_round ((__v16hf) __A,
- (__v16hi)
- _mm256_undefined_si256 (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_ipcvts_roundph_epi8 (__m256i __W, __mmask16 __U, __m256h __A,
-const int __R)
-{
- return (__m256i) __builtin_ia32_cvtph2ibs256_mask_round ((__v16hf) __A,
- (__v16hi) __W,
-
[gcc r15-8701] Revert "AVX10.2 ymm rounding: Support vfm{sub, subadd}{132, 231, 213}p{s, d, h} intrins"
https://gcc.gnu.org/g:1cceae938241058582930b2d600eb88966a71284
commit r15-8701-g1cceae938241058582930b2d600eb88966a71284
Author: Haochen Jiang
Date: Mon Mar 24 14:23:58 2025 +0800
Revert "AVX10.2 ymm rounding: Support vfm{sub,subadd}{132,231,213}p{s,d,h}
intrins"
This reverts commit dd48acbe85ca55dd23ffafbb917ffe559d13b6a3.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 350 -
gcc/config/i386/i386-builtin.def | 18 --
gcc/config/i386/sse.md | 2 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 18 --
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 62
gcc/testsuite/gcc.target/i386/sse-13.c | 18 --
gcc/testsuite/gcc.target/i386/sse-14.c | 24 --
gcc/testsuite/gcc.target/i386/sse-22.c | 24 --
gcc/testsuite/gcc.target/i386/sse-23.c | 18 --
9 files changed, 1 insertion(+), 533 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index 38ee006fbca1..ed878cb06a98 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -2419,284 +2419,6 @@ _mm256_maskz_fmaddsub_round_ps (__mmask8 __U, __m256
__A, __m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmsub_round_pd (__m256d __A, __m256d __B, __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmsubpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) -1, __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmsub_round_pd (__m256d __A, __mmask8 __U, __m256d __B,
- __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmsubpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U, __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmsub_round_pd (__m256d __A, __m256d __B, __m256d __D,
-__mmask8 __U, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmsubpd256_mask3_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U, __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fmsub_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
-__m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmsubpd256_maskz_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U, __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmsub_round_ph (__m256h __A, __m256h __B, __m256h __D, const int __R)
-{
- return (__m256h)
-__builtin_ia32_vfmsubph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) -1, __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmsub_round_ph (__m256h __A, __mmask16 __U, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h)
-__builtin_ia32_vfmsubph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) __U, __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmsub_round_ph (__m256h __A, __m256h __B, __m256h __D,
-__mmask16 __U, const int __R)
-{
- return (__m256h)
-__builtin_ia32_vfmsubph256_mask3_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) __U, __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __alway
[gcc r15-8695] Revert "AVX10.2 ymm rounding: Support vreducep{s, d, h} and vrndscalep{s, d, h} intrins"
https://gcc.gnu.org/g:0ca02194d25a7759c05cfc213941fdae73537a96
commit r15-8695-g0ca02194d25a7759c05cfc213941fdae73537a96
Author: Haochen Jiang
Date: Mon Mar 24 14:23:45 2025 +0800
Revert "AVX10.2 ymm rounding: Support vreducep{s,d,h} and vrndscalep{s,d,h}
intrins"
This reverts commit 9afa5081212e1fc3cb2c4efc9b4f421eecf68810.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 367 -
gcc/config/i386/i386-builtin.def | 6 -
gcc/config/i386/sse.md | 4 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 6 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 50 ---
gcc/testsuite/gcc.target/i386/sse-13.c | 6 -
gcc/testsuite/gcc.target/i386/sse-14.c | 18 -
gcc/testsuite/gcc.target/i386/sse-22.c | 18 -
gcc/testsuite/gcc.target/i386/sse-23.c | 6 -
9 files changed, 2 insertions(+), 479 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index 6815688c1d0e..f42bb4f0d0a0 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -3646,233 +3646,6 @@ _mm256_maskz_range_round_ps (__mmask8 __U, __m256 __A,
__m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_reduce_round_pd (__m256d __A, const int __C, const int __R)
-{
- return (__m256d) __builtin_ia32_reducepd256_mask_round ((__v4df) __A,
- __C,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_reduce_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
-const int __C, const int __R)
-{
- return (__m256d) __builtin_ia32_reducepd256_mask_round ((__v4df) __A,
- __C,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_reduce_round_pd (__mmask8 __U, __m256d __A, const int __C,
- const int __R)
-{
- return (__m256d) __builtin_ia32_reducepd256_mask_round ((__v4df) __A,
- __C,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_reduce_round_ph (__m256h __A, const int __C, const int __R)
-{
- return (__m256h) __builtin_ia32_reduceph256_mask_round ((__v16hf) __A,
- __C,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_reduce_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
-const int __C, const int __R)
-{
- return (__m256h) __builtin_ia32_reduceph256_mask_round ((__v16hf) __A,
- __C,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_reduce_round_ph (__mmask16 __U, __m256h __A, const int __C,
- const int __R)
-{
- return (__m256h) __builtin_ia32_reduceph256_mask_round ((__v16hf) __A,
- __C,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
-
[gcc r15-8698] Revert "AVX10.2 ymm rounding: Support vgetexpp{s, d, h} and vgetmantp{s, d, h} intrins"
https://gcc.gnu.org/g:0e2a74bf745c4aa05a186a7c21e660cad01d4c1c
commit r15-8698-g0e2a74bf745c4aa05a186a7c21e660cad01d4c1c
Author: Haochen Jiang
Date: Mon Mar 24 14:23:54 2025 +0800
Revert "AVX10.2 ymm rounding: Support vgetexpp{s,d,h} and vgetmantp{s,d,h}
intrins"
This reverts commit 8d4f542935c09f40bb7fd8fd863cc8df80cc970e.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 341 -
gcc/config/i386/i386-builtin-types.def | 6 -
gcc/config/i386/i386-builtin.def | 6 -
gcc/config/i386/i386-expand.cc | 6 -
gcc/config/i386/sse.md | 4 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 6 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 59
gcc/testsuite/gcc.target/i386/sse-13.c | 6 -
gcc/testsuite/gcc.target/i386/sse-14.c | 18 --
gcc/testsuite/gcc.target/i386/sse-22.c | 18 --
gcc/testsuite/gcc.target/i386/sse-23.c | 6 -
11 files changed, 2 insertions(+), 474 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index 2080b44a7a85..cf9ba411c307 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -3021,217 +3021,6 @@ _mm256_maskz_fnmsub_round_ps (__mmask8 __U, __m256 __A,
__m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_getexp_round_pd (__m256d __A, const int __R)
-{
- return
-(__m256d) __builtin_ia32_getexppd256_mask_round ((__v4df) __A,
-(__v4df)
-_mm256_undefined_pd (),
-(__mmask8) -1,
-__R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_getexp_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
-const int __R)
-{
- return (__m256d) __builtin_ia32_getexppd256_mask_round ((__v4df) __A,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_getexp_round_pd (__mmask8 __U, __m256d __A, const int __R)
-{
- return (__m256d) __builtin_ia32_getexppd256_mask_round ((__v4df) __A,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_getexp_round_ph (__m256h __A, const int __R)
-{
- return (__m256h) __builtin_ia32_getexpph256_mask_round ((__v16hf) __A,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_getexp_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
-const int __R)
-{
- return (__m256h) __builtin_ia32_getexpph256_mask_round ((__v16hf) __A,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_getexp_round_ph (__mmask16 __U, __m256h __A, const int __R)
-{
- return (__m256h) __builtin_ia32_getexpph256_mask_round ((__v16hf) __A,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_getexp_round_ps (__m256 __A, const int __R)
-{
- return (__m256) __builtin_ia32_getexpps256_mask_round ((__v8sf) __A,
-(__v8sf)
-_mm256_u
[gcc r15-8694] Revert "AVX10.2 ymm rounding: Support vscalefp{s, d, h} intrins"
https://gcc.gnu.org/g:cbed647fb6484d751c0b544d4ece3f478aa50d08
commit r15-8694-gcbed647fb6484d751c0b544d4ece3f478aa50d08
Author: Haochen Jiang
Date: Mon Mar 24 14:23:43 2025 +0800
Revert "AVX10.2 ymm rounding: Support vscalefp{s,d,h} intrins"
This reverts commit 1f86cf06c7897f6ab467443b5fe8789cc95fe0c4.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 182 -
gcc/config/i386/i386-builtin.def | 3 -
gcc/config/i386/sse.md | 2 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 3 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 25 ---
gcc/testsuite/gcc.target/i386/sse-13.c | 3 -
gcc/testsuite/gcc.target/i386/sse-14.c | 9 -
gcc/testsuite/gcc.target/i386/sse-22.c | 9 -
gcc/testsuite/gcc.target/i386/sse-23.c | 3 -
9 files changed, 1 insertion(+), 238 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index b40ef031ae5a..6815688c1d0e 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -3873,119 +3873,6 @@ _mm256_maskz_roundscale_round_ps (__mmask8 __U, __m256
__A, const int __C,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_scalef_round_pd (__m256d __A, __m256d __B, const int __R)
-{
- return
-(__m256d) __builtin_ia32_scalefpd256_mask_round ((__v4df) __A,
-(__v4df) __B,
-(__v4df)
-_mm256_undefined_pd (),
-(__mmask8) -1,
-__R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_scalef_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
-__m256d __B, const int __R)
-{
- return (__m256d) __builtin_ia32_scalefpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_scalef_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
- const int __R)
-{
- return (__m256d) __builtin_ia32_scalefpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_scalef_round_ph (__m256h __A, __m256h __B, const int __R)
-{
- return
-(__m256h) __builtin_ia32_scalefph256_mask_round ((__v16hf) __A,
-(__v16hf) __B,
-(__v16hf)
-_mm256_undefined_ph (),
-(__mmask16) -1,
-__R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_scalef_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
-__m256h __B, const int __R)
-{
- return (__m256h) __builtin_ia32_scalefph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_scalef_round_ph (__mmask16 __U, __m256h __A, __m256h __B,
- const int __R)
-{
- return (__m256h) __builtin_ia32_scalefph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
-
[gcc r15-8697] Revert "AVX10.2 ymm rounding: Support v{max, min}p{s, d, h} intrins"
https://gcc.gnu.org/g:3fc26227878727cde701bb37de2818d44c256914
commit r15-8697-g3fc26227878727cde701bb37de2818d44c256914
Author: Haochen Jiang
Date: Mon Mar 24 14:23:52 2025 +0800
Revert "AVX10.2 ymm rounding: Support v{max,min}p{s,d,h} intrins"
This reverts commit cc8a7596477e9d6ac972aadabbb2fd88baa1abf4.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 360 -
gcc/config/i386/i386-builtin.def | 6 -
gcc/testsuite/gcc.target/i386/avx-1.c | 6 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 50 ---
gcc/testsuite/gcc.target/i386/sse-13.c | 6 -
gcc/testsuite/gcc.target/i386/sse-14.c | 18 --
gcc/testsuite/gcc.target/i386/sse-22.c | 18 --
gcc/testsuite/gcc.target/i386/sse-23.c | 6 -
8 files changed, 470 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index f6551039fbba..2080b44a7a85 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -3232,228 +3232,6 @@ _mm256_maskz_getmant_round_ps (__mmask8 __U, __m256 __A,
_mm256_setzero_ps (),
__U, __R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_max_round_pd (__m256d __A, __m256d __B, const int __R)
-{
- return (__m256d) __builtin_ia32_maxpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df)
- _mm256_undefined_pd (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_max_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
- __m256d __B, const int __R)
-{
- return (__m256d) __builtin_ia32_maxpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_max_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
- const int __R)
-{
- return (__m256d) __builtin_ia32_maxpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_max_round_ph (__m256h __A, __m256h __B, const int __R)
-{
- return (__m256h) __builtin_ia32_maxph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf)
- _mm256_undefined_ph (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_max_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
- __m256h __B, const int __R)
-{
- return (__m256h) __builtin_ia32_maxph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_max_round_ph (__mmask16 __U, __m256h __A, __m256h __B,
- const int __R)
-{
- return (__m256h) __builtin_ia32_maxph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_max_round_ps (
[gcc r15-8693] Revert "AVX10.2 ymm rounding: Support vsqrtp{s, d, h} and vsubp{s, d, h} intrins"
https://gcc.gnu.org/g:dd4dac26025f06e99afa983e68323a004c28622e
commit r15-8693-gdd4dac26025f06e99afa983e68323a004c28622e
Author: Haochen Jiang
Date: Mon Mar 24 14:23:42 2025 +0800
Revert "AVX10.2 ymm rounding: Support vsqrtp{s,d,h} and vsubp{s,d,h}
intrins"
This reverts commit 7f62e7104ebc11c4570745972a023579922ef265.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 339 -
gcc/config/i386/i386-builtin.def | 6 -
gcc/testsuite/gcc.target/i386/avx-1.c | 6 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 50 ---
gcc/testsuite/gcc.target/i386/sse-13.c | 7 -
gcc/testsuite/gcc.target/i386/sse-14.c | 18 --
gcc/testsuite/gcc.target/i386/sse-22.c | 15 -
gcc/testsuite/gcc.target/i386/sse-23.c | 6 -
8 files changed, 447 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index e36843d1930f..b40ef031ae5a 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -3986,216 +3986,6 @@ _mm256_maskz_scalef_round_ps (__mmask8 __U, __m256 __A,
__m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_sqrt_round_pd (__m256d __A, const int __R)
-{
- return (__m256d) __builtin_ia32_sqrtpd256_mask_round ((__v4df) __A,
- (__v4df)
- _mm256_undefined_pd (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_sqrt_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
- const int __R)
-{
- return (__m256d) __builtin_ia32_sqrtpd256_mask_round ((__v4df) __A,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_sqrt_round_pd (__mmask8 __U, __m256d __A, const int __R)
-{
- return (__m256d) __builtin_ia32_sqrtpd256_mask_round ((__v4df) __A,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_sqrt_round_ph (__m256h __A, const int __R)
-{
- return (__m256h) __builtin_ia32_sqrtph256_mask_round ((__v16hf) __A,
- (__v16hf)
- _mm256_undefined_ph (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_sqrt_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
- const int __R)
-{
- return (__m256h) __builtin_ia32_sqrtph256_mask_round ((__v16hf) __A,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_sqrt_round_ph (__mmask16 __U, __m256h __A, const int __R)
-{
- return (__m256h) __builtin_ia32_sqrtph256_mask_round ((__v16hf) __A,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_sqrt_round_ps (__m256 __A, const int __R)
-{
- return (__m256) __builtin_ia32_sqrtps256_mask_round ((__v8sf) __A,
- (__v8sf)
- _mm256_undefined_ps (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_sqrt_round_ps (_
[gcc r15-8704] Revert "AVX10.2 ymm rounding: Support vfc{madd, mul}cph, vfixupimmp{s, d} intrins"
https://gcc.gnu.org/g:c40e4cd1cf382adaa4f1e66278610a728aa6a258
commit r15-8704-gc40e4cd1cf382adaa4f1e66278610a728aa6a258
Author: Haochen Jiang
Date: Mon Mar 24 14:24:03 2025 +0800
Revert "AVX10.2 ymm rounding: Support vfc{madd,mul}cph, vfixupimmp{s,d}
intrins"
This reverts commit 95980b292b24110d3f1dffb81926df23c61b4fe7.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 247 -
gcc/config/i386/i386-builtin-types.def | 5 -
gcc/config/i386/i386-builtin.def | 10 -
gcc/config/i386/i386-expand.cc | 5 -
gcc/config/i386/sse.md | 4 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 10 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 49
gcc/testsuite/gcc.target/i386/sse-13.c | 10 -
gcc/testsuite/gcc.target/i386/sse-14.c | 13 --
gcc/testsuite/gcc.target/i386/sse-22.c | 13 --
gcc/testsuite/gcc.target/i386/sse-23.c | 10 -
11 files changed, 2 insertions(+), 374 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index f65533b16816..f0ac3f15ce1a 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -1934,164 +1934,6 @@ _mm256_maskz_div_round_ps (__mmask8 __U, __m256 __A,
__m256 __B,
(__mmask8) __U,
__R);
}
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fcmadd_round_pch (__m256h __A, __m256h __B, __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmaddcph256_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fcmadd_round_pch (__m256h __A, __mmask8 __U, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmaddcph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fcmadd_round_pch (__m256h __A, __m256h __B, __m256h __D,
- __mmask8 __U, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmaddcph256_mask3_round ((__v16hf) __A,
-(__v16hf) __B,
-(__v16hf) __D,
-__U,
-__R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fcmadd_round_pch (__mmask8 __U, __m256h __A, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmaddcph256_maskz_round ((__v16hf) __A,
-(__v16hf) __B,
-(__v16hf) __D,
-__U,
-__R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fcmul_round_pch (__m256h __A, __m256h __B, const int __R)
-{
- return
-(__m256h) __builtin_ia32_vfcmulcph256_round ((__v16hf) __A,
-(__v16hf) __B,
-__R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fcmul_round_pch (__m256h __W, __mmask8 __U, __m256h __A,
-__m256h __B, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmulcph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fcmul_round_pch (__mmask8 __U, __m256h __A, __m256h __B,
- const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmulcph256_mask_ro
[gcc r15-8700] Revert "AVX10.2 ymm rounding: Support vfmulcph and vfnmadd{132, 231, 213}p{s, d, h} intrins"
https://gcc.gnu.org/g:3f2d586544b962971d8fb26d3198c8c6e7fc964a
commit r15-8700-g3f2d586544b962971d8fb26d3198c8c6e7fc964a
Author: Haochen Jiang
Date: Mon Mar 24 14:23:56 2025 +0800
Revert "AVX10.2 ymm rounding: Support vfmulcph and
vfnmadd{132,231,213}p{s,d,h} intrins"
This reverts commit 6f0aa7add1d9177f60016b32ca9ca8b16b173a56.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 241 -
gcc/config/i386/i386-builtin.def | 11 -
gcc/testsuite/gcc.target/i386/avx-1.c | 11 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 50 -
gcc/testsuite/gcc.target/i386/sse-13.c | 11 -
gcc/testsuite/gcc.target/i386/sse-14.c | 14 --
gcc/testsuite/gcc.target/i386/sse-22.c | 14 --
gcc/testsuite/gcc.target/i386/sse-23.c | 11 -
8 files changed, 363 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index 034e722da03e..38ee006fbca1 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -2697,185 +2697,6 @@ _mm256_maskz_fmsubadd_round_ps (__mmask8 __U, __m256
__A, __m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmul_round_pch (__m256h __B, __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmulcph256_round ((__v16hf) __B,
-(__v16hf) __D,
-__R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmul_round_pch (__m256h __A, __mmask8 __U, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmulcph256_mask_round ((__v16hf) __B,
- (__v16hf) __D,
- (__v16hf) __A,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fmul_round_pch (__mmask8 __U, __m256h __B, __m256h __D,
-const int __R)
-{
- return (__m256h) __builtin_ia32_vfmulcph256_mask_round ((__v16hf) __B,
- (__v16hf) __D,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fnmadd_round_pd (__m256d __A, __m256d __B, __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfnmaddpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fnmadd_round_pd (__m256d __A, __mmask8 __U, __m256d __B,
-__m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfnmaddpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fnmadd_round_pd (__m256d __A, __m256d __B, __m256d __D,
- __mmask8 __U, const int __R)
-{
- return (__m256d) __builtin_ia32_vfnmaddpd256_mask3_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fnmadd_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
- __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfnmaddpd256_maskz_round ((__v4df) __A,
[gcc r15-8703] Revert "AVX10.2 ymm rounding: Support vfmadd{132, 231, 213}p{s, d, h} intrins"
https://gcc.gnu.org/g:c6834aab3e64d5c305bf305d32f2513927b89484
commit r15-8703-gc6834aab3e64d5c305bf305d32f2513927b89484
Author: Haochen Jiang
Date: Mon Mar 24 14:24:01 2025 +0800
Revert "AVX10.2 ymm rounding: Support vfmadd{132,231,213}p{s,d,h} intrins"
This reverts commit 0683ca355a87fd36a2e7ae1721199204ceff4c4c.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 176 -
gcc/config/i386/i386-builtin.def | 9 --
gcc/config/i386/sse.md | 2 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 9 --
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 31
gcc/testsuite/gcc.target/i386/sse-13.c | 9 --
gcc/testsuite/gcc.target/i386/sse-14.c | 12 --
gcc/testsuite/gcc.target/i386/sse-22.c | 12 --
gcc/testsuite/gcc.target/i386/sse-23.c | 9 --
9 files changed, 1 insertion(+), 268 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index 10cd2e71ee05..f65533b16816 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -2092,146 +2092,6 @@ _mm256_maskz_fixupimm_round_ps (__mmask8 __U, __m256
__A, __m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmadd_round_pd (__m256d __A, __m256d __B, __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmadd_round_pd (__m256d __A, __mmask8 __U, __m256d __B,
- __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U, __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmadd_round_pd (__m256d __A, __m256d __B, __m256d __D,
-__mmask8 __U, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddpd256_mask3_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fmadd_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
-__m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddpd256_maskz_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmadd_round_ph (__m256h __A, __m256h __B, __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmadd_round_ph (__m256h __A, __mmask16 __U, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmadd_round_ph (__m256h __A, __m256h __B, __m256h __D,
-__mmask1
[gcc r15-8699] Revert "AVX10.2 ymm rounding: Support vfnmsub{132, 231, 213}p{s, d, h} intrins"
https://gcc.gnu.org/g:2f52807115e7a77c4bdd206e48172c9cb6564a13
commit r15-8699-g2f52807115e7a77c4bdd206e48172c9cb6564a13
Author: Haochen Jiang
Date: Mon Mar 24 14:23:55 2025 +0800
Revert "AVX10.2 ymm rounding: Support vfnmsub{132,231,213}p{s,d,h} intrins"
This reverts commit 0983d406ae2e84394b25248865f51c686b119a57.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 181 -
gcc/config/i386/i386-builtin.def | 9 -
gcc/config/i386/sse.md | 2 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 9 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 31
gcc/testsuite/gcc.target/i386/sse-13.c | 9 -
gcc/testsuite/gcc.target/i386/sse-14.c | 12 --
gcc/testsuite/gcc.target/i386/sse-22.c | 12 --
gcc/testsuite/gcc.target/i386/sse-23.c | 9 -
9 files changed, 1 insertion(+), 273 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index cf9ba411c307..034e722da03e 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -2876,151 +2876,6 @@ _mm256_maskz_fnmadd_round_ps (__mmask8 __U, __m256 __A,
__m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fnmsub_round_pd (__m256d __A, __m256d __B, __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfnmsubpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fnmsub_round_pd (__m256d __A, __mmask8 __U, __m256d __B,
-__m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfnmsubpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fnmsub_round_pd (__m256d __A, __m256d __B, __m256d __D,
- __mmask8 __U, const int __R)
-{
- return (__m256d) __builtin_ia32_vfnmsubpd256_mask3_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fnmsub_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
- __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfnmsubpd256_maskz_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fnmsub_round_ph (__m256h __A, __m256h __B, __m256h __D, const int __R)
-{
- return (__m256h)
-__builtin_ia32_vfnmsubph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fnmsub_round_ph (__m256h __A, __mmask16 __U, __m256h __B,
-__m256h __D, const int __R)
-{
- return (__m256h)
-__builtin_ia32_vfnmsubph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fnmsub_round_ph (__m256h __A, __m256h __B, __m256h __D,
- __mmask16 __U, const int
[gcc r15-8708] Revert "AVX10.2 ymm rounding: Support vcvtqq2p{s, d, h} and vcvttpd2{, u}{dq, qq} intrins"
https://gcc.gnu.org/g:2695a7378f7c0726000d1a6f055c6d33ae44165c
commit r15-8708-g2695a7378f7c0726000d1a6f055c6d33ae44165c
Author: Haochen Jiang
Date: Mon Mar 24 14:24:14 2025 +0800
Revert "AVX10.2 ymm rounding: Support vcvtqq2p{s,d,h} and
vcvttpd2{,u}{dq,qq} intrins"
This reverts commit 6e231f8504874828b23bbe89f3ef4086dcc15a44.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 390 -
gcc/config/i386/i386-builtin-types.def | 3 -
gcc/config/i386/i386-builtin.def | 7 -
gcc/config/i386/i386-expand.cc | 3 -
gcc/config/i386/sse.md | 43 +--
gcc/config/i386/subst.md | 2 -
gcc/testsuite/gcc.target/i386/avx-1.c | 7 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-2.c | 72
gcc/testsuite/gcc.target/i386/sse-13.c | 7 -
gcc/testsuite/gcc.target/i386/sse-14.c | 21 --
gcc/testsuite/gcc.target/i386/sse-22.c | 21 --
gcc/testsuite/gcc.target/i386/sse-23.c | 7 -
12 files changed, 14 insertions(+), 569 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index 8fca7f00ba01..9d261208e5c1 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -1003,244 +1003,6 @@ _mm256_maskz_cvt_roundps_epu64 (__mmask8 __U, __m128
__A, const int __R)
(__mmask8) __U,
__R);
}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepi64_pd (__m256i __A, const int __R)
-{
- return (__m256d) __builtin_ia32_cvtqq2pd256_mask_round ((__v4di) __A,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundepi64_pd (__m256d __W, __mmask8 __U, __m256i __A,
- const int __R)
-{
- return (__m256d) __builtin_ia32_cvtqq2pd256_mask_round ((__v4di) __A,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundepi64_pd (__mmask8 __U, __m256i __A, const int __R)
-{
- return (__m256d) __builtin_ia32_cvtqq2pd256_mask_round ((__v4di) __A,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepi64_ph (__m256i __A, const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtqq2ph256_mask_round ((__v4di) __A,
- (__v8hf)
- _mm_setzero_ph (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundepi64_ph (__m128h __W, __mmask8 __U, __m256i __A,
- const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtqq2ph256_mask_round ((__v4di) __A,
- (__v8hf) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundepi64_ph (__mmask8 __U, __m256i __A, const int __R)
-{
- return (__m128h) __builtin_ia32_vcvtqq2ph256_mask_round ((__v4di) __A,
- (__v8hf)
- _mm_setzero_ph (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m128
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepi64_ps (__m256i __A, const int __R)
-{
- return (__m128) __builtin_ia32_cvtqq2ps256_mask_round ((__v4di) __A,
-
[gcc r15-8709] Revert "AVX10.2 ymm rounding: Support vcvtps2{, u}{dq, qq} intrins"
https://gcc.gnu.org/g:08fd9bd48abc8578b9f6c9844d3ce47e587980ed
commit r15-8709-g08fd9bd48abc8578b9f6c9844d3ce47e587980ed
Author: Haochen Jiang
Date: Mon Mar 24 14:24:16 2025 +0800
Revert "AVX10.2 ymm rounding: Support vcvtps2{,u}{dq,qq} intrins"
This reverts commit 0f5a42d41b46b746c6f77374d76a3b918a1e2b57.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 226 -
gcc/config/i386/i386-builtin-types.def | 2 -
gcc/config/i386/i386-builtin.def | 4 -
gcc/config/i386/i386-expand.cc | 2 -
gcc/config/i386/sse.md | 10 +-
gcc/config/i386/subst.md | 1 -
gcc/testsuite/gcc.target/i386/avx-1.c | 4 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c | 32 ---
gcc/testsuite/gcc.target/i386/sse-13.c | 4 -
gcc/testsuite/gcc.target/i386/sse-14.c | 12 --
gcc/testsuite/gcc.target/i386/sse-22.c | 12 --
gcc/testsuite/gcc.target/i386/sse-23.c | 4 -
12 files changed, 5 insertions(+), 308 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index 9d261208e5c1..d12d3d8f5981 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -863,146 +863,6 @@ _mm256_maskz_cvtx_roundps_ph (__mmask8 __U, __m256 __A,
const int __R)
(__mmask8) __U,
__R);
}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundps_epi32 (__m256 __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvtps2dq256_mask_round ((__v8sf) __A,
- (__v8si)
- _mm256_undefined_si256 (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundps_epi32 (__m256i __W, __mmask8 __U, __m256 __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_vcvtps2dq256_mask_round ((__v8sf) __A,
- (__v8si) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundps_epi32 (__mmask8 __U, __m256 __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvtps2dq256_mask_round ((__v8sf) __A,
- (__v8si)
- _mm256_setzero_si256 (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundps_epi64 (__m128 __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_cvtps2qq256_mask_round ((__v4sf) __A,
-(__v4di)
-_mm256_setzero_si256 (),
-(__mmask8) -1,
-__R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundps_epi64 (__m256i __W, __mmask8 __U, __m128 __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_cvtps2qq256_mask_round ((__v4sf) __A,
- (__v4di) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundps_epi64 (__mmask8 __U, __m128 __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_cvtps2qq256_mask_round ((__v4sf) __A,
-(__v4di)
-_mm256_setzero_si256 (),
-(__mmask8) __U,
-__R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundps_epu32 (__m256 __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_cvtps2udq256_mask_round ((__v8sf) __A,
- (__v8si)
-
[gcc r15-8710] Revert "AVX10.2 ymm rounding: Support vcvtph2{, u}w and vcvtps2p{d, hx} intrins"
https://gcc.gnu.org/g:567c939888e0d3bbb8464f8241d9364279320b56
commit r15-8710-g567c939888e0d3bbb8464f8241d9364279320b56
Author: Haochen Jiang
Date: Mon Mar 24 14:24:18 2025 +0800
Revert "AVX10.2 ymm rounding: Support vcvtph2{,u}w and vcvtps2p{d,hx}
intrins"
This reverts commit b70bb94aca7bc10a54f744d793c32c51f91ce195.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 220 -
gcc/config/i386/i386-builtin-types.def | 3 -
gcc/config/i386/i386-builtin.def | 4 -
gcc/config/i386/i386-expand.cc | 3 -
gcc/config/i386/sse.md | 2 +-
gcc/config/i386/subst.md | 1 -
gcc/testsuite/gcc.target/i386/avx-1.c | 4 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c | 36
gcc/testsuite/gcc.target/i386/sse-13.c | 4 -
gcc/testsuite/gcc.target/i386/sse-14.c | 12 --
gcc/testsuite/gcc.target/i386/sse-22.c | 12 --
gcc/testsuite/gcc.target/i386/sse-23.c | 4 -
12 files changed, 1 insertion(+), 304 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index d12d3d8f5981..bddd0e091ff9 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -726,143 +726,6 @@ _mm256_maskz_cvt_roundph_epu64 (__mmask8 __U, __m128h
__A, const int __R)
(__mmask8) __U,
__R);
}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundph_epu16 (__m256h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvtph2uw256_mask_round ((__v16hf) __A,
- (__v16hi)
- _mm256_undefined_si256 (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundph_epu16 (__m256i __W, __mmask16 __U, __m256h __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_vcvtph2uw256_mask_round ((__v16hf) __A,
- (__v16hi) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundph_epu16 (__mmask16 __U, __m256h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvtph2uw256_mask_round ((__v16hf) __A,
- (__v16hi)
- _mm256_setzero_si256 (),
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundph_epi16 (__m256h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvtph2w256_mask_round ((__v16hf) __A,
-(__v16hi)
-_mm256_undefined_si256 (),
-(__mmask16) -1,
-__R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundph_epi16 (__m256i __W, __mmask16 __U, __m256h __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_vcvtph2w256_mask_round ((__v16hf) __A,
- (__v16hi) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundph_epi16 (__mmask16 __U, __m256h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvtph2w256_mask_round ((__v16hf) __A,
-(__v16hi)
-_mm256_setzero_si256 (),
-(__mmask16) __U,
-__R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundps_pd (__m128 __A, const int __R)
-{
- return
-(__m256d) __builtin_ia32_vcvtps2pd256_mask_round ((__v4sf) __A,
- (__v4df)
-
[gcc r15-8711] Revert "AVX10.2 ymm rounding: Support vcvtph2p{s, d, sx} and vcvtph2{, u}{dq, qq} intrins"
https://gcc.gnu.org/g:99a9e7218055260c6d3a769daa109dfb756054c2
commit r15-8711-g99a9e7218055260c6d3a769daa109dfb756054c2
Author: Haochen Jiang
Date: Mon Mar 24 14:24:27 2025 +0800
Revert "AVX10.2 ymm rounding: Support vcvtph2p{s,d,sx} and
vcvtph2{,u}{dq,qq} intrins"
This reverts commit 6f2eac53b6026836f3222961c32312e02c2c7dbc.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 384 -
gcc/config/i386/i386-builtin-types.def | 4 -
gcc/config/i386/i386-builtin.def | 7 -
gcc/config/i386/i386-expand.cc | 4 -
gcc/config/i386/sse.md | 19 +-
gcc/config/i386/subst.md | 1 -
gcc/testsuite/gcc.target/i386/avx-1.c | 7 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c | 57 ---
gcc/testsuite/gcc.target/i386/sse-13.c | 7 -
gcc/testsuite/gcc.target/i386/sse-14.c | 20 --
gcc/testsuite/gcc.target/i386/sse-22.c | 21 --
gcc/testsuite/gcc.target/i386/sse-23.c | 7 -
12 files changed, 9 insertions(+), 529 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index bddd0e091ff9..1576f17be3bf 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -486,246 +486,6 @@ _mm256_maskz_cvt_roundpd_epu64 (__mmask8 __U, __m256d
__A, const int __R)
(__mmask8) __U,
__R);
}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundph_epi32 (__m128h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvtph2dq256_mask_round ((__v8hf) __A,
- (__v8si)
- _mm256_setzero_si256 (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundph_epi32 (__m256i __W, __mmask8 __U, __m128h __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_vcvtph2dq256_mask_round ((__v8hf) __A,
- (__v8si) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundph_epi32 (__mmask8 __U, __m128h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvtph2dq256_mask_round ((__v8hf) __A,
- (__v8si)
- _mm256_setzero_si256 (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundph_pd (__m128h __A, const int __R)
-{
- return (__m256d) __builtin_ia32_vcvtph2pd256_mask_round ((__v8hf) __A,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundph_pd (__m256d __W, __mmask8 __U, __m128h __A,
- const int __R)
-{
- return (__m256d) __builtin_ia32_vcvtph2pd256_mask_round ((__v8hf) __A,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundph_pd (__mmask8 __U, __m128h __A, const int __R)
-{
- return (__m256d) __builtin_ia32_vcvtph2pd256_mask_round ((__v8hf) __A,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundph_ps (__m128h __A, const int __R)
-{
- return
-(__m256) __builtin_ia32_vcvtph2ps256_mask_round ((__v8hf) __A,
-(__v8s
[gcc r15-8714] Revert "AVX10.2 ymm rounding: Support vadd{s, d, h} and vcmp{s, d, h} intrins"
https://gcc.gnu.org/g:e1139c5b0daa6bfdb0d8d5df2fc7f23a2840af25
commit r15-8714-ge1139c5b0daa6bfdb0d8d5df2fc7f23a2840af25
Author: Haochen Jiang
Date: Mon Mar 24 14:24:33 2025 +0800
Revert "AVX10.2 ymm rounding: Support vadd{s,d,h} and vcmp{s,d,h} intrins"
This reverts commit e22e3af1954469c40b139b7cfa8e7708592f4bfd.
Diff:
---
gcc/config.gcc | 3 +-
gcc/config/i386/avx10_2roundingintrin.h| 337 -
gcc/config/i386/i386-builtin-types.def | 6 -
gcc/config/i386/i386-builtin.def | 6 -
gcc/config/i386/i386-expand.cc | 6 -
gcc/config/i386/immintrin.h| 2 -
gcc/config/i386/sse.md | 116 +++
gcc/config/i386/subst.md | 32 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 8 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c | 64
gcc/testsuite/gcc.target/i386/sse-13.c | 8 -
gcc/testsuite/gcc.target/i386/sse-14.c | 17 --
gcc/testsuite/gcc.target/i386/sse-22.c | 17 --
gcc/testsuite/gcc.target/i386/sse-23.c | 8 -
14 files changed, 69 insertions(+), 561 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index a518e976b82e..f7f2002a45f3 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -450,8 +450,7 @@ i[34567]86-*-* | x86_64-*-*)
avxvnniint8intrin.h avxneconvertintrin.h
cmpccxaddintrin.h amxfp16intrin.h prfchiintrin.h
raointintrin.h amxcomplexintrin.h avxvnniint16intrin.h
- sm3intrin.h sha512intrin.h sm4intrin.h
- usermsrintrin.h avx10_2roundingintrin.h
+ sm3intrin.h sha512intrin.h sm4intrin.h usermsrintrin.h
avx10_2mediaintrin.h avx10_2-512mediaintrin.h
avx10_2convertintrin.h avx10_2-512convertintrin.h
avx10_2bf16intrin.h avx10_2-512bf16intrin.h
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
deleted file mode 100644
index 9d6a49742ae7..
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ /dev/null
@@ -1,337 +0,0 @@
-/* Copyright (C) 2024-2025 Free Software Foundation, Inc.
-
- This file is part of GCC.
-
- GCC is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3, or (at your option)
- any later version.
-
- GCC is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- Under Section 7 of GPL version 3, you are granted additional
- permissions described in the GCC Runtime Library Exception, version
- 3.1, as published by the Free Software Foundation.
-
- You should have received a copy of the GNU General Public License and
- a copy of the GCC Runtime Library Exception along with this program;
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-
[gcc r15-8707] Revert "AVX10.2 ymm rounding: Support vcvttph2{, u}{dq, qq, w} intrins"
https://gcc.gnu.org/g:a67476dbb4e0fdc02786bb58c050d89ddd84f773
commit r15-8707-ga67476dbb4e0fdc02786bb58c050d89ddd84f773
Author: Haochen Jiang
Date: Mon Mar 24 14:24:09 2025 +0800
Revert "AVX10.2 ymm rounding: Support vcvttph2{,u}{dq,qq,w} intrins"
This reverts commit 493c5096050523ebc05e5fa21612683a996b97a7.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 335 -
gcc/config/i386/i386-builtin.def | 6 -
gcc/config/i386/sse.md | 10 +-
gcc/config/i386/subst.md | 1 -
gcc/testsuite/gcc.target/i386/avx-1.c | 6 -
gcc/testsuite/gcc.target/i386/avx10_2-rounding-2.c | 46 ---
gcc/testsuite/gcc.target/i386/sse-13.c | 6 -
gcc/testsuite/gcc.target/i386/sse-14.c | 18 --
gcc/testsuite/gcc.target/i386/sse-22.c | 18 --
gcc/testsuite/gcc.target/i386/sse-23.c | 6 -
10 files changed, 5 insertions(+), 447 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index f2a5f0318be4..8fca7f00ba01 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -1241,216 +1241,6 @@ _mm256_maskz_cvtt_roundpd_epu64 (__mmask8 __U, __m256d
__A, const int __R)
(__mmask8) __U,
__R);
}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvtt_roundph_epi32 (__m128h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvttph2dq256_mask_round ((__v8hf) __A,
- (__v8si)
- _mm256_setzero_si256 (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvtt_roundph_epi32 (__m256i __W, __mmask8 __U, __m128h __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_vcvttph2dq256_mask_round ((__v8hf) __A,
- (__v8si) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvtt_roundph_epi32 (__mmask8 __U, __m128h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvttph2dq256_mask_round ((__v8hf) __A,
- (__v8si)
- _mm256_setzero_si256 (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvtt_roundph_epi64 (__m128h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvttph2qq256_mask_round ((__v8hf) __A,
- (__v4di)
- _mm256_setzero_si256 (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvtt_roundph_epi64 (__m256i __W, __mmask8 __U, __m128h __A,
- const int __R)
-{
- return (__m256i) __builtin_ia32_vcvttph2qq256_mask_round ((__v8hf) __A,
- (__v4di) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvtt_roundph_epi64 (__mmask8 __U, __m128h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvttph2qq256_mask_round ((__v8hf) __A,
- (__v4di)
- _mm256_setzero_si256 (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvtt_roundph_epu32 (__m128h __A, const int __R)
-{
- return
-(__m256i) __builtin_ia32_vcvttph2udq256_mask_round ((__v8hf) __A,
- (__v8si)
- _mm256_setzero_si256 (),
-
[gcc r15-8702] Revert "AVX10.2 ymm rounding: Support vfmaddcph and vfmaddsub{132, 231, 213}p{s, d, h} intrins"
https://gcc.gnu.org/g:bd66bf1fd8862be4ebc41caa503672d7ec294e3d
commit r15-8702-gbd66bf1fd8862be4ebc41caa503672d7ec294e3d
Author: Haochen Jiang
Date: Mon Mar 24 14:24:00 2025 +0800
Revert "AVX10.2 ymm rounding: Support vfmaddcph and
vfmaddsub{132,231,213}p{s,d,h} intrins"
This reverts commit cfbc94eaf167ae7aecd21ee6054556e1cf9d7143.
Diff:
---
gcc/config/i386/avx10_2roundingintrin.h| 238 -
gcc/config/i386/i386-builtin.def | 13 --
gcc/config/i386/sse.md | 4 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 13 --
gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c | 43
gcc/testsuite/gcc.target/i386/sse-13.c | 13 --
gcc/testsuite/gcc.target/i386/sse-14.c | 16 --
gcc/testsuite/gcc.target/i386/sse-22.c | 15 --
gcc/testsuite/gcc.target/i386/sse-23.c | 13 --
9 files changed, 2 insertions(+), 366 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index ed878cb06a98..10cd2e71ee05 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -2232,193 +2232,6 @@ _mm256_maskz_fmadd_round_ps (__mmask8 __U, __m256 __A,
__m256 __B,
(__mmask8) __U,
__R);
}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmadd_round_pch (__m256h __A, __m256h __B, __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddcph256_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmadd_round_pch (__m256h __A, __mmask16 __U, __m256h __B,
-__m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddcph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmadd_round_pch (__m256h __A, __m256h __B, __m256h __D,
- __mmask16 __U, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddcph256_mask3_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fmadd_round_pch (__mmask16 __U, __m256h __A, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddcph256_maskz_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmaddsub_round_pd (__m256d __A, __m256d __B, __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddsubpd256_mask_round ((__v4df) __A,
-(__v4df) __B,
-(__v4df) __D,
-(__mmask8) -1,
-__R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmaddsub_round_pd (__m256d __A, __mmask8 __U, __m256d __B,
- __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddsubpd256_mask_round ((__v4df) __A,
-(__v4df) __B,
-(__v4df) __D,
-(__mmask8) __U,
-__R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmaddsub_round_pd (__m256d __A, __m256d __B, __m256d __D,
-
[gcc r15-8717] i386: Raise deprecate warning for -mavx10.1-256/512 and -mevex512 while add -mavx10.1 back with 512
https://gcc.gnu.org/g:f775bb892cb75616bd947ce76c7fdfdc515cbcfd commit r15-8717-gf775bb892cb75616bd947ce76c7fdfdc515cbcfd Author: Haochen Jiang Date: Mon Mar 24 14:24:39 2025 +0800 i386: Raise deprecate warning for -mavx10.1-256/512 and -mevex512 while add -mavx10.1 back with 512 bit alias When AVX10.1 options are added into GCC 14, E-core is supposed to support up to 256 bit vector width, while P-core up to 512 bit vector width. Therefore, we added avx10.1-256 and avx10.1-512 options into compiler since there will be real platforms with 256 bit only support. At the same time, for old platforms could also compile a 256 bit only binary, we introduced -mno-evex512 to disable 512 bit vector. However, all the future platforms will now support 512 bit vector width, including P-core and E-core. It will result in no need for split the option for vector width. Therefore, we will remove them in this patch. Unlike AVX10.2 options, AVX10.1 options has been there in a major release, so we have to raise a deprecate warning in GCC 15 and remove them in GCC 16. At the same time, to align with avx10.2 options, we will add just removed avx10.1 option back with warning to mention its behavior change. gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_features): Change to FEATURE_AVX10_1. * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AVX10_1_512_SET): Renamed to ... (OPTION_MASK_ISA2_AVX10_1_SET): ... this. (OPTION_MASK_ISA2_AVX10_2_SET): Use renamed macro. (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto. (ix86_handle_option): Ditto. (processor_alias_table): Use P_PROC_AVX10_1. * common/config/i386/i386-cpuinfo.h (enum feature_priority): Rename from AVX10_1_512 to AVX10_1. (enum processor_features): Ditto. * common/config/i386/i386-isas.h: Add avx10.1. * config/i386/driver-i386.cc (host_detect_local_cpu): Use renamed enum. * config/i386/i386-c.cc (ix86_target_macros_internal): Rename to avx10.1. * config/i386/i386-isa.def (AVX10_1_512): Rename to ... (AVX10_1): ... this. * config/i386/i386-options.cc (isa2_opts): Rename to avx10.1. (ix86_valid_target_attribute_inner_p): Add avx10.1. (ix86_option_override_internal): Rename to AVX10_1. Revise warnings to mention behavior change for option combination in GCC 16. * config/i386/i386.h (PTA_DIAMONDRAPIDS): Use AVX10_1. * config/i386/i386.opt: Add avx10.1. Add deprecate warnings for mevex512 and mavx10.1-256/512. * config/i386/i386.opt.urls: Add avx10.1. * doc/extend.texi: Ditto. * doc/sourcebuild.texi: Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/avx10-check.h: Change to avx10.1. * gcc.target/i386/avx10_1-1.c: Add warning check. * gcc.target/i386/avx10_1-10.c: Ditto. * gcc.target/i386/avx10_1-11.c: Ditto. * gcc.target/i386/avx10_1-12.c: Ditto. * gcc.target/i386/avx10_1-13.c: Ditto. * gcc.target/i386/avx10_1-15.c: Ditto. * gcc.target/i386/avx10_1-16.c: Ditto. * gcc.target/i386/avx10_1-18.c: Ditto. * gcc.target/i386/avx10_1-19.c: Ditto. * gcc.target/i386/avx10_1-2.c: Ditto. * gcc.target/i386/avx10_1-20.c: Ditto. * gcc.target/i386/avx10_1-21.c: Ditto. * gcc.target/i386/avx10_1-22.c: Ditto. * gcc.target/i386/avx10_1-23.c: Ditto. * gcc.target/i386/avx10_1-26.c: Ditto. * gcc.target/i386/avx10_1-3.c: Ditto. * gcc.target/i386/avx10_1-4.c: Ditto. * gcc.target/i386/avx10_1-7.c: Ditto. * gcc.target/i386/avx10_1-8.c: Ditto. * gcc.target/i386/avx10_1-9.c: Ditto. * gcc.target/i386/noevex512-1.c: Ditto. * gcc.target/i386/noevex512-2.c: Ditto. * gcc.target/i386/pr111068.c: Ditto. * gcc.target/i386/pr111907.c: Ditto. * gcc.target/i386/pr117240_avx512f.c: Ditto. * gcc.target/i386/pr117304-1.c: Ditto. * gcc.target/i386/pr117946.c: Ditto. * gcc.target/i386/avx10_1-24.c: Removed. * gcc.target/i386/avx10_1-25.c: Removed. * gcc.target/i386/avx10_1-5.c: Removed. * gcc.target/i386/avx10_1-6.c: Removed. Diff: --- gcc/common/config/i386/cpuinfo.h | 4 ++-- gcc/common/config/i386/i386-common.cc| 20 +- gcc/common/config/i386/i386-cpuinfo.h| 6 +++--- gcc/common/config/i386/i386-isas.h | 3 ++- gcc/config/i386/driver-i386.cc | 2 +- gcc/config/i386/i386-c.cc
