[gcc r15-6390] c++: regenerate opt urls
https://gcc.gnu.org/g:2d8982c279912d9170689752d4edb42489d44842 commit r15-6390-g2d8982c279912d9170689752d4edb42489d44842 Author: Nathaniel Shead Date: Fri Dec 20 22:23:42 2024 +1100 c++: regenerate opt urls This should have been part of r15-6379-g0c2ae384326108. gcc/c-family/ChangeLog: * c.opt.urls: Regenerate. Signed-off-by: Nathaniel Shead Diff: --- gcc/c-family/c.opt.urls | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/c-family/c.opt.urls b/gcc/c-family/c.opt.urls index 421cc08e2c72..fd7ffd38d538 100644 --- a/gcc/c-family/c.opt.urls +++ b/gcc/c-family/c.opt.urls @@ -870,6 +870,9 @@ UrlSuffix(gcc/C_002b_002b-Dialect-Options.html#index-Wno-template-body) Wtemplate-id-cdtor UrlSuffix(gcc/C_002b_002b-Dialect-Options.html#index-Wno-template-id-cdtor) +Wtemplate-names-tu-local +UrlSuffix(gcc/C_002b_002b-Dialect-Options.html#index-Wno-template-names-tu-local) + Wterminate UrlSuffix(gcc/C_002b_002b-Dialect-Options.html#index-Wno-terminate)
[gcc r15-6388] RISC-V: Refine strided load/store testcase dump check to tree optimized
https://gcc.gnu.org/g:4779dd022927c41d2c261cdf5289e8bdecd0697d
commit r15-6388-g4779dd022927c41d2c261cdf5289e8bdecd0697d
Author: Pan Li
Date: Fri Dec 20 09:11:20 2024 +0800
RISC-V: Refine strided load/store testcase dump check to tree optimized
Like the sat alu related testcase, the dump check of strided load/store
takes the rtl dump for the standard name MASK_LEN_STRIDED_LOAD for times.
But the rtl pass expand is somehow mutable by the middle-end change or
debug information.
After that we need to adjust the dump check time and again. This
patch would like to switch to tree optimized pass for the standard
name check, which is more stable up to a point.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c: Take
tree-optimized pass for standard name check, and adjust the times.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c: Ditto
Signed-off-by: Pan Li
Diff:
---
.../riscv/rvv/autovec/strided/strided_ld_st-1-f16.c| 10 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-f32.c| 10 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-f64.c| 10 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-i16.c| 10 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-i32.c| 18 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-i64.c| 10 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-i8.c | 10 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-u16.c| 10 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-u32.c| 18 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-u64.c| 10 +-
.../riscv/rvv/autovec/strided/strided_ld_st-1-u8.c | 10 +-
11 files changed, 63 insertions(+), 63 deletions(-)
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
index 4098774ba381..fb0d1d8a449e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
@@ -1,24 +1,24 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -mno-vector-strict-align
-fno-vect-cost-model -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -mno-vector-strict-align
-fno-vect-cost-model -fdump-tree-optimized" } */
#include "strided_ld_st.h"
DEF_STRIDED_LD_ST_FORM_1(_Float16)
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" {
target {
+/* { dg-final { scan-tree-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "optimized" {
target {
any-opts "-O3"
no-opts "-mrvv-vector-bits=zvl"
} } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" {
target {
+/* { dg-final { scan-tree-dump-times ".MASK_LEN_STRIDED_STORE " 2 "optimized"
{ target {
any-opts "-O3"
no-opts "-mrvv-vector-bits=zvl"
} } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" {
target {
+/* { dg-final { scan-tree-dump-times ".MASK_LEN_STRIDED_LOAD " 1 "optimized" {
target {
any-opts "-O2"
no-opts "-mrvv-vector-bits=zvl"
} } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" {
target {
+/* { dg-final { scan-tree-dump-times ".MASK_LEN_STRIDED_STORE " 1 "optimized"
{ target {
any-opts "-O2"
no-opts "-mrvv-vector-bits=zvl"
} } } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
index e1d1063ec8c2..48e0a096cf27 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
@@ -1,24 +1,24 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=
[gcc r15-6395] Fortran: potential aliasing of complex pointer inquiry references [PR118120]
https://gcc.gnu.org/g:aed4a2689dbc8ea7e60c1fab9e7f455d99e632b7
commit r15-6395-gaed4a2689dbc8ea7e60c1fab9e7f455d99e632b7
Author: Harald Anlauf
Date: Thu Dec 19 22:22:52 2024 +0100
Fortran: potential aliasing of complex pointer inquiry references [PR118120]
PR fortran/118120
PR fortran/113928
gcc/fortran/ChangeLog:
* trans-array.cc (symbols_could_alias): If one symbol refers to a
complex type and the other to a real type of the same kind, do not
a priori exclude the possibility of aliasing.
gcc/testsuite/ChangeLog:
* gfortran.dg/aliasing_complex_pointer.f90: New test.
Diff:
---
gcc/fortran/trans-array.cc | 17 +---
.../gfortran.dg/aliasing_complex_pointer.f90 | 46 ++
2 files changed, 57 insertions(+), 6 deletions(-)
diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 82a2ae1f7479..52813857353f 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -5344,15 +5344,20 @@ static bool
symbols_could_alias (gfc_symbol *lsym, gfc_symbol *rsym, bool lsym_pointer,
bool lsym_target, bool rsym_pointer, bool rsym_target)
{
- /* Aliasing isn't possible if the symbols have different base types. */
- if (gfc_compare_types (&lsym->ts, &rsym->ts) == 0)
-return 0;
+ /* Aliasing isn't possible if the symbols have different base types,
+ except for complex types where an inquiry reference (%RE, %IM) could
+ alias with a real type with the same kind parameter. */
+ if (!gfc_compare_types (&lsym->ts, &rsym->ts)
+ && !(((lsym->ts.type == BT_COMPLEX && rsym->ts.type == BT_REAL)
+ || (lsym->ts.type == BT_REAL && rsym->ts.type == BT_COMPLEX))
+ && lsym->ts.kind == rsym->ts.kind))
+return false;
/* Pointers can point to other pointers and target objects. */
if ((lsym_pointer && (rsym_pointer || rsym_target))
|| (rsym_pointer && (lsym_pointer || lsym_target)))
-return 1;
+return true;
/* Special case: Argument association, cf. F90 12.4.1.6, F2003 12.4.1.7
and F2008 12.5.2.13 items 3b and 4b. The pointer case (a) is already
@@ -5363,9 +5368,9 @@ symbols_could_alias (gfc_symbol *lsym, gfc_symbol *rsym,
bool lsym_pointer,
|| (rsym->attr.dummy && !rsym->attr.contiguous
&& (!rsym->attr.dimension
|| rsym->as->type == AS_ASSUMED_SHAPE
-return 1;
+return true;
- return 0;
+ return false;
}
diff --git a/gcc/testsuite/gfortran.dg/aliasing_complex_pointer.f90
b/gcc/testsuite/gfortran.dg/aliasing_complex_pointer.f90
new file mode 100644
index ..7fc4a209b34b
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/aliasing_complex_pointer.f90
@@ -0,0 +1,46 @@
+! { dg-do run }
+! PR fortran/118120 - potential aliasing of complex pointer inquiry references
+!
+! Contributed by Slava Zakharin < szakharin at nvidia dot com >
+
+program main
+ implicit none
+ integer :: k
+ complex, target :: data(21)
+ do k=1,21
+ data(k) = cmplx(-k,0.0)
+ end do
+ call test(1, 1, data)
+! print *, data
+ if ( data(1) /= -1.) stop 1
+ if (any (data(2:)% re /= [(k,k=1,20)])) stop 2
+ call pr113928 ()
+contains
+ subroutine test(i, j, data)
+integer :: i, j
+complex, target :: data(21)
+real, pointer:: result(:,:,:,:)
+complex, pointer :: temp(:,:)
+result(i:i,j:j,1:4,1:5) => data(2:)%re
+temp(1:4,1:5) => data(1:20)
+result(i,j,:,:) = abs(temp)
+ end subroutine test
+end program main
+
+! PR fortran/113928
+!
+! Contributed by < eddyg_61-bugzilla at yahoo dot it >
+
+subroutine pr113928
+ implicit none
+ integer, parameter :: N = 4
+ complex, target:: wz(N) = 0.
+ real,pointer :: wr(:)
+ integer :: i
+
+ wr => wz%re
+ wr = [(i,i=1,N)]
+ wr = wr + wz(N:1:-1)%re
+! print *, wr
+ if (any (wr /= N+1)) stop 3
+end
[gcc r15-6386] RISC-V: List valid -mtune options only once
https://gcc.gnu.org/g:8af296c290216e03bc20e7291e64c19e0d94cfd6
commit r15-6386-g8af296c290216e03bc20e7291e64c19e0d94cfd6
Author: Christoph Müllner
Date: Thu Dec 19 20:59:36 2024 +0100
RISC-V: List valid -mtune options only once
This patch ensures that the list of valid -mtune options
does not contain entries more than once.
The -mtune option accepts CPU identifiers as well as
tuning identifiers and there are cases where a CPU and
its tuning have the same identifier.
PR116347
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc
(riscv_get_valid_option_values):
Skip adding mtune entries that are already in the list.
Signed-off-by: Christoph Müllner
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index 4c9a72d1180a..2f85bb21a4c0 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -2437,7 +2437,19 @@ riscv_get_valid_option_values (int option_code,
const riscv_cpu_info *cpu_info = &riscv_cpu_tables[0];
for (;cpu_info->name; ++cpu_info)
- v.safe_push (cpu_info->name);
+ {
+ /* Skip duplicates. */
+ bool skip = false;
+ int i;
+ const char *str;
+ FOR_EACH_VEC_ELT (v, i, str)
+ {
+ if (!strcmp (str, cpu_info->name))
+ skip = true;
+ }
+ if (!skip)
+ v.safe_push (cpu_info->name);
+ }
}
break;
case OPT_mcpu_:
[gcc r15-6387] forwprop: Fix lane handling for VEC_PERM sequence blending
https://gcc.gnu.org/g:eee2891312a9b42acabcc82739604c9fa8421757
commit r15-6387-geee2891312a9b42acabcc82739604c9fa8421757
Author: Christoph Müllner
Date: Thu Dec 5 20:39:25 2024 +0100
forwprop: Fix lane handling for VEC_PERM sequence blending
In PR117830 a miscompilation of 464.h264ref was reported.
An analysis showed that wrong code was generated because of
unsatisfied assumptions. This patch addresses these issues.
The first assumption was that we could independently analyze the two
vec-perms at the start of a vec-perm-simplify sequence and use the
information later for calculating a final vec-perm selector that
utilizes fewer lanes. However, this information does not help much,
because for changing the selector entry, we need to ensure that both
elements of the operand vectors v_1 and v_2 remain equal.
This is addressed by removing the function get_vect_selector_index_map
and checking for this equality in the loop where we create the new
selector.
The calculation of the selector vector for the blended sequence
assumed that the indices of the selector vector of the narrowed
sequences are increasing. This assumption does not hold in general.
This was fixed by allowing a wrap-around when searching for an empty
lane.
Further, there was an issue in the calculation of the selector vector
entries for the second sequence. The code did not consider that the
lanes of the second sequence could have been moved.
A relevant property of this patch is that it introduces a
couple of nested loops, where the out loop iterates from
i=0..nelts and the inner loop iterates from j=0..i.
To avoid performance concerns, a check is introduced that
ensures nelts won't exceed 4 lanes.
The added test case is derived from h264ref (the other cases from the
benchmark have the same structure and don't provide additional coverage).
Bootstrapped and regression-tested on x86-64 and aarch64.
Further, tested on CPU 2006 h264ref and CPU 2017 x264.
PR117830
gcc/ChangeLog:
* tree-ssa-forwprop.cc (get_vect_selector_index_map): Removed.
(recognise_vec_perm_simplify_seq): Fix calculation of vec-perm
selectors of narrowed sequence.
(calc_perm_vec_perm_simplify_seqs): Fixing calculation of
vec-perm selectors of the blended sequence.
(process_vec_perm_simplify_seq_list): Add whitespace to dump
string to avoid bad formatted dump output.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/vector-11.c: New test.
Signed-off-by: Christoph Müllner
Diff:
---
gcc/testsuite/gcc.dg/tree-ssa/vector-11.c | 38 ++
gcc/tree-ssa-forwprop.cc | 203 ++
2 files changed, 162 insertions(+), 79 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-11.c
b/gcc/testsuite/gcc.dg/tree-ssa/vector-11.c
new file mode 100644
index ..e4102d318d29
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-11.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-O3 -fdump-tree-forwprop1-details -Wno-psabi" } */
+
+typedef int vec __attribute__((vector_size (4 * sizeof (int;
+
+void f1 (vec *p_v_in, vec *p_v_out_1, vec *p_v_out_2)
+{
+ vec sel00 = { 2, 3, 2, 2 };
+ vec sel01 = { 1, 0, 1, 1 };
+ vec sel10 = { 3, 2, 3, 3 };
+ vec sel11 = { 0, 1, 0, 0 };
+ vec sel = { 0, 5, 2, 7 };
+ vec v_1, v_2, v_x, v_y, v_out_1, v_out_2;
+ vec v_in = *p_v_in;
+
+ /* First vec perm sequence. */
+ v_1 = __builtin_shuffle (v_in, v_in, sel00);
+ v_2 = __builtin_shuffle (v_in, v_in, sel01);
+ v_x = v_2 - v_1;
+ v_y = v_1 + v_2;
+ v_out_1 = __builtin_shuffle (v_y, v_x, sel);
+
+ /* Second vec perm sequence. */
+ v_1 = __builtin_shuffle (v_in, v_in, sel10);
+ v_2 = __builtin_shuffle (v_in, v_in, sel11);
+ v_x = v_2 - v_1;
+ v_y = v_1 + v_2;
+ v_out_2 = __builtin_shuffle (v_y, v_x, sel);
+
+ /* Won't blend because the narrowed sequence
+ utilizes three of the four lanes. */
+
+ *p_v_out_1 = v_out_1;
+ *p_v_out_2 = v_out_2;
+}
+
+/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended"
"forwprop1" { target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 7, 2, 6 }" "forwprop1" {
target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */
diff --git a/gcc/tree-ssa-forwprop.cc b/gcc/tree-ssa-forwprop.cc
index 7cae08f0d798..dae8c2f435bc 100644
--- a/gcc/tree-ssa-forwprop.cc
+++ b/gcc/tree-ssa-forwprop.cc
@@ -3479,41 +3479,6 @@ fwprop_ssa_val (tree name)
return name;
}
-/* Get an index map from the provided vector permute selector
- and return the number of unique indices.
- E.g.: { 1, 3, 1, 3 } -> <0, 1, 0, 1>, 2
-{ 0, 2, 0, 2 } -> <0, 1, 0, 1>, 2
-{ 3, 2, 1, 0 } -> <0, 1, 2, 3>, 4. */
-
-static
[gcc r15-6384] c++: Disallow [[deprecated]] on types other than class/enum definitions [PR110345]
https://gcc.gnu.org/g:cd647514a539943ade6461efbf056a7c3f4305c6
commit r15-6384-gcd647514a539943ade6461efbf056a7c3f4305c6
Author: Jakub Jelinek
Date: Fri Dec 20 10:12:08 2024 +0100
c++: Disallow [[deprecated]] on types other than class/enum definitions
[PR110345]
For C++ 26 P2552R3 I went through all the spots (except modules) where
attribute-specifier-seq appears in the grammar and tried to construct
a testcase in all those spots, for now for [[deprecated]] attribute.
The patch below contains that testcase. One needed change for this
particular attribute was that currently we handle [[deprecated]]
exactly the same as [[gnu::deprecated]], but for the latter unlike C++14
or later we allow it also on almost all types, while the standard
is strict and allows it only on
https://eel.is/c++draft/dcl.attr#deprecated-2
The attribute may be applied to the declaration of a class, a typedef-name,
a variable, a non-static data member, a function, a namespace,
an enumeration, an enumerator, a concept, or a template specialization.
The following patch just adds a pedwarn for the cases that gnu::deprecated
allows but C++14 disallows, so integral/floating/boolean types,
pointers/references, array types, function types etc.
Basically, for TYPE_P, if the attribute is applied in place (which means
the struct/union/class/enum definition), it is allowed, otherwise pedwarned.
I've tried to compile it also with latest clang and there is agreement in
most of the diagnostics, just at block scope (inside of foo) it doesn't
diagnose
auto e = new int [n] [[deprecated]];
auto e2 = new int [n] [[deprecated]] [42];
[[deprecated]] lab:;
and at namespace scope
[[deprecated]];
I think that all feels like clang++ bug.
Also this pedwarns on
[[deprecated]] int : 0;
at class scope, that isn't a non-static data member...
I guess to mark the paper as implemented (or what has been already voted
into C++23 earlier) we'll need to add similar testcase for all the other
standard attributes and make sure we check what the attributes can appertain
to and what they can't.
2024-12-19 Jakub Jelinek
PR c++/110345
* parser.cc (cp_parser_std_attribute): Don't transform
[[deprecated]] into [[gnu::deprecated]].
* tree.cc (handle_std_deprecated_attribute): New function.
(std_attributes): Add deprecated entry.
* g++.dg/cpp0x/attr-deprecated1.C: New test.
Diff:
---
gcc/cp/parser.cc | 9 +-
gcc/cp/tree.cc| 21
gcc/testsuite/g++.dg/cpp0x/attr-deprecated1.C | 152 ++
3 files changed, 177 insertions(+), 5 deletions(-)
diff --git a/gcc/cp/parser.cc b/gcc/cp/parser.cc
index 23c6a2fd30e4..892d3e6a8ac2 100644
--- a/gcc/cp/parser.cc
+++ b/gcc/cp/parser.cc
@@ -30783,12 +30783,11 @@ cp_parser_std_attribute (cp_parser *parser, tree
attr_ns)
/* We used to treat C++11 noreturn attribute as equivalent to GNU's,
but no longer: we have to be able to tell [[noreturn]] and
-__attribute__((noreturn)) apart. */
- /* C++14 deprecated attribute is equivalent to GNU's. */
- if (is_attribute_p ("deprecated", attr_id))
- TREE_PURPOSE (TREE_PURPOSE (attribute)) = gnu_identifier;
+__attribute__((noreturn)) apart.
+Similarly for C++14 deprecated attribute, we need to emit extra
+diagnostics for [[deprecated]] compared to [[gnu::deprecated]]. */
/* C++17 fallthrough attribute is equivalent to GNU's. */
- else if (is_attribute_p ("fallthrough", attr_id))
+ if (is_attribute_p ("fallthrough", attr_id))
TREE_PURPOSE (TREE_PURPOSE (attribute)) = gnu_identifier;
/* C++23 assume attribute is equivalent to GNU's. */
else if (is_attribute_p ("assume", attr_id))
diff --git a/gcc/cp/tree.cc b/gcc/cp/tree.cc
index 1eef600c79a4..12d0831e4c4c 100644
--- a/gcc/cp/tree.cc
+++ b/gcc/cp/tree.cc
@@ -5143,6 +5143,25 @@ handle_alignas_attribute (tree *node, tree name, tree
args, int flags,
return ret;
}
+/* The C++14 [[deprecated]] attribute mostly maps to the GNU deprecated
+ attribute. */
+
+static tree
+handle_std_deprecated_attribute (tree *node, tree name, tree args, int flags,
+bool *no_add_attrs)
+{
+ tree t = *node;
+ tree ret = handle_deprecated_attribute (node, name, args, flags,
+ no_add_attrs);
+ if (TYPE_P (*node) && t != *node)
+pedwarn (input_location, OPT_Wattributes,
+"%qE on a type other than class or enumeration definition", name);
+ else if (TREE_CODE (*node) == FIELD_DECL && DECL_UNNAMED_BIT_FIELD (*node))
+pedwarn (input_location, OPT_Wattributes, "%qE on unnamed bit-field",
+name);
+ return ret;
+}
+
[gcc r15-6385] c++: Fix up maybe_unused attribute handling [PR110345]
https://gcc.gnu.org/g:92216cbc59b3a4566d49de5dfa059b70b03d639a
commit r15-6385-g92216cbc59b3a4566d49de5dfa059b70b03d639a
Author: Jakub Jelinek
Date: Fri Dec 20 10:17:56 2024 +0100
c++: Fix up maybe_unused attribute handling [PR110345]
When adding test coverage for maybe_unused attribute, I've run into
several things:
1) similarly to deprecated attribute, the attribute shouldn't pedantically
appertain to types other than class/enumeration definitions
2) similarly to deprecated attribute, the attribute shouldn't pedantically
appertain to unnamed bit-fields
3) the standard says that it can appertain to identifier labels, but
we handled it silently also on case and default labels
4) I've run into a weird spurious error on
int f [[maybe_unused]];
int & [[maybe_unused]] i = f;
int && [[maybe_unused]] j = 0;
The problem was that we create an attribute variant for the int &
type, then create an attribute variant for the int && type, and
the type_canon_hash hashing just thought those 2 are the same,
so used int & [[maybe_unused]] type for j rather than
int && [[maybe_unused]]. As TYPE_REF_IS_RVALUE is a flag in the
generic code, it was easily possible to hash that flag and compare
it
2024-12-19 Jakub Jelinek
PR c++/110345
gcc/
* tree.cc (type_hash_canon_hash): Hash TYPE_REF_IS_RVALUE for
REFERENCE_TYPE.
(type_cache_hasher::equal): Compare TYPE_REF_IS_RVALUE for
REFERENCE_TYPE.
gcc/cp/
* tree.cc (handle_maybe_unused_attribute): New function.
(std_attributes): Use handle_maybe_unused_attribute instead
of handle_unused_attribute for maybe_unused attribute.
gcc/testsuite/
* g++.dg/cpp0x/attr-maybe_unused1.C: New test.
* g++.dg/cpp0x/alignas21.C: Add test for int && alignas (int).
Diff:
---
gcc/cp/tree.cc | 23 +++-
gcc/testsuite/g++.dg/cpp0x/alignas21.C | 1 +
gcc/testsuite/g++.dg/cpp0x/attr-maybe_unused1.C | 148
gcc/tree.cc | 8 +-
4 files changed, 178 insertions(+), 2 deletions(-)
diff --git a/gcc/cp/tree.cc b/gcc/cp/tree.cc
index 12d0831e4c4c..9b181be6237f 100644
--- a/gcc/cp/tree.cc
+++ b/gcc/cp/tree.cc
@@ -5162,6 +5162,27 @@ handle_std_deprecated_attribute (tree *node, tree name,
tree args, int flags,
return ret;
}
+/* The C++17 [[maybe_unused]] attribute mostly maps to the GNU unused
+ attribute. */
+
+static tree
+handle_maybe_unused_attribute (tree *node, tree name, tree args, int flags,
+ bool *no_add_attrs)
+{
+ tree t = *node;
+ tree ret = handle_unused_attribute (node, name, args, flags, no_add_attrs);
+ if (TYPE_P (*node) && t != *node)
+pedwarn (input_location, OPT_Wattributes,
+"%qE on a type other than class or enumeration definition", name);
+ else if (TREE_CODE (*node) == FIELD_DECL && DECL_UNNAMED_BIT_FIELD (*node))
+pedwarn (input_location, OPT_Wattributes, "%qE on unnamed bit-field",
+name);
+ else if (TREE_CODE (*node) == LABEL_DECL && DECL_NAME (*node) == NULL_TREE)
+pedwarn (input_location, OPT_Wattributes,
+"%qE on % or % label", name);
+ return ret;
+}
+
/* Table of valid C++ attributes. */
static const attribute_spec cxx_gnu_attributes[] =
{
@@ -5188,7 +5209,7 @@ static const attribute_spec std_attributes[] =
{ "deprecated", 0, 1, false, false, false, false,
handle_std_deprecated_attribute, NULL },
{ "maybe_unused", 0, 0, false, false, false, false,
-handle_unused_attribute, NULL },
+handle_maybe_unused_attribute, NULL },
{ "nodiscard", 0, 1, false, false, false, false,
handle_nodiscard_attribute, NULL },
{ "no_unique_address", 0, 0, true, false, false, false,
diff --git a/gcc/testsuite/g++.dg/cpp0x/alignas21.C
b/gcc/testsuite/g++.dg/cpp0x/alignas21.C
index b7be7c5ce926..3d3059a4e02c 100644
--- a/gcc/testsuite/g++.dg/cpp0x/alignas21.C
+++ b/gcc/testsuite/g++.dg/cpp0x/alignas21.C
@@ -81,6 +81,7 @@ int g2 alignas (int) [2];
int corge () alignas (int);// { dg-error "'alignas' on a
type other than class" }
int *alignas (int) h; // { dg-error "'alignas' on a
type other than class" }
int & alignas (int) i = f; // { dg-error "'alignas' on a
type other than class" }
+int && alignas (int) j = 0;// { dg-error "'alignas' on a
type other than class" }
int S::* alignas (int) k; // { dg-error "'alignas' on a
type other than class" }
auto l = sizeof (int [2] alignas (int)); // { dg-error "'alignas' on a
type other than class" }
int freddy (alignas (int) int a, // { dg-error "alignment may
not be specified for 'a'" }
diff --git a/gcc/testsuite/g++.dg/cpp0x/attr-m
[gcc/aoliva/heads/testme] (44 commits) testsuite: generalize ifcombine field-merge tests [PR118025
The branch 'aoliva/heads/testme' was updated to point to: 68981680a46c... testsuite: generalize ifcombine field-merge tests [PR118025 It previously pointed to: 03732dab7bf2... add options to control ifcombine Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST): --- 03732da... add options to control ifcombine 22de6ed... expand: drop stack adjustments after barrier [PR118006] c84685d... strub: accept indirection of volatile pointer types [PR1180 c92e258... avoid trying to set block in barriers [PR113506] Summary of changes (added commits): --- 6898168... testsuite: generalize ifcombine field-merge tests [PR118025 3908341... ifcombine field-merge: improve handling of dwords 1ec38e2... Fortran: Fix hyphenation errors in the manual (*) 703924b... Fortran: Use the present tense for the manual. (*) 41ef672... Fortran: Fixes for markup, typos, and indexing in manual (*) 53ddfba... Fortran: Clean up -funderscoring and -fsecond-underscore do (*) 09dd47b... strub: accept indirection of volatile pointer types [PR1180 (*) e7108c3... avoid trying to set block in barriers [PR113506] (*) 0dc35fe... testsuite: tree-ssa: Fix i686/-m32 fails for vector-*.c tes (*) 7c50564... testsuite: Add tests for PR118149 (*) aed4a26... Fortran: potential aliasing of complex pointer inquiry refe (*) 219ddae... i386: Disable SImode/DImode moves from/to mask regs without (*) 89b2c7d... AArch64: Implement vector concat of partial SVE vectors [PR (*) d7d3dfe... AArch64: Add SVE support for simd clones [PR96342] (*) 6ecb365... AArch64: Disable `omp declare variant' tests for aarch64 [P (*) 2d8982c... c++: regenerate opt urls (*) 670df03... arm: [MVE intrinsics] Fix moves of tuples (PR target/118131 (*) 4779dd0... RISC-V: Refine strided load/store testcase dump check to tr (*) eee2891... forwprop: Fix lane handling for VEC_PERM sequence blending (*) 8af296c... RISC-V: List valid -mtune options only once (*) 92216cb... c++: Fix up maybe_unused attribute handling [PR110345] (*) cd64751... c++: Disallow [[deprecated]] on types other than class/enum (*) a25cc26... Fortran: Fix caf_stop_numeric and reporting exceptions from (*) 71732ea... c++/modules: Validate external linkage definitions in heade (*) fde64d1... c++/modules: Check linkage for exported declarations (*) eebd8df... c++/modules: Support unnamed namespaces in header units (*) 0c2ae38... c++/modules: Ignore TU-local entities where necessary (*) 9016c5a... c++/modules: Detect exposures of TU-local entities (*) b11e85a... Daily bump. (*) 23df3c3... libstdc++: Add fancy pointer support to std::map and std::s (*) 7eac34a... c++: optimize constraint subsumption [PR118069] (*) 875f14e... c++: integer overflow during constraint subsumption [PR1180 (*) a104766... OpenMP: Add 'nec' as to the 'vendor' context-selector list (*) e3fab34... libstdc++: Implement C++23 (P1222R4) (*) 9238189... libstdc++: Implement C++23 (P0429R9) (*) fb1f1c7... libstdc++: Define P1206R7 range-key-type and range-mapped-t (*) fa99002... c++: ICE in TARGET_EXPR evaluation in cp_fold_r [PR117980] (*) fc95e87... Fix comment typos in tree-assume.cc (*) 570d4e4... libgomp.texi: Update 'arch' context-selector description (*) 8462a5f... testsuite: arm: Use effective-target for memset-inline* tes (*) 898f333... testsuite: arm: C++26 uses __equal() instead of operator==( (*) b117201... testsuite: Fix toplevel-asm-1.c failure for riscv (*) d063549... RISC-V: Adjust the strided store testcases check times on o (*) 46194b9... RISC-V: Make vector strided store alias all other memories (*) (*) This commit already exists in another branch. Because the reference `refs/users/aoliva/heads/testme' matches your hooks.email-new-commits-only configuration, no separate email is sent for this commit.
[gcc/aoliva/heads/testbase] (42 commits) Fortran: Fix hyphenation errors in the manual
The branch 'aoliva/heads/testbase' was updated to point to: 1ec38e26e2be... Fortran: Fix hyphenation errors in the manual It previously pointed to: 87f97ffba93a... ifcombine field merge: handle masks with sign extensions Diff: Summary of changes (added commits): --- 1ec38e2... Fortran: Fix hyphenation errors in the manual (*) 703924b... Fortran: Use the present tense for the manual. (*) 41ef672... Fortran: Fixes for markup, typos, and indexing in manual (*) 53ddfba... Fortran: Clean up -funderscoring and -fsecond-underscore do (*) 09dd47b... strub: accept indirection of volatile pointer types [PR1180 (*) e7108c3... avoid trying to set block in barriers [PR113506] (*) 0dc35fe... testsuite: tree-ssa: Fix i686/-m32 fails for vector-*.c tes (*) 7c50564... testsuite: Add tests for PR118149 (*) aed4a26... Fortran: potential aliasing of complex pointer inquiry refe (*) 219ddae... i386: Disable SImode/DImode moves from/to mask regs without (*) 89b2c7d... AArch64: Implement vector concat of partial SVE vectors [PR (*) d7d3dfe... AArch64: Add SVE support for simd clones [PR96342] (*) 6ecb365... AArch64: Disable `omp declare variant' tests for aarch64 [P (*) 2d8982c... c++: regenerate opt urls (*) 670df03... arm: [MVE intrinsics] Fix moves of tuples (PR target/118131 (*) 4779dd0... RISC-V: Refine strided load/store testcase dump check to tr (*) eee2891... forwprop: Fix lane handling for VEC_PERM sequence blending (*) 8af296c... RISC-V: List valid -mtune options only once (*) 92216cb... c++: Fix up maybe_unused attribute handling [PR110345] (*) cd64751... c++: Disallow [[deprecated]] on types other than class/enum (*) a25cc26... Fortran: Fix caf_stop_numeric and reporting exceptions from (*) 71732ea... c++/modules: Validate external linkage definitions in heade (*) fde64d1... c++/modules: Check linkage for exported declarations (*) eebd8df... c++/modules: Support unnamed namespaces in header units (*) 0c2ae38... c++/modules: Ignore TU-local entities where necessary (*) 9016c5a... c++/modules: Detect exposures of TU-local entities (*) b11e85a... Daily bump. (*) 23df3c3... libstdc++: Add fancy pointer support to std::map and std::s (*) 7eac34a... c++: optimize constraint subsumption [PR118069] (*) 875f14e... c++: integer overflow during constraint subsumption [PR1180 (*) a104766... OpenMP: Add 'nec' as to the 'vendor' context-selector list (*) e3fab34... libstdc++: Implement C++23 (P1222R4) (*) 9238189... libstdc++: Implement C++23 (P0429R9) (*) fb1f1c7... libstdc++: Define P1206R7 range-key-type and range-mapped-t (*) fa99002... c++: ICE in TARGET_EXPR evaluation in cp_fold_r [PR117980] (*) fc95e87... Fix comment typos in tree-assume.cc (*) 570d4e4... libgomp.texi: Update 'arch' context-selector description (*) 8462a5f... testsuite: arm: Use effective-target for memset-inline* tes (*) 898f333... testsuite: arm: C++26 uses __equal() instead of operator==( (*) b117201... testsuite: Fix toplevel-asm-1.c failure for riscv (*) d063549... RISC-V: Adjust the strided store testcases check times on o (*) 46194b9... RISC-V: Make vector strided store alias all other memories (*) (*) This commit already exists in another branch. Because the reference `refs/users/aoliva/heads/testbase' matches your hooks.email-new-commits-only configuration, no separate email is sent for this commit.
[gcc(refs/users/aoliva/heads/testme)] testsuite: generalize ifcombine field-merge tests [PR118025]
https://gcc.gnu.org/g:68981680a46ca69c96597dfa96adbb88563ccc83
commit 68981680a46ca69c96597dfa96adbb88563ccc83
Author: Alexandre Oliva
Date: Fri Dec 20 18:58:01 2024 -0300
testsuite: generalize ifcombine field-merge tests [PR118025]
Diff:
---
gcc/testsuite/gcc.dg/field-merge-1.c | 2 +-
gcc/testsuite/gcc.dg/field-merge-13.c | 2 +-
gcc/testsuite/gcc.dg/field-merge-14.c | 3 ++-
gcc/testsuite/gcc.dg/field-merge-15.c | 2 +-
gcc/testsuite/gcc.dg/field-merge-16.c | 17 +++--
gcc/testsuite/gcc.dg/field-merge-17.c | 2 +-
gcc/testsuite/gcc.dg/field-merge-3.c | 2 ++
gcc/testsuite/gcc.dg/field-merge-8.c | 2 ++
gcc/testsuite/gcc.dg/field-merge-9.c | 4 +++-
9 files changed, 20 insertions(+), 16 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/field-merge-1.c
b/gcc/testsuite/gcc.dg/field-merge-1.c
index 1818e104437e..4405d40ee79d 100644
--- a/gcc/testsuite/gcc.dg/field-merge-1.c
+++ b/gcc/testsuite/gcc.dg/field-merge-1.c
@@ -58,7 +58,7 @@ int main () {
return 0;
}
-/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 8 "optimized" } } */
+/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 8 "optimized" { target {
! { avr-*-* pru-*-* } } } } } */
/* { dg-final { scan-assembler-not "cmpb" { target { i*86-*-* || x86_64-*-* }
} } } */
/* { dg-final { scan-assembler-times "cmpl" 8 { target { i*86-*-* ||
x86_64-*-* } } } } */
/* { dg-final { scan-assembler-times "cmpw" 8 { target { powerpc*-*-* ||
rs6000-*-* } } } } */
diff --git a/gcc/testsuite/gcc.dg/field-merge-13.c
b/gcc/testsuite/gcc.dg/field-merge-13.c
index 7e4f4c499347..eeef73338f8e 100644
--- a/gcc/testsuite/gcc.dg/field-merge-13.c
+++ b/gcc/testsuite/gcc.dg/field-merge-13.c
@@ -90,4 +90,4 @@ int main () {
return 0;
}
-/* { dg-final { scan-tree-dump-times "optimizing" 9 "ifcombine" } } */
+/* { dg-final { scan-tree-dump-times "optimizing" 9 "ifcombine" { target { ! {
avr-*-* pru-*-* } } } } } */
diff --git a/gcc/testsuite/gcc.dg/field-merge-14.c
b/gcc/testsuite/gcc.dg/field-merge-14.c
index 91d84cfebf19..73259e0936e4 100644
--- a/gcc/testsuite/gcc.dg/field-merge-14.c
+++ b/gcc/testsuite/gcc.dg/field-merge-14.c
@@ -1,7 +1,8 @@
/* { dg-do run } */
/* { dg-options "-O -fdump-tree-ifcombine-details" } */
-/* Check that we don't get confused by multiple conversions. */
+/* Check that we don't get confused by multiple conversions. Conceivably, we
+ could combine both tests using b, but the current logic won't do that. */
__attribute__((noipa))
int f(int *a,int *d)
diff --git a/gcc/testsuite/gcc.dg/field-merge-15.c
b/gcc/testsuite/gcc.dg/field-merge-15.c
index 34641e893c92..fc3846452716 100644
--- a/gcc/testsuite/gcc.dg/field-merge-15.c
+++ b/gcc/testsuite/gcc.dg/field-merge-15.c
@@ -33,4 +33,4 @@ int main () {
return 0;
}
-/* { dg-final { scan-tree-dump-times "optimizing" 6 "ifcombine" } } */
+/* { dg-final { scan-tree-dump-times "optimizing" 6 "ifcombine" { target { ! {
avr-*-* pru-*-* } } } } } */
diff --git a/gcc/testsuite/gcc.dg/field-merge-16.c
b/gcc/testsuite/gcc.dg/field-merge-16.c
index 2ca23ea663a4..afdaf45b6a94 100644
--- a/gcc/testsuite/gcc.dg/field-merge-16.c
+++ b/gcc/testsuite/gcc.dg/field-merge-16.c
@@ -4,17 +4,17 @@
/* Check that tests for sign-extension bits are handled correctly. */
struct s {
- short a;
- short b;
- unsigned short c;
- unsigned short d;
-} __attribute__ ((aligned (8)));
+ signed char a;
+ signed char b;
+ unsigned char c;
+ unsigned char d;
+} __attribute__ ((aligned (4)));
struct s p = { -1, 0, 0, 0 };
struct s q = { 0, -1, 0, 0 };
struct s r = { 1, 1, 0, 0 };
-const long long mask = 1ll << (sizeof (long long) * __CHAR_BIT__ - 5);
+const long mask = 1l << (sizeof (long) * __CHAR_BIT__ - 5);
int fp ()
{
@@ -50,9 +50,6 @@ int fr ()
}
int main () {
- /* Unlikely, but play safe. */
- if (sizeof (long long) == sizeof (short))
-return 0;
if (fp () < 0
|| fq () < 0
|| fr () > 0)
@@ -63,4 +60,4 @@ int main () {
/* We test .b after other fields instead of right after .a to give field
merging a chance, otherwise the masked compares with zero are combined by
other ifcombine logic. The .c test is discarded by earlier optimizers. */
-/* { dg-final { scan-tree-dump-times "optimizing" 6 "ifcombine" } } */
+/* { dg-final { scan-tree-dump-times "optimizing" 6 "ifcombine" { target { ! {
avr-*-* pru-*-* } } } } } */
diff --git a/gcc/testsuite/gcc.dg/field-merge-17.c
b/gcc/testsuite/gcc.dg/field-merge-17.c
index 06c8ec16e86c..a42658ac5c51 100644
--- a/gcc/testsuite/gcc.dg/field-merge-17.c
+++ b/gcc/testsuite/gcc.dg/field-merge-17.c
@@ -43,4 +43,4 @@ int main () {
return 0;
}
-/* { dg-final { scan-tree-dump-times "optimizing" 4 "ifcombine" } } */
+/* { dg-final { scan-tree-dump-times "optimizing" 4 "ifcombine" { target { ! {
avr-*-* pru-*-* } } } } } */
diff --git a/gcc/testsuite/gcc.dg/field-merge-3.c
b/gcc/testsuite/gcc.dg/field-merge-3.c
index f26e8a96ea04..a9fe404fa426 100644
--- a/gcc/tests
[gcc(refs/users/aoliva/heads/testme)] ifcombine field-merge: improve handling of dwords
https://gcc.gnu.org/g:39083411833c73c705a070a8b57bebef8e1c9e1e
commit 39083411833c73c705a070a8b57bebef8e1c9e1e
Author: Alexandre Oliva
Date: Fri Dec 20 21:11:15 2024 -0300
ifcombine field-merge: improve handling of dwords
On 32-bit hosts, data types with 64-bit alignment aren't getting
treated as desired by ifcombine field-merging: we limit the choice of
modes at BITS_PER_WORD sizes, but when deciding the boundary for a
split, we'd limit the choice only by the alignment, so we wouldn't
even consider a split at an odd 32-bit boundary. Fix that by limiting
the boundary choice by word choice as well.
Now, this would still leave misaligned 64-bit fields in 64-bit-aligned
data structures unhandled by ifcombine on 32-bit hosts. We already
need to loading them as double words, and if they're not byte-aligned,
the code gets really ugly, but ifcombine could improve it if it allows
double-word loads as a last resort. I've added that.
for gcc/ChangeLog
* gimple-fold.cc (fold_truth_andor_for_ifcombine): Limit
boundary choice by word size as well. Try aligned double-word
loads as a last resort.
for gcc/testsuite/ChangeLog
* gcc.dg/field-merge-17.c: New.
Diff:
---
gcc/gimple-fold.cc| 30 ---
gcc/testsuite/gcc.dg/field-merge-17.c | 46 +++
2 files changed, 73 insertions(+), 3 deletions(-)
diff --git a/gcc/gimple-fold.cc b/gcc/gimple-fold.cc
index 2d6e2074416f..0e832158a47b 100644
--- a/gcc/gimple-fold.cc
+++ b/gcc/gimple-fold.cc
@@ -8381,16 +8381,40 @@ fold_truth_andor_for_ifcombine (enum tree_code code,
tree truth_type,
{
/* Consider the possibility of recombining loads if any of the
fields straddles across an alignment boundary, so that either
-part can be loaded along with the other field. */
+part can be loaded along with the other field. Since we
+limit access modes to BITS_PER_WORD, don't exceed that,
+otherwise on a 32-bit host and a 64-bit-aligned data
+structure, we'll fail the above for a field that straddles
+across two words, and would fail here for not even trying to
+split it at between 32-bit words. */
HOST_WIDE_INT boundary = compute_split_boundary_from_align
- (ll_align, ll_bitpos, ll_bitsize, rl_bitpos, rl_bitsize);
+ (MIN (ll_align, BITS_PER_WORD),
+ll_bitpos, ll_bitsize, rl_bitpos, rl_bitsize);
if (boundary < 0
|| !get_best_mode (boundary - first_bit, first_bit, 0, ll_end_region,
ll_align, BITS_PER_WORD, volatilep, &lnmode)
|| !get_best_mode (end_bit - boundary, boundary, 0, ll_end_region,
ll_align, BITS_PER_WORD, volatilep, &lnmode2))
- return 0;
+ {
+ if (ll_align <= BITS_PER_WORD)
+ return 0;
+
+ /* As a last resort, try double-word access modes. This
+enables us to deal with misaligned double-word fields
+that straddle across 3 separate words. */
+ boundary = compute_split_boundary_from_align
+ (MIN (ll_align, 2 * BITS_PER_WORD),
+ll_bitpos, ll_bitsize, rl_bitpos, rl_bitsize);
+ if (boundary < 0
+ || !get_best_mode (boundary - first_bit, first_bit,
+0, ll_end_region, ll_align, 2 * BITS_PER_WORD,
+volatilep, &lnmode)
+ || !get_best_mode (end_bit - boundary, boundary,
+0, ll_end_region, ll_align, 2 * BITS_PER_WORD,
+volatilep, &lnmode2))
+ return 0;
+ }
/* If we can't have a single load, but can with two, figure out whether
the two compares can be separated, i.e., whether the entirety of the
diff --git a/gcc/testsuite/gcc.dg/field-merge-17.c
b/gcc/testsuite/gcc.dg/field-merge-17.c
new file mode 100644
index ..06c8ec16e86c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/field-merge-17.c
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-options "-O -fdump-tree-ifcombine-details" } */
+
+/* Check that we can optimize misaligned double-words. */
+
+struct s {
+ short a;
+ long long b;
+ int c;
+ long long d;
+ short e;
+} __attribute__ ((packed, aligned (8)));
+
+struct s p = { 0, 0, 0, 0, 0 };
+
+__attribute__ ((__noinline__, __noipa__, __noclone__))
+int fp ()
+{
+ if (p.a
+ || p.b
+ || p.c
+ || p.d
+ || p.e)
+return 1;
+ else
+return -1;
+}
+
+int main () {
+ /* Unlikely, but play safe. */
+ if (sizeof (long long) == sizeof (short))
+return 0;
+ if (fp () > 0)
+__builtin_abort ();
+ unsigned char *pc = (unsigned char *)&p;
+ for (int i = 0; i < sizeof (p); i++)
+{
+ pc[i] = 1;
+ if (fp () < 0)
+ __builtin_abort ();
+ pc[i] = 0;
+
[gcc r15-6396] testsuite: Add tests for PR118149
https://gcc.gnu.org/g:7c50564627e42c619cc64c09cce8a42fd7932166
commit r15-6396-g7c50564627e42c619cc64c09cce8a42fd7932166
Author: Christoph Müllner
Date: Fri Dec 20 14:46:51 2024 +0100
testsuite: Add tests for PR118149
A recent bugfix (eee2891312) for PR117830 also addressed PR118149.
This patch adds two test cases for PR118149.
These tests are different than other tests in that one of the
vec-perm selectors contains indices in descending order (1, 1, 0, 0),
which is the root cause for the ICE observed in PR118149.
PR118149
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr118149-2.c: New test.
* gcc.dg/tree-ssa/pr118149.c: New test.
Signed-off-by: Christoph Müllner
Diff:
---
gcc/testsuite/gcc.dg/tree-ssa/pr118149-2.c | 37 ++
gcc/testsuite/gcc.dg/tree-ssa/pr118149.c | 20
2 files changed, 57 insertions(+)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr118149-2.c
b/gcc/testsuite/gcc.dg/tree-ssa/pr118149-2.c
new file mode 100644
index ..31f3d7e0dc74
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr118149-2.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -fdump-tree-forwprop1-details -Wno-psabi" } */
+/* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */
+
+typedef int vec __attribute__((vector_size (4 * sizeof (float;
+
+void f1 (vec *p_v_in, vec *p_v_out_1, vec *p_v_out_2)
+{
+ vec sel00 = { 1, 1, 3, 3 };
+ vec sel01 = { 0, 0, 2, 2 };
+ vec sel10 = { 3, 3, 2, 2 };
+ vec sel11 = { 1, 1, 0, 0 };
+ vec sel = { 0, 1, 6, 7 };
+ vec v_1, v_2, v_x, v_y, v_out_1, v_out_2;
+ vec v_in = *p_v_in;
+
+ /* First vec perm sequence. */
+ v_1 = __builtin_shuffle (v_in, v_in, sel00);
+ v_2 = __builtin_shuffle (v_in, v_in, sel01);
+ v_x = v_2 - v_1;
+ v_y = v_1 + v_2;
+ v_out_1 = __builtin_shuffle (v_y, v_x, sel);
+
+ /* Second vec perm sequence. */
+ v_1 = __builtin_shuffle (v_in, v_in, sel10);
+ v_2 = __builtin_shuffle (v_in, v_in, sel11);
+ v_x = v_2 - v_1;
+ v_y = v_1 + v_2;
+ v_out_2 = __builtin_shuffle (v_y, v_x, sel);
+
+ *p_v_out_1 = v_out_1;
+ *p_v_out_2 = v_out_2;
+}
+
+/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended"
"forwprop1" { target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 0, 0, 6, 6 }" "forwprop1" {
target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 1, 1, 7, 7 }" "forwprop1" {
target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr118149.c
b/gcc/testsuite/gcc.dg/tree-ssa/pr118149.c
new file mode 100644
index ..f471877f6611
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr118149.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -fdump-tree-forwprop4-details -Wno-psabi" } */
+/* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */
+
+float *fastconv_parse_dst;
+
+void fastconv_parse ()
+{
+ float r3k = fastconv_parse_dst[1] - fastconv_parse_dst[3],
+i0k = fastconv_parse_dst[4] + fastconv_parse_dst[6],
+i1k = fastconv_parse_dst[4] - fastconv_parse_dst[6],
+i2k = fastconv_parse_dst[5] + fastconv_parse_dst[7];
+ fastconv_parse_dst[1] = fastconv_parse_dst[0];
+ fastconv_parse_dst[4] = fastconv_parse_dst[5] = i0k - i2k;
+ fastconv_parse_dst[6] = fastconv_parse_dst[7] = i1k + r3k;
+}
+
+/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended"
"forwprop4" { target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 0, 0, 6, 6 }" "forwprop4" {
target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 1, 1, 7, 7 }" "forwprop4" {
target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */
[gcc r15-6402] Fortran: Use the present tense for the manual.
https://gcc.gnu.org/g:703924bf60903f3b3893f526d17aa0592b5cc923
commit r15-6402-g703924bf60903f3b3893f526d17aa0592b5cc923
Author: Sandra Loosemore
Date: Fri Dec 20 05:08:15 2024 +
Fortran: Use the present tense for the manual.
The present tense is preferred for expressing facts or enduring
behavior. Thus we should say "option X does Y" instead of "option X
will do Y", reserving the future tense for things that happen at some
later time (such as in a future release of GCC, or at run time as
explicitly contrasted with compile time).
This set of edits is largely mechanical substitution of phrasing
involving "will". I also fixed a few more markup problems noted while
editing nearby text and fixed a few instances of awkward wording.
gcc/fortran/ChangeLog
* gfortran.texi: Use the present tense throughout; fix some
markup issues and awkward wording.
* invoke.texi: Likewise.
Diff:
---
gcc/fortran/gfortran.texi | 141 +++--
gcc/fortran/invoke.texi | 143 --
2 files changed, 147 insertions(+), 137 deletions(-)
diff --git a/gcc/fortran/gfortran.texi b/gcc/fortran/gfortran.texi
index 77c5e5235f9a..5b27a6dbe300 100644
--- a/gcc/fortran/gfortran.texi
+++ b/gcc/fortran/gfortran.texi
@@ -634,7 +634,7 @@ The default value is 0.
This environment variable controls whether all I/O is unbuffered. If
the first letter is @samp{y}, @samp{Y} or @samp{1}, all I/O is
-unbuffered. This will slow down small sequential reads and writes. If
+unbuffered. This slows down small sequential reads and writes. If
the first letter is @samp{n}, @samp{N} or @samp{0}, I/O is buffered.
This is the default.
@@ -644,7 +644,7 @@ This is the default.
The environment variable named @env{GFORTRAN_UNBUFFERED_PRECONNECTED} controls
whether I/O on a preconnected unit (i.e.@: STDOUT or STDERR) is unbuffered. If
the first letter is @samp{y}, @samp{Y} or @samp{1}, I/O is unbuffered. This
-will slow down small sequential reads and writes. If the first letter
+slows down small sequential reads and writes. If the first letter
is @samp{n}, @samp{N} or @samp{0}, I/O is buffered. This is the default.
@node GFORTRAN_SHOW_LOCUS
@@ -674,6 +674,7 @@ be sure to quote spaces, as in
@smallexample
$ GFORTRAN_LIST_SEPARATOR=' , ' ./a.out
@end smallexample
+@noindent
when @command{a.out} is the compiled Fortran program that you want to run.
Default is a single space.
@@ -753,7 +754,7 @@ setting a default data representation for the whole
program. The
@code{CONVERT} specifier overrides the @option{-fconvert} compile options.
Note that the values specified via the @env{GFORTRAN_CONVERT_UNIT}
-environment variable will override the @code{CONVERT} specifier in the
+environment variable override the @code{CONVERT} specifier in the
@code{OPEN} statement. This is to give control over data formats to
users who do not have the source code of their program available.
@@ -889,7 +890,7 @@ See also @ref{Argument passing conventions} and
@ref{Interoperability with C}.
The Fortran standard does not require the compiler to evaluate all parts of an
expression, if they do not contribute to the final result. For logical
expressions with @code{.AND.} or @code{.OR.} operators, in particular, GNU
-Fortran will optimize out function calls (even to impure functions) if the
+Fortran optimizes out function calls (even to impure functions) if the
result of the expression can be established without them. However, since not
all compilers do that, and such an optimization can potentially modify the
program flow and subsequent results, GNU Fortran throws warnings for such
@@ -1018,17 +1019,17 @@ where file metadata is written to the directory lazily.
This means
that, for instance, the @code{dir} command can show a stale size for a
file. One can force a directory metadata update by closing the unit,
or by calling @code{_commit} on the file descriptor. Note, though,
-that @code{_commit} will force all dirty data to stable storage, which
+that @code{_commit} forces all dirty data to stable storage, which
is often a very slow operation.
The Network File System (NFS) implements a relaxed consistency model
called open-to-close consistency. Closing a file forces dirty data and
metadata to be flushed to the server, and opening a file forces the
client to contact the server in order to revalidate cached
-data. @code{fsync} will also force a flush of dirty data and metadata
+data. @code{fsync} also forces a flush of dirty data and metadata
to the server. Similar to @code{open} and @code{close}, acquiring and
-releasing @code{fcntl} file locks, if the server supports them, will
-also force cache validation and flushing dirty data and metadata.
+releasing @code{fcntl} file locks, if the server supports them,
+also forces cache validation and flushing dirty data and m
[gcc r15-6401] Fortran: Fixes for markup, typos, and indexing in manual
https://gcc.gnu.org/g:41ef672247c28f4a30d60e8ce691a6b284e61e59
commit r15-6401-g41ef672247c28f4a30d60e8ce691a6b284e61e59
Author: Sandra Loosemore
Date: Thu Dec 19 23:49:57 2024 +
Fortran: Fixes for markup, typos, and indexing in manual
While working on something else I noticed there were numerous places
in the GNU Fortran manual with incorrect/missing Texinfo markup. I
made a pass through about the first third of the manual (not yet the
coarray API or intrinsics documentation) to fix at least some of those
issues, plus some typos and missing @cindex entries.
There shouldn't be any semantic changes to the documentation in this patch.
gcc/fortran/ChangeLog
* gfortran.texi: Fix markup, typos, and indexing throughout the
file.
* invoke.texi: Likewise.
Diff:
---
gcc/fortran/gfortran.texi | 236 ++
gcc/fortran/invoke.texi | 92 ++
2 files changed, 183 insertions(+), 145 deletions(-)
diff --git a/gcc/fortran/gfortran.texi b/gcc/fortran/gfortran.texi
index 8aedf46680d2..77c5e5235f9a 100644
--- a/gcc/fortran/gfortran.texi
+++ b/gcc/fortran/gfortran.texi
@@ -237,7 +237,7 @@ The GNU Fortran compiler is the successor to @command{g77},
the
Fortran 77 front end included in GCC prior to version 4 (released in
2005). While it is backward-compatible with most @command{g77}
extensions and command-line options, @command{gfortran} is a completely new
-implemention designed to support more modern dialects of Fortran.
+implementation designed to support more modern dialects of Fortran.
GNU Fortran implements the Fortran 77, 90 and 95 standards
completely, most of the Fortran 2003 and 2008 standards, and some
features from the 2018 standard. It also implements several extensions
@@ -752,9 +752,9 @@ data representation for unformatted files. @xref{Runtime
Options}, for
setting a default data representation for the whole program. The
@code{CONVERT} specifier overrides the @option{-fconvert} compile options.
-@emph{Note that the values specified via the GFORTRAN_CONVERT_UNIT
-environment variable will override the CONVERT specifier in the
-open statement}. This is to give control over data formats to
+Note that the values specified via the @env{GFORTRAN_CONVERT_UNIT}
+environment variable will override the @code{CONVERT} specifier in the
+@code{OPEN} statement. This is to give control over data formats to
users who do not have the source code of their program available.
@node GFORTRAN_ERROR_BACKTRACE
@@ -818,7 +818,7 @@ might in some way or another become visible to the
programmer.
@node KIND Type Parameters
-@section KIND Type Parameters
+@section @code{KIND} Type Parameters
@cindex kind
The @code{KIND} type parameters supported by GNU Fortran for the primitive
@@ -866,7 +866,7 @@ the kind parameters of the @ref{ISO_C_BINDING} module
should be used.
@node Internal representation of LOGICAL variables
-@section Internal representation of LOGICAL variables
+@section Internal representation of @code{LOGICAL} variables
@cindex logical, variable representation
The Fortran standard does not specify how variables of @code{LOGICAL}
@@ -897,7 +897,7 @@ situations with the @option{-Wfunction-elimination} flag.
@node MAX and MIN intrinsics with REAL NaN arguments
-@section MAX and MIN intrinsics with REAL NaN arguments
+@section @code{MAX} and @code{MIN} intrinsics with @code{REAL} NaN arguments
@cindex MAX, MIN, NaN
The Fortran standard does not specify what the result of the
@@ -970,7 +970,7 @@ Fortran programmer can use the intrinsic @code{FNUM} to
retrieve the
low level file descriptor corresponding to an open Fortran unit. Then,
using e.g. the @code{ISO_C_BINDING} feature, one can call the
underlying system call to flush dirty data to stable storage, such as
-@code{fsync} on POSIX, @code{_commit} on MingW, or @code{fcntl(fd,
+@code{fsync} on POSIX, @code{_commit} on MinGW, or @code{fcntl(fd,
F_FULLSYNC, 0)} on macOS. The following example shows how to call
fsync:
@@ -1032,7 +1032,7 @@ also force cache validation and flushing dirty data and
metadata.
@node Files opened without an explicit ACTION= specifier
-@section Files opened without an explicit ACTION= specifier
+@section Files opened without an explicit @code{ACTION=} specifier
@cindex open, action
The Fortran standard says that if an @code{OPEN} statement is executed
@@ -1056,7 +1056,7 @@ symbolic links, on systems that support them.
@itemize
-@item Results of INQUIRE statements of the ``inquire by file'' form will
+@item Results of @code{INQUIRE} statements of the ``inquire by file'' form
relate to the target of the symbolic link. For example,
@code{INQUIRE(FILE="foo",EXIST=ex)} will set @var{ex} to @var{.true.} if
@var{foo} is a symbolic link pointing to an existing file, and @var{.false.}
@@ -1088,11 +1088,11 @@ Each subrecord consists of a leading
[gcc r15-6403] Fortran: Fix hyphenation errors in the manual
https://gcc.gnu.org/g:1ec38e26e2be462c0fb645718714f61fc86a497d
commit r15-6403-g1ec38e26e2be462c0fb645718714f61fc86a497d
Author: Sandra Loosemore
Date: Fri Dec 20 16:27:14 2024 +
Fortran: Fix hyphenation errors in the manual
When looking through the gfortran manual, I noted some problems with
hyphens being used where they're not correct or necessary,
e.g. "non-standard" vs "nonstandard", "null-pointer" vs "null pointer"
(as a noun), etc. I've made a pass through the documentation to
correct at least some of those uses.
gcc/fortran/ChangeLog
* gfortran.texi: Get rid of some unnecessary hyphens throughout
the file.
* invoke.texi: Likewise.
Diff:
---
gcc/fortran/gfortran.texi | 58 +++
gcc/fortran/invoke.texi | 24 ++--
2 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/gcc/fortran/gfortran.texi b/gcc/fortran/gfortran.texi
index 5b27a6dbe300..2838702b64b3 100644
--- a/gcc/fortran/gfortran.texi
+++ b/gcc/fortran/gfortran.texi
@@ -163,7 +163,7 @@ the GNU Fortran compiler. You can find in this manual how
to invoke
@ifset DEVELOPMENT
@emph{Warning:} This document, and the compiler it describes, are still
-under development. While efforts are made to keep it up-to-date, it might
+under development. While efforts are made to keep it up to date, it might
not accurately reflect the status of the most recent GNU Fortran compiler.
@end ifset
@@ -1163,7 +1163,7 @@ sytems, such as Linux, it is necessary to specify
@option{-pthread},
Integer overflow is prohibited by the Fortran standard. The behavior
of gfortran on integer overflow is undefined by default. Traditional
code, like linear congruential pseudo-random number generators in old
-programs that rely on specific, non-standard behavior may generate
+programs that rely on specific, nonstandard behavior may generate
unexpected results. The @option{-fsanitize=undefined} option can be
used to detect such code at runtime.
@@ -1606,12 +1606,12 @@ and @code{CHARACTER}.
@cindex conversion, to character
Allowing character literals to be used in a similar way to Hollerith constants
-is a non-standard extension. This feature is enabled using
+is a nonstandard extension. This feature is enabled using
-fdec-char-conversions and only applies to character literals of @code{kind=1}.
Character literals can be used in @code{DATA} statements and assignments with
numeric (@code{INTEGER}, @code{REAL}, or @code{COMPLEX}) or @code{LOGICAL}
-variables. Like Hollerith constants they are copied byte-wise fashion. The
+variables. Like Hollerith constants they are copied bytewise fashion. The
constant is padded with spaces or truncated to fit the size of the
variable in which it is stored.
@@ -1629,7 +1629,7 @@ Examples:
@subsection Cray pointers
@cindex pointer, Cray
-Cray pointers are part of a non-standard extension that provides a
+Cray pointers are part of a nonstandard extension that provides a
C-like pointer in Fortran. This is accomplished through a pair of
variables: an integer ``pointer'' that holds a memory address, and a
``pointee'' that is used to dereference the pointer.
@@ -2126,7 +2126,7 @@ the initializer list.
@cindex @code{MAP}
Unions are an old vendor extension which were commonly used with the
-non-standard @ref{STRUCTURE and RECORD} extensions. Use of @code{UNION} and
+nonstandard @ref{STRUCTURE and RECORD} extensions. Use of @code{UNION} and
@code{MAP} is automatically enabled with @option{-fdec-structure}.
A @code{UNION} declaration occurs within a structure; within the definition of
@@ -2667,7 +2667,7 @@ c
Some Fortran compilers, including @command{g77}, let the user declare
complex functions with the syntax @code{COMPLEX FUNCTION name*16()}, as
-well as @code{COMPLEX*16 FUNCTION name()}. Both are non-standard, legacy
+well as @code{COMPLEX*16 FUNCTION name()}. Both are nonstandard legacy
extensions. @command{gfortran} accepts the latter form, which is more
common, but not the former.
@@ -3838,7 +3838,7 @@ dollar sign (@code{$}) is additionally permitted with the
option
@option{-fdollar-ok}, but not as first character and only if the
target system supports it.
-By default, the procedure name is the lower-cased Fortran name with an
+By default, the procedure name is the lowercased Fortran name with an
appended underscore (@code{_}); using @option{-fno-underscoring} no
underscore is appended while @code{-fsecond-underscore} appends two
underscores. Depending on the target system and the calling convention,
@@ -3848,12 +3848,12 @@ number is appended. For the changing the calling
convention, see
@pxref{GNU Fortran Compiler Directives}.
For common blocks, the same convention is used, i.e. by default an
-underscore is appended to the lower-cased Fortran name. Blank commons
+underscore is appended to the lowercased Fortran name. Blank c
[gcc r15-6391] AArch64: Disable `omp declare variant' tests for aarch64 [PR96342]
https://gcc.gnu.org/g:6ecb365d4c3f36eaf684c38fc5d9008a1409c725
commit r15-6391-g6ecb365d4c3f36eaf684c38fc5d9008a1409c725
Author: Tamar Christina
Date: Fri Dec 20 14:25:50 2024 +
AArch64: Disable `omp declare variant' tests for aarch64 [PR96342]
These tests are x86 specific and shouldn't be run for aarch64.
gcc/testsuite/ChangeLog:
PR target/96342
* c-c++-common/gomp/declare-variant-14.c: Make i?86 and x86_64
target
only test.
* gfortran.dg/gomp/declare-variant-14.f90: Likewise.
Diff:
---
gcc/testsuite/c-c++-common/gomp/declare-variant-14.c | 13 +
gcc/testsuite/gfortran.dg/gomp/declare-variant-14.f90 | 11 ---
2 files changed, 9 insertions(+), 15 deletions(-)
diff --git a/gcc/testsuite/c-c++-common/gomp/declare-variant-14.c
b/gcc/testsuite/c-c++-common/gomp/declare-variant-14.c
index e3668893afe3..8a6bf09d3cf6 100644
--- a/gcc/testsuite/c-c++-common/gomp/declare-variant-14.c
+++ b/gcc/testsuite/c-c++-common/gomp/declare-variant-14.c
@@ -1,6 +1,5 @@
-/* { dg-do compile { target vect_simd_clones } } */
-/* { dg-additional-options "-fdump-tree-gimple -fdump-tree-optimized" } */
-/* { dg-additional-options "-mno-sse3" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && vect_simd_clones } }
} */
+/* { dg-additional-options "-mno-sse3 -fdump-tree-gimple
-fdump-tree-optimized" } */
int f01 (int);
int f02 (int);
@@ -15,15 +14,13 @@ int
test1 (int x)
{
/* At gimplification time, we can't decide yet which function to call. */
- /* { dg-final { scan-tree-dump-times "f04 \\\(x" 2 "gimple" { target {
!aarch64*-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "f04 \\\(x" 2 "gimple" } } */
/* After simd clones are created, the original non-clone test1 shall
call f03 (score 6), the sse2/avx/avx2 clones too, but avx512f clones
shall call f01 with score 8. */
/* { dg-final { scan-tree-dump-not "f04 \\\(x" "optimized" } } */
- /* { dg-final { scan-tree-dump-times "f03 \\\(x" 14 "optimized" { target {
!aarch64*-*-* } } } } */
- /* { dg-final { scan-tree-dump-times "f03 \\\(x" 10 "optimized" { target {
aarch64*-*-* } } } } */
- /* { dg-final { scan-tree-dump-times "f01 \\\(x" 4 "optimized" { target {
!aarch64*-*-* } } } } */
- /* { dg-final { scan-tree-dump-times "f01 \\\(x" 0 "optimized" { target {
aarch64*-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "f03 \\\(x" 14 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "f01 \\\(x" 4 "optimized" } } */
int a = f04 (x);
int b = f04 (x);
return a + b;
diff --git a/gcc/testsuite/gfortran.dg/gomp/declare-variant-14.f90
b/gcc/testsuite/gfortran.dg/gomp/declare-variant-14.f90
index 6319df0558f3..e154d93d73a5 100644
--- a/gcc/testsuite/gfortran.dg/gomp/declare-variant-14.f90
+++ b/gcc/testsuite/gfortran.dg/gomp/declare-variant-14.f90
@@ -1,6 +1,5 @@
-! { dg-do compile { target vect_simd_clones } }
-! { dg-additional-options "-O0 -fdump-tree-gimple -fdump-tree-optimized" }
-! { dg-additional-options "-mno-sse3" { target { i?86-*-* x86_64-*-* } } }
+! { dg-do compile { target { { i?86-*-* x86_64-*-* } && vect_simd_clones } } }
*/
+! { dg-additional-options "-mno-sse3 -O0 -fdump-tree-gimple
-fdump-tree-optimized" }
module main
implicit none
@@ -40,10 +39,8 @@ contains
! call f03 (score 6), the sse2/avx/avx2 clones too, but avx512f clones
! shall call f01 with score 8.
! { dg-final { scan-tree-dump-not "f04 \\\(x" "optimized" } }
-! { dg-final { scan-tree-dump-times "f03 \\\(x" 14 "optimized" { target {
!aarch64*-*-* } } } }
-! { dg-final { scan-tree-dump-times "f03 \\\(x" 6 "optimized" { target {
aarch64*-*-* } } } }
-! { dg-final { scan-tree-dump-times "f01 \\\(x" 4 "optimized" { target {
!aarch64*-*-* } } } }
-! { dg-final { scan-tree-dump-times "f01 \\\(x" 0 "optimized" { target {
aarch64*-*-* } } } }
+! { dg-final { scan-tree-dump-times "f03 \\\(x" 14 "optimized" } }
+! { dg-final { scan-tree-dump-times "f01 \\\(x" 4 "optimized" } }
a = f04 (x)
b = f04 (x)
test1 = a + b
[gcc r15-6392] AArch64: Add SVE support for simd clones [PR96342]
https://gcc.gnu.org/g:d7d3dfe7a2a26e370805ddf835bfd00c51d32f1b
commit r15-6392-gd7d3dfe7a2a26e370805ddf835bfd00c51d32f1b
Author: Tamar Christina
Date: Fri Dec 20 14:27:25 2024 +
AArch64: Add SVE support for simd clones [PR96342]
This patch finalizes adding support for the generation of SVE simd clones
when
no simdlen is provided, following the ABI rules where the widest data type
determines the minimum amount of elements in a length agnostic vector.
gcc/ChangeLog:
PR target/96342
* config/aarch64/aarch64-protos.h (add_sve_type_attribute): Declare.
* config/aarch64/aarch64-sve-builtins.cc (add_sve_type_attribute):
Make
visibility global and support use for non_acle types.
* config/aarch64/aarch64.cc
(aarch64_simd_clone_compute_vecsize_and_simdlen): Create VLA simd
clone
when no simdlen is provided, according to ABI rules.
(simd_clone_adjust_sve_vector_type): New helper function.
(aarch64_simd_clone_adjust): Add '+sve' attribute to SVE simd clones
and modify types to use SVE types.
* omp-simd-clone.cc (simd_clone_mangle): Print 'x' for VLA simdlen.
(simd_clone_adjust): Adapt safelen check to be compatible with VLA
simdlen.
gcc/testsuite/ChangeLog:
PR target/96342
* gcc.target/aarch64/declare-simd-2.c: Add SVE clone scan.
* gcc.target/aarch64/vect-simd-clone-1.c: New test.
* g++.target/aarch64/vect-simd-clone-1.C: New test.
Co-authored-by: Victor Do Nascimento
Co-authored-by: Tamar Christina
Diff:
---
gcc/config/aarch64/aarch64-protos.h| 2 +
gcc/config/aarch64/aarch64-sve-builtins.cc | 9 +-
gcc/config/aarch64/aarch64.cc | 175 +
gcc/omp-simd-clone.cc | 13 +-
.../g++.target/aarch64/vect-simd-clone-1.C | 88 +++
gcc/testsuite/gcc.target/aarch64/declare-simd-2.c | 1 +
.../gcc.target/aarch64/vect-simd-clone-1.c | 89 +++
7 files changed, 342 insertions(+), 35 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-protos.h
b/gcc/config/aarch64/aarch64-protos.h
index bd17486e9128..7ab1316cf568 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -1151,6 +1151,8 @@ namespace aarch64_sve {
#ifdef GCC_TARGET_H
bool verify_type_context (location_t, type_context_kind, const_tree, bool);
#endif
+ void add_sve_type_attribute (tree, unsigned int, unsigned int,
+ const char *, const char *);
}
extern void aarch64_split_combinev16qi (rtx operands[3]);
diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc
b/gcc/config/aarch64/aarch64-sve-builtins.cc
index 5acc56f99c65..e93c3a78e6d6 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins.cc
+++ b/gcc/config/aarch64/aarch64-sve-builtins.cc
@@ -1032,15 +1032,18 @@ static GTY(()) hash_map
*overload_names[2];
/* Record that TYPE is an ABI-defined SVE type that contains NUM_ZR SVE vectors
and NUM_PR SVE predicates. MANGLED_NAME, if nonnull, is the ABI-defined
- mangling of the type. ACLE_NAME is the name of the type. */
-static void
+ mangling of the type. mangling of the type. ACLE_NAME is the
+ name of the type, or null if does not provide the type. */
+void
add_sve_type_attribute (tree type, unsigned int num_zr, unsigned int num_pr,
const char *mangled_name, const char *acle_name)
{
tree mangled_name_tree
= (mangled_name ? get_identifier (mangled_name) : NULL_TREE);
+ tree acle_name_tree
+= (acle_name ? get_identifier (acle_name) : NULL_TREE);
- tree value = tree_cons (NULL_TREE, get_identifier (acle_name), NULL_TREE);
+ tree value = tree_cons (NULL_TREE, acle_name_tree, NULL_TREE);
value = tree_cons (NULL_TREE, mangled_name_tree, value);
value = tree_cons (NULL_TREE, size_int (num_pr), value);
value = tree_cons (NULL_TREE, size_int (num_zr), value);
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 77a2a6bfa3a3..de4c0a078391 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -29323,7 +29323,7 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct
cgraph_node *node,
int num, bool explicit_p)
{
tree t, ret_type;
- unsigned int nds_elt_bits;
+ unsigned int nds_elt_bits, wds_elt_bits;
unsigned HOST_WIDE_INT const_simdlen;
if (!TARGET_SIMD)
@@ -29368,10 +29368,14 @@ aarch64_simd_clone_compute_vecsize_and_simdlen
(struct cgraph_node *node,
if (TREE_CODE (ret_type) != VOID_TYPE)
{
nds_elt_bits = lane_size (SIMD_CLONE_ARG_TYPE_VECTOR, ret_type);
+ wds_elt_bits = nds_elt_bits;
vec_elts.safe_push (std::make_pair (ret_type, nds_elt_bits));
}
else
-nds_elt_bits = POINT
[gcc r15-6393] AArch64: Implement vector concat of partial SVE vectors [PR96342]
https://gcc.gnu.org/g:89b2c7dc96c4944c306131b665a4738a8a99413e
commit r15-6393-g89b2c7dc96c4944c306131b665a4738a8a99413e
Author: Tamar Christina
Date: Fri Dec 20 14:34:32 2024 +
AArch64: Implement vector concat of partial SVE vectors [PR96342]
This patch adds support for vector constructor from two partial SVE vectors
into
a full SVE vector. It also implements support for the standard vec_init
obtab to
do this.
gcc/ChangeLog:
PR target/96342
* config/aarch64/aarch64-protos.h
(aarch64_sve_expand_vector_init_subvector): New.
* config/aarch64/aarch64-sve.md (vec_init): New.
(@aarch64_pack_partial): New.
* config/aarch64/aarch64.cc
(aarch64_sve_expand_vector_init_subvector): New.
* config/aarch64/iterators.md (SVE_NO2E): New.
(VHALF, Vhalf): Add SVE partial vectors.
gcc/testsuite/ChangeLog:
PR target/96342
* gcc.target/aarch64/vect-simd-clone-2.c: New test.
Diff:
---
gcc/config/aarch64/aarch64-protos.h| 1 +
gcc/config/aarch64/aarch64-sve.md | 23 +
gcc/config/aarch64/aarch64.cc | 24 ++
gcc/config/aarch64/iterators.md| 20 --
.../gcc.target/aarch64/vect-simd-clone-2.c | 13
5 files changed, 79 insertions(+), 2 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-protos.h
b/gcc/config/aarch64/aarch64-protos.h
index 7ab1316cf568..18764e407c13 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -1028,6 +1028,7 @@ rtx aarch64_replace_reg_mode (rtx, machine_mode);
void aarch64_split_sve_subreg_move (rtx, rtx, rtx);
void aarch64_expand_prologue (void);
void aarch64_expand_vector_init (rtx, rtx);
+void aarch64_sve_expand_vector_init_subvector (rtx, rtx);
void aarch64_sve_expand_vector_init (rtx, rtx);
void aarch64_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx,
const_tree, unsigned, bool = false);
diff --git a/gcc/config/aarch64/aarch64-sve.md
b/gcc/config/aarch64/aarch64-sve.md
index a72ca2a500d3..6659bb4fcab3 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -2839,6 +2839,16 @@
}
)
+(define_expand "vec_init"
+ [(match_operand:SVE_NO2E 0 "register_operand")
+ (match_operand 1 "")]
+ "TARGET_SVE"
+ {
+aarch64_sve_expand_vector_init_subvector (operands[0], operands[1]);
+DONE;
+ }
+)
+
;; Shift an SVE vector left and insert a scalar into element 0.
(define_insn "vec_shl_insert_"
[(set (match_operand:SVE_FULL 0 "register_operand")
@@ -9289,6 +9299,19 @@
"uzp1\t%0., %1., %2."
)
+;; Integer partial pack packing two partial SVE types into a single full SVE
+;; type of the same element type. Use UZP1 on the wider type, which discards
+;; the high part of each wide element. This allows to concat SVE partial types
+;; into a wider vector.
+(define_insn "@aarch64_pack_partial"
+ [(set (match_operand:SVE_NO2E 0 "register_operand" "=w")
+ (vec_concat:SVE_NO2E
+ (match_operand: 1 "register_operand" "w")
+ (match_operand: 2 "register_operand" "w")))]
+ "TARGET_SVE"
+ "uzp1\t%0., %1., %2."
+)
+
;; -
;; [INT<-INT] Unpacks
;; -
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index de4c0a078391..41cc2eeec9a4 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -24870,6 +24870,30 @@ aarch64_sve_expand_vector_init (rtx target, rtx vals)
aarch64_sve_expand_vector_init_insert_elems (target, v, nelts);
}
+/* Initialize register TARGET from the two vector subelements in PARALLEL
+ rtx VALS. */
+
+void
+aarch64_sve_expand_vector_init_subvector (rtx target, rtx vals)
+{
+ machine_mode mode = GET_MODE (target);
+ int nelts = XVECLEN (vals, 0);
+
+ gcc_assert (nelts == 2);
+
+ rtx arg0 = XVECEXP (vals, 0, 0);
+ rtx arg1 = XVECEXP (vals, 0, 1);
+
+ /* If we have two elements and are concatting vector. */
+ machine_mode elem_mode = GET_MODE (arg0);
+ gcc_assert (VECTOR_MODE_P (elem_mode));
+
+ arg0 = force_reg (elem_mode, arg0);
+ arg1 = force_reg (elem_mode, arg1);
+ emit_insn (gen_aarch64_pack_partial (mode, target, arg0, arg1));
+ return;
+}
+
/* Check whether VALUE is a vector constant in which every element
is either a power of 2 or a negated power of 2. If so, return
a constant vector of log2s, and flip CODE between PLUS and MINUS
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 89c72b24aeb7..34200b05a3ab 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -140,6 +140,10 @@
;; VQ without 2 element modes.
(define_
[gcc r15-6389] arm: [MVE intrinsics] Fix moves of tuples (PR target/118131)
https://gcc.gnu.org/g:670df03e5294a31efff1554c9a751ef893dc1f71
commit r15-6389-g670df03e5294a31efff1554c9a751ef893dc1f71
Author: Christophe Lyon
Date: Thu Dec 19 16:25:59 2024 +
arm: [MVE intrinsics] Fix moves of tuples (PR target/118131)
Commit r15-6245-g4f4e13dd235b introduced new modes for MVE tuples, but
missed adding support for them in a few places.
Adding them to the list in arm_attr_length_move_neon is not sufficient
since we later face another ICE where the compiler does not know how
to split move of such data.
The patch therefore enhances the define_splits for OI and XI moves in
neon.md, via the introduction of new iterators.
In addition, it seems consistent to update output_move_neon such that
VALID_NEON_*_MODE are used only when TARGET_NEON.
gcc/ChangeLog:
PR target/118131
* config/arm/arm.cc (output_move_neon): Check TARGET_NEON as
needed.
(arm_attr_length_move_neon): Add support for V2x and V4x MVE tuple
modes.
* config/arm/iterators.md (VSTRUCT2, VSTRUCT4): New.
* config/arm/neon.md: Use VSTRUCT2 instead of OI and VSTRUCT4
instead of XI in define_split.
Diff:
---
gcc/config/arm/arm.cc | 25 +++--
gcc/config/arm/iterators.md | 18 ++
gcc/config/arm/neon.md | 8
3 files changed, 41 insertions(+), 10 deletions(-)
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 7ba602afd966..2e1c2f11e613 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -20775,11 +20775,13 @@ output_move_neon (rtx *operands)
nregs = REG_NREGS (reg) / 2;
gcc_assert (VFP_REGNO_OK_FOR_DOUBLE (regno)
|| NEON_REGNO_OK_FOR_QUAD (regno));
- gcc_assert (VALID_NEON_DREG_MODE (mode)
- || VALID_NEON_QREG_MODE (mode)
- || VALID_NEON_STRUCT_MODE (mode)
+ gcc_assert ((TARGET_NEON
+ && (VALID_NEON_DREG_MODE (mode)
+ || VALID_NEON_QREG_MODE (mode)
+ || VALID_NEON_STRUCT_MODE (mode)))
|| (TARGET_HAVE_MVE
- && VALID_MVE_STRUCT_MODE (mode)));
+ && (VALID_MVE_MODE (mode)
+ || VALID_MVE_STRUCT_MODE (mode;
gcc_assert (MEM_P (mem));
addr = XEXP (mem, 0);
@@ -20882,8 +20884,9 @@ output_move_neon (rtx *operands)
return "";
}
-/* Compute and return the length of neon_mov, where is
- one of VSTRUCT modes: EI, OI, CI or XI. */
+/* Compute and return the length of neon_mov, where is one of
+ VSTRUCT modes: EI, OI, CI or XI for Neon, and V2x16QI, V2x8HI, V2x4SI,
+ V2x8HF, V2x4SF, V2x16QI, V2x8HI, V2x4SI, V2x8HF, V2x4SF for MVE. */
int
arm_attr_length_move_neon (rtx_insn *insn)
{
@@ -20900,10 +20903,20 @@ arm_attr_length_move_neon (rtx_insn *insn)
{
case E_EImode:
case E_OImode:
+ case E_V2x16QImode:
+ case E_V2x8HImode:
+ case E_V2x4SImode:
+ case E_V2x8HFmode:
+ case E_V2x4SFmode:
return 8;
case E_CImode:
return 12;
case E_XImode:
+ case E_V4x16QImode:
+ case E_V4x8HImode:
+ case E_V4x4SImode:
+ case E_V4x8HFmode:
+ case E_V4x4SFmode:
return 16;
default:
gcc_unreachable ();
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index cfe712ceda98..6756e29721ca 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -152,6 +152,24 @@
(V4x4SF "TARGET_HAVE_MVE_FLOAT")
])
+;; Structure types of the same size as OImode
+(define_mode_iterator VSTRUCT2 [OI
+ (V2x16QI "TARGET_HAVE_MVE")
+ (V2x8HI "TARGET_HAVE_MVE")
+ (V2x4SI "TARGET_HAVE_MVE")
+ (V2x8HF "TARGET_HAVE_MVE_FLOAT")
+ (V2x4SF "TARGET_HAVE_MVE_FLOAT")
+ ])
+
+;; Structure types of the same size as XImode
+(define_mode_iterator VSTRUCT4 [XI
+ (V4x16QI "TARGET_HAVE_MVE")
+ (V4x8HI "TARGET_HAVE_MVE")
+ (V4x4SI "TARGET_HAVE_MVE")
+ (V4x8HF "TARGET_HAVE_MVE_FLOAT")
+ (V4x4SF "TARGET_HAVE_MVE_FLOAT")
+ ])
+
;; Opaque structure types used in table lookups (except vtbl1/vtbx1).
(define_mode_iterator VTAB [TI EI OI])
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 6892b7b0f44a..cfd8520c2ea1 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -215,8 +215,8 @@
})
(define_split
- [(set (match_operand:OI 0 "s_register_operand" "")
- (match_operand:OI 1 "s_register_operand" ""))]
+ [(set (match_operand:VSTRUCT2 0 "s_register_ope
[gcc r15-6394] i386: Disable SImode/DImode moves from/to mask regs without avx512bw [PR118067]
https://gcc.gnu.org/g:219ddae16f9d724baeff86934f8981aa5ef7b95f
commit r15-6394-g219ddae16f9d724baeff86934f8981aa5ef7b95f
Author: Uros Bizjak
Date: Fri Dec 20 16:16:15 2024 +0100
i386: Disable SImode/DImode moves from/to mask regs without avx512bw
[PR118067]
SImode and DImode moves from/to mask registers are valid only with AVX512BW,
so mark relevant alternatives in *movsi_internal and *movdi_internal as
such.
Even with the patch, the testcase still fails, but now with:
pr118067.c: In function ‘foo’:
pr118067.c:13:1: internal compiler error: maximum number of generated
reload insns per insn achieved (90)
13 | }
| ^
0x2c3b581 internal_error(char const*, ...)
../../git/gcc/gcc/diagnostic-global-context.cc:517
0xb68938 lra_constraints(bool)
../../git/gcc/gcc/lra-constraints.cc:5411
0xb51a0d lra(_IO_FILE*, int)
../../git/gcc/gcc/lra.cc:2449
0xaf9f4d do_reload
../../git/gcc/gcc/ira.cc:5977
0xafa462 execute
../../git/gcc/gcc/ira.cc:6165
PR target/118067
gcc/ChangeLog:
* config/i386/i386.md (*movdi_internal):
Disable alternatives from/to mask registers without AVX512BW.
(*movsi_internal): Ditto.
Diff:
---
gcc/config/i386/i386.md | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6edcb6dc657c..9f26cc274695 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2580,7 +2580,7 @@
[(set (match_operand:DI 0 "nonimmediate_operand"
"=r ,o ,r,r ,r,m ,*y,*y,?*y,?m,?r,?*y,?Yv,?v,?v,m
,m,?jc,?*Yd,?r,?v,?*y,?*x,*k,*k ,*r,*m,*k")
(match_operand:DI 1 "general_operand"
-"riFo,riF,Z,rem,i,re,C ,*y,Bk ,*y,*y,r ,C ,?v,Bk,?v,v,*Yd,jc ,?v,r ,*x
,*y ,*r,*kBk,*k,*k,CBC"))]
+"riFo,riF,Z,rem,i,re,C ,*y,Bk ,*y,*y,r ,C ,?v,Bk,?v,v,*Yd,jc ,?v,r ,*x
,*y ,*r,*kBk,*k,*k,CBC"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
&& ix86_hardreg_mov_ok (operands[0], operands[1])"
{
@@ -2642,12 +2642,16 @@
[(set (attr "isa")
(cond [(eq_attr "alternative" "0,1,17,18")
(const_string "nox64")
- (eq_attr "alternative" "2,3,4,5,10,11,23,25")
+ (eq_attr "alternative" "2,3,4,5,10,11")
(const_string "x64")
(eq_attr "alternative" "19,20")
(const_string "x64_sse2")
+ (eq_attr "alternative" "23,25")
+ (const_string "x64_avx512bw")
(eq_attr "alternative" "21,22")
(const_string "sse2")
+ (eq_attr "alternative" "24,26,27")
+ (const_string "avx512bw")
]
(const_string "*")))
(set (attr "type")
@@ -2816,7 +2820,7 @@
[(set (match_operand:SI 0 "nonimmediate_operand"
"=r,m ,*y,*y,?*y,?m,?r,?*y,?Yv,?v,?v,m ,?r,?v,*k,*k ,*rm,*k")
(match_operand:SI 1 "general_operand"
-"g ,re,C ,*y,Bk ,*y,*y,r ,C ,?v,Bk,?v,?v,r ,*r,*kBk,*k ,CBC"))]
+"g ,re,C ,*y,Bk ,*y,*y,r ,C ,?v,Bk,?v,?v,r ,*r,*kBk,*k ,CBC"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
&& ix86_hardreg_mov_ok (operands[0], operands[1])"
{
@@ -2870,6 +2874,8 @@
[(set (attr "isa")
(cond [(eq_attr "alternative" "12,13")
(const_string "sse2")
+ (eq_attr "alternative" "14,15,16,17")
+ (const_string "avx512bw")
]
(const_string "*")))
(set (attr "type")
[gcc r15-6398] avoid trying to set block in barriers [PR113506]
https://gcc.gnu.org/g:e7108c34a3685eaf9edd3b1fefbd3645b9bd8def
commit r15-6398-ge7108c34a3685eaf9edd3b1fefbd3645b9bd8def
Author: Alexandre Oliva
Date: Fri Dec 20 18:01:53 2024 -0300
avoid trying to set block in barriers [PR113506]
When we emit a sequence before a preexisting insn and naming a BB to
store in the insns, we will attempt to store the BB even in barriers
present in the sequence.
Barriers don't expect blocks, and rtl checking catches the problem.
When emitting after a preexisting insn, we skip the block setting in
barriers. Change the before emitter to do so as well.
for gcc/ChangeLog
PR middle-end/113506
* emit-rtl.cc (add_insn_before): Don't set the block of a
barrier.
for gcc/testsuite/ChangeLog
PR middle-end/113506
* gcc.target/riscv/pr113506.c: New.
Diff:
---
gcc/emit-rtl.cc | 6 --
gcc/testsuite/gcc.target/riscv/pr113506.c | 15 +++
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/gcc/emit-rtl.cc b/gcc/emit-rtl.cc
index a556692e8a02..3af6849a29bc 100644
--- a/gcc/emit-rtl.cc
+++ b/gcc/emit-rtl.cc
@@ -4369,9 +4369,11 @@ add_insn_before (rtx_insn *insn, rtx_insn *before,
basic_block bb)
{
add_insn_before_nobb (insn, before);
+ if (BARRIER_P (insn))
+return;
+
if (!bb
- && !BARRIER_P (before)
- && !BARRIER_P (insn))
+ && !BARRIER_P (before))
bb = BLOCK_FOR_INSN (before);
if (bb)
diff --git a/gcc/testsuite/gcc.target/riscv/pr113506.c
b/gcc/testsuite/gcc.target/riscv/pr113506.c
new file mode 100644
index ..404dda9fd532
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr113506.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-fchecking=1 -Os -fno-tree-coalesce-vars -finline-stringops"
} */
+
+typedef unsigned v32su __attribute__((vector_size (32)));
+
+v32su foo_v32su_4;
+
+unsigned
+foo (v32su v32su_2)
+{
+ v32su_2 *= v32su_2;
+ if (foo_v32su_4[3])
+v32su_2 &= (v32su){};
+ return v32su_2[1];
+}
[gcc r15-6399] strub: accept indirection of volatile pointer types [PR118007]
https://gcc.gnu.org/g:09dd47bc383f30f1ba03ec80f8bd849eb6283d29
commit r15-6399-g09dd47bc383f30f1ba03ec80f8bd849eb6283d29
Author: Alexandre Oliva
Date: Fri Dec 20 18:02:01 2024 -0300
strub: accept indirection of volatile pointer types [PR118007]
We don't want to indirect pointers in strub wrappers, because it
generally isn't profitable, but if the argument is volatile, then we
must use indirection to preserve access patterns, so amend the
assertion check.
for gcc/ChangeLog
PR middle-end/118007
* ipa-strub.cc (pass_ipa_strub::execute): Accept indirecting
volatile args of pointer types.
for gcc/testsuite/ChangeLog
PR middle-end/118007
* gcc.dg/strub-pr118007.c: New.
Diff:
---
gcc/ipa-strub.cc | 13 +++--
gcc/testsuite/gcc.dg/strub-pr118007.c | 5 +
2 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/gcc/ipa-strub.cc b/gcc/ipa-strub.cc
index 29ba143b4620..6b3f5b078f29 100644
--- a/gcc/ipa-strub.cc
+++ b/gcc/ipa-strub.cc
@@ -2881,12 +2881,13 @@ pass_ipa_strub::execute (function *)
&& (tree_to_uhwi (TYPE_SIZE_UNIT (TREE_TYPE (nparm)))
<= 4 * UNITS_PER_WORD
{
- /* No point in indirecting pointer types. Presumably they
-won't ever pass the size-based test above, but check the
-assumption here, because getting this wrong would mess
-with attribute access and possibly others. We deal with
-fn spec below. */
- gcc_checking_assert (!POINTER_TYPE_P (TREE_TYPE (nparm)));
+ /* No point in indirecting pointer types, unless they're
+volatile. Presumably they won't ever pass the size-based
+test above, but check the assumption here, because
+getting this wrong would mess with attribute access and
+possibly others. We deal with fn spec below. */
+ gcc_checking_assert (!POINTER_TYPE_P (TREE_TYPE (nparm))
+ || TREE_THIS_VOLATILE (parm));
indirect_nparms.add (nparm);
diff --git a/gcc/testsuite/gcc.dg/strub-pr118007.c
b/gcc/testsuite/gcc.dg/strub-pr118007.c
new file mode 100644
index ..6c24cad65296
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/strub-pr118007.c
@@ -0,0 +1,5 @@
+/* { dg-require-effective-target strub } */
+/* { dg-do compile } */
+/* { dg-options "-fstrub=all -O2" } */
+
+void rb_ec_error_print(struct rb_execution_context_struct *volatile) {}
[gcc r15-6400] Fortran: Clean up -funderscoring and -fsecond-underscore docs [PR51820]
https://gcc.gnu.org/g:53ddfbaede0db07843529f41b50133a815a1d90a
commit r15-6400-g53ddfbaede0db07843529f41b50133a815a1d90a
Author: Sandra Loosemore
Date: Thu Dec 19 00:43:11 2024 +
Fortran: Clean up -funderscoring and -fsecond-underscore docs [PR51820]
This is a long-standing documentation bug in the Fortran manual,
initially reported in 2012 as PR51820, with a quick fix applied later
for PR109216. The patch here incorporates more of the discussion from
the original issue.
gcc/fortran/ChangeLog
PR fortran/51820
PR fortran/89632
PR fortran/109216
* invoke.texi (Code Gen Options): Further cleanups of the discussion
of what -funderscoring and -fsecond-underscore do.
Diff:
---
gcc/fortran/invoke.texi | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/gcc/fortran/invoke.texi b/gcc/fortran/invoke.texi
index ff4040732d85..f88a9b8252f7 100644
--- a/gcc/fortran/invoke.texi
+++ b/gcc/fortran/invoke.texi
@@ -1664,6 +1664,8 @@ source file by appending underscores to them.
With @option{-funderscoring} in effect, GNU Fortran appends one
underscore to external names. This is done to ensure
compatibility with code produced by many UNIX Fortran compilers.
+Note this does not apply to names declared with C binding, or within
+a module.
@emph{Caution}: The default behavior of GNU Fortran is
incompatible with @command{f2c} and @command{g77}, please use the
@@ -1678,12 +1680,12 @@ and so on).
For example, with @option{-funderscoring}, and assuming that @code{j()} and
@code{max_count()} are external functions while @code{my_var} and
-@code{lvar} are local variables, a statement like
+@code{lvar} are local variables, a Fortran statement like
@smallexample
I = J() + MAX_COUNT (MY_VAR, LVAR)
@end smallexample
@noindent
-is implemented as something akin to:
+is implemented as something akin to the C code:
@smallexample
i = j_() + max_count_(&my_var, &lvar);
@end smallexample
@@ -1715,11 +1717,10 @@ could make finding unresolved-reference bugs quite
difficult in some
cases---they might occur at program run time, and show up only as
buggy behavior at run time.
-In future versions of GNU Fortran we hope to improve naming and linking
-issues so that debugging always involves using the names as they appear
-in the source, even if the names as seen by the linker are mangled to
-prevent accidental linking between procedures with incompatible
-interfaces.
+@xref{Naming and argument-passing conventions}, for more information.
+Also note that declaring symbols as @code{bind(C)} is a more robust way to
+interface with code written in other languages or compiled with different
+Fortran compilers than the command-line options documented in this section.
@opindex fsecond-underscore
@cindex underscore
@@ -1731,21 +1732,19 @@ interfaces.
@cindex libf2c calling convention
@item -fsecond-underscore
By default, GNU Fortran appends an underscore to external
-names. If this option is used GNU Fortran appends two
-underscores to names with underscores and one underscore to external names
-with no underscores. GNU Fortran also appends two underscores to
-internal names with underscores to avoid naming collisions with external
-names.
+names. If this option is used, GNU Fortran appends two
+underscores to names with underscores and one underscore to names
+with no underscores.
-This option has no effect if @option{-fno-underscoring} is
-in effect. It is implied by the @option{-ff2c} option.
-
-Otherwise, with this option, an external name such as @code{MAX_COUNT}
+For example, an external name such as @code{MAX_COUNT}
is implemented as a reference to the link-time external symbol
@code{max_count__}, instead of @code{max_count_}. This is required
for compatibility with @command{g77} and @command{f2c}, and is implied
by use of the @option{-ff2c} option.
+This option has no effect if @option{-fno-underscoring} is
+in effect. It is implied by the @option{-ff2c} option.
+
@opindex fcoarray
@cindex coarrays
@item -fcoarray=@var{}
[gcc r15-6405] Fix compilation error in vmsdbgout_begin_block on VMS targets
https://gcc.gnu.org/g:0b63840e07132f727ca3fae1e0aa7255bacb8446
commit r15-6405-g0b63840e07132f727ca3fae1e0aa7255bacb8446
Author: Mark Harmstone
Date: Fri Dec 20 02:29:21 2024 +
Fix compilation error in vmsdbgout_begin_block on VMS targets
Commit 4ed189854eae ("Add block parameter to begin_block debug hook")
changed
the definition of the begin_block function pointer to add another parameter,
but I missed a call in vmsdbgout_begin_block.
Fixes bug #118123.
gcc/
* vmsdbgout.cc (vmsdbgout_begin_block): Fix compilation error.
Diff:
---
gcc/vmsdbgout.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/vmsdbgout.cc b/gcc/vmsdbgout.cc
index d9e6a8b7b74b..204e5695d39d 100644
--- a/gcc/vmsdbgout.cc
+++ b/gcc/vmsdbgout.cc
@@ -1231,10 +1231,10 @@ vmsdbgout_end_epilogue (unsigned int line, const char
*file)
static void
vmsdbgout_begin_block (unsigned line, unsigned blocknum,
- tree block ATTRIBUTE_UNUSED)
+ tree block)
{
if (write_symbols == VMS_AND_DWARF2_DEBUG)
-(*dwarf2_debug_hooks.begin_block) (line, blocknum);
+(*dwarf2_debug_hooks.begin_block) (line, blocknum, block);
if (debug_info_level > DINFO_LEVEL_TERSE)
targetm.asm_out.internal_label (asm_out_file, BLOCK_BEGIN_LABEL, blocknum);
