[gcc r15-4881] Preserve ->move_dr behavior when adjusting epilogue info

[Richard Biener via Gcc-cvs]

https://gcc.gnu.org/g:223da6ac40cdd425ae16b787e2ca758ea665b75f

commit r15-4881-g223da6ac40cdd425ae16b787e2ca758ea665b75f
Author: Richard Biener 
Date:   Thu Oct 31 11:51:16 2024 +0100

Preserve ->move_dr behavior when adjusting epilogue info

When update_epilogue_loop_vinfo relates the shared loop DRs with
the epilogue stmts and infos it should not fiddle with how
pattern recognition applied move_dr.

* tree-vect-loop.cc (update_epilogue_loop_vinfo): A DRs
main stmt vinfo dr_aux should refer to a pattern stmt
which is how move_dr sets this up.  We shouldn't undo this.

Diff:
---
 gcc/tree-vect-loop.cc | 1 -
 1 file changed, 1 deletion(-)

diff --git a/gcc/tree-vect-loop.cc b/gcc/tree-vect-loop.cc
index 7ed3a56bc680..dd18ec9ff175 100644
--- a/gcc/tree-vect-loop.cc
+++ b/gcc/tree-vect-loop.cc
@@ -12291,7 +12291,6 @@ update_epilogue_loop_vinfo (class loop *epilogue, tree 
advance)
 &find_in_mapping, &mapping);
}
   DR_STMT (dr) = STMT_VINFO_STMT (stmt_vinfo);
-  stmt_vinfo->dr_aux.stmt = stmt_vinfo;
 }
 
   epilogue_vinfo->shared->datarefs_copy.release ();

[gcc r15-4883] libstdc++: Fix up 117406.cc test [PR117406]

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:afcbf4dd27c147eb7d8f84e1a41c021eddec777e

commit r15-4883-gafcbf4dd27c147eb7d8f84e1a41c021eddec777e
Author: Jakub Jelinek 
Date:   Mon Nov 4 12:29:01 2024 +0100

libstdc++: Fix up 117406.cc test [PR117406]

Christophe mentioned in bugzilla that the test FAILs on aarch64,
I'm not including  and use INT_MAX.
Apparently during my testing I got it because the test preinclude
-include bits/stdc++.h
and that includes , dunno why that didn't happen on aarch64.
In any case, either I can add #include , or because the
test already has #include  I've changed uses of INT_MAX
with std::numeric_limits::max(), that should be the same thing.
But if you prefer
 #include 
I can surely add that instead.

2024-11-04  Jakub Jelinek  

PR libstdc++/117406
* testsuite/26_numerics/headers/cmath/117406.cc: Use
std::numeric_limits::max() instead of INT_MAX.

Diff:
---
 libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc 
b/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc
index 8966c71ecdcb..59a5ed83bebc 100644
--- a/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc
+++ b/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc
@@ -31,9 +31,9 @@ test ()
   int t0 = std::ilogb(T(4.0));
   VERIFY( t0 == 2 );
   int t1 = std::ilogb(lim::infinity());
-  VERIFY( t1 == INT_MAX );
+  VERIFY( t1 == std::numeric_limits::max() );
   int t2 = std::ilogb(-lim::infinity());
-  VERIFY( t2 == INT_MAX );
+  VERIFY( t2 == std::numeric_limits::max() );
 }
 
 int

[gcc r15-4882] Move vect_update_inits_of_drs

[Richard Biener via Gcc-cvs]

https://gcc.gnu.org/g:2e6d9e9f4a0db49376b1435bb6b9c5ac1badf13d

commit r15-4882-g2e6d9e9f4a0db49376b1435bb6b9c5ac1badf13d
Author: Richard Biener 
Date:   Thu Oct 31 12:58:02 2024 +0100

Move vect_update_inits_of_drs

Move vect_update_inits_of_drs to after setting up the epilog
metadata.

* tree-vect-loop.cc (update_epilogue_loop_vinfo): Update
DR inits after adjusting the epilog metadata.

Diff:
---
 gcc/tree-vect-loop.cc | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/gcc/tree-vect-loop.cc b/gcc/tree-vect-loop.cc
index dd18ec9ff175..e6d241482ce3 100644
--- a/gcc/tree-vect-loop.cc
+++ b/gcc/tree-vect-loop.cc
@@ -12166,11 +12166,6 @@ update_epilogue_loop_vinfo (class loop *epilogue, tree 
advance)
   LOOP_VINFO_BBS (epilogue_vinfo) = epilogue_bbs;
   LOOP_VINFO_NBBS (epilogue_vinfo) = epilogue->num_nodes;
 
-  /* Advance data_reference's with the number of iterations of the previous
- loop and its prologue.  */
-  vect_update_inits_of_drs (epilogue_vinfo, advance, PLUS_EXPR);
-
-
   /* The EPILOGUE loop is a copy of the original loop so they share the same
  gimple UIDs.  In this loop we update the loop_vec_info of the EPILOGUE to
  point to the copied statements.  We also create a mapping of all LHS' in
@@ -12293,6 +12288,10 @@ update_epilogue_loop_vinfo (class loop *epilogue, tree 
advance)
   DR_STMT (dr) = STMT_VINFO_STMT (stmt_vinfo);
 }
 
+  /* Advance data_reference's with the number of iterations of the previous
+ loop and its prologue.  */
+  vect_update_inits_of_drs (epilogue_vinfo, advance, PLUS_EXPR);
+
   epilogue_vinfo->shared->datarefs_copy.release ();
   epilogue_vinfo->shared->save_datarefs ();
 }

[gcc r14-10873] libstdc++: Fix up std::{, b}float16_t std::{ilogb, l{, l}r{ound, int}} [PR117406]

[Jakub Jelinek via Libstdc++-cvs]

https://gcc.gnu.org/g:377f81a60ba78dde6c59bc40af46ef8ad3569693

commit r14-10873-g377f81a60ba78dde6c59bc40af46ef8ad3569693
Author: Jakub Jelinek 
Date:   Sat Nov 2 18:48:54 2024 +0100

libstdc++: Fix up std::{,b}float16_t std::{ilogb,l{,l}r{ound,int}} 
[PR117406]

These overloads incorrectly cast the result of the float __builtin_*
to _Float or __gnu_cxx::__bfloat16_t.  For std::ilogb that changes
behavior for the INT_MAX return because that isn't representable in
either of the floating point formats, for the others it is I think
just a very inefficient hop from int/long/long long to std::{,b}float16_t
and back.  I mean for the round/rint cases, either the argument is small
and then the return value should be representable in the floating point
format too, or it is too large that the argument is already integral
and then it should just return the argument with the round trips.
Too large value is unspecified unlike ilogb.

2024-11-02  Jakub Jelinek  

PR libstdc++/117406
* include/c_global/cmath (std::ilogb(_Float16), 
std::llrint(_Float16),
std::llround(_Float16), std::lrint(_Float16), 
std::lround(_Float16)):
Don't cast __builtin_* return to _Float16.
(std::ilogb(__gnu_cxx::__bfloat16_t),
std::llrint(__gnu_cxx::__bfloat16_t),
std::llround(__gnu_cxx::__bfloat16_t),
std::lrint(__gnu_cxx::__bfloat16_t),
std::lround(__gnu_cxx::__bfloat16_t)): Don't cast __builtin_* 
return to
__gnu_cxx::__bfloat16_t.
* testsuite/26_numerics/headers/cmath/117406.cc: New test.

(cherry picked from commit 36a9e2b22596711455e702ea5a5a3f26e145321c)

Diff:
---
 libstdc++-v3/include/c_global/cmath| 20 
 .../testsuite/26_numerics/headers/cmath/117406.cc  | 59 ++
 2 files changed, 69 insertions(+), 10 deletions(-)

diff --git a/libstdc++-v3/include/c_global/cmath 
b/libstdc++-v3/include/c_global/cmath
index c5ebebd6b861..114b0693151e 100644
--- a/libstdc++-v3/include/c_global/cmath
+++ b/libstdc++-v3/include/c_global/cmath
@@ -2831,7 +2831,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   constexpr int
   ilogb(_Float16 __x)
-  { return _Float16(__builtin_ilogbf(__x)); }
+  { return __builtin_ilogbf(__x); }
 
   constexpr _Float16
   lgamma(_Float16 __x)
@@ -2839,11 +2839,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   constexpr long long
   llrint(_Float16 __x)
-  { return _Float16(__builtin_llrintf(__x)); }
+  { return __builtin_llrintf(__x); }
 
   constexpr long long
   llround(_Float16 __x)
-  { return _Float16(__builtin_llroundf(__x)); }
+  { return __builtin_llroundf(__x); }
 
   constexpr _Float16
   log1p(_Float16 __x)
@@ -2860,11 +2860,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   constexpr long
   lrint(_Float16 __x)
-  { return _Float16(__builtin_lrintf(__x)); }
+  { return __builtin_lrintf(__x); }
 
   constexpr long
   lround(_Float16 __x)
-  { return _Float16(__builtin_lroundf(__x)); }
+  { return __builtin_lroundf(__x); }
 
   constexpr _Float16
   nearbyint(_Float16 __x)
@@ -3553,7 +3553,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   constexpr int
   ilogb(__gnu_cxx::__bfloat16_t __x)
-  { return __gnu_cxx::__bfloat16_t(__builtin_ilogbf(__x)); }
+  { return __builtin_ilogbf(__x); }
 
   constexpr __gnu_cxx::__bfloat16_t
   lgamma(__gnu_cxx::__bfloat16_t __x)
@@ -3561,11 +3561,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   constexpr long long
   llrint(__gnu_cxx::__bfloat16_t __x)
-  { return __gnu_cxx::__bfloat16_t(__builtin_llrintf(__x)); }
+  { return __builtin_llrintf(__x); }
 
   constexpr long long
   llround(__gnu_cxx::__bfloat16_t __x)
-  { return __gnu_cxx::__bfloat16_t(__builtin_llroundf(__x)); }
+  { return __builtin_llroundf(__x); }
 
   constexpr __gnu_cxx::__bfloat16_t
   log1p(__gnu_cxx::__bfloat16_t __x)
@@ -3582,11 +3582,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   constexpr long
   lrint(__gnu_cxx::__bfloat16_t __x)
-  { return __gnu_cxx::__bfloat16_t(__builtin_lrintf(__x)); }
+  { return __builtin_lrintf(__x); }
 
   constexpr long
   lround(__gnu_cxx::__bfloat16_t __x)
-  { return __gnu_cxx::__bfloat16_t(__builtin_lroundf(__x)); }
+  { return __builtin_lroundf(__x); }
 
   constexpr __gnu_cxx::__bfloat16_t
   nearbyint(__gnu_cxx::__bfloat16_t __x)
diff --git a/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc 
b/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc
new file mode 100644
index ..8966c71ecdcb
--- /dev/null
+++ b/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc
@@ -0,0 +1,59 @@
+// Copyright (C) 2024 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This 

[gcc r14-10874] libstdc++: Fix up 117406.cc test [PR117406]

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:72b7bbf9d4482fac6bac81508833e407201e0733

commit r14-10874-g72b7bbf9d4482fac6bac81508833e407201e0733
Author: Jakub Jelinek 
Date:   Mon Nov 4 12:29:01 2024 +0100

libstdc++: Fix up 117406.cc test [PR117406]

Christophe mentioned in bugzilla that the test FAILs on aarch64,
I'm not including  and use INT_MAX.
Apparently during my testing I got it because the test preinclude
-include bits/stdc++.h
and that includes , dunno why that didn't happen on aarch64.
In any case, either I can add #include , or because the
test already has #include  I've changed uses of INT_MAX
with std::numeric_limits::max(), that should be the same thing.
But if you prefer
 #include 
I can surely add that instead.

2024-11-04  Jakub Jelinek  

PR libstdc++/117406
* testsuite/26_numerics/headers/cmath/117406.cc: Use
std::numeric_limits::max() instead of INT_MAX.

(cherry picked from commit afcbf4dd27c147eb7d8f84e1a41c021eddec777e)

Diff:
---
 libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc 
b/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc
index 8966c71ecdcb..59a5ed83bebc 100644
--- a/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc
+++ b/libstdc++-v3/testsuite/26_numerics/headers/cmath/117406.cc
@@ -31,9 +31,9 @@ test ()
   int t0 = std::ilogb(T(4.0));
   VERIFY( t0 == 2 );
   int t1 = std::ilogb(lim::infinity());
-  VERIFY( t1 == INT_MAX );
+  VERIFY( t1 == std::numeric_limits::max() );
   int t2 = std::ilogb(-lim::infinity());
-  VERIFY( t2 == INT_MAX );
+  VERIFY( t2 == std::numeric_limits::max() );
 }
 
 int

[gcc r14-10870] libstdc++: Use if consteval rather than if (std::__is_constant_evaluated()) for {, b}float16_t nextaf

[Jakub Jelinek via Libstdc++-cvs]

https://gcc.gnu.org/g:ec43369c7e2c4b930a501252fa048df51c141970

commit r14-10870-gec43369c7e2c4b930a501252fa048df51c141970
Author: Jakub Jelinek 
Date:   Tue Oct 29 11:14:12 2024 +0100

libstdc++: Use if consteval rather than if (std::__is_constant_evaluated()) 
for {,b}float16_t nextafter [PR117321]

The nextafter_c++23.cc testcase fails to link at -O0.
The problem is that eventhough std::__is_constant_evaluated() has
always_inline attribute, that at -O0 just means that we inline the
call, but its result is still assigned to a temporary which is tested
later, nothing at -O0 propagates that false into the if and optimizes
away the if body.  And the __builtin_nextafterf16{,b} calls are meant
to be used solely for constant evaluation, the C libraries don't
define nextafterf16 these days.

As __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__ are predefined right
now only by GCC, not by clang which doesn't implement the extended floating
point types paper, and as they are predefined in C++23 and later modes only,
I think we can just use if consteval which is folded already during the FE
and the body isn't included even at -O0.  I've added a feature test for
that just in case clang implements those and implements those in some weird
way.  Note, if (__builtin_is_constant_evaluted()) would work correctly too,
that is also folded to false at gimplification time and the corresponding
if block not emitted at all.  But for -O0 it can't be wrapped into a helper
inline function.

2024-10-29  Jakub Jelinek  

PR libstdc++/117321
* include/c_global/cmath (nextafter(_Float16, _Float16)): Use
if consteval rather than if (std::__is_constant_evaluated()) around
the __builtin_nextafterf16 call.
(nextafter(__gnu_cxx::__bfloat16_t, __gnu_cxx::__bfloat16_t)): Use
if consteval rather than if (std::__is_constant_evaluated()) around
the __builtin_nextafterf16b call.
* testsuite/26_numerics/headers/cmath/117321.cc: New test.

(cherry picked from commit 5e247ac0c28b9a2662f99c4a5420c5f7c2d0c6bd)

Diff:
---
 libstdc++-v3/include/c_global/cmath  | 16 
 .../testsuite/26_numerics/headers/cmath/117321.cc|  5 +
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/libstdc++-v3/include/c_global/cmath 
b/libstdc++-v3/include/c_global/cmath
index dd0174f1987f..c5ebebd6b861 100644
--- a/libstdc++-v3/include/c_global/cmath
+++ b/libstdc++-v3/include/c_global/cmath
@@ -2873,8 +2873,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   constexpr _Float16
   nextafter(_Float16 __x, _Float16 __y)
   {
-if (std::__is_constant_evaluated())
-  return __builtin_nextafterf16(__x, __y);
+#if __cpp_if_consteval >= 202106L
+// Can't use if (std::__is_constant_evaluated()) here, as it
+// doesn't guarantee optimizing the body away at -O0 and
+// nothing defines nextafterf16.
+if consteval { return __builtin_nextafterf16(__x, __y); }
+#endif
 #ifdef __INT16_TYPE__
 using __float16_int_type = __INT16_TYPE__;
 #else
@@ -3591,8 +3595,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   constexpr __gnu_cxx::__bfloat16_t
   nextafter(__gnu_cxx::__bfloat16_t __x, __gnu_cxx::__bfloat16_t __y)
   {
-if (std::__is_constant_evaluated())
-  return __builtin_nextafterf16b(__x, __y);
+#if __cpp_if_consteval >= 202106L
+// Can't use if (std::__is_constant_evaluated()) here, as it
+// doesn't guarantee optimizing the body away at -O0 and
+// nothing defines nextafterf16b.
+if consteval { return __builtin_nextafterf16b(__x, __y); }
+#endif
 #ifdef __INT16_TYPE__
 using __bfloat16_int_type = __INT16_TYPE__;
 #else
diff --git a/libstdc++-v3/testsuite/26_numerics/headers/cmath/117321.cc 
b/libstdc++-v3/testsuite/26_numerics/headers/cmath/117321.cc
new file mode 100644
index ..18d108c6a3e2
--- /dev/null
+++ b/libstdc++-v3/testsuite/26_numerics/headers/cmath/117321.cc
@@ -0,0 +1,5 @@
+// { dg-do run { target c++23 } }
+// { dg-require-cmath "" }
+// { dg-additional-options "-O0" }
+
+#include "nextafter_c++23.cc"

[gcc r15-4885] aarch64: Fix incorrect LS64 documentation

[Richard Sandiford via Gcc-cvs]

https://gcc.gnu.org/g:cdd87f473fb3bff499dd641b2042275ed680b73b

commit r15-4885-gcdd87f473fb3bff499dd641b2042275ed680b73b
Author: Richard Sandiford 
Date:   Mon Nov 4 12:23:24 2024 +

aarch64: Fix incorrect LS64 documentation

As Yuta Mukai pointed out, the manual wrongly said that LS64 is
enabled by default for Armv8.7-A and above, and for Armv9.2-A
and above.  LS64 is not mandatory at any architecture level
(and the code correctly implemented that).

I think this was a leftover from an early version of the spec.

gcc/
* doc/invoke.texi: Fix documentation of LS64 so that it's
not implied by Armv8.7-A or Armv9.2-A.

Diff:
---
 gcc/doc/invoke.texi | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 28ef2cde43d3..7146163d66d0 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21443,12 +21443,12 @@ and the features that they enable by default:
 @item @samp{armv8.4-a} @tab Armv8.4-A @tab @samp{armv8.3-a}, @samp{+flagm}, 
@samp{+fp16fml}, @samp{+dotprod}
 @item @samp{armv8.5-a} @tab Armv8.5-A @tab @samp{armv8.4-a}, @samp{+sb}, 
@samp{+ssbs}, @samp{+predres}
 @item @samp{armv8.6-a} @tab Armv8.6-A @tab @samp{armv8.5-a}, @samp{+bf16}, 
@samp{+i8mm}
-@item @samp{armv8.7-a} @tab Armv8.7-A @tab @samp{armv8.6-a}, @samp{+ls64}
+@item @samp{armv8.7-a} @tab Armv8.7-A @tab @samp{armv8.6-a}
 @item @samp{armv8.8-a} @tab Armv8.8-a @tab @samp{armv8.7-a}, @samp{+mops}
 @item @samp{armv8.9-a} @tab Armv8.9-a @tab @samp{armv8.8-a}
 @item @samp{armv9-a} @tab Armv9-A @tab @samp{armv8.5-a}, @samp{+sve}, 
@samp{+sve2}
 @item @samp{armv9.1-a} @tab Armv9.1-A @tab @samp{armv9-a}, @samp{+bf16}, 
@samp{+i8mm}
-@item @samp{armv9.2-a} @tab Armv9.2-A @tab @samp{armv9.1-a}, @samp{+ls64}
+@item @samp{armv9.2-a} @tab Armv9.2-A @tab @samp{armv9.1-a}
 @item @samp{armv9.3-a} @tab Armv9.3-A @tab @samp{armv9.2-a}, @samp{+mops}
 @item @samp{armv9.4-a} @tab Armv9.4-A @tab @samp{armv9.3-a}
 @item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r}
@@ -21773,7 +21773,6 @@ default for @option{-march=armv8.6-a}.  Use of this 
option with architectures
 prior to Armv8.2-A is not supported.
 @item ls64
 Enable the 64-byte atomic load and store instructions for accelerators.
-This option is enabled by default for @option{-march=armv8.7-a}.
 @item mops
 Enable the instructions to accelerate memory operations like @code{memcpy},
 @code{memmove}, @code{memset}.  This option is enabled by default for

[gcc r15-4884] aarch64: Add support for FUJITSU-MONAKA (-mcpu=fujitsu-monaka) CPU

[Richard Sandiford via Gcc-cvs]

https://gcc.gnu.org/g:d413a2c4ecb8fc851e3cffe856e5882028849f9a

commit r15-4884-gd413a2c4ecb8fc851e3cffe856e5882028849f9a
Author: Yuta Mukai 
Date:   Mon Nov 4 12:23:24 2024 +

aarch64: Add support for FUJITSU-MONAKA (-mcpu=fujitsu-monaka) CPU

This patch adds initial support for FUJITSU-MONAKA CPU.
The cost model will be corrected in the future.

2024-11-04  Yuta Mukai  

gcc/ChangeLog:

* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add 
fujitsu-monaka.
* config/aarch64/aarch64-tune.md: Regenerate.
* config/aarch64/aarch64.cc: Include fujitsu-monaka tuning model.
* doc/invoke.texi: Document -mcpu=fujitsu-monaka.
* config/aarch64/tuning_models/fujitsu_monaka.h: New file.

Diff:
---
 gcc/config/aarch64/aarch64-cores.def  |  1 +
 gcc/config/aarch64/aarch64-tune.md|  2 +-
 gcc/config/aarch64/aarch64.cc |  1 +
 gcc/config/aarch64/tuning_models/fujitsu_monaka.h | 65 +++
 gcc/doc/invoke.texi   |  2 +-
 5 files changed, 69 insertions(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-cores.def 
b/gcc/config/aarch64/aarch64-cores.def
index cc2260036887..9d4abf222435 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -132,6 +132,7 @@ AARCH64_CORE("octeontx2f95mm", octeontx2f95mm, cortexa57, 
V8_2A,  (CRYPTO, PROFI
 
 /* Fujitsu ('F') cores. */
 AARCH64_CORE("a64fx", a64fx, a64fx, V8_2A,  (F16, SVE), a64fx, 0x46, 0x001, -1)
+AARCH64_CORE("fujitsu-monaka", fujitsu_monaka, cortexa57, V9_3A, (F16, FP8, 
LS64, RNG, CRYPTO, SVE2_AES, SVE2_BITPERM, SVE2_SHA3, SVE2_SM4), 
fujitsu_monaka, 0x46, 0x003, -1)
 
 /* HiSilicon ('H') cores. */
 AARCH64_CORE("tsv110",  tsv110, tsv110, V8_2A,  (CRYPTO, F16), tsv110,   0x48, 
0xd01, -1)
diff --git a/gcc/config/aarch64/aarch64-tune.md 
b/gcc/config/aarch64/aarch64-tune.md
index 4fce0c507f6c..4423a99f3afe 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-   
"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexa720,cortexa725,cortexx2,cortexx3,cortexx4,cortexx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,neoversev3ae,demeter,generic,generic_armv8_a,generic_armv9_a"
+   
"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,fujitsu_monaka,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexa720,cortexa725,cortexx2,cortexx3,cortexx4,cortexx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,neoversev3ae,demeter,generic,generic_armv8_a,generic_armv9_a"
(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 00f99d5004ca..9347e06f0e9e 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -426,6 +426,7 @@ static const struct aarch64_flag_desc 
aarch64_tuning_flags[] =
 #include "tuning_models/neoversev3.h"
 #include "tuning_models/neoversev3ae.h"
 #include "tuning_models/a64fx.h"
+#include "tuning_models/fujitsu_monaka.h"
 
 /* Support for fine-grained override of the tuning structures.  */
 struct aarch64_tuning_override_function
diff --git a/gcc/config/aarch64/tuning_models/fujitsu_monaka.h 
b/gcc/config/aarch64/tuning_models/fujitsu_monaka.h
new file mode 100644
index ..c3a1e0620e2f
--- /dev/null
+++ b/gcc/config/aarch64/tuning_models/fujitsu_monaka.h
@@ -0,0 +1,65 @@
+/* Tuning model descrip

[gcc r14-10871] function: Call do_pending_stack_adjust in assign_parms [PR117296]

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:82285392ab5cd1d83b8f4a92f521d3323c5996e7

commit r14-10871-g82285392ab5cd1d83b8f4a92f521d3323c5996e7
Author: Jakub Jelinek 
Date:   Wed Oct 30 09:59:22 2024 +0100

function: Call do_pending_stack_adjust in assign_parms [PR117296]

Functions called by assign_parms call emit_block_move in two places,
so on some targets can be expanded as calls and can result in pending
stack adjustment.

Now, during expansion we normally call do_pending_stack_adjust at the end
of expansion of each basic block or before emitting code that will branch
and/or has labels, and when emitting labels we assert that there are no
pending stack adjustments.

assign_parms is expanded before the first basic block and if the first
basic block starts with a label and at least one of those emit_block_move
calls resulted in the need of pending stack adjustments, we ICE when
emitting that label.

The following patch fixes that by calling do_pending_stack_adjust after
after the assign_parms potential emit_block_move calls.

2024-10-30  Jakub Jelinek  

PR target/117296
* function.cc (assign_parms): Call do_pending_stack_adjust.

* gcc.target/i386/pr117296.c: New test.

(cherry picked from commit fccef0c4ed0119ac53940bdb3838052339cf14a2)

Diff:
---
 gcc/function.cc  |  2 ++
 gcc/testsuite/gcc.target/i386/pr117296.c | 12 
 2 files changed, 14 insertions(+)

diff --git a/gcc/function.cc b/gcc/function.cc
index 4edd4da12474..05aa52d8f6a6 100644
--- a/gcc/function.cc
+++ b/gcc/function.cc
@@ -3746,6 +3746,8 @@ assign_parms (tree fndecl)
  now that all parameters have been copied out of hard registers.  */
   emit_insn (all.first_conversion_insn);
 
+  do_pending_stack_adjust ();
+
   /* Estimate reload stack alignment from scalar return mode.  */
   if (SUPPORTS_STACK_ALIGNMENT)
 {
diff --git a/gcc/testsuite/gcc.target/i386/pr117296.c 
b/gcc/testsuite/gcc.target/i386/pr117296.c
new file mode 100644
index ..1b4f6e806913
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr117296.c
@@ -0,0 +1,12 @@
+/* PR target/117296 */
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+/* { dg-additional-options "-mtune=k6 -mstringop-strategy=libcall 
-ffloat-store" { target ia32 } } */
+
+int x;
+
+void
+foo (_Complex double c)
+{
+ lab:;
+}

[gcc r14-10872] expand: Fix up expansion of VIEW_CONVERT_EXPR to BITINT_TYPE [PR117354]

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:1553e4094207cfe87e98980752a88a49e1b6626d

commit r14-10872-g1553e4094207cfe87e98980752a88a49e1b6626d
Author: Jakub Jelinek 
Date:   Thu Oct 31 10:52:56 2024 +0100

expand: Fix up expansion of VIEW_CONVERT_EXPR to BITINT_TYPE [PR117354]

The following testcase ICEs, because when trying to expand the
VIEW_CONVERT_EXPR operand which is SSA_NAME defined to
V32QI or V4DI MEM_REF which is aligned just to 8 bytes we force
it as unaligned into a register, but then try to call extract_bit_field
from the V32QI or V4DI register to BLKmode.  extract_bit_field doesn't
obviously support BLKmode extraction and so ICEs.

The second hunk fixes the ICE by not calling extract_bit_field when
it can't handle it, the last if will handle it properly by storing
it to memory and using BLKmode access to the copy.

The first hunk is an optimization, if mode is BLKmode, by setting
inner_reference_p argument to expand_expr_real we avoid the
expand_misaligned_mem_ref calls which load it from memory into a register.

2024-10-31  Jakub Jelinek  

PR middle-end/117354
* expr.cc (expand_expr_real_1) : Pass
true as inner_reference_p argument to expand_expr_real if
mode is BLKmode.  Don't call extract_bit_field if mode is BLKmode.

* gcc.dg/bitint-113.c: New test.

(cherry picked from commit b39f62ff739e9ffea0e6485667f15b985f8cd63d)

Diff:
---
 gcc/expr.cc   |  4 ++--
 gcc/testsuite/gcc.dg/bitint-113.c | 40 +++
 2 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/gcc/expr.cc b/gcc/expr.cc
index 9f66d4794459..414b7fda7545 100644
--- a/gcc/expr.cc
+++ b/gcc/expr.cc
@@ -12427,7 +12427,7 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode 
tmode,
 
   if (!op0)
op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
-   NULL, inner_reference_p);
+   NULL, inner_reference_p || mode == BLKmode);
 
   /* If the input and output modes are both the same, we are done.  */
   if (mode == GET_MODE (op0))
@@ -12464,7 +12464,7 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode 
tmode,
op0 = convert_modes (mode, GET_MODE (op0), op0,
 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
   /* If the output type is a bit-field type, do an extraction.  */
-  else if (reduce_bit_field)
+  else if (reduce_bit_field && mode != BLKmode)
return extract_bit_field (op0, TYPE_PRECISION (type), 0,
  TYPE_UNSIGNED (type), NULL_RTX,
  mode, mode, false, NULL);
diff --git a/gcc/testsuite/gcc.dg/bitint-113.c 
b/gcc/testsuite/gcc.dg/bitint-113.c
new file mode 100644
index ..3c934a62fb47
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/bitint-113.c
@@ -0,0 +1,40 @@
+/* PR middle-end/117354 */
+/* { dg-do compile { target bitint } } */
+/* { dg-options "-O2" } */
+/* { dg-additional-options "-mavx2" { target x86_64-*-* i?86-*-* } } */
+
+#if __BITINT_MAXWIDTH__ >= 256
+#define N 256
+#else
+#define N 64
+#endif
+
+struct S {
+  unsigned char y;
+  _BitInt(N) x;
+} s;
+
+__attribute__((noipa)) static void
+foo (const char *, _BitInt(N))
+{
+}
+
+__attribute__((noipa)) static void
+bar (_BitInt(N))
+{
+}
+
+static void
+baz (void *p)
+{
+  foo ("bazbazbazb", s.x);
+  __builtin_memcpy (p, &s.x, sizeof s.x);
+}
+
+int
+main ()
+{
+  void *ptr = &s.x;
+  baz (&s.x);
+  bar (*(_BitInt(N) *) ptr);
+}

[gcc r15-4886] Revert "PR 117048: simplify-rtx: Simplify (X << C1) [+, ^] (X >> C2) into ROTATE"

[Kyrylo Tkachov via Gcc-cvs]

https://gcc.gnu.org/g:8762bb1b004c442b8dbb22a6d9eb0b7da4a3e59f

commit r15-4886-g8762bb1b004c442b8dbb22a6d9eb0b7da4a3e59f
Author: Kyrylo Tkachov 
Date:   Mon Nov 4 14:04:59 2024 +0100

Revert "PR 117048: simplify-rtx: Simplify (X << C1) [+,^] (X >> C2) into 
ROTATE"

This reverts commit de2bc6a7367aca2eecc925ebb64cfb86998d89f3.

Diff:
---
 gcc/simplify-rtx.cc | 204 +---
 1 file changed, 48 insertions(+), 156 deletions(-)

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 751c908113ef..ce8d3879270d 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -2820,104 +2820,6 @@ reverse_rotate_by_imm_p (machine_mode mode, unsigned 
int left, rtx op1)
   return false;
 }
 
-/* Analyse argument X to see if it represents an (ASHIFT X Y) operation
-   and return the expression to be shifted in SHIFT_OPND and the shift amount
-   in SHIFT_AMNT.  This is primarily used to group handling of ASHIFT (X, CST)
-   and (PLUS (X, X)) in one place.  If the expression is not equivalent to an
-   ASHIFT then return FALSE and set SHIFT_OPND and SHIFT_AMNT to NULL.  */
-
-static bool
-extract_ashift_operands_p (rtx x, rtx *shift_opnd, rtx *shift_amnt)
-{
-  if (GET_CODE (x) == ASHIFT)
-{
-  *shift_opnd = XEXP (x, 0);
-  *shift_amnt = XEXP (x, 1);
-  return true;
-}
-  if (GET_CODE (x) == PLUS && rtx_equal_p (XEXP (x, 0), XEXP (x, 1)))
-{
-  *shift_opnd = XEXP (x, 0);
-  *shift_amnt = CONST1_RTX (GET_MODE (x));
-  return true;
-}
-  *shift_opnd = NULL_RTX;
-  *shift_amnt = NULL_RTX;
-  return false;
-}
-
-/* OP0 and OP1 are combined under an operation of mode MODE that can
-   potentially result in a ROTATE expression.  Analyze the OP0 and OP1
-   and return the resulting ROTATE expression if so.  Return NULL otherwise.
-   This is used in detecting the patterns (X << C1) [+,|,^] (X >> C2) where
-   C1 + C2 == GET_MODE_UNIT_PRECISION (mode).
-   (X << C1) and (C >> C2) would be OP0 and OP1.  */
-
-static rtx
-simplify_rotate_op (rtx op0, rtx op1, machine_mode mode)
-{
-  /* Convert (ior (ashift A CX) (lshiftrt A CY)) where CX+CY equals the
- mode size to (rotate A CX).  */
-
-  rtx opleft = simplify_rtx (op0);
-  rtx opright = simplify_rtx (op1);
-  rtx ashift_opnd, ashift_amnt;
-  /* In some cases the ASHIFT is not a direct ASHIFT.  Look deeper and extract
- the relevant operands here.  */
-  bool ashift_op_p
-= extract_ashift_operands_p (op1, &ashift_opnd, &ashift_amnt);
-
-  if (ashift_op_p
- || GET_CODE (op1) == SUBREG)
-{
-  opleft = op1;
-  opright = op0;
-}
-  else
-{
-  opright = op1;
-  opleft = op0;
-  ashift_op_p
-   = extract_ashift_operands_p (opleft, &ashift_opnd, &ashift_amnt);
-}
-
-  if (ashift_op_p && GET_CODE (opright) == LSHIFTRT
-  && rtx_equal_p (ashift_opnd, XEXP (opright, 0)))
-{
-  rtx leftcst = unwrap_const_vec_duplicate (ashift_amnt);
-  rtx rightcst = unwrap_const_vec_duplicate (XEXP (opright, 1));
-
-  if (CONST_INT_P (leftcst) && CONST_INT_P (rightcst)
- && (INTVAL (leftcst) + INTVAL (rightcst)
- == GET_MODE_UNIT_PRECISION (mode)))
-   return gen_rtx_ROTATE (mode, XEXP (opright, 0), ashift_amnt);
-}
-
-  /* Same, but for ashift that has been "simplified" to a wider mode
- by simplify_shift_const.  */
-  scalar_int_mode int_mode, inner_mode;
-
-  if (GET_CODE (opleft) == SUBREG
-  && is_a  (mode, &int_mode)
-  && is_a  (GET_MODE (SUBREG_REG (opleft)),
-&inner_mode)
-  && GET_CODE (SUBREG_REG (opleft)) == ASHIFT
-  && GET_CODE (opright) == LSHIFTRT
-  && GET_CODE (XEXP (opright, 0)) == SUBREG
-  && known_eq (SUBREG_BYTE (opleft), SUBREG_BYTE (XEXP (opright, 0)))
-  && GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (inner_mode)
-  && rtx_equal_p (XEXP (SUBREG_REG (opleft), 0),
- SUBREG_REG (XEXP (opright, 0)))
-  && CONST_INT_P (XEXP (SUBREG_REG (opleft), 1))
-  && CONST_INT_P (XEXP (opright, 1))
-  && (INTVAL (XEXP (SUBREG_REG (opleft), 1))
-   + INTVAL (XEXP (opright, 1))
-== GET_MODE_PRECISION (int_mode)))
-   return gen_rtx_ROTATE (int_mode, XEXP (opright, 0),
-  XEXP (SUBREG_REG (opleft), 1));
-  return NULL_RTX;
-}
-
 /* Subroutine of simplify_binary_operation.  Simplify a binary operation
CODE with result mode MODE, operating on OP0 and OP1.  If OP0 and/or
OP1 are constant pool references, TRUEOP0 and TRUEOP1 represent the
@@ -2929,7 +2831,7 @@ simplify_context::simplify_binary_operation_1 (rtx_code 
code,
   rtx op0, rtx op1,
   rtx trueop0, rtx trueop1)
 {
-  rtx tem, reversed, elt0, elt1;
+  rtx tem, reversed, opleft, opright, elt0, elt1;
   HOST_WIDE_INT val;
   scalar_int_mode int_mode, inner_mode;
   poly_int64 offset;
@@ -3128,11 +3030,6 @@

[gcc r15-4888] target: Fix asm codegen for vfpclasss* and vcvtph2* instructions

[Antoni Boucher via Gcc-cvs]

https://gcc.gnu.org/g:9141bfdd483e2838f5dce767f1c1657710ef2daf

commit r15-4888-g9141bfdd483e2838f5dce767f1c1657710ef2daf
Author: Antoni Boucher 
Date:   Mon Sep 23 18:58:47 2024 -0400

target: Fix asm codegen for vfpclasss* and vcvtph2* instructions

This only happens when using -masm=intel.

gcc/ChangeLog:
PR target/116725
* config/i386/sse.md: Fix asm generation.

gcc/testsuite/ChangeLog:
PR target/116725
* gcc.target/i386/pr116725.c: Add test using those AVX builtins.

Diff:
---
 gcc/config/i386/sse.md   | 10 ++--
 gcc/testsuite/gcc.target/i386/pr116725.c | 40 
 2 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 22c6c817dd75..15ed8ff99cbd 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1312,6 +1312,12 @@
(V8HF "w") (V8BF "w") (V4SF "k") (V2DF "q")
(HF "w") (BF "w") (SF "k") (DF "q")])
 
+;; Pointer size override for 16-bit upper-convert modes (Intel asm dialect)
+(define_mode_attr iptrh
+ [(V32HI "") (V16SI "") (V8DI "")
+  (V16HI "") (V8SI "") (V4DI "q")
+  (V8HI "") (V4SI "q") (V2DI "k")])
+
 ;; Mapping of vector modes to VPTERNLOG suffix
 (define_mode_attr ternlogsuffix
   [(V8DI "q") (V4DI "q") (V2DI "q")
@@ -7606,7 +7612,7 @@
   [(match_operand: 1 "" 
"")]
   UNSPEC_US_FIX_NOTRUNC))]
   "TARGET_AVX512FP16 && "
-  "vcvtph2\t{%1, 
%0|%0, %1}"
+  "vcvtph2\t{%1, 
%0|%0, %1}"
   [(set_attr "type" "ssecvt")
(set_attr "prefix" "evex")
(set_attr "mode" "")])
@@ -29840,7 +29846,7 @@
UNSPEC_FPCLASS)
  (const_int 1)))]
"TARGET_AVX512DQ || VALID_AVX512FP16_REG_MODE(mode)"
-   "vfpclass\t{%2, %1, 
%0|%0, %1, %2}";
+   "vfpclass\t{%2, %1, 
%0|%0, %1, %2}";
   [(set_attr "type" "sse")
(set_attr "length_immediate" "1")
(set_attr "prefix" "evex")
diff --git a/gcc/testsuite/gcc.target/i386/pr116725.c 
b/gcc/testsuite/gcc.target/i386/pr116725.c
new file mode 100644
index ..9e5070e16e71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr116725.c
@@ -0,0 +1,40 @@
+/* PR gcc/116725 */
+/* { dg-do assemble } */
+/* { dg-options "-masm=intel -mavx512dq -mavx512fp16 -mavx512vl" } */
+/* { dg-require-effective-target masm_intel } */
+
+#include 
+
+typedef double __m128d __attribute__ ((__vector_size__ (16)));
+typedef float __m128f __attribute__ ((__vector_size__ (16)));
+typedef int __v16si __attribute__ ((__vector_size__ (64)));
+typedef _Float16 __m256h __attribute__ ((__vector_size__ (32)));
+typedef long long __m512i __attribute__((__vector_size__(64)));
+typedef _Float16 __m128h __attribute__ ((__vector_size__ (16), __may_alias__));
+typedef int __v4si __attribute__ ((__vector_size__ (16)));
+typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+
+int main(void) {
+__m128d vec = {1.0, 2.0};
+char res = __builtin_ia32_fpclasssd_mask(vec, 1, 1);
+printf("%d\n", res);
+
+__m128f vec2 = {1.0, 2.0, 3.0, 4.0};
+char res2 = __builtin_ia32_fpcla_mask(vec2, 1, 1);
+printf("%d\n", res2);
+
+__m128h vec3 = {2.0, 1.0, 3.0};
+__v4si vec4 = {};
+__v4si res3 = __builtin_ia32_vcvtph2dq128_mask(vec3, vec4, -1);
+printf("%d\n", res3[0]);
+
+__v4si res4 = __builtin_ia32_vcvtph2udq128_mask(vec3, vec4, -1);
+printf("%d\n", res4[0]);
+
+__m128i vec5 = {};
+__m128i res5 = __builtin_ia32_vcvtph2qq128_mask(vec3, vec5, -1);
+printf("%d\n", res5[0]);
+
+__m128i res6 = __builtin_ia32_vcvtph2uqq128_mask(vec3, vec5, -1);
+printf("%d\n", res6[0]);
+}

[gcc r15-4887] Don't call invert on VARYING.

[Andrew Macleod via Gcc-cvs]

https://gcc.gnu.org/g:766075c47db5cc9d04463bfb2219b593bb4263ee

commit r15-4887-g766075c47db5cc9d04463bfb2219b593bb4263ee
Author: Andrew MacLeod 
Date:   Sat Nov 2 10:26:24 2024 -0400

Don't call invert on VARYING.

When all cases go to one label and resul in a VARYING value, we can't
invert that value to remove all values from the default case. Simply
check for this case and set the default to UNDEFINED.

PR tree-optimization/117398
gcc/
* gimple-range-edge.cc (gimple_outgoing_range::calc_switch_ranges):
Check for VARYING and don't call invert () on it.

gcc/testsuite/
* gcc.dg/pr117398.c: New.

Diff:
---
 gcc/gimple-range-edge.cc| 10 --
 gcc/testsuite/gcc.dg/pr117398.c | 17 +
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/gcc/gimple-range-edge.cc b/gcc/gimple-range-edge.cc
index e3a197a2293a..d2387289ad2d 100644
--- a/gcc/gimple-range-edge.cc
+++ b/gcc/gimple-range-edge.cc
@@ -159,8 +159,14 @@ gimple_outgoing_range::calc_switch_ranges (gswitch *sw)
   // Remove the case range from the default case.
   int_range_max def_range (type, low, high);
   range_cast (def_range, type);
-  def_range.invert ();
-  default_range.intersect (def_range);
+  // If all possible values are taken, set default_range to UNDEFINED.
+  if (def_range.varying_p ())
+   default_range.set_undefined ();
+  else
+   {
+ def_range.invert ();
+ default_range.intersect (def_range);
+   }
 
   // Create/union this case with anything on else on the edge.
   int_range_max case_range (type, low, high);
diff --git a/gcc/testsuite/gcc.dg/pr117398.c b/gcc/testsuite/gcc.dg/pr117398.c
new file mode 100644
index ..c43f2a3ed6b3
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr117398.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int a;
+void c(void);
+int d(_Bool b) {
+  switch (b+0) {
+  case 0:
+break;
+  case 1:
+break;
+  default:
+c();
+  }
+  if (b)
+return a;
+}

[gcc r15-4889] PR 117048: simplify-rtx: Simplify (X << C1) [+, ^] (X >> C2) into ROTATE

[Kyrylo Tkachov via Gcc-cvs]

https://gcc.gnu.org/g:1c46a541c6957e8b0eee339d4cff46e951a5ad4e

commit r15-4889-g1c46a541c6957e8b0eee339d4cff46e951a5ad4e
Author: Kyrylo Tkachov 
Date:   Mon Nov 4 07:25:16 2024 -0800

PR 117048: simplify-rtx: Simplify (X << C1) [+,^] (X >> C2) into ROTATE

This is, in effect, a reapplication of 
de2bc6a7367aca2eecc925ebb64cfb86998d89f3
fixing the compile-time hog in var-tracking due to calling simplify_rtx
on the two arms of the rotation before detecting the ROTATE.
That is not necessary.

simplify-rtx can transform (X << C1) | (X >> C2) into ROTATE (X, C1) when
C1 + C2 == mode-width.  But the transformation is also valid for PLUS and 
XOR.
Indeed GIMPLE can also do the fold.  Let's teach RTL to do it too.

The motivating testcase for this is in AArch64 intrinsics:

uint64x2_t G2(uint64x2_t a, uint64x2_t b) {
uint64x2_t c = veorq_u64(a, b);
return veorq_u64(vaddq_u64(c, c), vshrq_n_u64(c, 63));
}

which I was hoping to fold to a single XAR (a ROTATE+XOR instruction) but
GCC was failing to detect the rotate operation for two reasons:
1) The combination of the two arms of the expression is done under XOR 
rather
than IOR that simplify-rtx currently supports.
2) The ASHIFT operation is actually a (PLUS X X) operation and thus is not
detected as the LHS of the two arms we require.

The patch fixes both issues.  The analysis of the two arms of the rotation
expression is factored out into a common helper simplify_rotate_op which is
then used in the PLUS, XOR, IOR cases in simplify_binary_operation_1.

The check-assembly testcase for this is added in the following patch because
it needs some extra AArch64 backend work, but I've added self-tests in this
patch to validate the transformation.

Bootstrapped and tested on aarch64-none-linux-gnu

Signed-off-by: Kyrylo Tkachov 

PR target/117048
* simplify-rtx.cc (extract_ashift_operands_p): Define.
(simplify_rotate_op): Likewise.
(simplify_context::simplify_binary_operation_1): Use the above in
the PLUS, IOR, XOR cases.
(test_vector_rotate): Define.
(test_vector_ops): Use the above.

Diff:
---
 gcc/simplify-rtx.cc | 204 +++-
 1 file changed, 156 insertions(+), 48 deletions(-)

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index ce8d3879270d..893c5f6e1ae0 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -2820,6 +2820,104 @@ reverse_rotate_by_imm_p (machine_mode mode, unsigned 
int left, rtx op1)
   return false;
 }
 
+/* Analyse argument X to see if it represents an (ASHIFT X Y) operation
+   and return the expression to be shifted in SHIFT_OPND and the shift amount
+   in SHIFT_AMNT.  This is primarily used to group handling of ASHIFT (X, CST)
+   and (PLUS (X, X)) in one place.  If the expression is not equivalent to an
+   ASHIFT then return FALSE and set SHIFT_OPND and SHIFT_AMNT to NULL.  */
+
+static bool
+extract_ashift_operands_p (rtx x, rtx *shift_opnd, rtx *shift_amnt)
+{
+  if (GET_CODE (x) == ASHIFT)
+{
+  *shift_opnd = XEXP (x, 0);
+  *shift_amnt = XEXP (x, 1);
+  return true;
+}
+  if (GET_CODE (x) == PLUS && rtx_equal_p (XEXP (x, 0), XEXP (x, 1)))
+{
+  *shift_opnd = XEXP (x, 0);
+  *shift_amnt = CONST1_RTX (GET_MODE (x));
+  return true;
+}
+  *shift_opnd = NULL_RTX;
+  *shift_amnt = NULL_RTX;
+  return false;
+}
+
+/* OP0 and OP1 are combined under an operation of mode MODE that can
+   potentially result in a ROTATE expression.  Analyze the OP0 and OP1
+   and return the resulting ROTATE expression if so.  Return NULL otherwise.
+   This is used in detecting the patterns (X << C1) [+,|,^] (X >> C2) where
+   C1 + C2 == GET_MODE_UNIT_PRECISION (mode).
+   (X << C1) and (C >> C2) would be OP0 and OP1.  */
+
+static rtx
+simplify_rotate_op (rtx op0, rtx op1, machine_mode mode)
+{
+  /* Convert (ior (ashift A CX) (lshiftrt A CY)) where CX+CY equals the
+ mode size to (rotate A CX).  */
+
+  rtx opleft = op0;
+  rtx opright = op1;
+  rtx ashift_opnd, ashift_amnt;
+  /* In some cases the ASHIFT is not a direct ASHIFT.  Look deeper and extract
+ the relevant operands here.  */
+  bool ashift_op_p
+= extract_ashift_operands_p (op1, &ashift_opnd, &ashift_amnt);
+
+  if (ashift_op_p
+ || GET_CODE (op1) == SUBREG)
+{
+  opleft = op1;
+  opright = op0;
+}
+  else
+{
+  opright = op1;
+  opleft = op0;
+  ashift_op_p
+   = extract_ashift_operands_p (opleft, &ashift_opnd, &ashift_amnt);
+}
+
+  if (ashift_op_p && GET_CODE (opright) == LSHIFTRT
+  && rtx_equal_p (ashift_opnd, XEXP (opright, 0)))
+{
+  rtx leftcst = unwrap_const_vec_duplicate (ashift_amnt);
+  rtx rightcst = unwrap_const_vec_duplicate (XEXP (opright, 1));
+
+  if (CONST_INT_P (leftcs

[gcc r15-4892] ada: Add null exclusion to avoid run-time checks

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:39e9ebac2f2500652c14597fe6a113d5002abf2f

commit r15-4892-g39e9ebac2f2500652c14597fe6a113d5002abf2f
Author: Piotr Trojanek 
Date:   Fri Sep 27 16:56:37 2024 +0200

ada: Add null exclusion to avoid run-time checks

By declaring access parameter with non-null qualifier, the compiler
should avoid generating run-time checks in debug builds, resulting in
a tiny performance improvement.

Code cleanup; semantics is unaffected.

gcc/ada/ChangeLog:

* sem_res.adb (Type_In_P): Add non-null qualifier.

Diff:
---
 gcc/ada/sem_res.adb | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
index 2ea1ae4a3aee..4c92b5629442 100644
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -1589,7 +1589,7 @@ package body Sem_Res is
   --  expanded name, verify that the operand has an interpretation with a
   --  type defined in the given scope of the operator.
 
-  function Type_In_P (Test : Kind_Test) return Entity_Id;
+  function Type_In_P (Test : not null Kind_Test) return Entity_Id;
   --  Find a type of the given class in package Pack that contains the
   --  operator.
 
@@ -1624,7 +1624,7 @@ package body Sem_Res is
   -- Type_In_P --
   ---
 
-  function Type_In_P (Test : Kind_Test) return Entity_Id is
+  function Type_In_P (Test : not null Kind_Test) return Entity_Id is
  E : Entity_Id;
 
  function In_Decl return Boolean;

[gcc r15-4893] ada: Assignment local variable only when it is used

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:625c4ec2b3d3a59138a0a00178307ecba916aeea

commit r15-4893-g625c4ec2b3d3a59138a0a00178307ecba916aeea
Author: Piotr Trojanek 
Date:   Fri Sep 27 16:56:52 2024 +0200

ada: Assignment local variable only when it is used

Code cleanup; semantics is unaffected.

gcc/ada/ChangeLog:

* sem_res.adb (In_Decl): Rename and move local variable where
it is used.

Diff:
---
 gcc/ada/sem_res.adb | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
index 4c92b5629442..d28e724e8829 100644
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -1637,11 +1637,9 @@ package body Sem_Res is
 
  function In_Decl return Boolean is
 Decl_Node : constant Node_Id := Parent (E);
-N2: Node_Id;
+Context   : Node_Id;
 
  begin
-N2 := N;
-
 if Etype (E) = Any_Type then
return True;
 
@@ -1649,13 +1647,15 @@ package body Sem_Res is
return False;
 
 else
-   while Present (N2)
- and then Nkind (N2) /= N_Compilation_Unit
+   Context := N;
+
+   while Present (Context)
+ and then Nkind (Context) /= N_Compilation_Unit
loop
-  if N2 = Decl_Node then
+  if Context = Decl_Node then
  return True;
   else
- N2 := Parent (N2);
+ Context := Parent (Context);
   end if;
end loop;
 
@@ -1912,7 +1912,7 @@ package body Sem_Res is
  end if;
   end if;
 
-  Set_Chars  (Op_Node, Op_Name);
+  Set_Chars (Op_Node, Op_Name);
 
   if not Is_Private_Type (Etype (N)) then
  Set_Etype (Op_Node, Base_Type (Etype (N)));

[gcc r15-4894] ada: Avoid run-time conversion of 0 from Int to Uint

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:d797d051aabdd7beb38935b4610cc44f94c18aea

commit r15-4894-gd797d051aabdd7beb38935b4610cc44f94c18aea
Author: Piotr Trojanek 
Date:   Fri Sep 27 17:53:29 2024 +0200

ada: Avoid run-time conversion of 0 from Int to Uint

Code cleanup and tiny performance improvement; semantics is unaffected.

gcc/ada/ChangeLog:

* exp_ch4.adb (Expand_N_Op_Subtract): Replace numeric literal
with universal integer constant, just like it is done in
expansion of addition operator.

Diff:
---
 gcc/ada/exp_ch4.adb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
index 9024c1aebb2d..b2cc672579f0 100644
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -10031,7 +10031,7 @@ package body Exp_Ch4 is
 
   if Is_Integer_Type (Typ)
 and then Compile_Time_Known_Value (Right_Opnd (N))
-and then Expr_Value (Right_Opnd (N)) = 0
+and then Expr_Value (Right_Opnd (N)) = Uint_0
   then
  Rewrite (N, Left_Opnd (N));
  return;

[gcc r15-4891] ada: Resolve intrinsic operators without homonyms

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:ccd17b28e9bb9bd49676000c12e471a512c3a7cd

commit r15-4891-gccd17b28e9bb9bd49676000c12e471a512c3a7cd
Author: Piotr Trojanek 
Date:   Fri Sep 27 10:47:29 2024 +0200

ada: Resolve intrinsic operators without homonyms

Intrinsic operators are resolved by rewriting into a corresponding
operator from the Standard package. Traversing homonyms just to find the
corresponding operator was not particularly efficient; also, for the
binary "-" it was finding the unary "-".

There appears to be no difference in compiler behavior, but the new code
should be more efficient and finding the correct operator seems to make
more sense.

gcc/ada/ChangeLog:

* sem_res.adb (Resolve_Intrinsic_Operator)
(Resolve_Intrinsic_Unary_Operator): Replace traversals of
homonyms with a direct lookup.

Diff:
---
 gcc/ada/sem_res.adb | 47 +--
 1 file changed, 37 insertions(+), 10 deletions(-)

diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
index 0abdeee8fbee..2ea1ae4a3aee 100644
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -9885,11 +9885,30 @@ package body Sem_Res is
  return;
   end if;
 
-  Op := Entity (N);
-  while Scope (Op) /= Standard_Standard loop
- Op := Homonym (Op);
- pragma Assert (Present (Op));
-  end loop;
+  case N_Binary_Op'(Nkind (N)) is
+ when N_Op_Add =>
+Op := Standard_Op_Add;
+ when N_Op_Expon =>
+Op := Standard_Op_Expon;
+ when N_Op_Subtract =>
+Op := Standard_Op_Subtract;
+ when N_Op_Divide =>
+Op := Standard_Op_Divide;
+ when N_Op_Mod =>
+Op := Standard_Op_Mod;
+ when N_Op_Multiply =>
+Op := Standard_Op_Multiply;
+ when N_Op_Rem =>
+Op := Standard_Op_Rem;
+
+ --  Non-arithmetic operators are handled elsewhere
+
+ when N_Op_Boolean
+| N_Op_Concat
+| N_Op_Shift
+ =>
+raise Program_Error;
+  end case;
 
   Set_Entity (N, Op);
   Set_Is_Overloaded (N, False);
@@ -9979,11 +9998,19 @@ package body Sem_Res is
  return;
   end if;
 
-  Op := Entity (N);
-  while Scope (Op) /= Standard_Standard loop
- Op := Homonym (Op);
- pragma Assert (Present (Op));
-  end loop;
+  case N_Unary_Op'(Nkind (N)) is
+ when N_Op_Abs =>
+Op := Standard_Op_Abs;
+ when N_Op_Minus =>
+Op := Standard_Op_Minus;
+ when N_Op_Plus =>
+Op := Standard_Op_Plus;
+
+ --  Non-arithmetic operators are handled elsewhere
+
+ when N_Op_Not =>
+raise Program_Error;
+  end case;
 
   Set_Entity (N, Op);

[gcc r15-4901] ada: Add doc for deep delta aggregates

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:e009d0c215ccbb22d681e8feb372aa5f27c15f88

commit r15-4901-ge009d0c215ccbb22d681e8feb372aa5f27c15f88
Author: Raphaël AMIARD 
Date:   Mon Sep 23 11:00:34 2024 +0200

ada: Add doc for deep delta aggregates

gcc/ada/ChangeLog:

* doc/gnat_rm/gnat_language_extensions.rst: Adjust documentation.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.

Diff:
---
 gcc/ada/doc/gnat_rm/gnat_language_extensions.rst | 148 +++
 gcc/ada/gnat_rm.texi | 325 ++-
 gcc/ada/gnat_ugn.texi|   4 +-
 3 files changed, 412 insertions(+), 65 deletions(-)

diff --git a/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst 
b/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst
index 088d289f35fe..9b3de825acaa 100644
--- a/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst
+++ b/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst
@@ -131,6 +131,154 @@ handler would be visible in this handler.
 
And as such the second ``A`` declaration is hiding the first one.
 
+Deep delta Aggregates
+-
+
+Ada 2022's delta aggregates are extended to allow deep updates.
+
+A delta aggregate may be used to specify new values for subcomponents of the
+copied base value, instead of only new values for direct components of the
+copied base value. This allows a more compact expression of updated values with
+a single delta aggregate, instead of multiple nested delta aggregates.
+
+The syntax of delta aggregates in the extended version is the following:
+
+Syntax
+^^
+
+.. code::
+
+   delta_aggregate ::= record_delta_aggregate | array_delta_aggregate
+
+   record_delta_aggregate ::=
+ ( base_expression with delta record_subcomponent_association_list )
+
+   record_subcomponent_association_list ::=
+ record_subcomponent_association {, record_subcomponent_association}
+
+   record_subcomponent_association ::=
+ record_subcomponent_choice_list => expression
+
+   record_subcomponent_choice_list ::=
+ record_subcomponent_choice {'|' record_subcomponent_choice}
+
+   record_subcomponent_choice ::=
+   component_selector_name
+ | record_subcomponent_choice (expression)
+ | record_subcomponent_choice . component_selector_name
+
+   array_delta_aggregate ::=
+   ( base_expression with delta array_component_association_list )
+ | '[' base_expression with delta array_component_association_list ']'
+ | ( base_expression with delta array_subcomponent_association_list )
+ | '[' base_expression with delta array_subcomponent_association_list ']'
+
+   array_subcomponent_association_list ::=
+ array_subcomponent_association {, array_subcomponent_association}
+
+   array_subcomponent_association ::=
+ array_subcomponent_choice_list => expression
+
+   array_subcomponent_choice_list ::=
+ array_subcomponent_choice {'|' array_subcomponent_choice}
+
+   array_subcomponent_choice ::=
+   ( expression )
+ | array_subcomponent_choice (expression)
+ | array_subcomponent_choice . component_selector_name
+
+Legality Rules
+^^
+
+1. For an ``array_delta_aggregate``, the discrete_choice shall not be 
**others**.
+
+2. For an ``array_delta_aggregate``, the dimensionality of the type of the
+   ``delta_aggregate`` shall be 1.
+
+3. For an ``array_delta_aggregate``, the ``base_expression`` and each
+   expression in every ``array_component_association`` or
+   ``array_subcomponent_association`` shall be of a nonlimited type.
+
+4. For a ``record_delta_aggregate``, no ``record_subcomponent_choices`` that
+   consists of only ``component_selector_names`` shall be the same or a prefix
+   of another record_subcomponent_choice.
+
+5. For an ``array_subcomponent_choice`` or a ``record_subcomponent_choice`` the
+   ``component_selector_name`` shall not be a subcomponent that depends on
+   discriminants of an unconstrained record subtype with defaulted
+   discriminants unless its prefix consists of only
+   ``component_selector_names``.
+
+   [Rationale: As a result of this rule, accessing the subcomponent can only
+   lead to a discriminant check failure if the subcomponent was not present in
+   the object denoted by the base_expression, prior to any update.]
+
+Dynamic Semantics
+^
+
+The evaluation of a ``delta_aggregate`` begins with the evaluation of the
+``base_expression`` of the delta_aggregate; then that value is used to create
+and initialize the anonymous object of the aggregate. The bounds of the
+anonymous object of an ``array_delta_aggregate`` and the discriminants (if any)
+of the anonymous object of a ``record_delta_aggregate`` are those of the
+``base_expression``.
+
+If a ``record_delta_aggregate`` is of a specific tagged type, its tag is that
+of the specific type; if it is of a class-wide type, its tag is that of the
+base_expression.
+
+For a ``delta_aggregate``, for each ``discrete_choice`` or each subc

[gcc r15-4900] ada: Fix internal error on alignment clause for type declared in generic unit

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:f6afd361c53c319f5151ddd6c0700eea8b0125c9

commit r15-4900-gf6afd361c53c319f5151ddd6c0700eea8b0125c9
Author: Eric Botcazou 
Date:   Thu Oct 10 13:06:12 2024 +0200

ada: Fix internal error on alignment clause for type declared in generic 
unit

The front-end raises Program_Error on an alignment clause for a type in a
generic unit that references the alignment of another type in the unit.

gcc/ada/ChangeLog:

PR ada/117051
* freeze.adb (Freeze_Entity): Call the layout procedure on subtypes
declared in a generic unit when they are static.

Diff:
---
 gcc/ada/freeze.adb | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/freeze.adb b/gcc/ada/freeze.adb
index c7e3be028a7c..9a862176c30a 100644
--- a/gcc/ada/freeze.adb
+++ b/gcc/ada/freeze.adb
@@ -8022,9 +8022,11 @@ package body Freeze is
  --  generation, and so the size and alignment values for such types
  --  are irrelevant. Ditto for types declared within a generic unit,
  --  which may have components that depend on generic parameters, and
- --  that will be recreated in an instance.
+ --  that will be recreated in an instance, except for static subtypes
+ --  because they may be referenced in the static expressions of the
+ --  generic unit, which need to be evaluated during its processing.
 
- if Inside_A_Generic then
+ if Inside_A_Generic and then not Is_Static_Subtype (E) then
 null;
 
  --  Otherwise we call the layout procedure

[gcc r15-4895] ada: Minor whitespace tuning

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:9c3b5ed02e8b0599f7566fa914f29a75aa438a7b

commit r15-4895-g9c3b5ed02e8b0599f7566fa914f29a75aa438a7b
Author: Piotr Trojanek 
Date:   Fri Sep 27 17:53:29 2024 +0200

ada: Minor whitespace tuning

Code cleanup.

gcc/ada/ChangeLog:

* exp_ch4.adb (Expand_N_Op_Multiply): Remove extra whitespace.

Diff:
---
 gcc/ada/exp_ch4.adb | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
index b2cc672579f0..3817997c836c 100644
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -9271,9 +9271,9 @@ package body Exp_Ch4 is
   Rp2 : constant Boolean :=
   Nkind (Rop) = N_Op_Expon and then Is_Power_Of_2_For_Shift (Rop);
 
-  Ltyp : constant Entity_Id  := Etype (Lop);
-  Rtyp : constant Entity_Id  := Etype (Rop);
-  Typ  : Entity_Id   := Etype (N);
+  Ltyp : constant Entity_Id := Etype (Lop);
+  Rtyp : constant Entity_Id := Etype (Rop);
+  Typ  : Entity_Id  := Etype (N);
 
begin
   Binary_Op_Validity_Checks (N);

[gcc r15-4899] ada: Minor tweaks in comments

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:a0b57f6ff5c8eff7e8c17a28ccbed7b11ddc82e7

commit r15-4899-ga0b57f6ff5c8eff7e8c17a28ccbed7b11ddc82e7
Author: Eric Botcazou 
Date:   Thu Oct 10 00:12:05 2024 +0200

ada: Minor tweaks in comments

They are related to the special support for text encoding on Windows.

gcc/ada/ChangeLog:

* adaint.c: Replace initialize.c with rtinit.c in comment.
* sysdep.c (__gnat_set_mode): Fix reference in comment.
* libgnat/i-cstrea.ads (Content_Encoding): Adjust comment.

Diff:
---
 gcc/ada/adaint.c | 2 +-
 gcc/ada/libgnat/i-cstrea.ads | 2 +-
 gcc/ada/sysdep.c | 8 
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/ada/adaint.c b/gcc/ada/adaint.c
index f26d69a1a2a0..9ccac305dde9 100644
--- a/gcc/ada/adaint.c
+++ b/gcc/ada/adaint.c
@@ -175,7 +175,7 @@ extern "C" {
 
 #include "mingw32.h"
 
-/* Current code page and CCS encoding to use, set in initialize.c.  */
+/* Current code page and CCS encoding to use, set in rtinit.c.  */
 UINT __gnat_current_codepage;
 UINT __gnat_current_ccs_encoding;
 
diff --git a/gcc/ada/libgnat/i-cstrea.ads b/gcc/ada/libgnat/i-cstrea.ads
index 756db48e75c9..ba75c21b231d 100644
--- a/gcc/ada/libgnat/i-cstrea.ads
+++ b/gcc/ada/libgnat/i-cstrea.ads
@@ -235,9 +235,9 @@ package Interfaces.C_Streams is
--   In this mode we are eventually using the system-wide
--   translation if activated.
--Text : Text encoding activated
+   --U8text   : Unicode UTF-8 encoding
--Wtext: Unicode mode
--U16text  : Unicode UTF-16 encoding
-   --U8text   : Unicode UTF-8 encoding
--
--  This encoding is system dependent and only used on Windows systems.
--
diff --git a/gcc/ada/sysdep.c b/gcc/ada/sysdep.c
index 254c736bec43..1f65f433f507 100644
--- a/gcc/ada/sysdep.c
+++ b/gcc/ada/sysdep.c
@@ -177,8 +177,8 @@ __gnat_set_text_mode (int handle)
 void
 __gnat_set_mode (int handle, int mode)
 {
-  /*  the values here must be synchronized with
-  System.File_Control_Block.Content_Encodding:
+  /*  The values here must be synchronized with
+  Interfaces.C_Streams.Content_Encoding:
 
   None = 0
   Default_Text = 1
@@ -200,8 +200,8 @@ __gnat_set_mode (int handle, int mode)
 void
 __gnat_set_mode (int handle, int mode)
 {
-  /*  the values here must be synchronized with
-  System.File_Control_Block.Content_Encodding:
+  /*  The values here must be synchronized with
+  Interfaces.C_Streams.Content_Encoding:
 
   None = 0
   Default_Text = 1

[gcc r15-4898] ada: Correction to disable self-referential with_clauses

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:e2f073947a324bbfee866d9282bb778ddead95f4

commit r15-4898-ge2f073947a324bbfee866d9282bb778ddead95f4
Author: Bob Duff 
Date:   Wed Oct 9 07:25:14 2024 -0400

ada: Correction to disable self-referential with_clauses

Follow-on to previous change "Disable self-referential with_clauses",
which caused some regressions. Remove useless use clauses referring
to useless self-referential with'ed packages. This is necessary
because in some cases, such use clauses cause the compiler to
crash or give spurious errors.

In addition, enable the warning on self-referential with_clauses.

gcc/ada/ChangeLog:

* sem_ch10.adb (Analyze_With_Clause): In the case of a
self-referential with clause, if there is a subsequent use clause
for the same package (which is necessarily useless), remove it from
the context clause. Reenable the warning.

Diff:
---
 gcc/ada/sem_ch10.adb | 25 +++--
 1 file changed, 23 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/sem_ch10.adb b/gcc/ada/sem_ch10.adb
index 202a44eb87c1..4e582440c40c 100644
--- a/gcc/ada/sem_ch10.adb
+++ b/gcc/ada/sem_ch10.adb
@@ -3039,11 +3039,32 @@ package body Sem_Ch10 is
 
  --  Self-referential withs are always useless, so warn
 
- if Warn_On_Redundant_Constructs and then False then -- ???
---  Disable for now, because it breaks SPARK builds
+ if Warn_On_Redundant_Constructs then
 Error_Msg_N ("unnecessary with of self?r?", N);
  end if;
 
+ declare
+This : Node_Id := Next (N);
+ begin
+--  Remove subsequent use clauses for the same package
+
+while Present (This) loop
+   declare
+  Nxt : constant Node_Id := Next (This);
+   begin
+  if Nkind (This) = N_Use_Package_Clause
+and then Same_Name (Name (N), Name (This))
+  then
+ if not More_Ids (This) and not Prev_Ids (This) then
+Remove (This);
+ end if;
+  end if;
+
+  This := Nxt;
+   end;
+end loop;
+ end;
+
   --  Normal (non-self-referential) case
 
   else

[gcc r15-4896] ada: Fix visibility of Taft amendment types

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:5990d3e7163ff79829cf93524ac90ea3d6d901ec

commit r15-4896-g5990d3e7163ff79829cf93524ac90ea3d6d901ec
Author: Piotr Trojanek 
Date:   Tue Oct 8 22:52:38 2024 +0200

ada: Fix visibility of Taft amendment types

When uninstalling private package declarations we must mark Taft
amendment types hidden, just like we mark other types.

Looking at previous revisions of this code, it is quite clear that this
bug comes from a code evolution and marking types should happen in all
ELSE branches of the enclosing IF statement.

gcc/ada/ChangeLog:

* sem_ch7.adb (Uninstall_Declarations): Mark Taft amendment
types like we mark other types declared in private package
declarations.

Diff:
---
 gcc/ada/sem_ch7.adb | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/ada/sem_ch7.adb b/gcc/ada/sem_ch7.adb
index 28031b5dbc27..07a88fee0ec3 100644
--- a/gcc/ada/sem_ch7.adb
+++ b/gcc/ada/sem_ch7.adb
@@ -3375,6 +3375,9 @@ package body Sem_Ch7 is
end loop;
 end;
 
+Set_Is_Hidden (Id);
+Set_Is_Potentially_Use_Visible (Id, False);
+
  --  For subtypes of private types the frontend generates two entities:
  --  one associated with the partial view and the other associated with
  --  the full view. When the subtype declaration is public the frontend

[gcc r15-4903] ada: Fix alignment of pthread_mutex_t

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:758a95db8a9ee0048a5de5334b59027535e2ecbc

commit r15-4903-g758a95db8a9ee0048a5de5334b59027535e2ecbc
Author: Daniel King 
Date:   Fri Sep 13 16:16:52 2024 +0100

ada: Fix alignment of pthread_mutex_t

On most targets the alignment of unsigned long is the same as pointer
alignment, but on CHERI targets pointers have larger alignment (16 bytes
compared to 8 bytes). pthread_mutex_t needs the same alignment as
System.Address to account for CHERI targets.

gcc/ada/ChangeLog:

* libgnat/s-oslock__posix.ads: Fix alignment of pthread_mutex_t
for CHERI targets.

Diff:
---
 gcc/ada/libgnat/s-oslock__posix.ads | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/libgnat/s-oslock__posix.ads 
b/gcc/ada/libgnat/s-oslock__posix.ads
index e2c237f26981..cde92e5f23a3 100644
--- a/gcc/ada/libgnat/s-oslock__posix.ads
+++ b/gcc/ada/libgnat/s-oslock__posix.ads
@@ -52,6 +52,11 @@ private
   Data : char_array (1 .. OS_Constants.PTHREAD_MUTEX_SIZE);
end record;
pragma Convention (C, pthread_mutex_t);
-   for pthread_mutex_t'Alignment use Interfaces.C.unsigned_long'Alignment;
+   for pthread_mutex_t'Alignment use
+ Integer'Max (Interfaces.C.unsigned_long'Alignment,
+  System.Address'Alignment);
+   --  On some targets (e.g. CHERI), pointers have larger alignment than
+   --  unsigned_long. On other targets (e.g. some 16-bit targets) long is
+   --  larger than a pointer. Choose the largest to err on the side of caution.
 
 end System.OS_Locks;

[gcc r15-4902] ada: Move formal hash tables from gnat repository to the SPARK library

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:010cf71da79f001e40a29aa4ebef27e5dbf7fce8

commit r15-4902-g010cf71da79f001e40a29aa4ebef27e5dbf7fce8
Author: Claire Dross 
Date:   Thu Oct 10 16:51:13 2024 +0200

ada: Move formal hash tables from gnat repository to the SPARK library

The formal containers have been part of the SPARK library for some
time now. However, some units used only by these containers are still
part of the gnat repository. Move them to the SPARK library.

gcc/ada/ChangeLog:

* Makefile.rtl: Remove references to moved units.
* libgnat/a-chtgfk.adb: Removed.
* libgnat/a-chtgfk.ads: Removed.
* libgnat/a-chtgfo.adb: Removed.
* libgnat/a-chtgfo.ads: Removed.
* libgnat/a-cohata.ads (Generic_Formal_Hash_Table_Types): Removed.

Diff:
---
 gcc/ada/Makefile.rtl |   2 -
 gcc/ada/libgnat/a-chtgfk.adb | 278 -
 gcc/ada/libgnat/a-chtgfk.ads | 101 ---
 gcc/ada/libgnat/a-chtgfo.adb | 413 ---
 gcc/ada/libgnat/a-chtgfo.ads | 114 
 gcc/ada/libgnat/a-cohata.ads |  19 --
 6 files changed, 927 deletions(-)

diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
index a36f60170b5e..8656e71250bb 100644
--- a/gcc/ada/Makefile.rtl
+++ b/gcc/ada/Makefile.rtl
@@ -120,8 +120,6 @@ GNATRTL_NONTASKING_OBJS= \
   a-chlat9$(objext) \
   a-chtgbk$(objext) \
   a-chtgbo$(objext) \
-  a-chtgfk$(objext) \
-  a-chtgfo$(objext) \
   a-chtgke$(objext) \
   a-chtgop$(objext) \
   a-chzla1$(objext) \
diff --git a/gcc/ada/libgnat/a-chtgfk.adb b/gcc/ada/libgnat/a-chtgfk.adb
deleted file mode 100644
index 1e0dd8af9f9f..
--- a/gcc/ada/libgnat/a-chtgfk.adb
+++ /dev/null
@@ -1,278 +0,0 @@
---
---  --
--- GNAT LIBRARY COMPONENTS  --
---  --
---   ADA.CONTAINERS.HASH_TABLES.GENERIC_FORMAL_KEYS --
---  --
--- B o d y  --
---  --
---  Copyright (C) 2004-2024, Free Software Foundation, Inc. --
---  --
--- GNAT is free software;  you can  redistribute it  and/or modify it under --
--- terms of the  GNU General Public License as published  by the Free Soft- --
--- ware  Foundation;  either version 3,  or (at your option) any later ver- --
--- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
--- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
--- or FITNESS FOR A PARTICULAR PURPOSE. --
---  --
--- As a special exception under Section 7 of GPL version 3, you are granted --
--- additional permissions described in the GCC Runtime Library Exception,   --
--- version 3.1, as published by the Free Software Foundation.   --
---  --
--- You should have received a copy of the GNU General Public License and--
--- a copy of the GCC Runtime Library Exception along with this program; --
--- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see--
--- .  --
---  --
--- This unit was originally developed by Matthew J Heaney.  --
---
-
-package body Ada.Containers.Hash_Tables.Generic_Formal_Keys is
-
-   Checks : constant Boolean := Container_Checks'Enabled;
-
-   --
-   -- Delete_Key_Sans_Free --
-   --
-
-   procedure Delete_Key_Sans_Free
- (HT  : in out Hash_Table_Type;
-  Key : Key_Type;
-  X   : out Count_Type)
-   is
-  Indx : Hash_Type;
-  Prev : Count_Type;
-
-   begin
-  if HT.Length = 0 then
- X := 0;
- return;
-  end if;
-
-  Indx := Index (HT, Key);
-  X := HT.Buckets (Indx);
-
-  if X = 0 then
- return;
-  end if;
-
-  if Equivalent_Keys (Key, HT.Nodes (X)) then
- HT.Buckets (Indx) := Next (HT.Nodes (X));
- HT.Length := HT.Length - 1;
- return;
-  end if;
-
-  loop
- Prev := X;
- X := Next (HT.Nodes (Prev));
-
- if X = 0 then
-return;
- end if;
-
- if Equivalent_Keys (Key, HT.Nodes (X))

[gcc r15-4905] ada: Build and runtime support for CheriBSD

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:0bebf55d4efcb8b045850d0224d71daa0807b1f9

commit r15-4905-g0bebf55d4efcb8b045850d0224d71daa0807b1f9
Author: Daniel King 
Date:   Fri Sep 13 16:15:32 2024 +0100

ada: Build and runtime support for CheriBSD

SIGPROT is a new signal on CheriBSD that signals a CHERI protection 
violation.
The full runtime converts these to the appropriate Ada exception declared in
Interfaces.CHERI.Exceptions.

gcc/ada/ChangeLog:

* Makefile.rtl: Build support for Morello CheriBSD.
* libgnarl/s-intman__cheribsd.adb: New file for CheriBSD.
* libgnarl/s-osinte__cheribsd.ads: New file for CheriBSD.

Diff:
---
 gcc/ada/Makefile.rtl|  18 +-
 gcc/ada/libgnarl/s-intman__cheribsd.adb | 332 
 gcc/ada/libgnarl/s-osinte__cheribsd.ads | 683 
 3 files changed, 1030 insertions(+), 3 deletions(-)

diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
index 8656e71250bb..904ec34026fc 100644
--- a/gcc/ada/Makefile.rtl
+++ b/gcc/ada/Makefile.rtl
@@ -1789,10 +1789,8 @@ ifeq ($(strip $(filter-out %aarch64 
freebsd%,$(target_cpu) $(target_os))),)
   a-nallfl.adshttp://www.gnu.org/licenses/>.  --
+--  --
+-- GNARL was developed by the GNARL team at Florida State University.   --
+-- Extensive contributions were provided by Ada Core Technologies, Inc. --
+--  --
+--
+
+--  This is the POSIX threads version of this package, adapted for CheriBSD
+
+--  Make a careful study of all signals available under the OS, to see which
+--  need to be reserved, kept always unmasked, or kept always unmasked. Be on
+--  the lookout for special signals that may be used by the thread library.
+
+--  Since this is a multi target file, the signal <-> exception mapping
+--  is simple minded. If you need a more precise and target specific
+--  signal handling, create a new s-intman.adb that will fit your needs.
+
+--  This file assumes that:
+
+--SIGFPE, SIGILL, SIGSEGV and SIGBUS exist. They are mapped as follows:
+--  SIGPFE  => Constraint_Error
+--  SIGILL  => Program_Error
+--  SIGSEGV => Storage_Error
+--  SIGBUS  => Storage_Error
+
+--SIGINT exists and will be kept unmasked unless the pragma
+-- Unreserve_All_Interrupts is specified anywhere in the application.
+
+--System.OS_Interface contains the following:
+--  SIGADAABORT: the signal that will be used to abort tasks.
+--  Unmasked: the OS specific set of signals that should be unmasked in
+--all the threads. SIGADAABORT is unmasked by
+--default
+--  Reserved: the OS specific set of signals that are reserved.
+
+with Interfaces.CHERI.Exceptions;
+with System.Task_Primitives;
+
+package body System.Interrupt_Management is
+
+   use Interfaces.C;
+   use Interfaces.CHERI.Exceptions;
+   use System.OS_Interface;
+
+   type Interrupt_List is array (Interrupt_ID range <>) of Interrupt_ID;
+   Exception_Interrupts : constant Interrupt_List :=
+ [SIGFPE, SIGILL, SIGSEGV, SIGBUS];
+
+   Unreserve_All_Interrupts : constant Interfaces.C.int;
+   pragma Import
+ (C, Unreserve_All_Interrupts, "__gl_unreserve_all_interrupts");
+
+   ---
+   -- Local Subprograms --
+   ---
+
+   function State (Int : Interrupt_ID) return Character;
+   pragma Import (C, State, "__gnat_get_interrupt_state");
+   --  Get interrupt state. Defined in init.c The input argument is the
+   --  interrupt number, and the result is one of the following:
+
+   User: constant Character := 'u';
+   Runtime : constant Character := 'r';
+   Default : constant Character := 's';
+   --'n'   this interrupt not set by any Interrupt_State pragma
+   --'u'   Interrupt_State pragma set state to User
+   --'r'   Interrupt_State pragma set state to Runtime
+   --'s'   Interrupt_State pragma set state to System (use "default"
+   --   system handler)
+
+   procedure Notify_Exception
+ (signo: Signal;
+  siginfo  : access siginfo_t;
+  ucontext : System.Address);
+   --  This function identifies the Ada exception to be raised using the
+   --  information when the system received a synchronous signal. Since this
+   --  function is machine and OS dependent, different code has to be provided
+   --  for different target.
+
+   --
+   -- Notify_Exception --
+   --
+
+   Signal_Mask : aliased sigset_t;
+   --  The set of signals handled by Notify_Exception
+
+   procedure Notify_Exception
+ (signo: Signal;
+  siginfo  : access siginfo_t;
+  ucontext : System.Address)
+   is
+  Result : Interfaces.C.int;
+
+   begin
+  --  

[gcc r15-4911] ada: Add CHERI variant of full secondary stack allocator

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:81ffd5e413e577221a4696fe915b851f1bd4788b

commit r15-4911-g81ffd5e413e577221a4696fe915b851f1bd4788b
Author: Daniel King 
Date:   Mon Oct 14 10:09:28 2024 +0100

ada: Add CHERI variant of full secondary stack allocator

gcc/ada/ChangeLog:

* Makefile.rtl: Use s-secsta__cheri.adb on Morello CheriBSD.
* libgnat/s-secsta__cheri.adb: New file.

Diff:
---
 gcc/ada/Makefile.rtl|3 +-
 gcc/ada/libgnat/s-secsta__cheri.adb | 1085 +++
 2 files changed, 1087 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
index 904ec34026fc..4d32bc471857 100644
--- a/gcc/ada/Makefile.rtl
+++ b/gcc/ada/Makefile.rtl
@@ -1805,7 +1805,8 @@ ifeq ($(strip $(filter-out %aarch64 
freebsd%,$(target_cpu) $(target_os))),)
   ifneq (,$(findstring morello,$(target_alias)))
 LIBGNAT_TARGET_PAIRS += \
 s-intman.adbhttp://www.gnu.org/licenses/>.  --
+--  --
+-- GNAT was originally developed  by the GNAT team at  New York University. --
+-- Extensive contributions were provided by Ada Core Technologies Inc.  --
+--  --
+--
+
+with Ada.Unchecked_Conversion;
+with Ada.Unchecked_Deallocation;
+
+with Interfaces.CHERI;use Interfaces.CHERI;
+with System.Parameters;   use System.Parameters;
+with System.Soft_Links;   use System.Soft_Links;
+with System.Storage_Elements; use System.Storage_Elements;
+
+package body System.Secondary_Stack is
+
+   
+   -- Binder Allocated Stack Support --
+   
+
+   --  When at least one of the following restrictions
+   --
+   --No_Implicit_Heap_Allocations
+   --No_Implicit_Task_Allocations
+   --
+   --  is in effect, the binder creates a static secondary stack pool, where
+   --  each stack has a default size. Assignment of these stacks to tasks is
+   --  performed by SS_Init. The following variables are defined in this unit
+   --  in order to avoid depending on the binder. Their values are set by the
+   --  binder.
+
+   Binder_SS_Count : Natural := 0;
+   pragma Export (Ada, Binder_SS_Count, "__gnat_binder_ss_count");
+   --  The number of secondary stacks in the pool created by the binder
+
+   Binder_Default_SS_Size : Size_Type;
+   pragma Export (Ada, Binder_Default_SS_Size, "__gnat_default_ss_size");
+   --  The default secondary stack size as specified by the binder. The value
+   --  is defined here rather than in init.c or System.Init because the ZFP and
+   --  Ravenscar-ZFP run-times lack these locations.
+
+   Binder_Default_SS_Pool : Address;
+   pragma Export (Ada, Binder_Default_SS_Pool, "__gnat_default_ss_pool");
+   --  The address of the secondary stack pool created by the binder
+
+   Binder_Default_SS_Pool_Index : Natural := 0;
+   --  Index into the secondary stack pool created by the binder
+
+   ---
+   -- Local subprograms --
+   ---
+
+   procedure Allocate_Dynamic
+ (Stack: SS_Stack_Ptr;
+  Mem_Size : Memory_Size;
+  Addr : out Address);
+   pragma Inline (Allocate_Dynamic);
+   --  Allocate enough space on dynamic secondary stack Stack to fit a request
+   --  of size Mem_Size. Addr denotes the address of the first byte of the
+   --  allocation.
+
+   procedure Allocate_On_Chunk
+ (Stack  : SS_Stack_Ptr;
+  Prev_Chunk : SS_Chunk_Ptr;
+  Chunk  : SS_Chunk_Ptr;
+  Byte   : Memory_Index;
+  Mem_Size   : Memory_Size;
+  Addr   : out Address);
+   pragma Inline (Allocate_On_Chunk);
+   --  Allocate enough space on chunk Chunk to fit a request of size Mem_Size.
+   --  Stack is the owner of the allocation Chunk. Prev_Chunk is the preceding
+   --  chunk of Chunk. Byte indicates the first free byte within Chunk. Addr
+   --  denotes the address of the first byte of the allocation. This routine
+   --  updates the state of Stack.all to reflect the side effects of the
+   --  allocation.
+
+   procedure Allocate_Static
+ (Stack: SS_Stack_Ptr;
+  Mem_Size : Memory_Size;
+  Addr : out Address);
+   pragma Inline (Allocate_Static);
+   --  Allocate enough space on static secondary stack Stack to fit a request
+   --  of size Mem_Size. Addr denotes the address of the first byte of the
+   --  allocation.
+
+   procedure Free is new Ada.Unchecked_Deallocation (SS_Chunk, SS_Chunk_Ptr);
+   --  Free a dynamically allocated chunk
+
+   procedure Free is new Ada.Unchecked_Deallocation (SS_Stack, SS_Stack_Ptr);
+   --  Free a dynamically allocated secondary stack
+
+   function Has_Enough_Free_Memory
+ (Chunk: SS_Chunk_Ptr;
+  Byte : Memory_Index;
+  Mem_Size : M

[gcc r15-4907] ada: Tweak CPU affinity handling

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:0c8bdc2411b3b123820f5b93d9ae7d8d12e06739

commit r15-4907-g0c8bdc2411b3b123820f5b93d9ae7d8d12e06739
Author: Ronan Desplanques 
Date:   Fri Oct 11 14:54:15 2024 +0200

ada: Tweak CPU affinity handling

The primary motivation for this change is making the taskset command
line tool work as expected for tasking programs that don't use features
from section D.16 of the Ada reference manual. A couple of components
are added to the ATCB record to make it possible to tell values that
come from explicit aspects and subprogram calls from values that are
inherited from activating tasks.

gcc/ada/ChangeLog:

* libgnarl/s-mudido__affinity.adb (Unchecked_Set_Affinity): Set new
ATCB component.
* libgnarl/s-taprop__linux.adb (Create_Task): Only set CPU affinity
when required.
(Requires_Affinity_Change): New subprogram.
(Set_Task_Affinity): Likewise.
* libgnarl/s-tarest.adb (Create_Restricted_Task): Adapt to
Initialize_ATCB change.
* libgnarl/s-taskin.adb (Initialize_ATCB): Update parameter list.
Record whether aspects were explicitly specified.
* libgnarl/s-taskin.ads (Common_ATCB): Add component.
* libgnarl/s-tassta.adb (Create_Task): Update call to 
Initialize_ATCB.
* libgnarl/s-tporft.adb (Register_Foreign_Thread): Likewise.

Diff:
---
 gcc/ada/libgnarl/s-mudido__affinity.adb |  1 +
 gcc/ada/libgnarl/s-taprop__linux.adb| 27 +++--
 gcc/ada/libgnarl/s-tarest.adb   |  3 ++-
 gcc/ada/libgnarl/s-taskin.adb   | 12 ++-
 gcc/ada/libgnarl/s-taskin.ads   | 36 ++---
 gcc/ada/libgnarl/s-tassta.adb   |  3 ++-
 gcc/ada/libgnarl/s-tporft.adb   |  4 ++--
 7 files changed, 63 insertions(+), 23 deletions(-)

diff --git a/gcc/ada/libgnarl/s-mudido__affinity.adb 
b/gcc/ada/libgnarl/s-mudido__affinity.adb
index ec8c8f6c19f8..e9c17ef68b6e 100644
--- a/gcc/ada/libgnarl/s-mudido__affinity.adb
+++ b/gcc/ada/libgnarl/s-mudido__affinity.adb
@@ -367,6 +367,7 @@ package body System.Multiprocessors.Dispatching_Domains is
   --  Attach the CPU to the task
 
   T.Common.Base_CPU := CPU;
+  T.Common.CPU_Is_Explicit := True;
 
   --  Change the number of tasks attached to a given task in the system
   --  domain if needed.
diff --git a/gcc/ada/libgnarl/s-taprop__linux.adb 
b/gcc/ada/libgnarl/s-taprop__linux.adb
index 0a51b3601c07..d9425e0d2fa6 100644
--- a/gcc/ada/libgnarl/s-taprop__linux.adb
+++ b/gcc/ada/libgnarl/s-taprop__linux.adb
@@ -259,6 +259,11 @@ package body System.Task_Primitives.Operations is
--  Initialize the lock L. If Ceiling_Support is True, then set the ceiling
--  to Prio. Returns 0 for success, or ENOMEM for out-of-memory.
 
+   function Requires_Affinity_Change
+ (Domain : Dispatching_Domain_Access) return Boolean;
+   --  Returns whether a call to pthread_setaffinity_np is required to assign a
+   --  task to Domain.
+
---
-- Abort_Handler --
---
@@ -521,6 +526,20 @@ package body System.Task_Primitives.Operations is
   Ceiling_Violation := Result = EINVAL;
end Read_Lock;
 
+   --
+   -- Requires_Affinity_Change --
+   --
+
+   function Requires_Affinity_Change
+ (Domain : Dispatching_Domain_Access) return Boolean is
+   begin
+  return
+Domain /= System_Domain
+or else Domain.all
+/= [Multiprocessors.CPU'First
+.. Multiprocessors.Number_Of_CPUs => True];
+   end Requires_Affinity_Change;
+

-- Unlock --

@@ -941,7 +960,9 @@ package body System.Task_Primitives.Operations is
 
   --  Support is available
 
-  elsif T.Common.Base_CPU /= Multiprocessors.Not_A_Specific_CPU then
+  elsif T.Common.CPU_Is_Explicit
+and then T.Common.Base_CPU /= Multiprocessors.Not_A_Specific_CPU
+  then
  declare
 CPUs: constant size_t :=
 C.size_t (Multiprocessors.Number_Of_CPUs);
@@ -971,7 +992,7 @@ package body System.Task_Primitives.Operations is
 
   --  Handle dispatching domains
 
-  else
+  elsif Requires_Affinity_Change (T.Common.Domain) then
  declare
 CPUs: constant size_t :=
 C.size_t (Multiprocessors.Number_Of_CPUs);
@@ -1464,6 +1485,8 @@ package body System.Task_Primitives.Operations is
 
   if pthread_setaffinity_np'Address /= Null_Address
 and then T.Common.LL.Thread /= Null_Thread_Id
+and then (T.Common.CPU_Is_Explicit
+  or else Requires_Affinity_Change (T.Common.Domain))
   then
  declare
 CPUs : constant size_t :=
diff --git a/gcc/ada/libgnarl/s-tarest.adb b/gcc/ada/libgnarl/s-tarest.adb
inde

[gcc r15-4909] ada: Add Invocation node to the SARIF report

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:e6d88c002305f4840d4add9316e551c5ae04333d

commit r15-4909-ge6d88c002305f4840d4add9316e551c5ae04333d
Author: Viljar Indus 
Date:   Fri Oct 11 16:34:36 2024 +0300

ada: Add Invocation node to the SARIF report

Add an invocation node to the SARIF report that contains the
command line use to activate gnat and whether the execution was
successful or not.

gcc/ada/ChangeLog:

* diagnostics-sarif_emitter.adb (Print_Runs): Add printing for
the invocation node that consists of a single invocations that
is composed of the commandLine and executionSuccessful attributes.

Diff:
---
 gcc/ada/diagnostics-sarif_emitter.adb | 81 ++-
 1 file changed, 80 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/diagnostics-sarif_emitter.adb 
b/gcc/ada/diagnostics-sarif_emitter.adb
index fe251f9754db..b6035c2970d6 100644
--- a/gcc/ada/diagnostics-sarif_emitter.adb
+++ b/gcc/ada/diagnostics-sarif_emitter.adb
@@ -28,6 +28,10 @@ with Diagnostics.JSON_Utils; use Diagnostics.JSON_Utils;
 with Gnatvsn;use Gnatvsn;
 with Output; use Output;
 with Sinput; use Sinput;
+with Lib;use Lib;
+with Namet;  use Namet;
+with Osint;  use Osint;
+with Errout; use Errout;
 
 package body Diagnostics.SARIF_Emitter is
 
@@ -94,6 +98,19 @@ package body Diagnostics.SARIF_Emitter is
--...
--  ]
 
+   procedure Print_Invocations;
+   --  Print an invocations node that consists of
+   --  * a single invocation node that consists of:
+   --* commandLine
+   --* executionSuccessful
+   --
+   --  "invocations": [
+   --{
+   --  "commandLine": ,
+   --  "executionSuccessful": ["true"|"false"],
+   --}
+   --  ]
+
procedure Print_Artifact_Change (A : Artifact_Change);
--  Print an ArtifactChange node
--
@@ -573,6 +590,63 @@ package body Diagnostics.SARIF_Emitter is
   Write_Char (']');
end Print_Fixes;
 
+   ---
+   -- Print_Invocations --
+   ---
+
+   procedure Print_Invocations is
+
+  function Compose_Command_Line return String;
+  --  Composes the original command line from the parsed main file name and
+  --  relevant compilation switches
+
+  function Compose_Command_Line return String is
+ Buffer : Bounded_String;
+  begin
+ Append (Buffer, Get_First_Main_File_Name);
+ for I in 1 .. Compilation_Switches_Last loop
+declare
+   Switch : constant String := Get_Compilation_Switch (I).all;
+begin
+   if Buffer.Length + Switch'Length + 1 <= Buffer.Max_Length then
+  Append (Buffer, ' ' & Switch);
+   end if;
+end;
+ end loop;
+
+ return +Buffer;
+  end Compose_Command_Line;
+
+   begin
+  Write_Str ( & "invocations" &  & ": " & "[");
+  Begin_Block;
+  NL_And_Indent;
+
+  Write_Char ('{');
+  Begin_Block;
+  NL_And_Indent;
+
+  --  Print commandLine
+
+  Write_String_Attribute ("commandLine", Compose_Command_Line);
+  Write_Char (',');
+  NL_And_Indent;
+
+  --  Print executionSuccessful
+
+  Write_String_Attribute
+("executionSuccessful",
+ (if Compilation_Errors then "false" else "true"));
+
+  End_Block;
+  NL_And_Indent;
+  Write_Char ('}');
+
+  End_Block;
+  NL_And_Indent;
+  Write_Char (']');
+   end Print_Invocations;
+
--
-- Print_Region --
--
@@ -1052,6 +1126,12 @@ package body Diagnostics.SARIF_Emitter is
   Write_Char (',');
   NL_And_Indent;
 
+  --  A run consists of an invocation
+  Print_Invocations;
+
+  Write_Char (',');
+  NL_And_Indent;
+
   --  A run consists of results
 
   Print_Results (Diags);
@@ -1076,7 +1156,6 @@ package body Diagnostics.SARIF_Emitter is

 
procedure Print_SARIF_Report (Diags : Diagnostic_List) is
-
begin
   Write_Char ('{');
   Begin_Block;

[gcc r15-4912] ada: Missing runtime check in interpolated string

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:7c7a8d60881fb727ce8ed4685bc1f484834db110

commit r15-4912-g7c7a8d60881fb727ce8ed4685bc1f484834db110
Author: Javier Miranda 
Date:   Tue Oct 15 09:32:43 2024 +

ada: Missing runtime check in interpolated string

When the type imposed by the context for an interpolated string is
constrained, the compiler silently omits adding a runtime check.

gcc/ada/ChangeLog:

* exp_ch2.adb (Expand_N_Interpolated_String_Literal): Use the
base type of the type imposed by the context for building the
interpolated string image; required to allow the expander adding
the missing runtime check when the target type is constrained.
(Apply_Static_Length_Check): New subprogram.

Diff:
---
 gcc/ada/exp_ch2.adb | 72 ++---
 1 file changed, 69 insertions(+), 3 deletions(-)

diff --git a/gcc/ada/exp_ch2.adb b/gcc/ada/exp_ch2.adb
index 99a169475250..aacf26c51281 100644
--- a/gcc/ada/exp_ch2.adb
+++ b/gcc/ada/exp_ch2.adb
@@ -51,7 +51,9 @@ with Sinfo.Utils;use Sinfo.Utils;
 with Sinput; use Sinput;
 with Snames; use Snames;
 with Stand;
+with Stringt;use Stringt;
 with Tbuild; use Tbuild;
+with Uintp;   use Uintp;
 
 package body Exp_Ch2 is
 
@@ -721,6 +723,12 @@ package body Exp_Ch2 is
 
procedure Expand_N_Interpolated_String_Literal (N : Node_Id) is
 
+  procedure Apply_Static_Length_Check (Typ : Entity_Id);
+  --  Tries to determine statically whether the length of the interpolated
+  --  string N exceeds the length of the target subtype Typ. If it can be
+  --  determined at compile time then an N_Raise_Constraint_Error node
+  --  replaces the interpolated string N, and a warning message is issued.
+
   function Build_Interpolated_String_Image (N : Node_Id) return Node_Id;
   --  Build the following Expression_With_Actions node:
   -- do
@@ -733,6 +741,47 @@ package body Exp_Ch2 is
   --Destroy (Sink);
   -- in Result end
 
+  ---
+  -- Apply_Static_Length_Check --
+  ---
+
+  procedure Apply_Static_Length_Check (Typ : Entity_Id) is
+ HB : constant Node_Id := High_Bound (First_Index (Typ));
+ LB : constant Node_Id := Low_Bound (First_Index (Typ));
+ Str_Elem   : Node_Id;
+ Str_Length : Nat;
+ Typ_Length : Nat;
+
+  begin
+ if Compile_Time_Known_Value (LB)
+   and then Compile_Time_Known_Value (HB)
+ then
+Typ_Length := UI_To_Int (Expr_Value (HB) - Expr_Value (LB) + 1);
+
+--  Compute the minimum length of the interpolated string: the
+--  length of the concatenation of the string literals composing
+--  the interpolated string.
+
+Str_Length := 0;
+Str_Elem   := First (Expressions (N));
+while Present (Str_Elem) loop
+   if Nkind (Str_Elem) = N_String_Literal then
+  Str_Length := Str_Length + String_Length (Strval (Str_Elem));
+   end if;
+
+   Next (Str_Elem);
+end loop;
+
+if Str_Length > Typ_Length then
+   Apply_Compile_Time_Constraint_Error
+ (N, "wrong length for interpolated string of}??",
+  CE_Length_Check_Failed,
+  Ent => Typ,
+  Typ => Typ);
+end if;
+ end if;
+  end Apply_Static_Length_Check;
+
   -
   -- Build_Interpolated_String_Image --
   -
@@ -747,10 +796,11 @@ package body Exp_Ch2 is
  Object_Definition =>
New_Occurrence_Of (RTE (RE_Buffer_Type), Loc));
 
+ B_Type: constant Entity_Id := Base_Type (Etype (N));
  Get_Id: constant RE_Id :=
-   (if Etype (N) = Stand.Standard_String then
+   (if B_Type = Stand.Standard_String then
RE_Get
-elsif Etype (N) = Stand.Standard_Wide_String then
+elsif B_Type = Stand.Standard_Wide_String then
RE_Wide_Get
 else
RE_Wide_Wide_Get);
@@ -760,7 +810,7 @@ package body Exp_Ch2 is
Make_Object_Declaration (Loc,
  Defining_Identifier => Result_Entity,
  Object_Definition =>
-   New_Occurrence_Of (Etype (N), Loc),
+   New_Occurrence_Of (B_Type, Loc),
  Expression =>
Make_Function_Call (Loc,
  Name

[gcc r15-4910] ada: CheriBSD: add SIGPROT handler

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:7b96c61776040822bb6a95bfb89e44b6d61cf602

commit r15-4910-g7b96c61776040822bb6a95bfb89e44b6d61cf602
Author: Daniel King 
Date:   Mon Oct 14 10:08:26 2024 +0100

ada: CheriBSD: add SIGPROT handler

gcc/ada/ChangeLog:

* libgnarl/s-intman__cheribsd.adb: Add SIGPROT to interrupt list.

Diff:
---
 gcc/ada/libgnarl/s-intman__cheribsd.adb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/libgnarl/s-intman__cheribsd.adb 
b/gcc/ada/libgnarl/s-intman__cheribsd.adb
index 3b5f16d01c58..c6d7d0b0a54f 100644
--- a/gcc/ada/libgnarl/s-intman__cheribsd.adb
+++ b/gcc/ada/libgnarl/s-intman__cheribsd.adb
@@ -68,7 +68,7 @@ package body System.Interrupt_Management is
 
type Interrupt_List is array (Interrupt_ID range <>) of Interrupt_ID;
Exception_Interrupts : constant Interrupt_List :=
- [SIGFPE, SIGILL, SIGSEGV, SIGBUS];
+ [SIGFPE, SIGILL, SIGSEGV, SIGBUS, SIGPROT];
 
Unreserve_All_Interrupts : constant Interfaces.C.int;
pragma Import

[gcc r15-4918] ada: Fix crash on default value with nested iterated component associations

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:7bcfdac0ef763587efd014310b779e192b143c62

commit r15-4918-g7bcfdac0ef763587efd014310b779e192b143c62
Author: Eric Botcazou 
Date:   Wed Oct 16 09:05:55 2024 +0200

ada: Fix crash on default value with nested iterated component associations

The problem is that the freeze node for the type of the element ends up in
the component list of the record type declared with the default value.

gcc/ada/ChangeLog:

PR ada/113036
* freeze.adb (Freeze_Expression): Deal with freezing actions coming
from within nested internal loops present in spec expressions.

Diff:
---
 gcc/ada/freeze.adb | 23 +++
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/gcc/ada/freeze.adb b/gcc/ada/freeze.adb
index 9a862176c30a..7502a04d5175 100644
--- a/gcc/ada/freeze.adb
+++ b/gcc/ada/freeze.adb
@@ -9055,8 +9055,9 @@ package body Freeze is
 or else Ekind (Current_Scope) = E_Void
   then
  declare
-Freeze_Nodes : List_Id := No_List;
-Pos  : Int := Scope_Stack.Last;
+Freeze_Nodes : List_Id   := No_List;
+Pos  : Int   := Scope_Stack.Last;
+Scop : Entity_Id := Current_Scope;
 
  begin
 if Present (Desig_Typ) then
@@ -9083,12 +9084,18 @@ package body Freeze is
 --  If the expression is within a top-level pragma, as for a pre-
 --  condition on a library-level subprogram, nothing to do.
 
-if not Is_Compilation_Unit (Current_Scope)
-  and then (Is_Record_Type (Scope (Current_Scope))
- or else (Ekind (Current_Scope) in E_Block | E_Loop
-   and then Is_Internal (Current_Scope)))
-then
-   Pos := Pos - 1;
+if not Is_Compilation_Unit (Scop) then
+   if Is_Record_Type (Scope (Scop)) then
+  Pos := Pos - 1;
+
+   else
+  while Ekind (Scop) in E_Block | E_Loop
+and then Is_Internal (Scop)
+  loop
+ Pos  := Pos - 1;
+ Scop := Scope (Scop);
+  end loop;
+   end if;
 end if;
 
 if Is_Non_Empty_List (Freeze_Nodes) then

[gcc r15-4915] ada: Update documentation for -gnatVxx switches

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:420b9b99d67bb99efd1e23dabe1ed5e23737989d

commit r15-4915-g420b9b99d67bb99efd1e23dabe1ed5e23737989d
Author: Viljar Indus 
Date:   Tue Oct 15 13:49:07 2024 +0300

ada: Update documentation for -gnatVxx switches

Imporve the wording to explicitly state which options are turned on
by -gnatVa and that -gnatVd is enabled by default.

It can be somewhat hard to decifer that information from the old
wording. Especially when compared to -gnatWxx switches where there
is an elaborate scheme for describing those properties.

gcc/ada/ChangeLog:

* usage.adb: Update the wording for -gnatVa and -gnatVd.

Diff:
---
 gcc/ada/usage.adb | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/usage.adb b/gcc/ada/usage.adb
index 38a82beb615b..d2857c922b1c 100644
--- a/gcc/ada/usage.adb
+++ b/gcc/ada/usage.adb
@@ -443,10 +443,12 @@ begin
Write_Switch_Char ("Vxx");
Write_Line
  ("Enable selected validity checking mode, xx = list of parameters:");
-   Write_Line ("aturn on all validity checking options");
+   Write_Line ("aturn on all of the following validity checking"
+& " options");
Write_Line ("cturn on checking for copies");
Write_Line ("Cturn off checking for copies");
-   Write_Line ("dturn on default (RM) checking");
+   Write_Line ("dturn on default (RM) checking"
+& " (enabled by default)");
Write_Line ("Dturn off default (RM) checking");
Write_Line ("eturn on checking for elementary components");
Write_Line ("Eturn off checking for elementary components");

[gcc r15-4920] ada: Initial implementation of Extended_Access aspect (FE portion only)

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:0935f20b635c6b27b0fb56dcd3aecf4e39f872d6

commit r15-4920-g0935f20b635c6b27b0fb56dcd3aecf4e39f872d6
Author: Steve Baird 
Date:   Wed Jul 17 15:21:01 2024 -0700

ada: Initial implementation of Extended_Access aspect (FE portion only)

The Extended_Access aspect can be specified to be True for certain
access-to-unconstrained-array-subtype types. Such extended access types
can designate objects that a normal general access type (with the same
designated subtype) cannot, such as a slice of an aliased array object
or an object that is represented without contiguous bounds information.

gcc/ada/ChangeLog:

* aspects.ads: Add Aspect_Extended_Access to Aspect_Id
enumeration.
* par-prag.adb: Add Pragma_Extended_Access to list of pragmas that
get no interesting processing in the parser.
* sem_attr.adb: Relax legality checks on Access/Unchecked_Access
attribute references if access type is Extended_Access.
* sem_ch12.adb (Validate_Access_Type_Instance): For an instance of
a generic with a formal access type, check that formal and actual
agree with with respect to Extended_Access aspect.
* sem_prag.adb (Analyze_Pragma): Add analysis code for pragma
Extended_Access. Set Pragma_Extended_Access element in Sig_Flags
aggregate.
* sem_prag.ads: Set Pragma_Extended_Access element in
Aspect_Specifying_Pragma aggregate.
* sem_res.adb (Valid_Conversion): Disallow
extended-to-not-extended access conversion.
* sem_util.adb (Is_Extended_Access_Access_Type): Implement new
function.
(Is_Aliased_View): If (and only if) the new Boolean For_Extended
parameter is True, then a slice of an aliased non-bitpacked array
is aliased, a constrained nominal subtype does not force a result
of False, and a dereference of an extended access value is
aliased. The last point is somewhat subtle. This is how we prevent
covert fat-to-nonfat type conversions via things like
"Not_Extended_Type'(Extended_Ptr.all'Access)" or passing
Extended_Ptr.all as an actual parameter corresponding to an
explicitly aliased formal parameter.
* sem_util.ads (Is_Extended_Access_Type): Declare new function.
(Is_Aliased_View): Add new defaults-False parameter For_Extended.
* snames.ads-tmpl: Declare Name_Extended_Access Name_Id constant
and Pragma_Extended_Access Pragma_Id enumeration literal.

Diff:
---
 gcc/ada/aspects.ads |  5 
 gcc/ada/par-prag.adb|  1 +
 gcc/ada/sem_attr.adb| 10 ++-
 gcc/ada/sem_ch12.adb| 16 +++
 gcc/ada/sem_prag.adb| 74 -
 gcc/ada/sem_prag.ads|  1 +
 gcc/ada/sem_res.adb | 32 +
 gcc/ada/sem_util.adb| 57 +++--
 gcc/ada/sem_util.ads| 11 +++-
 gcc/ada/snames.ads-tmpl |  2 ++
 10 files changed, 204 insertions(+), 5 deletions(-)

diff --git a/gcc/ada/aspects.ads b/gcc/ada/aspects.ads
index 2a5e0f216014..ebf09602ea52 100644
--- a/gcc/ada/aspects.ads
+++ b/gcc/ada/aspects.ads
@@ -197,6 +197,7 @@ package Aspects is
   Aspect_Effective_Writes,  -- GNAT
   Aspect_Exclusive_Functions,
   Aspect_Export,
+  Aspect_Extended_Access,   -- GNAT
   Aspect_Extensions_Visible,-- GNAT
   Aspect_Favor_Top_Level,   -- GNAT
   Aspect_First_Controlling_Parameter,   -- GNAT
@@ -293,6 +294,7 @@ package Aspects is
   Aspect_Effective_Reads=> True,
   Aspect_Effective_Writes   => True,
   Aspect_Exceptional_Cases  => True,
+  Aspect_Extended_Access=> True,
   Aspect_Extensions_Visible => True,
   Aspect_External_Initialization=> True,
   Aspect_Favor_Top_Level=> True,
@@ -539,6 +541,7 @@ package Aspects is
   Aspect_Dynamic_Predicate=> False,
   Aspect_Exceptional_Cases=> False,
   Aspect_Exclusive_Functions  => False,
+  Aspect_Extended_Access  => True,
   Aspect_External_Initialization  => False,
   Aspect_External_Name=> False,
   Aspect_External_Tag => False,
@@ -714,6 +717,7 @@ package Aspects is
   Aspect_Exceptional_Cases=> Name_Exceptional_Cases,
   Aspect_Exclusive_Functions  => Name_Exclusive_Functions,
   Aspect_Export   => Name_Export,
+  Aspect_Extended_Access  => Name_Extended_Access,
   Aspect_Extensions_Visible   => Name_Extensions_Visible,
   Aspect_External_Initialization  => Name_External_Initialization,
   Aspect_External_

[gcc r15-4913] ada: Display message on reproducer generation failure

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:ecd8a5990f6ebec89fc2f8ba79a349c3258c662c

commit r15-4913-gecd8a5990f6ebec89fc2f8ba79a349c3258c662c
Author: Ronan Desplanques 
Date:   Mon Oct 14 10:15:11 2024 +0200

ada: Display message on reproducer generation failure

Before this patch, nothing was reported to the user when an exception
was raised during generation of a minimal reproducer. This patch fixes
this.

gcc/ada/ChangeLog:

* comperr.adb (Compiler_Abort): Display message in exception 
handler.

Diff:
---
 gcc/ada/comperr.adb | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/comperr.adb b/gcc/ada/comperr.adb
index e411ddb5d298..726f0ccadb05 100644
--- a/gcc/ada/comperr.adb
+++ b/gcc/ada/comperr.adb
@@ -409,7 +409,8 @@ package body Comperr is
Generate_Minimal_Reproducer;
 end if;
  exception
-when others => null;
+when others =>
+   Write_Str ("failed to generate reproducer");
  end;
 
  Write_Eol;

[gcc r15-4914] ada: Tweak description of new predicate

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:f0f7beae693e6f6d0206c57a3be23fdc6598fcfd

commit r15-4914-gf0f7beae693e6f6d0206c57a3be23fdc6598fcfd
Author: Eric Botcazou 
Date:   Mon Oct 14 09:54:55 2024 +0200

ada: Tweak description of new predicate

The existing comment is a bit too vague.

gcc/ada/ChangeLog:

* exp_aggr.ads (Is_Two_Pass_Aggregate): Beef up comment.

Diff:
---
 gcc/ada/exp_aggr.ads | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/exp_aggr.ads b/gcc/ada/exp_aggr.ads
index aa79616c609a..2bbaeb217418 100644
--- a/gcc/ada/exp_aggr.ads
+++ b/gcc/ada/exp_aggr.ads
@@ -60,7 +60,8 @@ package Exp_Aggr is
 
function Is_Two_Pass_Aggregate (N : Node_Id) return Boolean;
--  Return True if N is an aggregate that is to be expanded in two passes.
-   --  This is the case if it consists only of iterated associations.
+   --  This is the case if it consists only of iterated component associations
+   --  with iterator specifications, see RM 4.3.3(20.2/5).
 
function Static_Array_Aggregate (N : Node_Id) return Boolean;
--  N is an array aggregate that may have a component association with

[gcc r15-4917] ada: Propagate resolution status from Resolve_Iterated_Component_Association

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:56ea463808d47cc8bf342b32125e793cfcde472d

commit r15-4917-g56ea463808d47cc8bf342b32125e793cfcde472d
Author: Eric Botcazou 
Date:   Tue Oct 15 21:41:45 2024 +0200

ada: Propagate resolution status from Resolve_Iterated_Component_Association

The resolution status of Resolve_Aggr_Expr is lost when the routine is
invoked indirectly from Resolve_Iterated_Component_Association.

gcc/ada/ChangeLog:

* sem_aggr.adb (Resolve_Iterated_Component_Association): Change to
function returning Boolean and return the result of the call made
to Resolve_Aggr_Expr.
(Resolve_Array_Aggregate): Return failure status if the call to
Resolve_Iterated_Component_Association returns false.

Diff:
---
 gcc/ada/sem_aggr.adb | 23 +--
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/gcc/ada/sem_aggr.adb b/gcc/ada/sem_aggr.adb
index 9439d649f2aa..b05b0b267fe7 100644
--- a/gcc/ada/sem_aggr.adb
+++ b/gcc/ada/sem_aggr.adb
@@ -1646,10 +1646,11 @@ package body Sem_Aggr is
   --  node as Expr, since there is no Expression and we need a Sloc for the
   --  error message.
 
-  procedure Resolve_Iterated_Component_Association
+  function Resolve_Iterated_Component_Association
 (N : Node_Id;
- Index_Typ : Entity_Id);
-  --  For AI12-061
+ Index_Typ : Entity_Id) return Boolean;
+  --  For AI12-061: resolves iterated component association N of Index_Typ.
+  --  Returns False if resolution fails.
 
   function Subtract (Val : Uint; To : Node_Id) return Node_Id;
   --  Creates a new expression node where Val is subtracted to expression
@@ -2110,9 +2111,9 @@ package body Sem_Aggr is
   -- Resolve_Iterated_Component_Association --
   
 
-  procedure Resolve_Iterated_Component_Association
+  function Resolve_Iterated_Component_Association
 (N : Node_Id;
- Index_Typ : Entity_Id)
+ Index_Typ : Entity_Id) return Boolean
   is
  Loc  : constant Source_Ptr := Sloc (N);
  Id   : constant Entity_Id  := Defining_Identifier (N);
@@ -2217,10 +2218,6 @@ package body Sem_Aggr is
 
  Resolution_OK := Resolve_Aggr_Expr (Expr, Single_Elmt => False);
 
- if not Resolution_OK then
-return;
- end if;
-
  if Operating_Mode /= Check_Semantics then
 Remove_References (Expr);
 declare
@@ -2235,6 +2232,8 @@ package body Sem_Aggr is
  end if;
 
  End_Scope;
+
+ return Resolution_OK;
   end Resolve_Iterated_Component_Association;
 
   --
@@ -2659,7 +2658,11 @@ package body Sem_Aggr is
  Assoc := First (Component_Associations (N));
  while Present (Assoc) loop
 if Nkind (Assoc) = N_Iterated_Component_Association then
-   Resolve_Iterated_Component_Association (Assoc, Index_Typ);
+   if not Resolve_Iterated_Component_Association
+(Assoc, Index_Typ)
+   then
+  return Failure;
+   end if;
 
 elsif Nkind (Assoc) /= N_Component_Association then
Error_Msg_N

[gcc r15-4924] ada: Split Library_Unit using multiple wrappers

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:16007e34ef4019f7cba9c9b718f5e43cc045e920

commit r15-4924-g16007e34ef4019f7cba9c9b718f5e43cc045e920
Author: Bob Duff 
Date:   Thu Oct 17 12:04:45 2024 -0400

ada: Split Library_Unit using multiple wrappers

The Library_Unit field was used for all sorts of different purposes,
which led to confusing code.

This patch splits Library_Unit into much more specific wrapper
subprograms that should be called instead of [Set_]Library_Unit.
Predicates and pragmas Assert are used to catch misuses of these.
We document the semantics, especially "surprising" cases (e.g.
internally-generated with clauses can refer to package bodies).

This change does not fix gigi, codepeer, spark, or llvm
to use the new wrappers; so far, they are used only in
the GNAT front end.

gcc/ada/ChangeLog:

* sinfo.ads (Library_Unit): Rewrite documentation. Note that
the "??? not (always) true..." comment was not true;
the Subunit_Parent never points to the spec.
(N_Compilation_Unit): Improve documentation. The Aux_ node
was not created to solve the mentioned problems; it was
created because the size of nodes was limited.
Misc doc improvements.
* sinfo-utils.ads: Add new wrappers for Library_Unit field.
Use subtypes with predicates for the parameters.
(First_Real_Statement): Still used in codepeer.
* sinfo-utils.adb: Add new wrappers for Library_Unit field,
with suitable assertions.
* sem_prag.adb: Use new field wrapper names.
(Matching_Name): New name for Same_Name to avoid
potential confusion with the other function with the
same name (Sem_Util.Same_Name), which is also called
in this same file.
(Matching_Convention): Change Same_Convention to match
Matching_Name.
* sem_util.ads (Same_Name): Improve comments; the old comment
implied that it works for all names, which was not true.
* sem_util.adb: Use new field wrapper names.
* gen_il-gen.adb: Rename N_Unit_Body to be N_Lib_Unit_Body.
Plain "unit" is ambiguous in Ada (library unit, compilation
unit, program unit, etc).
Add new union types N_Lib_Unit_Declaration and
N_Lib_Unit_Renaming_Declaration.
* gen_il-gen-gen_nodes.adb (Compute_Ranges): Raise exception
earlier (it is already raised later, in Verify_Type_Table).
Add a comment explaining why it might be raised.
* gen_il-types.ads: Rename N_Unit_Body to be N_Lib_Unit_Body, and 
add
new N_Lib_Unit_Declaration and N_Lib_Unit_Renaming_Declaration.
* einfo.ads: Fix obsolete comment (was left over from before
the "variable-sized nodes").
* exp_ch7.adb: Use new field wrapper names.
* exp_disp.adb: Use new field wrapper names.
* exp_unst.adb: Use new field wrapper names.
* exp_util.adb: Use new field wrapper names.
* fe.h: Add new field wrapper names. These are currently not
used in gigi, but this change prepares for using them in
gigi.
* inline.adb: Use new field wrapper names.
* lib.adb: Use new field wrapper names.
Comment improvements.
* lib-load.adb: Use new field wrapper names.
Minor cleanup.
* lib-writ.adb: Use new field wrapper names.
* live.adb: Use new field wrapper names.
* par-load.adb: Use new field wrapper names.
Comment improvements. Minor cleanup.
* rtsfind.adb: Use new field wrapper names.
* sem.adb: Use new field wrapper names.
* sem_ch10.adb: Use new field wrapper names.
Comment improvements. Minor cleanup.
* sem_ch12.adb: Use new field wrapper names.
* sem_ch7.adb: Use new field wrapper names.
* sem_ch8.adb: Use new field wrapper names.
* sem_elab.adb: Use new field wrapper names.
Comment improvements.
* errout.adb (Output_Source_Line): Fix blowup in some
obscure cases, where List_Pragmas is not fully set up.

Diff:
---
 gcc/ada/einfo.ads|  15 ++-
 gcc/ada/errout.adb   |   3 +-
 gcc/ada/exp_ch7.adb  |   5 +-
 gcc/ada/exp_disp.adb |   4 +-
 gcc/ada/exp_unst.adb |   6 +-
 gcc/ada/exp_util.adb |   2 +-
 gcc/ada/fe.h |  10 ++
 gcc/ada/gen_il-gen-gen_nodes.adb |  22 -
 gcc/ada/gen_il-gen.adb   |   9 ++
 gcc/ada/gen_il-types.ads |   4 +-
 gcc/ada/inline.adb   |   8 +-
 gcc/ada/lib-load.adb |   8 +-
 gcc/ada/lib-writ.adb |  17 ++--
 gcc/ada/lib.adb  |  22 +++--
 gc

[gcc r15-4919] ada: Avoid unused with warning with Extend_System

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:19367d7d8fb94f4157f6c1406473de7cff5ca149

commit r15-4919-g19367d7d8fb94f4157f6c1406473de7cff5ca149
Author: Viljar Indus 
Date:   Wed Oct 16 12:01:38 2024 +0300

ada: Avoid unused with warning with Extend_System

When the Extend_System pragma is used then we are supposed
to check the extended system for referenced entities. Otherwise
we would get an incorrect unused with warning.

This was previously done on body files but it should also be
done specs as well.

gcc/ada/ChangeLog:

* sem_warn.adb (Check_One_Unit): When a system extension is
present always check entities from that unit before marking
the unit unreferenced.

Diff:
---
 gcc/ada/sem_warn.adb | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/gcc/ada/sem_warn.adb b/gcc/ada/sem_warn.adb
index 69e60be29660..2ffd631d6283 100644
--- a/gcc/ada/sem_warn.adb
+++ b/gcc/ada/sem_warn.adb
@@ -2583,14 +2583,17 @@ package body Sem_Warn is
 
 if No (Ent) then
 
+   --  Check entities in the extended system if
+   --  specified.
+
+   if Check_System_Aux (Lunit) then
+  null;
+
--  If in spec, just set the flag
 
-   if Unit = Spec_Unit then
+   elsif Unit = Spec_Unit then
   Set_No_Entities_Ref_In_Spec (Item);
 
-   elsif Check_System_Aux (Lunit) then
-  null;
-
--  Else the warning may be needed
 
else

[gcc r15-4921] ada: Improve Unbounded_String performance

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:df3e6245ac6e9b22c4ad0fe3ccaad4bcd95bd3a7

commit r15-4921-gdf3e6245ac6e9b22c4ad0fe3ccaad4bcd95bd3a7
Author: Nicolas Roche 
Date:   Wed Sep 25 12:31:14 2024 +0200

ada: Improve Unbounded_String performance

Improve performance of iteration using Element function.
Improve performance of Append.

gcc/ada/ChangeLog:

* libgnat/a-strunb__shared.adb: Restructure code to inline only
the most common cases. Remove whenever possible runtime checks.
* libgnat/a-strunb__shared.ads: Add Inline => True to Append
variants and Element.

Diff:
---
 gcc/ada/libgnat/a-strunb__shared.adb | 165 ++-
 gcc/ada/libgnat/a-strunb__shared.ads |  18 ++--
 2 files changed, 134 insertions(+), 49 deletions(-)

diff --git a/gcc/ada/libgnat/a-strunb__shared.adb 
b/gcc/ada/libgnat/a-strunb__shared.adb
index ef4f8c93bdba..2f0ae3a1c92a 100644
--- a/gcc/ada/libgnat/a-strunb__shared.adb
+++ b/gcc/ada/libgnat/a-strunb__shared.adb
@@ -35,6 +35,23 @@ package body Ada.Strings.Unbounded is
 
use Ada.Strings.Maps;
 
+   procedure Non_Inlined_Append
+ (Source   : in out Unbounded_String;
+  New_Item : Unbounded_String);
+
+   procedure Non_Inlined_Append
+ (Source   : in out Unbounded_String;
+  New_Item : String);
+
+   procedure Non_Inlined_Append
+  (Source   : in out Unbounded_String;
+   New_Item : Character);
+   --  Non_Inlined_Append are part of the respective Append method that
+   --  should not be inlined. The idea is that the code of Append is inlined.
+   --  In order to make inlining efficient it is better to have the inlined
+   --  code as small as possible. Thus most common cases are inlined and less
+   --  common cases are deferred in these functions.
+
Growth_Factor : constant := 2;
--  The growth factor controls how much extra space is allocated when
--  we have to increase the size of an allocated unbounded string. By
@@ -542,10 +559,12 @@ package body Ada.Strings.Unbounded is
  (Source   : in out Unbounded_String;
   New_Item : Unbounded_String)
is
+  pragma Suppress (All_Checks);
+  --  Suppress checks as they are redundant with the checks done in that
+  --  function.
+
   SR  : constant Shared_String_Access := Source.Reference;
   NR  : constant Shared_String_Access := New_Item.Reference;
-  DL  : constant Natural  := Sum (SR.Last, NR.Last);
-  DR  : Shared_String_Access;
 
begin
   --  Source is an empty string, reuse New_Item data
@@ -562,19 +581,17 @@ package body Ada.Strings.Unbounded is
 
   --  Try to reuse existing shared string
 
-  elsif Can_Be_Reused (SR, DL) then
- SR.Data (SR.Last + 1 .. DL) := NR.Data (1 .. NR.Last);
- SR.Last := DL;
+  elsif System.Atomic_Counters.Is_One (SR.Counter)
+ and then NR.Last <= SR.Max_Length
+ and then SR.Max_Length - NR.Last >= SR.Last
+  then
+ SR.Data (SR.Last + 1 .. SR.Last + NR.Last) := NR.Data (1 .. NR.Last);
+ SR.Last := SR.Last + NR.Last;
 
   --  Otherwise, allocate new one and fill it
 
   else
- DR := Allocate (DL, DL / Growth_Factor);
- DR.Data (1 .. SR.Last) := SR.Data (1 .. SR.Last);
- DR.Data (SR.Last + 1 .. DL) := NR.Data (1 .. NR.Last);
- DR.Last := DL;
- Source.Reference := DR;
- Unreference (SR);
+ Non_Inlined_Append (Source, New_Item);
   end if;
end Append;
 
@@ -582,31 +599,34 @@ package body Ada.Strings.Unbounded is
  (Source   : in out Unbounded_String;
   New_Item : String)
is
-  SR : constant Shared_String_Access := Source.Reference;
-  DL : constant Natural := Sum (SR.Last, New_Item'Length);
-  DR : Shared_String_Access;
+  pragma Suppress (All_Checks);
+  --  Suppress checks as they are redundant with the checks done in that
+  --  function.
 
+  New_Item_Length : constant Natural := New_Item'Length;
+  SR : constant Shared_String_Access := Source.Reference;
begin
-  --  New_Item is an empty string, nothing to do
 
   if New_Item'Length = 0 then
+ --  New_Item is an empty string, nothing to do
  null;
 
-  --  Try to reuse existing shared string
-
-  elsif Can_Be_Reused (SR, DL) then
- SR.Data (SR.Last + 1 .. DL) := New_Item;
- SR.Last := DL;
-
-  --  Otherwise, allocate new one and fill it
+  elsif System.Atomic_Counters.Is_One (SR.Counter)
+ --  The following test checks in fact that
+ --  SR.Max_Length >= SR.Last + New_Item_Length without causing
+ --  overflow.
+ and then New_Item_Length <= SR.Max_Length
+ and then SR.Max_Length - New_Item_Length >= SR.Last
+  then
+ --  Try to reuse existing shared string
+ SR.Data (SR.Last + 1 .. SR.Last + New_Item_Length) := New_Item;
+ SR.Last := SR.Last + New_Item_Length;
 
   else
-

[gcc r15-4927] ada: Move special case for null string literal from frontend to backend

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:899b5be8b9720e381c7ea99ba27a4cbb165c003b

commit r15-4927-g899b5be8b9720e381c7ea99ba27a4cbb165c003b
Author: Piotr Trojanek 
Date:   Tue Oct 15 10:53:47 2024 +0200

ada: Move special case for null string literal from frontend to backend

Previously the lower bound of string literals indexed by non-static
integer types was artificially set to 1 in the frontend. This was to
avoid an overflow in calculation of a null string size by the GCC
backend, which was causing an excessively large binary object file.

However, setting the lower bound to 1 was problematic for GNATprove,
which could not easily retrieve the lower bound of string literals.

This patch avoids the overflow in GCC by recognizing null string literal
subtypes in Gigi.

gcc/ada/ChangeLog:

* gcc-interface/decl.cc (gnat_to_gnu_entity): Recognize null
string literal subtypes and set their bounds to 1 .. 0.

Diff:
---
 gcc/ada/gcc-interface/decl.cc | 14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/gcc-interface/decl.cc b/gcc/ada/gcc-interface/decl.cc
index f5188ddc8bca..32e476c69936 100644
--- a/gcc/ada/gcc-interface/decl.cc
+++ b/gcc/ada/gcc-interface/decl.cc
@@ -3110,14 +3110,24 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree 
gnu_expr, bool definition)
tree gnu_string_index_type
  = get_base_type (TREE_TYPE (TYPE_INDEX_TYPE
  (TYPE_DOMAIN (gnu_string_array_type;
+
+/* For a null string literal we set the bounds to 1 .. 0, to
+   avoid a possible overflow when calculating the upper bound
+   as LOWER_BOUND + LENGTH - 1.  */
+const bool is_null_string
+  = String_Literal_Length (gnat_entity) == Uint_0;
tree gnu_lower_bound
- = convert (gnu_string_index_type,
+ = is_null_string ?
+   build_int_cst (gnu_string_index_type, 1) :
+   convert (gnu_string_index_type,
 gnat_to_gnu (String_Literal_Low_Bound (gnat_entity)));
tree gnu_length
  = UI_To_gnu (String_Literal_Length (gnat_entity),
   gnu_string_index_type);
tree gnu_upper_bound
- = build_binary_op (PLUS_EXPR, gnu_string_index_type,
+ = is_null_string ?
+   build_int_cst (gnu_string_index_type, 0) :
+   build_binary_op (PLUS_EXPR, gnu_string_index_type,
 gnu_lower_bound,
 int_const_binop (MINUS_EXPR, gnu_length,
  convert (gnu_string_index_type,

[gcc r15-4926] ada: Remove special case for the size of a string literal subtype

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:023a5dd187b1b08979bc0654334e75e7b2c15eaa

commit r15-4926-g023a5dd187b1b08979bc0654334e75e7b2c15eaa
Author: Piotr Trojanek 
Date:   Tue Oct 15 10:01:32 2024 +0200

ada: Remove special case for the size of a string literal subtype

Apparently we no longer need to ignore string literal subtypes case
when validating size of a type entity.

Code cleanup; behavior appears to be unaffected.

gcc/ada/ChangeLog:

* gcc-interface/decl.cc (gnat_to_gnu_entity): Remove special
case for string literal subtypes.

Diff:
---
 gcc/ada/gcc-interface/decl.cc | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/gcc/ada/gcc-interface/decl.cc b/gcc/ada/gcc-interface/decl.cc
index 3404b747ddf8..f5188ddc8bca 100644
--- a/gcc/ada/gcc-interface/decl.cc
+++ b/gcc/ada/gcc-interface/decl.cc
@@ -4457,12 +4457,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree 
gnu_expr, bool definition)
   process_attributes (&gnu_type, &attr_list, false, gnat_entity);
 
   /* See if a size was specified, by means of either an Object_Size or
- a regular Size clause, and validate it if so.
-
-??? Don't set the size for a String_Literal since it is either
-confirming or we don't handle it properly (if the low bound is
-non-constant).  */
-  if (!gnu_size && kind != E_String_Literal_Subtype)
+ a regular Size clause, and validate it if so.  */
+  if (!gnu_size)
{
  const char *size_s = "size for %s too small{, minimum allowed is ^}";
  const char *type_s = is_by_ref ? "by-reference type &" : "&";

[gcc r15-4925] ada: Fix ancient typo in process_decls

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:bffba3d2d33d4d324149df08ce0df07f85b0e1ae

commit r15-4925-gbffba3d2d33d4d324149df08ce0df07f85b0e1ae
Author: Eric Botcazou 
Date:   Fri Oct 11 22:40:29 2024 +0200

ada: Fix ancient typo in process_decls

It has gone unnoticed for decades because it changes nothing in practice.

gcc/ada/ChangeLog:

* gcc-interface/trans.cc (process_decls): Remove tests on Nkind that
contain a typo and would be redundant if written correctly.

Diff:
---
 gcc/ada/gcc-interface/trans.cc | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/gcc/ada/gcc-interface/trans.cc b/gcc/ada/gcc-interface/trans.cc
index 5f8a18eebb72..a27804b91b8f 100644
--- a/gcc/ada/gcc-interface/trans.cc
+++ b/gcc/ada/gcc-interface/trans.cc
@@ -9765,9 +9765,7 @@ process_decls (List_Id gnat_decls, List_Id gnat_decls2,
  {
/* For package specs, we recurse inside the declarations,
   thus taking the two pass approach inside the boundary.  */
-   if (Nkind (gnat_decl) == N_Package_Declaration
-   && (Nkind (Specification (gnat_decl)
-  == N_Package_Specification)))
+   if (Nkind (gnat_decl) == N_Package_Declaration)
  process_decls (Visible_Declarations (Specification (gnat_decl)),
 Private_Declarations (Specification (gnat_decl)),
 true, false);
@@ -9853,9 +9851,7 @@ process_decls (List_Id gnat_decls, List_Id gnat_decls2,
|| Nkind (gnat_decl) == N_Protected_Body_Stub)
  add_stmt (gnat_to_gnu (gnat_decl));
 
-   else if (Nkind (gnat_decl) == N_Package_Declaration
-&& (Nkind (Specification (gnat_decl)
-   == N_Package_Specification)))
+   else if (Nkind (gnat_decl) == N_Package_Declaration)
  process_decls (Visible_Declarations (Specification (gnat_decl)),
 Private_Declarations (Specification (gnat_decl)),
 false, true);

[gcc r15-4923] ada: Improve Unbounded_Wide_String performance

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:f6a8c07743d74430da761e3ca7a8516ac663ef94

commit r15-4923-gf6a8c07743d74430da761e3ca7a8516ac663ef94
Author: Nicolas Roche 
Date:   Wed Oct 16 11:56:35 2024 +0200

ada: Improve Unbounded_Wide_String performance

Improve performance of iteration using Element function.
Improve performance of Append.

gcc/ada/ChangeLog:

* libgnat/a-stwiun__shared.adb: Restructure code to inline only
the most common cases. Remove whenever possible runtime checks.
* libgnat/a-stwiun__shared.ads: Add Inline => True to Append
variants and Element.

Diff:
---
 gcc/ada/libgnat/a-stwiun__shared.adb | 164 ++-
 gcc/ada/libgnat/a-stwiun__shared.ads |   9 +-
 2 files changed, 127 insertions(+), 46 deletions(-)

diff --git a/gcc/ada/libgnat/a-stwiun__shared.adb 
b/gcc/ada/libgnat/a-stwiun__shared.adb
index 26b4f8ec85fa..d3f20f0af20e 100644
--- a/gcc/ada/libgnat/a-stwiun__shared.adb
+++ b/gcc/ada/libgnat/a-stwiun__shared.adb
@@ -36,7 +36,24 @@ package body Ada.Strings.Wide_Unbounded is
 
use Ada.Strings.Wide_Maps;
 
-   Growth_Factor : constant := 32;
+   procedure Non_Inlined_Append
+ (Source   : in out Unbounded_Wide_String;
+  New_Item : Unbounded_Wide_String);
+
+   procedure Non_Inlined_Append
+ (Source   : in out Unbounded_Wide_String;
+  New_Item : Wide_String);
+
+   procedure Non_Inlined_Append
+  (Source   : in out Unbounded_Wide_String;
+   New_Item : Wide_Character);
+   --  Non_Inlined_Append are part of the respective Append method that
+   --  should not be inlined. The idea is that the code of Append is inlined.
+   --  In order to make inlining efficient it is better to have the inlined
+   --  code as small as possible. Thus most common cases are inlined and less
+   --  common cases are deferred in these functions.
+
+   Growth_Factor : constant := 2;
--  The growth factor controls how much extra space is allocated when
--  we have to increase the size of an allocated unbounded string. By
--  allocating extra space, we avoid the need to reallocate on every
@@ -525,10 +542,12 @@ package body Ada.Strings.Wide_Unbounded is
  (Source   : in out Unbounded_Wide_String;
   New_Item : Unbounded_Wide_String)
is
+  pragma Suppress (All_Checks);
+  --  Suppress checks as they are redundant with the checks done in that
+  --  function.
+
   SR  : constant Shared_Wide_String_Access := Source.Reference;
   NR  : constant Shared_Wide_String_Access := New_Item.Reference;
-  DL  : constant Natural   := SR.Last + NR.Last;
-  DR  : Shared_Wide_String_Access;
 
begin
   --  Source is an empty string, reuse New_Item data
@@ -545,19 +564,17 @@ package body Ada.Strings.Wide_Unbounded is
 
   --  Try to reuse existent shared string
 
-  elsif Can_Be_Reused (SR, DL) then
- SR.Data (SR.Last + 1 .. DL) := NR.Data (1 .. NR.Last);
- SR.Last := DL;
+  elsif System.Atomic_Counters.Is_One (SR.Counter)
+ and then NR.Last <= SR.Max_Length
+ and then SR.Max_Length - NR.Last >= SR.Last
+  then
+ SR.Data (SR.Last + 1 .. SR.Last + NR.Last) := NR.Data (1 .. NR.Last);
+ SR.Last := SR.Last + NR.Last;
 
   --  Otherwise, allocate new one and fill it
 
   else
- DR := Allocate (DL + DL / Growth_Factor);
- DR.Data (1 .. SR.Last) := SR.Data (1 .. SR.Last);
- DR.Data (SR.Last + 1 .. DL) := NR.Data (1 .. NR.Last);
- DR.Last := DL;
- Source.Reference := DR;
- Unreference (SR);
+ Non_Inlined_Append (Source, New_Item);
   end if;
end Append;
 
@@ -565,31 +582,34 @@ package body Ada.Strings.Wide_Unbounded is
  (Source   : in out Unbounded_Wide_String;
   New_Item : Wide_String)
is
-  SR : constant Shared_Wide_String_Access := Source.Reference;
-  DL : constant Natural   := SR.Last + New_Item'Length;
-  DR : Shared_Wide_String_Access;
+  pragma Suppress (All_Checks);
+  --  Suppress checks as they are redundant with the checks done in that
+  --  function.
 
+  New_Item_Length : constant Natural := New_Item'Length;
+  SR : constant Shared_Wide_String_Access := Source.Reference;
begin
-  --  New_Item is an empty string, nothing to do
 
   if New_Item'Length = 0 then
+ --  New_Item is an empty string, nothing to do
  null;
 
-  --  Try to reuse existing shared string
-
-  elsif Can_Be_Reused (SR, DL) then
- SR.Data (SR.Last + 1 .. DL) := New_Item;
- SR.Last := DL;
-
-  --  Otherwise, allocate new one and fill it
+  elsif System.Atomic_Counters.Is_One (SR.Counter)
+ --  The following test checks in fact that
+ --  SR.Max_Length >= SR.Last + New_Item_Length without causing
+ --  overflow.
+ and then New_Item_Length <= SR.Max_Length
+ and then SR.Max_Leng

[gcc r15-4904] ada: Refactor exception declarations from Interfaces.CHERI to separate package

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:2825944ff0ad6c6d164d7e27a1b0576d4274a508

commit r15-4904-g2825944ff0ad6c6d164d7e27a1b0576d4274a508
Author: Daniel King 
Date:   Mon Sep 23 10:50:13 2024 +0100

ada: Refactor exception declarations from Interfaces.CHERI to separate 
package

Exception declarations require elaboration on the full run-time to
register the exceptions. The package Interfaces.CHERI, however, is
used on bare-metal targets during early initialization, before
elaboration and is therefore marked No_Elaboration_Code_All.
Refactoring the exception declarations to a separate package allows
the common CHERI bindings to be used in such contexts.

gcc/ada/ChangeLog:

* libgnat/i-cheri.ads: Remove exception declarations.
* libgnat/i-cheri-exceptions.ads: New file.

Diff:
---
 gcc/ada/libgnat/i-cheri-exceptions.ads | 50 ++
 gcc/ada/libgnat/i-cheri.ads| 16 ---
 2 files changed, 50 insertions(+), 16 deletions(-)

diff --git a/gcc/ada/libgnat/i-cheri-exceptions.ads 
b/gcc/ada/libgnat/i-cheri-exceptions.ads
new file mode 100644
index ..88ecb1325c4d
--- /dev/null
+++ b/gcc/ada/libgnat/i-cheri-exceptions.ads
@@ -0,0 +1,50 @@
+--
+--  --
+-- GNAT COMPILER COMPONENTS --
+--  --
+--I N T E R F A C E S . C H E R I . E X C E P T I O N S --
+--  --
+--  S p e c --
+--  --
+--Copyright (C) 2024, AdaCore   --
+--  --
+-- GNAT is free software;  you can  redistribute it  and/or modify it under --
+-- terms of the  GNU General Public License as published  by the Free Soft- --
+-- ware  Foundation;  either version 3,  or (at your option) any later ver- --
+-- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
+-- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
+-- or FITNESS FOR A PARTICULAR PURPOSE. --
+--  --
+-- As a special exception under Section 7 of GPL version 3, you are granted --
+-- additional permissions described in the GCC Runtime Library Exception,   --
+-- version 3.1, as published by the Free Software Foundation.   --
+--  --
+-- You should have received a copy of the GNU General Public License and--
+-- a copy of the GCC Runtime Library Exception along with this program; --
+-- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see--
+-- .  --
+--  --
+-- GNAT was originally developed  by the GNAT team at  New York University. --
+-- Extensive contributions were provided by Ada Core Technologies Inc.  --
+--  --
+--
+
+--  This package defines exception types for CHERI-related errors
+
+package Interfaces.CHERI.Exceptions with
+  Preelaborate
+is
+
+   Capability_Bound_Error : exception;
+   --  An out-of-bounds access was attempted
+
+   Capability_Permission_Error : exception;
+   --  An attempted access exceeded the permissions granted by a capability
+
+   Capability_Sealed_Error : exception;
+   --  A sealed capability was dereferenced
+
+   Capability_Tag_Error : exception;
+   --  An invalid capability was dereferenced
+
+end Interfaces.CHERI.Exceptions;
diff --git a/gcc/ada/libgnat/i-cheri.ads b/gcc/ada/libgnat/i-cheri.ads
index 389583a012f8..9fbcb885284f 100644
--- a/gcc/ada/libgnat/i-cheri.ads
+++ b/gcc/ada/libgnat/i-cheri.ads
@@ -467,20 +467,4 @@ is
  External_Name => "__builtin_cheri_stack_get";
--  Get the Capability Stack Pointer (CSP)
 
-   ---
-   -- Capability Exceptions --
-   ---
-
-   Capability_Bound_Error : exception;
-   --  An out-of-bounds access was attempted
-
-   Capability_Permission_Error : exception;
-   --  An attempted access exceeded the permissions granted by a capability
-
-   Capability_Sealed_Error : exception;
-   --  A sealed capability was dereferenced
-
-   Capability_Tag_Error : exception;
-   --  An invalid capability was dereferenced

[gcc r15-4906] ada: Fix error message for pragma First_Controlling_Parameter

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:047d6d9808bbde26d161ac736067c4b5d2bb77af

commit r15-4906-g047d6d9808bbde26d161ac736067c4b5d2bb77af
Author: Raphaël AMIARD 
Date:   Fri Oct 11 15:56:45 2024 +0200

ada: Fix error message for pragma First_Controlling_Parameter

gcc/ada/ChangeLog:

* sem_prag.adb (Analyze_Pragma): Fix format for second line of
warning (should be a continuation line)

Diff:
---
 gcc/ada/sem_prag.adb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/sem_prag.adb b/gcc/ada/sem_prag.adb
index 00df728e9500..9a3e7acf34fd 100644
--- a/gcc/ada/sem_prag.adb
+++ b/gcc/ada/sem_prag.adb
@@ -17906,7 +17906,7 @@ package body Sem_Prag is
   Error_Msg_N
 ("?_j?'First_'Controlling_'Parameter has no effect", N);
   Error_Msg_NE
-("?_j?because & does not implement interface types",
+("\?_j?because & does not implement interface types",
  N, E);
end if;

[gcc r15-4897] ada: Missing precondition runtime check in inherited primitive

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:74cdc0d576479756c7faa88f74b041cd9ff51636

commit r15-4897-g74cdc0d576479756c7faa88f74b041cd9ff51636
Author: Javier Miranda 
Date:   Tue Oct 8 18:33:37 2024 +

ada: Missing precondition runtime check in inherited primitive

When a derived tagged type implements interface types in addition
to deriving from its parent type, and a primitive inherited from
its parent type corresponds to an inherited primitive that has
class-wide preconditions, then the generated code fails to check
the class-wide preconditions inherited from the interface primitive.

gcc/ada/ChangeLog:

* einfo.ads (Is_Dispatch_Table_Wrapper): Complete documentation.
* exp_ch6.adb (Install_Class_Preconditions_Check): Dispatch table
wrappers do not require installing the check since it is performed
by the caller.
(Class_Preconditions_Subprogram): Use new predicate Is_LSP_Wrapper.
* freeze.adb (Check_Inherited_Conditions): Rename Postcond_Wrappers 
to
Condition_Wrappers to handle implicitly inherited subprograms that
implement pre-/postconditions inherited from interface primitives.
Use new predicate Is_LSP_Wrapper.
* sem_disp.adb (Check_Dispatching_Operation): Complete assertion to
handle functions returning class-wide types.
* exp_util.ads (Is_LSP_Wrapper): New subprogram.
* exp_util.adb (Is_LSP_Wrapper): New subprogram.
* contracts.adb (Process_Spec_Postconditions): Use Is_LSP_Wrapper.
(Process_Inherited_Conditions): Use Is_LSP_Wrapper.
* sem_ch6.adb (New_Overloaded_Entity): Use Is_LSP_Wrapper.
* sem_util.adb (Nearest_Class_Condition_Subprogram): Use 
Is_LSP_Wrapper.

Diff:
---
 gcc/ada/contracts.adb |  8 ++---
 gcc/ada/einfo.ads |  9 +++--
 gcc/ada/exp_ch6.adb   | 33 +--
 gcc/ada/exp_util.adb  | 10 ++
 gcc/ada/exp_util.ads  |  5 +++
 gcc/ada/freeze.adb| 91 ++-
 gcc/ada/sem_ch6.adb   |  4 +--
 gcc/ada/sem_disp.adb  |  7 
 gcc/ada/sem_util.adb  |  4 +--
 9 files changed, 115 insertions(+), 56 deletions(-)

diff --git a/gcc/ada/contracts.adb b/gcc/ada/contracts.adb
index a93bf622aa13..7e66a54b6752 100644
--- a/gcc/ada/contracts.adb
+++ b/gcc/ada/contracts.adb
@@ -2934,9 +2934,7 @@ package body Contracts is
--  Wrappers of class-wide pre/postconditions reference the
--  parent primitive that has the inherited contract.
 
-   if Is_Wrapper (Subp_Id)
- and then Present (LSP_Subprogram (Subp_Id))
-   then
+   if Is_LSP_Wrapper (Subp_Id) then
   Subp_Id := LSP_Subprogram (Subp_Id);
end if;
 
@@ -4602,9 +4600,7 @@ package body Contracts is
--  parent primitive that has the inherited contract and help
--  us to climb fast.
 
-   if Is_Wrapper (Subp_Id)
- and then Present (LSP_Subprogram (Subp_Id))
-   then
+   if Is_LSP_Wrapper (Subp_Id) then
   Subp_Id := LSP_Subprogram (Subp_Id);
end if;
 
diff --git a/gcc/ada/einfo.ads b/gcc/ada/einfo.ads
index 2fb45703a4fb..2aae60afae5c 100644
--- a/gcc/ada/einfo.ads
+++ b/gcc/ada/einfo.ads
@@ -2576,9 +2576,12 @@ package Einfo is
 --   entity is associated with a dispatch table.
 
 --Is_Dispatch_Table_Wrapper
---   Applies to all entities. Set on wrappers built when the subprogram has
---   class-wide preconditions or class-wide postconditions affected by
---   overriding (AI12-0195).
+--   Applies to all entities. Set on wrappers built when a subprogram has
+--   class-wide preconditions or postconditions affected by overriding
+--   (AI12-0195). Also set on wrappers built when an inherited subprogram
+--   implements an interface primitive that has class-wide preconditions
+--   or postconditions. In the former case, the entity also has its
+--   LSP_Subprogram attribute set.
 
 --Is_Dispatching_Operation
 --   Defined in all entities. Set for procedures, functions, generic
diff --git a/gcc/ada/exp_ch6.adb b/gcc/ada/exp_ch6.adb
index c550b1c8c1f0..384324492292 100644
--- a/gcc/ada/exp_ch6.adb
+++ b/gcc/ada/exp_ch6.adb
@@ -7748,9 +7748,7 @@ package body Exp_Ch6 is
--  Wrappers of class-wide pre/postconditions reference the
--  parent primitive that has the inherited contract.
 
-   if Is_Wrapper (Subp_Id)
- and then Present (LSP_Subprogram (Subp_Id))
-   then
+   if Is_LSP_Wrapper (Subp_Id) then
   Subp_Id := LSP_Subprogram (Subp_Id);
end if;
 
@@ -7796,6 +7794,35 @@ package body Exp_Ch6 is
 
   elsif Is_Thunk (Current_Scope) then
  return;
+
+  --  The call to t

[gcc r15-4922] ada: Improve performance of Unbounded_Wide_Wide_String

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:c3df7a67053dfaf22adbaa604e227b42d5d0fe38

commit r15-4922-gc3df7a67053dfaf22adbaa604e227b42d5d0fe38
Author: Nicolas Roche 
Date:   Wed Sep 25 13:21:04 2024 +0200

ada: Improve performance of Unbounded_Wide_Wide_String

Improve performance of iteration using Element function.
Improve performance of Append.

gcc/ada/ChangeLog:

* libgnat/a-stzunb__shared.adb: Restructure code to inline only
the most common cases. Remove whenever possible runtime checks.
* libgnat/a-stzunb__shared.ads: Add Inline => True to Append
variants and Element.

Diff:
---
 gcc/ada/libgnat/a-stzunb__shared.adb | 165 ++-
 gcc/ada/libgnat/a-stzunb__shared.ads |  12 ++-
 2 files changed, 130 insertions(+), 47 deletions(-)

diff --git a/gcc/ada/libgnat/a-stzunb__shared.adb 
b/gcc/ada/libgnat/a-stzunb__shared.adb
index 39dd7b942839..e5045c866b66 100644
--- a/gcc/ada/libgnat/a-stzunb__shared.adb
+++ b/gcc/ada/libgnat/a-stzunb__shared.adb
@@ -36,7 +36,24 @@ package body Ada.Strings.Wide_Wide_Unbounded is
 
use Ada.Strings.Wide_Wide_Maps;
 
-   Growth_Factor : constant := 32;
+   procedure Non_Inlined_Append
+ (Source   : in out Unbounded_Wide_Wide_String;
+  New_Item : Unbounded_Wide_Wide_String);
+
+   procedure Non_Inlined_Append
+ (Source   : in out Unbounded_Wide_Wide_String;
+  New_Item : Wide_Wide_String);
+
+   procedure Non_Inlined_Append
+  (Source   : in out Unbounded_Wide_Wide_String;
+   New_Item : Wide_Wide_Character);
+   --  Non_Inlined_Append are part of the respective Append method that
+   --  should not be inlined. The idea is that the code of Append is inlined.
+   --  In order to make inlining efficient it is better to have the inlined
+   --  code as small as possible. Thus most common cases are inlined and less
+   --  common cases are deferred in these functions.
+
+   Growth_Factor : constant := 2;
--  The growth factor controls how much extra space is allocated when
--  we have to increase the size of an allocated unbounded string. By
--  allocating extra space, we avoid the need to reallocate on every
@@ -526,10 +543,12 @@ package body Ada.Strings.Wide_Wide_Unbounded is
  (Source   : in out Unbounded_Wide_Wide_String;
   New_Item : Unbounded_Wide_Wide_String)
is
+  pragma Suppress (All_Checks);
+  --  Suppress checks as they are redundant with the checks done in that
+  --  function.
+
   SR  : constant Shared_Wide_Wide_String_Access := Source.Reference;
   NR  : constant Shared_Wide_Wide_String_Access := New_Item.Reference;
-  DL  : constant Natural  := SR.Last + NR.Last;
-  DR  : Shared_Wide_Wide_String_Access;
 
begin
   --  Source is an empty string, reuse New_Item data
@@ -546,19 +565,17 @@ package body Ada.Strings.Wide_Wide_Unbounded is
 
   --  Try to reuse existent shared string
 
-  elsif Can_Be_Reused (SR, DL) then
- SR.Data (SR.Last + 1 .. DL) := NR.Data (1 .. NR.Last);
- SR.Last := DL;
+  elsif System.Atomic_Counters.Is_One (SR.Counter)
+ and then NR.Last <= SR.Max_Length
+ and then SR.Max_Length - NR.Last >= SR.Last
+  then
+ SR.Data (SR.Last + 1 .. SR.Last + NR.Last) := NR.Data (1 .. NR.Last);
+ SR.Last := SR.Last + NR.Last;
 
   --  Otherwise, allocate new one and fill it
 
   else
- DR := Allocate (DL + DL / Growth_Factor);
- DR.Data (1 .. SR.Last) := SR.Data (1 .. SR.Last);
- DR.Data (SR.Last + 1 .. DL) := NR.Data (1 .. NR.Last);
- DR.Last := DL;
- Source.Reference := DR;
- Unreference (SR);
+ Non_Inlined_Append (Source, New_Item);
   end if;
end Append;
 
@@ -566,31 +583,34 @@ package body Ada.Strings.Wide_Wide_Unbounded is
  (Source   : in out Unbounded_Wide_Wide_String;
   New_Item : Wide_Wide_String)
is
-  SR : constant Shared_Wide_Wide_String_Access := Source.Reference;
-  DL : constant Natural := SR.Last + New_Item'Length;
-  DR : Shared_Wide_Wide_String_Access;
+  pragma Suppress (All_Checks);
+  --  Suppress checks as they are redundant with the checks done in that
+  --  function.
 
+  New_Item_Length : constant Natural := New_Item'Length;
+  SR : constant Shared_Wide_Wide_String_Access := Source.Reference;
begin
-  --  New_Item is an empty string, nothing to do
 
   if New_Item'Length = 0 then
+ --  New_Item is an empty string, nothing to do
  null;
 
-  --  Try to reuse existing shared string
-
-  elsif Can_Be_Reused (SR, DL) then
- SR.Data (SR.Last + 1 .. DL) := New_Item;
- SR.Last := DL;
-
-  --  Otherwise, allocate new one and fill it
+  elsif System.Atomic_Counters.Is_One (SR.Counter)
+ --  The following test checks in fact that
+ --  SR.Max_Length >= SR.Last + New_Item_Length without causing
+ --  o

[gcc r15-4890] ada: Fix asymmetry in resolution of unary intrinsic operators

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:c9328cb4b106a6b9afe3359e0287ece496b8e277

commit r15-4890-gc9328cb4b106a6b9afe3359e0287ece496b8e277
Author: Piotr Trojanek 
Date:   Thu Sep 26 08:40:28 2024 +0200

ada: Fix asymmetry in resolution of unary intrinsic operators

Resolution of binary and unary intrinsic operators differed when
expansion was inactive. In particular, this affected GNATprove
handling of Ada.Real_Time."abs" operator. This patch makes unary
resolution behave like binary resolution.

gcc/ada/ChangeLog:

* sem_res.adb (Resolve_Intrinsic_Unary_Operator): Disable when
expansion is inactive.

Diff:
---
 gcc/ada/sem_res.adb | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
index 6a2680b6b1da..0abdeee8fbee 100644
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -9972,6 +9972,13 @@ package body Sem_Res is
   Arg2 : Node_Id;
 
begin
+  --  We must preserve the original entity in a generic setting, so that
+  --  the legality of the operation can be verified in an instance.
+
+  if not Expander_Active then
+ return;
+  end if;
+
   Op := Entity (N);
   while Scope (Op) /= Standard_Standard loop
  Op := Homonym (Op);

[gcc r15-4908] ada: Add Schema to the SARIF report

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:8314fdc7f352c2cd90fe0bfd6a87af48807bf65c

commit r15-4908-g8314fdc7f352c2cd90fe0bfd6a87af48807bf65c
Author: Viljar Indus 
Date:   Fri Oct 11 13:19:04 2024 +0300

ada: Add Schema to the SARIF report

gcc/ada/ChangeLog:

* diagnostics-sarif_emitter.adb (Print_SARIF_Report): Add a
Schema field to the SARIF report.

Diff:
---
 gcc/ada/diagnostics-sarif_emitter.adb | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/diagnostics-sarif_emitter.adb 
b/gcc/ada/diagnostics-sarif_emitter.adb
index cbb423b2e1dd..fe251f9754db 100644
--- a/gcc/ada/diagnostics-sarif_emitter.adb
+++ b/gcc/ada/diagnostics-sarif_emitter.adb
@@ -31,6 +31,14 @@ with Sinput; use Sinput;
 
 package body Diagnostics.SARIF_Emitter is
 
+   --  We are currently using SARIF 2.1.0
+
+   SARIF_Version : constant String := "2.1.0";
+   pragma Style_Checks ("M100");
+   SARIF_Schema  : constant String :=
+ 
"https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json";;
+   pragma Style_Checks ("M79");
+
type Artifact_Change is record
   File  : String_Ptr;
   --  Name of the file
@@ -1074,7 +1082,11 @@ package body Diagnostics.SARIF_Emitter is
   Begin_Block;
   NL_And_Indent;
 
-  Write_String_Attribute ("version", "2.1.0");
+  Write_String_Attribute ("$schema", SARIF_Schema);
+  Write_Char (',');
+  NL_And_Indent;
+
+  Write_String_Attribute ("version", SARIF_Version);
   Write_Char (',');
   NL_And_Indent;

[gcc r14-10879] ada: Fix crash on default value with nested iterated component associations

[Eric Botcazou via Gcc-cvs]

https://gcc.gnu.org/g:eb929c391fe1e6c2e343abbf9464210554da415b

commit r14-10879-geb929c391fe1e6c2e343abbf9464210554da415b
Author: Eric Botcazou 
Date:   Wed Oct 16 09:05:55 2024 +0200

ada: Fix crash on default value with nested iterated component associations

The problem is that the freeze node for the type of the element ends up in
the component list of the record type declared with the default value.

gcc/ada/ChangeLog:

PR ada/113036
* freeze.adb (Freeze_Expression): Deal with freezing actions coming
from within nested internal loops present in spec expressions.

Diff:
---
 gcc/ada/freeze.adb | 23 +++
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/gcc/ada/freeze.adb b/gcc/ada/freeze.adb
index 4c3c45d79752..6da4460c1301 100644
--- a/gcc/ada/freeze.adb
+++ b/gcc/ada/freeze.adb
@@ -8684,8 +8684,9 @@ package body Freeze is
 or else Ekind (Current_Scope) = E_Void
   then
  declare
-Freeze_Nodes : List_Id := No_List;
-Pos  : Int := Scope_Stack.Last;
+Freeze_Nodes : List_Id   := No_List;
+Pos  : Int   := Scope_Stack.Last;
+Scop : Entity_Id := Current_Scope;
 
  begin
 if Present (Desig_Typ) then
@@ -8712,12 +8713,18 @@ package body Freeze is
 --  If the expression is within a top-level pragma, as for a pre-
 --  condition on a library-level subprogram, nothing to do.
 
-if not Is_Compilation_Unit (Current_Scope)
-  and then (Is_Record_Type (Scope (Current_Scope))
- or else (Ekind (Current_Scope) in E_Block | E_Loop
-   and then Is_Internal (Current_Scope)))
-then
-   Pos := Pos - 1;
+if not Is_Compilation_Unit (Scop) then
+   if Is_Record_Type (Scope (Scop)) then
+  Pos := Pos - 1;
+
+   else
+  while Ekind (Scop) in E_Block | E_Loop
+and then Is_Internal (Scop)
+  loop
+ Pos  := Pos - 1;
+ Scop := Scope (Scop);
+  end loop;
+   end if;
 end if;
 
 if Is_Non_Empty_List (Freeze_Nodes) then

[gcc r14-10878] ada: Fix crash on real literal in declare expression of expression function

[Eric Botcazou via Gcc-cvs]

https://gcc.gnu.org/g:3ed8c16f618461670336c84d1fbc713f086f30bd

commit r14-10878-g3ed8c16f618461670336c84d1fbc713f086f30bd
Author: Eric Botcazou 
Date:   Mon May 20 14:33:14 2024 +0200

ada: Fix crash on real literal in declare expression of expression function

The problem is that the freeze node of the type to which the real literal
is resolved is placed inside the expression function instead of outside.

gcc/ada/

* freeze.adb (Freeze_Expression): Also attach pending freeze nodes
to the parent in the case of an internal block in a spec expression.

Diff:
---
 gcc/ada/freeze.adb | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/freeze.adb b/gcc/ada/freeze.adb
index d032b75f1f2d..4c3c45d79752 100644
--- a/gcc/ada/freeze.adb
+++ b/gcc/ada/freeze.adb
@@ -8701,7 +8701,8 @@ package body Freeze is
 end if;
 
 --  The current scope may be that of a constrained component of
---  an enclosing record declaration, or of a loop of an enclosing
+--  an enclosing record declaration, or a block of an enclosing
+--  declare expression in Ada 2022, or of a loop of an enclosing
 --  quantified expression or aggregate with an iterated component
 --  in Ada 2022, which is above the current scope in the scope
 --  stack. Indeed in the context of a quantified expression or
@@ -8713,7 +8714,7 @@ package body Freeze is
 
 if not Is_Compilation_Unit (Current_Scope)
   and then (Is_Record_Type (Scope (Current_Scope))
- or else (Ekind (Current_Scope) = E_Loop
+ or else (Ekind (Current_Scope) in E_Block | E_Loop
and then Is_Internal (Current_Scope)))
 then
Pos := Pos - 1;

[gcc r13-9168] Add regression test

[Eric Botcazou via Gcc-cvs]

https://gcc.gnu.org/g:54d5c2b1f7439ae01781532b52d9bda99091c163

commit r13-9168-g54d5c2b1f7439ae01781532b52d9bda99091c163
Author: Eric Botcazou 
Date:   Mon Nov 4 11:15:15 2024 +0100

Add regression test

This is for the latest fix made to Selected_Length_Checks in Checks.

gcc/testsuite
* gnat.dg/specs/array7.ads: New test.

Diff:
---
 gcc/testsuite/gnat.dg/specs/array7.ads | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/gcc/testsuite/gnat.dg/specs/array7.ads 
b/gcc/testsuite/gnat.dg/specs/array7.ads
new file mode 100644
index ..643ec3bb9ce5
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/specs/array7.ads
@@ -0,0 +1,14 @@
+-- { dg-do compile }
+-- { dg-options "-O" }
+
+package Array7 is
+
+  type I is interface;
+
+  type Rec (Name_Len : Natural) is new I with record
+Input : String (1 .. Name_Len);
+  end record;
+
+  function Image (R : Rec) return String is ("I" & String (R.Input));
+
+end Array7;

[gcc r13-9167] ada: Fix internal error on concatenation of discriminant-dependent component

[Eric Botcazou via Gcc-cvs]

https://gcc.gnu.org/g:bcf47b4d18378a90b3529b48d8d6e9085788f83b

commit r13-9167-gbcf47b4d18378a90b3529b48d8d6e9085788f83b
Author: Eric Botcazou 
Date:   Fri Aug 16 16:03:30 2024 +0200

ada: Fix internal error on concatenation of discriminant-dependent component

This only occurs with optimization enabled, but the expanded code is always
wrong because it reuses the formal parameter of an initialization procedure
associated with a discriminant (a discriminal in GNAT parlance) outside of
the initialization procedure.

gcc/ada/

* checks.adb (Selected_Length_Checks.Get_E_Length): For a
component of a record with discriminants and if the expression is
a selected component, try to build an actual subtype from its
prefix instead of from the discriminal.

Diff:
---
 gcc/ada/checks.adb | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/checks.adb b/gcc/ada/checks.adb
index ca6fe42d967a..bce7d8f8b8a7 100644
--- a/gcc/ada/checks.adb
+++ b/gcc/ada/checks.adb
@@ -9779,7 +9779,15 @@ package body Checks is
  if Ekind (Scope (E)) = E_Record_Type
and then Has_Discriminants (Scope (E))
  then
-N := Build_Discriminal_Subtype_Of_Component (E);
+--  If the expression is a selected component, in other words,
+--  has a prefix, then build an actual subtype from the prefix.
+--  Otherwise, build an actual subtype from the discriminal.
+
+if Nkind (Expr) = N_Selected_Component then
+   N := Build_Actual_Subtype_Of_Component (E, Expr);
+else
+   N := Build_Discriminal_Subtype_Of_Component (E);
+end if;
 
 if Present (N) then
Insert_Action (Expr, N);

[gcc r14-10876] Reimplement 'assume' processing pass.

[Andrew Macleod via Gcc-cvs]

https://gcc.gnu.org/g:393ee6b64579ea5ae5ae88079d271d3a237c7d9f

commit r14-10876-g393ee6b64579ea5ae5ae88079d271d3a237c7d9f
Author: Andrew MacLeod 
Date:   Fri Nov 1 12:46:39 2024 -0400

Reimplement 'assume' processing pass.

Rework the assume pass to work properly and fail conservatively when it
does.  Also move it to its own file.

PR tree-optimization/117287
gcc/
* Makefile.in (IBJS): Add tree-assume.o
* gimple-range.cc (assume_query::assume_range_p): Remove.
(assume_query::range_of_expr): Remove.
(assume_query::assume_query): Move to tree-assume.cc.
(assume_query::~assume_query): Remove.
(assume_query::calculate_op): Move to tree-assume.cc.
(assume_query::calculate_phi): Likewise.
(assume_query::check_taken_edge): Remove.
(assume_query::calculate_stmt): Move to tree-assume.cc.
(assume_query::dump): Remove.
* gimple-range.h (class assume_query): Move to tree-assume.cc
* tree-assume.cc: New
* tree-vrp.cc (struct pass_data_assumptions): Move to 
tree-assume.cc.
(class pass_assumptions): Likewise.
(make_pass_assumptions): Likewise.

gcc/testsuite/
* g++.dg/cpp23/pr117287-attr.C: New.

Diff:
---
 gcc/Makefile.in|   1 +
 gcc/gimple-range.cc| 188 --
 gcc/gimple-range.h |  17 --
 gcc/testsuite/g++.dg/cpp23/pr117287-attr.C |  38 +++
 gcc/tree-assume.cc | 384 +
 gcc/tree-vrp.cc|  68 -
 6 files changed, 423 insertions(+), 273 deletions(-)

diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index a74761b7ab32..d475bf1c32ec 100644
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -1697,6 +1697,7 @@ OBJS = \
ubsan.o \
sanopt.o \
sancov.o \
+   tree-assume.o \
tree-call-cdce.o \
tree-cfg.o \
tree-cfgcleanup.o \
diff --git a/gcc/gimple-range.cc b/gcc/gimple-range.cc
index 4d3b1ce85884..5ad658cab39e 100644
--- a/gcc/gimple-range.cc
+++ b/gcc/gimple-range.cc
@@ -711,194 +711,6 @@ disable_ranger (struct function *fun)
   bitmap_obstack_release (NULL);
 }
 
-// 
-
-// If there is a non-varying value associated with NAME, return true and the
-// range in R.
-
-bool
-assume_query::assume_range_p (vrange &r, tree name)
-{
-  if (global.get_range (r, name))
-return !r.varying_p ();
-  return false;
-}
-
-// Query used by GORI to pick up any known value on entry to a block.
-
-bool
-assume_query::range_of_expr (vrange &r, tree expr, gimple *stmt)
-{
-  if (!gimple_range_ssa_p (expr))
-return get_tree_range (r, expr, stmt);
-
-  if (!global.get_range (r, expr))
-r.set_varying (TREE_TYPE (expr));
-  return true;
-}
-
-// If the current function returns an integral value, and has a single return
-// statement, it will calculate any SSA_NAMES it can determine ranges for
-// assuming the function returns 1.
-
-assume_query::assume_query ()
-{
-  basic_block exit_bb = EXIT_BLOCK_PTR_FOR_FN (cfun);
-  if (single_pred_p (exit_bb))
-{
-  basic_block bb = single_pred (exit_bb);
-  gimple_stmt_iterator gsi = gsi_last_nondebug_bb (bb);
-  if (gsi_end_p (gsi))
-   return;
-  gimple *s = gsi_stmt (gsi);
-  if (!is_a (s))
-   return;
-  greturn *gret = as_a (s);
-  tree op = gimple_return_retval (gret);
-  if (!gimple_range_ssa_p (op))
-   return;
-  tree lhs_type = TREE_TYPE (op);
-  if (!irange::supports_p (lhs_type))
-   return;
-
-  unsigned prec = TYPE_PRECISION (lhs_type);
-  int_range<2> lhs_range (lhs_type, wi::one (prec), wi::one (prec));
-  global.set_range (op, lhs_range);
-
-  gimple *def = SSA_NAME_DEF_STMT (op);
-  if (!def || gimple_get_lhs (def) != op)
-   return;
-  fur_stmt src (gret, this);
-  calculate_stmt (def, lhs_range, src);
-}
-}
-
-// Evaluate operand OP on statement S, using the provided LHS range.
-// If successful, set the range in the global table, then visit OP's def stmt.
-
-void
-assume_query::calculate_op (tree op, gimple *s, vrange &lhs, fur_source &src)
-{
-  Value_Range op_range (TREE_TYPE (op));
-  if (m_gori.compute_operand_range (op_range, s, lhs, op, src)
-  && !op_range.varying_p ())
-{
-  // Set the global range, merging if there is already a range.
-  global.merge_range (op, op_range);
-  gimple *def_stmt = SSA_NAME_DEF_STMT (op);
-  if (def_stmt && gimple_get_lhs (def_stmt) == op)
-   calculate_stmt (def_stmt, op_range, src);
-}
-}
-
-// Evaluate PHI statement, using the provided LHS range.
-// Check each constant argument predecessor if it can be taken
-// provide LHS to any symbolic arguments, and process their def statements.

[gcc r14-10875] Make fur_edge accessible.

[Andrew Macleod via Gcc-cvs]

https://gcc.gnu.org/g:08054021c88d028ce313ec80c034d42a84ee8276

commit r14-10875-g08054021c88d028ce313ec80c034d42a84ee8276
Author: Andrew MacLeod 
Date:   Fri Nov 1 10:56:54 2024 -0400

Make fur_edge accessible.

Move the decl of fur_edge out of the source file into the header file.

* gimple-range-fold.cc (class fur_edge): Relocate from here.
(fur_edge::fur_edge): Also move to:
* gimple-range-fold.h (class fur_edge): Relocate to here.
(fur_edge::fur_edge): Likewise.

Diff:
---
 gcc/gimple-range-fold.cc | 20 
 gcc/gimple-range-fold.h  | 14 ++
 2 files changed, 14 insertions(+), 20 deletions(-)

diff --git a/gcc/gimple-range-fold.cc b/gcc/gimple-range-fold.cc
index 9c4ad1ee7b91..8020a1a3c63b 100644
--- a/gcc/gimple-range-fold.cc
+++ b/gcc/gimple-range-fold.cc
@@ -108,26 +108,6 @@ fur_source::register_relation (edge e ATTRIBUTE_UNUSED,
 {
 }
 
-// This version of fur_source will pick a range up off an edge.
-
-class fur_edge : public fur_source
-{
-public:
-  fur_edge (edge e, range_query *q = NULL);
-  virtual bool get_operand (vrange &r, tree expr) override;
-  virtual bool get_phi_operand (vrange &r, tree expr, edge e) override;
-private:
-  edge m_edge;
-};
-
-// Instantiate an edge based fur_source.
-
-inline
-fur_edge::fur_edge (edge e, range_query *q) : fur_source (q)
-{
-  m_edge = e;
-}
-
 // Get the value of EXPR on edge m_edge.
 
 bool
diff --git a/gcc/gimple-range-fold.h b/gcc/gimple-range-fold.h
index 7cbe15d05e53..a619a530769e 100644
--- a/gcc/gimple-range-fold.h
+++ b/gcc/gimple-range-fold.h
@@ -142,6 +142,20 @@ protected:
   relation_oracle *m_oracle;
 };
 
+
+// This version of fur_source will pick a range up off an edge.
+
+class fur_edge : public fur_source
+{
+public:
+  fur_edge (edge e, range_query *q = NULL) : fur_source (q)
+{ m_edge = e; }
+  virtual bool get_operand (vrange &r, tree expr) override;
+  virtual bool get_phi_operand (vrange &r, tree expr, edge e) override;
+private:
+  edge m_edge;
+};
+
 // This class uses ranges to fold a gimple statement producing a range for
 // the LHS.  The source of all operands is supplied via the fur_source class
 // which provides a range_query as well as a source location and any other

[gcc r14-10877] Update bitwise_or op_range.

[Andrew Macleod via Gcc-cvs]

https://gcc.gnu.org/g:2a9fbe1920779b65eb817db7ce0c60096b0cea9e

commit r14-10877-g2a9fbe1920779b65eb817db7ce0c60096b0cea9e
Author: Andrew MacLeod 
Date:   Thu Oct 31 14:07:00 2024 -0400

Update bitwise_or op_range.

If the LHS of a bitwise OR is positive, then so are both operands when
using op1_range or op2_range.

gcc/
* range-op.cc (operator_bitwise_or::op1_range): If LHS is signed
positive, so are both operands.

gcc/testsuite
* g++.dg/cpp23/attr-assume-opt.C (f2b): Alternate flow test.

Diff:
---
 gcc/range-op.cc  | 13 ++
 gcc/testsuite/g++.dg/cpp23/attr-assume-opt.C | 37 +++-
 2 files changed, 49 insertions(+), 1 deletion(-)

diff --git a/gcc/range-op.cc b/gcc/range-op.cc
index 4ccb86ef0ba8..d1a1cd736876 100644
--- a/gcc/range-op.cc
+++ b/gcc/range-op.cc
@@ -3738,6 +3738,19 @@ operator_bitwise_or::op1_range (irange &r, tree type,
   r.set_zero (type);
   return true;
 }
+
+  //   if (A < 0 && B < 0)
+  // Sometimes gets translated to
+  //   _1 = A | B
+  //   if (_1 < 0))
+  // It is useful for ranger to recognize a positive LHS means the RHS
+  // operands are also positive when dealing with the ELSE range..
+  if (TYPE_SIGN (type) == SIGNED && wi::ge_p (lhs.lower_bound (), 0, SIGNED))
+{
+  unsigned prec = TYPE_PRECISION (type);
+  r.set (type, wi::zero (prec), wi::max_value (prec, SIGNED));
+  return true;
+}
   r.set_varying (type);
   return true;
 }
diff --git a/gcc/testsuite/g++.dg/cpp23/attr-assume-opt.C 
b/gcc/testsuite/g++.dg/cpp23/attr-assume-opt.C
index 88d5e78dbbae..e61ba7a27e0f 100644
--- a/gcc/testsuite/g++.dg/cpp23/attr-assume-opt.C
+++ b/gcc/testsuite/g++.dg/cpp23/attr-assume-opt.C
@@ -38,5 +38,40 @@ f3 (int x, int y, int z)
   return 1;
 }
 
+// This is the same as f2, except there is more complicated flow and 
+// required a range-op update to bitwise or.
+
+void barn(int x);
+// assume (x+12 == 14 && y >= 0 && y + 10 < 13 && z + 4 >= 4 && z - 2 < 18)
+// in different order and form with function calls to cause branches.
+bool assume_func (int x, int y, int z)
+{
+  if (z - 2 >= 18)
+return false;
+  if (x+12 != 14)
+return false;
+  barn (x);
+  if (y < 0)
+return false;
+  if (z + 4 < 4)
+return false;
+  barn (y);
+  if (y + 10 >= 13)
+return false;
+  barn (z);
+  return true;
+}
+
+int
+f2b (int x, int y, int z)
+{
+  [[assume (assume_func (x, y, z))]];
+  unsigned q = x + y + z;
+  if (q*2 > 46)
+return 0;
+  return 1;
+}
+
+
 /* { dg-final { scan-tree-dump-times "return 0" 0 "vrp2" } } */
-/* { dg-final { scan-tree-dump-times "return 1" 3 "vrp2" } } */
+/* { dg-final { scan-tree-dump-times "return 1" 4 "vrp2" } } */

[gcc(refs/vendors/redhat/heads/gcc-14-branch)] Merge commit 'r14-10877-g2a9fbe1920779b65eb817db7ce0c60096b0cea9e' into redhat/gcc-14-branch

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:b84ce6a258e01f6559a1855b5f1d1ba4e69a927b

commit b84ce6a258e01f6559a1855b5f1d1ba4e69a927b
Merge: 3f6cf880bdad 2a9fbe192077
Author: Jakub Jelinek 
Date:   Mon Nov 4 15:48:41 2024 +0100

Merge commit 'r14-10877-g2a9fbe1920779b65eb817db7ce0c60096b0cea9e' into 
redhat/gcc-14-branch

Diff:

 gcc/ChangeLog  | 187 ++
 gcc/DATESTAMP  |   2 +-
 gcc/Makefile.in|   1 +
 gcc/ada/ChangeLog  |   7 +
 gcc/ada/checks.adb |  10 +-
 gcc/config/aarch64/aarch64-ldp-fusion.cc   | 127 ++-
 gcc/config/aarch64/aarch64-sve-builtins-base.def   |  13 +-
 gcc/config/aarch64/aarch64.cc  |   7 +
 gcc/config/i386/cmpccxaddintrin.h  |   6 +-
 gcc/config/i386/i386.cc|  13 +-
 gcc/config/i386/i386.h |   4 +
 gcc/config/i386/sse.md | 268 ++
 gcc/config/rs6000/rs6000-logue.cc  |   5 +
 gcc/config/rs6000/rs6000-p8swap.cc |   8 +-
 gcc/config/rs6000/rs6000.cc|   4 -
 gcc/config/rs6000/rs6000.h |   2 +
 gcc/cp/ChangeLog   |  10 +
 gcc/expr.cc|   4 +-
 gcc/fortran/ChangeLog  |  27 ++
 gcc/fortran/decl.cc|   7 +-
 gcc/fortran/match.h|   2 +-
 gcc/fortran/primary.cc |   8 +-
 gcc/function.cc|   2 +
 gcc/gimple-range-fold.cc   |  20 --
 gcc/gimple-range-fold.h|  14 +
 gcc/gimple-range.cc| 188 --
 gcc/gimple-range.h |  17 -
 gcc/range-op.cc|  13 +
 gcc/reorg.cc   |  38 +-
 gcc/testsuite/ChangeLog| 224 
 gcc/testsuite/g++.dg/cpp23/attr-assume-opt.C   |  37 +-
 gcc/testsuite/g++.dg/cpp23/pr117287-attr.C |  38 ++
 gcc/testsuite/g++.dg/lto/pr107467_0.C  |  52 +++
 gcc/testsuite/g++.dg/torture/pr116783.C|  98 ++
 .../g++.target/aarch64/sve/aarch64-ssve.exp|   6 +
 gcc/testsuite/gcc.c-torture/execute/20241029-1.c   |  23 ++
 gcc/testsuite/gcc.dg/bitint-113.c  |  40 +++
 .../gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c   |   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_f16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_f32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_f64.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_s16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_s32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_s64.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_s8.c |   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_u16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_u32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_u64.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn1q_u8.c |   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c   |   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_f16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_f32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_f64.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_s16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_s32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_s64.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_s8.c |   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_u16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_u32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_u64.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/trn2q_u8.c |   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c   |   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c |   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c |   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c   |   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c|   1 +
 .../gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c|

[gcc/redhat/heads/gcc-14-branch] (38 commits) Merge commit 'r14-10877-g2a9fbe1920779b65eb817db7ce0c60096b

[Jakub Jelinek via Gcc-cvs]

The branch 'redhat/heads/gcc-14-branch' was updated to point to:

 b84ce6a258e0... Merge commit 'r14-10877-g2a9fbe1920779b65eb817db7ce0c60096b

It previously pointed to:

 3f6cf880bdad... Merge commit 'r14-10840-g7965062f9e9ba634247b1dab22e1d83f44

Diff:

Summary of changes (added commits):
---

  b84ce6a... Merge commit 'r14-10877-g2a9fbe1920779b65eb817db7ce0c60096b
  2a9fbe1... Update bitwise_or op_range. (*)
  393ee6b... Reimplement 'assume' processing pass. (*)
  0805402... Make fur_edge accessible. (*)
  72b7bbf... libstdc++: Fix up 117406.cc test [PR117406] (*)
  377f81a... libstdc++: Fix up std::{,b}float16_t std::{ilogb,l{,l}r{oun (*)
  1553e40... expand: Fix up expansion of VIEW_CONVERT_EXPR to BITINT_TYP (*)
  8228539... function: Call do_pending_stack_adjust in assign_parms [PR1 (*)
  ec43369... libstdc++: Use if consteval rather than if (std::__is_const (*)
  0bcca04... Add regression test (*)
  4f56306... ada: Fix internal error on concatenation of discriminant-de (*)
  09033ae... Daily bump. (*)
  e455f39... Daily bump. (*)
  9b1f15e... Daily bump. (*)
  82bfb6c... i386: Do not allow pointer conversion for CMPccXADD intrin  (*)
  9a5ee8d... Fortran: Fix ICE with structure constructor in data stateme (*)
  df54290... [APX PPX] Avoid generating unmatched pushp/popp in pro/epil (*)
  ea1f03f... Daily bump. (*)
  b4d4b86... rs6000: ROP - Do not disable shrink-wrapping for leaf funct (*)
  8ac2f3c... aarch64: Forbid F64MM permutes in streaming mode (*)
  4e174ac... Fix function multiversioning dispatcher link error with LTO (*)
  0e132a3... Daily bump. (*)
  acc0b9f... jit: fix leak of pending_assemble_externals_set [PR117275] (*)
  70f911b... jit: reset state in varasm.cc [PR117275] (*)
  771873f... testsuite, jit: fix test-error-pr63969-missing-driver.c (*)
  434483a... aarch64: Assume alias conflict if common address reg change (*)
  71a0cf6... Fix ICE due to subreg:us_truncate. (*)
  f280503... Daily bump. (*)
  0ea3dca... Fix miscompilation of function containing __builtin_unreach (*)
  ab74b2d... rs6000: Fix PTImode handling in power8 swap optimization pa (*)
  f675f1b... Daily bump. (*)
  6247aae... testsuite: add testcase for fixed PR107467 (*)
  ed8fb9b... Revert "testsuite: add testcase for fixed PR107467" (*)
  2f0d109... testsuite: add testcase for fixed PR107467 (*)
  c79acf6... Daily bump. (*)
  ec9bd14... testsuite: Sanitize pacbti test cases for Cortex-M (*)
  77bf8aa... Daily bump. (*)
  e44d4b7... Daily bump. (*)

(*) This commit already exists in another branch.
Because the reference `refs/vendors/redhat/heads/gcc-14-branch' matches
your hooks.email-new-commits-only configuration,
no separate email is sent for this commit.

[gcc r15-4949] aarch64: Remove scheduling models for falkor and saphira

[Andrew Pinski via Gcc-cvs]

https://gcc.gnu.org/g:acf18b5a7a47b466ffbf6ef1bc12d3397b209f03

commit r15-4949-gacf18b5a7a47b466ffbf6ef1bc12d3397b209f03
Author: Andrew Pinski 
Date:   Thu Oct 31 17:40:50 2024 +

aarch64: Remove scheduling models for falkor and saphira

These 2 qualcomm cores have been long gone in that Qualcomm has not
supported since at least 2019. Removing them will make it easier I think
to change the insn type attributes instead of keeping them up todate.

Note this does not remove the cores, just the schedule models.

Bootstrapped and tested on aarch64-linux-gnu.

gcc/ChangeLog:

* config/aarch64/aarch64-cores.def (falkor): Use cortex-a57 
scheduler.
(saphira): Likewise.
* config/aarch64/aarch64.md: Don't include falkor.md and saphira.md.
* config/aarch64/falkor.md: Removed.
* config/aarch64/saphira.md: Removed.

Signed-off-by: Andrew Pinski 

Diff:
---
 gcc/config/aarch64/aarch64-cores.def |   8 +-
 gcc/config/aarch64/aarch64.md|   2 -
 gcc/config/aarch64/falkor.md | 687 ---
 gcc/config/aarch64/saphira.md| 560 
 4 files changed, 4 insertions(+), 1253 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-cores.def 
b/gcc/config/aarch64/aarch64-cores.def
index 9d4abf222435..8c398596be36 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -83,14 +83,14 @@ AARCH64_CORE("emag",emag,  xgene1,V8A,  
(CRC, CRYPTO), emag, 0x5
 AARCH64_CORE("xgene1",  xgene1,xgene1,V8A,  (), xgene1, 0x50, 
0x000, -1)
 
 /* Qualcomm ('Q') cores. */
-AARCH64_CORE("falkor",  falkor,falkor,V8A,  (CRC, CRYPTO, RDMA), 
qdf24xx,   0x51, 0xC00, -1)
-AARCH64_CORE("qdf24xx", qdf24xx,   falkor,V8A,  (CRC, CRYPTO, RDMA), 
qdf24xx,   0x51, 0xC00, -1)
+AARCH64_CORE("falkor",  falkor,cortexa57,V8A,  (CRC, CRYPTO, 
RDMA), qdf24xx,   0x51, 0xC00, -1)
+AARCH64_CORE("qdf24xx", qdf24xx,   cortexa57,V8A,  (CRC, CRYPTO, 
RDMA), qdf24xx,   0x51, 0xC00, -1)
 
 /* Samsung ('S') cores. */
 AARCH64_CORE("exynos-m1",   exynosm1,  exynosm1,  V8A,  (CRC, CRYPTO), 
exynosm1,  0x53, 0x001, -1)
 
 /* HXT ('h') cores. */
-AARCH64_CORE("phecda",  phecda,falkor,V8A,  (CRC, CRYPTO), 
qdf24xx,   0x68, 0x000, -1)
+AARCH64_CORE("phecda",  phecda,cortexa57,V8A,  (CRC, CRYPTO), 
qdf24xx,   0x68, 0x000, -1)
 
 /* ARMv8.1-A Architecture Processors.  */
 
@@ -150,7 +150,7 @@ AARCH64_CORE("zeus", zeus, cortexa57, V8_4A,  (SVE, I8MM, 
BF16, PROFILE, SSBS, R
 AARCH64_CORE("neoverse-512tvb", neoverse512tvb, cortexa57, V8_4A,  (SVE, I8MM, 
BF16, PROFILE, SSBS, RNG), neoverse512tvb, INVALID_IMP, INVALID_CORE, -1)
 
 /* Qualcomm ('Q') cores. */
-AARCH64_CORE("saphira", saphira,saphira,V8_4A,  (CRYPTO), saphira, 
  0x51, 0xC01, -1)
+AARCH64_CORE("saphira", saphira,cortexa57,V8_4A,  (CRYPTO), 
saphira,   0x51, 0xC01, -1)
 
 /* ARMv8.6-A Architecture Processors.  */
 
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 20956fc49d82..8d10197c9e8d 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -589,8 +589,6 @@
 (include "../arm/cortex-a53.md")
 (include "../arm/cortex-a57.md")
 (include "../arm/exynos-m1.md")
-(include "falkor.md")
-(include "saphira.md")
 (include "thunderx.md")
 (include "../arm/xgene1.md")
 (include "thunderx2t99.md")
diff --git a/gcc/config/aarch64/falkor.md b/gcc/config/aarch64/falkor.md
deleted file mode 100644
index 0c5cf930e894..
--- a/gcc/config/aarch64/falkor.md
+++ /dev/null
@@ -1,687 +0,0 @@
-;; Falkor pipeline description
-;; Copyright (C) 2017-2024 Free Software Foundation, Inc.
-;;
-;; This file is part of GCC.
-;;
-;; GCC is free software; you can redistribute it and/or modify it
-;; under the terms of the GNU General Public License as published by
-;; the Free Software Foundation; either version 3, or (at your option)
-;; any later version.
-;;
-;; GCC is distributed in the hope that it will be useful, but
-;; WITHOUT ANY WARRANTY; without even the implied warranty of
-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-;; General Public License for more details.
-;;
-;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING3.  If not see
-;; .
-
-(define_automaton "falkor")
-
-;; Complex int instructions (e.g. multiply and divide) execute in the X
-;; pipeline.  Simple int instructions execute in the X, Y, and Z pipelines.
-
-(define_cpu_unit "falkor_x" "falkor")
-(define_cpu_unit "falkor_y" "falkor")
-(define_cpu_unit "falkor_z" "falkor")
-
-;; Branches execute in the B pipeline or in one of the int pipelines depending
-;; on how complex it is.  Simple int insns (like movz) can also execute here.
-
-(define_cpu_unit "falkor_b" "fal

[gcc r15-4950] aarch64: remove falkor-tag-collision-avoidance pass

[Andrew Pinski via Gcc-cvs]

https://gcc.gnu.org/g:1cc2c454033dae2dfa4ba2dc3882399cca669cb0

commit r15-4950-g1cc2c454033dae2dfa4ba2dc3882399cca669cb0
Author: Andrew Pinski 
Date:   Thu Oct 31 17:54:21 2024 +

aarch64: remove falkor-tag-collision-avoidance pass

This code is not well tested and there is only a single testcase
(gcc.target/aarch64/pr94530.c) which only enables this code but it
is testing to make sure there is no ICE.

The falkor cores have not been supported from Qualcomm from 2019 or so
either. And I don't have a way to test these cores internally either.

Bootstrapped and tested on aarch64-linux-gnu.

gcc/ChangeLog:

* config/aarch64/aarch64-passes.def: Don't add 
pass_tag_collision_avoidance.
* config/aarch64/aarch64-protos.h 
(make_pass_tag_collision_avoidance): Remove.
* config/aarch64/aarch64-tuning-flags.def (RENAME_LOAD_REGS): 
Remove.
* config/aarch64/tuning_models/qdf24xx.h (qdf24xx_tunings): Set 
tuning flags to
AARCH64_EXTRA_TUNE_NONE.
* config/aarch64/falkor-tag-collision-avoidance.cc: Removed.
* config/aarch64/t-aarch64 (falkor-tag-collision-avoidance.o): 
Remove.
* config.gcc (aarch64*-*-*): Remove 
falkor-tag-collision-avoidance.o from extra_objs.

Signed-off-by: Andrew Pinski 

Diff:
---
 gcc/config.gcc |   2 +-
 gcc/config/aarch64/aarch64-passes.def  |   1 -
 gcc/config/aarch64/aarch64-protos.h|   1 -
 gcc/config/aarch64/aarch64-tuning-flags.def|   2 -
 .../aarch64/falkor-tag-collision-avoidance.cc  | 888 -
 gcc/config/aarch64/t-aarch64   |  10 -
 gcc/config/aarch64/tuning_models/qdf24xx.h |   2 +-
 7 files changed, 2 insertions(+), 904 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 1b0637d7ff85..86171635f7d2 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -351,7 +351,7 @@ aarch64*-*-*)
c_target_objs="aarch64-c.o"
cxx_target_objs="aarch64-c.o"
d_target_objs="aarch64-d.o"
-   extra_objs="aarch64-builtins.o aarch-common.o aarch64-sve-builtins.o 
aarch64-sve-builtins-shapes.o aarch64-sve-builtins-base.o 
aarch64-sve-builtins-sve2.o aarch64-sve-builtins-sme.o 
cortex-a57-fma-steering.o aarch64-speculation.o 
falkor-tag-collision-avoidance.o aarch-bti-insert.o aarch64-cc-fusion.o 
aarch64-early-ra.o aarch64-ldp-fusion.o"
+   extra_objs="aarch64-builtins.o aarch-common.o aarch64-sve-builtins.o 
aarch64-sve-builtins-shapes.o aarch64-sve-builtins-base.o 
aarch64-sve-builtins-sve2.o aarch64-sve-builtins-sme.o 
cortex-a57-fma-steering.o aarch64-speculation.o aarch-bti-insert.o 
aarch64-cc-fusion.o aarch64-early-ra.o aarch64-ldp-fusion.o"
target_gtfiles="\$(srcdir)/config/aarch64/aarch64-protos.h 
\$(srcdir)/config/aarch64/aarch64-builtins.h 
\$(srcdir)/config/aarch64/aarch64-builtins.cc 
\$(srcdir)/config/aarch64/aarch64-sve-builtins.h 
\$(srcdir)/config/aarch64/aarch64-sve-builtins.cc"
target_has_targetm_common=yes
;;
diff --git a/gcc/config/aarch64/aarch64-passes.def 
b/gcc/config/aarch64/aarch64-passes.def
index e20e6f4395b7..c7ccb46c2653 100644
--- a/gcc/config/aarch64/aarch64-passes.def
+++ b/gcc/config/aarch64/aarch64-passes.def
@@ -23,7 +23,6 @@ INSERT_PASS_AFTER (pass_regrename, 1, pass_fma_steering);
 INSERT_PASS_BEFORE (pass_reorder_blocks, 1, pass_track_speculation);
 INSERT_PASS_BEFORE (pass_late_thread_prologue_and_epilogue, 1, 
pass_switch_pstate_sm);
 INSERT_PASS_BEFORE (pass_late_thread_prologue_and_epilogue, 1, 
pass_late_track_speculation);
-INSERT_PASS_AFTER (pass_machine_reorg, 1, pass_tag_collision_avoidance);
 INSERT_PASS_BEFORE (pass_shorten_branches, 1, pass_insert_bti);
 INSERT_PASS_AFTER (pass_if_after_combine, 1, pass_cc_fusion);
 INSERT_PASS_BEFORE (pass_early_remat, 1, pass_ldp_fusion);
diff --git a/gcc/config/aarch64/aarch64-protos.h 
b/gcc/config/aarch64/aarch64-protos.h
index e8588e1cb177..6ab41a21c75d 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -1170,7 +1170,6 @@ rtl_opt_pass *make_pass_aarch64_early_ra (gcc::context *);
 rtl_opt_pass *make_pass_fma_steering (gcc::context *);
 rtl_opt_pass *make_pass_track_speculation (gcc::context *);
 rtl_opt_pass *make_pass_late_track_speculation (gcc::context *);
-rtl_opt_pass *make_pass_tag_collision_avoidance (gcc::context *);
 rtl_opt_pass *make_pass_insert_bti (gcc::context *ctxt);
 rtl_opt_pass *make_pass_cc_fusion (gcc::context *ctxt);
 rtl_opt_pass *make_pass_switch_pstate_sm (gcc::context *ctxt);
diff --git a/gcc/config/aarch64/aarch64-tuning-flags.def 
b/gcc/config/aarch64/aarch64-tuning-flags.def
index a9f48f5d3d4e..5939602576bd 100644
--- a/gcc/config/aarch64/aarch64-tuning-flags.def
+++ b/gcc/config/aarch64/aarch64-tuning-flags.def
@@ -36,8 +36,6 @@ AARCH64_EXTRA_TUNING_OPTION ("rename_fma_regs", 
RENAME_FMA_REGS)
are not 

[gcc r15-4873] PR 117048: simplify-rtx: Simplify (X << C1) [+, ^] (X >> C2) into ROTATE

[Kyrylo Tkachov via Gcc-cvs]

https://gcc.gnu.org/g:de2bc6a7367aca2eecc925ebb64cfb86998d89f3

commit r15-4873-gde2bc6a7367aca2eecc925ebb64cfb86998d89f3
Author: Kyrylo Tkachov 
Date:   Tue Oct 15 06:32:31 2024 -0700

PR 117048: simplify-rtx: Simplify (X << C1) [+,^] (X >> C2) into ROTATE

simplify-rtx can transform (X << C1) | (X >> C2) into ROTATE (X, C1) when
C1 + C2 == mode-width.  But the transformation is also valid for PLUS and 
XOR.
Indeed GIMPLE can also do the fold.  Let's teach RTL to do it too.

The motivating testcase for this is in AArch64 intrinsics:

uint64x2_t G2(uint64x2_t a, uint64x2_t b) {
uint64x2_t c = veorq_u64(a, b);
return veorq_u64(vaddq_u64(c, c), vshrq_n_u64(c, 63));
}

which I was hoping to fold to a single XAR (a ROTATE+XOR instruction) but
GCC was failing to detect the rotate operation for two reasons:
1) The combination of the two arms of the expression is done under XOR 
rather
than IOR that simplify-rtx currently supports.
2) The ASHIFT operation is actually a (PLUS X X) operation and thus is not
detected as the LHS of the two arms we require.

The patch fixes both issues.  The analysis of the two arms of the rotation
expression is factored out into a common helper simplify_rotate which is
then used in the PLUS, XOR, IOR cases in simplify_binary_operation_1.

The check-assembly testcase for this is added in the following patch because
it needs some extra AArch64 backend work, but I've added self-tests in this
patch to validate the transformation.

Bootstrapped and tested on aarch64-none-linux-gnu

Signed-off-by: Kyrylo Tkachov 

PR target/117048
* simplify-rtx.cc (extract_ashift_operands_p): Define.
(simplify_rotate_op): Likewise.
(simplify_context::simplify_binary_operation_1): Use the above in
the PLUS, IOR, XOR cases.
(test_vector_rotate): Define.
(test_vector_ops): Use the above.

Diff:
---
 gcc/simplify-rtx.cc | 204 +++-
 1 file changed, 156 insertions(+), 48 deletions(-)

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 2c04ce960ee4..0ff72638d85f 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -2820,6 +2820,104 @@ reverse_rotate_by_imm_p (machine_mode mode, unsigned 
int left, rtx op1)
   return false;
 }
 
+/* Analyse argument X to see if it represents an (ASHIFT X Y) operation
+   and return the expression to be shifted in SHIFT_OPND and the shift amount
+   in SHIFT_AMNT.  This is primarily used to group handling of ASHIFT (X, CST)
+   and (PLUS (X, X)) in one place.  If the expression is not equivalent to an
+   ASHIFT then return FALSE and set SHIFT_OPND and SHIFT_AMNT to NULL.  */
+
+static bool
+extract_ashift_operands_p (rtx x, rtx *shift_opnd, rtx *shift_amnt)
+{
+  if (GET_CODE (x) == ASHIFT)
+{
+  *shift_opnd = XEXP (x, 0);
+  *shift_amnt = XEXP (x, 1);
+  return true;
+}
+  if (GET_CODE (x) == PLUS && rtx_equal_p (XEXP (x, 0), XEXP (x, 1)))
+{
+  *shift_opnd = XEXP (x, 0);
+  *shift_amnt = CONST1_RTX (GET_MODE (x));
+  return true;
+}
+  *shift_opnd = NULL_RTX;
+  *shift_amnt = NULL_RTX;
+  return false;
+}
+
+/* OP0 and OP1 are combined under an operation of mode MODE that can
+   potentially result in a ROTATE expression.  Analyze the OP0 and OP1
+   and return the resulting ROTATE expression if so.  Return NULL otherwise.
+   This is used in detecting the patterns (X << C1) [+,|,^] (X >> C2) where
+   C1 + C2 == GET_MODE_UNIT_PRECISION (mode).
+   (X << C1) and (C >> C2) would be OP0 and OP1.  */
+
+static rtx
+simplify_rotate_op (rtx op0, rtx op1, machine_mode mode)
+{
+  /* Convert (ior (ashift A CX) (lshiftrt A CY)) where CX+CY equals the
+ mode size to (rotate A CX).  */
+
+  rtx opleft = simplify_rtx (op0);
+  rtx opright = simplify_rtx (op1);
+  rtx ashift_opnd, ashift_amnt;
+  /* In some cases the ASHIFT is not a direct ASHIFT.  Look deeper and extract
+ the relevant operands here.  */
+  bool ashift_op_p
+= extract_ashift_operands_p (op1, &ashift_opnd, &ashift_amnt);
+
+  if (ashift_op_p
+ || GET_CODE (op1) == SUBREG)
+{
+  opleft = op1;
+  opright = op0;
+}
+  else
+{
+  opright = op1;
+  opleft = op0;
+  ashift_op_p
+   = extract_ashift_operands_p (opleft, &ashift_opnd, &ashift_amnt);
+}
+
+  if (ashift_op_p && GET_CODE (opright) == LSHIFTRT
+  && rtx_equal_p (ashift_opnd, XEXP (opright, 0)))
+{
+  rtx leftcst = unwrap_const_vec_duplicate (ashift_amnt);
+  rtx rightcst = unwrap_const_vec_duplicate (XEXP (opright, 1));
+
+  if (CONST_INT_P (leftcst) && CONST_INT_P (rightcst)
+ && (INTVAL (leftcst) + INTVAL (rightcst)
+ == GET_MODE_UNIT_PRECISION (mode)))
+   return gen_rtx_ROTATE (mode, XEXP (opright, 0), ashift_amnt);
+}
+
+  /* Same, but for a

[gcc r15-4874] aarch64: Use canonical RTL representation for SVE2 XAR and extend it to fixed-width modes

[Kyrylo Tkachov via Gcc-cvs]

https://gcc.gnu.org/g:1e5ff11142b2a37e7fd07a85248a0179bbb534be

commit r15-4874-g1e5ff11142b2a37e7fd07a85248a0179bbb534be
Author: Kyrylo Tkachov 
Date:   Tue Oct 22 03:27:47 2024 -0700

aarch64: Use canonical RTL representation for SVE2 XAR and extend it to 
fixed-width modes

The MD pattern for the XAR instruction in SVE2 is currently expressed with
non-canonical RTL by using a ROTATERT code with a constant rotate amount.
Fix it by using the left ROTATE code.  This necessitates splitting out the
expander separately to translate the immediate coming from the intrinsic
from a right-rotate to a left-rotate immediate.

Additionally, as the SVE2 XAR instruction is unpredicated and can handle all
element sizes from .b to .d, it is a good fit for implementing the 
XOR+ROTATE
operation for Advanced SIMD modes where the TARGET_SHA3 cannot be used
(that can only handle V2DImode operands).  Therefore let's extend the 
accepted
modes of the SVE2 patternt to include the Advanced SIMD integer modes.

This leads to some tests for the svxar* intrinsics to fail because they now
simplify to a plain EOR when the rotate amount is the width of the element.
This simplification is desirable (EOR instructions have better or equal
throughput than XAR, and they are non-destructive of their input) so the
tests are adjusted.

For V2DImode XAR operations we should prefer the Advanced SIMD version when
it is available (TARGET_SHA3) because it is non-destructive, so restrict the
SVE2 pattern accordingly.  Tests are added to confirm this.

Bootstrapped and tested on aarch64-none-linux-gnu.
Ok for mainline?

Signed-off-by: Kyrylo Tkachov 

gcc/

* config/aarch64/iterators.md (SVE_ASIMD_FULL_I): New mode iterator.
* config/aarch64/aarch64-sve2.md (@aarch64_sve2_xar):
Use SVE_ASIMD_FULL_I modes.  Use ROTATE code for the rotate step.
Adjust output logic.
* config/aarch64/aarch64-sve-builtins-sve2.cc (svxar_impl): Define.
(svxar): Use the above.

gcc/testsuite/

* gcc.target/aarch64/xar_neon_modes.c: New test.
* gcc.target/aarch64/xar_v2di_nonsve.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/xar_s16.c: Scan for EOR rather 
than
XAR.
* gcc.target/aarch64/sve2/acle/asm/xar_s32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/xar_s64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/xar_s8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/xar_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/xar_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/xar_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/xar_u8.c: Likewise.

Diff:
---
 gcc/config/aarch64/aarch64-sve-builtins-sve2.cc| 18 +-
 gcc/config/aarch64/aarch64-sve2.md | 30 +++--
 gcc/config/aarch64/iterators.md|  3 ++
 .../gcc.target/aarch64/sve2/acle/asm/xar_s16.c | 18 ++
 .../gcc.target/aarch64/sve2/acle/asm/xar_s32.c | 18 ++
 .../gcc.target/aarch64/sve2/acle/asm/xar_s64.c | 18 ++
 .../gcc.target/aarch64/sve2/acle/asm/xar_s8.c  | 18 ++
 .../gcc.target/aarch64/sve2/acle/asm/xar_u16.c | 18 ++
 .../gcc.target/aarch64/sve2/acle/asm/xar_u32.c | 18 ++
 .../gcc.target/aarch64/sve2/acle/asm/xar_u64.c | 18 ++
 .../gcc.target/aarch64/sve2/acle/asm/xar_u8.c  | 18 ++
 gcc/testsuite/gcc.target/aarch64/xar_neon_modes.c  | 39 ++
 gcc/testsuite/gcc.target/aarch64/xar_v2di_nonsve.c | 16 +
 13 files changed, 191 insertions(+), 59 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc 
b/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc
index 64f86035c30e..f0ab7400ef50 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc
+++ b/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc
@@ -108,6 +108,22 @@ public:
   }
 };
 
+class svxar_impl : public function_base
+{
+public:
+  rtx
+  expand (function_expander &e) const override
+  {
+/* aarch64_sve2_xar represents this operation with a left-rotate RTX.
+   Convert the right-rotate amount from the intrinsic to fit this.  */
+machine_mode mode = e.vector_mode (0);
+HOST_WIDE_INT rot = GET_MODE_UNIT_BITSIZE (mode)
+   - INTVAL (e.args[2]);
+e.args[2] = aarch64_simd_gen_const_vector_dup (mode, rot);
+return e.use_exact_insn (code_for_aarch64_sve2_xar (mode));
+  }
+};
+
 class svcdot_impl : public function_base
 {
 public:
@@ -795,6 +811,6 @@ FUNCTION (svwhilege, while_comparison, (UNSPEC_WHILEGE, 
UNSPEC_WHILEHS))
 FUNCTION (svwhilegt, while_comparison, (UNSPEC_WHILEGT, UNSPEC_WHILEHI))
 FUNCTION (svwhilerw, svwhilerw_svwhilewr_impl, (UNSPEC_WHILERW))
 FUNCTION (svwhilewr, svwhilerw_svwh

[gcc r15-4875] PR 117048: aarch64: Add define_insn_and_split for vector ROTATE

[Kyrylo Tkachov via Gcc-cvs]

https://gcc.gnu.org/g:1411d39bc72515227de2e490eb8f629d8bf74c95

commit r15-4875-g1411d39bc72515227de2e490eb8f629d8bf74c95
Author: Kyrylo Tkachov 
Date:   Tue Oct 15 06:33:11 2024 -0700

PR 117048: aarch64: Add define_insn_and_split for vector ROTATE

The ultimate goal in this PR is to match the XAR pattern that is represented
as a (ROTATE (XOR X Y) VCST) from the ACLE intrinsics code in the testcase.
The first blocker for this was the missing recognition of ROTATE in
simplify-rtx, which is fixed in the previous patch.
The next problem is that once the ROTATE has been matched from the shifts
and orr/xor/plus, it will try to match it in an insn before trying to 
combine
the XOR into it.  But as we don't have a backend pattern for a vector ROTATE
this recog fails and combine does not try the followup XOR+ROTATE 
combination
which would have succeeded.

This patch solves that by introducing a sort of "scaffolding" pattern for
vector ROTATE, which allows it to be combined into the XAR.
If it fails to be combined into anything the splitter will break it back
down into the SHL+USRA sequence that it would have emitted.
By having this splitter we can special-case some rotate amounts in the 
future
to emit more specialised instructions e.g. from the REV* family.
This can be done if the ROTATE is not combined into something else.

This optimisation is done in the next patch in the series.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov 

gcc/

PR target/117048
* config/aarch64/aarch64-simd.md (*aarch64_simd_rotate_imm):
New define_insn_and_split.

gcc/testsuite/

PR target/117048
* gcc.target/aarch64/simd/pr117048.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64-simd.md   | 29 ++
 gcc/testsuite/gcc.target/aarch64/simd/pr117048.c | 73 
 2 files changed, 102 insertions(+)

diff --git a/gcc/config/aarch64/aarch64-simd.md 
b/gcc/config/aarch64/aarch64-simd.md
index e456f693d2f3..08b121227eee 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -1294,6 +1294,35 @@
   [(set_attr "type" "neon_shift_acc")]
 )
 
+;; After all the combinations and propagations of ROTATE have been
+;; attempted split any remaining vector rotates into SHL + USRA sequences.
+(define_insn_and_split "*aarch64_simd_rotate_imm"
+  [(set (match_operand:VDQ_I 0 "register_operand" "=&w")
+   (rotate:VDQ_I (match_operand:VDQ_I 1 "register_operand" "w")
+ (match_operand:VDQ_I 2 "aarch64_simd_lshift_imm")))]
+  "TARGET_SIMD"
+  "#"
+  "&& 1"
+  [(set (match_dup 3)
+   (ashift:VDQ_I (match_dup 1)
+ (match_dup 2)))
+   (set (match_dup 0)
+   (plus:VDQ_I
+ (lshiftrt:VDQ_I
+   (match_dup 1)
+   (match_dup 4))
+ (match_dup 3)))]
+  {
+operands[3] = reload_completed ? operands[0] : gen_reg_rtx (mode);
+rtx shft_amnt = unwrap_const_vec_duplicate (operands[2]);
+int bitwidth = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT;
+operands[4]
+  = aarch64_simd_gen_const_vector_dup (mode,
+  bitwidth - INTVAL (shft_amnt));
+  }
+  [(set_attr "length" "8")]
+)
+
 (define_insn "aarch64_rsra_n_insn"
  [(set (match_operand:VSDQ_I_DI 0 "register_operand" "=w")
(plus:VSDQ_I_DI
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/pr117048.c 
b/gcc/testsuite/gcc.target/aarch64/simd/pr117048.c
new file mode 100644
index ..621c0f46fc4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/pr117048.c
@@ -0,0 +1,73 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+#include 
+
+#pragma GCC target "+sha3"
+
+/*
+** func_shl_eor:
+** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
+** ret 
+*/
+uint64x2_t
+func_shl_eor (uint64x2_t a, uint64x2_t b) {
+  uint64x2_t c = veorq_u64 (a, b);
+  return veorq_u64(vshlq_n_u64(c, 1), vshrq_n_u64(c, 63));
+}
+
+/*
+** func_add_eor:
+** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
+** ret 
+*/
+uint64x2_t
+func_add_eor (uint64x2_t a, uint64x2_t b) {
+  uint64x2_t c = veorq_u64 (a, b);
+  return veorq_u64(vaddq_u64(c, c), vshrq_n_u64(c, 63));
+}
+
+/*
+** func_shl_orr:
+** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
+** ret 
+*/
+uint64x2_t
+func_shl_orr (uint64x2_t a, uint64x2_t b) {
+  uint64x2_t c = veorq_u64 (a, b);
+  return vorrq_u64(vshlq_n_u64(c, 1), vshrq_n_u64(c, 63));
+}
+
+/*
+** func_add_orr:
+** xar v0\.2d, v([0-9]+)\.2d, v([0-9]+)\.2d, 63
+** ret 
+*/
+uint64x2_t
+func_add_orr (uint64x2_t a, uint64x2_t b) {
+  uint64x2_t c = veorq_u64 (a, b);
+  return vorrq_u64(vaddq_u64(c, c), vshrq_n_u64(c, 63));
+}
+
+/*
+** func_shl_add:
+** xar v0\.2d, v([0-9]+)\.2d, v([

[gcc r15-4876] aarch64: Optimize vector rotates as vector permutes where possible

[Kyrylo Tkachov via Gcc-cvs]

https://gcc.gnu.org/g:19757e1c28de07b45da03117e6ff7ae3e21e5a7a

commit r15-4876-g19757e1c28de07b45da03117e6ff7ae3e21e5a7a
Author: Kyrylo Tkachov 
Date:   Wed Oct 16 04:10:08 2024 -0700

aarch64: Optimize vector rotates as vector permutes where possible

Some vector rotate operations can be implemented in a single instruction
rather than using the fallback SHL+USRA sequence.
In particular, when the rotate amount is half the bitwidth of the element
we can use a REV64,REV32,REV16 instruction.
More generally, rotates by a byte amount can be implented using vector
permutes.
This patch adds such a generic routine in expmed.cc called
expand_rotate_as_vec_perm that calculates the required permute indices
and uses the expand_vec_perm_const interface.

On aarch64 this ends up generating the single-instruction sequences above
where possible and can use LDR+TBL sequences too, which are a good choice.

With help from Richard, the routine should be VLA-safe.
However, the only use of expand_rotate_as_vec_perm introduced in this patch
is in aarch64-specific code that for now only handles fixed-width modes.

A runtime aarch64 test is added to ensure the permute indices are not messed
up.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov 

gcc/

* expmed.h (expand_rotate_as_vec_perm): Declare.
* expmed.cc (expand_rotate_as_vec_perm): Define.
* config/aarch64/aarch64-protos.h (aarch64_emit_opt_vec_rotate):
Declare prototype.
* config/aarch64/aarch64.cc (aarch64_emit_opt_vec_rotate): 
Implement.
* config/aarch64/aarch64-simd.md (*aarch64_simd_rotate_imm):
Call the above.

gcc/testsuite/

* gcc.target/aarch64/vec-rot-exec.c: New test.
* gcc.target/aarch64/simd/pr117048_2.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64-protos.h|   1 +
 gcc/config/aarch64/aarch64-simd.md |   3 +
 gcc/config/aarch64/aarch64.cc  |  16 
 gcc/expmed.cc  |  44 +
 gcc/expmed.h   |   1 +
 gcc/testsuite/gcc.target/aarch64/simd/pr117048_2.c |  66 ++
 gcc/testsuite/gcc.target/aarch64/vec-rot-exec.c| 101 +
 7 files changed, 232 insertions(+)

diff --git a/gcc/config/aarch64/aarch64-protos.h 
b/gcc/config/aarch64/aarch64-protos.h
index 05caad5e2fee..e8588e1cb177 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -851,6 +851,7 @@ bool aarch64_rnd_imm_p (rtx);
 bool aarch64_constant_address_p (rtx);
 bool aarch64_emit_approx_div (rtx, rtx, rtx);
 bool aarch64_emit_approx_sqrt (rtx, rtx, bool);
+bool aarch64_emit_opt_vec_rotate (rtx, rtx, rtx);
 tree aarch64_vector_load_decl (tree);
 rtx aarch64_gen_callee_cookie (aarch64_isa_mode, arm_pcs);
 void aarch64_expand_call (rtx, rtx, rtx, bool);
diff --git a/gcc/config/aarch64/aarch64-simd.md 
b/gcc/config/aarch64/aarch64-simd.md
index 08b121227eee..a91222b6e3b2 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -1313,6 +1313,9 @@
(match_dup 4))
  (match_dup 3)))]
   {
+if (aarch64_emit_opt_vec_rotate (operands[0], operands[1], operands[2]))
+  DONE;
+
 operands[3] = reload_completed ? operands[0] : gen_reg_rtx (mode);
 rtx shft_amnt = unwrap_const_vec_duplicate (operands[2]);
 int bitwidth = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT;
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 0fa7927d821a..7388f6b8fdf1 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -16018,6 +16018,22 @@ aarch64_emit_approx_div (rtx quo, rtx num, rtx den)
   return true;
 }
 
+/* Emit an optimized sequence to perform a vector rotate
+   of REG by the vector constant amount AMNT and place the result
+   in DST.  Return true iff successful.  */
+
+bool
+aarch64_emit_opt_vec_rotate (rtx dst, rtx reg, rtx amnt)
+{
+  machine_mode mode = GET_MODE (reg);
+  /* Attempt to expand the rotate as a vector permute.
+ For some rotate amounts they can be single instructions and
+ even the general single-vector TBL permute has good throughput.  */
+  if (expand_rotate_as_vec_perm (mode, dst, reg, amnt))
+return true;
+  return false;
+}
+
 /* Return the number of instructions that can be issued per cycle.  */
 static int
 aarch64_sched_issue_rate (void)
diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index aa9f1abc8aba..2d5e5243ce8e 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -6286,6 +6286,50 @@ emit_store_flag_force (rtx target, enum rtx_code code, 
rtx op0, rtx op1,
   return target;
 }
 
+/* Expand a vector (left) rotate of MODE of X by an immediate AMT as a vector
+   permute operation.  Emit code to put the result in DST

[gcc r15-4877] aarch64: Emit XAR for vector rotates where possible

[Kyrylo Tkachov via Gcc-cvs]

https://gcc.gnu.org/g:14cb23e743e02e6923f7e46a14717e9f561f6723

commit r15-4877-g14cb23e743e02e6923f7e46a14717e9f561f6723
Author: Kyrylo Tkachov 
Date:   Tue Oct 22 07:52:36 2024 -0700

aarch64: Emit XAR for vector rotates where possible

We can make use of the integrated rotate step of the XAR instruction
to implement most vector integer rotates, as long we zero out one
of the input registers for it.  This allows for a lower-latency sequence
than the fallback SHL+USRA, especially when we can hoist the zeroing 
operation
away from loops and hot parts.  This should be safe to do for 64-bit vectors
as well even though the XAR instructions operate on 128-bit values, as the
bottom 64-bit results is later accessed through the right subregs.

This strategy is used whenever we have XAR instructions, the logic
in aarch64_emit_opt_vec_rotate is adjusted to resort to
expand_rotate_as_vec_perm only when it's expected to generate a single REV*
instruction or when XAR instructions are not present.

With this patch we can gerate for the input:
v4si
G1 (v4si r)
{
return (r >> 23) | (r << 9);
}

v8qi
G2 (v8qi r)
{
  return (r << 3) | (r >> 5);
}
the assembly for +sve2:
G1:
moviv31.4s, 0
xar z0.s, z0.s, z31.s, #23
ret

G2:
moviv31.4s, 0
xar z0.b, z0.b, z31.b, #5
ret

instead of the current:
G1:
shl v31.4s, v0.4s, 9
usrav31.4s, v0.4s, 23
mov v0.16b, v31.16b
ret
G2:
shl v31.8b, v0.8b, 3
usrav31.8b, v0.8b, 5
mov v0.8b, v31.8b
ret

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov 

gcc/

* config/aarch64/aarch64.cc (aarch64_emit_opt_vec_rotate): Add
generation of XAR sequences when possible.

gcc/testsuite/

* gcc.target/aarch64/rotate_xar_1.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64.cc   | 34 +++--
 gcc/testsuite/gcc.target/aarch64/rotate_xar_1.c | 93 +
 2 files changed, 121 insertions(+), 6 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 7388f6b8fdf1..00f99d5004ca 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -16019,17 +16019,39 @@ aarch64_emit_approx_div (rtx quo, rtx num, rtx den)
 }
 
 /* Emit an optimized sequence to perform a vector rotate
-   of REG by the vector constant amount AMNT and place the result
+   of REG by the vector constant amount AMNT_VEC and place the result
in DST.  Return true iff successful.  */
 
 bool
-aarch64_emit_opt_vec_rotate (rtx dst, rtx reg, rtx amnt)
+aarch64_emit_opt_vec_rotate (rtx dst, rtx reg, rtx amnt_vec)
 {
+  rtx amnt = unwrap_const_vec_duplicate (amnt_vec);
+  gcc_assert (CONST_INT_P (amnt));
+  HOST_WIDE_INT rotamnt = UINTVAL (amnt);
   machine_mode mode = GET_MODE (reg);
-  /* Attempt to expand the rotate as a vector permute.
- For some rotate amounts they can be single instructions and
- even the general single-vector TBL permute has good throughput.  */
-  if (expand_rotate_as_vec_perm (mode, dst, reg, amnt))
+  /* Rotates by half the element width map down to REV* instructions and should
+ always be preferred when possible.  */
+  if (rotamnt == GET_MODE_UNIT_BITSIZE (mode) / 2
+  && expand_rotate_as_vec_perm (mode, dst, reg, amnt))
+return true;
+  /* 64 and 128-bit vector modes can use the XAR instruction
+ when available.  */
+  else if (can_create_pseudo_p ()
+  && ((TARGET_SHA3 && mode == V2DImode)
+  || (TARGET_SVE2
+  && (known_eq (GET_MODE_SIZE (mode), 8)
+  || known_eq (GET_MODE_SIZE (mode), 16)
+{
+  rtx zeroes = aarch64_gen_shareable_zero (mode);
+  rtx xar_op
+   = gen_rtx_ROTATE (mode, gen_rtx_XOR (mode, reg, zeroes),
+   amnt_vec);
+  emit_set_insn (dst, xar_op);
+  return true;
+}
+  /* If none of the above, try to expand rotates by any byte amount as
+ permutes.  */
+  else if (expand_rotate_as_vec_perm (mode, dst, reg, amnt))
 return true;
   return false;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/rotate_xar_1.c 
b/gcc/testsuite/gcc.target/aarch64/rotate_xar_1.c
new file mode 100644
index ..73007701cfb4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/rotate_xar_1.c
@@ -0,0 +1,93 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+typedef char __attribute__ ((vector_size (16))) v16qi;
+typedef unsigned short __attribute__ ((vector_size (16))) v8hi;
+typedef unsigned int __attribute__ ((vector_size (16))) v4si;
+typedef unsigned

[gcc r15-4878] simplify-rtx: Simplify ROTATE:HI (X:HI, 8) into BSWAP:HI (X)

[Kyrylo Tkachov via Gcc-cvs]

https://gcc.gnu.org/g:f1d16cd9236e0d59c04018e2dccc09dd736bf1df

commit r15-4878-gf1d16cd9236e0d59c04018e2dccc09dd736bf1df
Author: Kyrylo Tkachov 
Date:   Thu Oct 17 06:39:57 2024 -0700

simplify-rtx: Simplify ROTATE:HI (X:HI, 8) into BSWAP:HI (X)

With recent patch to improve detection of vector rotates at RTL level
combine now tries matching a V8HImode rotate by 8 in the example in the
testcase.  We can teach AArch64 to emit a REV16 instruction for such a 
rotate
but really this operation corresponds to the RTL code BSWAP, for which we
already have the right patterns.  BSWAP is arguably a simpler representation
than ROTATE here because it has only one operand, so let's teach 
simplify-rtx
to generate it.

With this patch the testcase now generates the simplest form:
.L2:
ldr q31, [x1, x0]
rev16   v31.16b, v31.16b
str q31, [x0, x2]
add x0, x0, 16
cmp x0, 2048
bne .L2

instead of the previous:
.L2:
ldr q31, [x1, x0]
shl v30.8h, v31.8h, 8
usrav30.8h, v31.8h, 8
str q30, [x0, x2]
add x0, x0, 16
cmp x0, 2048
bne .L2

IMO ideally the bswap detection would have been done during vectorisation
time and used the expanders for that, but teaching simplify-rtx to do this
transformation is fairly straightforward and, unlike at tree level, we have
the native RTL BSWAP code.  This change is not enough to generate the
equivalent sequence in SVE, but that is something that should be tackled
separately.

Bootstrapped and tested on aarch64-none-linux-gnu.

Signed-off-by: Kyrylo Tkachov 

gcc/

* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
Simplify (rotate:HI x:HI, 8) -> (bswap:HI x:HI).

gcc/testsuite/

* gcc.target/aarch64/rot_to_bswap.c: New test.

Diff:
---
 gcc/simplify-rtx.cc |  8 
 gcc/testsuite/gcc.target/aarch64/rot_to_bswap.c | 23 +++
 2 files changed, 31 insertions(+)

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 0ff72638d85f..751c908113ef 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -4328,6 +4328,14 @@ simplify_context::simplify_binary_operation_1 (rtx_code 
code,
  mode, op0, new_amount_rtx);
}
 #endif
+  /* ROTATE/ROTATERT:HI (X:HI, 8) is BSWAP:HI (X).  Other combinations
+such as SImode with a count of 16 do not correspond to RTL BSWAP
+semantics.  */
+  tem = unwrap_const_vec_duplicate (trueop1);
+  if (GET_MODE_UNIT_BITSIZE (mode) == (2 * BITS_PER_UNIT)
+ && CONST_INT_P (tem) && INTVAL (tem) == BITS_PER_UNIT)
+   return simplify_gen_unary (BSWAP, mode, op0, mode);
+
   /* FALLTHRU */
 case ASHIFTRT:
   if (trueop1 == CONST0_RTX (mode))
diff --git a/gcc/testsuite/gcc.target/aarch64/rot_to_bswap.c 
b/gcc/testsuite/gcc.target/aarch64/rot_to_bswap.c
new file mode 100644
index ..f5b002da8853
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/rot_to_bswap.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 --param aarch64-autovec-preference=asimd-only" } */
+
+#pragma GCC target "+nosve"
+
+
+#define N 1024
+
+unsigned short in_s[N];
+unsigned short out_s[N];
+
+void
+foo16 (void)
+{
+  for (unsigned i = 0; i < N; i++)
+  {
+unsigned short x = in_s[i];
+out_s[i] = (x >> 8) | (x << 8);
+  }
+}
+
+/* { dg-final { scan-assembler {\trev16\tv([123])?[0-9]\.16b, 
v([123])?[0-9]\.16b} } } */
+

[gcc r15-4945] Write LF_BCLASS records in CodeView struct definitions

[Mark Harmstone via Gcc-cvs]

https://gcc.gnu.org/g:7ac24078e06d95ecd234b5bfa07ff8dd47650791

commit r15-4945-g7ac24078e06d95ecd234b5bfa07ff8dd47650791
Author: Mark Harmstone 
Date:   Thu Aug 29 02:35:37 2024 +0100

Write LF_BCLASS records in CodeView struct definitions

When writing the CodeView type definition for a struct, translate
DW_TAG_inheritance DIEs into LF_BCLASS records, to record which other
structs this one inherits from.

gcc/
* dwarf2codeview.cc (enum cv_leaf_type): Add LF_BCLASS.
(struct codeview_subtype): Add lf_bclass to union.
(write_cv_padding): Add declaration.
(write_lf_fieldlist): Handle LF_BCLASS records.
(add_struct_inheritance): New function.
(get_type_num_struct): Call add_struct_inheritance.

Diff:
---
 gcc/dwarf2codeview.cc | 70 +++
 1 file changed, 70 insertions(+)

diff --git a/gcc/dwarf2codeview.cc b/gcc/dwarf2codeview.cc
index d593795b5886..722a54b9c4ec 100644
--- a/gcc/dwarf2codeview.cc
+++ b/gcc/dwarf2codeview.cc
@@ -100,6 +100,7 @@ enum cv_leaf_type {
   LF_FIELDLIST = 0x1203,
   LF_BITFIELD = 0x1205,
   LF_METHODLIST = 0x1206,
+  LF_BCLASS = 0x1400,
   LF_INDEX = 0x1404,
   LF_ENUMERATE = 0x1502,
   LF_ARRAY = 0x1503,
@@ -1242,6 +1243,12 @@ struct codeview_subtype
   uint32_t method_list;
   char *name;
 } lf_method;
+struct
+{
+  uint16_t attributes;
+  uint32_t base_class_type;
+  codeview_integer offset;
+} lf_bclass;
   };
 };
 
@@ -1422,6 +1429,7 @@ static uint32_t get_type_num_subroutine_type (dw_die_ref 
type, bool in_struct,
  uint32_t containing_class_type,
  uint32_t this_type,
  int32_t this_adjustment);
+static void write_cv_padding (size_t padding);
 
 /* Record new line number against the current function.  */
 
@@ -3846,6 +3854,36 @@ write_lf_fieldlist (codeview_custom_type *t)
  free (v->lf_method.name);
  break;
 
+   case LF_BCLASS:
+ /* This is lf_bclass in binutils and lfBClass in Microsoft's
+cvinfo.h:
+
+   struct lf_bclass
+   {
+ uint16_t kind;
+ uint16_t attributes;
+ uint32_t base_class_type;
+ uint16_t offset;
+   } ATTRIBUTE_PACKED;
+ */
+
+ fputs (integer_asm_op (2, false), asm_out_file);
+ fprint_whex (asm_out_file, LF_BCLASS);
+ putc ('\n', asm_out_file);
+
+ fputs (integer_asm_op (2, false), asm_out_file);
+ fprint_whex (asm_out_file, v->lf_bclass.attributes);
+ putc ('\n', asm_out_file);
+
+ fputs (integer_asm_op (4, false), asm_out_file);
+ fprint_whex (asm_out_file, v->lf_bclass.base_class_type);
+ putc ('\n', asm_out_file);
+
+ leaf_len = 8 + write_cv_integer (&v->lf_bclass.offset);
+
+ write_cv_padding (4 - (leaf_len % 4));
+ break;
+
default:
  break;
}
@@ -5462,6 +5500,34 @@ add_struct_function (dw_die_ref c, 
hash_table *method_htab,
 }
 }
 
+/* Create a field list subtype that records the base class that a struct
+   inherits from.  */
+
+static void
+add_struct_inheritance (dw_die_ref c, uint16_t accessibility,
+   codeview_subtype **el, size_t *el_len)
+{
+  /* FIXME: if DW_AT_virtuality is DW_VIRTUALITY_virtual this is a virtual
+   base class, and we should be issuing an LF_VBCLASS record
+   instead.  */
+  if (get_AT_unsigned (c, DW_AT_virtuality) == DW_VIRTUALITY_virtual)
+return;
+
+  *el = (codeview_subtype *) xmalloc (sizeof (**el));
+  (*el)->next = NULL;
+  (*el)->kind = LF_BCLASS;
+  (*el)->lf_bclass.attributes = accessibility;
+  (*el)->lf_bclass.base_class_type = get_type_num (get_AT_ref (c, DW_AT_type),
+  true, false);
+  (*el)->lf_bclass.offset.neg = false;
+  (*el)->lf_bclass.offset.num = get_AT_unsigned (c, 
DW_AT_data_member_location);
+
+  *el_len = 10 + cv_integer_len (&(*el)->lf_bclass.offset);
+
+  if (*el_len % 4)
+*el_len += 4 - (*el_len % 4);
+}
+
 /* Create a new LF_MFUNCTION type for a struct function, add it to the
types_htab hash table, and return its type number.  */
 
@@ -5679,6 +5745,10 @@ get_type_num_struct (dw_die_ref type, bool in_struct, 
bool *is_fwd_ref)
add_struct_function (c, method_htab, &el, &el_len);
  break;
 
+   case DW_TAG_inheritance:
+ add_struct_inheritance (c, accessibility, &el, &el_len);
+ break;
+
default:
  break;
}

[gcc r15-4947] Handle T_HRESULT types in CodeView records

[Mark Harmstone via Gcc-cvs]

https://gcc.gnu.org/g:6177b45fcdc4273c5e94e8032644ca5807e7e93b

commit r15-4947-g6177b45fcdc4273c5e94e8032644ca5807e7e93b
Author: Mark Harmstone 
Date:   Sat Nov 2 15:31:12 2024 +

Handle T_HRESULT types in CodeView records

Follow MSVC in having a special type value, T_HRESULT, for (signed)
longs that have been typedef'd with the name "HRESULT". This is so that
the debugger can display user-friendly constant names when debugging COM
code.

gcc/
* dwarf2codeview.cc (get_type_num_typedef): New function.
(get_type_num): Call get_type_num_typedef.
* dwarf2codeview.h (T_HRESULT): Define.

Diff:
---
 gcc/dwarf2codeview.cc | 27 ---
 gcc/dwarf2codeview.h  |  1 +
 2 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/gcc/dwarf2codeview.cc b/gcc/dwarf2codeview.cc
index 876057b5a8c2..5e8a4ab39e7d 100644
--- a/gcc/dwarf2codeview.cc
+++ b/gcc/dwarf2codeview.cc
@@ -6220,6 +6220,29 @@ get_type_num_ptr_to_member_type (dw_die_ref type, bool 
in_struct)
   return ct->num;
 }
 
+/* Return the type number that corresponds to a DW_TAG_typedef DIE: either the
+   type number of the base type, or follow MSVC in having a special value
+   for the HRESULT used by COM.  */
+
+static uint32_t
+get_type_num_typedef (dw_die_ref type, bool in_struct)
+{
+  uint32_t num;
+
+  num = get_type_num (get_AT_ref (type, DW_AT_type), in_struct, false);
+
+  if (num == T_LONG)
+{
+  const char *name = get_AT_string (type, DW_AT_name);
+
+  /* longs typedef'd as "HRESULT" get their own type */
+  if (name && !strcmp (name, "HRESULT"))
+   num = T_HRESULT;
+}
+
+  return num;
+}
+
 /* Process a DIE representing a type definition, add a CodeView type if
necessary, and return its number.  If it's something we can't handle, return
0.  We keep a hash table so that we're not adding the same type multiple
@@ -6254,9 +6277,7 @@ get_type_num (dw_die_ref type, bool in_struct, bool 
no_fwd_ref)
   break;
 
 case DW_TAG_typedef:
-  /* FIXME - signed longs typedef'd as "HRESULT" should get their
-own type (T_HRESULT) */
-  num = get_type_num (get_AT_ref (type, DW_AT_type), in_struct, false);
+  num = get_type_num_typedef (type, in_struct);
   break;
 
 case DW_TAG_pointer_type:
diff --git a/gcc/dwarf2codeview.h b/gcc/dwarf2codeview.h
index c895ef3e04c9..52ffc6cfb99b 100644
--- a/gcc/dwarf2codeview.h
+++ b/gcc/dwarf2codeview.h
@@ -26,6 +26,7 @@ along with GCC; see the file COPYING3.  If not see
 /* Constants for in-built types.  */
 
 #define T_VOID 0x0003
+#define T_HRESULT  0x0008
 #define T_CHAR 0x0010
 #define T_SHORT0x0011
 #define T_LONG 0x0012

[gcc r15-4946] Write LF_POINTER CodeView types for pointers to member functions or data

[Mark Harmstone via Gcc-cvs]

https://gcc.gnu.org/g:b0f4f556ea9f07d0b6fb6407ab25a193d27c806e

commit r15-4946-gb0f4f556ea9f07d0b6fb6407ab25a193d27c806e
Author: Mark Harmstone 
Date:   Fri Nov 1 00:38:44 2024 +

Write LF_POINTER CodeView types for pointers to member functions or data

Translate DW_TAG_ptr_to_member_type DIEs into special extended
LF_POINTER CodeView types.

gcc/
* dwarf2codeview.cc (struct codeview_custom_type): Add new fields to
lf_pointer struct in union.
(write_lf_pointer): Write containing_class and ptr_to_mem_type if
applicable.
(get_type_num_subroutine_type): Write correct containing_class_type 
if
this is a pointer to a member function.
(get_type_num_ptr_to_member_type): New function.
(get_type_num): Call get_type_num_ptr_to_member_type.
* dwarf2codeview.h (CV_PTR_MODE_MASK, CV_PTR_MODE_PMEM): Define.
(CV_PTR_MODE_PMFUNC, CV_PMTYPE_D_Single, CV_PMTYPE_F_Single): 
Likewise.

Diff:
---
 gcc/dwarf2codeview.cc | 103 ++
 gcc/dwarf2codeview.h  |   9 +
 2 files changed, 112 insertions(+)

diff --git a/gcc/dwarf2codeview.cc b/gcc/dwarf2codeview.cc
index 722a54b9c4ec..876057b5a8c2 100644
--- a/gcc/dwarf2codeview.cc
+++ b/gcc/dwarf2codeview.cc
@@ -1270,6 +1270,8 @@ struct codeview_custom_type
 {
   uint32_t base_type;
   uint32_t attributes;
+  uint32_t containing_class;
+  uint16_t ptr_to_mem_type;
 } lf_pointer;
 struct
 {
@@ -3393,6 +3395,10 @@ write_lf_pointer (codeview_custom_type *t)
   uint16_t kind;
   uint32_t base_type;
   uint32_t attributes;
+  (following only if CV_PTR_MODE_PMEM or CV_PTR_MODE_PMFUNC in attributes)
+  uint32_t containing_class;
+  uint16_t ptr_to_mem_type;
+  uint16_t padding;
 } ATTRIBUTE_PACKED;
   */
 
@@ -3414,6 +3420,20 @@ write_lf_pointer (codeview_custom_type *t)
   fprint_whex (asm_out_file, t->lf_pointer.attributes);
   putc ('\n', asm_out_file);
 
+  if ((t->lf_pointer.attributes & CV_PTR_MODE_MASK) == CV_PTR_MODE_PMEM
+  || (t->lf_pointer.attributes & CV_PTR_MODE_MASK) == CV_PTR_MODE_PMFUNC)
+{
+  fputs (integer_asm_op (4, false), asm_out_file);
+  fprint_whex (asm_out_file, t->lf_pointer.containing_class);
+  putc ('\n', asm_out_file);
+
+  fputs (integer_asm_op (2, false), asm_out_file);
+  fprint_whex (asm_out_file, t->lf_pointer.ptr_to_mem_type);
+  putc ('\n', asm_out_file);
+
+  write_cv_padding (2);
+}
+
   asm_fprintf (asm_out_file, "%LLcv_type%x_end:\n", t->num);
 }
 
@@ -5886,6 +5906,30 @@ get_type_num_subroutine_type (dw_die_ref type, bool 
in_struct,
   return_type = T_VOID;
 }
 
+  /* Handle pointer to member function.  */
+  if (containing_class_type == 0)
+{
+  dw_die_ref obj_ptr = get_AT_ref (type, DW_AT_object_pointer);
+
+  if (obj_ptr)
+   {
+ dw_die_ref obj_ptr_type = get_AT_ref (obj_ptr, DW_AT_type);
+
+ if (obj_ptr_type
+ && dw_get_die_tag (obj_ptr_type) == DW_TAG_pointer_type)
+   {
+ dw_die_ref cont_class = get_AT_ref (obj_ptr_type, DW_AT_type);
+
+ if (dw_get_die_tag (cont_class) == DW_TAG_const_type)
+   cont_class = get_AT_ref (cont_class, DW_AT_type);
+
+ containing_class_type = get_type_num (cont_class, in_struct,
+   false);
+ this_type = get_type_num (obj_ptr_type, in_struct, false);
+   }
+   }
+}
+
   /* Count the arguments.  */
 
   first_child = dw_get_die_child (type);
@@ -6121,6 +6165,61 @@ get_type_num_array_type (dw_die_ref type, bool in_struct)
   return element_type;
 }
 
+/* Translate a DW_TAG_ptr_to_member_type DIE, that is a pointer to member
+   function or field, into an LF_POINTER record.  */
+
+static uint32_t
+get_type_num_ptr_to_member_type (dw_die_ref type, bool in_struct)
+{
+  uint32_t base_type_num;
+  uint32_t containing_class;
+  dw_die_ref base_type;
+  codeview_custom_type *ct;
+
+  base_type = get_AT_ref (type, DW_AT_type);
+
+  base_type_num = get_type_num (base_type, in_struct, false);
+  if (base_type_num == 0)
+return 0;
+
+  containing_class = get_type_num (get_AT_ref (type, DW_AT_containing_type),
+  in_struct, false);
+
+  ct = (codeview_custom_type *) xmalloc (sizeof (codeview_custom_type));
+
+  ct->next = NULL;
+  ct->kind = LF_POINTER;
+  ct->lf_pointer.base_type = base_type_num;
+
+  if (TARGET_64BIT)
+{
+  ct->lf_pointer.attributes = CV_PTR_64;
+  ct->lf_pointer.attributes |= 8 << 13;
+}
+  else
+{
+  ct->lf_pointer.attributes = CV_PTR_NEAR32;
+  ct->lf_pointer.attributes |= 4 << 13;
+}
+
+  ct->lf_pointer.containing_class = containing_class;
+
+  if (base_type && dw_get_die_tag (base_type) == DW_TAG_subroutine_type)
+{
+  ct->lf_pointer.attributes |= CV_PTR_

[gcc r15-4943] c++/modules: Handle location exhaustion in write_location [PR105443]

[Nathaniel Shead via Gcc-cvs]

https://gcc.gnu.org/g:48ef485eabc8fd3e16d184860ce693816f3919eb

commit r15-4943-g48ef485eabc8fd3e16d184860ce693816f3919eb
Author: Nathaniel Shead 
Date:   Tue Nov 5 03:08:54 2024 +1100

c++/modules: Handle location exhaustion in write_location [PR105443]

The 'location_t' type currently only stores a limited number of distinct
locations.  In some cases, if many modules are imported that sum up to a
large number of locations, we may run out of room to represent new
locations for these imported declarations.  In such a case, any new
declarations from the affected modules simply get given a location of
"the module interface as a whole".

'write_location' sometimes gets confused when this happens: it finds that
the location is a location we've noted to get streamed out, but it's
inconsistent whether it's an ordinary location from the current module
or an imported location from a different module.  This causes
random-looking locations to be associated with these declarations, and
occasionally (checking-only) ICEs.

This patch fixes the issue by first checking whether an ordinary
location represents a module (rather than a location inside a module);
if so, we instead write the location of the point that we imported this
module.  This will continue recursively in case the importing location
also was not able to be stored.

We only need to handle this in the IS_ORDINARY_LOC case: even for
locations originally within macro expansions, the remapping logic for
location exhaustion will make them look like ordinary locs again.

This is a relatively expensive addition, so this new check only occurs
if we've noted resource exhaustion has occurred while preparing imported
line maps, or in checking builds.

PR c++/105443

gcc/cp/ChangeLog:

* module.cc (loc_spans::locs_exhausted_p): New field.
(loc_spans::loc_spans): Initialise it.
(loc_spans::locations_exhausted_p): New function.
(module_state::read_prepare_maps): Move inform into...
(loc_spans::report_location_exhaustion): ...this new function.
(module_state::write_location): Check for writing module
locations stored due to resource exhaustion.

Signed-off-by: Nathaniel Shead 

Diff:
---
 gcc/cp/module.cc | 42 ++
 1 file changed, 34 insertions(+), 8 deletions(-)

diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc
index dde7e5f6dbf2..e64e6a2103ae 100644
--- a/gcc/cp/module.cc
+++ b/gcc/cp/module.cc
@@ -3233,12 +3233,13 @@ public:
 
 private:
   vec *spans;
+  bool locs_exhausted_p;
 
 public:
   loc_spans ()
 /* Do not preallocate spans, as that causes
--enable-detailed-mem-stats problems.  */
-: spans (nullptr)
+: spans (nullptr), locs_exhausted_p (false)
   {
   }
   ~loc_spans ()
@@ -3293,6 +3294,22 @@ public:
   /* Propagate imported linemaps to us, if needed.  */
   bool maybe_propagate (module_state *import, location_t loc);
 
+public:
+  /* Whether we can no longer represent new imported locations.  */
+  bool locations_exhausted_p () const
+  {
+return locs_exhausted_p;
+  }
+  void report_location_exhaustion (location_t loc)
+  {
+if (!locs_exhausted_p)
+  {
+   /* Just give the notice once.  */
+   locs_exhausted_p = true;
+   inform (loc, "unable to represent further imported source locations");
+  }
+  }
+
 public:
   const span *ordinary (location_t);
   const span *macro (location_t);
@@ -16453,6 +16470,21 @@ module_state::write_location (bytes_out &sec, 
location_t loc)
 }
   else if (IS_ORDINARY_LOC (loc))
 {
+  /* If we ran out of locations for imported decls, this location could
+be a module unit's location.  In that case, remap the location
+to be where we imported the module from.  */
+  if (spans.locations_exhausted_p () || CHECKING_P)
+   {
+ const line_map_ordinary *map
+   = linemap_check_ordinary (linemap_lookup (line_table, loc));
+ if (MAP_MODULE_P (map) && loc == MAP_START_LOCATION (map))
+   {
+ gcc_checking_assert (spans.locations_exhausted_p ());
+ write_location (sec, linemap_included_from (map));
+ return;
+   }
+   }
+
   const ord_loc_info *info = nullptr;
   unsigned offset = 0;
   if (unsigned hwm = ord_loc_remap->length ())
@@ -16783,13 +16815,7 @@ module_state::read_prepare_maps (const 
module_state_config *cfg)
   ordinary_locs.first = ordinary_locs.second = 0;
   macro_locs.first = macro_locs.second = 0;
 
-  static bool informed = false;
-  if (!informed)
-{
-  /* Just give the notice once.  */
-  informed = true;
-  inform (loc, "unable to represent further imported source locations");
-}
+  spans.report_location_exhaustion (loc);
 
   return false;
 }

[gcc r15-4944] c++/modules: Merge default arguments [PR99274]

[Nathaniel Shead via Gcc-cvs]

https://gcc.gnu.org/g:a96c774f7bb99729ab9e7e2a57cd970469ccbc08

commit r15-4944-ga96c774f7bb99729ab9e7e2a57cd970469ccbc08
Author: Nathaniel Shead 
Date:   Mon Aug 12 10:57:39 2024 +1000

c++/modules: Merge default arguments [PR99274]

When merging a newly imported declaration with an existing declaration
we don't currently propagate new default arguments, which causes issues
when modularising header units.  This patch adds logic to propagate
default arguments to existing declarations on import, and error if the
defaults do not match.

PR c++/99274

gcc/cp/ChangeLog:

* module.cc (trees_in::is_matching_decl): Merge default
arguments.
* tree.cc (cp_tree_equal) : Handle unification
of AGGR_INIT_EXPRs with new VAR_DECL slots.

gcc/testsuite/ChangeLog:

* g++.dg/modules/lambda-7.h: Skip ODR-violating declaration when
testing ODR deduplication.
* g++.dg/modules/lambda-7_b.C: Note we're testing ODR
deduplication.
* g++.dg/modules/default-arg-1_a.H: New test.
* g++.dg/modules/default-arg-1_b.C: New test.
* g++.dg/modules/default-arg-2_a.H: New test.
* g++.dg/modules/default-arg-2_b.C: New test.
* g++.dg/modules/default-arg-3.h: New test.
* g++.dg/modules/default-arg-3_a.H: New test.
* g++.dg/modules/default-arg-3_b.C: New test.

Signed-off-by: Nathaniel Shead 
Reviewed-by: Patrick Palka 
Reviewed-by: Jason Merrill 

Diff:
---
 gcc/cp/module.cc   | 57 --
 gcc/cp/tree.cc | 33 +++
 gcc/testsuite/g++.dg/modules/default-arg-1_a.H | 17 
 gcc/testsuite/g++.dg/modules/default-arg-1_b.C | 26 
 gcc/testsuite/g++.dg/modules/default-arg-2_a.H | 17 
 gcc/testsuite/g++.dg/modules/default-arg-2_b.C | 28 +
 gcc/testsuite/g++.dg/modules/default-arg-3.h   | 13 ++
 gcc/testsuite/g++.dg/modules/default-arg-3_a.H |  5 +++
 gcc/testsuite/g++.dg/modules/default-arg-3_b.C |  6 +++
 gcc/testsuite/g++.dg/modules/lambda-7.h|  6 +++
 gcc/testsuite/g++.dg/modules/lambda-7_b.C  |  1 +
 11 files changed, 206 insertions(+), 3 deletions(-)

diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc
index e64e6a2103ae..4eefb2d35840 100644
--- a/gcc/cp/module.cc
+++ b/gcc/cp/module.cc
@@ -11585,8 +11585,6 @@ trees_in::is_matching_decl (tree existing, tree decl, 
bool is_typedef)
 
  if (!same_type_p (TREE_VALUE (d_args), TREE_VALUE (e_args)))
goto mismatch;
-
- // FIXME: Check default values
}
 
   /* If EXISTING has an undeduced or uninstantiated exception
@@ -11725,7 +11723,60 @@ trees_in::is_matching_decl (tree existing, tree decl, 
bool is_typedef)
   if (!DECL_EXTERNAL (d_inner))
 DECL_EXTERNAL (e_inner) = false;
 
-  // FIXME: Check default tmpl and fn parms here
+  if (TREE_CODE (decl) == TEMPLATE_DECL)
+{
+  /* Merge default template arguments.  */
+  tree d_parms = DECL_INNERMOST_TEMPLATE_PARMS (decl);
+  tree e_parms = DECL_INNERMOST_TEMPLATE_PARMS (existing);
+  gcc_checking_assert (TREE_VEC_LENGTH (d_parms)
+  == TREE_VEC_LENGTH (e_parms));
+  for (int i = 0; i < TREE_VEC_LENGTH (d_parms); ++i)
+   {
+ tree d_default = TREE_PURPOSE (TREE_VEC_ELT (d_parms, i));
+ tree& e_default = TREE_PURPOSE (TREE_VEC_ELT (e_parms, i));
+ if (e_default == NULL_TREE)
+   e_default = d_default;
+ else if (d_default != NULL_TREE
+  && !cp_tree_equal (d_default, e_default))
+   {
+ auto_diagnostic_group d;
+ tree d_parm = TREE_VALUE (TREE_VEC_ELT (d_parms, i));
+ tree e_parm = TREE_VALUE (TREE_VEC_ELT (e_parms, i));
+ error_at (DECL_SOURCE_LOCATION (d_parm),
+   "conflicting default argument for %#qD", d_parm);
+ inform (DECL_SOURCE_LOCATION (e_parm),
+ "existing default declared here");
+ return false;
+   }
+   }
+}
+
+  if (TREE_CODE (d_inner) == FUNCTION_DECL)
+{
+  /* Merge default function arguments.  */
+  tree d_parm = FUNCTION_FIRST_USER_PARMTYPE (d_inner);
+  tree e_parm = FUNCTION_FIRST_USER_PARMTYPE (e_inner);
+  int i = 0;
+  for (; d_parm && d_parm != void_list_node;
+  d_parm = TREE_CHAIN (d_parm), e_parm = TREE_CHAIN (e_parm), ++i)
+   {
+ tree d_default = TREE_PURPOSE (d_parm);
+ tree& e_default = TREE_PURPOSE (e_parm);
+ if (e_default == NULL_TREE)
+   e_default = d_default;
+ else if (d_default != NULL_TREE
+  && !cp_tree_equal (d_default, e_default))
+   {
+ auto_diagnostic_group d;
+ error_at (get_fndecl_argument_location (d_inner, i

[gcc r15-4935] diagnostics: update leading comment for class diagnostic_context

[David Malcolm via Gcc-cvs]

https://gcc.gnu.org/g:b8ac365db7fac9895cf4139400896cdc359c8664

commit r15-4935-gb8ac365db7fac9895cf4139400896cdc359c8664
Author: David Malcolm 
Date:   Mon Nov 4 14:48:23 2024 -0500

diagnostics: update leading comment for class diagnostic_context

No functional change intended.

gcc/ChangeLog:
* diagnostic.h (class diagnostic_context): Update leading comment.

Signed-off-by: David Malcolm 

Diff:
---
 gcc/diagnostic.h | 35 +--
 1 file changed, 33 insertions(+), 2 deletions(-)

diff --git a/gcc/diagnostic.h b/gcc/diagnostic.h
index 46478c9a52b7..a0056b41b2df 100644
--- a/gcc/diagnostic.h
+++ b/gcc/diagnostic.h
@@ -475,8 +475,39 @@ struct diagnostic_counters
   int m_count_for_kind[DK_LAST_DIAGNOSTIC_KIND];
 };
 
-/* This data structure bundles altogether any information relevant to
-   the context of a diagnostic message.  */
+/* This class encapsulates the state of the diagnostics subsystem
+   as a whole (either directly, or via owned objects of other classes, to
+   avoid global variables).
+
+   It has responsibility for:
+   - being a central place for clients to report diagnostics
+   - reporting those diagnostics to zero or more output sinks
+ (e.g. text vs SARIF)
+   - proving a "dump" member function for a debug dump of the state of
+ the diagnostics subsytem
+   - direct vs buffered diagnostics (see class diagnostic_buffer)
+   - tracking the original argv of the program (for SARIF output)
+   - crash-handling
+
+   It delegates responsibility to various other classes:
+   - the various output sinks (instances of diagnostic_output_format
+ subclasses)
+   - formatting of messages (class pretty_printer)
+   - an optional urlifier to inject URLs into formatted messages
+   - counting the number of diagnostics reported of each kind
+ (class diagnostic_counters)
+   - calling out to a diagnostic_option_manager to determine if
+ a particular warning is enabled or disabled
+   - tracking pragmas that enable/disable warnings in a range of
+ source code
+   - a cache for use when quoting the user's source code (class file_cache)
+   - a text_art::theme
+   - an edit_context for generating patches from fix-it hints
+   - diagnostic_client_data_hooks for metadata.
+
+   Try to avoid adding new responsibilities to this class itself, to avoid
+   the "blob" anti-pattern.  */
+
 class diagnostic_context
 {
 public:

[gcc r15-4934] diagnostics: cleanups to opts-diagnostic.cc

[David Malcolm via Gcc-cvs]

https://gcc.gnu.org/g:196b13f72f3549442c9e3ea3874ce930d193a1e9

commit r15-4934-g196b13f72f3549442c9e3ea3874ce930d193a1e9
Author: David Malcolm 
Date:   Mon Nov 4 14:48:23 2024 -0500

diagnostics: cleanups to opts-diagnostic.cc

No functional change intended.

gcc/ChangeLog:
* opts-diagnostic.cc: Apply renamings throughout for clarity: from
"name" and "format_name" to "scheme_name", from "m_format" to
"m_scheme_name", and from "handler" to "scheme_handler".
(output_factory::scheme_handler::get_handler): Pass name by const
reference.

Signed-off-by: David Malcolm 

Diff:
---
 gcc/opts-diagnostic.cc | 122 +
 1 file changed, 63 insertions(+), 59 deletions(-)

diff --git a/gcc/opts-diagnostic.cc b/gcc/opts-diagnostic.cc
index 97ff5777ef0a..54040ba8d431 100644
--- a/gcc/opts-diagnostic.cc
+++ b/gcc/opts-diagnostic.cc
@@ -69,13 +69,13 @@ public:
   void
   report_unknown_key (const char *unparsed_arg,
  const std::string &key,
- const std::string &format_name,
+ const std::string &scheme_name,
  auto_vec &known_keys) const;
 
   void
   report_missing_key (const char *unparsed_arg,
  const std::string &key,
- const std::string &format_name,
+ const std::string &scheme_name,
  const char *metavar) const;
 
   diagnostic_output_file
@@ -88,13 +88,13 @@ public:
   const char *m_option_name;
 };
 
-struct name_and_params
+struct scheme_name_and_params
 {
-  std::string m_format;
+  std::string m_scheme_name;
   std::vector> m_kvs;
 };
 
-static std::unique_ptr
+static std::unique_ptr
 parse (const context &ctxt, const char *unparsed_arg);
 
 /* Class for parsing the arguments of -fdiagnostics-add-output= and
@@ -104,18 +104,20 @@ parse (const context &ctxt, const char *unparsed_arg);
 class output_factory
 {
 public:
-  class handler
+  class scheme_handler
   {
   public:
-handler (std::string name) : m_name (std::move (name)) {}
-virtual ~handler () {}
+scheme_handler (std::string scheme_name)
+: m_scheme_name (std::move (scheme_name))
+{}
+virtual ~scheme_handler () {}
 
-const std::string &get_name () const { return m_name; }
+const std::string &get_scheme_name () const { return m_scheme_name; }
 
 virtual std::unique_ptr
 make_sink (const context &ctxt,
   const char *unparsed_arg,
-  const name_and_params &parsed_arg) const = 0;
+  const scheme_name_and_params &parsed_arg) const = 0;
 
   protected:
 bool
@@ -179,7 +181,7 @@ public:
 }
 
   private:
-const std::string m_name;
+const std::string m_scheme_name;
   };
 
   output_factory ();
@@ -187,34 +189,34 @@ public:
   std::unique_ptr
   make_sink (const context &ctxt,
 const char *unparsed_arg,
-const name_and_params &parsed_arg);
+const scheme_name_and_params &parsed_arg);
 
-  const handler *get_handler (std::string name);
+  const scheme_handler *get_scheme_handler (const std::string &scheme_name);
 
 private:
-  std::vector> m_handlers;
+  std::vector> m_scheme_handlers;
 };
 
-class text_handler : public output_factory::handler
+class text_scheme_handler : public output_factory::scheme_handler
 {
 public:
-  text_handler () : handler ("text") {}
+  text_scheme_handler () : scheme_handler ("text") {}
 
   std::unique_ptr
   make_sink (const context &ctxt,
 const char *unparsed_arg,
-const name_and_params &parsed_arg) const final override;
+const scheme_name_and_params &parsed_arg) const final override;
 };
 
-class sarif_handler : public output_factory::handler
+class sarif_scheme_handler : public output_factory::scheme_handler
 {
 public:
-  sarif_handler () : handler ("sarif") {}
+  sarif_scheme_handler () : scheme_handler ("sarif") {}
 
   std::unique_ptr
   make_sink (const context &ctxt,
 const char *unparsed_arg,
-const name_and_params &parsed_arg) const final override;
+const scheme_name_and_params &parsed_arg) const final override;
 };
 
 /* struct context.  */
@@ -234,7 +236,7 @@ context::report_error (const char *gmsgid, ...) const
 void
 context::report_unknown_key (const char *unparsed_arg,
 const std::string &key,
-const std::string &format_name,
+const std::string &scheme_name,
 auto_vec &known_keys) const
 {
   pp_markup::comma_separated_quoted_strings e (known_keys);
@@ -242,13 +244,13 @@ context::report_unknown_key (const char *unparsed_arg,
 ("%<%s%s%>:"
  " unknown key %qs for format %qs; known keys: %e",
  m_option_name, unparsed_arg,
- key.c_str (), format_name.c_str (), &e);
+ key.c_str (), scheme_name.c_str (), &e)

[gcc(refs/users/aoliva/heads/testme)] fold fold_truth_andor field merging into ifcombine

[Alexandre Oliva via Gcc-cvs]

https://gcc.gnu.org/g:948a9475337a3e0e6ed67a9622d5817a5a8a893b

commit 948a9475337a3e0e6ed67a9622d5817a5a8a893b
Author: Alexandre Oliva 
Date:   Sun Oct 20 21:02:05 2024 -0300

fold fold_truth_andor field merging into ifcombine

This patch introduces various improvements to the logic that merges
field compares, moving it into ifcombine.

Before the patch, we could merge:

  (a.x1 EQNE b.x1)  ANDOR  (a.y1 EQNE b.y1)

into something like:

  (((type *)&a)[Na] & MASK) EQNE (((type *)&b)[Nb] & MASK)

if both of A's fields live within the same alignment boundaries, and
so do B's, at the same relative positions.  Constants may be used
instead of the object B.

The initial goal of this patch was to enable such combinations when a
field crossed alignment boundaries, e.g. for packed types.  We can't
generally access such fields with a single memory access, so when we
come across such a compare, we will attempt to combine each access
separately.

Some merging opportunities were missed because of right-shifts,
compares expressed as e.g. ((a.x1 ^ b.x1) & MASK) EQNE 0, and
narrowing conversions, especially after earlier merges.  This patch
introduces handlers for several cases involving these.

The merging of multiple field accesses into wider bitfield-like
accesses is undesirable to do too early in compilation, so we move it
from folding to ifcombine, and extend ifcombine to merge noncontiguous
compares, absent intervening side effects.  VUSEs used to prevent
ifcombine; that seemed excessively conservative, since relevant side
effects were already tested, including the possibility of trapping
loads, so that's removed.

Unlike earlier ifcombine, when merging noncontiguous compares the
merged compare must replace the earliest compare, which may require
moving up the DEFs that contributed to the latter compare.

When it is the second of a noncontiguous pair of compares that first
accesses a word, we may merge the first compare with part of the
second compare that refers to the same word, keeping the compare of
the remaining bits at the spot where the second compare used to be.

Handling compares with non-constant fields was somewhat generalized
from what fold used to do, now handling non-adjacent fields, even if a
field of one object crosses an alignment boundary but the other
doesn't.


The -Wno-error for toplev.o on rs6000 is because of toplev.c's:

  if ((flag_sanitize & SANITIZE_ADDRESS)
  && !FRAME_GROWS_DOWNWARD)

and rs6000.h's:

#define FRAME_GROWS_DOWNWARD (flag_stack_protect != 0   \
  || (flag_sanitize & SANITIZE_ADDRESS) != 0)

The mutually exclusive conditions involving flag_sanitize are now
noticed and reported by ifcombine's warning on mutually exclusive
compares.  i386's needs -Wno-error for insn-attrtab.o for similar
reasons.


for  gcc/ChangeLog

* fold-const.cc (make_bit_field): Export.
(all_ones_mask_p): Drop.
(unextend, decode_field_reference, fold_truth_andor_1): Move
field compare merging logic...
* gimple-fold.cc: ... here.
(ssa_is_substitutable_p, is_cast_p, is_binop_p): New.
(prepare_xor, follow_load): New.
(compute_split_boundary_from_align): New.
(make_bit_field_load, build_split_load): New.
(reuse_split_load, mergeable_loads_p): New.
(fold_truth_andor_maybe_separate): New.
* tree-ssa-ifcombine.cc: Include bitmap.h.
(constant_condition_p): New.
(recognize_if_then_else_nc, recognize_if_succs): New.
(bb_no_side_effects_p): Don't reject VUSEs.
(update_profile_after_ifcombine): Adjust for noncontiguous
merges.
(ifcombine_mark_ssa_name): New.
(struct ifcombine_mark_ssa_name_t): New.
(ifcombine_mark_ssa_name_walk): New.
(ifcombine_replace_cond): Extended for noncontiguous merges
after factoring out of...
(ifcombine_ifandif): ... this.  Drop result_inv arg.  Try
fold_truth_andor_maybe_separate.
(tree_ssa_ifcombine_bb_1): Add outer_succ_bb arg.  Call
recognize_if_then_else_nc.  Adjust ifcombine_ifandif calls.
(tree_ssa_ifcombine_bb): Return the earliest affected block.
Call recognize_if_then_else_nc.  Try noncontiguous blocks.
(pass_tree_ifcombine::execute): Retry affected blocks.
* config/i386/t-i386 (insn-attrtab.o-warn): Disable errors.
* config/rs6000/t-rs6000 (toplev.o-warn): Likewise.

for  gcc/testsuite/ChangeLog

* gcc.dg/field-merge-1.c: New.
* gcc.dg/field-merge-2.c: New.
 

[gcc r15-4928] libgccjit: Add count zeroes builtins to ensure_optimization_builtins_exist

[Antoni Boucher via Gcc-cvs]

https://gcc.gnu.org/g:56acc9498ebce94f902dccd82eefdac36f08fc38

commit r15-4928-g56acc9498ebce94f902dccd82eefdac36f08fc38
Author: Antoni Boucher 
Date:   Thu Feb 8 21:48:27 2024 -0500

libgccjit: Add count zeroes builtins to ensure_optimization_builtins_exist

gcc/jit/ChangeLog:

* jit-builtins.cc (ensure_optimization_builtins_exist): Add
missing builtins.

Diff:
---
 gcc/jit/jit-builtins.cc | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/gcc/jit/jit-builtins.cc b/gcc/jit/jit-builtins.cc
index e0bb24738ddf..0c13c8db5860 100644
--- a/gcc/jit/jit-builtins.cc
+++ b/gcc/jit/jit-builtins.cc
@@ -612,6 +612,12 @@ builtins_manager::ensure_optimization_builtins_exist ()
   (void)get_builtin_function_by_id (BUILT_IN_POPCOUNT);
   (void)get_builtin_function_by_id (BUILT_IN_POPCOUNTL);
   (void)get_builtin_function_by_id (BUILT_IN_POPCOUNTLL);
+  (void)get_builtin_function_by_id (BUILT_IN_CLZ);
+  (void)get_builtin_function_by_id (BUILT_IN_CTZ);
+  (void)get_builtin_function_by_id (BUILT_IN_CLZL);
+  (void)get_builtin_function_by_id (BUILT_IN_CTZL);
+  (void)get_builtin_function_by_id (BUILT_IN_CLZLL);
+  (void)get_builtin_function_by_id (BUILT_IN_CTZLL);
 }
 
 /* Playback support.  */

[gcc r14-10883] testsuite: arm: Use effective-target for memset-inline* tests

[Torbjorn Svensson via Gcc-cvs]

https://gcc.gnu.org/g:66a3827379e8863d9025b7881543d2bffe771aee

commit r14-10883-g66a3827379e8863d9025b7881543d2bffe771aee
Author: Torbjörn SVENSSON 
Date:   Thu Oct 24 10:40:27 2024 +0200

testsuite: arm: Use effective-target for memset-inline* tests

As these tests are set to execute and require neon hardware to do so,
add the missing dg-require-effective-target arm_neon_hw.

gcc/testsuite/ChangeLog:

* gcc.target/arm/memset-inline-4.c: Use effective-target
arm_neon_hw.
* gcc.target/arm/memset-inline-5.c: Likewise.
* gcc.target/arm/memset-inline-6.c: Likewise.

Signed-off-by: Torbjörn SVENSSON 

Diff:
---
 gcc/testsuite/gcc.target/arm/memset-inline-4.c | 1 +
 gcc/testsuite/gcc.target/arm/memset-inline-5.c | 1 +
 gcc/testsuite/gcc.target/arm/memset-inline-6.c | 1 +
 3 files changed, 3 insertions(+)

diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-4.c 
b/gcc/testsuite/gcc.target/arm/memset-inline-4.c
index 5d7223ef2c00..fc5f4aeed85e 100644
--- a/gcc/testsuite/gcc.target/arm/memset-inline-4.c
+++ b/gcc/testsuite/gcc.target/arm/memset-inline-4.c
@@ -1,5 +1,6 @@
 /* { dg-do run } */
 /* { dg-skip-if "Don't inline memset using neon instructions" { ! 
arm_tune_string_ops_prefer_neon } } */
+/* { dg-require-effective-target arm_neon_hw } */
 /* { dg-options "-save-temps -O2 -fno-inline" } */
 /* { dg-add-options "arm_neon" } */
 
diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-5.c 
b/gcc/testsuite/gcc.target/arm/memset-inline-5.c
index 6e7ae65eef47..683290771cfa 100644
--- a/gcc/testsuite/gcc.target/arm/memset-inline-5.c
+++ b/gcc/testsuite/gcc.target/arm/memset-inline-5.c
@@ -1,5 +1,6 @@
 /* { dg-do run } */
 /* { dg-skip-if "Don't inline memset using neon instructions" { ! 
arm_tune_string_ops_prefer_neon } } */
+/* { dg-require-effective-target arm_neon_hw } */
 /* { dg-options "-save-temps -O2 -fno-inline" } */
 /* { dg-add-options "arm_neon" } */
 
diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-6.c 
b/gcc/testsuite/gcc.target/arm/memset-inline-6.c
index ae226346d489..66c242eebbe8 100644
--- a/gcc/testsuite/gcc.target/arm/memset-inline-6.c
+++ b/gcc/testsuite/gcc.target/arm/memset-inline-6.c
@@ -1,5 +1,6 @@
 /* { dg-do run } */
 /* { dg-skip-if "Don't inline memset using neon instructions" { ! 
arm_tune_string_ops_prefer_neon } } */
+/* { dg-require-effective-target arm_neon_hw } */
 /* { dg-options "-save-temps -O2 -fno-inline" } */
 /* { dg-add-options "arm_neon" } */

[gcc r15-4940] libstdc++: Remove workaround for modules issue [PR113814]

[Nathaniel Shead via Gcc-cvs]

https://gcc.gnu.org/g:35425d025b46a384fa89c4d06bd7c128d09e3009

commit r15-4940-g35425d025b46a384fa89c4d06bd7c128d09e3009
Author: Nathaniel Shead 
Date:   Tue Nov 5 09:37:23 2024 +1100

libstdc++: Remove workaround for modules issue [PR113814]

The modules bug requiring this workaround was fixed with commit
r15-4862-g815e48e3d42231.

PR testsuite/113710
PR c++/113814

libstdc++-v3/ChangeLog:

* include/bits/stl_pair.h: Remove workaround.

Signed-off-by: Nathaniel Shead 

Diff:
---
 libstdc++-v3/include/bits/stl_pair.h | 5 -
 1 file changed, 5 deletions(-)

diff --git a/libstdc++-v3/include/bits/stl_pair.h 
b/libstdc++-v3/include/bits/stl_pair.h
index 0d60eaba1941..e92fcad2d660 100644
--- a/libstdc++-v3/include/bits/stl_pair.h
+++ b/libstdc++-v3/include/bits/stl_pair.h
@@ -1183,11 +1183,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 struct tuple_element<1, pair<_Tp1, _Tp2>>
 { typedef _Tp2 type; };
 
-  // Forward declare the partial specialization for std::tuple
-  // to work around modules bug PR c++/113814.
-  template
-struct tuple_element<__i, tuple<_Types...>>;
-
 #if __cplusplus >= 201703L
   template
 inline constexpr size_t tuple_size_v> = 2;

[gcc r15-4948] i386: Utilize VCOMSBF16 for BF16 Comparisons with AVX10.2

[Hongyu Wang via Gcc-cvs]

https://gcc.gnu.org/g:61622cfa463f2ef4fc835ace2ecf5451b232cf4f

commit r15-4948-g61622cfa463f2ef4fc835ace2ecf5451b232cf4f
Author: Levy Hsu 
Date:   Wed Oct 9 16:38:57 2024 +0800

i386: Utilize VCOMSBF16 for BF16 Comparisons with AVX10.2

This patch enables the use of the VCOMSBF16 instruction from AVX10.2 for
efficient BF16 comparisons.

gcc/ChangeLog:

* config/i386/i386-expand.cc (ix86_expand_branch): Handle BFmode
when TARGET_AVX10_2_256 is enabled.
(ix86_prepare_fp_compare_args): Use 
SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P.
(ix86_expand_fp_movcc): Ditto.
(ix86_expand_fp_compare): Handle BFmode under IX86_FPCMP_COMI.
* config/i386/i386.cc (ix86_multiplication_cost): Use
SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P.
(ix86_division_cost): Ditto.
(ix86_rtx_costs): Ditto.
(ix86_vector_costs::add_stmt_cost): Ditto.
* config/i386/i386.h (SSE_FLOAT_MODE_SSEMATH_OR_HF_P): Rename to ...
(SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P): ...this, and add BFmode.
* config/i386/i386.md (*cmpibf): New define_insn.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx10_2-comibf-1.c: New test.
* gcc.target/i386/avx10_2-comibf-2.c: Ditto.

Diff:
---
 gcc/config/i386/i386-expand.cc   |  22 +++--
 gcc/config/i386/i386.cc  |  22 ++---
 gcc/config/i386/i386.h   |   7 +-
 gcc/config/i386/i386.md  |  33 +--
 gcc/testsuite/gcc.target/i386/avx10_2-comibf-1.c |  40 
 gcc/testsuite/gcc.target/i386/avx10_2-comibf-2.c | 118 +++
 6 files changed, 214 insertions(+), 28 deletions(-)

diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 515334aa5a3f..6eef27f3fcda 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -2531,6 +2531,10 @@ ix86_expand_branch (enum rtx_code code, rtx op0, rtx 
op1, rtx label)
   emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
   return;
 
+case E_BFmode:
+  gcc_assert (TARGET_AVX10_2_256 && !flag_trapping_math);
+  goto simple;
+
 case E_DImode:
   if (TARGET_64BIT)
goto simple;
@@ -2797,9 +2801,9 @@ ix86_prepare_fp_compare_args (enum rtx_code code, rtx 
*pop0, rtx *pop1)
   bool unordered_compare = ix86_unordered_fp_compare (code);
   rtx op0 = *pop0, op1 = *pop1;
   machine_mode op_mode = GET_MODE (op0);
-  bool is_sse = SSE_FLOAT_MODE_SSEMATH_OR_HF_P (op_mode);
+  bool is_sse = SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P (op_mode);
 
-  if (op_mode == BFmode)
+  if (op_mode == BFmode && (!TARGET_AVX10_2_256 || flag_trapping_math))
 {
   rtx op = gen_lowpart (HImode, op0);
   if (CONST_INT_P (op))
@@ -2918,10 +2922,14 @@ ix86_expand_fp_compare (enum rtx_code code, rtx op0, 
rtx op1)
 {
 case IX86_FPCMP_COMI:
   tmp = gen_rtx_COMPARE (CCFPmode, op0, op1);
-  if (TARGET_AVX10_2_256 && (code == EQ || code == NE))
-   tmp = gen_rtx_UNSPEC (CCFPmode, gen_rtvec (1, tmp), UNSPEC_OPTCOMX);
-  if (unordered_compare)
-   tmp = gen_rtx_UNSPEC (CCFPmode, gen_rtvec (1, tmp), UNSPEC_NOTRAP);
+  /* We only have vcomsbf16, No vcomubf16 nor vcomxbf16 */
+  if (GET_MODE (op0) != E_BFmode)
+   {
+ if (TARGET_AVX10_2_256 && (code == EQ || code == NE))
+   tmp = gen_rtx_UNSPEC (CCFPmode, gen_rtvec (1, tmp), UNSPEC_OPTCOMX);
+ if (unordered_compare)
+   tmp = gen_rtx_UNSPEC (CCFPmode, gen_rtvec (1, tmp), UNSPEC_NOTRAP);
+   }
   cmp_mode = CCFPmode;
   emit_insn (gen_rtx_SET (gen_rtx_REG (CCFPmode, FLAGS_REG), tmp));
   break;
@@ -4636,7 +4644,7 @@ ix86_expand_fp_movcc (rtx operands[])
   && !ix86_fp_comparison_operator (operands[1], VOIDmode))
 return false;
 
-  if (SSE_FLOAT_MODE_SSEMATH_OR_HF_P (mode))
+  if (SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P (mode))
 {
   machine_mode cmode;
 
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 473e4cbf10e3..6ac3a5d55f29 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -21324,7 +21324,7 @@ ix86_multiplication_cost (const struct processor_costs 
*cost,
   if (VECTOR_MODE_P (mode))
 inner_mode = GET_MODE_INNER (mode);
 
-  if (SSE_FLOAT_MODE_SSEMATH_OR_HF_P (mode))
+  if (SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P (mode))
 return inner_mode == DFmode ? cost->mulsd : cost->mulss;
   else if (X87_FLOAT_MODE_P (mode))
 return cost->fmul;
@@ -21449,7 +21449,7 @@ ix86_division_cost (const struct processor_costs *cost,
   if (VECTOR_MODE_P (mode))
 inner_mode = GET_MODE_INNER (mode);
 
-  if (SSE_FLOAT_MODE_SSEMATH_OR_HF_P (mode))
+  if (SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P (mode))
 return inner_mode == DFmode ? cost->divsd : cost->divss;
   else if (X87_FLOAT_MODE_P (mode))
 return cost->fdiv;
@@ -21991,7 +21991,7 @@ ix86_rtx_costs (rtx x, machine_mode mode,

[gcc(refs/users/jmelcr/heads/omp-cp)] omp-cp: Add jump function copying, omp constants now appear in lattices

[Josef Melcr via Gcc-cvs]

https://gcc.gnu.org/g:151e86109841b2aa7464f4132d2fda9d037190e2

commit 151e86109841b2aa7464f4132d2fda9d037190e2
Author: Josef Melcr 
Date:   Mon Nov 4 22:35:05 2024 +0100

omp-cp: Add jump function copying, omp constants now appear in lattices

gcc/ChangeLog:

* cgraph.cc (cgraph_edge::maybe_hot_p): Add temporary hardcode
  for callback edges
(cgraph_node::verify_node): Fix some failing cases when not
using lto
* ipa-prop.cc (ipa_compute_jump_functions_for_edge): Remove
  recursion, add jump function copying
(ipa_copy_ith_jump_func): New function
* ipa-prop.h (ipa_copy_ith_jump_func): New function declaration

Signed-off-by: Josef Melcr 

Diff:
---
 gcc/cgraph.cc   |   5 +-
 gcc/ipa-prop.cc | 158 ++--
 gcc/ipa-prop.h  |   4 ++
 3 files changed, 137 insertions(+), 30 deletions(-)

diff --git a/gcc/cgraph.cc b/gcc/cgraph.cc
index 96d95a87c769..78c56dd43ccd 100644
--- a/gcc/cgraph.cc
+++ b/gcc/cgraph.cc
@@ -3013,6 +3013,7 @@ cgraph_edge::cannot_lead_to_return_p (void)
 bool
 cgraph_edge::maybe_hot_p (void)
 {
+  if (callback) return true;
   if (!maybe_hot_count_p (NULL, count.ipa ()))
 return false;
   if (caller->frequency == NODE_FREQUENCY_UNLIKELY_EXECUTED
@@ -3886,7 +3887,7 @@ cgraph_node::verify_node (void)
}
  if (!e->indirect_unknown_callee)
{
- if (e->verify_corresponds_to_fndecl (decl))
+ if (!e->callback && 
e->verify_corresponds_to_fndecl (decl))
{
  error ("edge points to wrong declaration:");
  debug_tree (e->callee->decl);
@@ -3928,7 +3929,7 @@ cgraph_node::verify_node (void)
 
   for (e = callees; e; e = e->next_callee)
{
- if (!e->aux && !e->speculative && !e->callback)
+ if (!e->aux && !e->speculative && !e->callback && !e->has_callback)
{
  error ("edge %s->%s has no corresponding call_stmt",
 identifier_to_locale (e->caller->name ()),
diff --git a/gcc/ipa-prop.cc b/gcc/ipa-prop.cc
index 1d131f338004..bc5b7933a75c 100644
--- a/gcc/ipa-prop.cc
+++ b/gcc/ipa-prop.cc
@@ -2330,9 +2330,6 @@ ipa_compute_jump_functions_for_edge (struct 
ipa_func_body_info *fbi,
   ipa_edge_args *args = ipa_edge_args_sum->get_create (cs);
   gcall *call = cs->call_stmt;
   int n, arg_num = gimple_call_num_args (call);
-  if (cs->callback) {
-arg_num = args->callback_args->length();
-  }
   bool useful_context = false;
 
   if (arg_num == 0 || args->jump_functions)
@@ -2346,21 +2343,11 @@ ipa_compute_jump_functions_for_edge (struct 
ipa_func_body_info *fbi,
   if (ipa_func_spec_opts_forbid_analysis_p (cs->caller))
 return;
 
-  int n_ = 0;
-  bool recurse = false;
   cgraph_edge * callback_edge = NULL;
-  for (n = 0; n < arg_num && n_ < arg_num; n_++, n++)
+  for (n = 0; n < arg_num; n++)
 {
-  if (cs->callback)
-   {
- n_ = (*args->callback_args)[n].idx;
-   }
-  else
-   {
- n_ = n;
-   }
   struct ipa_jump_func *jfunc = ipa_get_ith_jump_func (args, n);
-  tree arg = gimple_call_arg (call, n_);
+  tree arg = gimple_call_arg (call, n);
   tree param_type = ipa_get_callee_param_type (cs, n);
   if (flag_devirtualize && POINTER_TYPE_P (TREE_TYPE (arg)))
{
@@ -2448,10 +2435,9 @@ ipa_compute_jump_functions_for_edge (struct 
ipa_func_body_info *fbi,
  && !cs->callback)
{
  cgraph_node *kernel_node = cgraph_node::get_create (pointee);
- gcc_checking_assert (!recurse && !callback_edge);
+ gcc_checking_assert (!callback_edge);
  callback_edge = cs->make_callback (kernel_node);
  calc_callback_args_idx (callback_edge);
- recurse = true;
}
}
}
@@ -2495,14 +2481,6 @@ ipa_compute_jump_functions_for_edge (struct 
ipa_func_body_info *fbi,
}
}
 
-  if (cs->callback && (*args->callback_args)[n].is_data_arg)
-   {
- ipa_set_jf_simple_pass_through (jfunc, 0, true);
-   }
-  if (cs->has_callback && n == 1)
-   {
- ipa_set_jf_simple_pass_through (jfunc, 1, true);
-   }
   /* If ARG is pointer, we cannot use its type to determine the type of 
aggregate
 passed (because type conversions are ignored in gimple).  Usually we 
can
 safely get type from function declaration, but in case of K&R 
prototypes or
@@ -2521,9 +2499,28 @@ ipa_compute_jump_functions_for_edge (struct 
ipa_func_body_info *fbi,
determine_known_aggregate_parts (fbi, call, arg, param_type, jfunc);
 }
 
-  if (recurse) {
-ipa_compute_jump_functions_for_edge (fbi, callb

[gcc r15-4939] guality tests: Silence gdb debuginfod warning

[H.J. Lu via Gcc-cvs]

https://gcc.gnu.org/g:c1d91adb572ca0c5f5e788b070e97c4fe744505a

commit r15-4939-gc1d91adb572ca0c5f5e788b070e97c4fe744505a
Author: H.J. Lu 
Date:   Sun Oct 27 05:51:18 2024 +0800

guality tests: Silence gdb debuginfod warning

When gdb defaults to use debuginfod, gdb warns guality tests:

Spawning: gdb -nx -nw -quiet -batch -x pr36728-2.gdb ./pr36728-2.exe
spawn gdb -nx -nw -quiet -batch -x pr36728-2.gdb ./pr36728-2.exe
Breakpoint 1 at 0x4004ba: file 
/export/gnu/import/git/gitlab/x86-gcc/gcc/testsuite/gcc.dg/guality/pr36728-2.c, 
line 18.

This GDB supports auto-downloading debuginfo from the following URLs:
  
Enable debuginfod for this session? (y or [n]) [answered N; input not from 
terminal]
Debuginfod has been disabled.
To make this setting permanent, add 'set debuginfod enabled off' to 
.gdbinit.

After 'set debuginfod enabled off' is added to ~/.gdbinit, gdb warning
doesn't go away since -nx option ignores ~/.gdbinit.  Silence gdb warning
by setting DEBUGINFOD_URLS to "" and restore if it exists.

PR testsuite/117300
* g++.dg/guality/guality.exp: Set DEBUGINFOD_URLS to "" and
restore it if it exists.
* gcc.dg/guality/guality.exp: Likewise.
* gfortran.dg/guality/guality.exp: Likewise.

Co-authored-by: Andrew Pinski 
Signed-off-by: H.J. Lu 

Diff:
---
 gcc/testsuite/g++.dg/guality/guality.exp  | 10 ++
 gcc/testsuite/gcc.dg/guality/guality.exp  | 10 ++
 gcc/testsuite/gfortran.dg/guality/guality.exp | 10 ++
 3 files changed, 30 insertions(+)

diff --git a/gcc/testsuite/g++.dg/guality/guality.exp 
b/gcc/testsuite/g++.dg/guality/guality.exp
index cd56b06f2f0b..6de5e8091a50 100644
--- a/gcc/testsuite/g++.dg/guality/guality.exp
+++ b/gcc/testsuite/g++.dg/guality/guality.exp
@@ -51,6 +51,12 @@ if ![info exists ::env(GUALITY_GDB_NAME)] {
 }
 setenv GUALITY_GDB_NAME "$guality_gdb_name"
 }
+
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  set orig_debuginfod_urls "$::env(DEBUGINFOD_URLS)"
+  setenv DEBUGINFOD_URLS ""
+}
+
 report_gdb $::env(GUALITY_GDB_NAME) [info script]
 
 global DG_TORTURE_OPTIONS LTO_TORTURE_OPTIONS
@@ -91,5 +97,9 @@ if [info exists guality_gdb_name] {
 unsetenv GUALITY_GDB_NAME
 }
 
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  setenv DEBUGINFOD_URLS "$orig_debuginfod_urls"
+}
+
 torture-finish
 dg-finish
diff --git a/gcc/testsuite/gcc.dg/guality/guality.exp 
b/gcc/testsuite/gcc.dg/guality/guality.exp
index a8f2921d8881..0dc8f10762d7 100644
--- a/gcc/testsuite/gcc.dg/guality/guality.exp
+++ b/gcc/testsuite/gcc.dg/guality/guality.exp
@@ -51,6 +51,12 @@ if ![info exists ::env(GUALITY_GDB_NAME)] {
 }
 setenv GUALITY_GDB_NAME "$guality_gdb_name"
 }
+
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  set orig_debuginfod_urls "$::env(DEBUGINFOD_URLS)"
+  setenv DEBUGINFOD_URLS ""
+}
+
 report_gdb $::env(GUALITY_GDB_NAME) [info script]
 
 proc guality_transform_options { args } {
@@ -106,5 +112,9 @@ if [info exists guality_gdb_name] {
 unsetenv GUALITY_GDB_NAME
 }
 
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  setenv DEBUGINFOD_URLS "$orig_debuginfod_urls"
+}
+
 torture-finish
 dg-finish
diff --git a/gcc/testsuite/gfortran.dg/guality/guality.exp 
b/gcc/testsuite/gfortran.dg/guality/guality.exp
index 610449523f06..105e08a70d88 100644
--- a/gcc/testsuite/gfortran.dg/guality/guality.exp
+++ b/gcc/testsuite/gfortran.dg/guality/guality.exp
@@ -32,6 +32,12 @@ if ![info exists ::env(GUALITY_GDB_NAME)] {
 }
 setenv GUALITY_GDB_NAME "$guality_gdb_name"
 }
+
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  set orig_debuginfod_urls "$::env(DEBUGINFOD_URLS)"
+  setenv DEBUGINFOD_URLS ""
+}
+
 report_gdb $::env(GUALITY_GDB_NAME) [info script]
 
 global DG_TORTURE_OPTIONS
@@ -45,5 +51,9 @@ if [info exists guality_gdb_name] {
 unsetenv GUALITY_GDB_NAME
 }
 
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  setenv DEBUGINFOD_URLS "$orig_debuginfod_urls"
+}
+
 torture-finish
 dg-finish

[gcc r15-4929] testsuite: arm: Update expected asm in armv8_2-fp16-neon-2.c

[Torbjorn Svensson via Gcc-cvs]

https://gcc.gnu.org/g:e3f2db9ef424ef3fb819f1ad91db79893c31ba6d

commit r15-4929-ge3f2db9ef424ef3fb819f1ad91db79893c31ba6d
Author: Torbjörn SVENSSON 
Date:   Thu Oct 24 20:06:21 2024 +0200

testsuite: arm: Update expected asm in armv8_2-fp16-neon-2.c

With the changes in r15-1579-g792f97b44ff, the test_vmul_n_16x8 function
does not contain any vdup.16 q* r* instruction with -mfloat-abi=softfp.

The differnce between r15-1578-g5185274c76c and r15-1579-g792f97b44ff
with -mfloat-abi=softfp for the function is:
.global test_vmul_n_16x8
.syntax unified
.arm
.type   test_vmul_n_16x8, %function
 test_vmul_n_16x8:
@ args = 4, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
vmovd16, r0, r1  @ v8hf
vmovd17, r2, r3
-   ldrhr3, [sp]@ __fp16
-   vdup.16 q9, r3
+   vld1.16 {d18[], d19[]}, [sp]
vmul.f16q8, q9, q8
vmovr0, r1, d16  @ v8hf
vmovr2, r3, d17
bx  lr
.size   test_vmul_n_16x8, .-test_vmul_n_16x8

gcc/testsuite/ChangeLog:

* gcc.target/arm/armv8_2-fp16-neon-2.c: Expect 3 vdup.16 q* r*
when in arm_hf_eabi else 2.

Signed-off-by: Torbjörn SVENSSON 

Diff:
---
 gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c 
b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c
index 6808576ce597..d65f68774616 100644
--- a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c
@@ -400,7 +400,8 @@ test_vdupq_n_f16 (float16_t a)
 {
   return vdupq_n_f16 (a);
 }
-/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 3 } }  */
+/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 3 { target 
arm_hf_eabi } } }  */
+/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 2 { target { 
! arm_hf_eabi } } } }  */
 
 float16x4_t
 test_vdup_lane_f16 (float16x4_t a)

[gcc r15-4930] testsuite: arm: Relax cbranch tests to accept inverted branches

[Torbjorn Svensson via Gcc-cvs]

https://gcc.gnu.org/g:d56d2f3102ada3d68eaa318de4b6d1a17d9cd74d

commit r15-4930-gd56d2f3102ada3d68eaa318de4b6d1a17d9cd74d
Author: Torbjörn SVENSSON 
Date:   Sat Oct 19 17:54:59 2024 +0200

testsuite: arm: Relax cbranch tests to accept inverted branches

Similar to PR113502, but for non-aarch64 test.
The test started to fail after r14-7243-gafac1bd3365.

gcc/testsuite/ChangeLog:

* gcc.target/arm/vect-early-break-cbranch.c: Ignore exact
branch.

Signed-off-by: Torbjörn SVENSSON 

Diff:
---
 gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c 
b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
index d5c6d56ec869..334e064a2393 100644
--- a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
+++ b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
@@ -20,7 +20,7 @@ int b[N] = {0};
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -45,7 +45,7 @@ void f1 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -70,7 +70,7 @@ void f2 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -96,7 +96,7 @@ void f3 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -121,7 +121,7 @@ void f4 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -146,7 +146,7 @@ void f5 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */

[gcc r15-4931] testsuite: arm: Use effective-target for data-intrinsics-assembly test

[Torbjorn Svensson via Gcc-cvs]

https://gcc.gnu.org/g:7b2e6e6be6fdb3cbb2e21e190a981731b322bf4f

commit r15-4931-g7b2e6e6be6fdb3cbb2e21e190a981731b322bf4f
Author: Torbjörn SVENSSON 
Date:   Sat Oct 19 19:55:51 2024 +0200

testsuite: arm: Use effective-target for data-intrinsics-assembly test

The expected assembler in the test case assumes -marm, so explicily
require it.

gcc/testsuite/ChangeLog:

* gcc.target/arm/acle/data-intrinsics-assembly.c: Use
effective-target arm_arch_v6_arm.

Signed-off-by: Torbjörn SVENSSON 

Diff:
---
 gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c 
b/gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c
index 478cbde1600e..f0f583734e8d 100644
--- a/gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c
+++ b/gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c
@@ -1,9 +1,9 @@
 /* Test the ACLE data intrinsics get expanded to the correct instructions on a 
specific architecture  */
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_softfp_ok } */
-/* { dg-require-effective-target arm_arch_v6_ok } */
+/* { dg-require-effective-target arm_arch_v6_arm_ok } */
 /* { dg-additional-options "--save-temps -O1" } */
-/* { dg-add-options arm_arch_v6 } */
+/* { dg-add-options arm_arch_v6_arm } */
 /* { dg-final { check-function-bodies "**" "" "" } } */
 
 #include "arm_acle.h"

[gcc r15-4941] simulate-thread tests: Silence gdb debuginfod warning

[H.J. Lu via Gcc-cvs]

https://gcc.gnu.org/g:8ae4a838bc0f5796369d982330acacf7a8fa7eab

commit r15-4941-g8ae4a838bc0f5796369d982330acacf7a8fa7eab
Author: H.J. Lu 
Date:   Tue Nov 5 06:22:00 2024 +0800

simulate-thread tests: Silence gdb debuginfod warning

When gdb defaults to use debuginfod, gdb warns simulate-thread tests:

spawn gdb -nx -nw -batch -x 
/export/gnu/import/git/gitlab/x86-gcc/gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.gdb
 ./atomic-load-int.exe
Breakpoint 1 at 0x4005cc: file 
/export/gnu/import/git/gitlab/x86-gcc/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-int.c,
 line 97.

This GDB supports auto-downloading debuginfo from the following URLs:
  
Enable debuginfod for this session? (y or [n]) [answered N; input not from 
terminal]
Debuginfod has been disabled.
To make this setting permanent, add 'set debuginfod enabled off' to 
.gdbinit.

Silence gdb warning by setting DEBUGINFOD_URLS to "" and restore it if
it exists.

PR testsuite/117300
* g++.dg/simulate-thread/simulate-thread.exp: Set DEBUGINFOD_URLS
to "" and restore it if it exists.
* gcc.dg/simulate-thread/simulate-thread.exp: Likewise.

Signed-off-by: H.J. Lu 

Diff:
---
 gcc/testsuite/g++.dg/simulate-thread/simulate-thread.exp | 9 +
 gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.exp | 9 +
 2 files changed, 18 insertions(+)

diff --git a/gcc/testsuite/g++.dg/simulate-thread/simulate-thread.exp 
b/gcc/testsuite/g++.dg/simulate-thread/simulate-thread.exp
index 35a111cfd137..ad428c148ec0 100644
--- a/gcc/testsuite/g++.dg/simulate-thread/simulate-thread.exp
+++ b/gcc/testsuite/g++.dg/simulate-thread/simulate-thread.exp
@@ -30,10 +30,19 @@ set-torture-options [list \
{ -O3 -g -std=c++11 } \
{ -Os -g } ]
 
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  set orig_debuginfod_urls "$::env(DEBUGINFOD_URLS)"
+  setenv DEBUGINFOD_URLS ""
+}
+
 if [gdb-exists] {
   gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.C]] "" ""
   gcc-dg-runtest [lsort [glob $srcdir/c-c++-common/simulate-thread/*.c]] "" ""
 }
 
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  setenv DEBUGINFOD_URLS "$orig_debuginfod_urls"
+}
+
 torture-finish
 dg-finish
diff --git a/gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.exp 
b/gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.exp
index 8983cc766052..7a8178f5f67c 100644
--- a/gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.exp
+++ b/gcc/testsuite/gcc.dg/simulate-thread/simulate-thread.exp
@@ -32,10 +32,19 @@ set-torture-options [list \
{ -O2 -g } \
{ -O3 -g } ]
 
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  set orig_debuginfod_urls "$::env(DEBUGINFOD_URLS)"
+  setenv DEBUGINFOD_URLS ""
+}
+
 if [gdb-exists] {
   gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.c]] "" ""
   gcc-dg-runtest [lsort [glob $srcdir/c-c++-common/simulate-thread/*.c]] "" ""
 }
 
+if [info exists ::env(DEBUGINFOD_URLS)] {
+  setenv DEBUGINFOD_URLS "$orig_debuginfod_urls"
+}
+
 torture-finish
 dg-finish

[gcc r14-10884] Don't call invert on VARYING.

[Andrew Macleod via Gcc-cvs]

https://gcc.gnu.org/g:e1154e294b3d8f7267612afb2113b2572cb39e33

commit r14-10884-ge1154e294b3d8f7267612afb2113b2572cb39e33
Author: Andrew MacLeod 
Date:   Sat Nov 2 10:26:24 2024 -0400

Don't call invert on VARYING.

When all cases go to one label and resul in a VARYING value, we can't
invert that value to remove all values from the default case. Simply
check for this case and set the default to UNDEFINED.

PR tree-optimization/117398
gcc/
* gimple-range-edge.cc (gimple_outgoing_range::calc_switch_ranges):
Check for VARYING and don't call invert () on it.

gcc/testsuite/
* gcc.dg/pr117398.c: New.

Diff:
---
 gcc/gimple-range-edge.cc| 10 --
 gcc/testsuite/gcc.dg/pr117398.c | 17 +
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/gcc/gimple-range-edge.cc b/gcc/gimple-range-edge.cc
index 3811a0995aa5..ad51c270d4b6 100644
--- a/gcc/gimple-range-edge.cc
+++ b/gcc/gimple-range-edge.cc
@@ -147,8 +147,14 @@ gimple_outgoing_range::calc_switch_ranges (gswitch *sw)
   // Remove the case range from the default case.
   int_range_max def_range (type, low, high);
   range_cast (def_range, type);
-  def_range.invert ();
-  default_range.intersect (def_range);
+  // If all possible values are taken, set default_range to UNDEFINED.
+  if (def_range.varying_p ())
+   default_range.set_undefined ();
+  else
+   {
+ def_range.invert ();
+ default_range.intersect (def_range);
+   }
 
   // Create/union this case with anything on else on the edge.
   int_range_max case_range (type, low, high);
diff --git a/gcc/testsuite/gcc.dg/pr117398.c b/gcc/testsuite/gcc.dg/pr117398.c
new file mode 100644
index ..c43f2a3ed6b3
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr117398.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int a;
+void c(void);
+int d(_Bool b) {
+  switch (b+0) {
+  case 0:
+break;
+  case 1:
+break;
+  default:
+c();
+  }
+  if (b)
+return a;
+}

[gcc r13-9169] Don't call invert on VARYING.

[Andrew Macleod via Gcc-cvs]

https://gcc.gnu.org/g:84b713589646c63b38ec55352fb87c1e80b69b66

commit r13-9169-g84b713589646c63b38ec55352fb87c1e80b69b66
Author: Andrew MacLeod 
Date:   Mon Nov 4 10:02:35 2024 -0500

Don't call invert on VARYING.

When all cases go to one label and resul in a VARYING value, we can't
invert that value to remove all values from the default case. Simply
check for this case and set the default to UNDEFINED.

PR tree-optimization/117398
gcc/
* gimple-range-edge.cc (gimple_outgoing_range::calc_switch_ranges):
Check for VARYING and don't call invert () on it.

gcc/testsuite/
* gcc.dg/pr117398.c: New.

Diff:
---
 gcc/gimple-range-edge.cc| 10 --
 gcc/testsuite/gcc.dg/pr117398.c | 17 +
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/gcc/gimple-range-edge.cc b/gcc/gimple-range-edge.cc
index 8fedac58fe6b..c874c9f3574f 100644
--- a/gcc/gimple-range-edge.cc
+++ b/gcc/gimple-range-edge.cc
@@ -144,8 +144,14 @@ gimple_outgoing_range::calc_switch_ranges (gswitch *sw)
   // Remove the case range from the default case.
   int_range_max def_range (low, high);
   range_cast (def_range, type);
-  def_range.invert ();
-  default_range.intersect (def_range);
+  // If all possible values are taken, set default_range to UNDEFINED.
+  if (def_range.varying_p ())
+   default_range.set_undefined ();
+  else
+   {
+ def_range.invert ();
+ default_range.intersect (def_range);
+   }
 
   // Create/union this case with anything on else on the edge.
   int_range_max case_range (low, high);
diff --git a/gcc/testsuite/gcc.dg/pr117398.c b/gcc/testsuite/gcc.dg/pr117398.c
new file mode 100644
index ..c43f2a3ed6b3
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr117398.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int a;
+void c(void);
+int d(_Bool b) {
+  switch (b+0) {
+  case 0:
+break;
+  case 1:
+break;
+  default:
+c();
+  }
+  if (b)
+return a;
+}

[gcc r12-10802] Don't call invert on VARYING.

[Andrew Macleod via Gcc-cvs]

https://gcc.gnu.org/g:78d3156d53567cb2794c3df21dc0d914abe43543

commit r12-10802-g78d3156d53567cb2794c3df21dc0d914abe43543
Author: Andrew MacLeod 
Date:   Mon Nov 4 10:02:35 2024 -0500

Don't call invert on VARYING.

When all cases go to one label and resul in a VARYING value, we can't
invert that value to remove all values from the default case. Simply
check for this case and set the default to UNDEFINED.

PR tree-optimization/117398
gcc/
* gimple-range-edge.cc (gimple_outgoing_range::calc_switch_ranges):
Check for VARYING and don't call invert () on it.

gcc/testsuite/
* gcc.dg/pr117398.c: New.

Diff:
---
 gcc/gimple-range-edge.cc| 10 --
 gcc/testsuite/gcc.dg/pr117398.c | 17 +
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/gcc/gimple-range-edge.cc b/gcc/gimple-range-edge.cc
index 6caa07c8f02e..a0cc1383a88a 100644
--- a/gcc/gimple-range-edge.cc
+++ b/gcc/gimple-range-edge.cc
@@ -145,8 +145,14 @@ gimple_outgoing_range::calc_switch_ranges (gswitch *sw)
   // Remove the case range from the default case.
   int_range_max def_range (low, high);
   range_cast (def_range, type);
-  def_range.invert ();
-  default_range.intersect (def_range);
+  // If all possible values are taken, set default_range to UNDEFINED.
+  if (def_range.varying_p ())
+   default_range.set_undefined ();
+  else
+   {
+ def_range.invert ();
+ default_range.intersect (def_range);
+   }
 
   // Create/union this case with anything on else on the edge.
   int_range_max case_range (low, high);
diff --git a/gcc/testsuite/gcc.dg/pr117398.c b/gcc/testsuite/gcc.dg/pr117398.c
new file mode 100644
index ..c43f2a3ed6b3
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr117398.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int a;
+void c(void);
+int d(_Bool b) {
+  switch (b+0) {
+  case 0:
+break;
+  case 1:
+break;
+  default:
+c();
+  }
+  if (b)
+return a;
+}

[gcc r15-4933] libgccjit: Add gcc_jit_global_set_readonly

[Antoni Boucher via Gcc-cvs]

https://gcc.gnu.org/g:7bb75a5edc1b3c90500e2a78124feac7beefacad

commit r15-4933-g7bb75a5edc1b3c90500e2a78124feac7beefacad
Author: Antoni Boucher 
Date:   Tue May 24 17:45:01 2022 -0400

libgccjit: Add gcc_jit_global_set_readonly

gcc/jit/ChangeLog:

* docs/topics/compatibility.rst (LIBGCCJIT_ABI_29): New ABI tag.
* docs/topics/expressions.rst: Document gcc_jit_global_set_readonly.
* jit-playback.cc (global_new_decl, new_global,
new_global_initialized): New parameter readonly.
* jit-playback.h (global_new_decl, new_global,
new_global_initialized): New parameter readonly.
* jit-recording.cc (recording::global::replay_into): Use
m_readonly.
(recording::global::write_reproducer): Dump reproducer for
gcc_jit_global_set_readonly.
* jit-recording.h (get_readonly, set_readonly): New methods.
(m_readonly): New attribute.
* libgccjit.cc (gcc_jit_global_set_readonly): New function.
(gcc_jit_block_add_assignment): Check that we don't assign to a
readonly variable.
* libgccjit.h (gcc_jit_global_set_readonly): New function.
(LIBGCCJIT_HAVE_gcc_jit_global_set_readonly): New define.
* libgccjit.map: New function.

gcc/testsuite/ChangeLog:

* jit.dg/all-non-failing-tests.h: Mention test-readonly.c.
* jit.dg/test-error-assign-readonly.c: New test.
* jit.dg/test-readonly.c: New test.

Diff:
---
 gcc/jit/docs/topics/compatibility.rst |  7 +++
 gcc/jit/docs/topics/expressions.rst   | 12 +
 gcc/jit/jit-playback.cc   | 15 +++---
 gcc/jit/jit-playback.h|  9 ++--
 gcc/jit/jit-recording.cc  |  9 +++-
 gcc/jit/jit-recording.h   | 11 
 gcc/jit/libgccjit.cc  | 22 
 gcc/jit/libgccjit.h   |  5 ++
 gcc/jit/libgccjit.map |  5 ++
 gcc/testsuite/jit.dg/all-non-failing-tests.h  |  3 ++
 gcc/testsuite/jit.dg/test-error-assign-readonly.c | 62 +++
 gcc/testsuite/jit.dg/test-readonly.c  | 38 ++
 12 files changed, 187 insertions(+), 11 deletions(-)

diff --git a/gcc/jit/docs/topics/compatibility.rst 
b/gcc/jit/docs/topics/compatibility.rst
index 92c3ed24c892..96adc03fed4d 100644
--- a/gcc/jit/docs/topics/compatibility.rst
+++ b/gcc/jit/docs/topics/compatibility.rst
@@ -404,3 +404,10 @@ on functions and variables:
 
 ``LIBGCCJIT_ABI_28`` covers the addition of
 :func:`gcc_jit_context_new_alignof`
+
+.. _LIBGCCJIT_ABI_29:
+
+``LIBGCCJIT_ABI_29``
+
+``LIBGCCJIT_ABI_29`` covers the addition of
+:func:`gcc_jit_global_set_readonly`
diff --git a/gcc/jit/docs/topics/expressions.rst 
b/gcc/jit/docs/topics/expressions.rst
index 5734f0e5f7e5..2aabbb82a6bc 100644
--- a/gcc/jit/docs/topics/expressions.rst
+++ b/gcc/jit/docs/topics/expressions.rst
@@ -989,6 +989,18 @@ Variables
 
   #ifdef LIBGCCJIT_HAVE_ATTRIBUTES
 
+.. function:: void\
+  gcc_jit_global_set_readonly (gcc_jit_lvalue *global)
+
+   Set the global variable as read-only, meaning you cannot assign to this 
variable.
+
+   This entrypoint was added in :ref:`LIBGCCJIT_ABI_29`; you can test for its
+   presence using:
+
+   .. code-block:: c
+
+  #ifdef LIBGCCJIT_HAVE_gcc_jit_global_set_readonly
+
 Working with pointers, structs and unions
 -
 
diff --git a/gcc/jit/jit-playback.cc b/gcc/jit/jit-playback.cc
index 8dd77e4d5871..f0f01648ac19 100644
--- a/gcc/jit/jit-playback.cc
+++ b/gcc/jit/jit-playback.cc
@@ -723,7 +723,8 @@ global_new_decl (location *loc,
 const char *name,
 enum global_var_flags flags,
 const std::vector> &attributes)
+std::string>> &attributes,
+bool readonly)
 {
   gcc_assert (type);
   gcc_assert (name);
@@ -762,7 +763,7 @@ global_new_decl (location *loc,
   break;
 }
 
-  if (TYPE_READONLY (type_tree))
+  if (TYPE_READONLY (type_tree) || readonly)
 TREE_READONLY (inner) = 1;
 
   if (loc)
@@ -815,10 +816,11 @@ new_global (location *loc,
const char *name,
enum global_var_flags flags,
const std::vector> &attributes)
+   std::string>> &attributes,
+   bool readonly)
 {
   tree inner =
-global_new_decl (loc, kind, type, name, flags, attributes);
+global_new_decl (loc, kind, type, name, flags, attributes, readonly);
 
   return global_finalize_lvalue (inner);
 }
@@ -965,9 +967,10 @@ new_global_initialized (location *loc,
const char *name,
enum global_var_flags flags,
c

[gcc r15-4936] libgccjit: Add convert vector

[Antoni Boucher via Gcc-cvs]

https://gcc.gnu.org/g:fe97ac43e05a8da8a12fbad2208a1ebb19d2d6c9

commit r15-4936-gfe97ac43e05a8da8a12fbad2208a1ebb19d2d6c9
Author: Antoni Boucher 
Date:   Sat May 14 17:24:29 2022 -0400

libgccjit: Add convert vector

gcc/jit/ChangeLog:

* docs/topics/compatibility.rst (LIBGCCJIT_ABI_30): New ABI tag.
* docs/topics/expressions.rst: Document 
gcc_jit_context_convert_vector.
* jit-playback.cc (convert_vector): New method.
* jit-playback.h: New method.
* jit-recording.cc (recording::context::new_convert_vector,
recording::convert_vector::replay_into,
recording::convert_vector::visit_children,
recording::convert_vector::make_debug_string,
recording::convert_vector::write_reproducer): New methods.
* jit-recording.h (class convert_vector): New class.
(context::new_convert_vector): New method.
* libgccjit.cc (gcc_jit_context_convert_vector): New function.
* libgccjit.h (gcc_jit_context_convert_vector): New function.
* libgccjit.map: New function.

gcc/testsuite/ChangeLog:

* jit.dg/all-non-failing-tests.h: New test.
* jit.dg/test-convert-vector.c: New test.

Diff:
---
 gcc/jit/docs/topics/compatibility.rst|  7 +++
 gcc/jit/docs/topics/expressions.rst  | 19 
 gcc/jit/jit-playback.cc  | 28 +++
 gcc/jit/jit-playback.h   |  5 ++
 gcc/jit/jit-recording.cc | 72 
 gcc/jit/jit-recording.h  | 34 +
 gcc/jit/libgccjit.cc | 36 ++
 gcc/jit/libgccjit.h  | 10 
 gcc/jit/libgccjit.map|  5 ++
 gcc/testsuite/jit.dg/all-non-failing-tests.h | 10 
 gcc/testsuite/jit.dg/test-convert-vector.c   | 60 +++
 11 files changed, 286 insertions(+)

diff --git a/gcc/jit/docs/topics/compatibility.rst 
b/gcc/jit/docs/topics/compatibility.rst
index 96adc03fed4d..33fa763d0213 100644
--- a/gcc/jit/docs/topics/compatibility.rst
+++ b/gcc/jit/docs/topics/compatibility.rst
@@ -411,3 +411,10 @@ on functions and variables:
 
 ``LIBGCCJIT_ABI_29`` covers the addition of
 :func:`gcc_jit_global_set_readonly`
+
+.. _LIBGCCJIT_ABI_30:
+
+``LIBGCCJIT_ABI_30``
+
+``LIBGCCJIT_ABI_30`` covers the addition of
+:func:`gcc_jit_context_convert_vector`
diff --git a/gcc/jit/docs/topics/expressions.rst 
b/gcc/jit/docs/topics/expressions.rst
index 2aabbb82a6bc..ca923e7f60c2 100644
--- a/gcc/jit/docs/topics/expressions.rst
+++ b/gcc/jit/docs/topics/expressions.rst
@@ -727,6 +727,25 @@ Type-coercion
 
   #ifdef LIBGCCJIT_HAVE_gcc_jit_context_new_bitcast
 
+.. function:: gcc_jit_rvalue *
+  gcc_jit_context_convert_vector (gcc_jit_context *ctxt, \
+  gcc_jit_location *loc, \
+  gcc_jit_rvalue *vector, \
+  gcc_jit_type *type)
+
+   Given a vector rvalue, cast it to the type ``type``, doing an element-wise
+   conversion.
+
+   The number of elements in ``vector`` and ``type`` must match.
+   The ``type`` must be a vector type.
+
+   This entrypoint was added in :ref:`LIBGCCJIT_ABI_30`; you can test for
+   its presence using
+
+   .. code-block:: c
+
+  #ifdef LIBGCCJIT_HAVE_gcc_jit_context_convert_vector
+
 Lvalues
 ---
 
diff --git a/gcc/jit/jit-playback.cc b/gcc/jit/jit-playback.cc
index f0f01648ac19..e32e837f2fea 100644
--- a/gcc/jit/jit-playback.cc
+++ b/gcc/jit/jit-playback.cc
@@ -1694,6 +1694,34 @@ new_array_access (location *loc,
 }
 }
 
+/* Construct a playback::rvalue instance (wrapping a tree) for a
+   vector conversion.  */
+
+playback::rvalue *
+playback::context::
+convert_vector (location *loc,
+  rvalue *vector,
+  type *type)
+{
+  gcc_assert (vector);
+  gcc_assert (type);
+
+  /* For comparison, see:
+   c/c-common.cc: c_build_vec_convert
+  */
+
+  tree t_vector = vector->as_tree ();
+
+  tree t_result =
+build_call_expr_internal_loc (UNKNOWN_LOCATION, IFN_VEC_CONVERT,
+  type->as_tree (), 1, t_vector);
+
+  if (loc)
+set_tree_location (t_result, loc);
+
+  return new rvalue (this, t_result);
+}
+
 /* Construct a tree for a field access.  */
 
 tree
diff --git a/gcc/jit/jit-playback.h b/gcc/jit/jit-playback.h
index 212f0b2662df..97ad62ccd6a3 100644
--- a/gcc/jit/jit-playback.h
+++ b/gcc/jit/jit-playback.h
@@ -222,6 +222,11 @@ public:
rvalue *ptr,
rvalue *index);
 
+  rvalue *
+  convert_vector (location *loc,
+ rvalue *vector,
+ type *type);
+
   void
   set_str_option (enum gcc_jit_str_option opt,
  const char *value);
diff --git a/gcc/jit/jit-recordi

[gcc r15-4932] testsuite: arm: Force hard ABI for pr51534.c test

[Torbjorn Svensson via Gcc-cvs]

https://gcc.gnu.org/g:e995866cff2866512cd3af24b6ca27a5782aca1f

commit r15-4932-ge995866cff2866512cd3af24b6ca27a5782aca1f
Author: Torbjörn SVENSSON 
Date:   Thu Oct 31 18:54:30 2024 +0100

testsuite: arm: Force hard ABI for pr51534.c test

The test case is written in a way that it should be using hard float
ABI, but the use of -mfloat-abi=hard could be overriden by
dg-add-options arm_neon. Ensure that -mfloat-abi=hard is always after.

gcc/testsuite/ChangeLog:

* gcc.target/arm/pr51534.c: Ensure -mfloat-abi=hard is used.

Signed-off-by: Torbjörn SVENSSON 

Diff:
---
 gcc/testsuite/gcc.target/arm/pr51534.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/arm/pr51534.c 
b/gcc/testsuite/gcc.target/arm/pr51534.c
index ba21259bee55..b68ecce26397 100644
--- a/gcc/testsuite/gcc.target/arm/pr51534.c
+++ b/gcc/testsuite/gcc.target/arm/pr51534.c
@@ -3,8 +3,9 @@
 
 /* { dg-do assemble { target { arm_hard_ok } } } */
 /* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -mfloat-abi=hard -O3" } */
+/* { dg-options "-save-temps -O3" } */
 /* { dg-add-options arm_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include 

[gcc r14-10881] testsuite: arm: Use effective-target for data-intrinsics-assembly test

[Torbjorn Svensson via Gcc-cvs]

https://gcc.gnu.org/g:05ffc649504f1eff8cd044565997754a301aaf1d

commit r14-10881-g05ffc649504f1eff8cd044565997754a301aaf1d
Author: Torbjörn SVENSSON 
Date:   Sat Oct 19 19:55:51 2024 +0200

testsuite: arm: Use effective-target for data-intrinsics-assembly test

The expected assembler in the test case assumes -marm, so explicily
require it.

gcc/testsuite/ChangeLog:

* gcc.target/arm/acle/data-intrinsics-assembly.c: Use
effective-target arm_arch_v6_arm.

Signed-off-by: Torbjörn SVENSSON 
(cherry picked from commit 7b2e6e6be6fdb3cbb2e21e190a981731b322bf4f)

Diff:
---
 gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c 
b/gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c
index 478cbde1600e..f0f583734e8d 100644
--- a/gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c
+++ b/gcc/testsuite/gcc.target/arm/acle/data-intrinsics-assembly.c
@@ -1,9 +1,9 @@
 /* Test the ACLE data intrinsics get expanded to the correct instructions on a 
specific architecture  */
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_softfp_ok } */
-/* { dg-require-effective-target arm_arch_v6_ok } */
+/* { dg-require-effective-target arm_arch_v6_arm_ok } */
 /* { dg-additional-options "--save-temps -O1" } */
-/* { dg-add-options arm_arch_v6 } */
+/* { dg-add-options arm_arch_v6_arm } */
 /* { dg-final { check-function-bodies "**" "" "" } } */
 
 #include "arm_acle.h"

[gcc r14-10882] testsuite: arm: Force hard ABI for pr51534.c test

[Torbjorn Svensson via Gcc-cvs]

https://gcc.gnu.org/g:7cc64ea49616b7bca4e7d950e25fd2cc9e4111ef

commit r14-10882-g7cc64ea49616b7bca4e7d950e25fd2cc9e4111ef
Author: Torbjörn SVENSSON 
Date:   Thu Oct 31 18:54:30 2024 +0100

testsuite: arm: Force hard ABI for pr51534.c test

The test case is written in a way that it should be using hard float
ABI, but the use of -mfloat-abi=hard could be overriden by
dg-add-options arm_neon. Ensure that -mfloat-abi=hard is always after.

gcc/testsuite/ChangeLog:

* gcc.target/arm/pr51534.c: Ensure -mfloat-abi=hard is used.

Signed-off-by: Torbjörn SVENSSON 
(cherry picked from commit e995866cff2866512cd3af24b6ca27a5782aca1f)

Diff:
---
 gcc/testsuite/gcc.target/arm/pr51534.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/arm/pr51534.c 
b/gcc/testsuite/gcc.target/arm/pr51534.c
index ba21259bee55..b68ecce26397 100644
--- a/gcc/testsuite/gcc.target/arm/pr51534.c
+++ b/gcc/testsuite/gcc.target/arm/pr51534.c
@@ -3,8 +3,9 @@
 
 /* { dg-do assemble { target { arm_hard_ok } } } */
 /* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -mfloat-abi=hard -O3" } */
+/* { dg-options "-save-temps -O3" } */
 /* { dg-add-options arm_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include 

[gcc r14-10880] testsuite: arm: Relax cbranch tests to accept inverted branches

[Torbjorn Svensson via Gcc-cvs]

https://gcc.gnu.org/g:8f2cc62785ea115212e70472956210835d0c8106

commit r14-10880-g8f2cc62785ea115212e70472956210835d0c8106
Author: Torbjörn SVENSSON 
Date:   Sat Oct 19 17:54:59 2024 +0200

testsuite: arm: Relax cbranch tests to accept inverted branches

Similar to PR113502, but for non-aarch64 test.
The test started to fail after r14-7243-gafac1bd3365.

gcc/testsuite/ChangeLog:

* gcc.target/arm/vect-early-break-cbranch.c: Ignore exact
branch.

Signed-off-by: Torbjörn SVENSSON 
(cherry picked from commit d56d2f3102ada3d68eaa318de4b6d1a17d9cd74d)

Diff:
---
 gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c 
b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
index d5c6d56ec869..334e064a2393 100644
--- a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
+++ b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
@@ -20,7 +20,7 @@ int b[N] = {0};
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -45,7 +45,7 @@ void f1 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -70,7 +70,7 @@ void f2 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -96,7 +96,7 @@ void f3 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -121,7 +121,7 @@ void f4 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */
@@ -146,7 +146,7 @@ void f5 ()
 ** cmp r[0-9]+, #0
 ** bne \.L[0-9]+
 ** |
-** cbnzr[0-9]+, \.L.+
+** cbn?z   r[0-9]+, \.L.+
 ** )
 ** ...
 */

[gcc r15-4937] [PATCH v2 1/2] RISC-V: Make vectorized memset handle more cases

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:b30c6a5eabaf476663f1a1e41165967e782eccd3

commit r15-4937-gb30c6a5eabaf476663f1a1e41165967e782eccd3
Author: Craig Blackmore 
Date:   Mon Nov 4 13:55:19 2024 -0700

[PATCH v2 1/2] RISC-V: Make vectorized memset handle more cases

`expand_vec_setmem` only generated vectorized memset if it fitted into a
single vector store of at least (TARGET_MIN_VLEN / 8) bytes.  Also,
without dynamic LMUL the operation was always TARGET_MAX_LMUL even if it
would have fitted a smaller LMUL.

Allow vectorized memset to be generated for smaller lengths and smaller
LMUL by switching to using use_vector_string_op.  Smaller LMUL can be
seen in setmem-3.c:f3.  Smaller lengths will be seen after the second
patch in this series which selectively disables by pieces.

gcc/ChangeLog:

* config/riscv/riscv-string.cc
(use_vector_stringop_p): Add comment.
(expand_vec_setmem): Use use_vector_stringop_p instead of
check_vectorise_memory_operation.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/setmem-3.c: Expect smaller lmul.

Diff:
---
 gcc/config/riscv/riscv-string.cc   | 37 +++---
 gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c |  6 ++--
 2 files changed, 22 insertions(+), 21 deletions(-)

diff --git a/gcc/config/riscv/riscv-string.cc b/gcc/config/riscv/riscv-string.cc
index 118c02a40212..20395e19c604 100644
--- a/gcc/config/riscv/riscv-string.cc
+++ b/gcc/config/riscv/riscv-string.cc
@@ -1062,6 +1062,9 @@ struct stringop_info {
 
MAX_EW is the maximum element width that the caller wants to use and
LENGTH_IN is the length of the stringop in bytes.
+
+   This is currently used for cpymem and setmem.  If expand_vec_cmpmem switches
+   to using it too then check_vectorise_memory_operation can be removed.
 */
 
 static bool
@@ -1600,41 +1603,39 @@ check_vectorise_memory_operation (rtx length_in, 
HOST_WIDE_INT &lmul_out)
 bool
 expand_vec_setmem (rtx dst_in, rtx length_in, rtx fill_value_in)
 {
-  HOST_WIDE_INT lmul;
+  stringop_info info;
+
   /* Check we are able and allowed to vectorise this operation;
  bail if not.  */
-  if (!check_vectorise_memory_operation (length_in, lmul))
+  if (!use_vector_stringop_p (info, 1, length_in) || info.need_loop)
 return false;
 
-  machine_mode vmode
-  = riscv_vector::get_vector_mode (QImode, BYTES_PER_RISCV_VECTOR * lmul)
-   .require ();
   rtx dst_addr = copy_addr_to_reg (XEXP (dst_in, 0));
-  rtx dst = change_address (dst_in, vmode, dst_addr);
+  rtx dst = change_address (dst_in, info.vmode, dst_addr);
 
-  rtx fill_value = gen_reg_rtx (vmode);
+  rtx fill_value = gen_reg_rtx (info.vmode);
   rtx broadcast_ops[] = { fill_value, fill_value_in };
 
   /* If the length is exactly vlmax for the selected mode, do that.
  Otherwise, use a predicated store.  */
-  if (known_eq (GET_MODE_SIZE (vmode), INTVAL (length_in)))
+  if (known_eq (GET_MODE_SIZE (info.vmode), INTVAL (info.avl)))
 {
-  emit_vlmax_insn (code_for_pred_broadcast (vmode), UNARY_OP,
- broadcast_ops);
+  emit_vlmax_insn (code_for_pred_broadcast (info.vmode), UNARY_OP,
+  broadcast_ops);
   emit_move_insn (dst, fill_value);
 }
   else
 {
-  if (!satisfies_constraint_K (length_in))
- length_in = force_reg (Pmode, length_in);
-  emit_nonvlmax_insn (code_for_pred_broadcast (vmode), UNARY_OP,
- broadcast_ops, length_in);
+  if (!satisfies_constraint_K (info.avl))
+   info.avl = force_reg (Pmode, info.avl);
+  emit_nonvlmax_insn (code_for_pred_broadcast (info.vmode),
+ riscv_vector::UNARY_OP, broadcast_ops, info.avl);
   machine_mode mask_mode
- = riscv_vector::get_vector_mode (BImode, GET_MODE_NUNITS (vmode))
- .require ();
+   = riscv_vector::get_vector_mode (BImode, GET_MODE_NUNITS (info.vmode))
+ .require ();
   rtx mask = CONSTM1_RTX (mask_mode);
-  emit_insn (gen_pred_store (vmode, dst, mask, fill_value, length_in,
- get_avl_type_rtx (riscv_vector::NONVLMAX)));
+  emit_insn (gen_pred_store (info.vmode, dst, mask, fill_value, info.avl,
+get_avl_type_rtx (riscv_vector::NONVLMAX)));
 }
 
   return true;
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c
index 25be694d248a..52766fece76a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c
@@ -21,13 +21,13 @@ f1 (void *a, int const b)
   return __builtin_memset (a, b, MIN_VECTOR_BYTES - 1);
 }
 
-/* Vectorise+inline minimum vector register width using requested lmul.
+/* Vectorised code should use smallest lmul known to fit length.
 ** f2:
 **  (
-**  vsetivli\s+zero,\d+,e8,m8

[gcc r15-4938] [PATCH v2 2/2] RISC-V: Disable by pieces for vector setmem length > UNITS_PER_WORD

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:6b315907c0353f71169a7555e653d29a981fef67

commit r15-4938-g6b315907c0353f71169a7555e653d29a981fef67
Author: Craig Blackmore 
Date:   Mon Nov 4 13:57:20 2024 -0700

[PATCH v2 2/2] RISC-V: Disable by pieces for vector setmem length > 
UNITS_PER_WORD

For fast unaligned access targets, by pieces uses up to UNITS_PER_WORD
size pieces resulting in more store instructions than needed.  For
example gcc.target/riscv/rvv/base/setmem-2.c:f1 built with
`-O3 -march=rv64gcv -mtune=thead-c906`:
```
f1:
vsetivlizero,8,e8,mf2,ta,ma
vmv.v.x v1,a1
vsetivlizero,0,e32,mf2,ta,ma
sb  a1,14(a0)
vmv.x.s a4,v1
vsetivlizero,8,e16,m1,ta,ma
vmv.x.s a5,v1
vse8.v  v1,0(a0)
sw  a4,8(a0)
sh  a5,12(a0)
ret
```

The slow unaligned access version built with `-O3 -march=rv64gcv` used
15 sb instructions:
```
f1:
sb  a1,0(a0)
sb  a1,1(a0)
sb  a1,2(a0)
sb  a1,3(a0)
sb  a1,4(a0)
sb  a1,5(a0)
sb  a1,6(a0)
sb  a1,7(a0)
sb  a1,8(a0)
sb  a1,9(a0)
sb  a1,10(a0)
sb  a1,11(a0)
sb  a1,12(a0)
sb  a1,13(a0)
sb  a1,14(a0)
ret
```

After this patch, the following is generated in both cases:
```
f1:
vsetivlizero,15,e8,m1,ta,ma
vmv.v.x v1,a1
vse8.v  v1,0(a0)
ret
```

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_use_by_pieces_infrastructure_p):
New function.
(TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Define.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr113469.c: Expect mf2 setmem.
* gcc.target/riscv/rvv/base/setmem-2.c: Update f1 to expect
straight-line vector memset.
* gcc.target/riscv/rvv/base/setmem-3.c: Likewise.

Diff:
---
 gcc/config/riscv/riscv.cc | 19 +++
 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113469.c |  3 ++-
 gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c| 12 +++-
 gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c| 12 +++-
 4 files changed, 35 insertions(+), 11 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 0b3b2c4cba91..2e9ac280c8f2 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -12695,6 +12695,22 @@ riscv_stack_clash_protection_alloca_probe_range (void)
   return STACK_CLASH_CALLER_GUARD;
 }
 
+static bool
+riscv_use_by_pieces_infrastructure_p (unsigned HOST_WIDE_INT size,
+ unsigned alignment,
+ enum by_pieces_operation op, bool speed_p)
+{
+  /* For set/clear with size > UNITS_PER_WORD, by pieces uses vector broadcasts
+ with UNITS_PER_WORD size pieces.  Use setmem instead which can use
+ bigger chunks.  */
+  if (TARGET_VECTOR && stringop_strategy & STRATEGY_VECTOR
+  && (op == CLEAR_BY_PIECES || op == SET_BY_PIECES)
+  && speed_p && size > UNITS_PER_WORD)
+return false;
+
+  return default_use_by_pieces_infrastructure_p (size, alignment, op, speed_p);
+}
+
 /* Initialize the GCC target structure.  */
 #undef TARGET_ASM_ALIGNED_HI_OP
 #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
@@ -13060,6 +13076,9 @@ riscv_stack_clash_protection_alloca_probe_range (void)
 #undef TARGET_C_MODE_FOR_FLOATING_TYPE
 #define TARGET_C_MODE_FOR_FLOATING_TYPE riscv_c_mode_for_floating_type
 
+#undef TARGET_USE_BY_PIECES_INFRASTRUCTURE_P
+#define TARGET_USE_BY_PIECES_INFRASTRUCTURE_P 
riscv_use_by_pieces_infrastructure_p
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-riscv.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113469.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113469.c
index d1c118c02d6e..f86084bdb40f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113469.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113469.c
@@ -51,4 +51,5 @@ void p(int buf, __builtin_va_list ab, int q) {
  } while (k);
 }
 
-/* { dg-final { scan-assembler-times 
{vsetivli\tzero,\s*4,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 } } */
+/* { dg-final { scan-assembler-times 
{vsetivli\tzero,\s*4,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 } } */
+/* { dg-final { scan-assembler-times 
{vsetivli\tzero,\s*8,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c
index faea442a4bdc..838fbebadff3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c
@@ -5,15 +5,17 @@
 
 #defi

[gcc r15-4951] middle-end/117433 - ICE with gimple BLKmode reg copy

[Richard Biener via Gcc-cvs]

https://gcc.gnu.org/g:2fc25a21820001c67258d30f0960ac9cd0f268cf

commit r15-4951-g2fc25a21820001c67258d30f0960ac9cd0f268cf
Author: Richard Biener 
Date:   Mon Nov 4 11:39:05 2024 +0100

middle-end/117433 - ICE with gimple BLKmode reg copy

When we end up expanding a SSA name copy with BLKmode regs which can
happen for vectors, possibly wrapped in a NOP-conversion or
a PAREN_EXPR and we are not optimizing we can end up with two
BLKmode MEMs that expand_gimple_stmt_1 doesn't properly handle
when expanding, trying to emit_move_insn them.  Looking at store_expr
which what expand_gimple_stmt_1 is really doing reveals a lot of
magic that's missing.  It eventually falls back to emit_block_move
(store_expr isn't exported), so this is what I ended up using here
given I think we'll only have BLKmode "registers" for vectors.

PR middle-end/117433
* cfgexpand.cc (expand_gimple_stmt_1): Use emit_block_move
when moving temp to BLKmode target.

* gcc.dg/pr117433.c: New testcase.

Diff:
---
 gcc/cfgexpand.cc|  7 ++-
 gcc/testsuite/gcc.dg/pr117433.c | 21 +
 2 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/gcc/cfgexpand.cc b/gcc/cfgexpand.cc
index e35664cc93d8..f3a33ff9a07d 100644
--- a/gcc/cfgexpand.cc
+++ b/gcc/cfgexpand.cc
@@ -4068,8 +4068,13 @@ expand_gimple_stmt_1 (gimple *stmt)
else
  {
temp = force_operand (temp, target);
-   if (temp != target)
+   if (temp == target)
+ ;
+   else if (GET_MODE (target) != BLKmode)
  emit_move_insn (target, temp);
+   else
+ emit_block_move (target, temp, expr_size (lhs),
+  BLOCK_OP_NORMAL);
  }
  }
   }
diff --git a/gcc/testsuite/gcc.dg/pr117433.c b/gcc/testsuite/gcc.dg/pr117433.c
new file mode 100644
index ..1014c1ef3186
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr117433.c
@@ -0,0 +1,21 @@
+/* { dg-do run } */
+
+__attribute__((__vector_size__ (sizeof (long unsigned) * 8))) long unsigned b;
+
+void __attribute__((noipa))
+foo ()
+{
+  b += __builtin_assoc_barrier (b);
+}
+
+int main()
+{
+  int i;
+  for (i = 0; i < 8; ++i)
+b[i] = i;
+  foo ();
+  for (i = 0; i < 8; ++i)
+if (b[i] != 2*i)
+  __builtin_abort ();
+  return 0;
+}

[gcc r15-4953] c++: Mark replaceable global operator new/delete with const std::nothrow_t& argument as DECL_IS_REPL

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:c1bbad07c8686c858ea58ffdb9db8f964bf485c6

commit r15-4953-gc1bbad07c8686c858ea58ffdb9db8f964bf485c6
Author: Jakub Jelinek 
Date:   Tue Nov 5 08:58:28 2024 +0100

c++: Mark replaceable global operator new/delete with const std::nothrow_t& 
argument as DECL_IS_REPLACEABLE_OPERATOR [PR117370]

cxx_init_decl_processing predeclares 12 out of the 20 replaceable global
new/delete operators and sets DECL_IS_REPLACEABLE_OPERATOR on those.
But it doesn't handle the remaining 8, in particular
void* operator new(std::size_t, const std::nothrow_t&) noexcept;
void* operator new[](std::size_t, const std::nothrow_t&) noexcept;
void operator delete(void*, const std::nothrow_t&) noexcept;
void operator delete[](void*, const std::nothrow_t&) noexcept;
void* operator new(std::size_t, std::align_val_t, const std::nothrow_t&) 
noexcept;
void* operator new[](std::size_t, std::align_val_t, const std::nothrow_t&) 
noexcept;
void operator delete(void*, std::align_val_t, const std::nothrow_t&) 
noexcept;
void operator delete[](void*, std::align_val_t, const std::nothrow_t&) 
noexcept;

The following patch sets that flag during grok_op_properties for those, so
that they don't need to be predeclared.
The patch doesn't fix the whole PR, as some work is needed on the CDDCE side
too, unlike the throwing operator new case the if (ptr) conditional around
operator delete isn't removed by VRP and so we need to handle conditional
delete for unconditional new.

2024-11-05  Jakub Jelinek  

PR c++/117370
* cp-tree.h (is_std_class): Declare.
* constexpr.cc (is_std_class): New function.
(is_std_allocator): Use it.
* decl.cc (grok_op_properties): Mark global replaceable
operator new/delete operators with const std::nothrow_t & last
argument with DECL_IS_REPLACEABLE_OPERATOR.

Diff:
---
 gcc/cp/constexpr.cc | 16 
 gcc/cp/cp-tree.h|  1 +
 gcc/cp/decl.cc  | 30 ++
 3 files changed, 43 insertions(+), 4 deletions(-)

diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc
index c141c0a2844b..71e6dc4ef326 100644
--- a/gcc/cp/constexpr.cc
+++ b/gcc/cp/constexpr.cc
@@ -2363,22 +2363,30 @@ is_std_construct_at (const constexpr_call *call)
  && is_std_construct_at (call->fundef->decl));
 }
 
-/* True if CTX is an instance of std::allocator.  */
+/* True if CTX is an instance of std::NAME class.  */
 
 bool
-is_std_allocator (tree ctx)
+is_std_class (tree ctx, const char *name)
 {
   if (ctx == NULL_TREE || !CLASS_TYPE_P (ctx) || !TYPE_MAIN_DECL (ctx))
 return false;
 
   tree decl = TYPE_MAIN_DECL (ctx);
-  tree name = DECL_NAME (decl);
-  if (name == NULL_TREE || !id_equal (name, "allocator"))
+  tree dname = DECL_NAME (decl);
+  if (dname == NULL_TREE || !id_equal (dname, name))
 return false;
 
   return decl_in_std_namespace_p (decl);
 }
 
+/* True if CTX is an instance of std::allocator.  */
+
+bool
+is_std_allocator (tree ctx)
+{
+  return is_std_class (ctx, "allocator");
+}
+
 /* Return true if FNDECL is std::allocator::{,de}allocate.  */
 
 static inline bool
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index f98a1de42cae..92d1dba6a5c9 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -8706,6 +8706,7 @@ extern bool is_rvalue_constant_expression (tree);
 extern bool is_nondependent_constant_expression (tree);
 extern bool is_nondependent_static_init_expression (tree);
 extern bool is_static_init_expression(tree);
+extern bool is_std_class (tree, const char *);
 extern bool is_std_allocator (tree);
 extern bool potential_rvalue_constant_expression (tree);
 extern bool require_potential_constant_expression (tree);
diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
index 0e4533c6faba..b4e7ceefedb0 100644
--- a/gcc/cp/decl.cc
+++ b/gcc/cp/decl.cc
@@ -16191,6 +16191,36 @@ grok_op_properties (tree decl, bool complain)
}
}
 
+  /* Check for replaceable global new/delete operators with
+const std::nothrow_t & last argument, other replaceable global
+new/delete operators are marked in cxx_init_decl_processing.  */
+  if (CP_DECL_CONTEXT (decl) == global_namespace)
+   {
+ tree args = argtypes;
+ if (args
+ && args != void_list_node
+ && same_type_p (TREE_VALUE (args),
+ (op_flags & OVL_OP_FLAG_DELETE)
+ ? ptr_type_node : size_type_node))
+   {
+ args = TREE_CHAIN (args);
+ if (aligned_allocation_fn_p (decl))
+   args = TREE_CHAIN (args);
+ if (args
+ && args != void_list_node
+ && TREE_CHAIN (args) == void_list_node)
+   {
+ tree t = TREE_VALUE (args);
+ if (TYPE_REF_P (t)
+ && !TYPE_REF_IS_RVALUE (t)
+

[gcc r12-10800] ada: Fix internal error on concatenation of discriminant-dependent component

[Eric Botcazou via Gcc-cvs]

https://gcc.gnu.org/g:d2061812ea9ff4dd862f32aed81b127300b29ee2

commit r12-10800-gd2061812ea9ff4dd862f32aed81b127300b29ee2
Author: Eric Botcazou 
Date:   Fri Aug 16 16:03:30 2024 +0200

ada: Fix internal error on concatenation of discriminant-dependent component

This only occurs with optimization enabled, but the expanded code is always
wrong because it reuses the formal parameter of an initialization procedure
associated with a discriminant (a discriminal in GNAT parlance) outside of
the initialization procedure.

gcc/ada/

* checks.adb (Selected_Length_Checks.Get_E_Length): For a
component of a record with discriminants and if the expression is
a selected component, try to build an actual subtype from its
prefix instead of from the discriminal.

Diff:
---
 gcc/ada/checks.adb | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/checks.adb b/gcc/ada/checks.adb
index e1a1b0cfec1b..449aa6578ac9 100644
--- a/gcc/ada/checks.adb
+++ b/gcc/ada/checks.adb
@@ -9936,7 +9936,15 @@ package body Checks is
  if Ekind (Scope (E)) = E_Record_Type
and then Has_Discriminants (Scope (E))
  then
-N := Build_Discriminal_Subtype_Of_Component (E);
+--  If the expression is a selected component, in other words,
+--  has a prefix, then build an actual subtype from the prefix.
+--  Otherwise, build an actual subtype from the discriminal.
+
+if Nkind (Expr) = N_Selected_Component then
+   N := Build_Actual_Subtype_Of_Component (E, Expr);
+else
+   N := Build_Discriminal_Subtype_Of_Component (E);
+end if;
 
 if Present (N) then
Insert_Action (Expr, N);