[gcc r15-3364] ranger: Fix up range computation for CLZ [PR116486]

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:25d51fb7d098a9ac8880ccb2121d889815680177

commit r15-3364-g25d51fb7d098a9ac8880ccb2121d889815680177
Author: Jakub Jelinek 
Date:   Mon Sep 2 09:44:09 2024 +0200

ranger: Fix up range computation for CLZ [PR116486]

The initial CLZ gimple-range-op.cc implementation handled just the
case where second argument to .CLZ is equal to prec, but in
r15-1014 I've added also handling of the -1 case.  As the following
testcase shows, incorrectly though for the case where the first argument
has [0,0] range.  If the second argument is prec, then the result should
be [prec,prec] and that was handled correctly, but when the second argument
is -1, the result should be [-1,-1] but instead it was incorrectly computed
as [prec-1,prec-1] (when second argument is prec, mini is 0 and maxi is
prec, while when second argument is -1, mini is -1 and maxi is prec-1).

Fixed thusly (the actual handling is then similar to the CTZ [0,0] case).

2024-09-02  Jakub Jelinek  

PR middle-end/116486
* gimple-range-op.cc (cfn_clz::fold_range): If lh is [0,0]
and mini is -1, return [-1,-1] range rather than [prec-1,prec-1].

* gcc.dg/bitint-109.c: New test.

Diff:
---
 gcc/gimple-range-op.cc|  6 --
 gcc/testsuite/gcc.dg/bitint-109.c | 25 +
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/gcc/gimple-range-op.cc b/gcc/gimple-range-op.cc
index d1c527191f4a..68a7df8d01bc 100644
--- a/gcc/gimple-range-op.cc
+++ b/gcc/gimple-range-op.cc
@@ -972,8 +972,10 @@ cfn_clz::fold_range (irange &r, tree type, const irange 
&lh,
 {
   // If CLZ_DEFINED_VALUE_AT_ZERO is 2 with VALUE of prec,
   // return [prec, prec] or [-1, -1], otherwise ignore the range.
-  if (maxi == prec || mini == -1)
-   mini = maxi;
+  if (maxi == prec)
+   mini = prec;
+  else if (mini == -1)
+   maxi = -1;
 }
   else if (mini >= 0)
 mini = newmini;
diff --git a/gcc/testsuite/gcc.dg/bitint-109.c 
b/gcc/testsuite/gcc.dg/bitint-109.c
new file mode 100644
index ..84c4314cdf9d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/bitint-109.c
@@ -0,0 +1,25 @@
+/* PR middle-end/116486 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2 -fno-tree-ccp" } */
+
+unsigned u;
+
+#if __BITINT_MAXWIDTH__ >= 129
+#define N 0x1uwb
+#else
+#define N 0xuwb
+#endif
+
+int
+foo (void)
+{
+  return __builtin_stdc_first_leading_one (u / N);
+}
+
+int
+main ()
+{
+  int x = foo ();
+  if (x)
+__builtin_abort ();
+}

[gcc r15-3366] ada: Cleanup expansion of object declarations

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:905ab329ccd06b0154eb42724eb5999165cd01fc

commit r15-3366-g905ab329ccd06b0154eb42724eb5999165cd01fc
Author: Piotr Trojanek 
Date:   Thu Aug 8 17:06:09 2024 +0200

ada: Cleanup expansion of object declarations

Replace repeated calls to Sloc with uses of local constant Loc.

Code cleanup; behavior is unaffected.

gcc/ada/

* exp_ch3.adb (Expand_N_Object_Declaration): Replace calls to Sloc
with uses of Loc; turn variable Prag into constant.

Diff:
---
 gcc/ada/exp_ch3.adb | 10 +++---
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/gcc/ada/exp_ch3.adb b/gcc/ada/exp_ch3.adb
index 4f6fa4cf6b71..ff808aadea88 100644
--- a/gcc/ada/exp_ch3.adb
+++ b/gcc/ada/exp_ch3.adb
@@ -7658,11 +7658,9 @@ package body Exp_Ch3 is
and then Is_Library_Level_Entity (Def_Id)
  then
 declare
-   Prag : Node_Id;
+   Prag : constant Node_Id :=
+ Make_Linker_Section_Pragma (Def_Id, Loc, ".persistent.bss");
 begin
-   Prag :=
- Make_Linker_Section_Pragma
-   (Def_Id, Sloc (N), ".persistent.bss");
Insert_After (N, Prag);
Analyze (Prag);
 end;
@@ -8349,10 +8347,8 @@ package body Exp_Ch3 is
  --  An Ada 2012 stand-alone object of an anonymous access type
 
  declare
-Loc : constant Source_Ptr := Sloc (N);
-
 Level : constant Entity_Id :=
-  Make_Defining_Identifier (Sloc (N),
+  Make_Defining_Identifier (Loc,
 Chars =>
   New_External_Name (Chars (Def_Id), Suffix => "L"));

[gcc r15-3365] ada: Remove repeated guards in validity checks

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:78acc6d85f972102b92e803bef0aac0afdb1ca9e

commit r15-3365-g78acc6d85f972102b92e803bef0aac0afdb1ca9e
Author: Piotr Trojanek 
Date:   Thu Aug 8 10:59:57 2024 +0200

ada: Remove repeated guards in validity checks

Routine Insert_Valid_Check only applies checks when Expr_Known_Valid
query returns False; there is no need to call this query before
inserting checks.

Code cleanup; behavior is unaffected.

gcc/ada/

* exp_imgv.adb (Expand_User_Defined_Enumeration_Image)
(Expand_Image_Attribute): Remove redundant guards.

Diff:
---
 gcc/ada/exp_imgv.adb | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/gcc/ada/exp_imgv.adb b/gcc/ada/exp_imgv.adb
index e5d84cc52e34..ce052c13c880 100644
--- a/gcc/ada/exp_imgv.adb
+++ b/gcc/ada/exp_imgv.adb
@@ -896,9 +896,7 @@ package body Exp_Imgv is
  --  Apply a validity check, since it is a bit drastic to get a
  --  completely junk image value for an invalid value.
 
- if not Expr_Known_Valid (Expr) then
-Insert_Valid_Check (Expr);
- end if;
+ Insert_Valid_Check (Expr);
 
  --  Generate:
  --P1 : constant Natural := Typ'Pos (Typ?(Expr));
@@ -1249,9 +1247,7 @@ package body Exp_Imgv is
 --  Apply a validity check, since it is a bit drastic to get a
 --  completely junk image value for an invalid value.
 
-if not Expr_Known_Valid (Expr) then
-   Insert_Valid_Check (Expr);
-end if;
+Insert_Valid_Check (Expr);
 
 Enum_Case := True;
  end if;

[gcc r15-3367] ada: Also reset scope for some nested declaration

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:cb690aa1ce37f109986a5848c2b727be6a2aaacb

commit r15-3367-gcb690aa1ce37f109986a5848c2b727be6a2aaacb
Author: Marc Poulhiès 
Date:   Thu Aug 8 13:36:37 2024 +0200

ada: Also reset scope for some nested declaration

When changing the scope for entities found in the entry body that is
mutated into a procedure, the compiler needs to look deeper than only
the top level entities as expansion may produce object declarations
which scopes are also the entry. For example, the tree after expansion
may look like:

  procedure This_Is_An_Entry_Proc is
 ...
 O1 : Typ := do
   TMP1 : OTyp := ...;
   ...
 in TMP1;

O1's scope needs to be reset to This_Is_An_Entry_Proc, but so does
TMP1's scope.

This change also fix a small oversight where
N_Implicit_Label_Declaration scope must be reset and its content
skipped.

gcc/ada/

* exp_ch9.adb (Reset_Scopes_To): Adjust comment.
(Reset_Scopes_To.Reset_Scope): Adjust the scope reset for object
declaration. In particular, visit the children nodes if any. Also
extend the handling of other declarations to
N_Implicit_Label_Declaration.

Diff:
---
 gcc/ada/exp_ch9.adb | 25 -
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/exp_ch9.adb b/gcc/ada/exp_ch9.adb
index 958657f298d6..9b82a9fcfdda 100644
--- a/gcc/ada/exp_ch9.adb
+++ b/gcc/ada/exp_ch9.adb
@@ -489,7 +489,8 @@ package body Exp_Ch9 is
-- := P.;
 
procedure Reset_Scopes_To (Bod : Node_Id; E : Entity_Id);
-   --  Reset the scope of declarations and blocks at the top level of Bod to
+   --  Reset the scope of declarations and blocks at the top level of Bod and
+   --  of nested object declarations with scope pointing to the entry entity to
--  be E. Bod is either a block or a subprogram body. Used after expanding
--  various kinds of entry bodies into their corresponding constructs. This
--  is needed during unnesting to determine whether a body generated for an
@@ -14868,12 +14869,34 @@ package body Exp_Ch9 is
 Set_Scope (Entity (Identifier (N)), E);
 return Skip;
 
+ --  Reset scope for object declaration which scope is the task entry.
+ --
+ --  Also look inside the declaration (in particular in the expression
+ --  if present) because we may have expanded to something like:
+
+ --  O1 : Typ := do
+ --TMP1 : OTyp := ...;
+ --...
+ --in TMP1;
+
+ --  And the scope for TMP1 is Scope (O1). We need to look inside the
+ --  declaration to also reset such scope.
+
+ elsif Nkind (N) = N_Object_Declaration then
+if Present (Scope (Defining_Entity (N)))
+  and then Ekind (Scope (Defining_Entity (N)))
+in E_Entry | E_Entry_Family
+then
+   Set_Scope (Defining_Entity (N), E);
+end if;
+
  --  Ditto for a package declaration or a full type declaration, etc.
 
  elsif (Nkind (N) = N_Package_Declaration
  and then N /= Specification (N))
or else Nkind (N) in N_Declaration
or else Nkind (N) in N_Renaming_Declaration
+   or else Nkind (N) in N_Implicit_Label_Declaration
  then
 Set_Scope (Defining_Entity (N), E);
 return Skip;

[gcc r15-3368] ada: Small fixes for FreeBSD

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:34437eb472f18af091890336ef1a1c70bbc95132

commit r15-3368-g34437eb472f18af091890336ef1a1c70bbc95132
Author: Patrick Bernardi 
Date:   Fri Aug 16 19:00:23 2024 -0400

ada: Small fixes for FreeBSD

Size of pthread data types now need to be defined for FreeBSD ports.
Traceback support for AArch64 FreeBSD is now defined.

gcc/ada/

* s-oscons-tmplt.c: Define sizes of pthread data types on FreeBSD.
* tracebak.c: Use GCC unwinder and adjust PC appropriately on
aarch64-freebsd.

Diff:
---
 gcc/ada/s-oscons-tmplt.c | 9 ++---
 gcc/ada/tracebak.c   | 5 +++--
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/gcc/ada/s-oscons-tmplt.c b/gcc/ada/s-oscons-tmplt.c
index 946da3466f0f..96eb99dfdac4 100644
--- a/gcc/ada/s-oscons-tmplt.c
+++ b/gcc/ada/s-oscons-tmplt.c
@@ -1997,8 +1997,10 @@ CND(CLOCK_THREAD_CPUTIME_ID, "Thread CPU clock")
 CNS(CLOCK_RT_Ada, "")
 #endif
 
-#if defined (__APPLE__) || defined (__linux__) || defined (__ANDROID__) \
-  || defined (__QNX__) || defined (__rtems__) || defined (DUMMY)
+#if defined (__APPLE__) || defined (__ANDROID__) || defined (DUMMY) \
+  || defined (__FreeBSD__) || defined (__linux__) \
+  || defined (__QNX__) || defined (__rtems__)
+
 /*
 
--  Sizes of pthread data types
@@ -2041,7 +2043,8 @@ CND(PTHREAD_RWLOCKATTR_SIZE, "pthread_rwlockattr_t")
 CND(PTHREAD_RWLOCK_SIZE, "pthread_rwlock_t")
 CND(PTHREAD_ONCE_SIZE,   "pthread_once_t")
 
-#endif /* __APPLE__ || __linux__ || __ANDROID__ || __rtems__ */
+#endif /* __APPLE__ || __ANDROID__ || __FreeBSD ||__linux__
+  || __QNX__|| __rtems__ */
 
 /*
 
diff --git a/gcc/ada/tracebak.c b/gcc/ada/tracebak.c
index 13ab70718ce7..da940d1c77e9 100644
--- a/gcc/ada/tracebak.c
+++ b/gcc/ada/tracebak.c
@@ -564,9 +564,10 @@ is_return_from(void *symbol_addr, void *ret_addr)
 #error Unhandled QNX architecture.
 #endif
 
-/*--- aarch64-linux or aarch64-rtems -*/
+/*--- aarch64 FreeBSD, Linux, RTEMS -*/
 
-#elif (defined (__aarch64__) && (defined (__linux__) || defined (__rtems__)))
+#elif (defined (__aarch64__) && (defined (__FreeBSD__) || \
+   defined (__linux__) || defined (__rtems__)))
 
 #define USE_GCC_UNWINDER
 #define PC_ADJUST -4

[gcc r15-3369] ada: Documentation for generic type inference

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:a004c28c50581fe9ac20ac0e2cc1bc0387954db4

commit r15-3369-ga004c28c50581fe9ac20ac0e2cc1bc0387954db4
Author: Bob Duff 
Date:   Sun Aug 18 19:13:46 2024 -0400

ada: Documentation for generic type inference

...plus minor improvements to existing documentation.

gcc/ada/

* doc/gnat_rm/gnat_language_extensions.rst: I assume "extended set
of extensions" was a typo for "experimental set of extensions",
because "extended extensions" is repetitive and redundant. "in
addition" clarifies that the one subsumes the other. Add a
reminder at the start of each subsection about what switch/pragma
enables what extensions. Add new section about "Inference of
Dependent Types in Generic Instantiations".
* gnat_rm.texi: Regenerate.

Diff:
---
 gcc/ada/doc/gnat_rm/gnat_language_extensions.rst |  80 +++-
 gcc/ada/gnat_rm.texi | 157 ++-
 2 files changed, 202 insertions(+), 35 deletions(-)

diff --git a/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst 
b/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst
index 27be5e0c3d57..e7cd73fbf9d8 100644
--- a/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst
+++ b/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst
@@ -35,7 +35,8 @@ file, or in a ``.adc`` file corresponding to your project.
 * The ``-gnatX`` option, that you can pass to the compiler directly, will
   activate the curated subset of extensions.
 
-.. attention:: You can activate the extended set of extensions by using either
+.. attention:: You can activate the experimental set of extensions
+   in addition by using either
the ``-gnatX0`` command line flag, or the pragma ``Extensions_Allowed`` with
``All_Extensions`` as an argument. However, it is not recommended you use
this subset for serious projects; it is only meant as a technology preview
@@ -46,6 +47,9 @@ file, or in a ``.adc`` file corresponding to your project.
 Curated Extensions
 ==
 
+Features activated via ``-gnatX`` or
+``pragma Extensions_Allowed (On)``.
+
 Local Declarations Without Block
 
 
@@ -356,6 +360,9 @@ 
https://github.com/AdaCore/ada-spark-rfcs/blob/master/considered/rfc-oop-first-c
 Experimental Language Extensions
 
 
+Features activated via ``-gnatX0`` or
+``pragma Extensions_Allowed (All_Extensions)``.
+
 Conditional when constructs
 ---
 
@@ -662,3 +669,74 @@ Example:
 
 Link to the original RFC:
 
https://github.com/AdaCore/ada-spark-rfcs/blob/topic/finalization-rehaul/considered/rfc-generalized-finalization.md
+
+Inference of Dependent Types in Generic Instantiations
+--
+
+If a generic formal type T2 depends on another formal type T1,
+the actual for T1 can be inferred from the actual for T2.
+That is, you can give the actual for T2, and leave out the one
+for T1.
+
+For example, ``Ada.Unchecked_Deallocation`` has two generic formals:
+
+.. code-block:: ada
+
+generic
+   type Object (<>) is limited private;
+   type Name is access Object;
+procedure Ada.Unchecked_Deallocation (X : in out Name);
+
+where ``Name`` depends on ``Object``. With this language extension,
+you can leave out the actual for ``Object``, as in:
+
+.. code-block:: ada
+
+type Integer_Access is access all Integer;
+
+procedure Free is new Unchecked_Deallocation (Name => Integer_Access);
+
+The compiler will infer that the actual type for ``Object`` is ``Integer``.
+Note that named notation is always required when using inference.
+
+The following inferences are allowed:
+
+- For a formal access type, the designated type can be inferred.
+
+- For a formal array type, the index type(s) and the component
+  type can be inferred.
+
+- For a formal type with discriminats, the type(s) of the discriminants
+  can be inferred.
+
+Example for arrays:
+
+.. code-block:: ada
+
+generic
+type Element_Type is private;
+type Index_Type is (<>);
+type Array_Type is array (Index_Type range <>) of Element_Type;
+package Array_Operations is
+...
+end Array_Operations;
+
+...
+
+type Int_Array is array (Positive range <>) of Integer;
+
+package Int_Array_Operations is new Array_Operations (Array_Type => 
Int_Array);
+
+The index and component types of ``Array_Type`` are inferred from
+``Int_Array``, so that the above instantiation is equivalent to
+the following standard-Ada instantiation:
+
+.. code-block:: ada
+
+package Int_Array_Operations is new Array_Operations
+  (Element_Type => Integer,
+   Index_Type   => Positive,
+   Array_Type   => Int_Array);
+
+Link to the original RFC:
+https://github.com/AdaCore/ada-spark-rfcs/blob/topic/generic_instantiations/considered/rfc-inference-of-dependent-types.md
diff --git a/gcc/ada/gnat_rm.texi b/

[gcc r15-3371] ada: Fix standard output stream for gnatcmd output

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:2df253f35eec84a7dd7d4b0eaf4b1c052177044c

commit r15-3371-g2df253f35eec84a7dd7d4b0eaf4b1c052177044c
Author: Ronan Desplanques 
Date:   Wed Aug 21 15:10:38 2024 +0200

ada: Fix standard output stream for gnatcmd output

Before this patch, the gnat command sent to standard error pieces of
information that are a better match for standard output. This patch
makes this information go to standard output.

gcc/ada/

* gnatcmd.adb (GNATCmd): Fix standard output stream.

Diff:
---
 gcc/ada/gnatcmd.adb | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/gnatcmd.adb b/gcc/ada/gnatcmd.adb
index c1b817bd7864..ed37a348103a 100644
--- a/gcc/ada/gnatcmd.adb
+++ b/gcc/ada/gnatcmd.adb
@@ -278,7 +278,8 @@ procedure GNATCmd is
 --  Start of processing for GNATCmd
 
 begin
-   --  All output from GNATCmd is debugging or error output: send to stderr
+   --  Almost all output from GNATCmd is debugging or error output: send to
+   --  stderr.
 
Set_Standard_Error;
 
@@ -349,6 +350,7 @@ begin
  elsif Command_Arg <= Argument_Count
and then Argument (Command_Arg) = Ada_Help_Switch
  then
+Set_Standard_Output;
 Usage;
 Exit_Program (E_Success);
 
@@ -364,6 +366,7 @@ begin
 
  --  Add the following so that output is consistent with or without the
  --  --help flag.
+ Set_Standard_Output;
  Write_Eol;
  Write_Line ("Report bugs to rep...@adacore.com");
  return;

[gcc r15-3370] ada: Fix minor issues in -gnaty0's documentation

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:91f0a3a5a5c44b4ab0f97d6b1a9bd1c6b36b5736

commit r15-3370-g91f0a3a5a5c44b4ab0f97d6b1a9bd1c6b36b5736
Author: Ronan Desplanques 
Date:   Tue Aug 20 15:46:22 2024 +0200

ada: Fix minor issues in -gnaty0's documentation

Before this patch, the documentation of -gnaty0 used 0-based indexing
for column numbers while 1-based indexing is used everywhere else. This
patch makes this documentation use 1-based indexing, and also adds a
missing parenthesis.

gcc/ada/

* doc/gnat_ugn/building_executable_programs_with_gnat.rst: Fix
minor issues.
* gnat_ugn.texi: Regenerate.

Diff:
---
 gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst | 6 +++---
 gcc/ada/gnat_ugn.texi   | 8 
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst 
b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
index 07ca2ea22c35..4576009bc528 100644
--- a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
+++ b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
@@ -4783,7 +4783,7 @@ checks to be performed. The following checks are defined:
   then proper indentation is checked, with the digit indicating the
   indentation level required. A value of zero turns off this style check.
   The rule checks that the following constructs start on a column that is
-  a multiple of the alignment level:
+  one plus a multiple of the alignment level:
 
   * beginnings of declarations (except record component declarations)
 and statements;
@@ -4794,10 +4794,10 @@ checks to be performed. The following checks are 
defined:
 or body or that completes a compound statement.
 
   Full line comments must be
-  aligned with the ``--`` starting on a column that is a multiple of
+  aligned with the ``--`` starting on a column that is one plus a multiple of
   the alignment level, or they may be aligned the same way as the following
   non-blank line (this is useful when full line comments appear in the middle
-  of a statement, or they may be aligned with the source line on the previous
+  of a statement), or they may be aligned with the source line on the previous
   non-blank line.
 
 .. index:: -gnatya   (gcc)
diff --git a/gcc/ada/gnat_ugn.texi b/gcc/ada/gnat_ugn.texi
index 27c705e3bbd1..375f39f85602 100644
--- a/gcc/ada/gnat_ugn.texi
+++ b/gcc/ada/gnat_ugn.texi
@@ -19,7 +19,7 @@
 
 @copying
 @quotation
-GNAT User's Guide for Native Platforms , Aug 26, 2024
+GNAT User's Guide for Native Platforms , Aug 30, 2024
 
 AdaCore
 
@@ -13481,7 +13481,7 @@ in the string after @code{-gnaty}
 then proper indentation is checked, with the digit indicating the
 indentation level required. A value of zero turns off this style check.
 The rule checks that the following constructs start on a column that is
-a multiple of the alignment level:
+one plus a multiple of the alignment level:
 
 
 @itemize *
@@ -13499,10 +13499,10 @@ or body or that completes a compound statement.
 @end itemize
 
 Full line comments must be
-aligned with the @code{--} starting on a column that is a multiple of
+aligned with the @code{--} starting on a column that is one plus a multiple of
 the alignment level, or they may be aligned the same way as the following
 non-blank line (this is useful when full line comments appear in the middle
-of a statement, or they may be aligned with the source line on the previous
+of a statement), or they may be aligned with the source line on the previous
 non-blank line.
 @end table

[gcc r15-3372] ada: Create usage entry for -gnatw_l

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:1c9a6d8203b6cbc8500a28acdd9fbb23546a85dc

commit r15-3372-g1c9a6d8203b6cbc8500a28acdd9fbb23546a85dc
Author: Viljar Indus 
Date:   Wed Aug 21 11:57:58 2024 +0300

ada: Create usage entry for -gnatw_l

gcc/ada/

* doc/gnat_ugn/building_executable_programs_with_gnat.rst: update
documentation for the -gnatw_l switch.
* usage.adb: Add -gnatw_l entry.
* gnat_ugn.texi: Regenerate.

Diff:
---
 gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst | 6 +++---
 gcc/ada/gnat_ugn.texi   | 8 
 gcc/ada/usage.adb   | 2 ++
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst 
b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
index 4576009bc528..d8501b2357d4 100644
--- a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
+++ b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
@@ -3433,7 +3433,7 @@ of the pragma in the :title:`GNAT_Reference_manual`).
 .. index:: -gnatw_l  (gcc)
 
 :switch:`-gnatw_l`
-  *Activate warnings on inheritely limited types.*
+  *Activate warnings on implicitly limited types.*
 
   This switch causes the compiler trigger warnings on record types that do not
   have a limited keyword but contain a component that is a limited type.
@@ -3442,9 +3442,9 @@ of the pragma in the :title:`GNAT_Reference_manual`).
 .. index:: -gnatw_L  (gcc)
 
 :switch:`-gnatw_L`
-  *Suppress warnings on inheritely limited types.*
+  *Suppress warnings on implicitly limited types.*
 
-  This switch suppresses warnings on inheritely limited types.
+  This switch suppresses warnings on implicitly limited types.
 
 
 .. index:: -gnatwm  (gcc)
diff --git a/gcc/ada/gnat_ugn.texi b/gcc/ada/gnat_ugn.texi
index 375f39f85602..e59ee9f78191 100644
--- a/gcc/ada/gnat_ugn.texi
+++ b/gcc/ada/gnat_ugn.texi
@@ -11678,7 +11678,7 @@ This switch suppresses listing of inherited aspects.
 
 @item @code{-gnatw_l}
 
-`Activate warnings on inheritely limited types.'
+`Activate warnings on implicitly limited types.'
 
 This switch causes the compiler trigger warnings on record types that do not
 have a limited keyword but contain a component that is a limited type.
@@ -11691,9 +11691,9 @@ have a limited keyword but contain a component that is 
a limited type.
 
 @item @code{-gnatw_L}
 
-`Suppress warnings on inheritely limited types.'
+`Suppress warnings on implicitly limited types.'
 
-This switch suppresses warnings on inheritely limited types.
+This switch suppresses warnings on implicitly limited types.
 @end table
 
 @geindex -gnatwm (gcc)
@@ -29695,8 +29695,8 @@ to permit their use in free software.
 
 @printindex ge
 
-@anchor{gnat_ugn/gnat_utility_programs switches-related-to-project-files}@w{   
   }
 @anchor{d1}@w{  }
+@anchor{gnat_ugn/gnat_utility_programs switches-related-to-project-files}@w{   
   }
 
 @c %**end of body
 @bye
diff --git a/gcc/ada/usage.adb b/gcc/ada/usage.adb
index 5b7743703c5e..38a82beb615b 100644
--- a/gcc/ada/usage.adb
+++ b/gcc/ada/usage.adb
@@ -538,6 +538,8 @@ begin
Write_Line ("L*   turn off warnings for elaboration problems");
Write_Line (".l   turn on info messages for inherited aspects");
Write_Line (".L*  turn off info messages for inherited aspects");
+   Write_Line ("_l   turn on warnings for implicitly limited types");
+   Write_Line ("_L*  turn off warnings for implicitly limited types");
Write_Line ("m+   turn on warnings for variable assigned " &
   "but not read");
Write_Line ("M*   turn off warnings for variable assigned " &

[gcc r15-3373] ada: Diagnose too large size clause on floating-point type

[Marc Poulhi?s via Gcc-cvs]

https://gcc.gnu.org/g:571d0450b294af66338c911c5205b4cbf20902ad

commit r15-3373-g571d0450b294af66338c911c5205b4cbf20902ad
Author: Eric Botcazou 
Date:   Tue Aug 20 17:40:41 2024 +0200

ada: Diagnose too large size clause on floating-point type

The problem is that the size clause changes the floating-point format used
for the type, but it must not when this format is the widest format that is
supported in hardware on the target.  Instead a padding type must be built
and the associated warning given.

gcc/ada/

* gcc-interface/decl.cc (gnat_to_gnu_entity): Cap the Esize of a
floating-point type to the size of the widest format supported in
hardware if it is explicity defined.

Diff:
---
 gcc/ada/gcc-interface/decl.cc | 4 
 1 file changed, 4 insertions(+)

diff --git a/gcc/ada/gcc-interface/decl.cc b/gcc/ada/gcc-interface/decl.cc
index d7c17238bbc0..398e01521a33 100644
--- a/gcc/ada/gcc-interface/decl.cc
+++ b/gcc/ada/gcc-interface/decl.cc
@@ -521,8 +521,12 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, 
bool definition)
  esize = UI_To_Int (Esize (gnat_entity));
 
  if (IN (kind, Float_Kind))
+#ifdef WIDEST_HARDWARE_FP_SIZE
+   max_esize = fp_prec_to_size (WIDEST_HARDWARE_FP_SIZE);
+#else
max_esize
  = fp_prec_to_size (TYPE_PRECISION (long_double_type_node));
+#endif
  else if (IN (kind, Access_Kind))
max_esize = POINTER_SIZE * 2;
  else

[gcc r15-3374] lto-wrapper: Honor -save-temps for ltrans' makefile

[Tobias Burnus via Gcc-cvs]

https://gcc.gnu.org/g:6640a59fed48ed4e485d4a970f3ca9ed9e908640

commit r15-3374-g6640a59fed48ed4e485d4a970f3ca9ed9e908640
Author: Tobias Burnus 
Date:   Mon Sep 2 10:28:29 2024 +0200

lto-wrapper: Honor -save-temps for ltrans' makefile

gcc/ChangeLog:

* lto-wrapper.cc (run_gcc): Honor -save-temps for
makefile name.

Diff:
---
 gcc/lto-wrapper.cc | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/lto-wrapper.cc b/gcc/lto-wrapper.cc
index 6bfc96590a5a..c07765b37a28 100644
--- a/gcc/lto-wrapper.cc
+++ b/gcc/lto-wrapper.cc
@@ -1994,7 +1994,10 @@ cont:
 
   if (parallel)
{
- makefile = make_temp_file (".mk");
+ if (save_temps)
+   makefile = concat (dumppfx, "ltrans.mk", NULL);
+ else
+   makefile = make_temp_file (".mk");
  mstream = fopen (makefile, "w");
  qsort (ltrans_priorities, nr, sizeof (int) * 2, cmp_priority);
}

[gcc r15-3375] lto/lto.cc: Fix build with not HAVE_WORKING_FORK

[Tobias Burnus via Gcc-cvs]

https://gcc.gnu.org/g:5cbfb3a799bcded1a06897400a09f0efadc1f9e8

commit r15-3375-g5cbfb3a799bcded1a06897400a09f0efadc1f9e8
Author: Tobias Burnus 
Date:   Mon Sep 2 10:29:36 2024 +0200

lto/lto.cc: Fix build with not HAVE_WORKING_FORK

gcc/lto/ChangeLog:

* lto.cc: Add missing HAVE_WORKING_FORK.

Diff:
---
 gcc/lto/lto.cc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/lto/lto.cc b/gcc/lto/lto.cc
index 58ff0c45f577..52dd436fd9a1 100644
--- a/gcc/lto/lto.cc
+++ b/gcc/lto/lto.cc
@@ -62,8 +62,10 @@ along with GCC; see the file COPYING3.  If not see
 /* Number of parallel tasks to run.  */
 static int lto_parallelism;
 
+#ifdef HAVE_WORKING_FORK
 /* Number of active WPA streaming processes.  */
 static int nruns = 0;
+#endif
 
 /* GNU make's jobserver info.  */
 static jobserver_info *jinfo = NULL;

[gcc r15-3376] Rename ASM_INPUT_P to ASM_BASIC_P

[Richard Sandiford via Gcc-cvs]

https://gcc.gnu.org/g:a4b6c6ab0ba04a4fa409608a860067770317d0de

commit r15-3376-ga4b6c6ab0ba04a4fa409608a860067770317d0de
Author: Richard Sandiford 
Date:   Mon Sep 2 09:56:56 2024 +0100

Rename ASM_INPUT_P to ASM_BASIC_P

ASM_INPUT_P is so named because it causes the eventual rtl insn
pattern to be a top-level ASM_INPUT rather than an ASM_OPERANDS.
However, this name has caused confusion, partly due to earlier
documentation.  The name also sounds related to ASM_INPUTS but
is for a different piece of state.

This patch renames it to ASM_BASIC_P, with the inverse meaning
an extended asm.  ("Basic asm" is the term used in extend.texi.)

gcc/
* doc/generic.texi (ASM_BASIC_P): Document.
* tree.h (ASM_INPUT_P): Rename to...
(ASM_BASIC_P): ...this.
(ASM_VOLATILE_P, ASM_INLINE_P): Reindent.
* gimplify.cc (gimplify_asm_expr): Update after above renaming.
* tree-core.h (tree_base): Likewise.

gcc/c/
* c-typeck.cc (build_asm_expr): Rename ASM_INPUT_P to ASM_BASIC_P.

gcc/cp/
* pt.cc (tsubst_stmt): Rename ASM_INPUT_P to ASM_BASIC_P.
* parser.cc (cp_parser_asm_definition): Likewise.

gcc/d/
* toir.cc (IRVisitor): Rename ASM_INPUT_P to ASM_BASIC_P.

gcc/jit/
* jit-playback.cc (playback::block::add_extended_asm):  Rename
ASM_INPUT_P to ASM_BASIC_P.

gcc/m2/
* gm2-gcc/m2block.cc (flush_pending_note): Rename ASM_INPUT_P
to ASM_BASIC_P.
* gm2-gcc/m2statement.cc (m2statement_BuildAsm): Likewise.

Diff:
---
 gcc/c/c-typeck.cc |  2 +-
 gcc/cp/parser.cc  |  2 +-
 gcc/cp/pt.cc  |  2 +-
 gcc/d/toir.cc |  5 ++---
 gcc/doc/generic.texi  | 16 +++-
 gcc/gimplify.cc   |  2 +-
 gcc/jit/jit-playback.cc   |  2 +-
 gcc/m2/gm2-gcc/m2block.cc |  2 +-
 gcc/m2/gm2-gcc/m2statement.cc |  2 +-
 gcc/tree-core.h   |  2 +-
 gcc/tree.h|  6 +++---
 11 files changed, 24 insertions(+), 19 deletions(-)

diff --git a/gcc/c/c-typeck.cc b/gcc/c/c-typeck.cc
index 094e41fa2021..58b2724b39e3 100644
--- a/gcc/c/c-typeck.cc
+++ b/gcc/c/c-typeck.cc
@@ -11672,7 +11672,7 @@ build_asm_expr (location_t loc, tree string, tree 
outputs, tree inputs,
 
   /* asm statements without outputs, including simple ones, are treated
  as volatile.  */
-  ASM_INPUT_P (args) = simple;
+  ASM_BASIC_P (args) = simple;
   ASM_VOLATILE_P (args) = (noutputs == 0);
   ASM_INLINE_P (args) = is_inline;
 
diff --git a/gcc/cp/parser.cc b/gcc/cp/parser.cc
index 632d3dc5ecf4..edfa5a494405 100644
--- a/gcc/cp/parser.cc
+++ b/gcc/cp/parser.cc
@@ -23143,7 +23143,7 @@ cp_parser_asm_definition (cp_parser* parser)
  if (TREE_CODE (temp) == CLEANUP_POINT_EXPR)
temp = TREE_OPERAND (temp, 0);
 
- ASM_INPUT_P (temp) = 1;
+ ASM_BASIC_P (temp) = 1;
}
}
   else
diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index 9e0f0486ffbc..024fa8a55290 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -18930,7 +18930,7 @@ tsubst_stmt (tree t, tree args, tsubst_flags_t 
complain, tree in_decl)
tree asm_expr = tmp;
if (TREE_CODE (asm_expr) == CLEANUP_POINT_EXPR)
  asm_expr = TREE_OPERAND (asm_expr, 0);
-   ASM_INPUT_P (asm_expr) = ASM_INPUT_P (t);
+   ASM_BASIC_P (asm_expr) = ASM_BASIC_P (t);
   }
   break;
 
diff --git a/gcc/d/toir.cc b/gcc/d/toir.cc
index 9f5531ce5cdf..a6848f2ffa2c 100644
--- a/gcc/d/toir.cc
+++ b/gcc/d/toir.cc
@@ -1491,10 +1491,9 @@ public:
   outputs, inputs, clobbers, labels);
 SET_EXPR_LOCATION (exp, make_location_t (s->loc));
 
-/* If the extended syntax was not used, mark the ASM_EXPR as being an
-   ASM_INPUT expression instead of an ASM_OPERAND with no operands.  */
+/* Record whether the basic rather than extended syntax was used.  */
 if (s->args == NULL && s->clobbers == NULL)
-  ASM_INPUT_P (exp) = 1;
+  ASM_BASIC_P (exp) = 1;
 
 /* All asm statements are assumed to have a side effect.  As a future
optimization, this could be unset when building in release mode.  */
diff --git a/gcc/doc/generic.texi b/gcc/doc/generic.texi
index c596b7d44b21..3de394fd6e0a 100644
--- a/gcc/doc/generic.texi
+++ b/gcc/doc/generic.texi
@@ -2095,11 +2095,17 @@ asm ("fsinx %1,%0" : "=f" (result) : "f" (angle));
 @end smallexample
 The first string is the @code{ASM_STRING}, containing the instruction
 template.  The next two strings are the output and inputs, respectively;
-this statement has no clobbers.  As this example indicates, ``plain''
-assembly statements are merely a special case of extended assembly
-statements; they have no cv-qualifiers, outputs, inputs, or clobbers.
-All of the strings will be @code{NUL}-terminated, and will contain no
-embed

[gcc r15-3377] Rename gimple_asm_input_p to gimple_asm_basic_p

[Richard Sandiford via Gcc-cvs]

https://gcc.gnu.org/g:2865719efb16e9f199b332fcf06d69c98928738e

commit r15-3377-g2865719efb16e9f199b332fcf06d69c98928738e
Author: Richard Sandiford 
Date:   Mon Sep 2 09:56:56 2024 +0100

Rename gimple_asm_input_p to gimple_asm_basic_p

Following on from the earlier tree rename, this patch renames
gimple_asm_input_p to gimple_asm_basic_p, and similarly for
related names.

gcc/
* doc/gimple.texi (gimple_asm_basic_p): Document.
(gimple_asm_set_basic): Likewise.
* gimple.h (GF_ASM_INPUT): Rename to...
(GF_ASM_BASIC): ...this.
(gimple_asm_set_input): Rename to...
(gimple_asm_set_basic): ...this.
(gimple_asm_input_p): Rename to...
(gimple_asm_basic_p): ...this.
* cfgexpand.cc (expand_asm_stmt): Update after above renaming.
* gimple.cc (gimple_asm_clobbers_memory_p): Likewise.
* gimplify.cc (gimplify_asm_expr): Likewise.
* ipa-icf-gimple.cc (func_checker::compare_gimple_asm): Likewise.
* tree-cfg.cc (stmt_can_terminate_bb_p): Likewise.

Diff:
---
 gcc/cfgexpand.cc  |  2 +-
 gcc/doc/gimple.texi   |  9 +
 gcc/gimple.cc |  2 +-
 gcc/gimple.h  | 19 ++-
 gcc/gimplify.cc   |  2 +-
 gcc/ipa-icf-gimple.cc |  2 +-
 gcc/tree-cfg.cc   |  2 +-
 7 files changed, 24 insertions(+), 14 deletions(-)

diff --git a/gcc/cfgexpand.cc b/gcc/cfgexpand.cc
index 13f8c08d295a..f32cf1b20c9a 100644
--- a/gcc/cfgexpand.cc
+++ b/gcc/cfgexpand.cc
@@ -3121,7 +3121,7 @@ expand_asm_stmt (gasm *stmt)
 
   location_t locus = gimple_location (stmt);
 
-  if (gimple_asm_input_p (stmt))
+  if (gimple_asm_basic_p (stmt))
 {
   const char *s = gimple_asm_string (stmt);
   tree string = build_string (strlen (s), s);
diff --git a/gcc/doc/gimple.texi b/gcc/doc/gimple.texi
index 5f241b1c64f4..d8aaca260493 100644
--- a/gcc/doc/gimple.texi
+++ b/gcc/doc/gimple.texi
@@ -1112,6 +1112,15 @@ Return the string representing the assembly instruction 
in
 @code{GIMPLE_ASM} @code{G}.
 @end deftypefn
 
+@deftypefn {GIMPLE function} bool gimple_asm_basic_p (const gasm *g)
+Return true if @code{G} is a basic asm rather than an extended asm.
+@end deftypefn
+
+@deftypefn {GIMPLE function} void gimple_asm_set_basic (gasm *g, bool basic_p)
+Mark asm statement @code{G} as a basic asm or an extended asm based on
+@code{BASIC_P}.
+@end deftypefn
+
 @deftypefn {GIMPLE function} bool gimple_asm_volatile_p (const gasm *g)
 Return true if @code{G} is an asm statement marked volatile.
 @end deftypefn
diff --git a/gcc/gimple.cc b/gcc/gimple.cc
index a9f968cb0389..6e28cf291e16 100644
--- a/gcc/gimple.cc
+++ b/gcc/gimple.cc
@@ -2944,7 +2944,7 @@ gimple_asm_clobbers_memory_p (const gasm *stmt)
 }
 
   /* Non-empty basic ASM implicitly clobbers memory.  */
-  if (gimple_asm_input_p (stmt) && strlen (gimple_asm_string (stmt)) != 0)
+  if (gimple_asm_basic_p (stmt) && strlen (gimple_asm_string (stmt)) != 0)
 return true;
 
   return false;
diff --git a/gcc/gimple.h b/gcc/gimple.h
index bd315ffc2dd4..ee986eaf1539 100644
--- a/gcc/gimple.h
+++ b/gcc/gimple.h
@@ -135,7 +135,7 @@ enum gimple_rhs_class
 
Keep this list sorted.  */
 enum gf_mask {
-GF_ASM_INPUT   = 1 << 0,
+GF_ASM_BASIC   = 1 << 0,
 GF_ASM_VOLATILE= 1 << 1,
 GF_ASM_INLINE  = 1 << 2,
 GF_CALL_FROM_THUNK = 1 << 0,
@@ -4227,24 +4227,25 @@ gimple_asm_set_inline (gasm *asm_stmt, bool inline_p)
 }
 
 
-/* If INPUT_P is true, mark asm ASM_STMT as an ASM_INPUT.  */
+/* Mark whether asm ASM_STMT is a basic asm or an extended asm, based on
+   BASIC_P.  */
 
 inline void
-gimple_asm_set_input (gasm *asm_stmt, bool input_p)
+gimple_asm_set_basic (gasm *asm_stmt, bool basic_p)
 {
-  if (input_p)
-asm_stmt->subcode |= GF_ASM_INPUT;
+  if (basic_p)
+asm_stmt->subcode |= GF_ASM_BASIC;
   else
-asm_stmt->subcode &= ~GF_ASM_INPUT;
+asm_stmt->subcode &= ~GF_ASM_BASIC;
 }
 
 
-/* Return true if asm ASM_STMT is an ASM_INPUT.  */
+/* Return true if asm ASM_STMT is a basic asm rather than an extended asm.  */
 
 inline bool
-gimple_asm_input_p (const gasm *asm_stmt)
+gimple_asm_basic_p (const gasm *asm_stmt)
 {
-  return (asm_stmt->subcode & GF_ASM_INPUT) != 0;
+  return (asm_stmt->subcode & GF_ASM_BASIC) != 0;
 }
 
 
diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc
index f0edb4f7edd9..9300138aa0c7 100644
--- a/gcc/gimplify.cc
+++ b/gcc/gimplify.cc
@@ -7352,7 +7352,7 @@ gimplify_asm_expr (tree *expr_p, gimple_seq *pre_p, 
gimple_seq *post_p)
   ASM_VOLATILE_P (expr)
   || noutputs == 0
   || labels);
-  gimple_asm_set_input (stmt, ASM_BASIC_P (expr));
+  gimple_asm_set_basic (stmt, ASM_BASIC_P (expr));
   gimple_asm_set_inline (stmt, ASM_INLINE_P (expr));
 
   gimplify_seq_add_stmt (pre_p, stmt);
diff --git

[gcc r15-3378] testsuite: Rename scanltranstree.exp -> scanltrans.exp

[Alex Coplan via Gcc-cvs]

https://gcc.gnu.org/g:e4d3e7f9add34216f4baffd3124bcb22a82c39bf

commit r15-3378-ge4d3e7f9add34216f4baffd3124bcb22a82c39bf
Author: Alex Coplan 
Date:   Wed Aug 28 14:53:11 2024 +0100

testsuite: Rename scanltranstree.exp -> scanltrans.exp

Since r15-3254-g3f51f0dc88ec21c1ec79df694200f10ef85915f4
added scan-ltrans-rtl* variants to scanltranstree.exp, it no longer
makes sense to have "tree" in the name.  This renames the file
accordingly and updates users.

libatomic/ChangeLog:

* testsuite/lib/libatomic.exp: Load scanltrans.exp instead of
scanltranstree.exp.

libgomp/ChangeLog:

* testsuite/lib/libgomp.exp: Load scanltrans.exp instead of
scanltranstree.exp.

libitm/ChangeLog:

* testsuite/lib/libitm.exp: Load scanltrans.exp instead of
scanltranstree.exp.

libphobos/ChangeLog:

* testsuite/lib/libphobos-dg.exp: Load scanltrans.exp instead of
scanltranstree.exp.

libvtv/ChangeLog:

* testsuite/lib/libvtv.exp: Load scanltrans.exp instead of
scanltranstree.exp.

gcc/testsuite/ChangeLog:

* gcc.dg-selftests/dg-final.exp: Load scanltrans.exp instead of
scanltranstree.exp.
* lib/gcc-dg.exp: Likewise.
* lib/scanltranstree.exp: Rename to ...
* lib/scanltrans.exp: ... this.

Diff:
---
 gcc/testsuite/gcc.dg-selftests/dg-final.exp  | 2 +-
 gcc/testsuite/lib/gcc-dg.exp | 2 +-
 gcc/testsuite/lib/{scanltranstree.exp => scanltrans.exp} | 0
 libatomic/testsuite/lib/libatomic.exp| 2 +-
 libgomp/testsuite/lib/libgomp.exp| 2 +-
 libitm/testsuite/lib/libitm.exp  | 2 +-
 libphobos/testsuite/lib/libphobos-dg.exp | 2 +-
 libvtv/testsuite/lib/libvtv.exp  | 2 +-
 8 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/gcc/testsuite/gcc.dg-selftests/dg-final.exp 
b/gcc/testsuite/gcc.dg-selftests/dg-final.exp
index 6b6f32e0510c..5503b0c09114 100644
--- a/gcc/testsuite/gcc.dg-selftests/dg-final.exp
+++ b/gcc/testsuite/gcc.dg-selftests/dg-final.exp
@@ -23,7 +23,7 @@ load_lib "scanlang.exp"
 load_lib "lto.exp"
 load_lib "scanasm.exp"
 load_lib "scanwpaipa.exp"
-load_lib "scanltranstree.exp"
+load_lib "scanltrans.exp"
 load_lib "scanoffloadtree.exp"
 load_lib "scanoffloadrtl.exp"
 load_lib "gcc-dg.exp"
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index 992062103c12..d9513e2859ce 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -21,7 +21,7 @@ load_lib target-supports-dg.exp
 load_lib scanasm.exp
 load_lib scanrtl.exp
 load_lib scantree.exp
-load_lib scanltranstree.exp
+load_lib scanltrans.exp
 load_lib scanipa.exp
 load_lib scanwpaipa.exp
 load_lib scanlang.exp
diff --git a/gcc/testsuite/lib/scanltranstree.exp 
b/gcc/testsuite/lib/scanltrans.exp
similarity index 100%
rename from gcc/testsuite/lib/scanltranstree.exp
rename to gcc/testsuite/lib/scanltrans.exp
diff --git a/libatomic/testsuite/lib/libatomic.exp 
b/libatomic/testsuite/lib/libatomic.exp
index ed6ba806732f..642530557f78 100644
--- a/libatomic/testsuite/lib/libatomic.exp
+++ b/libatomic/testsuite/lib/libatomic.exp
@@ -38,7 +38,7 @@ load_gcc_lib scanlang.exp
 load_gcc_lib scanrtl.exp
 load_gcc_lib scansarif.exp
 load_gcc_lib scantree.exp
-load_gcc_lib scanltranstree.exp
+load_gcc_lib scanltrans.exp
 load_gcc_lib scanipa.exp
 load_gcc_lib scanwpaipa.exp
 load_gcc_lib multiline.exp
diff --git a/libgomp/testsuite/lib/libgomp.exp 
b/libgomp/testsuite/lib/libgomp.exp
index 7c1092629168..2d0339b5e565 100644
--- a/libgomp/testsuite/lib/libgomp.exp
+++ b/libgomp/testsuite/lib/libgomp.exp
@@ -31,7 +31,7 @@ load_gcc_lib scanlang.exp
 load_gcc_lib scanrtl.exp
 load_gcc_lib scansarif.exp
 load_gcc_lib scantree.exp
-load_gcc_lib scanltranstree.exp
+load_gcc_lib scanltrans.exp
 load_gcc_lib scanoffload.exp
 load_gcc_lib scanoffloadipa.exp
 load_gcc_lib scanoffloadtree.exp
diff --git a/libitm/testsuite/lib/libitm.exp b/libitm/testsuite/lib/libitm.exp
index 3e60797c3e31..0182234a24ab 100644
--- a/libitm/testsuite/lib/libitm.exp
+++ b/libitm/testsuite/lib/libitm.exp
@@ -44,7 +44,7 @@ load_gcc_lib scanlang.exp
 load_gcc_lib scanrtl.exp
 load_gcc_lib scansarif.exp
 load_gcc_lib scantree.exp
-load_gcc_lib scanltranstree.exp
+load_gcc_lib scanltrans.exp
 load_gcc_lib scanipa.exp
 load_gcc_lib scanwpaipa.exp
 load_gcc_lib timeout-dg.exp
diff --git a/libphobos/testsuite/lib/libphobos-dg.exp 
b/libphobos/testsuite/lib/libphobos-dg.exp
index 965ff025a04d..90bc02ef5e5e 100644
--- a/libphobos/testsuite/lib/libphobos-dg.exp
+++ b/libphobos/testsuite/lib/libphobos-dg.exp
@@ -17,7 +17,7 @@
 load_gcc_lib multiline.exp
 load_gcc_lib prune.exp
 load_gcc_lib scandump.exp
-load_gcc_lib scanltranstree.exp
+load_gcc_lib scanltrans.exp
 lo

[gcc r15-3379] libsupc++: Fix handling of m68k extended real in

[Andreas Schwab via Libstdc++-cvs]

https://gcc.gnu.org/g:4bf758b212170dba2b5a1881950e949ec4f8a58b

commit r15-3379-g4bf758b212170dba2b5a1881950e949ec4f8a58b
Author: Andreas Schwab 
Date:   Mon Sep 2 10:43:20 2024 +0200

libsupc++: Fix handling of m68k extended real in 

PR libstdc++/116513
* libsupc++/compare (_S_fp_bits) [__fmt == _M68k_80bit]: Shift
padding out of exponent word.

Diff:
---
 libstdc++-v3/libsupc++/compare | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/libstdc++-v3/libsupc++/compare b/libstdc++-v3/libsupc++/compare
index 686aa6d218fe..63ad6b5c23e9 100644
--- a/libstdc++-v3/libsupc++/compare
+++ b/libstdc++-v3/libsupc++/compare
@@ -838,7 +838,7 @@ namespace std _GLIBCXX_VISIBILITY(default)
  using enum _Fp_fmt;
 #endif
  constexpr auto __fmt = _S_fp_fmt<_Tp>();
- if constexpr (__fmt == _X86_80bit || __fmt == _M68k_80bit)
+ if constexpr (__fmt == _X86_80bit)
{
  if constexpr (sizeof(_Tp) == 3 * sizeof(int32_t))
{
@@ -851,6 +851,11 @@ namespace std _GLIBCXX_VISIBILITY(default)
  return _Int(__ival._M_hi, __ival._M_lo);
}
}
+ else if constexpr (__fmt == _M68k_80bit)
+   {
+ auto __ival = __builtin_bit_cast(_Int, __val);
+ return _Int(__ival._M_hi >> 16, __ival._M_lo);
+   }
  else if constexpr (sizeof(_Tp) == 2 * sizeof(int64_t))
{
 #if __SIZEOF_INT128__

[gcc r15-3380] PR modula2/116557 Remove physical address from the GPL header comment

[Gaius Mulley via Gcc-cvs]

https://gcc.gnu.org/g:78dc2e2575c602c62d50a9522ea976020a5bf7aa

commit r15-3380-g78dc2e2575c602c62d50a9522ea976020a5bf7aa
Author: Gaius Mulley 
Date:   Mon Sep 2 13:29:25 2024 +0100

PR modula2/116557 Remove physical address from the GPL header comment

This patch removes the physical address from all the header comments
in the m2 subdirectory.  The physical address is replaced with the
text "You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
." instead.

gcc/m2/ChangeLog:

PR modula2/116557
* gm2-lang.cc: Replace physical address with URL in GPL header.
* gm2-lang.h: Ditto.
* images/LICENSE.IMG: Ditto.
* m2-tree.def: Ditto.
* mc-boot/GIndexing.cc: Ditto.
* mc-boot/Gkeyc.cc: Ditto.
* mc-boot/Glists.cc: Ditto.
* mc-boot/GmcComp.cc: Ditto.
* mc-boot/GmcDebug.cc: Ditto.
* mc-boot/GmcFileName.cc: Ditto.
* mc-boot/GmcMetaError.cc: Ditto.
* mc-boot/GmcOptions.cc: Ditto.
* mc-boot/GmcPreprocess.cc: Ditto.
* mc-boot/GmcPretty.cc: Ditto.
* mc-boot/GmcPrintf.cc: Ditto.
* mc-boot/GmcQuiet.cc: Ditto.
* mc-boot/GmcReserved.cc: Ditto.
* mc-boot/GmcSearch.cc: Ditto.
* mc-boot/GmcStack.cc: Ditto.
* mc/Indexing.mod: Ditto.
* mc/keyc.mod: Ditto.
* mc/lists.mod: Ditto.
* mc/mcComp.mod: Ditto.
* mc/mcDebug.mod: Ditto.
* mc/mcFileName.mod: Ditto.
* mc/mcMetaError.mod: Ditto.
* mc/mcOptions.mod: Ditto.
* mc/mcPreprocess.mod: Ditto.
* mc/mcPretty.mod: Ditto.
* mc/mcPrintf.mod: Ditto.
* mc/mcQuiet.mod: Ditto.
* mc/mcReserved.mod: Ditto.
* mc/mcSearch.mod: Ditto.
* mc/mcStack.mod: Ditto.
* tools-src/buildpg: Ditto.
* tools-src/calcpath: Ditto.
* tools-src/checkmeta.py: Ditto.
* tools-src/def2doc.py: Ditto.
* tools-src/makeSystem: Ditto.
* tools-src/tidydates.py: Ditto.

Signed-off-by: Gaius Mulley 

Diff:
---
 gcc/m2/gm2-lang.cc  | 5 ++---
 gcc/m2/gm2-lang.h   | 6 +++---
 gcc/m2/images/LICENSE.IMG   | 5 ++---
 gcc/m2/m2-tree.def  | 5 ++---
 gcc/m2/mc-boot/GIndexing.cc | 9 -
 gcc/m2/mc-boot/Gkeyc.cc | 7 +++
 gcc/m2/mc-boot/Glists.cc| 7 +++
 gcc/m2/mc-boot/GmcComp.cc   | 6 +++---
 gcc/m2/mc-boot/GmcDebug.cc  | 6 +++---
 gcc/m2/mc-boot/GmcFileName.cc   | 6 +++---
 gcc/m2/mc-boot/GmcMetaError.cc  | 8 
 gcc/m2/mc-boot/GmcOptions.cc| 7 +++
 gcc/m2/mc-boot/GmcPreprocess.cc | 6 +++---
 gcc/m2/mc-boot/GmcPretty.cc | 9 -
 gcc/m2/mc-boot/GmcPrintf.cc | 6 +++---
 gcc/m2/mc-boot/GmcQuiet.cc  | 6 +++---
 gcc/m2/mc-boot/GmcReserved.cc   | 7 +++
 gcc/m2/mc-boot/GmcSearch.cc | 6 +++---
 gcc/m2/mc-boot/GmcStack.cc  | 7 +++
 gcc/m2/mc/Indexing.mod  | 7 +++
 gcc/m2/mc/keyc.mod  | 7 +++
 gcc/m2/mc/lists.mod | 7 +++
 gcc/m2/mc/mcComp.mod| 6 +++---
 gcc/m2/mc/mcDebug.mod   | 6 +++---
 gcc/m2/mc/mcFileName.mod| 6 +++---
 gcc/m2/mc/mcMetaError.mod   | 6 +++---
 gcc/m2/mc/mcOptions.mod | 7 +++
 gcc/m2/mc/mcPreprocess.mod  | 6 +++---
 gcc/m2/mc/mcPretty.mod  | 7 +++
 gcc/m2/mc/mcPrintf.mod  | 6 +++---
 gcc/m2/mc/mcQuiet.mod   | 6 +++---
 gcc/m2/mc/mcReserved.mod| 7 +++
 gcc/m2/mc/mcSearch.mod  | 6 +++---
 gcc/m2/mc/mcStack.mod   | 7 +++
 gcc/m2/tools-src/buildpg| 5 ++---
 gcc/m2/tools-src/calcpath   | 6 +++---
 gcc/m2/tools-src/checkmeta.py   | 5 ++---
 gcc/m2/tools-src/def2doc.py | 5 ++---
 gcc/m2/tools-src/makeSystem | 6 +++---
 gcc/m2/tools-src/tidydates.py   | 5 ++---
 40 files changed, 116 insertions(+), 137 deletions(-)

diff --git a/gcc/m2/gm2-lang.cc b/gcc/m2/gm2-lang.cc
index b3c3c017cc96..ac5d0890f91d 100644
--- a/gcc/m2/gm2-lang.cc
+++ b/gcc/m2/gm2-lang.cc
@@ -16,9 +16,8 @@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the 
GNU
 General Public License for more details.
 
 You should have received a copy of the GNU General Public License
-along with GNU Modula-2; see the file COPYING.  If not, write to the
-Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
-02110-1301, USA.  */
+along with GCC; see the file COPYING3.  If not see
+.  */
 
 #define INCLUDE_VECTOR
 #include "gm2-gcc/gcc-consolidation.h"
diff --git a/gcc/m2/gm2-lang.h b/gcc/m2/gm2-lang.h
index 224ea99dea6f..4ba46c924484 100644
--- a/gcc/m2/gm2-lang.h
+++ b/gcc/m2/gm2-lang.h
@@ -15,9 +15,9 @@ MERCHA

[gcc r15-3381] amdgcn: remove gfx803 "Fiji" support

[Andrew Stubbs via Gcc-cvs]

https://gcc.gnu.org/g:57af0022073f11bc300709b3717069f6d616c6ac

commit r15-3381-g57af0022073f11bc300709b3717069f6d616c6ac
Author: Andrew Stubbs 
Date:   Mon Aug 5 15:14:17 2024 +

amdgcn: remove gfx803 "Fiji" support

The gfx803 "Fiji" device was deprecated in GCC 14, removed from LLVM 18, and
hasn't worked properly with the drivers since about ROCm 4.

This patch removes the device from GCC options and documentation, and 
removes
the direct mentions from the internals.

The TARGET_GCN3 support in the back-end is now unused and can be removed 
(in a
follow-up patch).

gcc/ChangeLog:

* config.gcc (amdgcn-*-*): Remove "fiji" from with_arch checks.
* config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): Remove fiji alternative.
(NO_XNACK): Likewise.
(NO_SRAM_ECC): Likewise.
(ASM_SPEC): Remove "%{}" around ABI_VERSION_SPEC.
* config/gcn/gcn-opts.h (enum processor_type): Remove 
PROCESSOR_FIJI.
(TARGET_FIJI): Delete.
* config/gcn/gcn.cc (gcn_option_override): Remove Fiji.
(gcn_omp_device_kind_arch_isa): Likewise.
(output_file_start): Likewise.
* config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Likewise.
* config/gcn/gcn.opt (gpu_type): Likewise.
(march, mtune): Change default to PROCESSOR_VEGA10.
* config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX803): Delete.
(copy_early_debug_info): Remove elf_flags_actual.
Use ELFABIVERSION_AMDGPU_HSA_V4 unconditionally.
(get_arch): Remove Fiji.
(main): Remove gfx803.
* config/gcn/t-omp-device
(omp-device-properties-gcn): Remove fiji and gfx803.
* doc/install.texi (amdgcn*-*-*): Remove fiji and special 
instructions.
* doc/invoke.texi: Remove fiji.

libgomp/ChangeLog:

* libgomp.texi: Remove fiji and gfx803.
* testsuite/libgomp.c/declare-variant-4.h: Remove fiji and gfx803.
* testsuite/libgomp.c/declare-variant-4-fiji.c: Removed.
* testsuite/libgomp.c/declare-variant-4-gfx803.c: Removed.

Diff:
---
 gcc/config.gcc|  2 +-
 gcc/config/gcn/gcn-hsa.h  | 13 +
 gcc/config/gcn/gcn-opts.h |  2 --
 gcc/config/gcn/gcn.cc | 19 ---
 gcc/config/gcn/gcn.h  |  7 +--
 gcc/config/gcn/gcn.opt|  7 ++-
 gcc/config/gcn/mkoffload.cc   | 17 +++--
 gcc/config/gcn/t-omp-device   |  2 +-
 gcc/doc/install.texi  |  8 +---
 gcc/doc/invoke.texi   |  5 -
 libgomp/libgomp.texi  |  3 +--
 libgomp/testsuite/libgomp.c/declare-variant-4-fiji.c  | 11 ---
 .../testsuite/libgomp.c/declare-variant-4-gfx803.c| 10 --
 libgomp/testsuite/libgomp.c/declare-variant-4.h   | 12 
 14 files changed, 19 insertions(+), 99 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 08291f4b6e07..f09ce9f63a01 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4618,7 +4618,7 @@ case "${target}" in
for which in arch tune; do
eval "val=\$with_$which"
case ${val} in
-   "" | fiji | gfx900 | gfx906 | gfx908 | gfx90a | gfx90c 
| gfx1030 | gfx1036 | gfx1100 | gfx1103)
+   "" | gfx900 | gfx906 | gfx908 | gfx90a | gfx90c | 
gfx1030 | gfx1036 | gfx1100 | gfx1103)
# OK
;;
*)
diff --git a/gcc/config/gcn/gcn-hsa.h b/gcc/config/gcn/gcn-hsa.h
index 032205550755..7a1bfad49cad 100644
--- a/gcc/config/gcn/gcn-hsa.h
+++ b/gcc/config/gcn/gcn-hsa.h
@@ -79,21 +79,18 @@ extern unsigned int gcn_local_sym_hash (const char *name);
default; however, when debugging symbols are turned on, mkoffload.cc
writes a new AMD GPU object file and the ABI version needs to be the
same. - LLVM <= 17 defaults to 4 while LLVM >= 18 defaults to 5.
-   GCC supports LLVM >= 13.0.1 and only LLVM >= 14 supports version 5.
-   Note that Fiji is only supported with LLVM <= 17 as version 3 is no longer
-   supported in LLVM >= 18.  */
-#define ABI_VERSION_SPEC "march=fiji:--amdhsa-code-object-version=3;" \
-"!march=*|march=*:--amdhsa-code-object-version=4"
+   GCC supports LLVM >= 13.0.1 and only LLVM >= 14 supports version 5.  */
+#define ABI_VERSION_SPEC "--amdhsa-code-object-version=4"
 
 /* Note that the XNACK and SRAM-ECC settings must match those in mkoffload.cc
as the latter creates new ELF object file when debugging is enabled and
the ELF flags (e_flags) 

[gcc r15-3382] amdgcn: Remove TARGET_GCN3

[Andrew Stubbs via Gcc-cvs]

https://gcc.gnu.org/g:023641d97c5139bfcf8d468442a4e9782e90a467

commit r15-3382-g023641d97c5139bfcf8d468442a4e9782e90a467
Author: Andrew Stubbs 
Date:   Tue Aug 6 15:37:36 2024 +

amdgcn: Remove TARGET_GCN3

The only GCN3 ISA device was remove (Fiji, gfx803) so all the GCN3-specific
code and features can be removed from the back-end.

gcc/ChangeLog:

* config/gcn/gcn-opts.h (enum gcn_isa): Delete ISA_GCN3.
(TARGET_GCN3): Delete.
(TARGET_GCN3_PLUS): Delete.
(TARGET_M0_LDS_LIMIT): Delete.
* config/gcn/gcn-valu.md
(gather_insn_1offset): Remove TARGET_GCN3 from 
conditions.
(*_dpp_shr_): Likewise.
* config/gcn/gcn.cc (enum gcn_isa): Change default to ISA_GCN5.
(gcn_expand_prologue): Remove TARGET_M0_LDS_LIMIT feature.
(gcn_expand_reduc_scalar): Remove TARGET_GCN3 conditions.
* config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Remove TARGET_GCN3.

Diff:
---
 gcc/config/gcn/gcn-opts.h  |  6 --
 gcc/config/gcn/gcn-valu.md | 12 
 gcc/config/gcn/gcn.cc  | 16 ++--
 gcc/config/gcn/gcn.h   |  4 +---
 4 files changed, 7 insertions(+), 31 deletions(-)

diff --git a/gcc/config/gcn/gcn-opts.h b/gcc/config/gcn/gcn-opts.h
index a896a80cd0a0..6f5969d7bc8d 100644
--- a/gcc/config/gcn/gcn-opts.h
+++ b/gcc/config/gcn/gcn-opts.h
@@ -44,7 +44,6 @@ enum processor_type
 /* Set in gcn_option_override.  */
 extern enum gcn_isa {
   ISA_UNKNOWN,
-  ISA_GCN3,
   ISA_GCN5,
   ISA_RDNA2,
   ISA_RDNA3,
@@ -52,8 +51,6 @@ extern enum gcn_isa {
   ISA_CDNA2
 } gcn_isa;
 
-#define TARGET_GCN3 (gcn_isa == ISA_GCN3)
-#define TARGET_GCN3_PLUS (gcn_isa >= ISA_GCN3)
 #define TARGET_GCN5 (gcn_isa == ISA_GCN5)
 #define TARGET_GCN5_PLUS (gcn_isa >= ISA_GCN5)
 #define TARGET_CDNA1 (gcn_isa == ISA_CDNA1)
@@ -65,7 +62,6 @@ extern enum gcn_isa {
 #define TARGET_RDNA3 (gcn_isa == ISA_RDNA3)
 
 
-#define TARGET_M0_LDS_LIMIT (TARGET_GCN3)
 #define TARGET_PACKED_WORK_ITEMS (TARGET_CDNA2_PLUS || TARGET_RDNA3)
 
 #define TARGET_XNACK (flag_xnack != HSACO_ATTR_OFF)
@@ -92,8 +88,6 @@ enum hsaco_attr_type
 #define TARGET_11BIT_GLOBAL_OFFSET TARGET_RDNA2_PLUS
 /* The work item details are all encoded into v0.  */
 //#define TARGET_PACKED_WORK_ITEMS TARGET_PACKED_WORK_ITEMS
-/* m0 must be initialized in order to use LDS.  */
-//#define TARGET_M0_LDS_LIMIT TARGET_M0_LDS_LIMIT
 /* CDNA2 load/store costs are reduced.
  * TODO: what does this mean?  */
 #define TARGET_CDNA2_MEM_COSTS TARGET_CDNA2_PLUS
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index b24cf9be32ef..54f4b14d4f21 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -1156,10 +1156,9 @@
   (mem:BLK (scratch))]
  UNSPEC_GATHER))]
   "(AS_FLAT_P (INTVAL (operands[3]))
-&& ((TARGET_GCN3 && INTVAL(operands[2]) == 0)
-   || ((unsigned HOST_WIDE_INT)INTVAL(operands[2]) < 0x1000)))
-|| (AS_GLOBAL_P (INTVAL (operands[3]))
-   && (((unsigned HOST_WIDE_INT)INTVAL(operands[2]) + 0x1000) < 0x2000))"
+&& ((unsigned HOST_WIDE_INT)INTVAL(operands[2]) < 0x1000))
+   || (AS_GLOBAL_P (INTVAL (operands[3]))
+   && (((unsigned HOST_WIDE_INT)INTVAL(operands[2]) + 0x1000) < 0x2000))"
   {
 addr_space_t as = INTVAL (operands[3]);
 const char *glc = INTVAL (operands[4]) ? " glc" : "";
@@ -4297,10 +4296,7 @@
   (match_operand:V_1REG 2 "register_operand" "v")
   (match_operand:SI 3 "const_int_operand""n")]
  REDUC_UNSPEC))]
-  ; GCN3 requires a carry out, GCN5 not
-  "!(TARGET_GCN3 && SCALAR_INT_MODE_P (mode)
- &&  == UNSPEC_PLUS_DPP_SHR)
-   && TARGET_DPP_FULL"
+  "TARGET_DPP_FULL"
   {
 return gcn_expand_dpp_shr_insn (mode, "",
, INTVAL (operands[3]));
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index 89aab6fe8e43..fd2b86085749 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -68,7 +68,7 @@ static bool ext_gcn_constants_init = 0;
 
 /* Holds the ISA variant, derived from the command line parameters.  */
 
-enum gcn_isa gcn_isa = ISA_GCN3;   /* Default to GCN3.  */
+enum gcn_isa gcn_isa = ISA_GCN5;   /* Default to GCN5.  */
 
 /* Reserve this much space for LDS (for propagating variables from
worker-single mode to worker-partitioned mode), per workgroup.  Global
@@ -3556,17 +3556,6 @@ gcn_expand_prologue ()
   /* Ensure that the scheduler doesn't do anything unexpected.  */
   emit_insn (gen_blockage ());
 
-  if (TARGET_M0_LDS_LIMIT)
-  {
-/* m0 is initialized for the usual LDS DS and FLAT memory case.
-   The low-part is the address of the topmost addressable byte, which is
-   size-1.  The high-part is an offset and should be zero.  */
-emit_move_insn (gen_rtx_REG (SImode, M0_REG),
-   gen_int_mode (LDS_SIZE, SImode));
-
-emit_insn (gen_prologue_use (gen_rtx_REG (SImode, M0_REG)));
-  }
-
   if (cfun &&

[gcc r15-3383] amdgcn: Remove TARGET_GCN5_PLUS

[Andrew Stubbs via Gcc-cvs]

https://gcc.gnu.org/g:b9bf0c3f54d4e36ca40598600d6e87107204c4c6

commit r15-3383-gb9bf0c3f54d4e36ca40598600d6e87107204c4c6
Author: Andrew Stubbs 
Date:   Tue Aug 6 16:00:21 2024 +

amdgcn: Remove TARGET_GCN5_PLUS

Now that GCN3 support is gone, TARGET_GCN5_PLUS always evaluates to true, so
we can make that code unconditional, and remove all the "else" cases.

The ISA features TARGET_GLOBAL_ADDRSPACE, TARGET_FLAT_OFFSETS,
TARGET_EXPLICIT_CARRY, and TARGET_MULTIPLY_IMMEDIATE, are similarly also
redundant and can be made unconditional.

The naming of the "gcc_version" attribute has been confusing since the 
"rdna"
attribute was added and this makes it worse, so it has been renamed to 
"cdna".

The add-with-carry assembler mnemonics no longer have two forms, so '%^' 
can be
removed.

gcc/ChangeLog:

* config/gcn/gcn-opts.h (TARGET_GCN5_PLUS): Delete.
(TARGET_GLOBAL_ADDRSPACE): Delete.
(TARGET_FLAT_OFFSETS): Delete.
(TARGET_EXPLICIT_CARRY): Delete.
(TARGET_MULTIPLY_IMMEDIATE): Delete.
* config/gcn/gcn-valu.md (*mov): Rename "gcn_version" to 
"cdna".
(*mov_4reg): Likewise.
(@mov_sgprbase): Likwise.
(gather_insn_1offset): Likewise.
(gather_insn_1offset_ds): Likewise.
(gather_insn_2offsets): Likewise.
(scatter_insn_1offset): Likewise.
(scatter_insn_1offset_ds): Likewise.
(scatter_insn_2offsets): Likewise.
(gather_insn_1offset): Remove TARGET_FLAT_OFFSETS
conditionals.
(scatter_insn_1offset): Likewise.
(scatter_insn_1offset): Likewise.
(add3): Use "_co" instead of "%^".
(add3_dup): Likewise.
(add3_vcc): Likewise.
(add3_vcc_dup): Likewise.
(addc3): Likewise.
(sub3): Likewise.
(sub3_vcc): Likewise.
(subc3): Likewise.
(*plus_carry_dpp_shr_): Likewise.
(*plus_carry_in_dpp_shr_): Likewise.
* config/gcn/gcn.cc (gcn_flat_address_p): Remove TARGET_FLAT_OFFSETS
conditionals.
(gcn_addr_space_legitimate_address_p): Likewise.
(gcn_addr_space_legitimize_address): Likewise.
(gcn_expand_scalar_to_vector_address): Likewise.
(print_operand_address): Likewise, and TARGET_GLOBAL_ADDRSPACE also.
(print_operand): Remove "%^" operand code.
Remove TARGET_GLOBAL_ADDRSPACE assertion.
* config/gcn/gcn.h (STACK_ADDR_SPACE): Remove GCN5 conditional.
* config/gcn/gcn.md (gcn_version): Rename attribute ...
(cdna): ... to this, and remove the gcn3 and gcn5 values.
(enabled): Replace old "gcn_version" logic with new "cdna" logic.
(*mov_insn): Rename "gcn_version" to "cdna".
(*movti_insn): Likewise.
(addsi3): Use "_co" instead of "%^".
(addsi3_scalar_carry): Likewise.
(addsi3_scalar_carry_cst): Likewise.
(addcsi3_scalar): Likewise.
(addcsi3_scalar_zero): Likewise.
(addptrdi3): Likewise.
(subsi3): Likewise.
(mulsi3_highpart): Remove TARGET_MULTIPLY_IMMEDIATE conditions.
(mulsi3_highpart_reg): Remove "gcn_version" attribute.
(muldi3): Likewise.
(atomic_fetch_): Likewise.
(atomic_): Likewise.
(sync_compare_and_swap_insn): Likewise.
(atomic_load): Likewise.
(atomic_store): Likewise.
(atomic_exchange): Likewise.
(mulsi3_highpart_imm): Remove both TARGET_MULTIPLY_IMMEDIATE and
"gcn_version".
(mulsidi3): Likewise.
(mulsidi3_imm): Likewise.

Diff:
---
 gcc/config/gcn/gcn-opts.h  |  9 --
 gcc/config/gcn/gcn-valu.md | 72 +++-
 gcc/config/gcn/gcn.cc  | 36 +++---
 gcc/config/gcn/gcn.h   |  3 +-
 gcc/config/gcn/gcn.md  | 74 +++---
 5 files changed, 59 insertions(+), 135 deletions(-)

diff --git a/gcc/config/gcn/gcn-opts.h b/gcc/config/gcn/gcn-opts.h
index 6f5969d7bc8d..76f50ab9364f 100644
--- a/gcc/config/gcn/gcn-opts.h
+++ b/gcc/config/gcn/gcn-opts.h
@@ -52,7 +52,6 @@ extern enum gcn_isa {
 } gcn_isa;
 
 #define TARGET_GCN5 (gcn_isa == ISA_GCN5)
-#define TARGET_GCN5_PLUS (gcn_isa >= ISA_GCN5)
 #define TARGET_CDNA1 (gcn_isa == ISA_CDNA1)
 #define TARGET_CDNA1_PLUS (gcn_isa >= ISA_CDNA1)
 #define TARGET_CDNA2 (gcn_isa == ISA_CDNA2)
@@ -74,16 +73,12 @@ enum hsaco_attr_type
   HSACO_ATTR_DEFAULT
 };
 
-/* There are global address instructions.  */
-#define TARGET_GLOBAL_ADDRSPACE TARGET_GCN5_PLUS
 /* Device has an AVGPR register file.  */
 #define TARGET_AVGPRS TARGET_CDNA1_PLUS
 /* There are load/store instructions for AVGPRS.  */
 #define TARGET_AVGPR_

[gcc r15-3384] [testsuite] add linkonly to dg-additional-sources [PR115295]

[Alexandre Oliva via Gcc-cvs]

https://gcc.gnu.org/g:9223d1715918e4e8e7a59471b228f815b4a3467c

commit r15-3384-g9223d1715918e4e8e7a59471b228f815b4a3467c
Author: Alexandre Oliva 
Date:   Mon Sep 2 11:31:51 2024 -0300

[testsuite] add linkonly to dg-additional-sources [PR115295]

The D testsuite shows it was a mistake to assume that
dg-additional-sources are never to be used for compilation tests.
Even if an output file is specified for compilation, extra module
files can be named and used in the compilation without being flagged
as errors.

Introduce a 'linkonly' flag for dg-additional-sources, and use it in
pr95401.cc and other vector tests that default to run, so that its
additional sources get discarded when vector tests downgrade to
compile-only.  This reverts previous workarounds for this very
circumstance, that relied on being able to run vector tests anyway,
even after failing to detect runtime or hardware vector support.


for  gcc/ChangeLog

PR d/115295
* doc/sourcebuild.texi (dg-additional-sources): Add linkonly.

for  gcc/testsuite/ChangeLog

PR d/115295
* g++.dg/vect/pr95401.cc: Add linkonly to dg-additional-sources.
* g++.dg/vect/pr68762-1.cc: Likewise.
* g++.dg/vect/simd-clone-3.cc: Likewise.
* g++.dg/vect/simd-clone-5.cc: Likewise.
* gcc.dg/vect/vect-simd-clone-10.c: Likewise.  Drop dg-do run.
* gcc.dg/vect/vect-simd-clone-12.c: Likewise.  Likewise.
* lib/gcc-defs.exp (additional_sources_omit_on_compile): New.
(dg-additional-sources): Add to it on linkonly.
(dg-additional-files-options): Omit select sources on compile.

Diff:
---
 gcc/doc/sourcebuild.texi   |  9 ---
 gcc/testsuite/g++.dg/vect/pr68762-1.cc |  2 +-
 gcc/testsuite/g++.dg/vect/pr95401.cc   |  2 +-
 gcc/testsuite/g++.dg/vect/simd-clone-3.cc  |  2 +-
 gcc/testsuite/g++.dg/vect/simd-clone-5.cc  |  2 +-
 gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c |  4 +--
 gcc/testsuite/gcc.dg/vect/vect-simd-clone-12.c |  4 +--
 gcc/testsuite/lib/gcc-defs.exp | 35 --
 8 files changed, 39 insertions(+), 21 deletions(-)

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 0636fc0567c5..7c7094dc5a92 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1328,15 +1328,16 @@ to @var{var_value} before execution of the program 
created by the test.
 Specify additional files, other than source files, that must be copied
 to the system where the compiler runs.
 
-@item @{ dg-additional-sources "@var{filelist}" [@{ target @var{selector} @}] 
@}
+@item @{ dg-additional-sources "@var{filelist}" [@{ \[linkonly\] \[target 
@var{selector}\] @}] @}
 Specify additional source files to appear in the compile line
 following the main test file.
 If the directive includes the optional @samp{@{ @var{selector} @}}
 then the additional sources are only added if the target system
 matches the @var{selector}.
-Additional sources are generally used only in @samp{link} and @samp{run}
-tests; they are reported as unsupported and discarded in other kinds of
-tests that direct the compiler to output to a single file.
+If @samp{linkonly} is specified, additional sources are used only in
+@samp{link} and @samp{run} tests; they are reported as unsupported and
+discarded in other kinds of tests that direct the compiler to output to
+a single file.
 @end table
 
 @subsubsection Add checks at the end of a test
diff --git a/gcc/testsuite/g++.dg/vect/pr68762-1.cc 
b/gcc/testsuite/g++.dg/vect/pr68762-1.cc
index 118a301ab90d..53cc6e4c6dfa 100644
--- a/gcc/testsuite/g++.dg/vect/pr68762-1.cc
+++ b/gcc/testsuite/g++.dg/vect/pr68762-1.cc
@@ -2,7 +2,7 @@
 // { dg-require-effective-target vect_simd_clones }
 // { dg-additional-options "-fopenmp-simd -fno-inline" }
 // { dg-additional-options "-mavx" { target avx_runtime } }
-// { dg-additional-sources "pr68762-2.cc" }
+// { dg-additional-sources "pr68762-2.cc" linkonly }
 
 #include "pr68762.h"
 
diff --git a/gcc/testsuite/g++.dg/vect/pr95401.cc 
b/gcc/testsuite/g++.dg/vect/pr95401.cc
index 6a56dab09572..8b1be4f24252 100644
--- a/gcc/testsuite/g++.dg/vect/pr95401.cc
+++ b/gcc/testsuite/g++.dg/vect/pr95401.cc
@@ -1,5 +1,5 @@
 // { dg-additional-options "-mavx2 -O3" { target avx2_runtime } }
-// { dg-additional-sources pr95401a.cc }
+// { dg-additional-sources pr95401a.cc linkonly }
 
 extern int var_9;
 extern unsigned var_14;
diff --git a/gcc/testsuite/g++.dg/vect/simd-clone-3.cc 
b/gcc/testsuite/g++.dg/vect/simd-clone-3.cc
index 1057a7eb5f6a..4dd9d15d1a3b 100644
--- a/gcc/testsuite/g++.dg/vect/simd-clone-3.cc
+++ b/gcc/testsuite/g++.dg/vect/simd-clone-3.cc
@@ -1,7 +1,7 @@
 // { dg-require-effective-target vect_simd_clones }
 // { dg-additional-options "-fopenmp-simd -fno-inline" }
 // { dg-additional-options "-mavx" { target 

[gcc r15-3385] [libstdc++] [testsuite] avoid async.cc loss of precision [PR91486]

[Alexandre Oliva via Libstdc++-cvs]

https://gcc.gnu.org/g:410061b15a9b0a464c851173fa568e49c85570dc

commit r15-3385-g410061b15a9b0a464c851173fa568e49c85570dc
Author: Alexandre Oliva 
Date:   Mon Sep 2 11:31:59 2024 -0300

[libstdc++] [testsuite] avoid async.cc loss of precision [PR91486]

When we get to test_pr91486_wait_until(), we're about 10s past the
float_steady_clock epoch.  This is enough for the 1s delta for the
timeout to come out slightly lower when the futex-less wait_until
converts the deadline from float_steady_clock to __clock_t.  So we may
wake up a little too early, and end up looping one extra time to sleep
for e.g. another 954ns until we hit the deadline.

Each iteration calls float_steady_clock::now(), bumping the call_count
that we VERIFY() at the end of the subtest.  Since we expect at most 3
calls, and we're going to have at the very least 3 on futex-less
targets (one in the test proper, one before wait_until_impl to compute
the deadline, and one after wait_until_impl to check whether the
deadline was hit), any such imprecision that causes an extra iteration
will reach 5 and cause the test to fail.

Initializing the epoch in the beginning of the test makes such
spurious fails due to loss of precision far less likely.  I don't
suppose allowing for an extra couple of calls would be desirable.

While at that, I'm annotating unused status variables as such.


for  libstdc++-v3/ChangeLog

PR libstdc++/91486
* testsuite/30_threads/async/async.cc
(test_pr91486_wait_for): Mark status as unused.
(test_pr91486_wait_until): Likewise.  Initialize epoch later.

Diff:
---
 libstdc++-v3/testsuite/30_threads/async/async.cc | 19 ---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/libstdc++-v3/testsuite/30_threads/async/async.cc 
b/libstdc++-v3/testsuite/30_threads/async/async.cc
index 3b157ed9c568..2474d318d7b1 100644
--- a/libstdc++-v3/testsuite/30_threads/async/async.cc
+++ b/libstdc++-v3/testsuite/30_threads/async/async.cc
@@ -173,7 +173,7 @@ void test_pr91486_wait_for()
 
   std::chrono::duration const wait_time = std::chrono::seconds(1);
   auto const start_steady = chrono::steady_clock::now();
-  auto status = f1.wait_for(wait_time);
+  auto status __attribute__ ((__unused__)) = f1.wait_for(wait_time);
   auto const elapsed_steady = chrono::steady_clock::now() - start_steady;
 
   VERIFY( elapsed_steady >= std::chrono::seconds(1) );
@@ -209,7 +209,7 @@ struct float_steady_clock
   }
 };
 
-chrono::steady_clock::time_point float_steady_clock::epoch = 
chrono::steady_clock::now();
+chrono::steady_clock::time_point float_steady_clock::epoch;
 int float_steady_clock::call_count = 0;
 
 void test_pr91486_wait_until()
@@ -218,6 +218,19 @@ void test_pr91486_wait_until()
   std::this_thread::sleep_for(std::chrono::seconds(1));
 });
 
+  // When we don't _GLIBCXX_HAVE_LINUX_FUTEX, we use
+  // condition_variables, whose wait_until converts times using
+  // deltas, and if too much time has elapsed since we set the epoch
+  // during program initialization, say if the other tests took over
+  // 8s and we're unlucky with the numbers, we may lose enough
+  // precision from the 1s delta that we don't sleep until the
+  // deadline, and then we may loop more times than expected.  Each
+  // iteration will recompute the wait time from deadline -
+  // float_steady_clock::now(), and each such computation will bump
+  // float_steady_clock::call_count, so the call_count check below
+  // will fail spuriously.  Setting the epoch just before running this
+  // test makes this failure mode far less likely.
+  float_steady_clock::epoch = chrono::steady_clock::now();
   float_steady_clock::time_point const now = float_steady_clock::now();
 
   std::chrono::duration const wait_time = std::chrono::seconds(1);
@@ -225,7 +238,7 @@ void test_pr91486_wait_until()
   VERIFY( expire > now );
 
   auto const start_steady = chrono::steady_clock::now();
-  auto status = f1.wait_until(expire);
+  auto status __attribute__ ((__unused__)) = f1.wait_until(expire);
   auto const elapsed_steady = chrono::steady_clock::now() - start_steady;
 
   // This checks that we didn't come back too soon

[gcc r15-3386] [libstdc++-v3] [testsuite] improve future/*/poll.cc calibration

[Alexandre Oliva via Libstdc++-cvs]

https://gcc.gnu.org/g:af1500dd8c00df4541f7aa393ab7cf57db18241b

commit r15-3386-gaf1500dd8c00df4541f7aa393ab7cf57db18241b
Author: Alexandre Oliva 
Date:   Mon Sep 2 11:32:03 2024 -0300

[libstdc++-v3] [testsuite] improve future/*/poll.cc calibration

30_threads/future/members/poll.cc has calibration code that, on
systems with very low clock resolution, may spuriously fail to run.
Even when it does run, low resolution and reasonable
timeouts limit severely the viability of increasing the loop counts so
as to reduce measurement noise, so we end up with very noisy results.

On various vxworks targets, high iteration count (low-noise)
measurements confirmed that some of the operations that we expected to
be up to 100x slower than the fastest ones can run a little slower
than that and, with significant noise, may seem to be even slower,
comparatively.

Bump the factors up to 200x, so that we have plenty of margin over
measured results.


for  libstdc++-v3/ChangeLog

* testsuite/30_threads/future/members/poll.cc: Factor out
calibration, and run it unconditionally.  Lower its
strictness.  Bump wait_until_*'s slowness factor.

Diff:
---
 .../testsuite/30_threads/future/members/poll.cc| 111 +
 1 file changed, 70 insertions(+), 41 deletions(-)

diff --git a/libstdc++-v3/testsuite/30_threads/future/members/poll.cc 
b/libstdc++-v3/testsuite/30_threads/future/members/poll.cc
index 2bdbe7a48ce5..6b7062c61cfd 100644
--- a/libstdc++-v3/testsuite/30_threads/future/members/poll.cc
+++ b/libstdc++-v3/testsuite/30_threads/future/members/poll.cc
@@ -41,52 +41,75 @@ print(const char* desc, Duration dur)
   return d;
 }
 
+static void
+calibrate()
+{
+  /* After set_value, wait_for is faster, so use that for the
+ calibration loops to avoid zero at low clock resultions.  */
+  promise p = {};
+  future f = p.get_future();
+  p.set_value(1);
+
+  auto start = chrono::high_resolution_clock::now();
+  auto stop = start;
+  /* Loop until the clock advances, so that start is right after a
+ time increment.  */
+  do
+stop = chrono::high_resolution_clock::now();
+  while (start == stop);
+
+  /* This approximates the smallest time increment we may expect to be
+ able to measure.  It doesn't have to be very precise, just a
+ ballpart of the right magnitude.  */
+  auto tick = stop - start;
+
+  int i = 0;
+  start = stop;
+  /* Now until the clock advances again, so that stop is right
+ after another time increment.  */
+  do
+{
+  f.wait_for(chrono::seconds(0));
+  stop = chrono::high_resolution_clock::now();
+  i++;
+}
+  while (start == stop);
+
+  /* Aim for some 10 ticks.  This won't be quite right if now() takes
+ up a significant portion of the loop time, but we'll measure
+ without that and adjust in the loop below.  */
+  if (iterations < i * 10)
+iterations = i * 10;
+
+  /* We aim for some 10 ticks for the loop that's expected to be fastest,
+ but even if we don't get quite that many, we're still fine.  */
+  iterations /= 2;
+  do
+{
+  iterations *= 2;
+  start = chrono::high_resolution_clock::now();
+  for(int i = 0; i < iterations; i++)
+   f.wait_for(chrono::seconds(0));
+  stop = chrono::high_resolution_clock::now();
+}
+  while (stop - start < 5 * tick);
+}
+
 int main()
 {
+  /* First, calibrate the iteration count so that we don't get any of
+ the actual measurement loops to complete in less than the clock
+ granularity.  */
+  calibrate ();
+
   promise p;
   future f = p.get_future();
 
- start_over:
   auto start = chrono::high_resolution_clock::now();
   for(int i = 0; i < iterations; i++)
 f.wait_for(chrono::seconds(0));
   auto stop = chrono::high_resolution_clock::now();
 
-  /* We've run too few iterations for the clock resolution.
- Attempt to calibrate it.  */
-  if (start == stop)
-{
-  /* After set_value, wait_for is faster, so use that for the
-calibration to avoid zero at low clock resultions.  */
-  promise pc;
-  future fc = pc.get_future();
-  pc.set_value(1);
-
-  /* Loop until the clock advances, so that start is right after a
-time increment.  */
-  do
-   start = chrono::high_resolution_clock::now();
-  while (start == stop);
-  int i = 0;
-  /* Now until the clock advances again, so that stop is right
-after another time increment.  */
-  do
-   {
- fc.wait_for(chrono::seconds(0));
- stop = chrono::high_resolution_clock::now();
- i++;
-   }
-  while (start == stop);
-  /* Go for some 10 cycles, but if we're already past that and
-still get into the calibration loop, double the iteration
-count and try again.  */
-  if (iterations < i * 10)
-   iterations = i * 10;
-  else
-   iterations *= 2;
-  goto start_ove

[gcc r15-3388] MIPS: Support vector reduc for MSA

[YunQiang Su via Gcc-cvs]

https://gcc.gnu.org/g:f4f72f9b6bcdec8b2ba20a58a241c8d9d631480c

commit r15-3388-gf4f72f9b6bcdec8b2ba20a58a241c8d9d631480c
Author: YunQiang Su 
Date:   Mon Aug 26 08:45:36 2024 +0800

MIPS: Support vector reduc for MSA

We have SHF.fmt and HADD_S/U.fmt with MSA, which can be used for
vector reduc.

For min/max for U8/S8, we can
SHF.B W1, W0, 0xb1  # swap byte inner every half
MIN.B W1, W1, W0
SHF.H W2, W1, 0xb1  # swap half inner every word
MIN.B W2, W2, W1
SHF.W W3, W2, 0xb1  # swap word inner every doubleword
MIN.B W4, W3, W2
SHF.W W4, W4, 0x4e  # swap the two doubleword
MIN.B W4, W4, W3

For plus of S8/U8, we can use HADD
HADD.H  W0, W0, W0
HADD.W  W0, W0, W0
HADD.D  W0, W0, W0
SHF.W   W1, W0, 0x4e  # swap the two doubleword
ADDV.D  W1, W1, W0
COPY_S.B  T0, W1  # COPY_U.B for U8

We can do similar for S16/U16/S32/U32/S64/U64/FLOAT/DOUBLE.

gcc

* config/mips/mips-msa.md: (MSA_NO_HADD): we have HADD for
S8/U8/S16/U16/S32/U32 only.
(reduc_smin_scal_): New define pattern.
(reduc_smax_scal_): Ditto.
(reduc_umin_scal_): Ditto.
(reduc_umax_scal_): Ditto.
(reduc_plus_scal_): Ditto.
(reduc_plus_scal_v4si): Ditto.
(reduc_plus_scal_v8hi): Ditto.
(reduc_plus_scal_v16qi): Ditto.
(reduc__scal_): Ditto.
* config/mips/mips-protos.h: New function mips_expand_msa_reduc.
* config/mips/mips.cc: New function mips_expand_msa_reduc.
* config/mips/mips.md: Define any_bitwise iterator.

gcc/testsuite:

* gcc.target/mips/msa-reduc.c: New tests.

Diff:
---
 gcc/config/mips/mips-msa.md   | 128 ++
 gcc/config/mips/mips-protos.h |   1 +
 gcc/config/mips/mips.cc   |  41 ++
 gcc/config/mips/mips.md   |   4 +
 gcc/testsuite/gcc.target/mips/msa-reduc.c | 119 +++
 5 files changed, 293 insertions(+)

diff --git a/gcc/config/mips/mips-msa.md b/gcc/config/mips/mips-msa.md
index 377c63f0d357..976f296402ee 100644
--- a/gcc/config/mips/mips-msa.md
+++ b/gcc/config/mips/mips-msa.md
@@ -125,6 +125,9 @@
 ;; Only floating-point modes.
 (define_mode_iterator FMSA [V2DF V4SF])
 
+;; Only used for reduce_plus_scal: V4SI, V8HI, V16QI have HADD.
+(define_mode_iterator MSA_NO_HADD [V2DF V4SF V2DI])
+
 ;; The attribute gives the integer vector mode with same size.
 (define_mode_attr VIMODE
   [(V2DF "V2DI")
@@ -2802,3 +2805,128 @@
   (set_attr "mode" "TI")
   (set_attr "compact_form" "never")
   (set_attr "branch_likely" "no")])
+
+
+;; Vector reduction operation
+(define_expand "reduc_smin_scal_"
+  [(match_operand: 0 "register_operand")
+   (match_operand:MSA 1 "register_operand")]
+  "ISA_HAS_MSA"
+{
+  rtx tmp = gen_reg_rtx (mode);
+  mips_expand_msa_reduc (gen_smin3, tmp, operands[1]);
+  emit_insn (gen_vec_extract (operands[0], tmp,
+ const0_rtx));
+  DONE;
+})
+
+(define_expand "reduc_smax_scal_"
+  [(match_operand: 0 "register_operand")
+   (match_operand:MSA 1 "register_operand")]
+  "ISA_HAS_MSA"
+{
+  rtx tmp = gen_reg_rtx (mode);
+  mips_expand_msa_reduc (gen_smax3, tmp, operands[1]);
+  emit_insn (gen_vec_extract (operands[0], tmp,
+ const0_rtx));
+  DONE;
+})
+
+(define_expand "reduc_umin_scal_"
+  [(match_operand: 0 "register_operand")
+   (match_operand:IMSA 1 "register_operand")]
+  "ISA_HAS_MSA"
+{
+  rtx tmp = gen_reg_rtx (mode);
+  mips_expand_msa_reduc (gen_umin3, tmp, operands[1]);
+  emit_insn (gen_vec_extract (operands[0], tmp,
+ const0_rtx));
+  DONE;
+})
+
+(define_expand "reduc_umax_scal_"
+  [(match_operand: 0 "register_operand")
+   (match_operand:IMSA 1 "register_operand")]
+  "ISA_HAS_MSA"
+{
+  rtx tmp = gen_reg_rtx (mode);
+  mips_expand_msa_reduc (gen_umax3, tmp, operands[1]);
+  emit_insn (gen_vec_extract (operands[0], tmp,
+ const0_rtx));
+  DONE;
+})
+
+(define_expand "reduc_plus_scal_"
+  [(match_operand: 0 "register_operand")
+   (match_operand:MSA_NO_HADD 1 "register_operand")]
+  "ISA_HAS_MSA"
+{
+  rtx tmp = gen_reg_rtx (mode);
+  mips_expand_msa_reduc (gen_add3, tmp, operands[1]);
+  emit_insn (gen_vec_extract (operands[0], tmp,
+ const0_rtx));
+  DONE;
+})
+
+(define_expand "reduc_plus_scal_v4si"
+  [(match_operand:SI 0 "register_operand")
+   (match_operand:V4SI 1 "register_operand")]
+  "ISA_HAS_MSA"
+{
+  rtx tmp = gen_reg_rtx (SImode);
+  rtx tmp1 = gen_reg_rtx (V2DImode);
+  emit_insn (gen_msa_hadd_s_d (tmp1, operands[1], operands[1]));
+  emit_insn (gen_vec_extrac

[gcc r15-3387] testsuite: Fix optimize_one.c FAIL on i686-linux

[Jakub Jelinek via Gcc-cvs]

https://gcc.gnu.org/g:b64980b0776c8e061696832e74e300e3c720

commit r15-3387-gb64980b0776c8e061696832e74e300e3c720
Author: Jakub Jelinek 
Date:   Mon Sep 2 20:14:49 2024 +0200

testsuite: Fix optimize_one.c FAIL on i686-linux

The test FAILs on i686-linux because -mfpmath=sse is used without
-msse2 being enabled.

2024-09-02  Jakub Jelinek  

* gcc.target/i386/optimize_one.c: Add -msse2 to dg-options.

Diff:
---
 gcc/testsuite/gcc.target/i386/optimize_one.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/i386/optimize_one.c 
b/gcc/testsuite/gcc.target/i386/optimize_one.c
index 62728d3c5ba4..3a682ed4028f 100644
--- a/gcc/testsuite/gcc.target/i386/optimize_one.c
+++ b/gcc/testsuite/gcc.target/i386/optimize_one.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -mfpmath=sse" } */
+/* { dg-options "-O2 -mfpmath=sse -msse2" } */
 /* { dg-final { scan-assembler-times "comi" 1 } } */
 /* { dg-final { scan-assembler-times "set" 1 } } */

[gcc/aoliva/heads/testbase] (58 commits) [libstdc++-v3] [testsuite] improve future/*/poll.cc calibra

[Alexandre Oliva via Gcc-cvs]

The branch 'aoliva/heads/testbase' was updated to point to:

 af1500dd8c00... [libstdc++-v3] [testsuite] improve future/*/poll.cc calibra

It previously pointed to:

 673a448aa24e... Optimize initialization of small padded objects

Diff:

Summary of changes (added commits):
---

  af1500d... [libstdc++-v3] [testsuite] improve future/*/poll.cc calibra (*)
  410061b... [libstdc++] [testsuite] avoid async.cc loss of precision [P (*)
  9223d17... [testsuite] add linkonly to dg-additional-sources [PR115295 (*)
  b9bf0c3... amdgcn: Remove TARGET_GCN5_PLUS (*)
  023641d... amdgcn: Remove TARGET_GCN3 (*)
  57af002... amdgcn: remove gfx803 "Fiji" support (*)
  78dc2e2... PR modula2/116557 Remove physical address from the GPL head (*)
  4bf758b... libsupc++: Fix handling of m68k extended real in  (*)
  e4d3e7f... testsuite: Rename scanltranstree.exp -> scanltrans.exp (*)
  2865719... Rename gimple_asm_input_p to gimple_asm_basic_p (*)
  a4b6c6a... Rename ASM_INPUT_P to ASM_BASIC_P (*)
  5cbfb3a... lto/lto.cc: Fix build with not HAVE_WORKING_FORK (*)
  6640a59... lto-wrapper: Honor -save-temps for ltrans' makefile (*)
  571d045... ada: Diagnose too large size clause on floating-point type (*)
  1c9a6d8... ada: Create usage entry for -gnatw_l (*)
  2df253f... ada: Fix standard output stream for gnatcmd output (*)
  91f0a3a... ada: Fix minor issues in -gnaty0's documentation (*)
  a004c28... ada: Documentation for generic type inference (*)
  34437eb... ada: Small fixes for FreeBSD (*)
  cb690aa... ada: Also reset scope for some nested declaration (*)
  905ab32... ada: Cleanup expansion of object declarations (*)
  78acc6d... ada: Remove repeated guards in validity checks (*)
  25d51fb... ranger: Fix up range computation for CLZ [PR116486] (*)
  9aaedfc... load and store-lanes with SLP (*)
  464067a... lower SLP load permutation to interleaving (*)
  eca320b... [PATCH] RISC-V: Optimize the cost of the DFmode register mo (*)
  0562976... [committed][PR rtl-optimization/116544] Fix test for promot (*)
  f77435a... i386: Support vec_cmp for V8BF/V16BF/V32BF in AVX10.2 (*)
  e19f65b... i386: Support vectorized BF16 sqrt with AVX10.2 instruction (*)
  29ef601... i386: Support vectorized BF16 smaxmin with AVX10.2 instruct (*)
  6d294fb... i386: Support vectorized BF16 FMA with AVX10.2 instructions (*)
  f82fa0d... i386: Support vectorized BF16 add/sub/mul/div with AVX10.2  (*)
  3b1dece... i386: Optimize generate insn for AVX10.2 compare (*)
  86f5031... i386: Optimize ordered and nonequal (*)
  b1f9fbb... i386: Auto vectorize sdot_prod, usdot_prod, udot_prod with  (*)
  5239902... RISC-V: Add testcases for unsigned scalar quad and oct .SAT (*)
  ea81e21... RISC-V: Add testcases for unsigned scalar quad and oct .SAT (*)
  56ed1df... RISC-V: Add testcases for form 4 of unsigned vector .SAT_AD (*)
  72f3e90... RISC-V: Add testcases for form 3 of unsigned vector .SAT_AD (*)
  e96d4bf... RISC-V: Refactor gen zero_extend rtx for SAT_* when expand  (*)
  880834d... Daily bump. (*)
  592a335... slsr: Use simple_dce_from_worklist in SLSR [PR116554] (*)
  f22788c... testsuite: Prune compilation messages for modules tests (*)
  49fd9b3... Daily bump. (*)
  bac00c3... i386: Support read-modify-write memory operands in STV. (*)
  2ac27bd... libobjc: Add cast to void* to disable warning for casting b (*)
  df89afb... AVR: Run pass avr-fuse-add a second time after pass_cprop_h (*)
  60fc550... AVR: Tidy pass avr-fuse-add. (*)
  7f27d1f... testsuite, c++, coroutines: Avoid 'unused' warnings [NFC]. (*)
  2c27189... testsuite, c++, coroutines: Correct a test intent. (*)
  049a927... c++, coroutines: Make and use a frame access helper. (*)
  b7e9f36... hppa: Enable PA 2.0 symbolic operands on ELF32 targets (*)
  ceda727... phiopt: Ignore some nop statements in heursics [PR116098] (*)
  457805c... testsuite: Change what is being tested for pr66726-2.c (*)
  79b5b50... Fortran: downgrade use associated namelist group name to le (*)
  afd9558... c++: Add unsequenced C++ testcase (*)
  dd346b6... c: Add support for unsequenced and reproducible attributes (*)
  dc476e5... AVR: Don't print a space after , when printing instructions (*)

(*) This commit already exists in another branch.
Because the reference `refs/users/aoliva/heads/testbase' matches
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[gcc/aoliva/heads/testme] (60 commits) more hostedlib notes

[Alexandre Oliva via Gcc-cvs]

The branch 'aoliva/heads/testme' was updated to point to:

 07051d45ce80... more hostedlib notes

It previously pointed to:

 62b70aa09f1c... testsuite: introduce hostedlib effective target

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  62b70aa... testsuite: introduce hostedlib effective target


Summary of changes (added commits):
---

  07051d4... more hostedlib notes
  9abd783... testsuite: introduce hostedlib effective target
  af1500d... [libstdc++-v3] [testsuite] improve future/*/poll.cc calibra (*)
  410061b... [libstdc++] [testsuite] avoid async.cc loss of precision [P (*)
  9223d17... [testsuite] add linkonly to dg-additional-sources [PR115295 (*)
  b9bf0c3... amdgcn: Remove TARGET_GCN5_PLUS (*)
  023641d... amdgcn: Remove TARGET_GCN3 (*)
  57af002... amdgcn: remove gfx803 "Fiji" support (*)
  78dc2e2... PR modula2/116557 Remove physical address from the GPL head (*)
  4bf758b... libsupc++: Fix handling of m68k extended real in  (*)
  e4d3e7f... testsuite: Rename scanltranstree.exp -> scanltrans.exp (*)
  2865719... Rename gimple_asm_input_p to gimple_asm_basic_p (*)
  a4b6c6a... Rename ASM_INPUT_P to ASM_BASIC_P (*)
  5cbfb3a... lto/lto.cc: Fix build with not HAVE_WORKING_FORK (*)
  6640a59... lto-wrapper: Honor -save-temps for ltrans' makefile (*)
  571d045... ada: Diagnose too large size clause on floating-point type (*)
  1c9a6d8... ada: Create usage entry for -gnatw_l (*)
  2df253f... ada: Fix standard output stream for gnatcmd output (*)
  91f0a3a... ada: Fix minor issues in -gnaty0's documentation (*)
  a004c28... ada: Documentation for generic type inference (*)
  34437eb... ada: Small fixes for FreeBSD (*)
  cb690aa... ada: Also reset scope for some nested declaration (*)
  905ab32... ada: Cleanup expansion of object declarations (*)
  78acc6d... ada: Remove repeated guards in validity checks (*)
  25d51fb... ranger: Fix up range computation for CLZ [PR116486] (*)
  9aaedfc... load and store-lanes with SLP (*)
  464067a... lower SLP load permutation to interleaving (*)
  eca320b... [PATCH] RISC-V: Optimize the cost of the DFmode register mo (*)
  0562976... [committed][PR rtl-optimization/116544] Fix test for promot (*)
  f77435a... i386: Support vec_cmp for V8BF/V16BF/V32BF in AVX10.2 (*)
  e19f65b... i386: Support vectorized BF16 sqrt with AVX10.2 instruction (*)
  29ef601... i386: Support vectorized BF16 smaxmin with AVX10.2 instruct (*)
  6d294fb... i386: Support vectorized BF16 FMA with AVX10.2 instructions (*)
  f82fa0d... i386: Support vectorized BF16 add/sub/mul/div with AVX10.2  (*)
  3b1dece... i386: Optimize generate insn for AVX10.2 compare (*)
  86f5031... i386: Optimize ordered and nonequal (*)
  b1f9fbb... i386: Auto vectorize sdot_prod, usdot_prod, udot_prod with  (*)
  5239902... RISC-V: Add testcases for unsigned scalar quad and oct .SAT (*)
  ea81e21... RISC-V: Add testcases for unsigned scalar quad and oct .SAT (*)
  56ed1df... RISC-V: Add testcases for form 4 of unsigned vector .SAT_AD (*)
  72f3e90... RISC-V: Add testcases for form 3 of unsigned vector .SAT_AD (*)
  e96d4bf... RISC-V: Refactor gen zero_extend rtx for SAT_* when expand  (*)
  880834d... Daily bump. (*)
  592a335... slsr: Use simple_dce_from_worklist in SLSR [PR116554] (*)
  f22788c... testsuite: Prune compilation messages for modules tests (*)
  49fd9b3... Daily bump. (*)
  bac00c3... i386: Support read-modify-write memory operands in STV. (*)
  2ac27bd... libobjc: Add cast to void* to disable warning for casting b (*)
  df89afb... AVR: Run pass avr-fuse-add a second time after pass_cprop_h (*)
  60fc550... AVR: Tidy pass avr-fuse-add. (*)
  7f27d1f... testsuite, c++, coroutines: Avoid 'unused' warnings [NFC]. (*)
  2c27189... testsuite, c++, coroutines: Correct a test intent. (*)
  049a927... c++, coroutines: Make and use a frame access helper. (*)
  b7e9f36... hppa: Enable PA 2.0 symbolic operands on ELF32 targets (*)
  ceda727... phiopt: Ignore some nop statements in heursics [PR116098] (*)
  457805c... testsuite: Change what is being tested for pr66726-2.c (*)
  79b5b50... Fortran: downgrade use associated namelist group name to le (*)
  afd9558... c++: Add unsequenced C++ testcase (*)
  dd346b6... c: Add support for unsequenced and reproducible attributes (*)
  dc476e5... AVR: Don't print a space after , when printing instructions (*)

(*) This commit already exists in another branch.
Because the reference `refs/users/aoliva/heads/testme' matches
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no separate email is sent for this commit.

[gcc(refs/users/aoliva/heads/testme)] more hostedlib notes

[Alexandre Oliva via Gcc-cvs]

https://gcc.gnu.org/g:07051d45ce803cf70272fcbfce71828598c1d7c8

commit 07051d45ce803cf70272fcbfce71828598c1d7c8
Author: Alexandre Oliva 
Date:   Sat Aug 31 14:54:41 2024 -0300

more hostedlib notes

Diff:
---
 gcc/testsuite/c-c++-common/goacc/kernels-counter-vars-function-scope.c  | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-2.c   | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-3.c   | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-data-2.c  | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-data-enter-exit-2.c   | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-data-enter-exit.c | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-data-update.c | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-data.c| 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-g.c   | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-mod-not-zero.c| 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop-n.c   | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-loop.c | 1 +
 gcc/testsuite/c-c++-common/goacc/kernels-one-counter-var.c  | 1 +
 .../c-c++-common/goacc/kernels-parallel-loop-data-enter-exit.c  | 1 +
 gcc/testsuite/c-c++-common/gomp/pr103642.c  | 1 +
 gcc/testsuite/c-c++-common/gomp/target-implicit-map-2.c | 2 ++
 gcc/testsuite/c-c++-common/simulate-thread/bitfields-4.c| 1 +
 gcc/testsuite/c-c++-common/tm/malloc.c  | 1 +
 gcc/testsuite/g++.dg/abi/mangle36.C | 1 +
 gcc/testsuite/g++.dg/abi/mangle40.C | 1 +
 gcc/testsuite/g++.dg/abi/mangle41.C | 1 +
 gcc/testsuite/g++.dg/cdce3.C| 1 +
 gcc/testsuite/g++.dg/contracts/contracts-post7.C| 1 +
 gcc/testsuite/g++.dg/contracts/pr110159.C   | 1 +
 gcc/testsuite/g++.dg/contracts/pr115434.C   | 1 +
 .../g++.dg/coroutines/coro-bad-gro-00-class-gro-scalar-return.C | 2 ++
 .../g++.dg/coroutines/coro-bad-gro-01-void-gro-non-class-coro.C | 2 ++
 gcc/testsuite/g++.dg/coroutines/pr110635.C  | 1 +
 gcc/testsuite/g++.dg/coroutines/pr110871.C  | 2 ++
 gcc/testsuite/g++.dg/coroutines/pr110872.C  | 1 +
 gcc/testsuite/g++.dg/coroutines/symmetric-transfer-00-basic.C   | 1 +
 gcc/testsuite/g++.dg/coroutines/torture/co-yield-03-tmpl-nondependent.C | 1 +
 gcc/testsuite/g++.dg/cpp/pr80005.C  | 1 +
 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-std-function.C | 1 +
 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this8.C| 1 +
 gcc/testsuite/g++.dg/cpp0x/pr70887.C| 1 +
 gcc/testsuite/g++.dg/cpp0x/udlit-extended-id-1.C| 2 ++
 gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C | 1 +
 gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic2.C   | 1 +
 gcc/testsuite/g++.dg/cpp1z/constexpr-asm-1.C| 1 +
 gcc/testsuite/g++.dg/cpp1z/constexpr-asm-3.C| 1 +
 gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C | 1 +
 gcc/testsuite/g++.dg/cpp23/ext-floating12.C | 1 +
 gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C | 1 +
 gcc/testsuite/g++.dg/cpp26/constexpr-new2.C | 1 +
 gcc/testsuite/g++.dg/cpp26/constexpr-voidptr1.C | 1 +
 gcc/testsuite/g++.dg/cpp26/feat-cxx26.C | 1 +
 gcc/testsuite/g++.dg/cpp2a/destroying-delete5.C | 1 +
 gcc/testsuite/g++.dg/cpp2a/feat-cxx2a.C | 1 +
 gcc/testsuite/g++.dg/diagnostic/missing-header-pr110164.C   | 1 +
 gcc/testsuite/g++.dg/expr/anew1.C   | 2 ++
 gcc/testsuite/g++.dg/expr/anew2.C   | 2 ++
 gcc/testsuite/g++.dg/expr/anew3.C   | 2 ++
 gcc/testsuite/g++.dg/expr/anew4.C   | 2 ++
 gcc/testsuite/g++.dg/ext/builtin10.C| 1 +
 gcc/testsuite/g++.dg/ext/cleanup-10.C   | 1 +
 gcc/testsuite/g++.dg/ext/cleanup-11.C   | 1 +
 gcc/testsuite/g++.dg/ext/cleanup-5.C| 1 +
 gcc/testsuite/g++.dg/ext/cleanup-8.C| 1 +
 gcc/testsuite/g++.dg/ext/cleanup-9.C| 1 +
 gcc/testsuite/g++.dg/ext/is_invocabl

[gcc/aoliva/heads/testme] more hostedlib notes

[Alexandre Oliva via Gcc-cvs]

The branch 'aoliva/heads/testme' was updated to point to:

 352f61e0d8d1... more hostedlib notes

It previously pointed to:

 07051d45ce80... more hostedlib notes

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  07051d4... more hostedlib notes


Summary of changes (added commits):
---

  352f61e... more hostedlib notes

[gcc/aoliva/heads/testme] more hostedlib notes

[Alexandre Oliva via Gcc-cvs]

The branch 'aoliva/heads/testme' was updated to point to:

 93208984e9f2... more hostedlib notes

It previously pointed to:

 352f61e0d8d1... more hostedlib notes

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  352f61e... more hostedlib notes


Summary of changes (added commits):
---

  9320898... more hostedlib notes

[gcc/aoliva/heads/testme] more hostedlib notes

[Alexandre Oliva via Gcc-cvs]

The branch 'aoliva/heads/testme' was updated to point to:

 4c3d24ebc5a1... more hostedlib notes

It previously pointed to:

 93208984e9f2... more hostedlib notes

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  9320898... more hostedlib notes


Summary of changes (added commits):
---

  4c3d24e... more hostedlib notes

[gcc r13-9001] RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:f364a431d5b44ebde2c20ebe5fff22291c7d12db

commit r13-9001-gf364a431d5b44ebde2c20ebe5fff22291c7d12db
Author: Vineet Gupta 
Date:   Wed Nov 1 14:46:33 2023 -0700

RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls

Fixes: 3496ca4e6566 ("RISC-V: Add runtime invariant support")

riscv_promote_function_mode doesn't promote a SI to DI for libcalls
case. It intends to do that however the code is broken (regression).

The fix is what generic promote_mode () in explow.cc does. I really
don't understand why the old code didn't work, but stepping thru the
debugger shows old code didn't and fixed does.

This showed up when testing Ajit's REE ABI extension series which probes
the ABI (using a NULL tree type) and ends up hitting the libcall code path.

gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
returned for libcall case.

Tested-by: Patrick O'Neill  # pre-commit-CI #526
Signed-off-by: Vineet Gupta 

Diff:
---
 gcc/config/riscv/riscv.cc | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 4501bf78c1e9..ca3eae2abf38 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -6794,9 +6794,10 @@ riscv_promote_function_mode (const_tree type 
ATTRIBUTE_UNUSED,
 return promote_mode (type, mode, punsignedp);
 
   unsignedp = *punsignedp;
-  PROMOTE_MODE (as_a  (mode), unsignedp, type);
+  scalar_mode smode = as_a  (mode);
+  PROMOTE_MODE (smode, unsignedp, type);
   *punsignedp = unsignedp;
-  return mode;
+  return smode;
 }
 
 /* Implement TARGET_MACHINE_DEPENDENT_REORG.  */

[gcc r15-3390] RISC-V: Support form 1 of integer scalar .SAT_ADD

[Pan Li via Gcc-cvs]

https://gcc.gnu.org/g:539fcaae67c6cf54bd377eba6c9d5b1792a3

commit r15-3390-g539fcaae67c6cf54bd377eba6c9d5b1792a3
Author: Pan Li 
Date:   Thu Aug 29 11:25:44 2024 +0800

RISC-V: Support form 1 of integer scalar .SAT_ADD

This patch would like to support the scalar signed ssadd pattern
for the RISC-V backend.  Aka

Form 1:
  #define DEF_SAT_S_ADD_FMT_1(T, UT, MIN, MAX) \
  T __attribute__((noinline))  \
  sat_s_add_##T##_fmt_1 (T x, T y) \
  {\
T sum = (UT)x + (UT)y; \
return (x ^ y) < 0 \
  ? sum\
  : (sum ^ x) >= 0 \
? sum  \
: x < 0 ? MIN : MAX;   \
  }

DEF_SAT_S_ADD_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX)

Before this patch:
  10   │ sat_s_add_int64_t_fmt_1:
  11   │ mv   a5,a0
  12   │ add  a0,a0,a1
  13   │ xor  a1,a5,a1
  14   │ not  a1,a1
  15   │ xor  a4,a5,a0
  16   │ and  a1,a1,a4
  17   │ blt  a1,zero,.L5
  18   │ ret
  19   │ .L5:
  20   │ srai a5,a5,63
  21   │ li   a0,-1
  22   │ srli a0,a0,1
  23   │ xor  a0,a5,a0
  24   │ ret

After this patch:
  10   │ sat_s_add_int64_t_fmt_1:
  11   │ add  a2,a0,a1
  12   │ xor  a1,a0,a1
  13   │ xor  a5,a0,a2
  14   │ srli a5,a5,63
  15   │ srli a1,a1,63
  16   │ xori a1,a1,1
  17   │ and  a5,a5,a1
  18   │ srai a4,a0,63
  19   │ li   a3,-1
  20   │ srli a3,a3,1
  21   │ xor  a3,a3,a4
  22   │ neg  a4,a5
  23   │ and  a3,a3,a4
  24   │ addi a5,a5,-1
  25   │ and  a0,a2,a5
  26   │ or   a0,a0,a3
  27   │ ret

The below test suites are passed for this patch:
1. The rv64gcv fully regression test.

gcc/ChangeLog:

* config/riscv/riscv-protos.h (riscv_expand_ssadd): Add new func
decl for expanding ssadd.
* config/riscv/riscv.cc (riscv_gen_sign_max_cst): Add new func
impl to gen the max int rtx.
(riscv_expand_ssadd): Add new func impl to expand the ssadd.
* config/riscv/riscv.md (ssadd3): Add new pattern for
signed integer .SAT_ADD.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat_arith_data.h: Add test data.
* gcc.target/riscv/sat_s_add-1.c: New test.
* gcc.target/riscv/sat_s_add-2.c: New test.
* gcc.target/riscv/sat_s_add-3.c: New test.
* gcc.target/riscv/sat_s_add-4.c: New test.
* gcc.target/riscv/sat_s_add-run-1.c: New test.
* gcc.target/riscv/sat_s_add-run-2.c: New test.
* gcc.target/riscv/sat_s_add-run-3.c: New test.
* gcc.target/riscv/sat_s_add-run-4.c: New test.
* gcc.target/riscv/scalar_sat_binary_run_xxx.h: New test.

Signed-off-by: Pan Li 

Diff:
---
 gcc/config/riscv/riscv-protos.h|  1 +
 gcc/config/riscv/riscv.cc  | 90 ++
 gcc/config/riscv/riscv.md  | 11 +++
 gcc/testsuite/gcc.target/riscv/sat_arith.h | 17 
 gcc/testsuite/gcc.target/riscv/sat_arith_data.h| 85 
 gcc/testsuite/gcc.target/riscv/sat_s_add-1.c   | 30 
 gcc/testsuite/gcc.target/riscv/sat_s_add-2.c   | 32 
 gcc/testsuite/gcc.target/riscv/sat_s_add-3.c   | 31 
 gcc/testsuite/gcc.target/riscv/sat_s_add-4.c   | 30 
 gcc/testsuite/gcc.target/riscv/sat_s_add-run-1.c   | 16 
 gcc/testsuite/gcc.target/riscv/sat_s_add-run-2.c   | 16 
 gcc/testsuite/gcc.target/riscv/sat_s_add-run-3.c   | 16 
 gcc/testsuite/gcc.target/riscv/sat_s_add-run-4.c   | 16 
 .../gcc.target/riscv/scalar_sat_binary_run_xxx.h   | 26 +++
 14 files changed, 417 insertions(+)

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 926899ccad64..3358e3887b95 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -134,6 +134,7 @@ extern bool
 riscv_zcmp_valid_stack_adj_bytes_p (HOST_WIDE_INT, int);
 extern void riscv_legitimize_poly_move (machine_mode, rtx, rtx, rtx);
 extern void riscv_expand_usadd (rtx, rtx, rtx);
+extern void riscv_expand_ssadd (rtx, rtx, rtx);
 extern void riscv_expand_ussub (rtx, rtx, rtx);
 extern void riscv_expand_ustrunc (rtx, rtx);
 
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index d03e51f3a687..98720611e246 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -12001,6 +12001,96 @@ riscv_expand_us

[gcc r15-3391] i386: Support partial vectorized V2BF/V4BF plus/minus/mult/div/sqrt

[Levy Hsu via Gcc-cvs]

https://gcc.gnu.org/g:8e16f26ca9fad685b9b723da7112ffcc99e81593

commit r15-3391-g8e16f26ca9fad685b9b723da7112ffcc99e81593
Author: Levy Hsu 
Date:   Mon Aug 26 10:46:30 2024 +0930

i386: Support partial vectorized V2BF/V4BF plus/minus/mult/div/sqrt

This patch introduces new mode iterators and expands for the i386 
architecture to support partial vectorization of bf16 operations using AVX10.2 
instructions.

gcc/ChangeLog:

* config/i386/mmx.md (VBF_32_64): New mode iterator for partial 
vectorized V2BF/V4BF.
(3): New define_expand for plusminusmultdiv.
(sqrt2): New define_expand for sqrt.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx10_2-partial-bf-vector-fast-math-1.c: New test.
* gcc.target/i386/avx10_2-partial-bf-vector-operations-1.c: New 
test.

Diff:
---
 gcc/config/i386/mmx.md | 37 ++
 .../i386/avx10_2-partial-bf-vector-fast-math-1.c   | 22 +
 .../i386/avx10_2-partial-bf-vector-operations-1.c  | 57 ++
 3 files changed, 116 insertions(+)

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index cb2697537a81..076ea2e2fb24 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -1958,6 +1958,8 @@
 
 (define_mode_iterator VHF_32_64 [V2HF (V4HF "TARGET_MMX_WITH_SSE")])
 
+(define_mode_iterator VBF_32_64 [V2BF (V4BF "TARGET_MMX_WITH_SSE")])
+
 (define_expand "divv4hf3"
   [(set (match_operand:V4HF 0 "register_operand")
(div:V4HF
@@ -2036,6 +2038,26 @@
   DONE;
 })
 
+;; VDIVNEPBF16 does not generate floating point exceptions.
+(define_expand "3"
+  [(set (match_operand:VBF_32_64 0 "register_operand")
+(plusminusmultdiv:VBF_32_64
+  (match_operand:VBF_32_64 1 "nonimmediate_operand")
+  (match_operand:VBF_32_64 2 "nonimmediate_operand")))]
+  "TARGET_AVX10_2_256"
+{
+  rtx op0 = gen_reg_rtx (V8BFmode);
+  rtx op1 = lowpart_subreg (V8BFmode,
+   force_reg (mode, operands[1]), mode);
+  rtx op2 = lowpart_subreg (V8BFmode,
+   force_reg (mode, operands[2]), mode);
+
+  emit_insn (gen_v8bf3 (op0, op1, op2));
+
+  emit_move_insn (operands[0], lowpart_subreg (mode, op0, V8BFmode));
+  DONE;
+})
+
 (define_expand "divv2hf3"
   [(set (match_operand:V2HF 0 "register_operand")
(div:V2HF
@@ -2091,6 +2113,21 @@
   DONE;
 })
 
+(define_expand "sqrt2"
+  [(set (match_operand:VBF_32_64 0 "register_operand")
+   (sqrt:VBF_32_64 (match_operand:VBF_32_64 1 "vector_operand")))]
+  "TARGET_AVX10_2_256"
+{
+  rtx op0 = gen_reg_rtx (V8BFmode);
+  rtx op1 = lowpart_subreg (V8BFmode,
+   force_reg (mode, operands[1]), mode);
+
+  emit_insn (gen_sqrtv8bf2 (op0, op1));
+
+  emit_move_insn (operands[0], lowpart_subreg (mode, op0, V8BFmode));
+  DONE;
+})
+
 (define_expand "2"
   [(set (match_operand:VHF_32_64 0 "register_operand")
(absneg:VHF_32_64
diff --git 
a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-fast-math-1.c 
b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-fast-math-1.c
new file mode 100644
index ..fd064f17445f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-fast-math-1.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mavx10.2 -O2" } */
+/* { dg-final { scan-assembler-times "vmulnepbf16\[ 
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ 
\\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vrcppbf16\[ 
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
+
+typedef __bf16 v4bf __attribute__ ((__vector_size__ (8)));
+typedef __bf16 v2bf __attribute__ ((__vector_size__ (4)));
+
+
+__attribute__((optimize("fast-math")))
+v4bf
+foo_div_fast_math_4 (v4bf a, v4bf b)
+{
+  return a / b;
+}
+
+__attribute__((optimize("fast-math")))
+v2bf
+foo_div_fast_math_2 (v2bf a, v2bf b)
+{
+  return a / b;
+}
diff --git 
a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-operations-1.c 
b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-operations-1.c
new file mode 100644
index ..e7ee08a20a93
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-operations-1.c
@@ -0,0 +1,57 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mavx10.2 -O2" } */
+/* { dg-final { scan-assembler-times "vmulnepbf16\[ 
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ 
\\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vaddnepbf16\[ 
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ 
\\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vdivnepbf16\[ 
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ 
\\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vsubnepbf16\[ 
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ 
\\t

[gcc r15-3392] i386: Support partial vectorized V2BF/V4BF smaxmin

[Levy Hsu via Gcc-cvs]

https://gcc.gnu.org/g:62df24e50039ae04aa3b940e680cffd9041ef5bf

commit r15-3392-g62df24e50039ae04aa3b940e680cffd9041ef5bf
Author: Levy Hsu 
Date:   Tue Aug 27 14:22:20 2024 +0930

i386: Support partial vectorized V2BF/V4BF smaxmin

This patch supports sminmax for partial vectorized V2BF/V4BF.

gcc/ChangeLog:

* config/i386/mmx.md (3): New define_expand for 
V2BF/V4BFsmaxmin

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx10_2-partial-bf-vector-smaxmin-1.c: New test.

Diff:
---
 gcc/config/i386/mmx.md | 19 
 .../i386/avx10_2-partial-bf-vector-smaxmin-1.c | 36 ++
 2 files changed, 55 insertions(+)

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 076ea2e2fb24..fac90cfd4d4c 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -2098,6 +2098,25 @@
   DONE;
 })
 
+(define_expand "3"
+  [(set (match_operand:VBF_32_64 0 "register_operand")
+(smaxmin:VBF_32_64
+  (match_operand:VBF_32_64 1 "nonimmediate_operand")
+  (match_operand:VBF_32_64 2 "nonimmediate_operand")))]
+  "TARGET_AVX10_2_256"
+{
+  rtx op0 = gen_reg_rtx (V8BFmode);
+  rtx op1 = lowpart_subreg (V8BFmode,
+   force_reg (mode, operands[1]), mode);
+  rtx op2 = lowpart_subreg (V8BFmode,
+   force_reg (mode, operands[2]), mode);
+
+  emit_insn (gen_v8bf3 (op0, op1, op2));
+
+  emit_move_insn (operands[0], lowpart_subreg (mode, op0, V8BFmode));
+  DONE;
+})
+
 (define_expand "sqrt2"
   [(set (match_operand:VHF_32_64 0 "register_operand")
(sqrt:VHF_32_64
diff --git 
a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-smaxmin-1.c 
b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-smaxmin-1.c
new file mode 100644
index ..0a7cc58e29d4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-smaxmin-1.c
@@ -0,0 +1,36 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mavx10.2 -Ofast" } */
+/* /* { dg-final { scan-assembler-times "vmaxpbf16" 2 } } */
+/* /* { dg-final { scan-assembler-times "vminpbf16" 2 } } */
+
+void
+maxpbf16_64 (__bf16* restrict dest, __bf16* restrict src1, __bf16* restrict 
src2)
+{
+  int i;
+  for (i = 0; i < 4; i++)
+dest[i] = src1[i] > src2[i] ? src1[i] : src2[i];
+}
+
+void
+maxpbf16_32 (__bf16* restrict dest, __bf16* restrict src1, __bf16* restrict 
src2)
+{
+  int i;
+  for (i = 0; i < 2; i++)
+dest[i] = src1[i] > src2[i] ? src1[i] : src2[i];
+}
+
+void
+minpbf16_64 (__bf16* restrict dest, __bf16* restrict src1, __bf16* restrict 
src2)
+{
+  int i;
+  for (i = 0; i < 4; i++)
+dest[i] = src1[i] < src2[i] ? src1[i] : src2[i];
+}
+
+void
+minpbf16_32 (__bf16* restrict dest, __bf16* restrict src1, __bf16* restrict 
src2)
+{
+  int i;
+  for (i = 0; i < 2; i++)
+dest[i] = src1[i] < src2[i] ? src1[i] : src2[i];
+}

[gcc r15-3394] Handle mixing REALPART/IMAGPART with other components in SLP groups

[Richard Biener via Gcc-cvs]

https://gcc.gnu.org/g:7c9394e84c54238dd2cf01dfaa06d8e87b39cf95

commit r15-3394-g7c9394e84c54238dd2cf01dfaa06d8e87b39cf95
Author: Richard Biener 
Date:   Mon Sep 2 15:12:58 2024 +0200

Handle mixing REALPART/IMAGPART with other components in SLP groups

The following makes sure we handle a SLP load/store group from
a structure with complex and scalar members.  This for example
happens in gcc.target/i386/pr106010-9a.c.

* tree-vect-slp.cc (vect_build_slp_tree_1): Handle mixing
all of handled components besides ARRAY_RANGE_REF, drop
handling of INDIRECT_REF.

Diff:
---
 gcc/tree-vect-slp.cc | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/gcc/tree-vect-slp.cc b/gcc/tree-vect-slp.cc
index 5a65a99d61ed..2302d91fd23f 100644
--- a/gcc/tree-vect-slp.cc
+++ b/gcc/tree-vect-slp.cc
@@ -1318,13 +1318,15 @@ vect_build_slp_tree_1 (vec_info *vinfo, unsigned char 
*swap,
   && !(STMT_VINFO_GROUPED_ACCESS (stmt_info)
&& (first_stmt_code == ARRAY_REF
|| first_stmt_code == BIT_FIELD_REF
-   || first_stmt_code == INDIRECT_REF
|| first_stmt_code == COMPONENT_REF
+   || first_stmt_code == REALPART_EXPR
+   || first_stmt_code == IMAGPART_EXPR
|| first_stmt_code == MEM_REF)
&& (rhs_code == ARRAY_REF
|| rhs_code == BIT_FIELD_REF
-   || rhs_code == INDIRECT_REF
|| rhs_code == COMPONENT_REF
+   || rhs_code == REALPART_EXPR
+   || rhs_code == IMAGPART_EXPR
|| rhs_code == MEM_REF)))
  || (ldst_p
  && (STMT_VINFO_GROUPED_ACCESS (stmt_info)

[gcc r15-3393] Correctly handle store IFNs in vect_get_vector_types_for_stmt

[Richard Biener via Gcc-cvs]

https://gcc.gnu.org/g:340ca7437ceb05d61797dbf3b522a495176c5a5e

commit r15-3393-g340ca7437ceb05d61797dbf3b522a495176c5a5e
Author: Richard Biener 
Date:   Mon Sep 2 11:16:12 2024 +0200

Correctly handle store IFNs in vect_get_vector_types_for_stmt

Currently vect_get_vector_types_for_stmt only special-cases
IFN_MASK_STORE but there are now very many variants and simply
passing analysis without setting *VECTYPE will ICE duing SLP
discovery (noticed with IFN_SCATTER_STORE).  The following
properly uses internal_store_fn_p.  I also noticed we're
unnecessarily handing those again to determine the scalar type
but there should always be a data reference for them.

* tree-vect-stmts.cc (vect_get_vector_types_for_stmt):
Handle all internal_store_fn_p the same.  Remove special-casing
for the scalar_type of IFN_MASK_STORE.

Diff:
---
 gcc/tree-vect-stmts.cc | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index d2282c0dc4fd..ace1c8eaa0de 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -14877,8 +14877,10 @@ vect_get_vector_types_for_stmt (vec_info *vinfo, 
stmt_vec_info stmt_info,
   if (gimple_get_lhs (stmt) == NULL_TREE
   /* Allow vector conditionals through here.  */
   && !is_a  (stmt)
-  /* MASK_STORE has no lhs, but is ok.  */
-  && !gimple_call_internal_p (stmt, IFN_MASK_STORE))
+  /* MASK_STORE and friends have no lhs, but are ok.  */
+  && !(is_gimple_call (stmt)
+  && gimple_call_internal_p (stmt)
+  && internal_store_fn_p (gimple_call_internal_fn (stmt
 {
   if (is_a  (stmt))
{
@@ -14928,8 +14930,6 @@ vect_get_vector_types_for_stmt (vec_info *vinfo, 
stmt_vec_info stmt_info,
 
   if (data_reference *dr = STMT_VINFO_DATA_REF (stmt_info))
scalar_type = TREE_TYPE (DR_REF (dr));
-  else if (gimple_call_internal_p (stmt, IFN_MASK_STORE))
-   scalar_type = TREE_TYPE (gimple_call_arg (stmt, 3));
   else
scalar_type = TREE_TYPE (gimple_get_lhs (stmt));