[gcc r15-846] doc: Use https for our own site (and GCC for the project)
https://gcc.gnu.org/g:6e974827232b90b05a8e1dc6d2ed7b918f2b6c93
commit r15-846-g6e974827232b90b05a8e1dc6d2ed7b918f2b6c93
Author: Gerald Pfeifer
Date: Mon May 27 09:42:22 2024 +0200
doc: Use https for our own site (and GCC for the project)
gcc:
* doc/gm2.texi (What is GNU Modula-2): Move gcc.gnu.org links to
https.
(Other languages): Ditto. And fix casing of GCC.
Diff:
---
gcc/doc/gm2.texi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/doc/gm2.texi b/gcc/doc/gm2.texi
index 7e580400fb9..d553131e1bd 100644
--- a/gcc/doc/gm2.texi
+++ b/gcc/doc/gm2.texi
@@ -92,8 +92,8 @@ Boston, MA 02110-1301, USA@*
@node What is GNU Modula-2, Why use GNU Modula-2, , Overview
@section What is GNU Modula-2
-GNU Modula-2 is a @uref{http://gcc.gnu.org/frontends.html, front end}
-for the GNU Compiler Collection (@uref{http://gcc.gnu.org/, GCC}).
+GNU Modula-2 is a @uref{https://gcc.gnu.org/frontends.html, front end}
+for the GNU Compiler Collection (@uref{https://gcc.gnu.org, GCC}).
The GNU Modula-2 compiler is compliant with the PIM2, PIM3, PIM4 and
ISO dialects. Also implemented are a complete set of free ISO
libraries and PIM libraries.
@@ -3022,7 +3022,7 @@ The mailing list contents can be viewed
@section Other languages for GCC
These exist and can be found on the frontends web page on the
-@uref{http://gcc.gnu.org/frontends.html, gcc web site}.
+@uref{https://gcc.gnu.org/frontends.html, GCC web site}.
@node License, Copying, Using, Top
@section License of GNU Modula-2
[gcc r15-847] Add testcase for PR c++/105229: ICE in lookup_template_class_1
https://gcc.gnu.org/g:88c9b96b2800ddb7a499bd10abaa9441a471d5fe
commit r15-847-g88c9b96b2800ddb7a499bd10abaa9441a471d5fe
Author: Simon Martin
Date: Fri May 24 10:56:36 2024 +0200
Add testcase for PR c++/105229: ICE in lookup_template_class_1
The test case in PR c++/105229 has been fixed since 11.4 (via
PR c++/106024) - the attached patch simply adds the case to
the test suite.
Successfully tested on x86_64-pc-linux-gnu.
PR c++/105229
gcc/testsuite/ChangeLog:
* g++.dg/parse/crash72.C: New test.
Diff:
---
gcc/testsuite/g++.dg/parse/crash72.C | 12
1 file changed, 12 insertions(+)
diff --git a/gcc/testsuite/g++.dg/parse/crash72.C
b/gcc/testsuite/g++.dg/parse/crash72.C
new file mode 100644
index 000..df469e20f28
--- /dev/null
+++ b/gcc/testsuite/g++.dg/parse/crash72.C
@@ -0,0 +1,12 @@
+// PR c++/105229
+// { dg-do compile { target c++20 } }
+// { dg-additional-options "-Wno-missing-template-keyword" }
+
+template void bar ()
+{
+ [] {}.operator () <> (); // { dg-error "expected primary-expression" }
+}
+void foo ()
+{
+ bar ();
+}
[gcc r15-848] tree-optimization/115232 - demangle failure during -Waccess
https://gcc.gnu.org/g:311d7f5c17b8969c7ed8e4f23178d6ec4752e33f
commit r15-848-g311d7f5c17b8969c7ed8e4f23178d6ec4752e33f
Author: Richard Biener
Date: Mon May 27 09:13:11 2024 +0200
tree-optimization/115232 - demangle failure during -Waccess
For the following testcase we fail to demangle
_ZZN5OuterIvE6methodIvEEvvQ3cstITL0__EEN5InnernwEm and
_ZZN5OuterIvE6methodIvEEvvQ3cstITL0__EEN5InnerdlEPv and in turn end
up building NULL references. The following puts in a safeguard for
faile demangling into -Waccess.
PR tree-optimization/115232
* gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
failure to demangle gracefully.
* g++.dg/pr115232.C: New testcase.
Diff:
---
gcc/gimple-ssa-warn-access.cc | 2 +-
gcc/testsuite/g++.dg/pr115232.C | 25 +
2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/gcc/gimple-ssa-warn-access.cc b/gcc/gimple-ssa-warn-access.cc
index 0cd5b6d6ef4..61f9f0f3d31 100644
--- a/gcc/gimple-ssa-warn-access.cc
+++ b/gcc/gimple-ssa-warn-access.cc
@@ -1762,7 +1762,7 @@ new_delete_mismatch_p (tree new_decl, tree delete_decl)
void *np = NULL, *dp = NULL;
demangle_component *ndc = cplus_demangle_v3_components (new_str, 0, &np);
demangle_component *ddc = cplus_demangle_v3_components (del_str, 0, &dp);
- bool mismatch = new_delete_mismatch_p (*ndc, *ddc);
+ bool mismatch = ndc && ddc && new_delete_mismatch_p (*ndc, *ddc);
free (np);
free (dp);
return mismatch;
diff --git a/gcc/testsuite/g++.dg/pr115232.C b/gcc/testsuite/g++.dg/pr115232.C
new file mode 100644
index 000..e1d96d8f899
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr115232.C
@@ -0,0 +1,25 @@
+// { dg-do compile }
+// { dg-require-effective-target c++20 }
+
+using size_t = decltype(sizeof(0));
+template
+static constexpr bool cst = true;
+template
+struct Outer
+{
+Outer();
+template void method() requires cst
+{
+struct Inner
+{
+static void* operator new(size_t){return new char;}
+static void operator delete(void*){}
+Outer t;
+};
+new Inner;
+}
+};
+void f()
+{
+Outer{}.method();
+}
[gcc r15-849] Define which threading model is in use on Windows
https://gcc.gnu.org/g:f6c5f836df44196a7cd3b206af5bb29df6c7c225
commit r15-849-gf6c5f836df44196a7cd3b206af5bb29df6c7c225
Author: TheShermanTanker
Date: Mon May 27 12:57:33 2024 +0800
Define which threading model is in use on Windows
gcc:
* config/mingw/mingw32.h: Add new define for POSIX
threads.
Signed-off-by: TheShermanTanker
Diff:
---
gcc/config/mingw/mingw32.h | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/gcc/config/mingw/mingw32.h b/gcc/config/mingw/mingw32.h
index 08f1b5f0696..fa6e307476c 100644
--- a/gcc/config/mingw/mingw32.h
+++ b/gcc/config/mingw/mingw32.h
@@ -34,8 +34,12 @@ along with GCC; see the file COPYING3. If not see
| MASK_STACK_PROBE | MASK_ALIGN_DOUBLE \
| MASK_MS_BITFIELD_LAYOUT)
-#ifndef TARGET_USING_MCFGTHREAD
-#define TARGET_USING_MCFGTHREAD 0
+#ifdef TARGET_USING_MCFGTHREAD
+#define DEFINE_THREAD_MODEL builtin_define ("__USING_MCFGTHREAD__");
+#elif defined(TARGET_USE_PTHREAD_BY_DEFAULT)
+#define DEFINE_THREAD_MODEL builtin_define ("__USING_POSIXTHREAD__");
+#else
+#define DEFINE_THREAD_MODEL
#endif
/* See i386/crtdll.h for an alternative definition. _INTEGRAL_MAX_BITS
@@ -56,8 +60,7 @@ along with GCC; see the file COPYING3. If not see
builtin_define_std ("WIN64"); \
builtin_define ("_WIN64");\
} \
- if (TARGET_USING_MCFGTHREAD) \
- builtin_define ("__USING_MCFGTHREAD__");\
+ DEFINE_THREAD_MODEL \
} \
while (0)
@@ -190,7 +193,7 @@ along with GCC; see the file COPYING3. If not see
#else
#define SHARED_LIBGCC_SPEC " -lgcc "
#endif
-#if TARGET_USING_MCFGTHREAD
+#ifdef TARGET_USING_MCFGTHREAD
#define MCFGTHREAD_SPEC " -lmcfgthread -lkernel32 -lntdll "
#else
#define MCFGTHREAD_SPEC ""
[gcc r14-10247] tree-optimization/115232 - demangle failure during -Waccess
https://gcc.gnu.org/g:4790076933ef9337553c3fbbc52a93cce78c584f
commit r14-10247-g4790076933ef9337553c3fbbc52a93cce78c584f
Author: Richard Biener
Date: Mon May 27 09:13:11 2024 +0200
tree-optimization/115232 - demangle failure during -Waccess
For the following testcase we fail to demangle
_ZZN5OuterIvE6methodIvEEvvQ3cstITL0__EEN5InnernwEm and
_ZZN5OuterIvE6methodIvEEvvQ3cstITL0__EEN5InnerdlEPv and in turn end
up building NULL references. The following puts in a safeguard for
faile demangling into -Waccess.
PR tree-optimization/115232
* gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
failure to demangle gracefully.
* g++.dg/pr115232.C: New testcase.
(cherry picked from commit 311d7f5c17b8969c7ed8e4f23178d6ec4752e33f)
Diff:
---
gcc/gimple-ssa-warn-access.cc | 2 +-
gcc/testsuite/g++.dg/pr115232.C | 25 +
2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/gcc/gimple-ssa-warn-access.cc b/gcc/gimple-ssa-warn-access.cc
index dedaae27b31..194d1a2c02a 100644
--- a/gcc/gimple-ssa-warn-access.cc
+++ b/gcc/gimple-ssa-warn-access.cc
@@ -1762,7 +1762,7 @@ new_delete_mismatch_p (tree new_decl, tree delete_decl)
void *np = NULL, *dp = NULL;
demangle_component *ndc = cplus_demangle_v3_components (new_str, 0, &np);
demangle_component *ddc = cplus_demangle_v3_components (del_str, 0, &dp);
- bool mismatch = new_delete_mismatch_p (*ndc, *ddc);
+ bool mismatch = ndc && ddc && new_delete_mismatch_p (*ndc, *ddc);
free (np);
free (dp);
return mismatch;
diff --git a/gcc/testsuite/g++.dg/pr115232.C b/gcc/testsuite/g++.dg/pr115232.C
new file mode 100644
index 000..e1d96d8f899
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr115232.C
@@ -0,0 +1,25 @@
+// { dg-do compile }
+// { dg-require-effective-target c++20 }
+
+using size_t = decltype(sizeof(0));
+template
+static constexpr bool cst = true;
+template
+struct Outer
+{
+Outer();
+template void method() requires cst
+{
+struct Inner
+{
+static void* operator new(size_t){return new char;}
+static void operator delete(void*){}
+Outer t;
+};
+new Inner;
+}
+};
+void f()
+{
+Outer{}.method();
+}
[gcc r15-850] tree-optimization/115220 - fix store sinking virtual operand constraints
https://gcc.gnu.org/g:f9fbb47987efc8b5261e4cc36613c928a8693493
commit r15-850-gf9fbb47987efc8b5261e4cc36613c928a8693493
Author: Richard Biener
Date: Mon May 27 09:40:19 2024 +0200
tree-optimization/115220 - fix store sinking virtual operand constraints
The following makes sure the virtual operand updating when sinking
stores works for the case we ignore paths to kills. The final
sink location might not post-dominate the original stmt location
which would require inserting of a virtual PHI which we do not support.
PR tree-optimization/115220
PR tree-optimization/115226
* tree-ssa-sink.cc (statement_sink_location): When ignoring
paths to kills when sinking stores make sure the final
sink location is still post-dominated by the original one.
Otherwise we'd need to insert a PHI node to merge virtual operands.
* gcc.dg/torture/pr115220.c: New testcase.
* gcc.dg/torture/pr115226.c: New testcase.
Diff:
---
gcc/testsuite/gcc.dg/torture/pr115220.c | 14 ++
gcc/testsuite/gcc.dg/torture/pr115226.c | 15 +++
gcc/tree-ssa-sink.cc| 12 +---
3 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/torture/pr115220.c
b/gcc/testsuite/gcc.dg/torture/pr115220.c
new file mode 100644
index 000..e7b5da6ba42
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr115220.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-additional-options "--param logical-op-non-short-circuit=0" } */
+
+extern char **environ;
+static char ***p_environ = &environ;
+int
+_setenv_r (const char *name, const char *value)
+{
+ register char *C;
+ int offset;
+ for (C = (*p_environ)[offset]; (*C = *name++) && *C != '='; ++C);
+ for (*C++ = '='; (*C++ = *value++) != 0;);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr115226.c
b/gcc/testsuite/gcc.dg/torture/pr115226.c
new file mode 100644
index 000..9a0bc7c9b6a
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr115226.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+
+extern void c();
+int a, b;
+int main() {
+ while (b) {
+int d, e = 0, *f = &a;
+*f = 1;
+e = 1 >> d ? : 1 << d;
+if (e)
+ a = 0;
+c();
+ }
+ return 0;
+}
diff --git a/gcc/tree-ssa-sink.cc b/gcc/tree-ssa-sink.cc
index b0fe871cf1e..8c551e42a4d 100644
--- a/gcc/tree-ssa-sink.cc
+++ b/gcc/tree-ssa-sink.cc
@@ -467,11 +467,17 @@ statement_sink_location (gimple *stmt, basic_block frombb,
if (!sinkbb)
return false;
- sinkbb = select_best_block (frombb, sinkbb, stmt);
- if (sinkbb == frombb)
+ basic_block bestbb = select_best_block (frombb, sinkbb, stmt);
+ if (bestbb == frombb
+ /* When we sink a store make sure there's not a path to any of
+the possibly skipped killing defs as that wrecks the virtual
+operand update, requiring inserting of a PHI node. */
+ || (gimple_vdef (stmt)
+ && bestbb != sinkbb
+ && !dominated_by_p (CDI_POST_DOMINATORS, bestbb, sinkbb)))
return false;
- *togsi = gsi_after_labels (sinkbb);
+ *togsi = gsi_after_labels (bestbb);
return true;
}
[gcc r15-851] Fix points-to SCC collapsing bug
https://gcc.gnu.org/g:07cdba6294756af350198fbb01ea8c8efeac54dd commit r15-851-g07cdba6294756af350198fbb01ea8c8efeac54dd Author: Richard Biener Date: Mon May 27 13:50:14 2024 +0200 Fix points-to SCC collapsing bug When points-to analysis finds SCCs it marks the wrong node as being part of a found cycle. It only wants to mark the node it collapses to but marked the entry node found rather than the one it collapses to. This causes fallout in the patch for PR115236 but generally weakens the points-to solution by collapsing too many nodes. Note that this fix might slow down points-to solving. * tree-ssa-structalias.cc (scc_visit): Mark the node we collapse to as being in a component. Diff: --- gcc/tree-ssa-structalias.cc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/gcc/tree-ssa-structalias.cc b/gcc/tree-ssa-structalias.cc index a39b36c146e..f93c5df0767 100644 --- a/gcc/tree-ssa-structalias.cc +++ b/gcc/tree-ssa-structalias.cc @@ -1534,8 +1534,10 @@ scc_visit (constraint_graph_t graph, class scc_info *si, unsigned int n) graph->indirect_cycles[i - FIRST_REF_NODE] = lowest_node; } } + bitmap_set_bit (si->deleted, lowest_node); } - bitmap_set_bit (si->deleted, n); + else + bitmap_set_bit (si->deleted, n); } else si->scc_stack.safe_push (n);
[gcc r15-852] modula2: simplify xref usage in documentation, remove external ref to gm2.
https://gcc.gnu.org/g:a209f219b862def8fed166b31984b8c6c3bb74a0
commit r15-852-ga209f219b862def8fed166b31984b8c6c3bb74a0
Author: Gaius Mulley
Date: Mon May 27 18:06:59 2024 +0100
modula2: simplify xref usage in documentation, remove external ref to gm2.
This patch simplifies all the xref usage for gm2 nodes in the
modula-2 documentation.
gcc/ChangeLog:
* doc/gm2.texi: Replace all occurrences of xref
{foo, , , gm2} with xref {foo}.
Signed-off-by: Gaius Mulley
Diff:
---
gcc/doc/gm2.texi | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/gcc/doc/gm2.texi b/gcc/doc/gm2.texi
index d553131e1bd..8661fcb8728 100644
--- a/gcc/doc/gm2.texi
+++ b/gcc/doc/gm2.texi
@@ -291,7 +291,7 @@ This manual only documents the options specific to
@command{gm2}.
This section describes how to compile and link a simple hello world
program. It provides a few examples of using the different options
-mentioned in @pxref{Compiler options, , ,m2}. Assuming that you have
+mentioned in @pxref{Compiler options}. Assuming that you have
a file called @file{hello.mod} in your current directory which
contains:
@@ -442,7 +442,7 @@ turn on ISO standard features. Currently this enables the
ISO
@code{SYSTEM} module and alters the default library search path so
that the ISO libraries are searched before the PIM libraries. It also
effects the behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -flibs=
modifies the default library search path. The libraries supplied are:
@@ -558,30 +558,30 @@ turn on PIM standard features. Currently this enables
the PIM
@code{SYSTEM} module and determines which identifiers are pervasive
(declared in the base module). If no other @samp{-fpim[234]} switch is
used then division and modulus operators behave as defined in PIM4.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpim2
turn on PIM-2 standard features. Currently this removes @code{SIZE}
from being a pervasive identifier (declared in the base module). It
places @code{SIZE} in the @code{SYSTEM} module. It also effects the
behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpim3
turn on PIM-3 standard features. Currently this only effects the
behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpim4
turn on PIM-4 standard features. Currently this only effects the
behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpositive-mod-floor-div
forces the @code{DIV} and @code{MOD} operators to behave as defined by PIM4.
All modulus results are positive and the results from the division are
rounded to the floor.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpthread
link against the pthread library. By default this option is on. It
@@ -876,8 +876,8 @@ LONGCOMPLEX complex long double
Note that GNU Modula-2 also supports fixed sized data types which are
exported from the @code{SYSTEM} module.
-@xref{The PIM system module, , ,m2}.
-@xref{The ISO system module, , ,m2}.
+@xref{The PIM system module}.
+@xref{The ISO system module}.
@node Standard procedures, High procedure function, Elementary data types,
Using
@section Permanently accessible base procedures.
@@ -1628,7 +1628,7 @@ This section introduces the GNU Modula-2 language
extensions.
The GNU Modula-2 compiler allows abstract data types to be any type,
not just restricted to a pointer type providing the
@samp{-fextended-opaque} option is supplied
-@xref{Compiler options, , ,m2}.
+@xref{Compiler options}.
Declarations can be made in any order, whether they are
types, constants, procedures, nested modules or variables.
@@ -1829,8 +1829,8 @@ program module.
GNU Modula-2 also provides additional fixed sized data types which
are all exported from the @code{SYSTEM} module.
-@xref{The PIM system module, , ,m2}.
-@xref{The ISO system module, , ,m2}.
+@xref{The PIM system module}.
+@xref{The ISO system module}.
@node Type compatibility, Unbounded by reference, Extensions, Using
@section Type compatibility
@@ -2205,7 +2205,7 @@ $ python3 testnum.py
1234 x 2 = 2468
@end example
-@xref{Producing a Python module, , ,m2} for another example which
+@xref{Producing a Python module} for another example which
uses the @code{UNQUALIFIED} keyword to reduce the module name clutter
from the viewport of Python3.
[gcc r15-853] match: Use uniform_integer_cst_p in bitwise_inverted_equal_p [PR115238]
https://gcc.gnu.org/g:c5a7628470a7fb801ebeea82e16a4549db43bfa5
commit r15-853-gc5a7628470a7fb801ebeea82e16a4549db43bfa5
Author: Andrew Pinski
Date: Sun May 26 17:59:21 2024 -0700
match: Use uniform_integer_cst_p in bitwise_inverted_equal_p [PR115238]
I noticed while working on the `a ^ CST` patch, that
bitwise_inverted_equal_p
would check INTEGER_CST directly and not handle vector csts that are
uniform.
This moves over to using uniform_integer_cst_p instead of checking
INTEGER_CST
directly.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree-optimization/115238
gcc/ChangeLog:
* generic-match-head.cc (bitwise_inverted_equal_p): Use
uniform_integer_cst_p instead of checking INTEGER_CST.
* gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Likewise.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/bitops-9.c: New test.
Signed-off-by: Andrew Pinski
Diff:
---
gcc/generic-match-head.cc| 6 --
gcc/gimple-match-head.cc | 6 --
gcc/testsuite/gcc.dg/tree-ssa/bitops-9.c | 15 +++
3 files changed, 23 insertions(+), 4 deletions(-)
diff --git a/gcc/generic-match-head.cc b/gcc/generic-match-head.cc
index e2e1e4b2d64..55ba369c6b3 100644
--- a/gcc/generic-match-head.cc
+++ b/gcc/generic-match-head.cc
@@ -146,8 +146,10 @@ bitwise_inverted_equal_p (tree expr1, tree expr2, bool
&wascmp)
return false;
if (!tree_nop_conversion_p (TREE_TYPE (expr1), TREE_TYPE (expr2)))
return false;
- if (TREE_CODE (expr1) == INTEGER_CST && TREE_CODE (expr2) == INTEGER_CST)
-return wi::to_wide (expr1) == ~wi::to_wide (expr2);
+ tree cst1 = uniform_integer_cst_p (expr1);
+ tree cst2 = uniform_integer_cst_p (expr2);
+ if (cst1 && cst2)
+return wi::to_wide (cst1) == ~wi::to_wide (cst2);
if (operand_equal_p (expr1, expr2, 0))
return false;
if (TREE_CODE (expr1) == BIT_NOT_EXPR
diff --git a/gcc/gimple-match-head.cc b/gcc/gimple-match-head.cc
index 49b1dde6ae4..6220725b259 100644
--- a/gcc/gimple-match-head.cc
+++ b/gcc/gimple-match-head.cc
@@ -294,8 +294,10 @@ gimple_bitwise_inverted_equal_p (tree expr1, tree expr2,
bool &wascmp, tree (*va
return false;
if (!tree_nop_conversion_p (TREE_TYPE (expr1), TREE_TYPE (expr2)))
return false;
- if (TREE_CODE (expr1) == INTEGER_CST && TREE_CODE (expr2) == INTEGER_CST)
-return wi::to_wide (expr1) == ~wi::to_wide (expr2);
+ tree cst1 = uniform_integer_cst_p (expr1);
+ tree cst2 = uniform_integer_cst_p (expr2);
+ if (cst1 && cst2)
+return wi::to_wide (cst1) == ~wi::to_wide (cst2);
if (operand_equal_p (expr1, expr2, 0))
return false;
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/bitops-9.c
b/gcc/testsuite/gcc.dg/tree-ssa/bitops-9.c
new file mode 100644
index 000..a18b6bf3214
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/bitops-9.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized-raw" } */
+/* PR tree-optimization/115238 */
+
+
+#define vector8 __attribute__((vector_size(2*sizeof(int
+
+void f(int a, vector8 int *b)
+{
+a = 1;
+*b = a | ((~a) ^ *b);
+}
+/* { dg-final { scan-tree-dump-not "bit_xor_expr, " "optimized" } } */
+/* { dg-final { scan-tree-dump-times "bit_ior_expr, " 1 "optimized" } } */
+/* { dg-final { scan-tree-dump-times "bit_not_expr, " 1 "optimized" } } */
[gcc r15-855] Fix bitops-9.c for -m32 and other targets that don't have vector modes
https://gcc.gnu.org/g:4fcdc37e8856bde847d3b8dd2915b68d56ad1d62
commit r15-855-g4fcdc37e8856bde847d3b8dd2915b68d56ad1d62
Author: Andrew Pinski
Date: Mon May 27 17:24:11 2024 -0700
Fix bitops-9.c for -m32 and other targets that don't have vector modes
This just moves the tree scan earlier so we can detect the optimization and
not
need to detect the vector splitting too.
Committed as obvious after a quick test.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/bitops-9.c: Look at cdcde1 rather than
optmization.
Signed-off-by: Andrew Pinski
Diff:
---
gcc/testsuite/gcc.dg/tree-ssa/bitops-9.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/bitops-9.c
b/gcc/testsuite/gcc.dg/tree-ssa/bitops-9.c
index a18b6bf3214..bcf079ab59d 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/bitops-9.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/bitops-9.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-optimized-raw" } */
+/* { dg-options "-O2 -fdump-tree-cddce1-raw" } */
/* PR tree-optimization/115238 */
@@ -10,6 +10,8 @@ void f(int a, vector8 int *b)
a = 1;
*b = a | ((~a) ^ *b);
}
-/* { dg-final { scan-tree-dump-not "bit_xor_expr, " "optimized" } } */
-/* { dg-final { scan-tree-dump-times "bit_ior_expr, " 1 "optimized" } } */
-/* { dg-final { scan-tree-dump-times "bit_not_expr, " 1 "optimized" } } */
+/* Scan early on in the phases before the vector has possibily been split
+ but late enough after forwprop or other match-simplify has happened though.
*/
+/* { dg-final { scan-tree-dump-not "bit_xor_expr, " "cddce1" } } */
+/* { dg-final { scan-tree-dump-times "bit_ior_expr, " 1 "cddce1" } } */
+/* { dg-final { scan-tree-dump-times "bit_not_expr, " 1 "cddce1" } } */
[gcc r15-856] LoongArch: Guard REGNO with REG_P in loongarch_expand_conditional_move [PR115169]
https://gcc.gnu.org/g:ded91d857772c0183cc342cdc54d9128f6c57fa2
commit r15-856-gded91d857772c0183cc342cdc54d9128f6c57fa2
Author: Xi Ruoyao
Date: Wed May 22 09:29:43 2024 +0800
LoongArch: Guard REGNO with REG_P in loongarch_expand_conditional_move
[PR115169]
gcc/ChangeLog:
PR target/115169
* config/loongarch/loongarch.cc
(loongarch_expand_conditional_move): Guard REGNO with REG_P.
Diff:
---
gcc/config/loongarch/loongarch.cc | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index e7835ae34ae..1b6df6a4365 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -5344,6 +5344,7 @@ loongarch_expand_conditional_move (rtx *operands)
rtx op1_extend = op1;
/* Record whether operands[2] and operands[3] modes are promoted to
word_mode. */
+ bool promote_op[2] = {false, false};
bool promote_p = false;
machine_mode mode = GET_MODE (operands[0]);
@@ -5351,9 +5352,15 @@ loongarch_expand_conditional_move (rtx *operands)
loongarch_emit_float_compare (&code, &op0, &op1);
else
{
- if ((REGNO (op0) == REGNO (operands[2])
- || (REGNO (op1) == REGNO (operands[3]) && (op1 != const0_rtx)))
- && (GET_MODE_SIZE (GET_MODE (op0)) < word_mode))
+ if (GET_MODE_SIZE (GET_MODE (op0)) < word_mode)
+ {
+ promote_op[0] = (REG_P (op0) && REG_P (operands[2]) &&
+ REGNO (op0) == REGNO (operands[2]));
+ promote_op[1] = (REG_P (op1) && REG_P (operands[3]) &&
+ REGNO (op1) == REGNO (operands[3]));
+ }
+
+ if (promote_op[0] || promote_op[1])
{
mode = word_mode;
promote_p = true;
@@ -5395,7 +5402,7 @@ loongarch_expand_conditional_move (rtx *operands)
if (promote_p)
{
- if (REGNO (XEXP (operands[1], 0)) == REGNO (operands[2]))
+ if (promote_op[0])
op2 = op0_extend;
else
{
@@ -5403,7 +5410,7 @@ loongarch_expand_conditional_move (rtx *operands)
op2 = force_reg (mode, op2);
}
- if (REGNO (XEXP (operands[1], 1)) == REGNO (operands[3]))
+ if (promote_op[1])
op3 = op1_extend;
else
{
[gcc r14-10249] LoongArch: Guard REGNO with REG_P in loongarch_expand_conditional_move [PR115169]
https://gcc.gnu.org/g:e78980fdd5e82e09e26f524e98ad9cd90a29c1c4
commit r14-10249-ge78980fdd5e82e09e26f524e98ad9cd90a29c1c4
Author: Xi Ruoyao
Date: Wed May 22 09:29:43 2024 +0800
LoongArch: Guard REGNO with REG_P in loongarch_expand_conditional_move
[PR115169]
gcc/ChangeLog:
PR target/115169
* config/loongarch/loongarch.cc
(loongarch_expand_conditional_move): Guard REGNO with REG_P.
(cherry picked from commit ded91d857772c0183cc342cdc54d9128f6c57fa2)
Diff:
---
gcc/config/loongarch/loongarch.cc | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index e7835ae34ae..1b6df6a4365 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -5344,6 +5344,7 @@ loongarch_expand_conditional_move (rtx *operands)
rtx op1_extend = op1;
/* Record whether operands[2] and operands[3] modes are promoted to
word_mode. */
+ bool promote_op[2] = {false, false};
bool promote_p = false;
machine_mode mode = GET_MODE (operands[0]);
@@ -5351,9 +5352,15 @@ loongarch_expand_conditional_move (rtx *operands)
loongarch_emit_float_compare (&code, &op0, &op1);
else
{
- if ((REGNO (op0) == REGNO (operands[2])
- || (REGNO (op1) == REGNO (operands[3]) && (op1 != const0_rtx)))
- && (GET_MODE_SIZE (GET_MODE (op0)) < word_mode))
+ if (GET_MODE_SIZE (GET_MODE (op0)) < word_mode)
+ {
+ promote_op[0] = (REG_P (op0) && REG_P (operands[2]) &&
+ REGNO (op0) == REGNO (operands[2]));
+ promote_op[1] = (REG_P (op1) && REG_P (operands[3]) &&
+ REGNO (op1) == REGNO (operands[3]));
+ }
+
+ if (promote_op[0] || promote_op[1])
{
mode = word_mode;
promote_p = true;
@@ -5395,7 +5402,7 @@ loongarch_expand_conditional_move (rtx *operands)
if (promote_p)
{
- if (REGNO (XEXP (operands[1], 0)) == REGNO (operands[2]))
+ if (promote_op[0])
op2 = op0_extend;
else
{
@@ -5403,7 +5410,7 @@ loongarch_expand_conditional_move (rtx *operands)
op2 = force_reg (mode, op2);
}
- if (REGNO (XEXP (operands[1], 1)) == REGNO (operands[3]))
+ if (promote_op[1])
op3 = op1_extend;
else
{
[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] [to-be-committed][RISC-V] Reassociate constants in logical ops
https://gcc.gnu.org/g:65e6ccc3a04ab2fa8f4fa134976a6e76b25c6549
commit 65e6ccc3a04ab2fa8f4fa134976a6e76b25c6549
Author: Lyut Nersisyan
Date: Sun May 26 21:24:40 2024 -0600
[to-be-committed][RISC-V] Reassociate constants in logical ops
This patch from Lyut will reassociate operands when we have shifted logical
operations. This can simplify a constant that may not be fit in a simm12
into
a form that does fit into a simm12.
The basic work was done by Lyut. I generalized it to handle XOR/OR.
It stands on its own, but also helps the upcoming Zbkb work from Lyut.
This has survived Ventana's CI system as well as my tester. Obviously I'll
wait for a verdict from the Rivos CI system before moving forward.
gcc/
* config/riscv/riscv.md (_shift_reverse): New
pattern.
gcc/testsuite
* gcc.target/riscv/and-shift32.c: New test.
* gcc.target/riscv/and-shift64.c: New test.
Co-authored-by: Jeffrey A Law
(cherry picked from commit 160929406f0c44df5b0d377a014ebfe5027fe4e7)
Diff:
---
gcc/config/riscv/riscv.md| 28
gcc/testsuite/gcc.target/riscv/and-shift32.c | 13 +
gcc/testsuite/gcc.target/riscv/and-shift64.c | 13 +
3 files changed, 54 insertions(+)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index ab628c60840..fe74b8dcd3b 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2829,6 +2829,34 @@
[(set_attr "type" "shift")
(set_attr "mode" "SI")])
+;; We can reassociate the shift and bitwise operator which may allow us to
+;; reduce the immediate operand of the bitwise operator into a range that
+;; fits in a simm12.
+;;
+;; We need to make sure that shifting does not lose any bits, particularly
+;; for IOR/XOR. It probably doesn't matter for AND.
+;;
+;; We also don't want to do this if the immediate already fits in a simm12
+;; field.
+(define_insn_and_split "_shift_reverse"
+ [(set (match_operand:X 0 "register_operand" "=r")
+(any_bitwise:X (ashift:X (match_operand:X 1 "register_operand" "r")
+(match_operand 2 "immediate_operand" "n"))
+ (match_operand 3 "immediate_operand" "n")))]
+ "(!SMALL_OPERAND (INTVAL (operands[3]))
+ && SMALL_OPERAND (INTVAL (operands[3]) >> INTVAL (operands[2]))
+ && (popcount_hwi (INTVAL (operands[3]))
+ <= popcount_hwi (INTVAL (operands[3]) >> INTVAL (operands[2]"
+ "#"
+ "&& 1"
+ [(set (match_dup 0) (any_bitwise:X (match_dup 1) (match_dup 3)))
+ (set (match_dup 0) (ashift:X (match_dup 0) (match_dup 2)))]
+ {
+operands[3] = GEN_INT (INTVAL (operands[3]) >> INTVAL (operands[2]));
+ }
+ [(set_attr "type" "shift")
+ (set_attr "mode" "")])
+
;; Non-canonical, but can be formed by ree when combine is not successful at
;; producing one of the two canonical patterns below.
(define_insn "*lshrsi3_zero_extend_1"
diff --git a/gcc/testsuite/gcc.target/riscv/and-shift32.c
b/gcc/testsuite/gcc.target/riscv/and-shift32.c
new file mode 100644
index 000..38ee63e8d79
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/and-shift32.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-g" } } */
+
+int foo(int a)
+{
+ return (a << 8) & 24320;
+}
+
+/* { dg-final { scan-assembler-times "\\sandi\\s" 1 } } */
+/* { dg-final { scan-assembler-times "\\sslli\\s" 1 } } */
+/* { dg-final { scan-assembler-not "\\sli\\s" } } */
+/* { dg-final { scan-assembler-not "\\saddi\\s" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/riscv/and-shift64.c
b/gcc/testsuite/gcc.target/riscv/and-shift64.c
new file mode 100644
index 000..ccfaedd508a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/and-shift64.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-g" } } */
+
+long long foo(long long a)
+{
+ return (a << 8) & 24320;
+}
+
+/* { dg-final { scan-assembler-times "\\sandi\\s" 1 } } */
+/* { dg-final { scan-assembler-times "\\sslli\\s" 1 } } */
+/* { dg-final { scan-assembler-not "\\sli\\s" } } */
+/* { dg-final { scan-assembler-not "\\saddi\\s" } } */
\ No newline at end of file
[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Fix missing boolean_expression in zmmul extension
https://gcc.gnu.org/g:39e977a4a682e0f5109a29d35f57c5b1b957fd16
commit 39e977a4a682e0f5109a29d35f57c5b1b957fd16
Author: Liao Shihua
Date: Fri May 24 13:03:57 2024 +0800
RISC-V: Fix missing boolean_expression in zmmul extension
Update v1->v2
Add testcase for this patch.
Missing boolean_expression TARGET_ZMMUL in riscv_rtx_costs() cause
different instructions when
multiplying an integer with a constant. (
https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1482 )
int foo(int *ib) {
*ib = *ib * 33938;
return 0;
}
rv64im:
lw a4,0(a1)
li a5,32768
addiw a5,a5,1170
mulwa5,a5,a4
sw a5,0(a1)
ret
rv64i_zmmul:
lw a4,0(a1)
slliw a5,a4,5
addwa5,a5,a4
slliw a5,a5,3
addwa5,a5,a4
slliw a5,a5,3
addwa5,a5,a4
slliw a5,a5,3
addwa5,a5,a4
slliw a5,a5,1
sw a5,0(a1)
ret
Fixed.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_rtx_costs): Add TARGET_ZMMUL.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/zmmul-3.c: New test.
(cherry picked from commit 06bb125521dec5648b725ddee4345b00decfdc77)
Diff:
---
gcc/config/riscv/riscv.cc| 2 +-
gcc/testsuite/gcc.target/riscv/zmmul-3.c | 8
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 401ddc9eeb7..a99211d56b1 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3832,7 +3832,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int
outer_code, int opno ATTRIBUTE_UN
case MULT:
if (float_mode_p)
*total = tune_param->fp_mul[mode == DFmode];
- else if (!TARGET_MUL)
+ else if (!(TARGET_MUL || TARGET_ZMMUL))
/* Estimate the cost of a library call. */
*total = COSTS_N_INSNS (speed ? 32 : 6);
else if (GET_MODE_SIZE (mode).to_constant () > UNITS_PER_WORD)
diff --git a/gcc/testsuite/gcc.target/riscv/zmmul-3.c
b/gcc/testsuite/gcc.target/riscv/zmmul-3.c
new file mode 100644
index 000..f8377f86180
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zmmul-3.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64iafdc_zmmul -mabi=lp64d" } */
+int foo1(int a)
+{
+return a * 99;
+}
+
+/* { dg-final { scan-assembler-times "mulw\t" 1 } } */
[gcc r15-857] Fix predicate mismatch between vfcmaddcph's define_insn and define_expand.
https://gcc.gnu.org/g:c65002347e595cda8b15e59e734d209283faf2b6
commit r15-857-gc65002347e595cda8b15e59e734d209283faf2b6
Author: liuhongt
Date: Tue May 28 10:32:12 2024 +0800
Fix predicate mismatch between vfcmaddcph's define_insn and define_expand.
When I applied Roger's patch [1], there's ICE due to it.
The patch fix the latent bug.
[1] https://gcc.gnu.org/pipermail/gcc-patches/2024-May/651365.html
gcc/ChangeLog:
* config/i386/sse.md
(___mask): Align
operands' predicate with corresponding expander.
(__):
Ditto.
Diff:
---
gcc/config/i386/sse.md | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index b59c988fc31..0f4fbcb2c5d 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6867,9 +6867,9 @@
[(set (match_operand:VHF_AVX512VL 0 "register_operand" "=&v")
(vec_merge:VHF_AVX512VL
(unspec:VHF_AVX512VL
- [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "v")
-(match_operand:VHF_AVX512VL 2 "nonimmediate_operand"
"")
-(match_operand:VHF_AVX512VL 3 "register_operand" "0")]
+ [(match_operand:VHF_AVX512VL 1 ""
"v")
+(match_operand:VHF_AVX512VL 2 ""
"")
+(match_operand:VHF_AVX512VL 3 "" "0")]
UNSPEC_COMPLEX_F_C_MA)
(match_dup 1)
(unspec:
@@ -6892,8 +6892,8 @@
(define_insn "__"
[(set (match_operand:VHF_AVX512VL 0 "register_operand" "=&v")
(unspec:VHF_AVX512VL
- [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "v")
-(match_operand:VHF_AVX512VL 2 "nonimmediate_operand"
"")]
+ [(match_operand:VHF_AVX512VL 1 ""
"v")
+(match_operand:VHF_AVX512VL 2 ""
"")]
UNSPEC_COMPLEX_F_C_MUL))]
"TARGET_AVX512FP16 && "
{
