[gcc] Created branch 'mikael/heads/pr99798_v32' in namespace 'refs/users'
The branch 'mikael/heads/pr99798_v32' was created in namespace 'refs/users' pointing to: e13178f7fbd9... fortran: Assume there is no cyclic reference with submodule
[gcc(refs/users/mikael/heads/pr99798_v32)] fortran: Assume there is no cyclic reference with submodule symbols [PR99798]
https://gcc.gnu.org/g:e13178f7fbd977b71602d39c401adc671fd30d16
commit e13178f7fbd977b71602d39c401adc671fd30d16
Author: Mikael Morin
Date: Fri May 10 11:14:48 2024 +0200
fortran: Assume there is no cyclic reference with submodule symbols
[PR99798]
This prevents a premature release of memory with procedure symbols from
submodules, causing random compiler crashes.
The problem is a fragile detection of cyclic references, which can match
with procedures host-associated from a module in submodules, in cases where
it
shouldn't. The formal namespace is released, and with it the dummy
arguments
symbols of the procedure. But there is no cyclic reference, so the
procedure
symbol itself is not released and remains, with pointers to its dummy
arguments
now dangling.
The fix adds a condition to avoid the case, and refactors to a new predicate
by the way. Part of the original condition is also removed, for lack of a
reason to keep it.
PR fortran/99798
gcc/fortran/ChangeLog:
* symbol.cc (gfc_release_symbol): Move the condition guarding
the cyclic references handling...
(cyclic_reference_break_needed): ... here as a new predicate. Add
a condition preventing any premature release with submodule symbols.
gcc/testsuite/ChangeLog:
* gfortran.dg/submodule_33.f08: New test.
Diff:
---
gcc/fortran/symbol.cc | 54 --
gcc/testsuite/gfortran.dg/submodule_33.f08 | 20 +++
2 files changed, 72 insertions(+), 2 deletions(-)
diff --git a/gcc/fortran/symbol.cc b/gcc/fortran/symbol.cc
index 8f7deac1d1ee..0a1646def678 100644
--- a/gcc/fortran/symbol.cc
+++ b/gcc/fortran/symbol.cc
@@ -3179,6 +3179,57 @@ gfc_free_symbol (gfc_symbol *&sym)
}
+/* Returns true if the symbol SYM has, through its FORMAL_NS field, a reference
+ to itself which should be eliminated for the symbol memory to be released
+ via normal reference counting.
+
+ The implementation is crucial as it controls the proper release of symbols,
+ especially (contained) procedure symbols, which can represent a lot of
memory
+ through the namespace of their body.
+
+ We try to avoid freeing too much memory (causing dangling pointers), to not
+ leak too much (wasting memory), and to avoid expensive walks of the symbol
+ tree (which would be the correct way to check for a cycle). */
+
+bool
+cyclic_reference_break_needed (gfc_symbol *sym)
+{
+ /* Normal symbols don't reference themselves. */
+ if (sym->formal_ns == nullptr)
+return false;
+
+ /* Procedures at the root of the file do have a self reference, but they
don't
+ have a reference in a parent namespace preventing the release of the
+ procedure namespace, so they can use the normal reference counting. */
+ if (sym->formal_ns == sym->ns)
+return false;
+
+ /* If sym->refs == 1, we can use normal reference counting. If sym->refs >
2,
+ the symbol won't be freed anyway, with or without cyclic reference. */
+ if (sym->refs != 2)
+return false;
+
+ /* Procedure symbols host-associated from a module in submodules are special,
+ because the namespace of the procedure block in the submodule is different
+ from the FORMAL_NS namespace generated by host-association. So there are
+ two different namespaces representing the same procedure namespace. As
+ FORMAL_NS comes from host-association, which only imports symbols visible
+ from the outside (dummy arguments basically), we can assume there is no
+ self reference through FORMAL_NS in that case. */
+ if (sym->attr.host_assoc && sym->attr.used_in_submodule)
+return false;
+
+ /* We can assume that contained procedures have cyclic references, because
+ the symbol of the procedure itself is accessible in the procedure body
+ namespace. So we assume that symbols with a formal namespace different
+ from the declaration namespace and two references, one of which is about
+ to be removed, are procedures with just the self reference left. At this
+ point, the symbol SYM matches that pattern, so we return true here to
+ permit the release of SYM. */
+ return true;
+}
+
+
/* Decrease the reference counter and free memory when we reach zero.
Returns true if the symbol has been freed, false otherwise. */
@@ -3188,8 +3239,7 @@ gfc_release_symbol (gfc_symbol *&sym)
if (sym == NULL)
return false;
- if (sym->formal_ns != NULL && sym->refs == 2 && sym->formal_ns != sym->ns
- && (!sym->attr.entry || !sym->module))
+ if (cyclic_reference_break_needed (sym))
{
/* As formal_ns contains a reference to sym, delete formal_ns just
before the deletion of sym. */
diff --git a/gcc/testsuite/gfortran.dg/submodule_33.f08
b/gcc/testsuite/gfortran.dg/submodule_33.f08
new file mode 100644
index ..b61d750def
[gcc r15-387] Regenerate cygming.opt.urls and mingw.opt.urls
https://gcc.gnu.org/g:a18c83b45c64ac7870f6e2acb0f23ae6090ed9cd
commit r15-387-ga18c83b45c64ac7870f6e2acb0f23ae6090ed9cd
Author: Mark Wielaard
Date: Sun May 12 14:37:58 2024 +0200
Regenerate cygming.opt.urls and mingw.opt.urls
The new cygming.opt.urls and mingw.opt.urls in the
gcc/config/mingw/cygming.opt.urls directory need to generated by make
regenerate-opt-urls in the gcc subdirectory. They still contained
references to the gcc/config/i386 directory from which they were
copied.
Fixes: 1f05dfc131c7 ("Reuse MinGW from i386 for AArch64")
Fixes: e8d003736e6c ("Rename "x86 Windows Options" to "Cygwin and MinGW
Options"")
gcc/ChangeLog:
* config/mingw/cygming.opt.urls: Regenerate.
* config/mingw/mingw.opt.urls: Likewise.
Diff:
---
gcc/config/mingw/cygming.opt.urls | 7 +++
gcc/config/mingw/mingw.opt.urls | 2 +-
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/gcc/config/mingw/cygming.opt.urls
b/gcc/config/mingw/cygming.opt.urls
index c624e22e4427..af11c4997609 100644
--- a/gcc/config/mingw/cygming.opt.urls
+++ b/gcc/config/mingw/cygming.opt.urls
@@ -1,4 +1,4 @@
-; Autogenerated by regenerate-opt-urls.py from gcc/config/i386/cygming.opt and
generated HTML
+; Autogenerated by regenerate-opt-urls.py from gcc/config/mingw/cygming.opt
and generated HTML
mconsole
UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mconsole)
@@ -9,9 +9,8 @@ UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mdll)
mnop-fun-dllimport
UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mnop-fun-dllimport)
-; skipping UrlSuffix for 'mthreads' due to multiple URLs:
-; duplicate: 'gcc/Cygwin-and-MinGW-Options.html#index-mthreads-1'
-; duplicate: 'gcc/x86-Options.html#index-mthreads'
+mthreads
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mthreads-1)
mwin32
UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mwin32)
diff --git a/gcc/config/mingw/mingw.opt.urls b/gcc/config/mingw/mingw.opt.urls
index f8ee5be6a535..40fb086606b2 100644
--- a/gcc/config/mingw/mingw.opt.urls
+++ b/gcc/config/mingw/mingw.opt.urls
@@ -1,4 +1,4 @@
-; Autogenerated by regenerate-opt-urls.py from gcc/config/i386/mingw.opt and
generated HTML
+; Autogenerated by regenerate-opt-urls.py from gcc/config/mingw/mingw.opt and
generated HTML
mcrtdll=
UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mcrtdll)
[gcc r15-388] [to-be-committed] RISC-V Fix minor regression in synthesis WRT bseti usage
https://gcc.gnu.org/g:77a28ed91b2a527b9006ee1a220b468756b43eca
commit r15-388-g77a28ed91b2a527b9006ee1a220b468756b43eca
Author: Jeff Law
Date: Sun May 12 07:05:43 2024 -0600
[to-be-committed] RISC-V Fix minor regression in synthesis WRT bseti usage
Overnight testing showed a small number of cases where constant synthesis
was
doing something dumb. Specifically generating more instructions than the
number of bits set in the constant.
It was a minor goof in the recent bseti code. In the code to first figure
out
what bits LUI could set, I included one bit outside the space LUI operates.
For some dumb reason I kept thinking in terms of 11 low bits belonging to
addi,
but it's actually 12 bits. The net is what we thought should be a single
LUI
for costing turned into LUI+ADDI.
I didn't let the test run to completion, but over the course of 12 hours it
found 9 cases. Given we know that the triggers all have 0x800 set, I bet we
could likely find more, but I doubt it's that critical to cover every
possible
constant that regressed.
gcc/
* config/riscv/riscv.cc (riscv_build_integer_1): Fix thinko in
testing
when lui can be used to set several bits in bseti path.
gcc/testsuite
* gcc.target/riscv/synthesis-4.c: New test
Diff:
---
gcc/config/riscv/riscv.cc| 6 ++---
gcc/testsuite/gcc.target/riscv/synthesis-4.c | 34
2 files changed, 37 insertions(+), 3 deletions(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 9c98b1da0357..049f8f8cb9fc 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -921,12 +921,12 @@ riscv_build_integer_1 (struct riscv_integer_op
codes[RISCV_MAX_INTEGER_OPS],
/* First handle any bits set by LUI. Be careful of the
SImode sign bit!. */
- if (value & 0x7800)
+ if (value & 0x7000)
{
alt_codes[i].code = (i == 0 ? UNKNOWN : IOR);
- alt_codes[i].value = value & 0x7800;
+ alt_codes[i].value = value & 0x7000;
alt_codes[i].use_uw = false;
- value &= ~0x7800;
+ value &= ~0x7000;
i++;
}
diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-4.c
b/gcc/testsuite/gcc.target/riscv/synthesis-4.c
new file mode 100644
index ..328a55b9e6e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/synthesis-4.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target rv64 } */
+/* We aggressively skip as we really just need to test the basic synthesis
+ which shouldn't vary based on the optimization level. -O1 seems to work
+ and eliminates the usual sources of extraneous dead code that would throw
+ off the counts. */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } }
*/
+/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */
+
+/* Rather than test for a specific synthesis of all these constants or
+ having thousands of tests each testing one variant, we just test the
+ total number of instructions.
+
+ This isn't expected to change much and any change is worthy of a look. */
+/* { dg-final { scan-assembler-times
"\\t(add|addi|bseti|li|ret|sh1add|sh2add|sh3add|slli)" 45 } } */
+
+
+unsigned long foo_0x640800(void) { return 0x640800UL; }
+
+unsigned long foo_0xc40800(void) { return 0xc40800UL; }
+
+unsigned long foo_0x1840800(void) { return 0x1840800UL; }
+
+unsigned long foo_0x3040800(void) { return 0x3040800UL; }
+
+unsigned long foo_0x6040800(void) { return 0x6040800UL; }
+
+unsigned long foo_0xc040800(void) { return 0xc040800UL; }
+
+unsigned long foo_0x18040800(void) { return 0x18040800UL; }
+
+unsigned long foo_0x30040800(void) { return 0x30040800UL; }
+
+unsigned long foo_0x60040800(void) { return 0x60040800UL; }
[gcc r15-389] [to-be-committed, RISC-V] Improve usage of slli.uw in constant synthesis
https://gcc.gnu.org/g:83fb5e6f382ea99ca0e2a0afeb25a9f78909f25f
commit r15-389-g83fb5e6f382ea99ca0e2a0afeb25a9f78909f25f
Author: Jeff Law
Date: Sun May 12 07:12:04 2024 -0600
[to-be-committed,RISC-V] Improve usage of slli.uw in constant synthesis
And an improvement to using slli.uw...
I recently added the ability to use slli.uw in the synthesis path. That
code was conditional on the right justified constant being a LUI_OPERAND
after sign extending from bit 31 to bit 63.
That code is working fine, but could be improved. Specifically there's
no reason it shouldn't work for LUI+ADDI under the same circumstances.
So rather than testing the sign extended, right justified constant is a
LUI_OPERAND, we can just test that the right justified constant has
precisely 32 leading zeros.
gcc/
* config/riscv/riscv.cc (riscv_build_integer_1): Use slli.uw more.
gcc/testsuite
* gcc.target/riscv/synthesis-5.c: New test.
Diff:
---
gcc/config/riscv/riscv.cc| 9 +-
gcc/testsuite/gcc.target/riscv/synthesis-5.c | 294 +++
2 files changed, 299 insertions(+), 4 deletions(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 049f8f8cb9fc..a1e5a014bedf 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -819,13 +819,14 @@ riscv_build_integer_1 (struct riscv_integer_op
codes[RISCV_MAX_INTEGER_OPS],
& ~HOST_WIDE_INT_C (0x8000)
shift -= IMM_BITS, x <<= IMM_BITS;
- /* Adjust X if it isn't a LUI operand in isolation, but we can use
-a subsequent "uw" instruction form to mask off the undesirable
-bits. */
+ /* If X has bits 32..63 clear and bit 31 set, then go ahead and mark
+it as desiring a "uw" operation for the shift. That way we can have
+LUI+ADDI to generate the constant, then shift it into position
+clearing out the undesirable bits. */
if (!LUI_OPERAND (x)
&& TARGET_64BIT
&& TARGET_ZBA
- && LUI_OPERAND (x & ~HOST_WIDE_INT_C (0x8000UL)))
+ && clz_hwi (x) == 32)
{
x = sext_hwi (x, 32);
use_uw = true;
diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-5.c
b/gcc/testsuite/gcc.target/riscv/synthesis-5.c
new file mode 100644
index ..4d81565b563b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/synthesis-5.c
@@ -0,0 +1,294 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target rv64 } */
+
+/* We aggressively skip as we really just need to test the basic synthesis
+ which shouldn't vary based on the optimization level. -O1 seems to work
+ and eliminates the usual sources of extraneous dead code that would throw
+ off the counts. */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } }
*/
+/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */
+
+/* Rather than test for a specific synthesis of all these constants or
+ having thousands of tests each testing one variant, we just test the
+ total number of instructions.
+
+ This isn't expected to change much and any change is worthy of a look. */
+/* { dg-final { scan-assembler-times
"\\t(add|addi|bseti|li|ret|sh1add|sh2add|sh3add|slli)" 556 } } */
+
+unsigned long foo_0x80180001000(void) { return 0x80180001000UL; }
+
+unsigned long foo_0x80280001000(void) { return 0x80280001000UL; }
+
+unsigned long foo_0x80480001000(void) { return 0x80480001000UL; }
+
+unsigned long foo_0x80880001000(void) { return 0x80880001000UL; }
+
+unsigned long foo_0x81080001000(void) { return 0x81080001000UL; }
+
+unsigned long foo_0x82080001000(void) { return 0x82080001000UL; }
+
+unsigned long foo_0x84080001000(void) { return 0x84080001000UL; }
+
+unsigned long foo_0x88080001000(void) { return 0x88080001000UL; }
+
+unsigned long foo_0x90080001000(void) { return 0x90080001000UL; }
+
+unsigned long foo_0xa0080001000(void) { return 0xa0080001000UL; }
+
+unsigned long foo_0x8031000(void) { return 0x8031000UL; }
+
+unsigned long foo_0x8051000(void) { return 0x8051000UL; }
+
+unsigned long foo_0x8091000(void) { return 0x8091000UL; }
+
+unsigned long foo_0x8111000(void) { return 0x8111000UL; }
+
+unsigned long foo_0x8211000(void) { return 0x8211000UL; }
+
+unsigned long foo_0x8411000(void) { return 0x8411000UL; }
+
+unsigned long foo_0x8811000(void) { return 0x8811000UL; }
+
+unsigned long foo_0x9011000(void) { return 0x9011000UL; }
+
+unsigned long foo_0xa011000(void) { return 0xa011000UL; }
+
+unsigned long foo_0xc011000(void) { return 0xc011000UL; }
+
+unsigned long foo_0x8061000(void) { return 0x8061000UL; }
+
+unsigned long foo_0x80a1000(void) { return 0x80a1000UL; }
+
+unsigned long foo_0x8121000(void) { return 0x8121000UL; }
+
+unsigned long foo_0x8221000(void) { return 0x822
[gcc r14-10195] doc: Remove references to FreeBSD 7 and older
https://gcc.gnu.org/g:cf43da54f876c4b965feaa5f499483b5f16ed269
commit r14-10195-gcf43da54f876c4b965feaa5f499483b5f16ed269
Author: Gerald Pfeifer
Date: Sun Apr 28 14:59:14 2024 +0200
doc: Remove references to FreeBSD 7 and older
FreeBSD 7 has been end of life for years and current GCC most likely
would not build there anymore anyways.
gcc:
PR target/69374
PR target/112959
* doc/install.texi (Specific) <*-*-freebsd*>: Remove references to
FreeBSD 7 and older.
(cherry picked from commit 507f3ce34c55e78b23eeaf57bc4d927a1f25f8fb)
Diff:
---
gcc/doc/install.texi | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 4b4f1e3e639f..b13c62ed2b7a 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -4096,18 +4096,13 @@ debugging formats. Otherwise, this release of GCC
should now match
more of the configuration used in the stock FreeBSD configuration of
GCC@. In particular, @option{--enable-threads} is now configured by
default. However, as a general user, do not attempt to replace the
-system compiler with this release. Known to bootstrap and check with
-good results on FreeBSD 7.2-STABLE@. In the past, known to bootstrap
-and check with good results on FreeBSD 3.0, 3.4, 4.0, 4.2, 4.3, 4.4,
-4.5, 4.8, 4.9 and 5-CURRENT@.
+system compiler with this release.
The version of binutils installed in @file{/usr/bin} probably works
with this release of GCC@. Bootstrapping against the latest GNU
binutils and/or the version found in @file{/usr/ports/devel/binutils} has
been known to enable additional features and improve overall testsuite
-results. However, it is currently known that boehm-gc may not configure
-properly on FreeBSD prior to the FreeBSD 7.0 release with GNU binutils
-after 2.16.1.
+results.
@html
[gcc r14-10196] doc: Remove old details on libunwind for ia64-*-hpux*
https://gcc.gnu.org/g:7939f8823e20c8faed6ce5ac4614c558344a265f
commit r14-10196-g7939f8823e20c8faed6ce5ac4614c558344a265f
Author: Gerald Pfeifer
Date: Sun May 12 15:28:27 2024 +0200
doc: Remove old details on libunwind for ia64-*-hpux*
gcc:
PR target/69374
* doc/install.texi (Specific) : Remove details
on libunwind for GCC 3.4 and earlier.
(cherry picked from commit 81f7965e63028c1289ae3b1836750da74b01bc4a)
Diff:
---
gcc/doc/install.texi | 6 --
1 file changed, 6 deletions(-)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index b13c62ed2b7a..4119304f66a5 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -4316,12 +4316,6 @@ Building GCC on this target requires the GNU Assembler.
The bundled HP
assembler will not work. To prevent GCC from using the wrong assembler,
the option @option{--with-gnu-as} may be necessary.
-The GCC libunwind library has not been ported to HPUX@. This means that for
-GCC versions 3.2.3 and earlier, @option{--enable-libunwind-exceptions}
-is required to build GCC@. For GCC 3.3 and later, this is the default.
-For gcc 3.4.3 and later, @option{--enable-libunwind-exceptions} is
-removed and the system libunwind library will always be used.
-
@html
[gcc r14-10197] doc: FreeBSD no longer has a GNU toolchain in base
https://gcc.gnu.org/g:609f9699cd376dbb903d9a6761bdb1165831f796
commit r14-10197-g609f9699cd376dbb903d9a6761bdb1165831f796
Author: Gerald Pfeifer
Date: Sun May 12 15:30:18 2024 +0200
doc: FreeBSD no longer has a GNU toolchain in base
gcc:
PR target/69374
PR target/112959
* doc/install.texi (Specific) <*-*-freebsd*>: No longer refer
to GCC or binutils in base. Recommend bootstrap using binutils.
(cherry picked from commit 0695aba3e987f4bb06c95f29ff90a8a3234e1507)
Diff:
---
gcc/doc/install.texi | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 4119304f66a5..b1d28dcb03be 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -4092,16 +4092,11 @@ This configuration is intended for embedded systems.
We support FreeBSD using the ELF file format with DWARF 2 debugging
for all CPU architectures. There are
no known issues with mixing object files and libraries with different
-debugging formats. Otherwise, this release of GCC should now match
-more of the configuration used in the stock FreeBSD configuration of
-GCC@. In particular, @option{--enable-threads} is now configured by
-default. However, as a general user, do not attempt to replace the
-system compiler with this release.
-
-The version of binutils installed in @file{/usr/bin} probably works
-with this release of GCC@. Bootstrapping against the latest GNU
-binutils and/or the version found in @file{/usr/ports/devel/binutils} has
-been known to enable additional features and improve overall testsuite
+debugging formats.
+
+We recommend bootstrapping against the latest GNU binutils or the
+version found in the @file{devel/binutils} port. This also has been
+known to enable additional features and improve overall testsuite
results.
@html
[gcc r14-10198] doc: Describe limitations re Ada, D, and Go on FreeBSD
https://gcc.gnu.org/g:80ccc90be4aee9f87f468e04c5b97d6b9583ae7e
commit r14-10198-g80ccc90be4aee9f87f468e04c5b97d6b9583ae7e
Author: Gerald Pfeifer
Date: Sun May 12 15:31:33 2024 +0200
doc: Describe limitations re Ada, D, and Go on FreeBSD
gcc:
PR target/69374
PR target/112959
* doc/install.texi (Specific) <*-*-freebsd*>: The Ada and D
run-time libraries are broken on i386 which also can affect
64-bit builds. Go is broken.
(cherry picked from commit ff98aab108a6a4e50a831e7cfc011c2131f8d19c)
Diff:
---
gcc/doc/install.texi | 8
1 file changed, 8 insertions(+)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index b1d28dcb03be..9f2e427be68b 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -4099,6 +4099,14 @@ version found in the @file{devel/binutils} port. This
also has been
known to enable additional features and improve overall testsuite
results.
+@c Bugs 112958 and 112957
+Ada and D (or rather their respective libraries) are broken on
+FreeBSD/i386. This also affects building 32-bit libraries on
+FreeBSD/amd64, so configure with @option{--disable-multilib}
+there in case you are building one of these front ends.
+
+Go (or rather libgo) is generally broken on FreeBSD.
+
@html
@end html
[gcc r15-390] arm: Use utxb rN, rM, ror #8 to implement zero_extract on armv6.
https://gcc.gnu.org/g:46077992180d6d86c86544df5e8cb943492d3b01
commit r15-390-g46077992180d6d86c86544df5e8cb943492d3b01
Author: Roger Sayle
Date: Sun May 12 16:27:22 2024 +0100
arm: Use utxb rN, rM, ror #8 to implement zero_extract on armv6.
Examining the code generated for the following C snippet on a
raspberry pi:
int popcount_lut8(unsigned *buf, int n)
{
int cnt=0;
unsigned int i;
do {
i = *buf;
cnt += lut[i&255];
cnt += lut[i>>8&255];
cnt += lut[i>>16&255];
cnt += lut[i>>24];
buf++;
} while(--n);
return cnt;
}
I was surprised to see following instruction sequence generated by the
compiler:
movr5, r2, lsr #8
uxtb r5, r5
This sequence can be performed by a single ARM instruction:
uxtb r5, r2, ror #8
The attached patch allows GCC's combine pass to take advantage of ARM's
uxtb with rotate functionality to implement the above zero_extract, and
likewise to use the sxtb with rotate to implement sign_extract. ARM's
uxtb and sxtb can only be used with rotates of 0, 8, 16 and 24, and of
these only the 8 and 16 are useful [ror #0 is a nop, and extends with
ror #24 can be implemented using regular shifts], so the approach here
is to add the six missing but useful instructions as 6 different
define_insn in arm.md, rather than try to be clever with new predicates.
Later ARM hardware has advanced bit field instructions, and earlier
ARM cores didn't support extend-with-rotate, so this appears to only
benefit armv6 era CPUs (e.g. the raspberry pi).
Patch posted:
https://gcc.gnu.org/legacy-ml/gcc-patches/2018-01/msg01339.html
Approved by Kyrill Tkachov:
https://gcc.gnu.org/legacy-ml/gcc-patches/2018-01/msg01881.html
2024-05-12 Roger Sayle
Kyrill Tkachov
* config/arm/arm.md (*arm_zeroextractsi2_8_8,
*arm_signextractsi2_8_8,
*arm_zeroextractsi2_8_16, *arm_signextractsi2_8_16,
*arm_zeroextractsi2_16_8, *arm_signextractsi2_16_8): New.
2024-05-12 Roger Sayle
Kyrill Tkachov
* gcc.target/arm/extend-ror.c: New test.
Diff:
---
gcc/config/arm/arm.md | 66 +++
gcc/testsuite/gcc.target/arm/extend-ror.c | 38 ++
2 files changed, 104 insertions(+)
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 1fd00146ca9e..f47e036a8034 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -12647,6 +12647,72 @@
""
)
+;; Implement zero_extract using uxtb/uxth instruction with
+;; the ror #N qualifier when applicable.
+
+(define_insn "*arm_zeroextractsi2_8_8"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (zero_extract:SI (match_operand:SI 1 "s_register_operand" "r")
+(const_int 8) (const_int 8)))]
+ "TARGET_ARM && arm_arch6"
+ "uxtb%?\\t%0, %1, ror #8"
+ [(set_attr "predicable" "yes")
+ (set_attr "type" "extend")]
+)
+
+(define_insn "*arm_zeroextractsi2_8_16"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (zero_extract:SI (match_operand:SI 1 "s_register_operand" "r")
+(const_int 8) (const_int 16)))]
+ "TARGET_ARM && arm_arch6"
+ "uxtb%?\\t%0, %1, ror #16"
+ [(set_attr "predicable" "yes")
+ (set_attr "type" "extend")]
+)
+
+(define_insn "*arm_zeroextractsi2_16_8"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (zero_extract:SI (match_operand:SI 1 "s_register_operand" "r")
+(const_int 16) (const_int 8)))]
+ "TARGET_ARM && arm_arch6"
+ "uxth%?\\t%0, %1, ror #8"
+ [(set_attr "predicable" "yes")
+ (set_attr "type" "extend")]
+)
+
+;; Implement sign_extract using sxtb/sxth instruction with
+;; the ror #N qualifier when applicable.
+
+(define_insn "*arm_signextractsi2_8_8"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r")
+(const_int 8) (const_int 8)))]
+ "TARGET_ARM && arm_arch6"
+ "sxtb%?\\t%0, %1, ror #8"
+ [(set_attr "predicable" "yes")
+ (set_attr "type" "extend")]
+)
+
+(define_insn "*arm_signextractsi2_8_16"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r")
+(const_int 8) (const_int 16)))]
+ "TARGET_ARM && arm_arch6"
+ "sxtb%?\\t%0, %1, ror #16"
+ [(set_attr "predicable" "yes")
+ (set_attr "type" "extend")]
+)
+
+(define_insn "*arm_signextractsi2_16_8"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r")
+(const_int 16) (const_int 8)))]
+ "TARGET_ARM && arm_arch6"
+ "sxth%?\\t%0, %1, ror #8"
+ [(set_attr "predicable" "yes")
+ (set_attr "type"
[gcc r15-391] Fortran: fix frontend memleak
https://gcc.gnu.org/g:13b6ac4ebd04f0703d92828c9268b0b216890b0d commit r15-391-g13b6ac4ebd04f0703d92828c9268b0b216890b0d Author: Harald Anlauf Date: Sun May 12 21:48:03 2024 +0200 Fortran: fix frontend memleak gcc/fortran/ChangeLog: * primary.cc (gfc_match_varspec): Replace 'ref' argument to is_inquiry_ref() by NULL when the result is not needed to avoid a memleak. Diff: --- gcc/fortran/primary.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/fortran/primary.cc b/gcc/fortran/primary.cc index 606e84432be6..8e7833769a8f 100644 --- a/gcc/fortran/primary.cc +++ b/gcc/fortran/primary.cc @@ -2250,7 +2250,7 @@ gfc_match_varspec (gfc_expr *primary, int equiv_flag, bool sub_flag, can be found. If this was an inquiry reference with the same name as a derived component and the associate-name type is not derived or class, this is fixed up in 'gfc_fixup_inferred_type_refs'. */ - if (mm == MATCH_YES && is_inquiry_ref (name, &tmp) + if (mm == MATCH_YES && is_inquiry_ref (name, NULL) && !(sym->ts.type == BT_UNKNOWN && gfc_find_derived_types (sym, gfc_current_ns, name))) inquiry = true;
[gcc r15-392] MAINTAINERS: Add myself to write after approval
https://gcc.gnu.org/g:4aeff8436d54a598e1fb565ec7b656871bd3a41e commit r15-392-g4aeff8436d54a598e1fb565ec7b656871bd3a41e Author: Xiao Zeng Date: Mon May 13 09:53:42 2024 +0800 MAINTAINERS: Add myself to write after approval ChangeLog: * MAINTAINERS: Add myself. Diff: --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 71e02abc4263..361059fd55c6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -738,6 +738,7 @@ Kwok Cheung Yeung Greta Yorsh David Yuste Adhemerval Zanella +Xiao Zeng Dennis Zhang Yufeng Zhang Qing Zhao
[gcc r15-393] Revert "MIPS: Support constraint 'w' for MSA instruction"
https://gcc.gnu.org/g:0c6dd4b0973738ce43e76b468a002ab5eb58aaf4
commit r15-393-g0c6dd4b0973738ce43e76b468a002ab5eb58aaf4
Author: YunQiang Su
Date: Mon May 13 14:15:38 2024 +0800
Revert "MIPS: Support constraint 'w' for MSA instruction"
This reverts commit 9ba01240864ac446052d97692e2199539b7c76d8.
It is not needed at all:
asm volatile ("fmadd.d %w0, %1, %2" : "+f"(a) : "f"(b), "f"(c))
is OK for us.
Diff:
---
gcc/config/mips/constraints.md | 3 ---
gcc/testsuite/gcc.target/mips/msa-inline-asm.c | 9 -
2 files changed, 12 deletions(-)
diff --git a/gcc/config/mips/constraints.md b/gcc/config/mips/constraints.md
index f5c881790382..a96028dd7460 100644
--- a/gcc/config/mips/constraints.md
+++ b/gcc/config/mips/constraints.md
@@ -29,9 +29,6 @@
(define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
"A floating-point register (if available).")
-(define_register_constraint "w" "ISA_HAS_MSA ? FP_REGS : NO_REGS"
- "A MIPS SIMD register (if available).")
-
(define_register_constraint "h" "NO_REGS"
"Formerly the @code{hi} register. This constraint is no longer supported.")
diff --git a/gcc/testsuite/gcc.target/mips/msa-inline-asm.c
b/gcc/testsuite/gcc.target/mips/msa-inline-asm.c
deleted file mode 100644
index bdf6816ab3b4..
--- a/gcc/testsuite/gcc.target/mips/msa-inline-asm.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-mno-mips16 -mfp64 -mhard-float -mmsa" } */
-
-double
-f(double a, double b, double c) {
- asm volatile ("fmadd.d %w0, %w1, %w2" : "+w"(a): "w"(b), "w"(c));
- return a;
-}
-/* { dg-final { scan-assembler "fmadd.d \\\$w0, \\\$w\[0-9\]*, \\\$w\[0-9\]*"
} } */
[gcc r15-394] Fortran: Fix wrong code in unlimited polymorphic assignment [PR113363]
https://gcc.gnu.org/g:2d0eeb529d400e61197a09c56011be976dd81ef0
commit r15-394-g2d0eeb529d400e61197a09c56011be976dd81ef0
Author: Paul Thomas
Date: Mon May 13 07:27:20 2024 +0100
Fortran: Fix wrong code in unlimited polymorphic assignment [PR113363]
2024-05-13 Paul Thomas
gcc/fortran
PR fortran/113363
* trans-array.cc (gfc_array_init_size): Use the expr3 dtype so
that the correct element size is used.
* trans-expr.cc (gfc_conv_procedure_call): Remove restriction
that ss and ss->loop be present for the finalization of class
array function results.
(trans_class_assignment): Use free and malloc, rather than
realloc, for character expressions assigned to unlimited poly
entities.
* trans-stmt.cc (gfc_trans_allocate): Build a correct rhs for
the assignment of an unlimited polymorphic 'source'.
gcc/testsuite/
PR fortran/113363
* gfortran.dg/pr113363.f90: New test.
Diff:
---
gcc/fortran/trans-array.cc | 5 ++
gcc/fortran/trans-expr.cc | 34 --
gcc/fortran/trans-stmt.cc | 40
gcc/testsuite/gfortran.dg/pr113363.f90 | 86 ++
4 files changed, 151 insertions(+), 14 deletions(-)
diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 7ec33fb15986..c5b56f4e2735 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -5957,6 +5957,11 @@ gfc_array_init_size (tree descriptor, int rank, int
corank, tree * poffset,
tmp = gfc_conv_descriptor_dtype (descriptor);
gfc_add_modify (pblock, tmp, gfc_get_dtype_rank_type (rank, type));
}
+ else if (expr3_desc && GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (expr3_desc)))
+{
+ tmp = gfc_conv_descriptor_dtype (descriptor);
+ gfc_add_modify (pblock, tmp, gfc_conv_descriptor_dtype (expr3_desc));
+}
else
{
tmp = gfc_conv_descriptor_dtype (descriptor);
diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index 4590aa6edb44..e315e2d33701 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -8245,8 +8245,7 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym,
call the finalization function of the temporary. Note that the
nullification of allocatable components needed by the result
is done in gfc_trans_assignment_1. */
- if (expr && ((gfc_is_class_array_function (expr)
- && se->ss && se->ss->loop)
+ if (expr && (gfc_is_class_array_function (expr)
|| gfc_is_alloc_class_scalar_function (expr))
&& se->expr && GFC_CLASS_TYPE_P (TREE_TYPE (se->expr))
&& expr->must_finalize)
@@ -12028,18 +12027,25 @@ trans_class_assignment (stmtblock_t *block, gfc_expr
*lhs, gfc_expr *rhs,
/* Reallocate if dynamic types are different. */
gfc_init_block (&re_alloc);
- tmp = fold_convert (pvoid_type_node, class_han);
- re = build_call_expr_loc (input_location,
- builtin_decl_explicit (BUILT_IN_REALLOC), 2,
- tmp, size);
- re = fold_build2_loc (input_location, MODIFY_EXPR, TREE_TYPE (tmp), tmp,
- re);
- tmp = fold_build2_loc (input_location, NE_EXPR,
-logical_type_node, rhs_vptr, old_vptr);
- re = fold_build3_loc (input_location, COND_EXPR, void_type_node,
- tmp, re, build_empty_stmt (input_location));
- gfc_add_expr_to_block (&re_alloc, re);
-
+ if (UNLIMITED_POLY (lhs) && rhs->ts.type == BT_CHARACTER)
+ {
+ gfc_add_expr_to_block (&re_alloc, gfc_call_free (class_han));
+ gfc_allocate_using_malloc (&re_alloc, class_han, size, NULL_TREE);
+ }
+ else
+ {
+ tmp = fold_convert (pvoid_type_node, class_han);
+ re = build_call_expr_loc (input_location,
+ builtin_decl_explicit (BUILT_IN_REALLOC),
+ 2, tmp, size);
+ re = fold_build2_loc (input_location, MODIFY_EXPR, TREE_TYPE (tmp),
+ tmp, re);
+ tmp = fold_build2_loc (input_location, NE_EXPR,
+logical_type_node, rhs_vptr, old_vptr);
+ re = fold_build3_loc (input_location, COND_EXPR, void_type_node,
+ tmp, re, build_empty_stmt (input_location));
+ gfc_add_expr_to_block (&re_alloc, re);
+ }
tree realloc_expr = lhs->ts.type == BT_CLASS ?
gfc_finish_block (&re_alloc) :
build_empty_stmt (input_location);
diff --git a/gcc/fortran/trans-stmt.cc b/gcc/fortran/trans-stmt.cc
index d355009fa5e4..9b497d6bdc60 100644
--- a/gcc/fortran/trans-stmt.cc
+++ b/gcc/for
