[gcc r14-9961] c++: Only emit exported GMF usings [PR114600]
https://gcc.gnu.org/g:3878e9aeb30cb192f769997c52743daf8190744c
commit r14-9961-g3878e9aeb30cb192f769997c52743daf8190744c
Author: Nathaniel Shead
Date: Mon Apr 8 23:34:42 2024 +1000
c++: Only emit exported GMF usings [PR114600]
A typo in r14-6978 made us emit too many things. This ensures that we
don't emit using-declarations from the GMF that we don't need to.
PR c++/114600
gcc/cp/ChangeLog:
* module.cc (depset::hash::add_binding_entity): Require both
WMB_Using and WMB_Export for GMF entities.
gcc/testsuite/ChangeLog:
* g++.dg/modules/using-14.C: New test.
Signed-off-by: Nathaniel Shead
Co-authored-by: Patrick Palka
Diff:
---
gcc/cp/module.cc| 2 +-
gcc/testsuite/g++.dg/modules/using-14.C | 14 ++
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc
index 001430a4a8f..d94d8ff4df9 100644
--- a/gcc/cp/module.cc
+++ b/gcc/cp/module.cc
@@ -13090,7 +13090,7 @@ depset::hash::add_binding_entity (tree decl, WMB_Flags
flags, void *data_)
inner = DECL_TEMPLATE_RESULT (inner);
if ((!DECL_LANG_SPECIFIC (inner) || !DECL_MODULE_PURVIEW_P (inner))
- && !(flags & (WMB_Using | WMB_Export)))
+ && !((flags & WMB_Using) && (flags & WMB_Export)))
/* Ignore global module fragment entities unless explicitly
exported with a using declaration. */
return false;
diff --git a/gcc/testsuite/g++.dg/modules/using-14.C
b/gcc/testsuite/g++.dg/modules/using-14.C
new file mode 100644
index 000..0e15a952de5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/modules/using-14.C
@@ -0,0 +1,14 @@
+// PR c++/114600
+// { dg-additional-options "-fmodules-ts -Wno-global-module
-fdump-lang-module" }
+// { dg-module-cmi M }
+
+module;
+namespace std {
+ template struct A { int n; };
+ template A f();
+ namespace __swappable_details { using std::f; }
+}
+export module M;
+
+// The whole GMF should be discarded here
+// { dg-final { scan-lang-dump "Wrote 0 clusters" module } }
[gcc r14-9962] attribs: Don't crash on NULL TREE_TYPE in diag_attr_exclusions [PR114634]
https://gcc.gnu.org/g:7ec54f5fdfec298812a749699874db4d6a7246bb
commit r14-9962-g7ec54f5fdfec298812a749699874db4d6a7246bb
Author: Jakub Jelinek
Date: Mon Apr 15 10:25:22 2024 +0200
attribs: Don't crash on NULL TREE_TYPE in diag_attr_exclusions [PR114634]
The enumerator still doesn't have TREE_TYPE set but diag_attr_exclusions
assumes that all decls must have types.
I think it is better in something as unimportant as diag_attr_exclusions
to be more robust, if there is no type, it can just diagnose exclusions
on the DECL_ATTRIBUTES, like for types it only diagnoses it on
TYPE_ATTRIBUTES.
2024-04-15 Jakub Jelinek
PR c++/114634
* attribs.cc (diag_attr_exclusions): Set attrs[1] to NULL_TREE for
decls with NULL TREE_TYPE.
* g++.dg/ext/attrib68.C: New test.
Diff:
---
gcc/attribs.cc | 7 ++-
gcc/testsuite/g++.dg/ext/attrib68.C | 8
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/gcc/attribs.cc b/gcc/attribs.cc
index fc7459c3850..12ffc5f170a 100644
--- a/gcc/attribs.cc
+++ b/gcc/attribs.cc
@@ -468,7 +468,12 @@ diag_attr_exclusions (tree last_decl, tree node, tree
attrname,
if (DECL_P (node))
{
attrs[0] = DECL_ATTRIBUTES (node);
- attrs[1] = TYPE_ATTRIBUTES (TREE_TYPE (node));
+ if (TREE_TYPE (node))
+ attrs[1] = TYPE_ATTRIBUTES (TREE_TYPE (node));
+ else
+ /* TREE_TYPE can be NULL e.g. while processing attributes on
+ enumerators. */
+ attrs[1] = NULL_TREE;
}
else
{
diff --git a/gcc/testsuite/g++.dg/ext/attrib68.C
b/gcc/testsuite/g++.dg/ext/attrib68.C
new file mode 100644
index 000..be3b1108491
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/attrib68.C
@@ -0,0 +1,8 @@
+// PR c++/114634
+// { dg-do compile }
+
+template
+struct A
+{
+ enum { e __attribute__ ((aligned (16))) }; // { dg-error "alignment may
not be specified for 'e'" }
+};
[gcc r14-9963] testsuite: i386: Restrict gcc.target/i386/fhardened-1.c etc. to Linux/GNU
https://gcc.gnu.org/g:7f4ba5480e0ee5c03317d24d3fa858c0966f3464
commit r14-9963-g7f4ba5480e0ee5c03317d24d3fa858c0966f3464
Author: Rainer Orth
Date: Mon Apr 15 11:16:23 2024 +0200
testsuite: i386: Restrict gcc.target/i386/fhardened-1.c etc. to Linux/GNU
The new gcc.target/i386/fhardened-1.c etc. tests FAIL on Solaris/x86 and
Darwin/x86:
FAIL: gcc.target/i386/fhardened-1.c (test for excess errors)
FAIL: gcc.target/i386/fhardened-2.c (test for excess errors)
Excess errors:
cc1: warning: '-fhardened' not supported for this target
Support for -fhardened is restricted to HAVE_FHARDENED_SUPPORT in
toplev.cc (process_options) which again is only defined for linux*|gnu*
targets in gcc/configure.ac.
Accordingly, this patch restricts the tests to those two, as is already
done in gcc.target/i386/cf_check-6.c.
Tested on i386-pc-solaris2.11 and x86_64-pc-linux-gnu.
2024-04-15 Rainer Orth
gcc/testsuite:
* gcc.target/i386/fhardened-1.c: Restrict to Linux/GNU.
* gcc.target/i386/fhardened-2.c: Likewise.
Diff:
---
gcc/testsuite/gcc.target/i386/fhardened-1.c | 1 +
gcc/testsuite/gcc.target/i386/fhardened-2.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/gcc/testsuite/gcc.target/i386/fhardened-1.c
b/gcc/testsuite/gcc.target/i386/fhardened-1.c
index 55d1718ff55..f51820e285f 100644
--- a/gcc/testsuite/gcc.target/i386/fhardened-1.c
+++ b/gcc/testsuite/gcc.target/i386/fhardened-1.c
@@ -1,4 +1,5 @@
/* PR target/114606 */
+/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
/* { dg-options "-fhardened -O2 -fcf-protection=none" } */
#ifdef __CET__
diff --git a/gcc/testsuite/gcc.target/i386/fhardened-2.c
b/gcc/testsuite/gcc.target/i386/fhardened-2.c
index 9b8c1381c19..ed2a6744921 100644
--- a/gcc/testsuite/gcc.target/i386/fhardened-2.c
+++ b/gcc/testsuite/gcc.target/i386/fhardened-2.c
@@ -1,4 +1,5 @@
/* PR target/114606 */
+/* { dg-do compile { target *-*-linux* *-*-gnu* } } */
/* { dg-options "-fhardened -O2" } */
#if __CET__ != 3
[gcc r14-9964] Remove 'libgrust/libproc_macro_internal' from 'gcc/rust/Make-lang.in:RUST_LDFLAGS'
https://gcc.gnu.org/g:cb70a49b30f0a22ec7a1b7df29c3ab370d603f90 commit r14-9964-gcb70a49b30f0a22ec7a1b7df29c3ab370d603f90 Author: Thomas Schwinge Date: Wed Feb 28 22:41:42 2024 +0100 Remove 'libgrust/libproc_macro_internal' from 'gcc/rust/Make-lang.in:RUST_LDFLAGS' This isn't necessary, as the full path to 'libproc_macro_internal.a' is specified elsewhere. gcc/rust/ * Make-lang.in (RUST_LDFLAGS): Remove 'libgrust/libproc_macro_internal'. Diff: --- gcc/rust/Make-lang.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/rust/Make-lang.in b/gcc/rust/Make-lang.in index 4d73412739d..e901668b93d 100644 --- a/gcc/rust/Make-lang.in +++ b/gcc/rust/Make-lang.in @@ -208,7 +208,7 @@ RUST_ALL_OBJS = $(GRS_OBJS) $(RUST_TARGET_OBJS) rust_OBJS = $(RUST_ALL_OBJS) rust/rustspec.o -RUST_LDFLAGS = $(LDFLAGS) -L./../libgrust/libproc_macro_internal +RUST_LDFLAGS = $(LDFLAGS) RUST_LIBDEPS = $(LIBDEPS) ../libgrust/libproc_macro_internal/libproc_macro_internal.a # The compiler itself is called crab1
[gcc r14-9969] middle-end: adjust loop upper bounds when peeling for gaps and early break [PR114403].
https://gcc.gnu.org/g:85002f8085c25bb3e74ab013581a74e7c7ae006b
commit r14-9969-g85002f8085c25bb3e74ab013581a74e7c7ae006b
Author: Tamar Christina
Date: Mon Apr 15 12:06:21 2024 +0100
middle-end: adjust loop upper bounds when peeling for gaps and early break
[PR114403].
This fixes a bug with the interaction between peeling for gaps and early
break.
Before I go further, I'll first explain how I understand this to work for
loops
with a single exit.
When peeling for gaps we peel N < VF iterations to scalar.
This happens by removing N iterations from the calculation of niters such
that
vect_iters * VF == niters is always false.
In other words, when we exit the vector loop we always fall to the scalar
loop.
The loop bounds adjustment guarantees this. Because of this we potentially
execute a vector loop iteration less. That is, if you're at the boundary
condition where niters % VF by peeling one or more scalar iterations the
vector
loop executes one less.
This is accounted for by the adjustments in vect_transform_loops. This
adjustment happens differently based on whether the the vector loop can be
partial or not:
Peeling for gaps sets the bias to 0 and then:
when not partial: we take the floor of (scalar_upper_bound / VF) - 1 to
get the
vector latch iteration count.
when loop is partial: For a single exit this means the loop is masked, we
take
the ceil to account for the fact that the loop can
handle
the final partial iteration using masking.
Note that there's no difference between ceil an floor on the boundary
condition.
There is a difference however when you're slightly above it. i.e. if scalar
iterates 14 times and VF = 4 and we peel 1 iteration for gaps.
The partial loop does ((13 + 0) / 4) - 1 == 2 vector iterations. and in
effect
the partial iteration is ignored and it's done as scalar.
This is fine because the niters modification has capped the vector
iteration at
2. So that when we reduce the induction values you end up entering the
scalar
code with ind_var.2 = ind_var.1 + 2 * VF.
Now lets look at early breaks. To make it esier I'll focus on the specific
testcase:
char buffer[64];
__attribute__ ((noipa))
buff_t *copy (buff_t *first, buff_t *last)
{
char *buffer_ptr = buffer;
char *const buffer_end = &buffer[SZ-1];
int store_size = sizeof(first->Val);
while (first != last && (buffer_ptr + store_size) <= buffer_end)
{
const char *value_data = (const char *)(&first->Val);
__builtin_memcpy(buffer_ptr, value_data, store_size);
buffer_ptr += store_size;
++first;
}
if (first == last)
return 0;
return first;
}
Here the first, early exit is on the condition:
(buffer_ptr + store_size) <= buffer_end
and the main exit is on condition:
first != last
This is important, as this bug only manifests itself when the first exit
has a
known constant iteration count that's lower than the latch exit count.
because buffer holds 64 bytes, and VF = 4, unroll = 2, we end up processing
16
bytes per iteration. So the exit has a known bounds of 8 + 1.
The vectorizer correctly analizes this:
Statement (exit)if (ivtmp_21 != 0)
is executed at most 8 (bounded by 8) + 1 times in loop 1.
and as a consequence the IV is bound by 9:
# vect_vec_iv_.14_117 = PHI <_118(9), { 9, 8, 7, 6 }(20)>
...
vect_ivtmp_21.16_124 = vect_vec_iv_.14_117 + { 18446744073709551615,
18446744073709551615, 18446744073709551615, 18446744073709551615 };
mask_patt_22.17_126 = vect_ivtmp_21.16_124 != { 0, 0, 0, 0 };
if (mask_patt_22.17_126 == { -1, -1, -1, -1 })
goto ; [88.89%]
else
goto ; [11.11%]
The imporant bits are this:
In this example the value of last - first = 416.
the calculated vector iteration count, is:
x = (((ptr2 - ptr1) - 16) / 16) + 1 = 27
the bounds generated, adjusting for gaps:
x == (((x - 1) >> 2) << 2)
which means we'll always fall through to the scalar code. as intended.
Here are two key things to note:
1. In this loop, the early exit will always be the one taken. When it's
taken
we enter the scalar loop with the correct induction value to apply the
gap
peeling.
2. If the main exit is taken, the induction values assumes you've finished
all
vector iterations. i.e. it assumes you have completed 24 iterations, as
we
treat the main exit the same for normal loop vect and early break when
not
PEELED.
This means the induction value is adjusted to ind_
[gcc r13-8604] AArch64: Do not allow SIMD clones with simdlen 1 [PR113552]
https://gcc.gnu.org/g:1e08e39c743692afdd5d3546b2223474beac1dbc
commit r13-8604-g1e08e39c743692afdd5d3546b2223474beac1dbc
Author: Tamar Christina
Date: Mon Apr 15 12:11:48 2024 +0100
AArch64: Do not allow SIMD clones with simdlen 1 [PR113552]
This is a backport of g:306713c953d509720dc394c43c0890548bb0ae07.
The AArch64 vector PCS does not allow simd calls with simdlen 1,
however due to a bug we currently do allow it for num == 0.
This causes us to emit a symbol that doesn't exist and we fail to link.
gcc/ChangeLog:
PR tree-optimization/113552
* config/aarch64/aarch64.cc
(aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1.
gcc/testsuite/ChangeLog:
PR tree-optimization/113552
* gcc.target/aarch64/pr113552.c: New test.
* gcc.target/aarch64/simd_pcs_attribute-3.c: Remove bogus check.
Diff:
---
gcc/config/aarch64/aarch64.cc | 16 +---
gcc/testsuite/gcc.target/aarch64/pr113552.c | 17 +
gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c | 4 ++--
3 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index f6d14cd791a..b8a4ab1b980 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -27029,7 +27029,7 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct
cgraph_node *node,
bool explicit_p)
{
tree t, ret_type;
- unsigned int elt_bits, count;
+ unsigned int elt_bits, count = 0;
unsigned HOST_WIDE_INT const_simdlen;
poly_uint64 vec_bits;
@@ -27102,8 +27102,17 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct
cgraph_node *node,
elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type));
if (known_eq (clonei->simdlen, 0U))
{
- count = 2;
- vec_bits = (num == 0 ? 64 : 128);
+ /* We don't support simdlen == 1. */
+ if (known_eq (elt_bits, 64))
+ {
+ count = 1;
+ vec_bits = 128;
+ }
+ else
+ {
+ count = 2;
+ vec_bits = (num == 0 ? 64 : 128);
+ }
clonei->simdlen = exact_div (vec_bits, elt_bits);
}
else
@@ -27123,6 +27132,7 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct
cgraph_node *node,
return 0;
}
}
+
clonei->vecsize_int = vec_bits;
clonei->vecsize_float = vec_bits;
return count;
diff --git a/gcc/testsuite/gcc.target/aarch64/pr113552.c
b/gcc/testsuite/gcc.target/aarch64/pr113552.c
new file mode 100644
index 000..9c96b061ed2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr113552.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -march=armv8-a" } */
+
+__attribute__ ((__simd__ ("notinbranch"), const))
+double cos (double);
+
+void foo (float *a, double *b)
+{
+for (int i = 0; i < 12; i+=3)
+ {
+b[i] = cos (5.0 * a[i]);
+b[i+1] = cos (5.0 * a[i+1]);
+b[i+2] = cos (5.0 * a[i+2]);
+ }
+}
+
+/* { dg-final { scan-assembler-times {bl\t_ZGVnN2v_cos} 6 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
b/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
index 95f6a6803e8..c6dac6b104c 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
@@ -18,7 +18,7 @@ double foo(double x)
}
/* { dg-final { scan-assembler-not {\.variant_pcs\tfoo} } } */
-/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM1v_foo} 1 } } */
+/* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnM1v_foo} } } */
/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM2v_foo} 1 } } */
-/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN1v_foo} 1 } } */
+/* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnN1v_foo} } } */
/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN2v_foo} 1 } } */
[gcc r14-9970] x86: Allow TImode offsettable memory only with 8-bit constant
https://gcc.gnu.org/g:a3281dd0f4b46c16ec1192ad411c0a96e6d086eb commit r14-9970-ga3281dd0f4b46c16ec1192ad411c0a96e6d086eb Author: H.J. Lu Date: Fri Apr 12 15:42:12 2024 -0700 x86: Allow TImode offsettable memory only with 8-bit constant The x86 instruction size limit is 15 bytes. If a NDD instruction has a segment prefix byte, a 4-byte opcode prefix, a MODRM byte, a SIB byte, a 4-byte displacement and a 4-byte immediate, adding an address size prefix will exceed the size limit. Change TImode ADD, AND, OR and XOR to allow offsettable memory only with 8-bit signed integer constant, which is encoded with a 1-byte immediate, if the address size prefix is used. gcc/ PR target/114696 * config/i386/i386.md (isa): Add apx_ndd_64. (enabled): Likewise. (*add3_doubleword): Change rjO to r,ro,jO with 8-bit signed integer constant and enable jO only for apx_ndd_64. (*add3_doubleword_cc_overflow_1): Likewise. (*and3_doubleword): Likewise. (*3_doubleword): Likewise. gcc/testsuite/ PR target/114696 * gcc.target/i386/apx-ndd-x32-2a.c: New test. * gcc.target/i386/apx-ndd-x32-2b.c: Likewise. * gcc.target/i386/apx-ndd-x32-2c.c: Likewise. * gcc.target/i386/apx-ndd-x32-2d.c: Likewise. Diff: --- gcc/config/i386/i386.md| 36 ++ gcc/testsuite/gcc.target/i386/apx-ndd-x32-2a.c | 13 ++ gcc/testsuite/gcc.target/i386/apx-ndd-x32-2b.c | 6 + gcc/testsuite/gcc.target/i386/apx-ndd-x32-2c.c | 6 + gcc/testsuite/gcc.target/i386/apx-ndd-x32-2d.c | 6 + 5 files changed, 50 insertions(+), 17 deletions(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index d4ce3809e6d..adab1ef9e04 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -568,7 +568,7 @@ ;; Used to control the "enabled" attribute on a per-instruction basis. (define_attr "isa" "base,x64,nox64,x64_sse2,x64_sse4,x64_sse4_noavx, - x64_avx,x64_avx512bw,x64_avx512dq,apx_ndd, + x64_avx,x64_avx512bw,x64_avx512dq,apx_ndd,apx_ndd_64, sse_noavx,sse2,sse2_noavx,sse3,sse3_noavx,sse4,sse4_noavx, avx,noavx,avx2,noavx2,bmi,bmi2,fma4,fma,avx512f,avx512f_512, noavx512f,avx512bw,avx512bw_512,noavx512bw,avx512dq, @@ -968,6 +968,8 @@ (symbol_ref "TARGET_VPCLMULQDQ && TARGET_AVX512VL") (eq_attr "isa" "apx_ndd") (symbol_ref "TARGET_APX_NDD") +(eq_attr "isa" "apx_ndd_64") + (symbol_ref "TARGET_APX_NDD && Pmode == DImode") (eq_attr "isa" "vaes_avx512vl") (symbol_ref "TARGET_VAES && TARGET_AVX512VL") @@ -6302,10 +6304,10 @@ }) (define_insn_and_split "*add3_doubleword" - [(set (match_operand: 0 "nonimmediate_operand" "=ro,r,&r,&r,&r") + [(set (match_operand: 0 "nonimmediate_operand" "=ro,r,&r,&r,&r,&r,&r") (plus: - (match_operand: 1 "nonimmediate_operand" "%0,0,ro,rjO,r") - (match_operand: 2 "x86_64_hilo_general_operand" "r,o,r,,r"))) + (match_operand: 1 "nonimmediate_operand" "%0,0,ro,r,ro,jO,r") + (match_operand: 2 "x86_64_hilo_general_operand" "r,o,r,,K,,r"))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (PLUS, mode, operands, TARGET_APX_NDD)" "#" @@ -6344,7 +6346,7 @@ DONE; } } -[(set_attr "isa" "*,*,apx_ndd,apx_ndd,apx_ndd")]) +[(set_attr "isa" "*,*,apx_ndd,apx_ndd,apx_ndd,apx_ndd_64,apx_ndd")]) (define_insn_and_split "*add3_doubleword_zext" [(set (match_operand: 0 "nonimmediate_operand" "=r,o,&r,&r") @@ -9515,10 +9517,10 @@ [(set (reg:CCC FLAGS_REG) (compare:CCC (plus: - (match_operand: 1 "nonimmediate_operand" "%0,0,ro,rjO,r") - (match_operand: 2 "x86_64_hilo_general_operand" "r,o,r,,o")) + (match_operand: 1 "nonimmediate_operand" "%0,0,ro,r,ro,jO,r") + (match_operand: 2 "x86_64_hilo_general_operand" "r,o,r,,K,,o")) (match_dup 1))) - (set (match_operand: 0 "nonimmediate_operand" "=ro,r,&r,&r,&r") + (set (match_operand: 0 "nonimmediate_operand" "=ro,r,&r,&r,&r,&r,&r") (plus: (match_dup 1) (match_dup 2)))] "ix86_binary_operator_ok (PLUS, mode, operands, TARGET_APX_NDD)" "#" @@ -9560,7 +9562,7 @@ else operands[6] = gen_rtx_ZERO_EXTEND (mode, operands[5]); } -[(set_attr "isa" "*,*,apx_ndd,apx_ndd,apx_ndd")]) +[(set_attr "isa" "*,*,apx_ndd,apx_ndd,apx_ndd,apx_ndd_64,apx_ndd")]) ;; x == 0 with zero flag test can be done also as x < 1U with carry flag ;; test, where the latter is preferrable if we have some carry consuming @@ -11704,10 +11706,10 @@ }) (define_insn_and_split "*and3_doubleword" - [(set (match_operand: 0 "nonimmediate_operand" "=ro,r,&r,&r,&r") + [(set (match_operand: 0 "nonimmediate_operand" "=ro,r,&r,&r,
[gcc r13-8606] tree-profile: Disable indirect call profiling for IFUNC resolvers
https://gcc.gnu.org/g:abe3a80aa2d6d53cc9b8c9f7c531e065451d5b6e
commit r13-8606-gabe3a80aa2d6d53cc9b8c9f7c531e065451d5b6e
Author: H.J. Lu
Date: Sun Apr 14 12:57:39 2024 -0700
tree-profile: Disable indirect call profiling for IFUNC resolvers
We can't profile indirect calls to IFUNC resolvers nor their callees as
it requires TLS which hasn't been set up yet when the dynamic linker is
resolving IFUNC symbols.
Add an IFUNC resolver caller marker to cgraph_node and set it if the
function is called by an IFUNC resolver. Disable indirect call profiling
for IFUNC resolvers and their callees.
Tested with profiledbootstrap on Fedora 39/x86-64.
gcc/ChangeLog:
PR tree-optimization/114115
* cgraph.h (symtab_node): Add check_ifunc_callee_symtab_nodes.
(cgraph_node): Add called_by_ifunc_resolver.
* cgraphunit.cc (symbol_table::compile): Call
symtab_node::check_ifunc_callee_symtab_nodes.
* symtab.cc (check_ifunc_resolver): New.
(ifunc_ref_map): Likewise.
(is_caller_ifunc_resolver): Likewise.
(symtab_node::check_ifunc_callee_symtab_nodes): Likewise.
* tree-profile.cc (gimple_gen_ic_func_profiler): Disable indirect
call profiling for IFUNC resolvers and their callees.
gcc/testsuite/ChangeLog:
PR tree-optimization/114115
* gcc.dg/pr114115.c: New test.
(cherry picked from commit cab32bacaea268ec062b1fb4fc662d90c9d1cfce)
Diff:
---
gcc/cgraph.h| 6 +++
gcc/cgraphunit.cc | 2 +
gcc/symtab.cc | 89 +
gcc/testsuite/gcc.dg/pr114115.c | 24 +++
gcc/tree-profile.cc | 8 +++-
5 files changed, 128 insertions(+), 1 deletion(-)
diff --git a/gcc/cgraph.h b/gcc/cgraph.h
index c1a3691b6f5..430c87d8bb7 100644
--- a/gcc/cgraph.h
+++ b/gcc/cgraph.h
@@ -479,6 +479,9 @@ public:
Return NULL if there's no such node. */
static symtab_node *get_for_asmname (const_tree asmname);
+ /* Check symbol table for callees of IFUNC resolvers. */
+ static void check_ifunc_callee_symtab_nodes (void);
+
/* Verify symbol table for internal consistency. */
static DEBUG_FUNCTION void verify_symtab_nodes (void);
@@ -896,6 +899,7 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public
symtab_node
redefined_extern_inline (false), tm_may_enter_irr (false),
ipcp_clone (false), declare_variant_alt (false),
calls_declare_variant_alt (false), gc_candidate (false),
+ called_by_ifunc_resolver (false),
m_uid (uid), m_summary_id (-1)
{}
@@ -1491,6 +1495,8 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node :
public symtab_node
is set for local SIMD clones when they are created and cleared if the
vectorizer uses them. */
unsigned gc_candidate : 1;
+ /* Set if the function is called by an IFUNC resolver. */
+ unsigned called_by_ifunc_resolver : 1;
private:
/* Unique id of the node. */
diff --git a/gcc/cgraphunit.cc b/gcc/cgraphunit.cc
index bccd2f2abb5..40dcceccca5 100644
--- a/gcc/cgraphunit.cc
+++ b/gcc/cgraphunit.cc
@@ -2313,6 +2313,8 @@ symbol_table::compile (void)
symtab_node::checking_verify_symtab_nodes ();
+ symtab_node::check_ifunc_callee_symtab_nodes ();
+
timevar_push (TV_CGRAPHOPT);
if (pre_ipa_mem_report)
dump_memory_report ("Memory consumption before IPA");
diff --git a/gcc/symtab.cc b/gcc/symtab.cc
index 0470509a98d..df09def81e9 100644
--- a/gcc/symtab.cc
+++ b/gcc/symtab.cc
@@ -1369,6 +1369,95 @@ symtab_node::verify (void)
timevar_pop (TV_CGRAPH_VERIFY);
}
+/* Return true and set *DATA to true if NODE is an ifunc resolver. */
+
+static bool
+check_ifunc_resolver (cgraph_node *node, void *data)
+{
+ if (node->ifunc_resolver)
+{
+ bool *is_ifunc_resolver = (bool *) data;
+ *is_ifunc_resolver = true;
+ return true;
+}
+ return false;
+}
+
+static auto_bitmap ifunc_ref_map;
+
+/* Return true if any caller of NODE is an ifunc resolver. */
+
+static bool
+is_caller_ifunc_resolver (cgraph_node *node)
+{
+ bool is_ifunc_resolver = false;
+
+ for (cgraph_edge *e = node->callers; e; e = e->next_caller)
+{
+ /* Return true if caller is known to be an IFUNC resolver. */
+ if (e->caller->called_by_ifunc_resolver)
+ return true;
+
+ /* Check for recursive call. */
+ if (e->caller == node)
+ continue;
+
+ /* Skip if it has been visited. */
+ unsigned int uid = e->caller->get_uid ();
+ if (bitmap_bit_p (ifunc_ref_map, uid))
+ continue;
+ bitmap_set_bit (ifunc_ref_map, uid);
+
+ if (is_caller_ifunc_resolver (e->caller))
+ {
+ /* Return true if caller is an IFUNC resolver. */
+ e->caller->called_by_ifunc_resolver = true;
+ return true;
+ }
+
+ /* Check if caller's al
[gcc r12-10329] AArch64: Do not allow SIMD clones with simdlen 1 [PR113552]
https://gcc.gnu.org/g:642cfd049780f03335da9fe0a51415f130232334
commit r12-10329-g642cfd049780f03335da9fe0a51415f130232334
Author: Tamar Christina
Date: Mon Apr 15 12:16:53 2024 +0100
AArch64: Do not allow SIMD clones with simdlen 1 [PR113552]
This is a backport of g:306713c953d509720dc394c43c0890548bb0ae07.
The AArch64 vector PCS does not allow simd calls with simdlen 1,
however due to a bug we currently do allow it for num == 0.
This causes us to emit a symbol that doesn't exist and we fail to link.
gcc/ChangeLog:
PR tree-optimization/113552
* config/aarch64/aarch64.cc
(aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1.
gcc/testsuite/ChangeLog:
PR tree-optimization/113552
* gcc.target/aarch64/pr113552.c: New test.
* gcc.target/aarch64/simd_pcs_attribute-3.c: Remove bogus check.
Diff:
---
gcc/config/aarch64/aarch64.cc | 16 +---
gcc/testsuite/gcc.target/aarch64/pr113552.c | 17 +
gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c | 4 ++--
3 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 2bbba323770..96976abdbf4 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -26898,7 +26898,7 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct
cgraph_node *node,
tree base_type, int num)
{
tree t, ret_type;
- unsigned int elt_bits, count;
+ unsigned int elt_bits, count = 0;
unsigned HOST_WIDE_INT const_simdlen;
poly_uint64 vec_bits;
@@ -26966,8 +26966,17 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct
cgraph_node *node,
elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type));
if (known_eq (clonei->simdlen, 0U))
{
- count = 2;
- vec_bits = (num == 0 ? 64 : 128);
+ /* We don't support simdlen == 1. */
+ if (known_eq (elt_bits, 64))
+ {
+ count = 1;
+ vec_bits = 128;
+ }
+ else
+ {
+ count = 2;
+ vec_bits = (num == 0 ? 64 : 128);
+ }
clonei->simdlen = exact_div (vec_bits, elt_bits);
}
else
@@ -26985,6 +26994,7 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct
cgraph_node *node,
return 0;
}
}
+
clonei->vecsize_int = vec_bits;
clonei->vecsize_float = vec_bits;
return count;
diff --git a/gcc/testsuite/gcc.target/aarch64/pr113552.c
b/gcc/testsuite/gcc.target/aarch64/pr113552.c
new file mode 100644
index 000..9c96b061ed2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr113552.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -march=armv8-a" } */
+
+__attribute__ ((__simd__ ("notinbranch"), const))
+double cos (double);
+
+void foo (float *a, double *b)
+{
+for (int i = 0; i < 12; i+=3)
+ {
+b[i] = cos (5.0 * a[i]);
+b[i+1] = cos (5.0 * a[i+1]);
+b[i+2] = cos (5.0 * a[i+2]);
+ }
+}
+
+/* { dg-final { scan-assembler-times {bl\t_ZGVnN2v_cos} 6 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
b/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
index 95f6a6803e8..c6dac6b104c 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
@@ -18,7 +18,7 @@ double foo(double x)
}
/* { dg-final { scan-assembler-not {\.variant_pcs\tfoo} } } */
-/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM1v_foo} 1 } } */
+/* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnM1v_foo} } } */
/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM2v_foo} 1 } } */
-/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN1v_foo} 1 } } */
+/* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnN1v_foo} } } */
/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN2v_foo} 1 } } */
[gcc r12-10331] tree-profile: Disable indirect call profiling for IFUNC resolvers
https://gcc.gnu.org/g:23049e851ebf840dffdd3f062dba0e795be347f8
commit r12-10331-g23049e851ebf840dffdd3f062dba0e795be347f8
Author: H.J. Lu
Date: Mon Feb 26 08:38:58 2024 -0800
tree-profile: Disable indirect call profiling for IFUNC resolvers
We can't profile indirect calls to IFUNC resolvers nor their callees as
it requires TLS which hasn't been set up yet when the dynamic linker is
resolving IFUNC symbols.
Add an IFUNC resolver caller marker to cgraph_node and set it if the
function is called by an IFUNC resolver. Disable indirect call profiling
for IFUNC resolvers and their callees.
Tested with profiledbootstrap on Fedora 39/x86-64.
gcc/ChangeLog:
PR tree-optimization/114115
* cgraph.h (symtab_node): Add check_ifunc_callee_symtab_nodes.
(cgraph_node): Add called_by_ifunc_resolver.
* cgraphunit.cc (symbol_table::compile): Call
symtab_node::check_ifunc_callee_symtab_nodes.
* symtab.cc (check_ifunc_resolver): New.
(ifunc_ref_map): Likewise.
(is_caller_ifunc_resolver): Likewise.
(symtab_node::check_ifunc_callee_symtab_nodes): Likewise.
* tree-profile.cc (gimple_gen_ic_func_profiler): Disable indirect
call profiling for IFUNC resolvers and their callees.
gcc/testsuite/ChangeLog:
PR tree-optimization/114115
* gcc.dg/pr114115.c: New test.
(cherry picked from commit cab32bacaea268ec062b1fb4fc662d90c9d1cfce)
Diff:
---
gcc/cgraph.h| 9 -
gcc/cgraphunit.cc | 2 +
gcc/symtab.cc | 89 +
gcc/testsuite/gcc.dg/pr114115.c | 24 +++
gcc/tree-profile.cc | 8 +++-
5 files changed, 130 insertions(+), 2 deletions(-)
diff --git a/gcc/cgraph.h b/gcc/cgraph.h
index d96690326d1..d58451657b1 100644
--- a/gcc/cgraph.h
+++ b/gcc/cgraph.h
@@ -476,6 +476,9 @@ public:
Return NULL if there's no such node. */
static symtab_node *get_for_asmname (const_tree asmname);
+ /* Check symbol table for callees of IFUNC resolvers. */
+ static void check_ifunc_callee_symtab_nodes (void);
+
/* Verify symbol table for internal consistency. */
static DEBUG_FUNCTION void verify_symtab_nodes (void);
@@ -892,7 +895,9 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public
symtab_node
versionable (false), can_change_signature (false),
redefined_extern_inline (false), tm_may_enter_irr (false),
ipcp_clone (false), declare_variant_alt (false),
- calls_declare_variant_alt (false), m_uid (uid), m_summary_id (-1)
+ calls_declare_variant_alt (false),
+ called_by_ifunc_resolver (false),
+ m_uid (uid), m_summary_id (-1)
{}
/* Remove the node from cgraph and all inline clones inlined into it.
@@ -1491,6 +1496,8 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node :
public symtab_node
unsigned declare_variant_alt : 1;
/* True if the function calls declare_variant_alt functions. */
unsigned calls_declare_variant_alt : 1;
+ /* Set if the function is called by an IFUNC resolver. */
+ unsigned called_by_ifunc_resolver : 1;
private:
/* Unique id of the node. */
diff --git a/gcc/cgraphunit.cc b/gcc/cgraphunit.cc
index 5aa7b57c9e1..1c899eaa12b 100644
--- a/gcc/cgraphunit.cc
+++ b/gcc/cgraphunit.cc
@@ -2265,6 +2265,8 @@ symbol_table::compile (void)
symtab_node::checking_verify_symtab_nodes ();
+ symtab_node::check_ifunc_callee_symtab_nodes ();
+
timevar_push (TV_CGRAPHOPT);
if (pre_ipa_mem_report)
dump_memory_report ("Memory consumption before IPA");
diff --git a/gcc/symtab.cc b/gcc/symtab.cc
index c6722a708e2..01502e76fc8 100644
--- a/gcc/symtab.cc
+++ b/gcc/symtab.cc
@@ -1368,6 +1368,95 @@ symtab_node::verify (void)
timevar_pop (TV_CGRAPH_VERIFY);
}
+/* Return true and set *DATA to true if NODE is an ifunc resolver. */
+
+static bool
+check_ifunc_resolver (cgraph_node *node, void *data)
+{
+ if (node->ifunc_resolver)
+{
+ bool *is_ifunc_resolver = (bool *) data;
+ *is_ifunc_resolver = true;
+ return true;
+}
+ return false;
+}
+
+static auto_bitmap ifunc_ref_map;
+
+/* Return true if any caller of NODE is an ifunc resolver. */
+
+static bool
+is_caller_ifunc_resolver (cgraph_node *node)
+{
+ bool is_ifunc_resolver = false;
+
+ for (cgraph_edge *e = node->callers; e; e = e->next_caller)
+{
+ /* Return true if caller is known to be an IFUNC resolver. */
+ if (e->caller->called_by_ifunc_resolver)
+ return true;
+
+ /* Check for recursive call. */
+ if (e->caller == node)
+ continue;
+
+ /* Skip if it has been visited. */
+ unsigned int uid = e->caller->get_uid ();
+ if (bitmap_bit_p (ifunc_ref_map, uid))
+ continue;
+ bitmap_set_bit (ifunc_ref_map, uid);
+
+ if (is_caller_ifunc_resolver (e->cal
[gcc r11-11321] tree-profile: Disable indirect call profiling for IFUNC resolvers
https://gcc.gnu.org/g:574d52a9b6e40a466b90f4810e72d3dd072d5160
commit r11-11321-g574d52a9b6e40a466b90f4810e72d3dd072d5160
Author: H.J. Lu
Date: Mon Feb 26 08:38:58 2024 -0800
tree-profile: Disable indirect call profiling for IFUNC resolvers
We can't profile indirect calls to IFUNC resolvers nor their callees as
it requires TLS which hasn't been set up yet when the dynamic linker is
resolving IFUNC symbols.
Add an IFUNC resolver caller marker to cgraph_node and set it if the
function is called by an IFUNC resolver. Disable indirect call profiling
for IFUNC resolvers and their callees.
Tested with profiledbootstrap on Fedora 39/x86-64.
gcc/ChangeLog:
PR tree-optimization/114115
* cgraph.h (symtab_node): Add check_ifunc_callee_symtab_nodes.
(cgraph_node): Add called_by_ifunc_resolver.
* cgraphunit.c (symbol_table::compile): Call
symtab_node::check_ifunc_callee_symtab_nodes.
* symtab.c (check_ifunc_resolver): New.
(ifunc_ref_map): Likewise.
(is_caller_ifunc_resolver): Likewise.
(symtab_node::check_ifunc_callee_symtab_nodes): Likewise.
* tree-profile.c (gimple_gen_ic_func_profiler): Disable indirect
call profiling for IFUNC resolvers and their callees.
gcc/testsuite/ChangeLog:
PR tree-optimization/114115
* gcc.dg/pr114115.c: New test.
(cherry picked from commit cab32bacaea268ec062b1fb4fc662d90c9d1cfce)
Diff:
---
gcc/cgraph.h| 9 -
gcc/cgraphunit.c| 2 +
gcc/symtab.c| 89 +
gcc/testsuite/gcc.dg/pr114115.c | 24 +++
gcc/tree-profile.c | 8 +++-
5 files changed, 130 insertions(+), 2 deletions(-)
diff --git a/gcc/cgraph.h b/gcc/cgraph.h
index 4a1f89920f5..8e6128bf25d 100644
--- a/gcc/cgraph.h
+++ b/gcc/cgraph.h
@@ -473,6 +473,9 @@ public:
Return NULL if there's no such node. */
static symtab_node *get_for_asmname (const_tree asmname);
+ /* Check symbol table for callees of IFUNC resolvers. */
+ static void check_ifunc_callee_symtab_nodes (void);
+
/* Verify symbol table for internal consistency. */
static DEBUG_FUNCTION void verify_symtab_nodes (void);
@@ -883,7 +886,9 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node : public
symtab_node
versionable (false), can_change_signature (false),
redefined_extern_inline (false), tm_may_enter_irr (false),
ipcp_clone (false), declare_variant_alt (false),
- calls_declare_variant_alt (false), m_uid (uid), m_summary_id (-1)
+ calls_declare_variant_alt (false),
+ called_by_ifunc_resolver (false),
+ m_uid (uid), m_summary_id (-1)
{}
/* Remove the node from cgraph and all inline clones inlined into it.
@@ -1475,6 +1480,8 @@ struct GTY((tag ("SYMTAB_FUNCTION"))) cgraph_node :
public symtab_node
unsigned declare_variant_alt : 1;
/* True if the function calls declare_variant_alt functions. */
unsigned calls_declare_variant_alt : 1;
+ /* Set if the function is called by an IFUNC resolver. */
+ unsigned called_by_ifunc_resolver : 1;
private:
/* Unique id of the node. */
diff --git a/gcc/cgraphunit.c b/gcc/cgraphunit.c
index 802b01d3b97..98c9a492e00 100644
--- a/gcc/cgraphunit.c
+++ b/gcc/cgraphunit.c
@@ -2273,6 +2273,8 @@ symbol_table::compile (void)
symtab_node::checking_verify_symtab_nodes ();
+ symtab_node::check_ifunc_callee_symtab_nodes ();
+
timevar_push (TV_CGRAPHOPT);
if (pre_ipa_mem_report)
dump_memory_report ("Memory consumption before IPA");
diff --git a/gcc/symtab.c b/gcc/symtab.c
index 5530a124a9d..04b8283199c 100644
--- a/gcc/symtab.c
+++ b/gcc/symtab.c
@@ -1363,6 +1363,95 @@ symtab_node::verify (void)
timevar_pop (TV_CGRAPH_VERIFY);
}
+/* Return true and set *DATA to true if NODE is an ifunc resolver. */
+
+static bool
+check_ifunc_resolver (cgraph_node *node, void *data)
+{
+ if (node->ifunc_resolver)
+{
+ bool *is_ifunc_resolver = (bool *) data;
+ *is_ifunc_resolver = true;
+ return true;
+}
+ return false;
+}
+
+static auto_bitmap ifunc_ref_map;
+
+/* Return true if any caller of NODE is an ifunc resolver. */
+
+static bool
+is_caller_ifunc_resolver (cgraph_node *node)
+{
+ bool is_ifunc_resolver = false;
+
+ for (cgraph_edge *e = node->callers; e; e = e->next_caller)
+{
+ /* Return true if caller is known to be an IFUNC resolver. */
+ if (e->caller->called_by_ifunc_resolver)
+ return true;
+
+ /* Check for recursive call. */
+ if (e->caller == node)
+ continue;
+
+ /* Skip if it has been visited. */
+ unsigned int uid = e->caller->get_uid ();
+ if (bitmap_bit_p (ifunc_ref_map, uid))
+ continue;
+ bitmap_set_bit (ifunc_ref_map, uid);
+
+ if (is_caller_ifunc_resolver (e->caller))
+
[gcc r11-11323] [AArch64]: Do not allow SIMD clones with simdlen 1 [PR113552]
https://gcc.gnu.org/g:0c2fcf3ddfe93d1f403962c4bacbb5d55ab7d19d
commit r11-11323-g0c2fcf3ddfe93d1f403962c4bacbb5d55ab7d19d
Author: Tamar Christina
Date: Mon Apr 15 12:32:24 2024 +0100
[AArch64]: Do not allow SIMD clones with simdlen 1 [PR113552]
This is a backport of g:306713c953d509720dc394c43c0890548bb0ae07.
The AArch64 vector PCS does not allow simd calls with simdlen 1,
however due to a bug we currently do allow it for num == 0.
This causes us to emit a symbol that doesn't exist and we fail to link.
gcc/ChangeLog:
PR tree-optimization/113552
* config/aarch64/aarch64.c
(aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1.
gcc/testsuite/ChangeLog:
PR tree-optimization/113552
* gcc.target/aarch64/pr113552.c: New test.
* gcc.target/aarch64/simd_pcs_attribute-3.c: Remove bogus check.
Diff:
---
gcc/config/aarch64/aarch64.c | 18 ++
gcc/testsuite/gcc.target/aarch64/pr113552.c| 17 +
.../gcc.target/aarch64/simd_pcs_attribute-3.c | 4 ++--
3 files changed, 33 insertions(+), 6 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 9bbbc5043af..4df72339952 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -25556,7 +25556,7 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct
cgraph_node *node,
tree base_type, int num)
{
tree t, ret_type;
- unsigned int elt_bits, count;
+ unsigned int elt_bits, count = 0;
unsigned HOST_WIDE_INT const_simdlen;
poly_uint64 vec_bits;
@@ -25624,11 +25624,20 @@ aarch64_simd_clone_compute_vecsize_and_simdlen
(struct cgraph_node *node,
elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type));
if (known_eq (clonei->simdlen, 0U))
{
- count = 2;
- vec_bits = (num == 0 ? 64 : 128);
+ /* We don't support simdlen == 1. */
+ if (known_eq (elt_bits, 64))
+ {
+ count = 1;
+ vec_bits = 128;
+ }
+ else
+ {
+ count = 2;
+ vec_bits = (num == 0 ? 64 : 128);
+ }
clonei->simdlen = exact_div (vec_bits, elt_bits);
}
- else
+ else if (maybe_ne (clonei->simdlen, 1U))
{
count = 1;
vec_bits = clonei->simdlen * elt_bits;
@@ -25643,6 +25652,7 @@ aarch64_simd_clone_compute_vecsize_and_simdlen (struct
cgraph_node *node,
return 0;
}
}
+
clonei->vecsize_int = vec_bits;
clonei->vecsize_float = vec_bits;
return count;
diff --git a/gcc/testsuite/gcc.target/aarch64/pr113552.c
b/gcc/testsuite/gcc.target/aarch64/pr113552.c
new file mode 100644
index 000..9c96b061ed2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr113552.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -march=armv8-a" } */
+
+__attribute__ ((__simd__ ("notinbranch"), const))
+double cos (double);
+
+void foo (float *a, double *b)
+{
+for (int i = 0; i < 12; i+=3)
+ {
+b[i] = cos (5.0 * a[i]);
+b[i+1] = cos (5.0 * a[i+1]);
+b[i+2] = cos (5.0 * a[i+2]);
+ }
+}
+
+/* { dg-final { scan-assembler-times {bl\t_ZGVnN2v_cos} 6 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
b/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
index 95f6a6803e8..c6dac6b104c 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd_pcs_attribute-3.c
@@ -18,7 +18,7 @@ double foo(double x)
}
/* { dg-final { scan-assembler-not {\.variant_pcs\tfoo} } } */
-/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM1v_foo} 1 } } */
+/* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnM1v_foo} } } */
/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnM2v_foo} 1 } } */
-/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN1v_foo} 1 } } */
+/* { dg-final { scan-assembler-not {\.variant_pcs\t_ZGVnN1v_foo} } } */
/* { dg-final { scan-assembler-times {\.variant_pcs\t_ZGVnN2v_foo} 1 } } */
[gcc r14-9971] gcov-profile/114715 - missing coverage for switch
https://gcc.gnu.org/g:9d573f71e80e9f6f4aac912fc8fc128aa2697e3a
commit r14-9971-g9d573f71e80e9f6f4aac912fc8fc128aa2697e3a
Author: Richard Biener
Date: Mon Apr 15 11:09:17 2024 +0200
gcov-profile/114715 - missing coverage for switch
The following avoids missing coverage for the line of a switch statement
which happens when gimplification emits a BIND_EXPR wrapping the switch
as that prevents us from setting locations on the containing statements
via annotate_all_with_location. Instead set the location of the GIMPLE
switch directly.
PR gcov-profile/114715
* gimplify.cc (gimplify_switch_expr): Set the location of the
GIMPLE switch.
* gcc.misc-tests/gcov-24.c: New testcase.
Diff:
---
gcc/gimplify.cc| 1 +
gcc/testsuite/gcc.misc-tests/gcov-24.c | 30 ++
2 files changed, 31 insertions(+)
diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc
index 3b731525f15..457b33a4293 100644
--- a/gcc/gimplify.cc
+++ b/gcc/gimplify.cc
@@ -3013,6 +3013,7 @@ gimplify_switch_expr (tree *expr_p, gimple_seq *pre_p)
switch_stmt = gimple_build_switch (SWITCH_COND (switch_expr),
default_case, labels);
+ gimple_set_location (switch_stmt, EXPR_LOCATION (switch_expr));
/* For the benefit of -Wimplicit-fallthrough, if switch_body_seq
ends with a GIMPLE_LABEL holding SWITCH_BREAK_LABEL_P LABEL_DECL,
wrap the GIMPLE_SWITCH up to that GIMPLE_LABEL into a GIMPLE_BIND,
diff --git a/gcc/testsuite/gcc.misc-tests/gcov-24.c
b/gcc/testsuite/gcc.misc-tests/gcov-24.c
new file mode 100644
index 000..395099bd7ae
--- /dev/null
+++ b/gcc/testsuite/gcc.misc-tests/gcov-24.c
@@ -0,0 +1,30 @@
+/* { dg-options "-fprofile-arcs -ftest-coverage" } */
+/* { dg-do run { target native } } */
+
+int main()
+{
+ int a = 1;
+ int b = 2;
+ int c = -3;
+ switch(a) /* count(1) */
+{
+case 1: /* count(1) */
+c = 3;
+switch(b) { /* count(1) */
+ case 1: /* count(#) */
+ c = 4;
+ break;
+ case 2: /* count(1) */
+ c = 5;
+ break;
+}
+break;
+case 2: /* count(#) */
+c = 6;
+break;
+default: /* count(#) */
+break;
+}
+}
+
+/* { dg-final { run-gcov gcov-24.c } } */
[gcc r14-9972] RISC-V: Add VLS to mask vec_extract [PR114668].
https://gcc.gnu.org/g:02cc8f3e68f9af96d484d9946ceaa9e3eed38151
commit r14-9972-g02cc8f3e68f9af96d484d9946ceaa9e3eed38151
Author: Robin Dapp
Date: Mon Apr 15 12:44:56 2024 +0200
RISC-V: Add VLS to mask vec_extract [PR114668].
This adds the missing VLS modes to the mask extract expanders.
gcc/ChangeLog:
PR target/114668
* config/riscv/autovec.md: Add VLS.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/pr114668.c: New test.
Diff:
---
gcc/config/riscv/autovec.md| 4 +--
.../gcc.target/riscv/rvv/autovec/pr114668.c| 35 ++
2 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
index 3b32369f68c..aa1ae0fe075 100644
--- a/gcc/config/riscv/autovec.md
+++ b/gcc/config/riscv/autovec.md
@@ -1427,7 +1427,7 @@
(define_expand "vec_extractqi"
[(set (match_operand:QI0 "register_operand")
(vec_select:QI
- (match_operand:VB 1 "register_operand")
+ (match_operand:VB_VLS 1 "register_operand")
(parallel
[(match_operand 2 "nonmemory_operand")])))]
"TARGET_VECTOR"
@@ -1453,7 +1453,7 @@
(define_expand "vec_extractbi"
[(set (match_operand:QI0 "register_operand")
(vec_select:QI
- (match_operand:VB 1 "register_operand")
+ (match_operand:VB_VLS 1 "register_operand")
(parallel
[(match_operand 2 "nonmemory_operand")])))]
"TARGET_VECTOR"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr114668.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr114668.c
new file mode 100644
index 000..3a13c3c0012
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr114668.c
@@ -0,0 +1,35 @@
+/* { dg-do run } */
+/* { dg-require-effective-target riscv_v } */
+/* { dg-options { -O3 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d } } */
+
+char a;
+int b;
+short e[14];
+char f[4][12544];
+_Bool c[4][5];
+
+__attribute__ ((noipa))
+void foo (int a)
+{
+ if (a != 1)
+__builtin_abort ();
+}
+
+int main ()
+{
+ for (int i = 0; i < 4; ++i)
+for (int l = 0; l < 15; ++l)
+ for (int m = 0; m < 15; ++m)
+ f[i][l * m] = 3;
+ for (int j = 0; j < 4; j += 1)
+for (int k = 3; k < 13; k += 3)
+ for (_Bool l = 0; l < 1; l = 1)
+ for (int m = 0; m < 4; m += 1)
+ {
+ a = 0;
+ b -= e[k];
+ c[j][m] = f[j][6];
+ }
+ for (long i = 2; i < 4; ++i)
+foo (c[3][3]);
+}
[gcc r14-9973] Guard longjmp in test to not inf loop [PR114720]
https://gcc.gnu.org/g:18e881ebd9f4b9429c652a81b8ceee84275bdade
commit r14-9973-g18e881ebd9f4b9429c652a81b8ceee84275bdade
Author: Jørgen Kvalsvik
Date: Mon Apr 15 14:14:26 2024 +0200
Guard longjmp in test to not inf loop [PR114720]
Guard the longjmp to not infinitely loop. The longjmp (jump) function is
called unconditionally to make test flow simpler, but the jump
destination would return to a point in main that would call longjmp
again. The longjmp is really there to exercise the then-branch of
setjmp, to verify coverage is accurately counted in the presence of
complex edges.
PR gcov-profile/114720
gcc/testsuite/ChangeLog:
* gcc.misc-tests/gcov-22.c: Guard longjmp to not loop.
Diff:
---
gcc/testsuite/gcc.misc-tests/gcov-22.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.misc-tests/gcov-22.c
b/gcc/testsuite/gcc.misc-tests/gcov-22.c
index 641791a7223..7ca78467ca3 100644
--- a/gcc/testsuite/gcc.misc-tests/gcov-22.c
+++ b/gcc/testsuite/gcc.misc-tests/gcov-22.c
@@ -87,7 +87,19 @@ setdest ()
void
jump ()
{
-longjmp (dest, 1);
+/* Protect the longjmp so it will only be done once. The whole purpose of
+ this function is to help test conditions and instrumentation around
+ setjmp and its complex edges, as both branches should count towards
+ coverage, even when one is taken through longjmp. If the jump is not
+ guarded it can cause an infinite loop as setdest returns to a point in
+ main before jump (), leading to an infinite loop. See PR
+ gcov-profile/114720. */
+static int called_once = 0;
+if (!called_once) /* conditions(suppress) */
+{
+ called_once = 1;
+ longjmp (dest, 1);
+}
}
int
[gcc r14-9975] libstdc++: Update baseline symbols for riscv64-linux
https://gcc.gnu.org/g:52972ab5c75634872b508806310dffd8c32933b9 commit r14-9975-g52972ab5c75634872b508806310dffd8c32933b9 Author: Andreas Schwab Date: Sun Dec 31 10:49:34 2023 +0100 libstdc++: Update baseline symbols for riscv64-linux * config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: Update. Diff: --- libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt | 4 1 file changed, 4 insertions(+) diff --git a/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt b/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt index 9423cfb8efc..9229ad33458 100644 --- a/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt +++ b/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt @@ -499,6 +499,10 @@ FUNC:_ZNKSt11__timepunctIwE9_M_monthsEPPKw@@GLIBCXX_3.4 FUNC:_ZNKSt11logic_error4whatEv@@GLIBCXX_3.4 FUNC:_ZNKSt12__basic_fileIcE13native_handleEv@@GLIBCXX_3.4.33 FUNC:_ZNKSt12__basic_fileIcE7is_openEv@@GLIBCXX_3.4 +FUNC:_ZNKSt12__shared_ptrINSt10filesystem28recursive_directory_iterator10_Dir_stackELN9__gnu_cxx12_Lock_policyE1EEcvbEv@@GLIBCXX_3.4.31 +FUNC:_ZNKSt12__shared_ptrINSt10filesystem4_DirELN9__gnu_cxx12_Lock_policyE1EEcvbEv@@GLIBCXX_3.4.31 +FUNC:_ZNKSt12__shared_ptrINSt10filesystem7__cxx1128recursive_directory_iterator10_Dir_stackELN9__gnu_cxx12_Lock_policyE1EEcvbEv@@GLIBCXX_3.4.31 +FUNC:_ZNKSt12__shared_ptrINSt10filesystem7__cxx114_DirELN9__gnu_cxx12_Lock_policyE1EEcvbEv@@GLIBCXX_3.4.31 FUNC:_ZNKSt12bad_weak_ptr4whatEv@@GLIBCXX_3.4.15 FUNC:_ZNKSt12future_error4whatEv@@GLIBCXX_3.4.14 FUNC:_ZNKSt12strstreambuf6pcountEv@@GLIBCXX_3.4
[gcc r13-8608] c++: requires-exprs and partial constraint subst [PR110006]
https://gcc.gnu.org/g:38c2679ff9330d3ac1d5d86459294446733a435a
commit r13-8608-g38c2679ff9330d3ac1d5d86459294446733a435a
Author: Patrick Palka
Date: Fri Feb 2 19:07:08 2024 -0500
c++: requires-exprs and partial constraint subst [PR110006]
In r11-3261-gb28b621ac67bee we made tsubst_requires_expr never partially
substitute into a requires-expression so as to avoid checking its
requirements out of order during e.g. generic lambda regeneration.
These PRs however illustrate that we still sometimes do need to
partially substitute into a requires-expression, in particular when it
appears in associated constraints that we're directly substituting for
sake of declaration matching or dguide constraint rewriting. In these
cases we're being called from tsubst_constraint during which
processing_constraint_expression_p is true, so this patch checks this
predicate to control whether we defer substitution or partially
substitute.
In turn, we now need to propagate semantic tsubst flags through
tsubst_requires_expr rather than just using tf_none, notably for sake of
dguide constraint rewriting which sets tf_dguide.
PR c++/110006
PR c++/112769
gcc/cp/ChangeLog:
* constraint.cc (subst_info::quiet): Accomodate non-diagnostic
tsubst flags.
(tsubst_valid_expression_requirement): Likewise.
(tsubst_simple_requirement): Return a substituted _REQ node when
processing_template_decl.
(tsubst_type_requirement_1): Accomodate non-diagnostic tsubst
flags.
(tsubst_type_requirement): Return a substituted _REQ node when
processing_template_decl.
(tsubst_compound_requirement): Likewise. Accomodate non-diagnostic
tsubst flags.
(tsubst_nested_requirement): Likewise.
(tsubst_requires_expr): Don't defer partial substitution when
processing_constraint_expression_p is true, in which case return
a substituted REQUIRES_EXPR.
* pt.cc (tsubst_expr) : Accomodate
non-diagnostic tsubst flags.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/class-deduction-alias18.C: New test.
* g++.dg/cpp2a/concepts-friend16.C: New test.
Reviewed-by: Jason Merrill
(cherry picked from commit 686b5eb9c9ee623a604dde5c49fa11c23f384c62)
Diff:
---
gcc/cp/constraint.cc | 56 +-
gcc/cp/pt.cc | 3 +-
.../g++.dg/cpp2a/class-deduction-alias18.C | 13 +
gcc/testsuite/g++.dg/cpp2a/concepts-friend16.C | 25 ++
4 files changed, 84 insertions(+), 13 deletions(-)
diff --git a/gcc/cp/constraint.cc b/gcc/cp/constraint.cc
index 273d15ab097..971619eabea 100644
--- a/gcc/cp/constraint.cc
+++ b/gcc/cp/constraint.cc
@@ -85,7 +85,7 @@ struct subst_info
/* True if we should not diagnose errors. */
bool quiet() const
{
-return complain == tf_none;
+return !(complain & tf_warning_or_error);
}
/* True if we should diagnose errors. */
@@ -1999,8 +1999,9 @@ hash_placeholder_constraint (tree c)
static tree
tsubst_valid_expression_requirement (tree t, tree args, sat_info info)
{
- tree r = tsubst_expr (t, args, tf_none, info.in_decl);
- if (convert_to_void (r, ICV_STATEMENT, tf_none) != error_mark_node)
+ tsubst_flags_t quiet = info.complain & ~tf_warning_or_error;
+ tree r = tsubst_expr (t, args, quiet, info.in_decl);
+ if (convert_to_void (r, ICV_STATEMENT, quiet) != error_mark_node)
return r;
if (info.diagnose_unsatisfaction_p ())
@@ -2036,6 +2037,8 @@ tsubst_simple_requirement (tree t, tree args, sat_info
info)
tree expr = tsubst_valid_expression_requirement (t0, args, info);
if (expr == error_mark_node)
return error_mark_node;
+ if (processing_template_decl)
+return finish_simple_requirement (EXPR_LOCATION (t), expr);
return boolean_true_node;
}
@@ -2045,7 +2048,8 @@ tsubst_simple_requirement (tree t, tree args, sat_info
info)
static tree
tsubst_type_requirement_1 (tree t, tree args, sat_info info, location_t loc)
{
- tree r = tsubst (t, args, tf_none, info.in_decl);
+ tsubst_flags_t quiet = info.complain & ~tf_warning_or_error;
+ tree r = tsubst (t, args, quiet, info.in_decl);
if (r != error_mark_node)
return r;
@@ -2076,6 +2080,8 @@ tsubst_type_requirement (tree t, tree args, sat_info info)
tree type = tsubst_type_requirement_1 (t0, args, info, EXPR_LOCATION (t));
if (type == error_mark_node)
return error_mark_node;
+ if (processing_template_decl)
+return finish_type_requirement (EXPR_LOCATION (t), type);
return boolean_true_node;
}
@@ -2132,9 +2138,11 @@ tsubst_compound_requirement (tree t, tree args, sat_info
info)
location_t loc = cp_expr_loc_or_input_loc (expr);
+ subst_info quiet (info.complain & ~t
[gcc r13-8610] libstdc++: Update baseline symbols for riscv64-linux
https://gcc.gnu.org/g:04128a403bd594dff50349e973b02b3f2d444d5d commit r13-8610-g04128a403bd594dff50349e973b02b3f2d444d5d Author: Andreas Schwab Date: Sun Dec 31 10:49:34 2023 +0100 libstdc++: Update baseline symbols for riscv64-linux * config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: Update. Diff: --- libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt | 4 1 file changed, 4 insertions(+) diff --git a/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt b/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt index b0c7561063d..f49a2f18f88 100644 --- a/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt +++ b/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt @@ -498,6 +498,10 @@ FUNC:_ZNKSt11__timepunctIwE8_M_am_pmEPPKw@@GLIBCXX_3.4 FUNC:_ZNKSt11__timepunctIwE9_M_monthsEPPKw@@GLIBCXX_3.4 FUNC:_ZNKSt11logic_error4whatEv@@GLIBCXX_3.4 FUNC:_ZNKSt12__basic_fileIcE7is_openEv@@GLIBCXX_3.4 +FUNC:_ZNKSt12__shared_ptrINSt10filesystem28recursive_directory_iterator10_Dir_stackELN9__gnu_cxx12_Lock_policyE1EEcvbEv@@GLIBCXX_3.4.31 +FUNC:_ZNKSt12__shared_ptrINSt10filesystem4_DirELN9__gnu_cxx12_Lock_policyE1EEcvbEv@@GLIBCXX_3.4.31 +FUNC:_ZNKSt12__shared_ptrINSt10filesystem7__cxx1128recursive_directory_iterator10_Dir_stackELN9__gnu_cxx12_Lock_policyE1EEcvbEv@@GLIBCXX_3.4.31 +FUNC:_ZNKSt12__shared_ptrINSt10filesystem7__cxx114_DirELN9__gnu_cxx12_Lock_policyE1EEcvbEv@@GLIBCXX_3.4.31 FUNC:_ZNKSt12bad_weak_ptr4whatEv@@GLIBCXX_3.4.15 FUNC:_ZNKSt12future_error4whatEv@@GLIBCXX_3.4.14 FUNC:_ZNKSt12strstreambuf6pcountEv@@GLIBCXX_3.4
[gcc r14-9976] m68k: Quiet up cppcheck warning [PR114689]
https://gcc.gnu.org/g:f8409c3109d2970a1fd63ac1a61601138b7ae46f
commit r14-9976-gf8409c3109d2970a1fd63ac1a61601138b7ae46f
Author: Jakub Jelinek
Date: Mon Apr 15 17:46:03 2024 +0200
m68k: Quiet up cppcheck warning [PR114689]
cppcheck apparently warns on the | !!sticky part of the expression and
using | (!!sticky) quiets it up (it is correct as is).
The following patch adds the ()s, and also adds them around mant >> 1 just
in case it makes it clearer to all readers that the expression is parsed
that way already.
2024-04-15 Jakub Jelinek
PR libgcc/114689
* config/m68k/fpgnulib.c (__truncdfsf2): Add parentheses around
!!sticky bitwise or operand to quiet up cppcheck. Add parentheses
around mant >> 1 bitwise or operand.
Diff:
---
libgcc/config/m68k/fpgnulib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libgcc/config/m68k/fpgnulib.c b/libgcc/config/m68k/fpgnulib.c
index 986750e0523..04f62998f6e 100644
--- a/libgcc/config/m68k/fpgnulib.c
+++ b/libgcc/config/m68k/fpgnulib.c
@@ -302,7 +302,7 @@ __truncdfsf2 (double a1)
if (exp == EXPDMASK - EXCESSD + EXCESS)
{
exp = EXPMASK;
- mant = mant >> 1 | (mant & 1) | !!sticky;
+ mant = (mant >> 1) | (mant & 1) | (!!sticky);
}
else
{
[gcc r14-9977] AVR: Add 8 more avrxmega3 MCUs.
https://gcc.gnu.org/g:6e11bb451babfe47bb6b7ad42335019f2771a32e
commit r14-9977-g6e11bb451babfe47bb6b7ad42335019f2771a32e
Author: Georg-Johann Lay
Date: Mon Apr 15 19:23:32 2024 +0200
AVR: Add 8 more avrxmega3 MCUs.
gcc/
* config/avr/avr-mcus.def: Add: avr16du14, avr16du20, avr16du28,
avr16du32, avr32du14, avr32du20, avr32du28, avr32du32.
* doc/avr-mmcu.texi: Rebuild.
Diff:
---
gcc/config/avr/avr-mcus.def | 8
gcc/doc/avr-mmcu.texi | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/gcc/config/avr/avr-mcus.def b/gcc/config/avr/avr-mcus.def
index 27812d441f7..068875a2c60 100644
--- a/gcc/config/avr/avr-mcus.def
+++ b/gcc/config/avr/avr-mcus.def
@@ -379,6 +379,10 @@ AVR_MCU ("avr16dd14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DD14__",
AVR_MCU ("avr16dd20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DD20__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr16dd28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DD28__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr16dd32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DD32__", 0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16du14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DU14__", 0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16du20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DU20__", 0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16du28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DU28__", 0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16du32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DU32__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr32da28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DA28__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32da32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DA32__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32da48",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DA48__", 0x7000, 0x0, 0x8000, 0x8000)
@@ -389,6 +393,10 @@ AVR_MCU ("avr32dd14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DD14__",
AVR_MCU ("avr32dd20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DD20__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32dd28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DD28__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32dd32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DD32__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32du14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DU14__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32du20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DU20__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32du28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DU28__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32du32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DU32__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr16eb14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16EB14__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr16eb20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16EB20__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr16eb28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16EB28__", 0x7800, 0x0, 0x4000, 0x8000)
diff --git a/gcc/doc/avr-mmcu.texi b/gcc/doc/avr-mmcu.texi
index dcbf4ef7247..671e66e7ffb 100644
--- a/gcc/doc/avr-mmcu.texi
+++ b/gcc/doc/avr-mmcu.texi
@@ -54,7 +54,7 @@
@item @anchor{avrxmega3}avrxmega3
``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM,
and with program memory visible in the RAM address space.
-@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212},
@code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406},
@code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto},
@code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427},
@code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814},
@code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826},
@code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607},
@code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624},
@code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216},
@code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227},
@code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609},
@code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809},
@code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32},
@code{avr16ea28}, @code{avr16ea32},
@code{avr16ea48}, @code{avr16eb14}, @code{avr16eb20}, @code{avr16eb28},
@code{avr16eb32}, @code{avr32da28}, @code{avr32da32}, @code{avr32da48},
@code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14},
@code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}, @code{avr32ea28},
@code{avr32ea32}, @code{avr32ea48}.
+@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212},
@code{atti
[gcc r13-8611] AVR: Add 8 more avrxmega3 MCUs.
https://gcc.gnu.org/g:f585f8f9081ddecad63fa654297811e434613e6c
commit r13-8611-gf585f8f9081ddecad63fa654297811e434613e6c
Author: Georg-Johann Lay
Date: Mon Apr 15 19:23:32 2024 +0200
AVR: Add 8 more avrxmega3 MCUs.
gcc/
* config/avr/avr-mcus.def: Add: avr16du14, avr16du20, avr16du28,
avr16du32, avr32du14, avr32du20, avr32du28, avr32du32.
* doc/avr-mmcu.texi: Rebuild.
(cherry picked from commit 6e11bb451babfe47bb6b7ad42335019f2771a32e)
Diff:
---
gcc/config/avr/avr-mcus.def | 8
gcc/doc/avr-mmcu.texi | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/gcc/config/avr/avr-mcus.def b/gcc/config/avr/avr-mcus.def
index 2e01281c900..d869f8720f2 100644
--- a/gcc/config/avr/avr-mcus.def
+++ b/gcc/config/avr/avr-mcus.def
@@ -379,6 +379,10 @@ AVR_MCU ("avr16dd14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DD14__",
AVR_MCU ("avr16dd20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DD20__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr16dd28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DD28__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr16dd32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DD32__", 0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16du14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DU14__", 0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16du20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DU20__", 0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16du28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DU28__", 0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16du32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16DU32__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr32da28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DA28__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32da32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DA32__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32da48",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DA48__", 0x7000, 0x0, 0x8000, 0x8000)
@@ -389,6 +393,10 @@ AVR_MCU ("avr32dd14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DD14__",
AVR_MCU ("avr32dd20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DD20__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32dd28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DD28__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr32dd32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DD32__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32du14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DU14__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32du20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DU20__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32du28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DU28__", 0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32du32",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR32DU32__", 0x7000, 0x0, 0x8000, 0x8000)
AVR_MCU ("avr16eb14",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16EB14__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr16eb20",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16EB20__", 0x7800, 0x0, 0x4000, 0x8000)
AVR_MCU ("avr16eb28",ARCH_AVRXMEGA3, AVR_ISA_NONE,
"__AVR_AVR16EB28__", 0x7800, 0x0, 0x4000, 0x8000)
diff --git a/gcc/doc/avr-mmcu.texi b/gcc/doc/avr-mmcu.texi
index 748243c296a..50c7d3fa94d 100644
--- a/gcc/doc/avr-mmcu.texi
+++ b/gcc/doc/avr-mmcu.texi
@@ -54,7 +54,7 @@
@item avrxmega3
``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM,
and with program memory visible in the RAM address space.
-@*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212},
@code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406},
@code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto},
@code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427},
@code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814},
@code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826},
@code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607},
@code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624},
@code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216},
@code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227},
@code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609},
@code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809},
@code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32},
@code{avr16ea28}, @code{avr16ea32},
@code{avr16ea48}, @code{avr16eb14}, @code{avr16eb20}, @code{avr16eb28},
@code{avr16eb32}, @code{avr32da28}, @code{avr32da32}, @code{avr32da48},
@code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14},
@code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}, @code{avr32ea28},
@code{avr32ea32}, @code{avr32ea48}.
+@*@var{mcu}@tie{}= @code
[gcc r14-9978] libstdc++: Fix infinite loop in std::istream::ignore(n, delim) [PR93672]
https://gcc.gnu.org/g:2d694414ada8e3b58f504c1b175d31088529632e
commit r14-9978-g2d694414ada8e3b58f504c1b175d31088529632e
Author: Jonathan Wakely
Date: Thu Apr 4 10:33:33 2024 +0100
libstdc++: Fix infinite loop in std::istream::ignore(n, delim) [PR93672]
A negative delim value passed to std::istream::ignore can never match
any character in the stream, because the comparison is done using
traits_type::eq_int_type(sb->sgetc(), delim) and sgetc() never returns
negative values (except at EOF). The optimized version of ignore for the
std::istream specialization uses traits_type::find to locate the delim
character in the streambuf, which _can_ match a negative delim on
platforms where char is signed, but then we do another comparison using
eq_int_type which fails. The code then keeps looping forever, with
traits_type::find locating the character and traits_type::eq_int_type
saying it's not a match, so traits_type::find is used again and finds
the same character again.
A possible fix would be to check with eq_int_type after a successful
find, to see whether we really have a match. However, that would be
suboptimal since we know that a negative delimiter will never match
using eq_int_type. So a better fix is to adjust the check at the top of
the function that handles delim==eof(), so that we treat all negative
delim values as equivalent to EOF. That way we don't bother using find
to search for something that will never match with eq_int_type.
The version of ignore in the primary template doesn't need a change,
because it doesn't use traits_type::find, instead characters are
extracted one-by-one and always matched using eq_int_type. That avoids
the inconsistency between find and eq_int_type. The specialization for
std::wistream does use traits_type::find, but traits_type::to_int_type
is equivalent to an implicit conversion from wchar_t to wint_t, so
passing a wchar_t directly to ignore without using to_int_type works.
libstdc++-v3/ChangeLog:
PR libstdc++/93672
* src/c++98/istream.cc (istream::ignore(streamsize, int_type)):
Treat all negative delimiter values as eof().
* testsuite/27_io/basic_istream/ignore/char/93672.cc: New test.
* testsuite/27_io/basic_istream/ignore/wchar_t/93672.cc: New
test.
Diff:
---
libstdc++-v3/src/c++98/istream.cc | 13 ++-
.../27_io/basic_istream/ignore/char/93672.cc | 101 +
.../27_io/basic_istream/ignore/wchar_t/93672.cc| 34 +++
3 files changed, 146 insertions(+), 2 deletions(-)
diff --git a/libstdc++-v3/src/c++98/istream.cc
b/libstdc++-v3/src/c++98/istream.cc
index 07ac739c26a..d1bff2b 100644
--- a/libstdc++-v3/src/c++98/istream.cc
+++ b/libstdc++-v3/src/c++98/istream.cc
@@ -112,8 +112,17 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
basic_istream::
ignore(streamsize __n, int_type __delim)
{
- if (traits_type::eq_int_type(__delim, traits_type::eof()))
- return ignore(__n);
+ {
+ // If conversion to int_type changes the value then __delim does not
+ // correspond to a value of type char_type, and so will never match
+ // a character extracted from the input sequence. Just use ignore(n).
+ const int_type chk_delim = traits_type::to_int_type(__delim);
+ const bool matchable = traits_type::eq_int_type(chk_delim, __delim);
+ if (__builtin_expect(!matchable, 0))
+ return ignore(__n);
+ // Now we know that __delim is a valid char_type value, so it's safe
+ // for the code below to use traits_type::find to search for it.
+ }
_M_gcount = 0;
sentry __cerb(*this, true);
diff --git a/libstdc++-v3/testsuite/27_io/basic_istream/ignore/char/93672.cc
b/libstdc++-v3/testsuite/27_io/basic_istream/ignore/char/93672.cc
new file mode 100644
index 000..96737485b83
--- /dev/null
+++ b/libstdc++-v3/testsuite/27_io/basic_istream/ignore/char/93672.cc
@@ -0,0 +1,101 @@
+// { dg-do run }
+
+#include
+#include
+#include
+
+void
+test_pr93672() // std::basic_istream::ignore hangs if delim MSB is set
+{
+ std::istringstream in(".\xfc..\xfd...\xfe.");
+
+ // This should find '\xfd' even on platforms where char is signed,
+ // because the delimiter is correctly converted to the stream's int_type.
+ in.ignore(100, std::char_traits::to_int_type('\xfc'));
+ VERIFY( in.gcount() == 2 );
+ VERIFY( ! in.eof() );
+
+ // This should work equivalently to traits_type::to_int_type
+ in.ignore(100, (unsigned char)'\xfd');
+ VERIFY( in.gcount() == 3 );
+ VERIFY( ! in.eof() );
+
+ // This only works if char is unsigned.
+ in.ignore(100, '\xfe');
+ if (std::numeric_limits::is_signed)
+ {
+// When char is signed, '\xfe' != traits_type::to_int_type('\xfe')
+// so the delimiter does not match the character in the input sequence,
+// and
[gcc r14-9979] libstdc++: Heterogeneous std::pair comparisons [PR113386]
https://gcc.gnu.org/g:2a0c083558b4ac6609692294df7a388cf4468711
commit r14-9979-g2a0c083558b4ac6609692294df7a388cf4468711
Author: Jonathan Wakely
Date: Mon Jan 15 14:47:52 2024 +
libstdc++: Heterogeneous std::pair comparisons [PR113386]
I'm only treating this as a DR for C++20 for now, because it's less work
and only requires changes to operator== and operator<=>. To do this for
older standards would require changes to the six relational operators
used pre-C++20.
libstdc++-v3/ChangeLog:
PR libstdc++/113386
* include/bits/stl_pair.h (operator==, operator<=>): Support
heterogeneous comparisons, as per LWG 3865.
* testsuite/20_util/pair/comparison_operators/lwg3865.cc: New
test.
Diff:
---
libstdc++-v3/include/bits/stl_pair.h | 32 --
.../20_util/pair/comparison_operators/lwg3865.cc | 15 ++
2 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/libstdc++-v3/include/bits/stl_pair.h
b/libstdc++-v3/include/bits/stl_pair.h
index 4f5c8389fa6..45317417c9c 100644
--- a/libstdc++-v3/include/bits/stl_pair.h
+++ b/libstdc++-v3/include/bits/stl_pair.h
@@ -1000,23 +1000,39 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
template pair(_T1, _T2) -> pair<_T1, _T2>;
#endif
- /// Two pairs of the same type are equal iff their members are equal.
- template
+#if __cpp_lib_three_way_comparison && __cpp_lib_concepts
+ // _GLIBCXX_RESOLVE_LIB_DEFECTS
+ // 3865. Sorting a range of pairs
+
+ /// Two pairs are equal iff their members are equal.
+ template
inline _GLIBCXX_CONSTEXPR bool
-operator==(const pair<_T1, _T2>& __x, const pair<_T1, _T2>& __y)
+operator==(const pair<_T1, _T2>& __x, const pair<_U1, _U2>& __y)
{ return __x.first == __y.first && __x.second == __y.second; }
-#if __cpp_lib_three_way_comparison && __cpp_lib_concepts
- template
-constexpr common_comparison_category_t<__detail::__synth3way_t<_T1>,
- __detail::__synth3way_t<_T2>>
-operator<=>(const pair<_T1, _T2>& __x, const pair<_T1, _T2>& __y)
+ /** Defines a lexicographical order for pairs.
+ *
+ * For two pairs of comparable types, `P` is ordered before `Q` if
+ * `P.first` is less than `Q.first`, or if `P.first` and `Q.first`
+ * are equivalent (neither is less than the other) and `P.second` is
+ * less than `Q.second`.
+ */
+ template
+constexpr common_comparison_category_t<__detail::__synth3way_t<_T1, _U1>,
+ __detail::__synth3way_t<_T2, _U2>>
+operator<=>(const pair<_T1, _T2>& __x, const pair<_U1, _U2>& __y)
{
if (auto __c = __detail::__synth3way(__x.first, __y.first); __c != 0)
return __c;
return __detail::__synth3way(__x.second, __y.second);
}
#else
+ /// Two pairs of the same type are equal iff their members are equal.
+ template
+inline _GLIBCXX_CONSTEXPR bool
+operator==(const pair<_T1, _T2>& __x, const pair<_T1, _T2>& __y)
+{ return __x.first == __y.first && __x.second == __y.second; }
+
/** Defines a lexicographical order for pairs.
*
* For two pairs of the same type, `P` is ordered before `Q` if
diff --git
a/libstdc++-v3/testsuite/20_util/pair/comparison_operators/lwg3865.cc
b/libstdc++-v3/testsuite/20_util/pair/comparison_operators/lwg3865.cc
new file mode 100644
index 000..2bbd54af192
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/pair/comparison_operators/lwg3865.cc
@@ -0,0 +1,15 @@
+// { dg-do run { target c++20 } }
+
+// LWG 3865. Sorting a range of pairs
+
+#include
+#include
+
+int main()
+{
+ std::pair p(1, 2);
+ std::pair p2(p.first, p.second);
+ VERIFY( p == p2 );
+ VERIFY( p <= p2 );
+ VERIFY( p >= p2 );
+}
[gcc r14-9980] libstdc++: Add std::reference_wrapper comparison operators for C++26
https://gcc.gnu.org/g:0d58450659ade002666c1c3604c94cd8e0cc6b50
commit r14-9980-g0d58450659ade002666c1c3604c94cd8e0cc6b50
Author: Jonathan Wakely
Date: Fri Mar 22 13:20:21 2024 +
libstdc++: Add std::reference_wrapper comparison operators for C++26
This C++26 change was just approved in Tokyo, in P2944R3. It adds
operator== and operator<=> overloads to std::reference_wrapper.
The operator<=> overloads in the paper cause compilation errors for any
type without <=> so they're implemented here with deduced return types
and constrained by a requires clause.
libstdc++-v3/ChangeLog:
* include/bits/refwrap.h (reference_wrapper): Add comparison
operators as proposed by P2944R3.
* include/bits/version.def (reference_wrapper): Define.
* include/bits/version.h: Regenerate.
* include/std/functional: Enable feature test macro.
* testsuite/20_util/reference_wrapper/compare.cc: New test.
Diff:
---
libstdc++-v3/include/bits/refwrap.h| 45 ++
libstdc++-v3/include/bits/version.def | 8 ++
libstdc++-v3/include/bits/version.h| 10 +++
libstdc++-v3/include/std/functional| 1 +
.../testsuite/20_util/reference_wrapper/compare.cc | 95 ++
5 files changed, 159 insertions(+)
diff --git a/libstdc++-v3/include/bits/refwrap.h
b/libstdc++-v3/include/bits/refwrap.h
index 2d4338b718f..fd1cc2b63e6 100644
--- a/libstdc++-v3/include/bits/refwrap.h
+++ b/libstdc++-v3/include/bits/refwrap.h
@@ -38,6 +38,10 @@
#include
#include // for unary_function and binary_function
+#if __glibcxx_reference_wrapper >= 202403L // >= C++26
+# include
+#endif
+
namespace std _GLIBCXX_VISIBILITY(default)
{
_GLIBCXX_BEGIN_NAMESPACE_VERSION
@@ -358,6 +362,47 @@ _GLIBCXX_MEM_FN_TRAITS(&& noexcept, false_type, true_type)
#endif
return std::__invoke(get(), std::forward<_Args>(__args)...);
}
+
+#if __glibcxx_reference_wrapper >= 202403L // >= C++26
+ // [refwrap.comparisons], comparisons
+ [[nodiscard]]
+ friend constexpr bool
+ operator==(reference_wrapper __x, reference_wrapper __y)
+ requires requires { { __x.get() == __y.get() } -> convertible_to; }
+ { return __x.get() == __y.get(); }
+
+ [[nodiscard]]
+ friend constexpr bool
+ operator==(reference_wrapper __x, const _Tp& __y)
+ requires requires { { __x.get() == __y } -> convertible_to; }
+ { return __x.get() == __y; }
+
+ [[nodiscard]]
+ friend constexpr bool
+ operator==(reference_wrapper __x, reference_wrapper __y)
+ requires (!is_const_v<_Tp>)
+ && requires { { __x.get() == __y.get() } -> convertible_to; }
+ { return __x.get() == __y.get(); }
+
+ [[nodiscard]]
+ friend constexpr auto
+ operator<=>(reference_wrapper __x, reference_wrapper<_Tp> __y)
+ requires requires { __detail::__synth3way(__x.get(), __y.get()); }
+ { return __detail::__synth3way(__x.get(), __y.get()); }
+
+ [[nodiscard]]
+ friend constexpr auto
+ operator<=>(reference_wrapper __x, const _Tp& __y)
+ requires requires { __detail::__synth3way(__x.get(), __y); }
+ { return __detail::__synth3way(__x.get(), __y); }
+
+ [[nodiscard]]
+ friend constexpr auto
+ operator<=>(reference_wrapper __x, reference_wrapper __y)
+ requires (!is_const_v<_Tp>)
+ && requires { __detail::__synth3way(__x.get(), __y.get()); }
+ { return __detail::__synth3way(__x.get(), __y.get()); }
+#endif
};
#if __cpp_deduction_guides
diff --git a/libstdc++-v3/include/bits/version.def
b/libstdc++-v3/include/bits/version.def
index 5ad44941bff..5c0477fb61e 100644
--- a/libstdc++-v3/include/bits/version.def
+++ b/libstdc++-v3/include/bits/version.def
@@ -1760,6 +1760,14 @@ ftms = {
};
};
+ftms = {
+ name = reference_wrapper;
+ values = {
+v = 202403;
+cxxmin = 26;
+ };
+};
+
ftms = {
name = saturation_arithmetic;
values = {
diff --git a/libstdc++-v3/include/bits/version.h
b/libstdc++-v3/include/bits/version.h
index 460a3e0116a..65e708c73fb 100644
--- a/libstdc++-v3/include/bits/version.h
+++ b/libstdc++-v3/include/bits/version.h
@@ -1963,6 +1963,16 @@
#endif /* !defined(__cpp_lib_ratio) && defined(__glibcxx_want_ratio) */
#undef __glibcxx_want_ratio
+#if !defined(__cpp_lib_reference_wrapper)
+# if (__cplusplus > 202302L)
+# define __glibcxx_reference_wrapper 202403L
+# if defined(__glibcxx_want_all) || defined(__glibcxx_want_reference_wrapper)
+# define __cpp_lib_reference_wrapper 202403L
+# endif
+# endif
+#endif /* !defined(__cpp_lib_reference_wrapper) &&
defined(__glibcxx_want_reference_wrapper) */
+#undef __glibcxx_want_reference_wrapper
+
#if !defined(__cpp_lib_saturation_arithmetic)
# if (__cplusplus > 202302L)
# define __glibcxx_saturation_arithmetic 202311L
diff --git a/libstdc++-v3/include/std/functional
b/libstd
[gcc r14-9981] libstdc++: Update libstdc++.so versioning history for 14.1.0 release
https://gcc.gnu.org/g:b6239715c10193e73e66fe1671418459afd4a9aa commit r14-9981-gb6239715c10193e73e66fe1671418459afd4a9aa Author: Jonathan Wakely Date: Mon Apr 15 16:38:08 2024 +0100 libstdc++: Update libstdc++.so versioning history for 14.1.0 release We can replace "GCC " with "GCC 14.1.0" now that we're nearing the release. libstdc++-v3/ChangeLog: * doc/xml/manual/abi.xml: Replace "" with "14.1.0". * doc/html/manual/abi.html: Regenerate. Diff: --- libstdc++-v3/doc/html/manual/abi.html | 2 +- libstdc++-v3/doc/xml/manual/abi.xml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/libstdc++-v3/doc/html/manual/abi.html b/libstdc++-v3/doc/html/manual/abi.html index 3075477cc34..0eb6a12a501 100644 --- a/libstdc++-v3/doc/html/manual/abi.html +++ b/libstdc++-v3/doc/html/manual/abi.html @@ -110,7 +110,7 @@ compatible. has the same filename and DT_SONAME as the preceding release. It is versioned as follows: -GCC 3.0.0: libstdc++.so.3.0.0GCC 3.0.1: libstdc++.so.3.0.1GCC 3.0.2: libstdc++.so.3.0.2GCC 3.0.3: libstdc++.so.3.0.2 (See Note 1)GCC 3.0.4: libstdc++.so.3.0.4GCC 3.1.0: libstdc++.so.4.0.0 (Incompatible with previous)GCC 3.1.1: libstdc++.so.4.0.1GCC 3.2.0: libstdc++.so.5.0.0 (Incompatible with previous)GCC 3.2.1: libstdc++.so.5.0.1GCC 3.2.2: libstdc++.so.5.0.2GCC 3.2.3: libstdc++.so.5.0.3 (See Note 2)GCC 3.3.0: libstdc++.so.5.0.4 GCC 3.3.1: libstdc++.so.5.0.5GCC 3.4.0: libstdc++.so.6.0.0 (Incompatible with previous)GCC 3.4.1: libstdc++.so.6.0.1GCC 3.4.2: libstdc++.so.6.0.2GCC 3.4.3: libstdc++.so.6.0.3GCC 4.0.0: libstdc++.so.6.0.4GCC 4.0.1: libstdc++.so.6.0.5GCC 4.0.2: libstdc++.so.6.0.6GCC 4.0.3: libstdc++.so.6.0.7GCC 4.1.0: libstdc++.so.6.0.7GCC 4.1.1: libstdc++.so.6.0.8GCC 4.2.0: libstdc++.so.6.0.9GCC 4.2.1: libstdc++.so.6.0.9 (See Note 3)GCC 4.2.2: libstdc++.so.6.0.9GCC 4.3.0: libstdc++.so. 6.0.10GCC 4.4.0: libstdc++.so.6.0.11GCC 4.4.1: libstdc++.so.6.0.12GCC 4.4.2: libstdc++.so.6.0.13GCC 4.5.0: libstdc++.so.6.0.14GCC 4.6.0: libstdc++.so.6.0.15GCC 4.6.1: libstdc++.so.6.0.16GCC 4.7.0: libstdc++.so.6.0.17GCC 4.8.0: libstdc++.so.6.0.18GCC 4.8.3: libstdc++.so.6.0.19GCC 4.9.0: libstdc++.so.6.0.20GCC 5.1.0: libstdc++.so.6.0.21GCC 6.1.0: libstdc++.so.6.0.22GCC 7.1.0: libstdc++.so.6.0.23GCC 7.2.0: libstdc++.so.6.0.24GCC 8.1.0: libstdc++.so.6.0.25GCC 9.1.0: li bstdc++.so.6.0.26GCC 9.2.0: libstdc++.so.6.0.27GCC 9.3.0: libstdc++.so.6.0.28GCC 10.1.0: libstdc++.so.6.0.28GCC 11.1.0: libstdc++.so.6.0.29GCC 12.1.0: libstdc++.so.6.0.30GCC 13.1.0: libstdc++.so.6.0.31GCC 13.2.0: libstdc++.so.6.0.32GCC: libstdc++.so.6.0.33 +GCC 3.0.0: libstdc++.so.3.0.0GCC 3.0.1: libstdc++.so.3.0.1GCC 3.0.2: libstdc++.so.3.0.2GCC 3.0.3: libstdc++.so.3.0.2 (See Note 1)GCC 3.0.4: libstdc++.so.3.0.4GCC 3.1.0: libstdc++.so.4.0.0 (Incompatible with previous)GCC 3.1.1: libstdc++.so.4.0.1GCC 3.2.0: libstdc++.so.5.0.0 (Incompatible with previous)GCC 3.2.1: libstdc++.so.5.0.1GCC 3.2.2: libstdc++.so.5.0.2GCC 3.2.3: libstdc++.so.5.0.3 (See Note 2)GCC 3.3.0: libstdc++.so.5.0.4 GCC 3.3.1: libstdc++.so.5.0.5GCC 3.4.0: libstdc++.so.6.0.0 (Incompatible with previous)GCC 3.4.1: libstdc++.so.6.0.1GCC 3.4.2: libstdc++.so.6.0.2GCC 3.4.3: libstdc++.so.6.0.3GCC 4.0.0: libstdc++.so.6.0.4GCC 4.0.1: libstdc++.so.6.0.5GCC 4.0.2: libstdc++.so.6.0.6GCC 4.0.3: libstdc++.so.6.0.7GCC 4.1.0: libstdc++.so.6.0.7GCC 4.1.1: libstdc++.so.6.0.8GCC 4.2.0: libstdc++.so.6.0.9GCC 4.2.1: libstdc++.so.6.0.9 (See Note 3)GCC 4.2.2: libstdc++.so.6.0.9GCC 4.3.0: libstdc++.so. 6.0.10GCC 4.4.0: libstdc++.so.6.0.11GCC 4.4.1: libstdc++.so.6.0.12GCC 4.4.2: libstdc++.so.6.0.13GCC 4.5.0: libstdc++.so.6.0.14GCC 4.6.0: libstdc++.so.6.0.15GCC 4.6.1: libstdc++.so.6.0.16GCC 4.7.0: libstdc++.so.6.0.17GCC 4.8.0: libstdc++.so.6.0.18GCC 4.8.3: libstdc++.so.6.0.19GCC 4.9.0: libstdc++.so.6.0.20GCC 5.1.0: libstdc++.so.6.0.21GCC 6.1.0: libstdc++.so.6.0.22GCC 7.1.0: libstdc++.so.6.0.23GCC 7.2.0: libstdc++.so.6.0.24GCC 8.1.0: libstdc++.so.6.0.25GCC 9.1.0: li bstdc++.so.6.0.26GCC 9.2.0: libstdc++.so.6.0.27GCC 9.3.0: libstdc++.so.6.0.28GCC 10.1.0: libstdc++.so.6.0.28GCC 11.1.0: libstdc++.so.6.0.29GCC 12.1.0: libstdc++.so.6.0.30GCC 13.1.0: libstdc++.so.6.0.31GCC 13.2.0: libstdc++.so.6.0.32GCC 14.1.0: libstdc++.so.6.0.33 Note 1: Error should be libstdc++.so.3.0.3. Note 2: Not strictly required. diff --git a/libstdc++-v3/doc/xml/manual/abi.xml b/libstdc++-v3/doc/xml/manual/abi.xml index ef66faa8224..a4ce866b884 100644 --- a/libstdc++-v3/doc/xml/manual/abi.xml +++ b/libstdc++-v3/doc/xml/manual/abi.xml @@ -281,7 +281,7 @@ compatible. GCC 12.1.0: libstdc++.so.6.0.30 GCC 13.1.0: libstdc++.so.6.0.31 GCC 13.2.0: libstdc++.so.6.0.32 -GCC : libstdc++.so.6.0.33 +GCC 14.1.0: libstdc++.so.6.0.33 Note 1: Error should be libstdc++.so.3.0.3.
[gcc r14-9982] gotools: Workaround non-reproduceability of automake
https://gcc.gnu.org/g:701e1b94066583f909aee1b5e95ea4dacd9c43b3 commit r14-9982-g701e1b94066583f909aee1b5e95ea4dacd9c43b3 Author: Jakub Jelinek Date: Mon Apr 15 22:32:37 2024 +0200 gotools: Workaround non-reproduceability of automake The regen bot recently flagged a difference in gotools/Makefile.in. Trying it locally, it seems pretty random for i in `seq 20`; do PATH=~/automake-1.15.1/bin:~/autoconf-2.69/bin:$PATH automake; echo -n `git diff Makefile.in | wc -l`" "; done; echo; for i in `seq 20`; do +PATH=~/automake-1.15.1/bin:~/autoconf-2.69/bin:$PATH setarch x86_64 -R automake; echo -n `git diff Makefile.in | wc -l`" "; done; echo; 14 14 14 0 0 0 14 0 14 0 14 14 14 14 0 14 14 0 0 0 14 0 14 0 0 14 14 14 0 14 14 0 0 14 14 14 0 0 0 14 The 14 line git diff is diff --git a/gotools/Makefile.in b/gotools/Makefile.in index 36c2ec2abd3..f40883c39be 100644 --- a/gotools/Makefile.in +++ b/gotools/Makefile.in @@ -704,8 +704,8 @@ distclean-generic: maintainer-clean-generic: @echo "This command is intended for maintainers to use" @echo "it deletes files that may require special tools to rebuild." -@NATIVE_FALSE@install-exec-local: @NATIVE_FALSE@uninstall-local: +@NATIVE_FALSE@install-exec-local: clean: clean-am clean-am: clean-binPROGRAMS clean-generic clean-noinstPROGRAMS \ so whether it is @NATIVE_FALSE@install-exec-local: @NATIVE_FALSE@uninstall-local: or @NATIVE_FALSE@uninstall-local: @NATIVE_FALSE@install-exec-local: depends on some hash table traversal or what. I'm not familiar with automake/m4 enough to debug that, so I'm instead offering a workaround, with this patch the order is deterministic. 2024-04-15 Jakub Jelinek * Makefile.am (install-exec-local, uninstall-local): Add goals on the else branch of if NATIVE to ensure reproducibility. * Makefile.in: Regenerate. Diff: --- gotools/Makefile.am | 2 ++ gotools/Makefile.in | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/gotools/Makefile.am b/gotools/Makefile.am index d2376b9c25b..80b21847117 100644 --- a/gotools/Makefile.am +++ b/gotools/Makefile.am @@ -366,5 +366,7 @@ else # only do this if such a compiler is available. We also need to get # the right values for GOARCH and GOOS in the default build context in # the go/build package. Figure this out later. +install-exec-local: +uninstall-local: endif diff --git a/gotools/Makefile.in b/gotools/Makefile.in index 36c2ec2abd3..8a4a68e120b 100644 --- a/gotools/Makefile.in +++ b/gotools/Makefile.in @@ -704,8 +704,6 @@ distclean-generic: maintainer-clean-generic: @echo "This command is intended for maintainers to use" @echo "it deletes files that may require special tools to rebuild." -@NATIVE_FALSE@install-exec-local: -@NATIVE_FALSE@uninstall-local: clean: clean-am clean-am: clean-binPROGRAMS clean-generic clean-noinstPROGRAMS \ @@ -1035,6 +1033,8 @@ mostlyclean-local: # only do this if such a compiler is available. We also need to get # the right values for GOARCH and GOOS in the default build context in # the go/build package. Figure this out later. +@NATIVE_FALSE@install-exec-local: +@NATIVE_FALSE@uninstall-local: # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded.
[gcc(refs/users/meissner/heads/work164-test)] Update TAR support.
https://gcc.gnu.org/g:3212394be5a6ade7b60a0d126e7dcadee8a04fb2 commit 3212394be5a6ade7b60a0d126e7dcadee8a04fb2 Author: Michael Meissner Date: Mon Apr 15 16:44:40 2024 -0400 Update TAR support. 2024-04-15 Michael Meissner gcc/ * config/rs6000/rs6000.cc (rs6000_debug_reg_global): Correctly print TAR register. (rs6000_init_hard_regno_mode_ok): Correctly initial TAR register. * config/rs6000/rs6000.md (mov_internal): Add support for TAR register. (movcc_): Likewise. (movsf_hardfloat): Likewise. (movsf_hardfloat): Likewise. (movsd_hardfloat): Likewise. (mov_hardfloat64): Likewise. (mov_softfloat6): Likewise. (indirect_jump): Likewise. (@indirect_jump_nospec): Likewise. (tf_): Remove TAR register. * lra-constraints.cc (lra_constraints): Add debug_rtx before raising an error. Diff: --- gcc/config/rs6000/rs6000.cc | 5 +++-- gcc/config/rs6000/rs6000.md | 24 gcc/lra-constraints.cc | 9 ++--- 3 files changed, 21 insertions(+), 17 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 72e26dc2afd..908ad5dcb58 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -2304,7 +2304,7 @@ rs6000_debug_reg_global (void) "vs"); rs6000_debug_reg_print (LR_REGNO, LR_REGNO, "lr"); rs6000_debug_reg_print (CTR_REGNO, CTR_REGNO, "ctr"); - rs6000_debug_reg_print (TAR_REGNO, CTR_REGNO, "tar"); + rs6000_debug_reg_print (TAR_REGNO, TAR_REGNO, "tar"); rs6000_debug_reg_print (CR0_REGNO, CR7_REGNO, "cr"); rs6000_debug_reg_print (CA_REGNO, CA_REGNO, "ca"); rs6000_debug_reg_print (VRSAVE_REGNO, VRSAVE_REGNO, "vrsave"); @@ -2781,7 +2781,7 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p) rs6000_regno_regclass[LR_REGNO] = LINK_REGS; rs6000_regno_regclass[CTR_REGNO] = CTR_REGS; - rs6000_regno_regclass[TAR_REGNO] = LINK_OR_CTR_REGS; + rs6000_regno_regclass[TAR_REGNO] = TAR_REGS; rs6000_regno_regclass[CA_REGNO] = NO_REGS; rs6000_regno_regclass[VRSAVE_REGNO] = VRSAVE_REGS; rs6000_regno_regclass[VSCR_REGNO] = VRSAVE_REGS; @@ -2801,6 +2801,7 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p) reg_class_to_reg_type[(int)VSCR_REGS] = SPR_REG_TYPE; reg_class_to_reg_type[(int)LINK_REGS] = SPR_REG_TYPE; reg_class_to_reg_type[(int)CTR_REGS] = SPR_REG_TYPE; + reg_class_to_reg_type[(int)TAR_REGS] = SPR_REG_TYPE; reg_class_to_reg_type[(int)LINK_OR_CTR_REGS] = SPR_REG_TYPE; reg_class_to_reg_type[(int)CR_REGS] = CR_REG_TYPE; reg_class_to_reg_type[(int)CR0_REGS] = CR_REG_TYPE; diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index d422e1c184b..efd441f4911 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8069,7 +8069,7 @@ [(set (match_operand:QHI 0 "nonimmediate_operand" "=r,r, wa,m, ?Z,r, wa,wa,wa,v, ?v,r, -wa,r, *c*l, *h") +wa,r, *wt*c*l, *h") (match_operand:QHI 1 "input_operand" "r, m, ?Z,r, wa,i, wa,O, wM,wB,wS,wa, @@ -8120,9 +8120,9 @@ (define_insn "*movcc_" [(set (match_operand:CC_any 0 "nonimmediate_operand" - "=y,x,?y,y,r,r,r,r, r,*c*l,r,m") + "=y,x,?y,y,r,r,r,r, r,*wt*c*l,r,m") (match_operand:CC_any 1 "general_operand" - " y,r, r,O,x,y,r,I,*h,r,m,r"))] + " y,r, r,O,x,y,r,I,*h, r,m,r"))] "register_operand (operands[0], mode) || register_operand (operands[1], mode)" "@ @@ -8210,7 +8210,7 @@ [(set (match_operand:SF 0 "nonimmediate_operand" "=!r, f, v, wa,m, wY, Z, m, wa, !r,f, wa, - !r,*c*l, !r, *h,wa") + !r,*wt*c*l, !r, *h,wa") (match_operand:SF 1 "input_operand" "m, m, wY, Z, f, v, wa,r, j, j, f, wa, @@ -8256,7 +8256,7 @@ (define_insn "movsd_hardfloat" [(set (match_operand:SD 0 "nonimmediate_operand" "=!r, d, m, ?Z,?d,?r, - f, !r,*c*l, !r,*h") + f, !r,*wt*c*l, !r,*h") (match_operand:SD 1 "input_operand" "m, ?Z,r, wx,r, d, f, r, r, *h,0"))] @@ -8286,7
[gcc(refs/users/meissner/heads/work164-test)] Update ChangeLog.*
https://gcc.gnu.org/g:4b2a63df76b9046fd770e2748e9bd281c3becff1 commit 4b2a63df76b9046fd770e2748e9bd281c3becff1 Author: Michael Meissner Date: Mon Apr 15 16:46:05 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.test | 25 + 1 file changed, 25 insertions(+) diff --git a/gcc/ChangeLog.test b/gcc/ChangeLog.test index 8b12e86f37b..fd5e9d14a39 100644 --- a/gcc/ChangeLog.test +++ b/gcc/ChangeLog.test @@ -1,3 +1,28 @@ + Branch work164-test, patch #303 + +Update TAR support. + +2024-04-15 Michael Meissner + +gcc/ + + * config/rs6000/rs6000.cc (rs6000_debug_reg_global): Correctly print TAR + register. + (rs6000_init_hard_regno_mode_ok): Correctly initial TAR register. + * config/rs6000/rs6000.md (mov_internal): Add support for TAR + register. + (movcc_): Likewise. + (movsf_hardfloat): Likewise. + (movsf_hardfloat): Likewise. + (movsd_hardfloat): Likewise. + (mov_hardfloat64): Likewise. + (mov_softfloat6): Likewise. + (indirect_jump): Likewise. + (@indirect_jump_nospec): Likewise. + (tf_): Remove TAR register. + * lra-constraints.cc (lra_constraints): Add debug_rtx before raising an + error. + Branch work164-test, patch #302 Remove moves for tar register.
[gcc(refs/users/meissner/heads/work164-test)] Adjust tests for tar register
https://gcc.gnu.org/g:623c518fcd301246b5783362a4e53ad517524e49
commit 623c518fcd301246b5783362a4e53ad517524e49
Author: Michael Meissner
Date: Mon Apr 15 18:37:51 2024 -0400
Adjust tests for tar register
2024-04-15 Michael Meissner
gcc/
* gcc.target/powerpc/ppc-switch-1.c: Adjust test to account for
using
the TAR regisgter.
* gcc.target/powerpc/safe-indirect-jump-3.c: Likewise.
* gcc.target/powerpc/safe-indirect-jump-3.c: Likewise.
Diff:
---
gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c | 4 ++--
gcc/testsuite/gcc.target/powerpc/pr51513.c | 4 ++--
gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c
b/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c
index eb379a0f67d..7c1031d1b39 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c
@@ -1,8 +1,8 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-options "-O2 --param case-values-threshold=2" } */
-/* { dg-final { scan-assembler "mtctr" } } */
-/* { dg-final { scan-assembler "bctr" } } */
+/* { dg-final { scan-assembler "mt\(ctr\|tar\)" } } */
+/* { dg-final { scan-assembler "b\(ctr\|tar\)" } } */
/* Force using a dispatch table even though by default we would generate
ifs. */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr51513.c
b/gcc/testsuite/gcc.target/powerpc/pr51513.c
index 1c72a75502a..43c06da8f32 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr51513.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr51513.c
@@ -1,8 +1,8 @@
/* { dg-do compile { target { powerpc*-*-linux* } } } */
/* { dg-options "-O2 -fjump-tables --param case-values-threshold=1" } */
/* Verify we created a jump table. */
-/* { dg-final { scan-assembler-times "mtctr " 1 } } */
-/* { dg-final { scan-assembler-times "bctr" 1 } } */
+/* { dg-final { scan-assembler-times "mt\(ctr\|tar\) " 1 } } */
+/* { dg-final { scan-assembler-times "b\(ctr\|tar\)" 1 } } */
/* Verify we eliminated the range check. */
/* { dg-final { scan-assembler-not "cmpldi" } } */
/* { dg-final { scan-assembler-not "cmplwi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c
b/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c
index 87881fb18fc..f61a4dbfad8 100644
--- a/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c
@@ -47,5 +47,5 @@ int foo (int x)
}
/* { dg-final { scan-assembler "crset" } } */
-/* { dg-final { scan-assembler "beqctr-" } } */
+/* { dg-final { scan-assembler "beq\(ctr\|tar\)-" } } */
/* { dg-final { scan-assembler {b \$} } } */
[gcc(refs/users/meissner/heads/work164-test)] Update ChangeLog.*
https://gcc.gnu.org/g:df331a2f871bed812082295bb7afaa3ddd81ea60 commit df331a2f871bed812082295bb7afaa3ddd81ea60 Author: Michael Meissner Date: Mon Apr 15 18:38:39 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.test | 13 + 1 file changed, 13 insertions(+) diff --git a/gcc/ChangeLog.test b/gcc/ChangeLog.test index fd5e9d14a39..146d70fca7f 100644 --- a/gcc/ChangeLog.test +++ b/gcc/ChangeLog.test @@ -1,3 +1,16 @@ + Branch work164-test, patch #304 + +Adjust tests for tar register + +2024-04-15 Michael Meissner + +gcc/ + + * gcc.target/powerpc/ppc-switch-1.c: Adjust test to account for using + the TAR regisgter. + * gcc.target/powerpc/safe-indirect-jump-3.c: Likewise. + * gcc.target/powerpc/safe-indirect-jump-3.c: Likewise. + Branch work164-test, patch #303 Update TAR support.
[gcc r14-9984] LoongArch: Add indexes for some compilation options.
https://gcc.gnu.org/g:46d914d0e0b7e982627edb285c41c67cc4e640ac commit r14-9984-g46d914d0e0b7e982627edb285c41c67cc4e640ac Author: Lulu Cheng Date: Tue Apr 9 11:48:13 2024 +0800 LoongArch: Add indexes for some compilation options. gcc/ChangeLog: * config/loongarch/loongarch.opt.urls: Regenerate. * config/mn10300/mn10300.opt.urls: Likewise. * config/msp430/msp430.opt.urls: Likewise. * config/nds32/nds32-elf.opt.urls: Likewise. * config/nds32/nds32-linux.opt.urls: Likewise. * config/nds32/nds32.opt.urls: Likewise. * config/pru/pru.opt.urls: Likewise. * config/riscv/riscv.opt.urls: Likewise. * config/rx/rx.opt.urls: Likewise. * config/sh/sh.opt.urls: Likewise. * config/sparc/sparc.opt.urls: Likewise. * doc/invoke.texi: Add indexes for some compilation options. Diff: --- gcc/config/loongarch/loongarch.opt.urls | 9 +++-- gcc/config/mn10300/mn10300.opt.urls | 2 +- gcc/config/msp430/msp430.opt.urls | 2 +- gcc/config/nds32/nds32-elf.opt.urls | 2 +- gcc/config/nds32/nds32-linux.opt.urls | 2 +- gcc/config/nds32/nds32.opt.urls | 2 +- gcc/config/pru/pru.opt.urls | 2 +- gcc/config/riscv/riscv.opt.urls | 2 +- gcc/config/rx/rx.opt.urls | 2 +- gcc/config/sh/sh.opt.urls | 2 +- gcc/config/sparc/sparc.opt.urls | 2 +- gcc/doc/invoke.texi | 7 ++- 12 files changed, 23 insertions(+), 13 deletions(-) diff --git a/gcc/config/loongarch/loongarch.opt.urls b/gcc/config/loongarch/loongarch.opt.urls index 88f0bb0f96f..9ed5d7b5596 100644 --- a/gcc/config/loongarch/loongarch.opt.urls +++ b/gcc/config/loongarch/loongarch.opt.urls @@ -57,12 +57,17 @@ UrlSuffix(gcc/LoongArch-Options.html#index-mrecip) mrecip UrlSuffix(gcc/LoongArch-Options.html#index-mrecip) -; skipping UrlSuffix for 'mcmodel=' due to finding no URLs +mcmodel= +UrlSuffix(gcc/LoongArch-Options.html#index-mcmodel) mdirect-extern-access UrlSuffix(gcc/LoongArch-Options.html#index-mdirect-extern-access) -; skipping UrlSuffix for 'mrelax' due to finding no URLs +mrelax +UrlSuffix(gcc/LoongArch-Options.html#index-mrelax-2) + +mpass-mrelax-to-as +UrlSuffix(gcc/LoongArch-Options.html#index-mpass-mrelax-to-as) mtls-dialect= UrlSuffix(gcc/LoongArch-Options.html#index-mtls-dialect-1) diff --git a/gcc/config/mn10300/mn10300.opt.urls b/gcc/config/mn10300/mn10300.opt.urls index 396ca4aa2e6..d0d1cce53a0 100644 --- a/gcc/config/mn10300/mn10300.opt.urls +++ b/gcc/config/mn10300/mn10300.opt.urls @@ -19,7 +19,7 @@ mno-crt0 UrlSuffix(gcc/MN10300-Options.html#index-mno-crt0) mrelax -UrlSuffix(gcc/MN10300-Options.html#index-mrelax-2) +UrlSuffix(gcc/MN10300-Options.html#index-mrelax-3) mreturn-pointer-on-d0 UrlSuffix(gcc/MN10300-Options.html#index-mreturn-pointer-on-d0) diff --git a/gcc/config/msp430/msp430.opt.urls b/gcc/config/msp430/msp430.opt.urls index 420c1c50f13..b8b8f9ce184 100644 --- a/gcc/config/msp430/msp430.opt.urls +++ b/gcc/config/msp430/msp430.opt.urls @@ -28,7 +28,7 @@ msmall UrlSuffix(gcc/MSP430-Options.html#index-msmall) mrelax -UrlSuffix(gcc/MSP430-Options.html#index-mrelax-3) +UrlSuffix(gcc/MSP430-Options.html#index-mrelax-4) minrt UrlSuffix(gcc/MSP430-Options.html#index-minrt) diff --git a/gcc/config/nds32/nds32-elf.opt.urls b/gcc/config/nds32/nds32-elf.opt.urls index 5399afba7d3..3ae1efe7312 100644 --- a/gcc/config/nds32/nds32-elf.opt.urls +++ b/gcc/config/nds32/nds32-elf.opt.urls @@ -1,5 +1,5 @@ ; Autogenerated by regenerate-opt-urls.py from gcc/config/nds32/nds32-elf.opt and generated HTML mcmodel= -UrlSuffix(gcc/NDS32-Options.html#index-mcmodel) +UrlSuffix(gcc/NDS32-Options.html#index-mcmodel-1) diff --git a/gcc/config/nds32/nds32-linux.opt.urls b/gcc/config/nds32/nds32-linux.opt.urls index 27d39f04ad9..ac589ccd472 100644 --- a/gcc/config/nds32/nds32-linux.opt.urls +++ b/gcc/config/nds32/nds32-linux.opt.urls @@ -1,5 +1,5 @@ ; Autogenerated by regenerate-opt-urls.py from gcc/config/nds32/nds32-linux.opt and generated HTML mcmodel= -UrlSuffix(gcc/NDS32-Options.html#index-mcmodel) +UrlSuffix(gcc/NDS32-Options.html#index-mcmodel-1) diff --git a/gcc/config/nds32/nds32.opt.urls b/gcc/config/nds32/nds32.opt.urls index e34512d69ba..44fa0696b95 100644 --- a/gcc/config/nds32/nds32.opt.urls +++ b/gcc/config/nds32/nds32.opt.urls @@ -51,7 +51,7 @@ mctor-dtor UrlSuffix(gcc/NDS32-Options.html#index-mctor-dtor) mrelax -UrlSuffix(gcc/NDS32-Options.html#index-mrelax-4) +UrlSuffix(gcc/NDS32-Options.html#index-mrelax-5) ; skipping UrlSuffix for 'munaligned-access' due to finding no URLs diff --git a/gcc/config/pru/pru.opt.urls b/gcc/config/pru/pru.opt.urls index 1f8a26a0db5..c87affb112b 100644 --- a/gcc/config/pru/pru.opt.urls +++ b/gcc/config/pru/pru.opt.urls @@ -7,7 +7,7 @@ mmcu= UrlSuffix(gcc/PRU-Options.html#index-mmcu-2) mno-relax -UrlSuffix(gc
[gcc/aoliva/heads/testbase] (31 commits) LoongArch: Add indexes for some compilation options.
The branch 'aoliva/heads/testbase' was updated to point to: 46d914d0e0b... LoongArch: Add indexes for some compilation options. It previously pointed to: 1667962ae75... Daily bump. Diff: Summary of changes (added commits): --- 46d914d... LoongArch: Add indexes for some compilation options. (*) e1d4c8e... Daily bump. (*) 701e1b9... gotools: Workaround non-reproduceability of automake (*) b623971... libstdc++: Update libstdc++.so versioning history for 14.1. (*) 0d58450... libstdc++: Add std::reference_wrapper comparison operators (*) 2a0c083... libstdc++: Heterogeneous std::pair comparisons [PR113386] (*) 2d69441... libstdc++: Fix infinite loop in std::istream::ignore(n, del (*) 6e11bb4... AVR: Add 8 more avrxmega3 MCUs. (*) f8409c3... m68k: Quiet up cppcheck warning [PR114689] (*) 52972ab... libstdc++: Update baseline symbols for riscv64-linux (*) ab5bb2b... ada: Add documentation for Exceptional_Cases (*) 18e881e... Guard longjmp in test to not inf loop [PR114720] (*) 02cc8f3... RISC-V: Add VLS to mask vec_extract [PR114668]. (*) 9d573f7... gcov-profile/114715 - missing coverage for switch (*) a3281dd... x86: Allow TImode offsettable memory only with 8-bit consta (*) 85002f8... middle-end: adjust loop upper bounds when peeling for gaps (*) 3e1e73f... build: Check for cargo when building rust language (*) e3fda76... Inline 'gcc/rust/Make-lang.in:RUST_LIBDEPS' into single use (*) 24d92f6... Add 'gcc/rust/Make-lang.in:LIBPROC_MACRO_INTERNAL' (*) f7c8fa7... Inline 'gcc/rust/Make-lang.in:RUST_LDFLAGS' into single use (*) cb70a49... Remove 'libgrust/libproc_macro_internal' from 'gcc/rust/Mak (*) 7f4ba54... testsuite: i386: Restrict gcc.target/i386/fhardened-1.c etc (*) 7ec54f5... attribs: Don't crash on NULL TREE_TYPE in diag_attr_exclusi (*) 3878e9a... c++: Only emit exported GMF usings [PR114600] (*) fe99ab1... Daily bump. (*) 62a0ef0... c++: Setup aliases imported from modules [PR106820] (*) 3319d1a... Daily bump. (*) a9d3b3c... Regenerate c.opt.urls (*) da375ba... c++/modules: make bits_in/out move-constructible (*) 436ab7e... c++/modules: optimize tree flag streaming (*) 5ec5791... libstdc++: Update some baseline_symbols.txt (x32) (*) (*) This commit already exists in another branch. Because the reference `refs/users/aoliva/heads/testbase' matches your hooks.email-new-commits-only configuration, no separate email is sent for this commit.
[gcc r14-9985] [strub] improve handling of indirected volatile parms [PR112938]
https://gcc.gnu.org/g:c39dc5bb65c492fafc5a0fde83708b8d24e0338d
commit r14-9985-gc39dc5bb65c492fafc5a0fde83708b8d24e0338d
Author: Alexandre Oliva
Date: Tue Apr 16 01:24:59 2024 -0300
[strub] improve handling of indirected volatile parms [PR112938]
The earlier patch for PR112938 arranged for volatile parms to be made
indirect in internal strub wrapped bodies.
The first problem that remained, more evident, was that the indirected
parameter remained volatile, despite the indirection, but it wasn't
regimplified, so indirecting it was malformed gimple.
Regimplifying turned out not to be needed. The best course of action
was to drop the volatility from the by-reference parm, that was being
unexpectedly inherited from the original volatile parm.
That exposed another problem: the dereferences would then lose their
volatile status, so we had to bring volatile back to them.
for gcc/ChangeLog
PR middle-end/112938
* ipa-strub.cc (pass_ipa_strub::execute): Drop volatility from
indirected parm.
(maybe_make_indirect): Restore volatility in dereferences.
for gcc/testsuite/ChangeLog
PR middle-end/112938
* g++.dg/strub-internal-pr112938.cc: New.
Diff:
---
gcc/ipa-strub.cc| 7 +++
gcc/testsuite/g++.dg/strub-internal-pr112938.cc | 12
2 files changed, 19 insertions(+)
diff --git a/gcc/ipa-strub.cc b/gcc/ipa-strub.cc
index dff94222351..8fa7bdf5300 100644
--- a/gcc/ipa-strub.cc
+++ b/gcc/ipa-strub.cc
@@ -1940,6 +1940,9 @@ maybe_make_indirect (indirect_parms_t &indirect_parms,
tree op, int *rec)
TREE_TYPE (TREE_TYPE (op)),
op,
build_int_cst (TREE_TYPE (op), 0));
+ if (TYPE_VOLATILE (TREE_TYPE (TREE_TYPE (op)))
+ && !TREE_THIS_VOLATILE (ret))
+ TREE_SIDE_EFFECTS (ret) = TREE_THIS_VOLATILE (ret) = 1;
return ret;
}
}
@@ -2894,6 +2897,10 @@ pass_ipa_strub::execute (function *)
probably drop the TREE_ADDRESSABLE and keep the TRUE. */
tree ref_type = build_ref_type_for (nparm);
+ if (TREE_THIS_VOLATILE (nparm)
+ && TYPE_VOLATILE (TREE_TYPE (nparm))
+ && !TYPE_VOLATILE (ref_type))
+ TREE_SIDE_EFFECTS (nparm) = TREE_THIS_VOLATILE (nparm) = 0;
DECL_ARG_TYPE (nparm) = TREE_TYPE (nparm) = ref_type;
relayout_decl (nparm);
TREE_ADDRESSABLE (nparm) = 0;
diff --git a/gcc/testsuite/g++.dg/strub-internal-pr112938.cc
b/gcc/testsuite/g++.dg/strub-internal-pr112938.cc
new file mode 100644
index 000..5a74becc269
--- /dev/null
+++ b/gcc/testsuite/g++.dg/strub-internal-pr112938.cc
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-tree-optimized -O2" } */
+/* { dg-require-effective-target strub } */
+
+bool __attribute__ ((__strub__ ("internal")))
+f(bool i, volatile bool j)
+{
+ return (i ^ j) == j;
+}
+
+/* Check for two dereferences of the indirected volatile j parm. */
+/* { dg-final { scan-tree-dump-times {={v} \*j_[0-9][0-9]*(D)} 2 "optimized" }
} */
[gcc r14-9986] optimize Zicond conditional select cases.
https://gcc.gnu.org/g:6e925ba0a8b9619ed789a456b087755b488d66f1
commit r14-9986-g6e925ba0a8b9619ed789a456b087755b488d66f1
Author: Fei Gao
Date: Mon Apr 15 06:33:17 2024 +
optimize Zicond conditional select cases.
When one of the two input operands is 0, ADD and IOR are functionally
equivalent.
ADD is slightly preferred over IOR because ADD has a higher likelihood
of being implemented as a compressed instruction when compared to IOR.
C.ADD uses the CR format with any of the 32 RVI registers availble,
while C.OR uses the CA format with limit to just 8 of them.
Conditional select, if zero case:
rd = (rc == 0) ? rs1 : rs2
before patch:
czero.nez rd, rs1, rc
czero.eqz rtmp, rs2, rc
or rd, rd, rtmp
after patch:
czero.eqz rd, rs1, rc
czero.nez rtmp, rs2, rc
add rd, rd, rtmp
Same trick applies for the conditional select, if non-zero case:
rd = (rc != 0) ? rs1 : rs2
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_expand_conditional_move):
replace or with add when expanding zicond if possible.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/zicond-prefer-add-to-or.c: New test.
Diff:
---
gcc/config/riscv/riscv.cc| 2 +-
gcc/testsuite/gcc.target/riscv/zicond-prefer-add-to-or.c | 16
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 74445bc977c..0519e0679ed 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -4709,7 +4709,7 @@ riscv_expand_conditional_move (rtx dest, rtx op, rtx
cons, rtx alt)
gen_rtx_IF_THEN_ELSE (mode, cond1,
CONST0_RTX (mode),
alt)));
- riscv_emit_binary (IOR, dest, reg1, reg2);
+ riscv_emit_binary (PLUS, dest, reg1, reg2);
return true;
}
}
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-prefer-add-to-or.c
b/gcc/testsuite/gcc.target/riscv/zicond-prefer-add-to-or.c
new file mode 100644
index 000..f3f7beb0b5e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zicond-prefer-add-to-or.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zicond -mabi=lp64d -mbranch-cost=4" { target {
rv64 } } } */
+/* { dg-options "-march=rv32gc_zicond -mabi=ilp32f -mbranch-cost=4" { target {
rv32 } } } */
+/* { dg-skip-if "" { *-*-* } {"-O0" "-Og" "-Os" "-Oz"} } */
+
+long cond_select_if_zero(long a, long b, long c) {
+ return a == 0 ? c : b;
+}
+
+long cond_select_if_non_zero(long a, long b, long c) {
+ return a != 0 ? c : b;
+}
+
+/* { dg-final { scan-assembler-times {add\t} 2 } } */
+/* { dg-final { scan-assembler-not {or\t} } } */
+
