[gcc r14-9910] c++: Fix ANNOTATE_EXPR instantiation [PR114409]
https://gcc.gnu.org/g:cb46aca0a07355abf2f0b04f52087bca8f848524
commit r14-9910-gcb46aca0a07355abf2f0b04f52087bca8f848524
Author: Jakub Jelinek
Date: Thu Apr 11 09:46:00 2024 +0200
c++: Fix ANNOTATE_EXPR instantiation [PR114409]
The following testcase ICEs starting with the r14-4229 PR111529
change which moved ANNOTATE_EXPR handling from tsubst_expr to
tsubst_copy_and_build.
ANNOTATE_EXPR is only allowed in the IL to wrap a loop condition,
and the loop condition of while/for loops can be a COMPOUND_EXPR
with DECL_EXPR in the first operand and the corresponding VAR_DECL
in the second, as created by finish_cond
else if (!empty_expr_stmt_p (cond))
expr = build2 (COMPOUND_EXPR, TREE_TYPE (expr), cond, expr);
Since then Patrick reworked the instantiation, so that we have now
tsubst_stmt and tsubst_expr and ANNOTATE_EXPR ended up in the latter,
while only tsubst_stmt can handle DECL_EXPR.
Now, the reason why the while/for loops with variable declaration
in the condition works in templates without the pragmas (i.e. without
ANNOTATE_EXPR) is that both the FOR_STMT and WHILE_STMT handling uses
RECUR aka tsubst_stmt in handling of the *_COND operand:
case FOR_STMT:
stmt = begin_for_stmt (NULL_TREE, NULL_TREE);
RECUR (FOR_INIT_STMT (t));
finish_init_stmt (stmt);
tmp = RECUR (FOR_COND (t));
finish_for_cond (tmp, stmt, false, 0, false);
and
case WHILE_STMT:
stmt = begin_while_stmt ();
tmp = RECUR (WHILE_COND (t));
finish_while_stmt_cond (tmp, stmt, false, 0, false);
Therefore, it will handle DECL_EXPR embedded in COMPOUND_EXPR of the
{WHILE,FOR}_COND just fine.
But if that COMPOUND_EXPR with DECL_EXPR is wrapped with one or more
ANNOTATE_EXPRs, because ANNOTATE_EXPR is now done solely in tsubst_expr
and uses RECUR there (i.e. tsubst_expr), it will ICE on DECL_EXPR in there.
This could be fixed by keeping ANNOTATE_EXPR handling in tsubst_expr but
using tsubst_stmt for the first operand, but this patch instead
moves ANNOTATE_EXPR handling to tsubst_stmt (and uses tsubst_expr for the
second/third operand).
2024-04-11 Jakub Jelinek
PR c++/114409
* pt.cc (tsubst_expr) : Move to ...
(tsubst_stmt) : ... here. Use tsubst_expr
instead of RECUR for the last 2 arguments.
* g++.dg/ext/pr114409-2.C: New test.
Diff:
---
gcc/cp/pt.cc | 30 -
gcc/testsuite/g++.dg/ext/pr114409-2.C | 36 +++
2 files changed, 53 insertions(+), 13 deletions(-)
diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index bf4b89d8413..767778e53ef 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -19433,6 +19433,23 @@ tsubst_stmt (tree t, tree args, tsubst_flags_t
complain, tree in_decl)
case PREDICT_EXPR:
RETURN (add_stmt (copy_node (t)));
+case ANNOTATE_EXPR:
+ {
+ /* Although ANNOTATE_EXPR is an expression, it can only appear in
+ WHILE_COND, DO_COND or FOR_COND expressions, which are tsubsted
+ using tsubst_stmt rather than tsubst_expr and can contain
+ DECL_EXPRs. */
+ tree op1 = RECUR (TREE_OPERAND (t, 0));
+ tree op2 = tsubst_expr (TREE_OPERAND (t, 1), args, complain, in_decl);
+ tree op3 = tsubst_expr (TREE_OPERAND (t, 2), args, complain, in_decl);
+ if (TREE_CODE (op2) == INTEGER_CST
+ && wi::to_widest (op2) == (int) annot_expr_unroll_kind)
+ op3 = cp_check_pragma_unroll (EXPR_LOCATION (TREE_OPERAND (t, 2)),
+ op3);
+ RETURN (build3_loc (EXPR_LOCATION (t), ANNOTATE_EXPR,
+ TREE_TYPE (op1), op1, op2, op3));
+ }
+
default:
gcc_assert (!STATEMENT_CODE_P (TREE_CODE (t)));
@@ -21772,19 +21789,6 @@ tsubst_expr (tree t, tree args, tsubst_flags_t
complain, tree in_decl)
RETURN (op);
}
-case ANNOTATE_EXPR:
- {
- op1 = RECUR (TREE_OPERAND (t, 0));
- tree op2 = RECUR (TREE_OPERAND (t, 1));
- tree op3 = RECUR (TREE_OPERAND (t, 2));
- if (TREE_CODE (op2) == INTEGER_CST
- && wi::to_widest (op2) == (int) annot_expr_unroll_kind)
- op3 = cp_check_pragma_unroll (EXPR_LOCATION (TREE_OPERAND (t, 2)),
- op3);
- RETURN (build3_loc (EXPR_LOCATION (t), ANNOTATE_EXPR,
- TREE_TYPE (op1), op1, op2, op3));
- }
-
default:
/* Handle Objective-C++ constructs, if appropriate. */
if (tree subst = objcp_tsubst_expr (t, args, complain, in_decl))
diff --git a/gcc/testsuite/g++.dg/ext/pr114409-2.C
b/gcc/testsuite/g++.dg/ext/pr114409-2.C
new file mode 100644
index 000..3c2bb984fc3
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/pr114409-2.C
@@ -0,0 +
[gcc r14-9911] middle-end/114681 - condition coverage and inlining
https://gcc.gnu.org/g:52b63100b1eda433120e726d4e8f8dfca6fc94fa
commit r14-9911-g52b63100b1eda433120e726d4e8f8dfca6fc94fa
Author: Richard Biener
Date: Thu Apr 11 08:47:19 2024 +0200
middle-end/114681 - condition coverage and inlining
When inlining a gcond it can map to multiple stmts, esp. with
non-call EH. The following makes sure to pick up the remapped
condition when dealing with condition coverage.
PR middle-end/114681
* tree-inline.cc (copy_bb): Key on the remapped stmt
to identify gconds to have condition coverage data remapped.
* gcc.misc-tests/gcov-pr114681.c: New testcase.
Diff:
---
gcc/testsuite/gcc.misc-tests/gcov-pr114681.c | 18 ++
gcc/tree-inline.cc | 2 +-
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.misc-tests/gcov-pr114681.c
b/gcc/testsuite/gcc.misc-tests/gcov-pr114681.c
new file mode 100644
index 000..a8dc666a452
--- /dev/null
+++ b/gcc/testsuite/gcc.misc-tests/gcov-pr114681.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fnon-call-exceptions -fno-exceptions
-fcondition-coverage" } */
+
+float f, g;
+
+static void
+bar ()
+{
+ if (g < f)
+for (;;)
+ ;
+}
+
+void
+foo ()
+{
+ bar ();
+}
diff --git a/gcc/tree-inline.cc b/gcc/tree-inline.cc
index 5f852885e7f..238afb7de80 100644
--- a/gcc/tree-inline.cc
+++ b/gcc/tree-inline.cc
@@ -2090,7 +2090,7 @@ copy_bb (copy_body_data *id, basic_block bb,
/* If -fcondition-coverage is used, register the inlined conditions
in the cond->expression mapping of the caller. The expression tag
is shifted conditions from the two bodies are not mixed. */
- if (id->src_cfun->cond_uids && is_a (orig_stmt))
+ if (id->src_cfun->cond_uids && is_a (stmt))
{
gcond *orig_cond = as_a (orig_stmt);
gcond *cond = as_a (stmt);
[gcc r14-9912] tree-optimization/109596 - wrong debug stmt move by copyheader
https://gcc.gnu.org/g:c7e8a8d814229fd6fc4c16c2452f15dddc613479
commit r14-9912-gc7e8a8d814229fd6fc4c16c2452f15dddc613479
Author: Richard Biener
Date: Thu Apr 11 11:08:07 2024 +0200
tree-optimization/109596 - wrong debug stmt move by copyheader
The following fixes an omission in r14-162-gcda246f8b421ba causing
wrong-debug and a bunch of guality regressions.
PR tree-optimization/109596
* tree-ssa-loop-ch.cc (ch_base::copy_headers): Propagate
debug stmts to nonexit->dest rather than exit->dest.
Diff:
---
gcc/tree-ssa-loop-ch.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/tree-ssa-loop-ch.cc b/gcc/tree-ssa-loop-ch.cc
index 1f0033be4c4..b7ef485c4cc 100644
--- a/gcc/tree-ssa-loop-ch.cc
+++ b/gcc/tree-ssa-loop-ch.cc
@@ -957,7 +957,7 @@ ch_base::copy_headers (function *fun)
edge entry = loop_preheader_edge (loop);
- propagate_threaded_block_debug_into (exit->dest, entry->dest);
+ propagate_threaded_block_debug_into (nonexit->dest, entry->dest);
if (!gimple_duplicate_seme_region (entry, exit, bbs, n_bbs, copied_bbs,
true))
{
[gcc r14-9913] asan, v3: Fix up handling of > 32 byte aligned variables with -fsanitize=address -fstack-protector*
https://gcc.gnu.org/g:467898d513e602f5b5fc4183052217d7e6d6e8ab
commit r14-9913-g467898d513e602f5b5fc4183052217d7e6d6e8ab
Author: Jakub Jelinek
Date: Thu Apr 11 11:12:11 2024 +0200
asan, v3: Fix up handling of > 32 byte aligned variables with
-fsanitize=address -fstack-protector* [PR110027]
On Tue, Mar 26, 2024 at 02:08:02PM +0800, liuhongt wrote:
> > > So, try to add some other variable with larger size and smaller
alignment
> > > to the frame (and make sure it isn't optimized away).
> > >
> > > alignb above is the alignment of the first partition's var, if
> > > align_frame_offset really needs to depend on the var alignment, it
probably
> > > should be the maximum alignment of all the vars with alignment
> > > alignb * BITS_PER_UNIT <=3D MAX_SUPPORTED_STACK_ALIGNMENT
> > >
>
> In asan_emit_stack_protection, when it allocated fake stack, it assume
> bottom of stack is also aligned to alignb. And the place violated this
> is the first var partition. which is 32 bytes offsets, it should be
> BIGGEST_ALIGNMENT / BITS_PER_UNIT.
> So I think we need to use MAX (BIGGEST_ALIGNMENT /
> BITS_PER_UNIT, ASAN_RED_ZONE_SIZE) for the first var partition.
Your first patch aligned offsets[0] to maximum of alignb and
ASAN_RED_ZONE_SIZE. But as I wrote in the reply to that mail, alignb there
is the alignment of just a single variable which is the first one to appear
in the sorted list and is placed in the highest spot in the stack frame.
That is not necessarily the largest alignment, the sorting ensures that it
is a variable with the largest size in the frame (and only if several of
them have equal size, largest alignment from the same sized ones). Your
second patch used maximum of BIGGEST_ALIGNMENT / BITS_PER_UNIT and
ASAN_RED_ZONE_SIZE. That doesn't change anything at all when using
-mno-avx512f - offsets[0] is still just 32-byte aligned in that case
relative to top of frame, just changes the -mavx512f case to be 64-byte
aligned offsets[0] (aka offsets[0] is then either 0 or -64 instead of either
0 or -32). That will not help if any variable in the frame needs 128-byte,
256-byte, 512-byte ... 4096-byte alignment. If you want to fix the bug in
the spot you've touched, you'd need to walk all the
stack_vars[stack_vars_sorted[si2]] for si2 [si + 1, n - 1] and for those
where the loop would do anything (i.e.
stack_vars[i2].representative == i2
&& TREE_CODE (decl2) == SSA_NAME
? SA.partition_to_pseudo[var_to_partition (SA.map, decl2)] == NULL_RTX
: DECL_RTL (decl2) == pc_rtx
and the pred applies (but that means also walking the earlier ones!
because with -fstack-protector* the vars can be processed in several calls)
and
alignb2 * BITS_PER_UNIT <= MAX_SUPPORTED_STACK_ALIGNMENT
and compute maximum of those alignments.
That maximum is already computed,
data->asan_alignb = MAX (data->asan_alignb, alignb);
computes that, but you get the final result only after you do all the
expand_stack_vars calls. You'd need to compute it before.
Though, that change would be still in the wrong place.
The thing is, it would be a waste of the precious stack space when it isn't
needed at all (e.g. when asan will not at compile time do the use after
return checking, or if it won't do it at runtime, or even if it will do at
runtime it will waste the space on the stack).
The following patch fixes it solely for the __asan_stack_malloc_N
allocations, doesn't enlarge unnecessarily further the actual stack frame.
Because asan is only supported on FRAME_GROWS_DOWNWARD architectures
(mips, rs6000 and xtensa are conditional FRAME_GROWS_DOWNWARD arches, which
for -fsanitize=address or -fstack-protector* use FRAME_GROWS_DOWNWARD 1,
otherwise 0, others supporting asan always just use 1), the assumption for
the dynamic stack realignment is that the top of the stack frame (aka offset
0) is aligned to alignb passed to the function (which is the maximum of
alignb
of all the vars in the frame). As checked by the assertion in the patch,
offsets[0] is 0 most of the time and so that assumption is correct, the only
case when it is not 0 is if -fstack-protector* is on together with
-fsanitize=address and cfgexpand.cc (create_stack_guard) created a stack
guard. That is the only variable which is allocated in the stack frame
right away, for all others with -fsanitize=address defer_stack_allocation
(or -fstack-protector*) returns true and so they aren't allocated
immediately but handled during the frame layout phases. So, the original
frame_offset of 0 is changed because of the stack guard to
-pointer_size_in_bytes and later at the
if (data->asan_vec.is_empty ())
{
align_frame_offset (ASAN_RED_ZONE_
[gcc r14-9914] libstdc++: Regenerate baseline_symbols.txt files for Linux
https://gcc.gnu.org/g:508b2b9df12b1049a0850e3a29193b1277dcd817 commit r14-9914-g508b2b9df12b1049a0850e3a29193b1277dcd817 Author: Jakub Jelinek Date: Thu Apr 11 15:55:53 2024 +0200 libstdc++: Regenerate baseline_symbols.txt files for Linux The following patch regenerates the ABI files for 13 branch (I've only changed the Linux files which were updated in r13-7289, all but m68k, riscv64 and powerpc64 are from actual Fedora 39 gcc builds, the rest hand edited). We've added one symbol very early in the 13.2 cycle, but then added 2 further ones very soon afterwards, quite a long time before 13.2 release and haven't regenerated. The patch applies cleanly to trunk as well. 2024-04-11 Jakub Jelinek * config/abi/post/x86_64-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt: Update. * config/abi/post/i486-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/m68k-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/aarch64-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/s390x-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt: Update. Diff: --- libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt| 2 ++ libstdc++-v3/config/abi/post/m68k-linux-gnu/baseline_symbols.txt| 2 ++ libstdc++-v3/config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/s390x-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/x86_64-linux-gnu/baseline_symbols.txt | 2 ++ 9 files changed, 18 insertions(+) diff --git a/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt b/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt index 975af4cdff1..550a181772b 100644 --- a/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt +++ b/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt @@ -3214,6 +3214,7 @@ FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@@GLIBCX FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_S_compareEmm@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_capacityEm@@GLIBCXX_3.4.21 +FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_S_allocateERS3_m@@GLIBCXX_3.4.32 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC1EPcOS3_@@GLIBCXX_3.4.23 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC1EPcRKS3_@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC2EPcOS3_@@GLIBCXX_3.4.23 @@ -3366,6 +3367,7 @@ FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_disposeEv@@GLIBCX FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_replaceEmmPKwm@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_S_compareEmm@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_M_capacityEm@@GLIBCXX_3.4.21 +FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_S_allocateERS3_m@@GLIBCXX_3.4.32 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwOS3_@@GLIBCXX_3.4.23 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwRKS3_@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC2EPwOS3_@@GLIBCXX_3.4.23 diff --git a/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt b/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt index 2e1d8b3d8b2..62970e9c58a 100644 --- a/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt +++ b/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt @@ -3214,6 +3214,7 @@ FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@@GLIBCX FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEjjPKcj@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_S_compareEjj@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_capacityEj@@GLIBCXX_3.4.21 +FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_S_allocateERS3_j@@GLIBCXX_3.4.32 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_
[gcc r13-8599] libstdc++: Regenerate baseline_symbols.txt files for Linux
https://gcc.gnu.org/g:5824e67591e3afac958f02bd4f934494a5f7ae2e commit r13-8599-g5824e67591e3afac958f02bd4f934494a5f7ae2e Author: Jakub Jelinek Date: Thu Apr 11 15:55:53 2024 +0200 libstdc++: Regenerate baseline_symbols.txt files for Linux The following patch regenerates the ABI files for 13 branch (I've only changed the Linux files which were updated in r13-7289, all but m68k, riscv64 and powerpc64 are from actual Fedora 39 gcc builds, the rest hand edited). We've added one symbol very early in the 13.2 cycle, but then added 2 further ones very soon afterwards, quite a long time before 13.2 release and haven't regenerated. The patch applies cleanly to trunk as well. 2024-04-11 Jakub Jelinek * config/abi/post/x86_64-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt: Update. * config/abi/post/i486-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/m68k-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/aarch64-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/s390x-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt: Update. (cherry picked from commit 508b2b9df12b1049a0850e3a29193b1277dcd817) Diff: --- libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt| 2 ++ libstdc++-v3/config/abi/post/m68k-linux-gnu/baseline_symbols.txt| 2 ++ libstdc++-v3/config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/s390x-linux-gnu/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt | 2 ++ libstdc++-v3/config/abi/post/x86_64-linux-gnu/baseline_symbols.txt | 2 ++ 9 files changed, 18 insertions(+) diff --git a/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt b/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt index 975af4cdff1..550a181772b 100644 --- a/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt +++ b/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt @@ -3214,6 +3214,7 @@ FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@@GLIBCX FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_S_compareEmm@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_capacityEm@@GLIBCXX_3.4.21 +FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_S_allocateERS3_m@@GLIBCXX_3.4.32 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC1EPcOS3_@@GLIBCXX_3.4.23 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC1EPcRKS3_@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC2EPcOS3_@@GLIBCXX_3.4.23 @@ -3366,6 +3367,7 @@ FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_disposeEv@@GLIBCX FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_replaceEmmPKwm@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_S_compareEmm@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_M_capacityEm@@GLIBCXX_3.4.21 +FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_S_allocateERS3_m@@GLIBCXX_3.4.32 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwOS3_@@GLIBCXX_3.4.23 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwRKS3_@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC2EPwOS3_@@GLIBCXX_3.4.23 diff --git a/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt b/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt index 2e1d8b3d8b2..62970e9c58a 100644 --- a/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt +++ b/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt @@ -3214,6 +3214,7 @@ FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@@GLIBCX FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEjjPKcj@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_S_compareEjj@@GLIBCXX_3.4.21 FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_capacityEj@@GLIBCXX_3.4.21 +FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_S_allocateERS3_j@@GLIBCX
[gcc r14-9915] modula2: add modula-2 language section to languages supported by GCC
https://gcc.gnu.org/g:0dc39dee836761f1bc993d760f4ed5f3d127897a
commit r14-9915-g0dc39dee836761f1bc993d760f4ed5f3d127897a
Author: Gaius Mulley
Date: Thu Apr 11 15:04:49 2024 +0100
modula2: add modula-2 language section to languages supported by GCC
This patch introduces a small modula-2 language section to the
Language Standards Supported by GCC node.
gcc/ChangeLog:
* doc/standards.texi (Language Standards Supported by GCC):
Add Modula-2 language section.
Signed-off-by: Gaius Mulley
Diff:
---
gcc/doc/standards.texi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/gcc/doc/standards.texi b/gcc/doc/standards.texi
index 06444ee15f7..586835b28f3 100644
--- a/gcc/doc/standards.texi
+++ b/gcc/doc/standards.texi
@@ -332,6 +332,17 @@ GCC supports the D 2.0 programming language. The D
language itself is
currently defined by its reference implementation and supporting language
specification, described at @uref{https://dlang.org/spec/spec.html}.
+@section Modula-2 language
+
+GCC supports the Modula-2 language and is compliant with the PIM2,
+PIM3, PIM4 and ISO dialects. Also implemented are a complete set of
+free ISO libraries. It also contains a collection of PIM libraries
+and some Logitech compatible libraries.
+
+For more information on Modula-2 see
+@uref{https://gcc.gnu.org/readings.html}. The online manual is
+available at @uref{https://gcc.gnu.org/onlinedocs/gm2/index.html}.
+
@section References for Other Languages
@xref{Top, GNAT Reference Manual, About This Guide, gnat_rm,
[gcc r14-9916] c++: build_extra_args recapturing local specs [PR114303]
https://gcc.gnu.org/g:b262b17636e47ae969a74f16e86ccb00678d5e88
commit r14-9916-gb262b17636e47ae969a74f16e86ccb00678d5e88
Author: Patrick Palka
Date: Thu Apr 11 10:16:41 2024 -0400
c++: build_extra_args recapturing local specs [PR114303]
r13-6452-g341e6cd8d603a3 made build_extra_args walk evaluated contexts
first so that we prefer processing a local specialization in an evaluated
context even if its first use is in an unevaluated context. But this
means we need to avoid walking a tree that already has extra args/specs
saved because the list of saved specs appears to be an evaluated
context which we'll now walk first. It seems then that we should be
calculating the saved specs from scratch each time, rather than
potentially walking the saved specs list from an earlier partial
instantiation when calling build_extra_args a second time around.
PR c++/114303
gcc/cp/ChangeLog:
* constraint.cc (tsubst_requires_expr): Clear
REQUIRES_EXPR_EXTRA_ARGS before calling build_extra_args.
* pt.cc (tree_extra_args): Define.
(extract_locals_r): Assert *_EXTRA_ARGS is empty.
(tsubst_stmt) : Clear IF_SCOPE on the new
IF_STMT. Call build_extra_args on the new IF_STMT instead
of t which might already have IF_STMT_EXTRA_ARGS.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1z/constexpr-if-lambda6.C: New test.
Reviewed-by: Jason Merrill
Diff:
---
gcc/cp/constraint.cc | 1 +
gcc/cp/pt.cc | 31 ++-
gcc/testsuite/g++.dg/cpp1z/constexpr-if-lambda6.C | 16
3 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/gcc/cp/constraint.cc b/gcc/cp/constraint.cc
index 49de3211d4c..8a3b5d80ba7 100644
--- a/gcc/cp/constraint.cc
+++ b/gcc/cp/constraint.cc
@@ -2362,6 +2362,7 @@ tsubst_requires_expr (tree t, tree args, sat_info info)
matching or dguide constraint rewriting), in which case we need
to partially substitute. */
t = copy_node (t);
+ REQUIRES_EXPR_EXTRA_ARGS (t) = NULL_TREE;
REQUIRES_EXPR_EXTRA_ARGS (t) = build_extra_args (t, args, info.complain);
return t;
}
diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index 767778e53ef..7c91c6959aa 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -3858,6 +3858,24 @@ has_extra_args_mechanism_p (const_tree t)
&& IF_STMT_CONSTEXPR_P (t))); /* IF_STMT_EXTRA_ARGS */
}
+/* Return *_EXTRA_ARGS of the given supported tree T. */
+
+static tree&
+tree_extra_args (tree t)
+{
+ gcc_checking_assert (has_extra_args_mechanism_p (t));
+
+ if (PACK_EXPANSION_P (t))
+return PACK_EXPANSION_EXTRA_ARGS (t);
+ else if (TREE_CODE (t) == REQUIRES_EXPR)
+return REQUIRES_EXPR_EXTRA_ARGS (t);
+ else if (TREE_CODE (t) == IF_STMT
+ && IF_STMT_CONSTEXPR_P (t))
+return IF_STMT_EXTRA_ARGS (t);
+
+ gcc_unreachable ();
+}
+
/* Structure used to track the progress of find_parameter_packs_r. */
struct find_parameter_pack_data
{
@@ -13291,6 +13309,16 @@ extract_locals_r (tree *tp, int *walk_subtrees, void
*data_)
/* Remember local typedefs (85214). */
tp = &TYPE_NAME (*tp);
+ if (has_extra_args_mechanism_p (*tp))
+/* Assert *_EXTRA_ARGS is empty, because we don't want to walk it and
+ potentially see a previously captured local in an evaluated context
+ that's really only used in an unevaluated context (PR114303). This
+ means callers of build_extra_args need to clear *_EXTRA_ARGS of the
+ outermost tree. Nested *_EXTRA_ARGS should naturally be empty since
+ the outermost (extra-args) tree will intercept any substitution before
+ a nested tree can. */
+gcc_checking_assert (tree_extra_args (*tp) == NULL_TREE);
+
if (TREE_CODE (*tp) == DECL_EXPR)
{
tree decl = DECL_EXPR_DECL (*tp);
@@ -18716,10 +18744,11 @@ tsubst_stmt (tree t, tree args, tsubst_flags_t
complain, tree in_decl)
of the constexpr if is still dependent. Don't substitute into the
branches now, just remember the template arguments. */
do_poplevel (IF_SCOPE (stmt));
+ IF_SCOPE (stmt) = NULL_TREE;
IF_COND (stmt) = IF_COND (t);
THEN_CLAUSE (stmt) = THEN_CLAUSE (t);
ELSE_CLAUSE (stmt) = ELSE_CLAUSE (t);
- IF_STMT_EXTRA_ARGS (stmt) = build_extra_args (t, args, complain);
+ IF_STMT_EXTRA_ARGS (stmt) = build_extra_args (stmt, args, complain);
add_stmt (stmt);
break;
}
diff --git a/gcc/testsuite/g++.dg/cpp1z/constexpr-if-lambda6.C
b/gcc/testsuite/g++.dg/cpp1z/constexpr-if-lambda6.C
new file mode 100644
index 000..038c2a41210
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1z/constexpr-if-lambda6.C
@@ -0,0 +1,16 @@
+// PR c++/114303
+// { dg-do compile { target c++17 } }
+
+struct A { static constexpr
[gcc r14-9917] libstdc++: Export std::__basic_file::native_handle as GLIBCXX_3.4.33 [PR114692]
https://gcc.gnu.org/g:1defe743aeb19532f6d6f4cab37e10f11467abd8
commit r14-9917-g1defe743aeb19532f6d6f4cab37e10f11467abd8
Author: Jonathan Wakely
Date: Thu Apr 11 12:28:25 2024 +0100
libstdc++: Export std::__basic_file::native_handle as GLIBCXX_3.4.33
[PR114692]
I added this new symbol in the wrong version. GLIBCXX_3.4.32 was
already used for the GCC 13.2.0 release, so the new symbol should have
been in a new GLIBCXX_3.4.33 version.
Additionally, the pattern doesn't need to use [cw] because we only ever
use __basic_file, even for std::basic_filebuf.
libstdc++-v3/ChangeLog:
PR libstdc++/114692
* config/abi/pre/gnu.ver (GLIBCXX_3.4.32): Move new exports for
__basic_file::native_handle to ...
(GLIBCXX_3.4.33): ... here. Adjust to not match wchar_t
specialization, which isn't used.
* testsuite/util/testsuite_abi.cc: Add GLIBCXX_3.4.33 and update
latest version check.
Diff:
---
libstdc++-v3/config/abi/pre/gnu.ver | 9 +++--
libstdc++-v3/testsuite/util/testsuite_abi.cc | 3 ++-
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/libstdc++-v3/config/abi/pre/gnu.ver
b/libstdc++-v3/config/abi/pre/gnu.ver
index db20d75b68e..31449b5b87b 100644
--- a/libstdc++-v3/config/abi/pre/gnu.ver
+++ b/libstdc++-v3/config/abi/pre/gnu.ver
@@ -2516,13 +2516,18 @@ GLIBCXX_3.4.31 {
} GLIBCXX_3.4.30;
+# GCC 13.2.0
GLIBCXX_3.4.32 {
_ZSt21ios_base_library_initv;
_ZNSt7__cxx1112basic_stringI[cw]St11char_traitsI[cw]ESaI[cw]EE11_S_allocateERS3_[jmy];
-# std::basic_file<>::native_handle()
-_ZNKSt12__basic_fileI[cw]E13native_handleEv;
} GLIBCXX_3.4.31;
+# GCC 14.1.0
+GLIBCXX_3.4.33 {
+# std::basic_file::native_handle()
+_ZNKSt12__basic_fileIcE13native_handleEv;
+} GLIBCXX_3.4.32;
+
# Symbols in the support library (libsupc++) have their own tag.
CXXABI_1.3 {
diff --git a/libstdc++-v3/testsuite/util/testsuite_abi.cc
b/libstdc++-v3/testsuite/util/testsuite_abi.cc
index 4f3846b9cc2..e4bf3cdc8e0 100644
--- a/libstdc++-v3/testsuite/util/testsuite_abi.cc
+++ b/libstdc++-v3/testsuite/util/testsuite_abi.cc
@@ -214,6 +214,7 @@ check_version(symbol& test, bool added)
known_versions.push_back("GLIBCXX_3.4.30");
known_versions.push_back("GLIBCXX_3.4.31");
known_versions.push_back("GLIBCXX_3.4.32");
+ known_versions.push_back("GLIBCXX_3.4.33");
known_versions.push_back("GLIBCXX_LDBL_3.4.31");
known_versions.push_back("GLIBCXX_IEEE128_3.4.29");
known_versions.push_back("GLIBCXX_IEEE128_3.4.30");
@@ -253,7 +254,7 @@ check_version(symbol& test, bool added)
test.version_status = symbol::incompatible;
// Check that added symbols are added in the latest pre-release version.
- bool latestp = (test.version_name == "GLIBCXX_3.4.32"
+ bool latestp = (test.version_name == "GLIBCXX_3.4.33"
|| test.version_name == "CXXABI_1.3.15"
|| test.version_name == "CXXABI_FLOAT128"
|| test.version_name == "CXXABI_TM_1");
[gcc r14-9918] aarch64: Reorder FMV feature priorities
https://gcc.gnu.org/g:e33fc847d5457bd56734cad056955102a23f405b
commit r14-9918-ge33fc847d5457bd56734cad056955102a23f405b
Author: Andrew Carlotti
Date: Wed Apr 3 23:32:12 2024 +0100
aarch64: Reorder FMV feature priorities
Some higher priority FMV features were dependent subsets of lower
priority features. Fix this, using the new priorities specified in
https://github.com/ARM-software/acle/pull/279.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def: Reorder FMV entries.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/cpunative/native_cpu_21.c: Reorder features.
* gcc.target/aarch64/cpunative/native_cpu_22.c: Ditto.
Diff:
---
gcc/config/aarch64/aarch64-option-extensions.def | 18 +++---
.../gcc.target/aarch64/cpunative/native_cpu_21.c | 2 +-
.../gcc.target/aarch64/cpunative/native_cpu_22.c | 2 +-
3 files changed, 9 insertions(+), 13 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc/config/aarch64/aarch64-option-extensions.def
index aa3cd99f791..0078dd09288 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -99,17 +99,17 @@ AARCH64_OPT_EXTENSION(NAME, IDENT, REQUIRES, EXPLICIT_ON,
EXPLICIT_OFF, \
AARCH64_FMV_FEATURE(NAME, IDENT, (IDENT))
-AARCH64_OPT_EXTENSION("fp", FP, (), (), (), "fp")
-
-AARCH64_OPT_EXTENSION("simd", SIMD, (FP), (), (), "asimd")
-
AARCH64_OPT_FMV_EXTENSION("rng", RNG, (), (), (), "rng")
AARCH64_OPT_FMV_EXTENSION("flagm", FLAGM, (), (), (), "flagm")
AARCH64_FMV_FEATURE("flagm2", FLAGM2, (FLAGM))
-AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML))
+AARCH64_OPT_FMV_EXTENSION("lse", LSE, (), (), (), "atomics")
+
+AARCH64_OPT_FMV_EXTENSION("fp", FP, (), (), (), "fp")
+
+AARCH64_OPT_FMV_EXTENSION("simd", SIMD, (FP), (), (), "asimd")
AARCH64_OPT_FMV_EXTENSION("dotprod", DOTPROD, (SIMD), (), (), "asimddp")
@@ -121,12 +121,6 @@ AARCH64_OPT_EXTENSION("rdma", RDMA, (), (SIMD), (),
"asimdrdm")
AARCH64_FMV_FEATURE("rmd", RDM, (RDMA))
-AARCH64_OPT_FMV_EXTENSION("lse", LSE, (), (), (), "atomics")
-
-AARCH64_FMV_FEATURE("fp", FP, (FP))
-
-AARCH64_FMV_FEATURE("simd", SIMD, (SIMD))
-
AARCH64_OPT_FMV_EXTENSION("crc", CRC, (), (), (), "crc32")
AARCH64_FMV_FEATURE("sha1", SHA1, ())
@@ -160,6 +154,8 @@ AARCH64_FMV_FEATURE("fp16", FP16, (F16))
-march=armv8.4-a+nofp16+fp16 enables F16 but not F16FML. */
AARCH64_OPT_EXTENSION("fp16fml", F16FML, (), (F16), (), "asimdfhm")
+AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML))
+
AARCH64_FMV_FEATURE("dit", DIT, ())
AARCH64_FMV_FEATURE("dpb", DPB, ())
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_21.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_21.c
index 920e1d65711..1d90e9ec9d9 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_21.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_21.c
@@ -7,7 +7,7 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch
armv8-a\+flagm\+dotprod\+rdma\+lse\+crc\+fp16fml\+rcpc\+i8mm\+bf16\+sve2-aes\+sve2-bitperm\+sve2-sha3\+sve2-sm4\+sb\+ssbs\n}
} } */
+/* { dg-final { scan-assembler {\.arch
armv8-a\+flagm\+lse\+dotprod\+rdma\+crc\+fp16fml\+rcpc\+i8mm\+bf16\+sve2-aes\+sve2-bitperm\+sve2-sha3\+sve2-sm4\+sb\+ssbs\n}
} } */
/* Check that an Armv8-A core doesn't fall apart on extensions without midr
values. */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_22.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_22.c
index 416a29b514a..17050a0b72c 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_22.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_22.c
@@ -7,7 +7,7 @@ int main()
return 0;
}
-/* { dg-final { scan-assembler {\.arch
armv8-a\+flagm\+dotprod\+rdma\+lse\+crc\+fp16fml\+rcpc\+i8mm\+bf16\+sve2-aes\+sve2-bitperm\+sve2-sha3\+sve2-sm4\+sb\+ssbs\+pauth\n}
} } */
+/* { dg-final { scan-assembler {\.arch
armv8-a\+flagm\+lse\+dotprod\+rdma\+crc\+fp16fml\+rcpc\+i8mm\+bf16\+sve2-aes\+sve2-bitperm\+sve2-sha3\+sve2-sm4\+sb\+ssbs\+pauth\n}
} } */
/* Check that an Armv8-A core doesn't fall apart on extensions without midr
values and that it enables optional features. */
[gcc r14-9919] aarch64: Fix FMV array iteration bounds
https://gcc.gnu.org/g:3ef14f56343ad3445f874638700f6b82f032a1ae
commit r14-9919-g3ef14f56343ad3445f874638700f6b82f032a1ae
Author: Andrew Carlotti
Date: Wed Apr 3 23:35:08 2024 +0100
aarch64: Fix FMV array iteration bounds
There was an assumption in some places that the aarch64_fmv_feature_data
array contained FEAT_MAX elements. While this assumption held up till
now, it is safer and more flexible to use the array size directly.
Also fix the lower bound in compare_feature_masks to use ">=0" instead
of ">0", and add a test using the features at index 0 and 1. However,
the test already passed, because the earlier popcount check makes it
impossible to reach the loop if the masks differ in exactly one
location.
gcc/ChangeLog:
* config/aarch64/aarch64.cc (compare_feature_masks):
Use ARRAY_SIZE and >=0 for iteration bounds.
(aarch64_mangle_decl_assembler_name): Use ARRAY_SIZE.
gcc/testsuite/ChangeLog:
* g++.target/aarch64/mv-1.C: New test.
Diff:
---
gcc/config/aarch64/aarch64.cc | 8 ---
gcc/testsuite/g++.target/aarch64/mv-1.C | 38 +
2 files changed, 43 insertions(+), 3 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index c763a8a6298..91481f9fada 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -19738,7 +19738,7 @@ aarch64_parse_fmv_features (const char *str,
aarch64_feature_flags *isa_flags,
if (len == 0)
return AARCH_PARSE_MISSING_ARG;
- static const int num_features = ARRAY_SIZE (aarch64_fmv_feature_data);
+ int num_features = ARRAY_SIZE (aarch64_fmv_feature_data);
int i;
for (i = 0; i < num_features; i++)
{
@@ -19937,7 +19937,8 @@ compare_feature_masks (aarch64_fmv_feature_mask mask1,
auto diff_mask = mask1 ^ mask2;
if (diff_mask == 0ULL)
return 0;
- for (int i = FEAT_MAX - 1; i > 0; i--)
+ int num_features = ARRAY_SIZE (aarch64_fmv_feature_data);
+ for (int i = num_features - 1; i >= 0; i--)
{
auto bit_mask = aarch64_fmv_feature_data[i].feature_mask;
if (diff_mask & bit_mask)
@@ -20020,7 +20021,8 @@ aarch64_mangle_decl_assembler_name (tree decl, tree id)
name += "._";
- for (int i = 0; i < FEAT_MAX; i++)
+ int num_features = ARRAY_SIZE (aarch64_fmv_feature_data);
+ for (int i = 0; i < num_features; i++)
{
if (feature_mask & aarch64_fmv_feature_data[i].feature_mask)
{
diff --git a/gcc/testsuite/g++.target/aarch64/mv-1.C
b/gcc/testsuite/g++.target/aarch64/mv-1.C
new file mode 100644
index 000..b4b0e5e3fea
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/mv-1.C
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O0" } */
+
+__attribute__((target_version("default")))
+int foo ()
+{
+ return 1;
+}
+
+__attribute__((target_version("rng")))
+int foo ()
+{
+ return 1;
+}
+
+__attribute__((target_version("flagm")))
+int foo ()
+{
+ return 1;
+}
+
+__attribute__((target_version("rng+flagm")))
+int foo ()
+{
+ return 1;
+}
+
+int bar()
+{
+ return foo ();
+}
+
+/* Check usage of the first two FMV features, in case of off-by-one errors. */
+/* { dg-final { scan-assembler-times "\n_Z3foov\.default:\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n_Z3foov\._Mrng:\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n_Z3foov\._MrngMflagm:\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n_Z3foov\._Mflagm:\n" 1 } } */
[gcc r14-9920] aarch64: Fix typo and make rdma/rdm alias for FMV
https://gcc.gnu.org/g:a28df11276647da16316d0621cb69ff5f878cd91
commit r14-9920-ga28df11276647da16316d0621cb69ff5f878cd91
Author: Andrew Carlotti
Date: Wed Apr 3 23:37:16 2024 +0100
aarch64: Fix typo and make rdma/rdm alias for FMV
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def:
Fix "rmd"->"rdm", and add FMV to "rdma".
* config/aarch64/aarch64.cc (FEAT_RDMA): Define as FEAT_RDM.
Diff:
---
gcc/config/aarch64/aarch64-option-extensions.def | 5 +++--
gcc/config/aarch64/aarch64.cc| 4
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc/config/aarch64/aarch64-option-extensions.def
index 0078dd09288..b7b307b24ea 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -117,9 +117,10 @@ AARCH64_OPT_FMV_EXTENSION("sm4", SM4, (SIMD), (), (), "sm3
sm4")
/* An explicit +rdma implies +simd, but +rdma+nosimd still enables scalar
RDMA instructions. */
-AARCH64_OPT_EXTENSION("rdma", RDMA, (), (SIMD), (), "asimdrdm")
+AARCH64_OPT_FMV_EXTENSION("rdma", RDMA, (), (SIMD), (), "asimdrdm")
-AARCH64_FMV_FEATURE("rmd", RDM, (RDMA))
+/* rdm is an alias for rdma. */
+AARCH64_FMV_FEATURE("rdm", RDM, (RDMA))
AARCH64_OPT_FMV_EXTENSION("crc", CRC, (), (), (), "crc32")
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 91481f9fada..a2e3d208d76 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -19695,6 +19695,10 @@ typedef struct
#define AARCH64_FMV_FEATURE(NAME, FEAT_NAME, C) \
{NAME, 1ULL << FEAT_##FEAT_NAME, ::feature_deps::fmv_deps_##FEAT_NAME},
+/* The "rdma" alias uses a different FEAT_NAME to avoid a duplicate
+ feature_deps name. */
+#define FEAT_RDMA FEAT_RDM
+
/* FMV features are listed in priority order, to make it easier to sort target
strings. */
static aarch64_fmv_feature_datum aarch64_fmv_feature_data[] = {
[gcc r14-9921] aarch64: Remove unsupported FMV features
https://gcc.gnu.org/g:27e34311760456683d8316532dc57db24b3f410b
commit r14-9921-g27e34311760456683d8316532dc57db24b3f410b
Author: Andrew Carlotti
Date: Wed Apr 3 23:53:52 2024 +0100
aarch64: Remove unsupported FMV features
It currently isn't possible to support function multiversioning features
properly in GCC without also enabling the extension in the command line
options (with the exception of features such as "rpres" that do not
require assembler support). We therefore remove unsupported features
from GCC's list of FMV features.
Some of these features ("fcma", "jscvt", "frintts", "flagm2", "wfxt",
"rcpc2", and perhaps "dpb" and "dpb2") will be added back in the future
once support for the command line option has been added.
The rest of the removed features I have proposed removing from the ACLE
specification as well, since it doesn't seem worthwhile to include support
for them; see the ACLE pull request for more detailed justification:
https://github.com/ARM-software/acle/pull/315
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def:
Remove "flagm2", "sha1", "pmull", "dit", "dpb", "dpb2", "jscvt",
"fcma", "rcpc2", "frintts", "dgh", "ebf16", "sve-bf16",
"sve-ebf16", "sve-i8mm", "sve2-pmull128", "memtag3", "bti" and
"wfxt" entries.
Diff:
---
gcc/config/aarch64/aarch64-option-extensions.def | 38
1 file changed, 38 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc/config/aarch64/aarch64-option-extensions.def
index b7b307b24ea..54bbf9c41e7 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -103,8 +103,6 @@ AARCH64_OPT_FMV_EXTENSION("rng", RNG, (), (), (), "rng")
AARCH64_OPT_FMV_EXTENSION("flagm", FLAGM, (), (), (), "flagm")
-AARCH64_FMV_FEATURE("flagm2", FLAGM2, (FLAGM))
-
AARCH64_OPT_FMV_EXTENSION("lse", LSE, (), (), (), "atomics")
AARCH64_OPT_FMV_EXTENSION("fp", FP, (), (), (), "fp")
@@ -124,16 +122,12 @@ AARCH64_FMV_FEATURE("rdm", RDM, (RDMA))
AARCH64_OPT_FMV_EXTENSION("crc", CRC, (), (), (), "crc32")
-AARCH64_FMV_FEATURE("sha1", SHA1, ())
-
AARCH64_OPT_FMV_EXTENSION("sha2", SHA2, (SIMD), (), (), "sha1 sha2")
AARCH64_FMV_FEATURE("sha3", SHA3, (SHA3))
AARCH64_OPT_FMV_EXTENSION("aes", AES, (SIMD), (), (), "aes")
-AARCH64_FMV_FEATURE("pmull", PMULL, ())
-
/* +nocrypto disables AES, SHA2 and SM4, and anything that depends on them
(such as SHA3 and the SVE2 crypto extensions). */
AARCH64_OPT_EXTENSION("crypto", CRYPTO, (AES, SHA2), (), (AES, SHA2, SM4),
@@ -157,44 +151,20 @@ AARCH64_OPT_EXTENSION("fp16fml", F16FML, (), (F16), (),
"asimdfhm")
AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML))
-AARCH64_FMV_FEATURE("dit", DIT, ())
-
-AARCH64_FMV_FEATURE("dpb", DPB, ())
-
-AARCH64_FMV_FEATURE("dpb2", DPB2, ())
-
-AARCH64_FMV_FEATURE("jscvt", JSCVT, ())
-
-AARCH64_FMV_FEATURE("fcma", FCMA, (SIMD))
-
AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC, (), (), (), "lrcpc")
-AARCH64_FMV_FEATURE("rcpc2", RCPC2, (RCPC))
-
AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (), (), (), "lrcpc3")
-AARCH64_FMV_FEATURE("frintts", FRINTTS, ())
-
-AARCH64_FMV_FEATURE("dgh", DGH, ())
-
AARCH64_OPT_FMV_EXTENSION("i8mm", I8MM, (SIMD), (), (), "i8mm")
/* An explicit +bf16 implies +simd, but +bf16+nosimd still enables scalar BF16
instructions. */
AARCH64_OPT_FMV_EXTENSION("bf16", BF16, (FP), (SIMD), (), "bf16")
-AARCH64_FMV_FEATURE("ebf16", EBF16, (BF16))
-
AARCH64_FMV_FEATURE("rpres", RPRES, ())
AARCH64_OPT_FMV_EXTENSION("sve", SVE, (SIMD, F16), (), (), "sve")
-AARCH64_FMV_FEATURE("sve-bf16", SVE_BF16, (SVE, BF16))
-
-AARCH64_FMV_FEATURE("sve-ebf16", SVE_EBF16, (SVE, BF16))
-
-AARCH64_FMV_FEATURE("sve-i8mm", SVE_I8MM, (SVE, I8MM))
-
AARCH64_OPT_EXTENSION("f32mm", F32MM, (SVE), (), (), "f32mm")
AARCH64_FMV_FEATURE("f32mm", SVE_F32MM, (F32MM))
@@ -209,8 +179,6 @@ AARCH64_OPT_EXTENSION("sve2-aes", SVE2_AES, (SVE2, AES),
(), (), "sveaes")
AARCH64_FMV_FEATURE("sve2-aes", SVE_AES, (SVE2_AES))
-AARCH64_FMV_FEATURE("sve2-pmull128", SVE_PMULL128, (SVE2))
-
AARCH64_OPT_EXTENSION("sve2-bitperm", SVE2_BITPERM, (SVE2), (), (),
"svebitperm")
@@ -230,8 +198,6 @@ AARCH64_OPT_FMV_EXTENSION("memtag", MEMTAG, (), (), (), "")
AARCH64_FMV_FEATURE("memtag2", MEMTAG2, (MEMTAG))
-AARCH64_FMV_FEATURE("memtag3", MEMTAG3, (MEMTAG))
-
AARCH64_OPT_FMV_EXTENSION("sb", SB, (), (), (), "sb")
AARCH64_OPT_FMV_EXTENSION("predres", PREDRES, (), (), (), "")
@@ -240,8 +206,6 @@ AARCH64_OPT_FMV_EXTENSION("ssbs", SSBS, (), (), (), "ssbs")
AARCH64_FMV_FEATURE("ssbs2", SSBS2, (SSBS))
-AARCH64_FMV_FEATURE("bti", BTI, ())
-
AARCH64_OPT_EXTENSION("profile", PROFILE, (), (), (), "")
AARCH64_OPT_EXTENSION("tme", TME, (), (), (), "")
@@ -256,8 +220,6 @@ AARCH64_FMV_FEATURE("ls64_v", LS64_V, ())
AARCH64_FMV
[gcc r14-9922] aarch64: Remove FMV features whose names may change
https://gcc.gnu.org/g:d33ec3b78fe9f6e0234bc08669b5021f324d67b3
commit r14-9922-gd33ec3b78fe9f6e0234bc08669b5021f324d67b3
Author: Andrew Carlotti
Date: Fri Apr 5 17:12:46 2024 +0100
aarch64: Remove FMV features whose names may change
Some architecture features have been combined under a single command
line flag, but have been assigned multiple FMV feature names with the
command line flag name enabling only a subset of these features in
the FMV specification. I've proposed reallocating names in the FMV
specification to match the command line flags [1], but for GCC 14 we'll
just remove them from the FMV feature list.
[1] https://github.com/ARM-software/acle/pull/315
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def:
Remove "memtag", "memtag2", "ssbs", "ssbs2", "ls64", "ls64_v"
and "ls64_accdata" FMV features.
Diff:
---
gcc/config/aarch64/aarch64-option-extensions.def | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc/config/aarch64/aarch64-option-extensions.def
index 54bbf9c41e7..3155eccd39c 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -194,17 +194,13 @@ AARCH64_FMV_FEATURE("sve2-sm4", SVE_SM4, (SVE2_SM4))
AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, SVE2), (), (), "sme")
-AARCH64_OPT_FMV_EXTENSION("memtag", MEMTAG, (), (), (), "")
-
-AARCH64_FMV_FEATURE("memtag2", MEMTAG2, (MEMTAG))
+AARCH64_OPT_EXTENSION("memtag", MEMTAG, (), (), (), "")
AARCH64_OPT_FMV_EXTENSION("sb", SB, (), (), (), "sb")
AARCH64_OPT_FMV_EXTENSION("predres", PREDRES, (), (), (), "")
-AARCH64_OPT_FMV_EXTENSION("ssbs", SSBS, (), (), (), "ssbs")
-
-AARCH64_FMV_FEATURE("ssbs2", SSBS2, (SSBS))
+AARCH64_OPT_EXTENSION("ssbs", SSBS, (), (), (), "ssbs")
AARCH64_OPT_EXTENSION("profile", PROFILE, (), (), (), "")
@@ -214,12 +210,6 @@ AARCH64_OPT_EXTENSION("pauth", PAUTH, (), (), (), "paca
pacg")
AARCH64_OPT_EXTENSION("ls64", LS64, (), (), (), "")
-AARCH64_FMV_FEATURE("ls64", LS64, ())
-
-AARCH64_FMV_FEATURE("ls64_v", LS64_V, ())
-
-AARCH64_FMV_FEATURE("ls64_accdata", LS64_ACCDATA, (LS64))
-
AARCH64_OPT_EXTENSION("sme-f64f64", SME_F64F64, (SME), (), (), "")
AARCH64_FMV_FEATURE("sme-f64f64", SME_F64, (SME_F64F64))
[gcc r14-9923] libstdc++: Regenerate trunk baseline_symbols.txt files for Linux
https://gcc.gnu.org/g:a975d8961d7cdb7e6b5176cd2d3891fdc218d776 commit r14-9923-ga975d8961d7cdb7e6b5176cd2d3891fdc218d776 Author: Jakub Jelinek Date: Thu Apr 11 16:37:26 2024 +0200 libstdc++: Regenerate trunk baseline_symbols.txt files for Linux While the previous patch was regeneration from 13.2 release (with hand edits for arches I don't have libraries for but which are still well maintained), thius one is regeneration from the trunk (this time for hand edits everywhere for the PR114692 https://gcc.gnu.org/pipermail/libstdc++/2024-April/058570.html patch; plus again hand edits for arches I don't have libraries for). 2024-04-11 Jakub Jelinek * config/abi/post/x86_64-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt: Update. * config/abi/post/i486-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/m68k-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/aarch64-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/s390x-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt: Update. * config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt: Update. Diff: --- libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt | 4 libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt | 4 libstdc++-v3/config/abi/post/m68k-linux-gnu/baseline_symbols.txt | 4 libstdc++-v3/config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt | 4 .../config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt| 4 libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt | 4 libstdc++-v3/config/abi/post/s390x-linux-gnu/baseline_symbols.txt | 4 libstdc++-v3/config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt | 4 libstdc++-v3/config/abi/post/x86_64-linux-gnu/baseline_symbols.txt| 4 9 files changed, 36 insertions(+) diff --git a/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt b/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt index 550a181772b..27b5937ad9b 100644 --- a/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt +++ b/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt @@ -497,6 +497,7 @@ FUNC:_ZNKSt11__timepunctIwE7_M_daysEPPKw@@GLIBCXX_3.4 FUNC:_ZNKSt11__timepunctIwE8_M_am_pmEPPKw@@GLIBCXX_3.4 FUNC:_ZNKSt11__timepunctIwE9_M_monthsEPPKw@@GLIBCXX_3.4 FUNC:_ZNKSt11logic_error4whatEv@@GLIBCXX_3.4 +FUNC:_ZNKSt12__basic_fileIcE13native_handleEv@@GLIBCXX_3.4.33 FUNC:_ZNKSt12__basic_fileIcE7is_openEv@@GLIBCXX_3.4 FUNC:_ZNKSt12__shared_ptrINSt10filesystem28recursive_directory_iterator10_Dir_stackELN9__gnu_cxx12_Lock_policyE2EEcvbEv@@GLIBCXX_3.4.31 FUNC:_ZNKSt12__shared_ptrINSt10filesystem4_DirELN9__gnu_cxx12_Lock_policyE2EEcvbEv@@GLIBCXX_3.4.31 @@ -4529,6 +4530,7 @@ FUNC:__cxa_allocate_exception@@CXXABI_1.3 FUNC:__cxa_bad_cast@@CXXABI_1.3 FUNC:__cxa_bad_typeid@@CXXABI_1.3 FUNC:__cxa_begin_catch@@CXXABI_1.3 +FUNC:__cxa_call_terminate@@CXXABI_1.3.15 FUNC:__cxa_call_unexpected@@CXXABI_1.3 FUNC:__cxa_current_exception_type@@CXXABI_1.3 FUNC:__cxa_deleted_virtual@@CXXABI_1.3.6 @@ -4572,6 +4574,7 @@ OBJECT:0:CXXABI_1.3.11 OBJECT:0:CXXABI_1.3.12 OBJECT:0:CXXABI_1.3.13 OBJECT:0:CXXABI_1.3.14 +OBJECT:0:CXXABI_1.3.15 OBJECT:0:CXXABI_1.3.2 OBJECT:0:CXXABI_1.3.3 OBJECT:0:CXXABI_1.3.4 @@ -4608,6 +4611,7 @@ OBJECT:0:GLIBCXX_3.4.3 OBJECT:0:GLIBCXX_3.4.30 OBJECT:0:GLIBCXX_3.4.31 OBJECT:0:GLIBCXX_3.4.32 +OBJECT:0:GLIBCXX_3.4.33 OBJECT:0:GLIBCXX_3.4.4 OBJECT:0:GLIBCXX_3.4.5 OBJECT:0:GLIBCXX_3.4.6 diff --git a/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt b/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt index 62970e9c58a..4228453c8cc 100644 --- a/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt +++ b/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt @@ -497,6 +497,7 @@ FUNC:_ZNKSt11__timepunctIwE7_M_daysEPPKw@@GLIBCXX_3.4 FUNC:_ZNKSt11__timepunctIwE8_M_am_pmEPPKw@@GLIBCXX_3.4 FUNC:_ZNKSt11__timepunctIwE9_M_monthsEPPKw@@GLIBCXX_3.4 FUNC:_ZNKSt11logic_error4whatEv@@GLIBCXX_3.4 +FUNC:_ZNKSt12__basic_fileIcE13native_handleEv@@GLIBCXX_3.4.33 FUNC:_ZNKSt12__basic_fileIcE7is_openEv@@GLIBCXX_3.4 FUNC:_ZNKSt12__shared_ptrINSt10filesystem28recursive_directory_iterator10_Dir_stackELN9__gnu_cxx12_Lock_policyE2EEcvbEv@@GLIBCXX_3.4.31 FUNC:_ZNKSt12__shared_ptrINSt10filesystem4_DirELN9__gnu_cxx12_Lock_policyE2EEcvbEv@@GLIBCXX_3.4.31 @@ -4533,6 +4534,7 @@ FUNC:__cxa_allocate_exception@@CXXABI_1.3 FUNC:__cxa_bad_cast@@CXXABI_1.3 FUNC:__cxa_bad_typeid@@CXXABI_1.3 FUNC:__cxa_begin_catch@@CXXABI_1.3 +FUNC:__cxa_call_terminate@@CXXABI_1.3.15 FUNC:__
[gcc r14-9924] Update GCC 14.1 library versions in docs
https://gcc.gnu.org/g:eec220142b95d77277238b30f4e08d41ba969e1b commit r14-9924-geec220142b95d77277238b30f4e08d41ba969e1b Author: Jakub Jelinek Date: Thu Apr 11 16:52:45 2024 +0200 Update GCC 14.1 library versions in docs When we are already touching this topic, here is a patch like r13-5126 which documents the upcoming release symbol versions in the documentation. 2024-04-11 Jakub Jelinek * doc/xml/manual/abi.xml: Add latest library versions. * doc/html/manual/abi.html: Regenerate. Diff: --- libstdc++-v3/doc/html/manual/abi.html | 2 +- libstdc++-v3/doc/xml/manual/abi.xml | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/libstdc++-v3/doc/html/manual/abi.html b/libstdc++-v3/doc/html/manual/abi.html index a0e7bc69484..3075477cc34 100644 --- a/libstdc++-v3/doc/html/manual/abi.html +++ b/libstdc++-v3/doc/html/manual/abi.html @@ -128,7 +128,7 @@ compatible. GLIBCPP_3.2 for symbols that were introduced in the GCC 3.2.0 release.) If a particular release is not listed, it has the same version labels as the preceding release. - GCC 3.0.0: (Error, not versioned)GCC 3.0.1: (Error, not versioned)GCC 3.0.2: (Error, not versioned)GCC 3.0.3: (Error, not versioned)GCC 3.0.4: (Error, not versioned)GCC 3.1.0: GLIBCPP_3.1, CXXABI_1GCC 3.1.1: GLIBCPP_3.1, CXXABI_1GCC 3.2.0: GLIBCPP_3.2, CXXABI_1.2GCC 3.2.1: GLIBCPP_3.2.1, CXXABI_1.2GCC 3.2.2: GLIBCPP_3.2.2, CXXABI_1.2GCC 3.2.3: GLIBCPP_3.2.2, CXXABI_1.2GCC 3.3.0: GLIBCPP_3.2.2, CXXABI_1.2.1GCC 3.3.1: GLIBCPP_3.2.3, CXXABI_1.2.1GCC 3.3 .2: GLIBCPP_3.2.3, CXXABI_1.2.1GCC 3.3.3: GLIBCPP_3.2.3, CXXABI_1.2.1GCC 3.4.0: GLIBCXX_3.4, CXXABI_1.3GCC 3.4.1: GLIBCXX_3.4.1, CXXABI_1.3GCC 3.4.2: GLIBCXX_3.4.2GCC 3.4.3: GLIBCXX_3.4.3GCC 4.0.0: GLIBCXX_3.4.4, CXXABI_1.3.1GCC 4.0.1: GLIBCXX_3.4.5GCC 4.0.2: GLIBCXX_3.4.6GCC 4.0.3: GLIBCXX_3.4.7GCC 4.1.1: GLIBCXX_3.4.8GCC 4.2.0: GLIBCXX_3.4.9GCC 4.3.0: GLIBCXX_3.4.10, CXXABI_1.3.2GCC 4.4.0: GLIBCXX_3.4.11, CXXABI_1.3.3GCC 4.4.1: GLIBCXX_3.4.12, CXXABI_1.3.3GCC 4.4.2: GLIBCXX_3.4.13, CXXABI_1.3.3< /p>GCC 4.5.0: GLIBCXX_3.4.14, CXXABI_1.3.4GCC 4.6.0: GLIBCXX_3.4.15, CXXABI_1.3.5GCC 4.6.1: GLIBCXX_3.4.16, CXXABI_1.3.5GCC 4.7.0: GLIBCXX_3.4.17, CXXABI_1.3.6GCC 4.8.0: GLIBCXX_3.4.18, CXXABI_1.3.7GCC 4.8.3: GLIBCXX_3.4.19, CXXABI_1.3.7GCC 4.9.0: GLIBCXX_3.4.20, CXXABI_1.3.8GCC 5.1.0: GLIBCXX_3.4.21, CXXABI_1.3.9GCC 6.1.0: GLIBCXX_3.4.22, CXXABI_1.3.10GCC 7.1.0: GLIBCXX_3.4.23, CXXABI_1.3.11GCC 7.2.0: GLIBCXX_3.4.24, CXXABI_1.3.11GCC 8.1.0: GLIBCXX_3.4.25, CXXABI_1.3.11GCC 9.1.0: GLIBCXX_3.4.26, CXXABI_1.3.12GCC 9.2.0: GLIBCXX_3.4.2 7, CXXABI_1.3.12GCC 9.3.0: GLIBCXX_3.4.28, CXXABI_1.3.12GCC 10.1.0: GLIBCXX_3.4.28, CXXABI_1.3.12GCC 11.1.0: GLIBCXX_3.4.29, CXXABI_1.3.13GCC 12.1.0: GLIBCXX_3.4.30, CXXABI_1.3.13GCC 13.1.0: GLIBCXX_3.4.31, CXXABI_1.3.14GCC 13.2.0: GLIBCXX_3.4.32, CXXABI_1.3.14Incremental bumping of a compiler pre-defined macro, + GCC 3.0.0: (Error, not versioned)GCC 3.0.1: (Error, not versioned)GCC 3.0.2: (Error, not versioned)GCC 3.0.3: (Error, not versioned)GCC 3.0.4: (Error, not versioned)GCC 3.1.0: GLIBCPP_3.1, CXXABI_1GCC 3.1.1: GLIBCPP_3.1, CXXABI_1GCC 3.2.0: GLIBCPP_3.2, CXXABI_1.2GCC 3.2.1: GLIBCPP_3.2.1, CXXABI_1.2GCC 3.2.2: GLIBCPP_3.2.2, CXXABI_1.2GCC 3.2.3: GLIBCPP_3.2.2, CXXABI_1.2GCC 3.3.0: GLIBCPP_3.2.2, CXXABI_1.2.1GCC 3.3.1: GLIBCPP_3.2.3, CXXABI_1.2.1GCC 3.3 .2: GLIBCPP_3.2.3, CXXABI_1.2.1GCC 3.3.3: GLIBCPP_3.2.3, CXXABI_1.2.1GCC 3.4.0: GLIBCXX_3.4, CXXABI_1.3GCC 3.4.1: GLIBCXX_3.4.1, CXXABI_1.3GCC 3.4.2: GLIBCXX_3.4.2GCC 3.4.3: GLIBCXX_3.4.3GCC 4.0.0: GLIBCXX_3.4.4, CXXABI_1.3.1GCC 4.0.1: GLIBCXX_3.4.5GCC 4.0.2: GLIBCXX_3.4.6GCC 4.0.3: GLIBCXX_3.4.7GCC 4.1.1: GLIBCXX_3.4.8GCC 4.2.0: GLIBCXX_3.4.9GCC 4.3.0: GLIBCXX_3.4.10, CXXABI_1.3.2GCC 4.4.0: GLIBCXX_3.4.11, CXXABI_1.3.3GCC 4.4.1: GLIBCXX_3.4.12, CXXABI_1.3.3GCC 4.4.2: GLIBCXX_3.4.13, CXXABI_1.3.3< /p>GCC 4.5.0: GLIBCXX_3.4.14, CXXABI_1.3.4GCC 4.6.0: GLIBCXX_3.4.15, CXXABI_1.3.5GCC 4.6.1: GLIBCXX_3.4.16, CXXABI_1.3.5GCC 4.7.0: GLIBCXX_3.4.17, CXXABI_1.3.6GCC 4.8.0: GLIBCXX_3.4.18, CXXABI_1.3.7GCC 4.8.3: GLIBCXX_3.4.19, CXXABI_1.3.7GCC 4.9.0: GLIBCXX_3.4.20, CXXABI_1.3.8GCC 5.1.0: GLIBCXX_3.4.21, CXXABI_1.3.9GCC 6.1.0: GLIBCXX_3.4.22, CXXABI_1.3.10GCC 7.1.0: GLIBCXX_3.4.23, CXXABI_1.3.11GCC 7.2.0: GLIBCXX_3.4.24, CXXABI_1.3.11GCC 8.1.0: GLIBCXX_3.4.25, CXXABI_1.3.11GCC 9.1.0: GLIBCXX_3.4.26, CXXABI_1.3.12GCC 9.2.0: GLIBCXX_3.4.2 7, CXXABI_1.3.12GCC 9.3.0: GLIBCXX_3.4.28, CXXABI_1.3.12GCC 10.1.0: GLIBCXX_3.4.28, CXXABI_1.3.12GCC 11.1.0: GLIBCXX_3.4.29, CXXABI_1.3.13GCC 12.1.0: GLIBCXX_3.4.30, CXXABI_1.3.13GCC 13.1.0: GLIBCXX_3.4.31, CXXABI_1.3.14GCC 13.2.0: GLIBCXX_3.4.32, CXXABI_1.3.14GCC 14.1.0: GLIBCXX_3.4.33, CXXABI_1.3.15Incremental bumping of a compiler pre-defined macro, __GXX_ABI_VERSION. This macro is defined as the version of the compiler v3 ABI, w
[gcc/redhat/heads/gcc-14-branch] (34 commits) Merge commit 'r14-9924-geec220142b95d77277238b30f4e08d41ba9
The branch 'redhat/heads/gcc-14-branch' was updated to point to: da6ad93fb18... Merge commit 'r14-9924-geec220142b95d77277238b30f4e08d41ba9 It previously pointed to: fd39223a10b... Merge commit 'r14-9891-g5aa3fec38cc6f52285168b161bab1a869d8 Diff: Summary of changes (added commits): --- da6ad93... Merge commit 'r14-9924-geec220142b95d77277238b30f4e08d41ba9 eec2201... Update GCC 14.1 library versions in docs (*) a975d89... libstdc++: Regenerate trunk baseline_symbols.txt files for (*) d33ec3b... aarch64: Remove FMV features whose names may change (*) 27e3431... aarch64: Remove unsupported FMV features (*) a28df11... aarch64: Fix typo and make rdma/rdm alias for FMV (*) 3ef14f5... aarch64: Fix FMV array iteration bounds (*) e33fc84... aarch64: Reorder FMV feature priorities (*) 1defe74... libstdc++: Export std::__basic_file::native_handle as GLIBC (*) b262b17... c++: build_extra_args recapturing local specs [PR114303] (*) 0dc39de... modula2: add modula-2 language section to languages support (*) 508b2b9... libstdc++: Regenerate baseline_symbols.txt files for Linux (*) 467898d... asan, v3: Fix up handling of > 32 byte aligned variables wi (*) c7e8a8d... tree-optimization/109596 - wrong debug stmt move by copyhea (*) 52b6310... middle-end/114681 - condition coverage and inlining (*) cb46aca... c++: Fix ANNOTATE_EXPR instantiation [PR114409] (*) f3fdcf4... RISC-V: Remove -Wno-psabi for test build option [NFC] (*) e40a3d8... RISC-V: Bugfix ICE for the vector return arg in mode switch (*) 936dd62... btf: do not skip members of data type with type id BTF_VOID (*) 5c869aa... ctf: fix PR debug/112878 (*) 0f3e76e... Daily bump. (*) 39f8192... Revert "testsuite/gcc.target/cris/pr93372-2.c: Handle xpass (*) b8b148b... target: missing -Whardened with -fcf-protection=none [PR114 (*) 4a94551... analyzer: fix ICE on negative values for size_t [PR114472] (*) 107b0e6... analyzer: add SARIF property bag to -Wanalyzer-infinite-loo (*) 960e07d... analyzer: add SARIF property bag to -Wanalyzer-infinite-rec (*) 7a49d5d... analyzer: add SARIF property bags to -Wanalyzer-overlapping (*) 115d5c6... analyzer: show size in SARIF property bag for -Wanalyzer-ta (*) 7f6599a... analyzer: fixes to internal docs (*) 082374f... analyzer, testuite: comment fixes (*) d09d70c... testsuite: add some missing -fanalyzer to plugin tests (*) 19b9841... Regenerate gcc.pot (*) ded646c... Fortran: fix argument checking of intrinsics C_SIZEOF, C_F_ (*) 912753c... tree-optimization/114672 - WIDEN_MULT_PLUS_EXPR type mismat (*) (*) This commit already exists in another branch. Because the reference `refs/vendors/redhat/heads/gcc-14-branch' matches your hooks.email-new-commits-only configuration, no separate email is sent for this commit.
[gcc r14-9925] aarch64: Fix _BitInt testcases
https://gcc.gnu.org/g:b87ba79200f2a727aa5c523abcc5c03fa11fc007 commit r14-9925-gb87ba79200f2a727aa5c523abcc5c03fa11fc007 Author: Andre Vieira (lists) Date: Thu Apr 11 17:54:37 2024 +0100 aarch64: Fix _BitInt testcases This patch fixes some testisms introduced by: commit 5aa3fec38cc6f52285168b161bab1a869d864b44 Author: Andre Vieira Date: Wed Apr 10 16:29:46 2024 +0100 aarch64: Add support for _BitInt The testcases were relying on an unnecessary sign-extend that is no longer generated. The tested version was just slightly behind top of trunk when the patch was committed, and the codegen had changed, for the better, by then. gcc/testsuite/ChangeLog: * gcc.target/aarch64/bitfield-bitint-abi-align16.c (g1, g8, g16, g1p, g8p, g16p): Remove unnecessary sbfx. * gcc.target/aarch64/bitfield-bitint-abi-align8.c (g1, g8, g16, g1p, g8p, g16p): Likewise. Diff: --- .../aarch64/bitfield-bitint-abi-align16.c | 30 +- .../aarch64/bitfield-bitint-abi-align8.c | 30 +- 2 files changed, 24 insertions(+), 36 deletions(-) diff --git a/gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align16.c b/gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align16.c index 3f292a45f95..4a228b0a1ce 100644 --- a/gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align16.c +++ b/gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align16.c @@ -55,9 +55,8 @@ ** g1: ** mov (x[0-9]+), x0 ** mov w0, w1 -** sbfx(x[0-9]+), \1, 0, 63 -** and x4, \2, 9223372036854775807 -** and x2, \2, 1 +** and x4, \1, 9223372036854775807 +** and x2, \1, 1 ** mov x3, 0 ** b f1 */ @@ -66,9 +65,8 @@ ** g8: ** mov (x[0-9]+), x0 ** mov w0, w1 -** sbfx(x[0-9]+), \1, 0, 63 -** and x4, \2, 9223372036854775807 -** and x2, \2, 1 +** and x4, \1, 9223372036854775807 +** and x2, \1, 1 ** mov x3, 0 ** b f8 */ @@ -76,9 +74,8 @@ ** g16: ** mov (x[0-9]+), x0 ** mov w0, w1 -** sbfx(x[0-9]+), \1, 0, 63 -** and x4, \2, 9223372036854775807 -** and x2, \2, 1 +** and x4, \1, 9223372036854775807 +** and x2, \1, 1 ** mov x3, 0 ** b f16 */ @@ -107,9 +104,8 @@ /* ** g1p: ** mov (w[0-9]+), w1 -** sbfx(x[0-9]+), x0, 0, 63 -** and x3, \2, 9223372036854775807 -** and x1, \2, 1 +** and x3, x0, 9223372036854775807 +** and x1, x0, 1 ** mov x2, 0 ** mov w0, \1 ** b f1p @@ -117,9 +113,8 @@ /* ** g8p: ** mov (w[0-9]+), w1 -** sbfx(x[0-9]+), x0, 0, 63 -** and x3, \2, 9223372036854775807 -** and x1, \2, 1 +** and x3, x0, 9223372036854775807 +** and x1, x0, 1 ** mov x2, 0 ** mov w0, \1 ** b f8p @@ -128,9 +123,8 @@ ** g16p: ** mov (x[0-9]+), x0 ** mov w0, w1 -** sbfx(x[0-9]+), \1, 0, 63 -** and x4, \2, 9223372036854775807 -** and x2, \2, 1 +** and x4, \1, 9223372036854775807 +** and x2, \1, 1 ** mov x3, 0 ** b f16p */ diff --git a/gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align8.c b/gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align8.c index da3c23550ba..e7f773640f0 100644 --- a/gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align8.c +++ b/gcc/testsuite/gcc.target/aarch64/bitfield-bitint-abi-align8.c @@ -54,9 +54,8 @@ /* ** g1: ** mov (w[0-9]+), w1 -** sbfx(x[0-9]+), x0, 0, 63 -** and x3, \2, 9223372036854775807 -** and x1, \2, 1 +** and x3, x0, 9223372036854775807 +** and x1, x0, 1 ** mov x2, 0 ** mov w0, \1 ** b f1 @@ -65,9 +64,8 @@ /* ** g8: ** mov (w[0-9]+), w1 -** sbfx(x[0-9]+), x0, 0, 63 -** and x3, \2, 9223372036854775807 -** and x1, \2, 1 +** and x3, x0, 9223372036854775807 +** and x1, x0, 1 ** mov x2, 0 ** mov w0, \1 ** b f8 @@ -76,9 +74,8 @@ ** g16: ** mov (x[0-9]+), x0 ** mov w0, w1 -** sbfx(x[0-9]+), \1, 0, 63 -** and x4, \2, 9223372036854775807 -** and x2, \2, 1 +** and x4, \1, 9223372036854775807 +** and x2, \1, 1 ** mov x3, 0 ** b f16 */ @@ -107,9 +104,8 @@ /* ** g1p: ** mov (w[0-9]+), w1 -** sbfx(x[0-9]+), x0, 0, 63 -** and x3, \2, 9223372036854775807 -** and x1, \2, 1 +** and x3, x0, 9223372036854775807 +** and x1, x0, 1 ** mov x2, 0 ** mov w0, \1 ** b f1p @@ -117,9 +113,8 @@ /* ** g8p: ** mov (w[0-9]+), w1 -** sbfx(x[0-9]+), x0, 0, 63 -** and
[gcc r14-9926] contrib/check-params-in-docs.py: Ignore gcn-preferred-vectorization-factor
https://gcc.gnu.org/g:33f83d3cd84f9876180a2e2a9d1ea082debdaa37
commit r14-9926-g33f83d3cd84f9876180a2e2a9d1ea082debdaa37
Author: Martin Jambor
Date: Thu Apr 11 19:37:45 2024 +0200
contrib/check-params-in-docs.py: Ignore gcn-preferred-vectorization-factor
contrib/check-params-in-docs.py is a script that checks that all
options reported with ./gcc/xgcc -Bgcc --help=param are in
gcc/doc/invoke.texi and vice versa.
gcn-preferred-vectorization-factor is in the manual but normally not
reported by --help, probably because I do not have gcn offload
configured. This patch makes the script silently about this particular
fact.
contrib/ChangeLog:
2024-04-11 Martin Jambor
* check-params-in-docs.py (ignored): Add
gcn-preferred-vectorization-factor.
Diff:
---
contrib/check-params-in-docs.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/contrib/check-params-in-docs.py b/contrib/check-params-in-docs.py
index 623c82284e2..f7879dd8e08 100755
--- a/contrib/check-params-in-docs.py
+++ b/contrib/check-params-in-docs.py
@@ -45,7 +45,7 @@ parser.add_argument('params_output')
args = parser.parse_args()
-ignored = {'logical-op-non-short-circuit'}
+ignored = {'logical-op-non-short-circuit',
'gcn-preferred-vectorization-factor'}
params = {}
for line in open(args.params_output).readlines():
[gcc r14-9927] btf: emit non-representable bitfield as void
https://gcc.gnu.org/g:f079d69d7b1338522562516537d96e9e1285c95e
commit r14-9927-gf079d69d7b1338522562516537d96e9e1285c95e
Author: David Faust
Date: Thu Apr 11 11:18:55 2024 -0700
btf: emit non-representable bitfield as void
This patch fixes an issue with mangled BTF that could occur when
a struct type contains a bitfield member which cannot be represented
in BTF. It is undefined what should happen in such cases, but we can
at least do something reasonable.
Commit
936dd627cd9 "btf: do not skip members of data type with type id
BTF_VOID_TYPEID"
made a similar change for un-representable non-bitfield members, but
had an unintended side-effect of mangling BTF for un-representable
bitfields: the struct (or union) would account for the offending
bitfield in its member count but the bitfield member itself was
not emitted, making the member count incorrect.
This change ensures that non-representable bitfield members of struct
and union types are always emitted with BTF_VOID_TYPEID. This avoids
corrupting the BTF information for the entire struct or union type.
gcc/
* btfout.cc (btf_asm_sou_member): Always emit non-representable
bitfield members as having 'void' type. Refactor slightly.
gcc/testsuite/
* gcc.dg/debug/btf/btf-bitfields-4.c: Add two new checks.
Diff:
---
gcc/btfout.cc| 54
gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-4.c | 2 +
2 files changed, 28 insertions(+), 28 deletions(-)
diff --git a/gcc/btfout.cc b/gcc/btfout.cc
index ab491f0297f..a1510574a93 100644
--- a/gcc/btfout.cc
+++ b/gcc/btfout.cc
@@ -922,41 +922,39 @@ static void
btf_asm_sou_member (ctf_container_ref ctfc, ctf_dmdef_t * dmd, unsigned int
idx)
{
ctf_dtdef_ref ref_type = ctfc->ctfc_types_list[dmd->dmd_type];
+ ctf_id_t base_type = get_btf_id (dmd->dmd_type);
+ uint64_t sou_offset = dmd->dmd_offset;
+
+ dw2_asm_output_data (4, dmd->dmd_name_offset,
+ "MEMBER '%s' idx=%u",
+ dmd->dmd_name, idx);
/* Re-encode bitfields to BTF representation. */
if (CTF_V2_INFO_KIND (ref_type->dtd_data.ctti_info) == CTF_K_SLICE)
{
- ctf_id_t base_type = ref_type->dtd_u.dtu_slice.cts_type;
- unsigned short word_offset = ref_type->dtd_u.dtu_slice.cts_offset;
- unsigned short bits = ref_type->dtd_u.dtu_slice.cts_bits;
- uint64_t sou_offset = dmd->dmd_offset;
-
- /* Pack the bit offset and bitfield size together. */
- sou_offset += word_offset;
-
- /* If this bitfield cannot be represented, do not output anything.
-The parent struct/union 'vlen' field has already been updated. */
- if ((bits > 0xff) || (sou_offset > 0xff))
- return;
+ if (btf_dmd_representable_bitfield_p (ctfc, dmd))
+ {
+ unsigned short word_offset = ref_type->dtd_u.dtu_slice.cts_offset;
+ unsigned short bits = ref_type->dtd_u.dtu_slice.cts_bits;
- sou_offset &= 0x00ff;
- sou_offset |= ((bits & 0xff) << 24);
+ /* Pack the bit offset and bitfield size together. */
+ sou_offset += word_offset;
+ sou_offset &= 0x00ff;
+ sou_offset |= ((bits & 0xff) << 24);
- dw2_asm_output_data (4, dmd->dmd_name_offset,
- "MEMBER '%s' idx=%u",
- dmd->dmd_name, idx);
- /* Refer to the base type of the slice. */
- btf_asm_type_ref ("btm_type", ctfc, get_btf_id (base_type));
- dw2_asm_output_data (4, sou_offset, "btm_offset");
-}
- else
-{
- dw2_asm_output_data (4, dmd->dmd_name_offset,
- "MEMBER '%s' idx=%u",
- dmd->dmd_name, idx);
- btf_asm_type_ref ("btm_type", ctfc, get_btf_id (dmd->dmd_type));
- dw2_asm_output_data (4, dmd->dmd_offset, "btm_offset");
+ /* Refer to the base type of the slice. */
+ base_type = get_btf_id (ref_type->dtd_u.dtu_slice.cts_type);
+ }
+ else
+ {
+ /* Bitfield cannot be represented in BTF. Emit the member as having
+'void' type. */
+ base_type = BTF_VOID_TYPEID;
+ }
}
+
+ btf_asm_type_ref ("btm_type", ctfc, base_type);
+ dw2_asm_output_data (4, sou_offset, "btm_offset");
}
/* Asm'out an enum constant following a BTF_KIND_ENUM{,64}. */
diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-4.c
b/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-4.c
index d4a6ef6a1eb..20cdfaa057a 100644
--- a/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-4.c
+++ b/gcc/testsuite/gcc.dg/debug/btf/btf-bitfields-4.c
@@ -14,6 +14,8 @@
/* Struct with 4 members and no bitfield (kind_flag not set). */
/* { dg-final { scan-assembler-times "\[\t \]0x404\[\t
\]+\[^\n\]*btt_info" 1 } } */
+/* { dg-final { scan-assembler-times " MEMBER" 4 } } */
+/* { dg-final { scan-as
[gcc r14-9928] btf: fix a possibly misleading asm debug comment
https://gcc.gnu.org/g:9b8bc02037eeaf4d6365010bb0533385deb4a90d
commit r14-9928-g9b8bc02037eeaf4d6365010bb0533385deb4a90d
Author: David Faust
Date: Thu Apr 11 12:52:36 2024 -0700
btf: fix a possibly misleading asm debug comment
This patch fixes a small error that could occur in the debug comment
when emitting a type reference with btf_asm_type_ref.
While working on a previous patch, I noticed the following in the asm
output for the test btf-bitfields-4.c:
...
.long 0x39# MEMBER 'c' idx=3
.long 0x6 # btm_type: (BTF_KIND_UNKN '')
...
.long 0x34# TYPE 6 BTF_KIND_INT 'char'
The type for member 'c' is correct, but the comment for the member
incorrectly reads "BTF_KIND_UNKN ''". This was caused by an
incorrect type lookup in btf_asm_type_ref that could happen if the
source file has types which can be represented in CTF but not in BTF.
This patch fixes the issue by changing btf_asm_type_ref to work fully
in the CTF ID space until writing out the final BTF ID. That ensures
types are correctly identified when writing the asm debug comments,
like the following fixed comment for the above case.
...
.long 0x39# MEMBER 'c' idx=3
.long 0x6 # btm_type: (BTF_KIND_INT 'char')
...
Note that there was no problem with the actual BTF information, the
only error was in the comment. This patch does not change the output
BTF information, and no tests were affected.
gcc/
* btfout.cc (btf_asm_type_ref): Convert IDs to BTF internally and
fix potentially looking up wrong type for asm debug comment info.
Split into...
(btf_asm_datasec_type_ref): ... This. New.
(btf_asm_datasec_entry): Call it here, instead of btf_asm_type_ref.
(btf_asm_type, btf_asm_array, btf_asm_varent, btf_asm_sou_member)
(btf_asm_func_arg, btf_asm_func_type): Adapt btf_asm_type_ref call.
Diff:
---
gcc/btfout.cc | 84 +++
1 file changed, 50 insertions(+), 34 deletions(-)
diff --git a/gcc/btfout.cc b/gcc/btfout.cc
index a1510574a93..07f066a4706 100644
--- a/gcc/btfout.cc
+++ b/gcc/btfout.cc
@@ -738,36 +738,22 @@ btf_dmd_representable_bitfield_p (ctf_container_ref ctfc,
ctf_dmdef_t *dmd)
/* Asm'out a reference to another BTF type. */
static void
-btf_asm_type_ref (const char *prefix, ctf_container_ref ctfc, ctf_id_t ref_id)
+btf_asm_type_ref (const char *prefix, ctf_container_ref ctfc, ctf_id_t ctf_id)
{
- if (ref_id == BTF_VOID_TYPEID || ref_id == BTF_INVALID_TYPEID)
+ ctf_id_t btf_id = get_btf_id (ctf_id);
+ if (btf_id == BTF_VOID_TYPEID || btf_id == BTF_INVALID_TYPEID)
{
/* There is no explicit void type.
Also handle any invalid refs that made it this far, just in case. */
- dw2_asm_output_data (4, ref_id, "%s: void", prefix);
-}
- else if (ref_id >= num_types_added + 1
- && ref_id < num_types_added + num_vars_added + 1)
-{
- /* Ref to a variable. Should only appear in DATASEC entries. */
- ctf_id_t var_id = btf_relative_var_id (ref_id);
- ctf_dvdef_ref dvd = ctfc->ctfc_vars_list[var_id];
- dw2_asm_output_data (4, ref_id, "%s: (BTF_KIND_VAR '%s')",
- prefix, dvd->dvd_name);
-
-}
- else if (ref_id >= num_types_added + num_vars_added + 1)
-{
- /* Ref to a FUNC record. */
- size_t func_id = btf_relative_func_id (ref_id);
- ctf_dtdef_ref ref_type = (*funcs)[func_id];
- dw2_asm_output_data (4, ref_id, "%s: (BTF_KIND_FUNC '%s')",
- prefix, get_btf_type_name (ref_type));
+ dw2_asm_output_data (4, btf_id, "%s: void", prefix);
}
else
{
- /* Ref to a standard type in the types list. */
- ctf_dtdef_ref ref_type = ctfc->ctfc_types_list[ref_id];
+ gcc_assert (btf_id <= num_types_added);
+
+ /* Ref to a standard type in the types list. Note: take care that we
+must index the type list by the original CTF id, not the BTF id. */
+ ctf_dtdef_ref ref_type = ctfc->ctfc_types_list[ctf_id];
uint32_t ref_kind
= get_btf_kind (CTF_V2_INFO_KIND (ref_type->dtd_data.ctti_info));
@@ -775,12 +761,43 @@ btf_asm_type_ref (const char *prefix, ctf_container_ref
ctfc, ctf_id_t ref_id)
? btf_kind_name (BTF_KIND_ENUM)
: btf_kind_name (ref_kind);
- dw2_asm_output_data (4, ref_id, "%s: (BTF_KIND_%s '%s')",
+ dw2_asm_output_data (4, btf_id, "%s: (BTF_KIND_%s '%s')",
prefix, kind_name,
get_btf_type_name (ref_type));
}
}
+/* Asm'out a reference to a BTF_KIND_VAR or BTF_KIND_FUNC type. These type
+ kinds are BTF-specific, and should only be referred to by entries in
+ BTF_KIND_DATASEC records. */
+
[gcc(refs/users/meissner/heads/work164-bugs)] Simplify converting between SImode and SF/DFmode.
https://gcc.gnu.org/g:5193948f3bdefa3c62f76ceb909e90d396791970
commit 5193948f3bdefa3c62f76ceb909e90d396791970
Author: Michael Meissner
Date: Thu Apr 11 22:12:30 2024 -0400
Simplify converting between SImode and SF/DFmode.
2024-04-11 Michael Meissner
gcc/
PR target/90822
* gcc/config/rs6000.md (floatsidf2): If SImode can live in the
floating
point registers, directly issue a conversion to DImode and do the
floating point conversion.
(floatunssisf2): Likewise.
(floatunssidf2): Likewise.
(floatsisf2): Likewise.
Diff:
---
gcc/config/rs6000/rs6000.md | 44
1 file changed, 40 insertions(+), 4 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index f1f120199f3..251b5c486b0 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -6041,6 +6041,10 @@
; with a '#' template, and a define_split (with C code). The idea is
; to allow constant folding with the template of the define_insn,
; then to have the insns split later (between sched1 and final).
+;
+; If we have direct support for SImode in floating point registers, just
+; convert the SImode value to DImode. If we are loading the value from memory,
+; we will use the LFIWAX/LXSIWAX
(define_expand "floatsidf2"
[(parallel [(set (match_operand:DF 0 "gpc_reg_operand")
@@ -6054,7 +6058,13 @@
{
if (TARGET_LFIWAX && TARGET_FCFID)
{
- emit_insn (gen_floatsidf2_lfiwax (operands[0], operands[1]));
+ if (TARGET_POWERPC64 && TARGET_P8_VECTOR)
+ {
+ rtx di_tmp = convert_to_mode (DImode, operands[1], false);
+ emit_insn (gen_floatdidf2 (operands[0], di_tmp));
+ }
+ else
+ emit_insn (gen_floatsidf2_lfiwax (operands[0], operands[1]));
DONE;
}
else if (TARGET_FCFID)
@@ -6110,6 +6120,10 @@
;; If we don't have a direct conversion to single precision, don't enable this
;; conversion for 32-bit without fast math, because we don't have the insn to
;; generate the fixup swizzle to avoid double rounding problems.
+;
+; If we have direct support for SImode in floating point registers, just
+; convert the SImode value to DImode. If we are loading the value from memory,
+; we will use the LFIWAX/LXSIWAX
(define_expand "floatunssisf2"
[(set (match_operand:SF 0 "gpc_reg_operand")
(unsigned_float:SF (match_operand:SI 1 "nonimmediate_operand")))]
@@ -6120,7 +6134,13 @@
{
if (TARGET_LFIWZX && TARGET_FCFIDUS)
{
- emit_insn (gen_floatunssisf2_lfiwzx (operands[0], operands[1]));
+ if (TARGET_POWERPC64 && TARGET_P8_VECTOR)
+ {
+ rtx di_tmp = convert_to_mode (DImode, operands[1], true);
+ emit_insn (gen_floatdisf2 (operands[0], di_tmp));
+ }
+ else
+ emit_insn (gen_floatunssisf2_lfiwzx (operands[0], operands[1]));
DONE;
}
else
@@ -6145,7 +6165,13 @@
{
if (TARGET_LFIWZX && TARGET_FCFID)
{
- emit_insn (gen_floatunssidf2_lfiwzx (operands[0], operands[1]));
+ if (TARGET_POWERPC64 && TARGET_P8_VECTOR)
+ {
+ rtx di_tmp = convert_to_mode (DImode, operands[1], false);
+ emit_insn (gen_floatunsdidf2 (operands[0], di_tmp));
+ }
+ else
+ emit_insn (gen_floatunssidf2_lfiwzx (operands[0], operands[1]));
DONE;
}
else if (TARGET_FCFID)
@@ -6905,6 +6931,10 @@
;; If we don't have a direct conversion to single precision, don't enable this
;; conversion for 32-bit without fast math, because we don't have the insn to
;; generate the fixup swizzle to avoid double rounding problems.
+;
+; If we have direct support for SImode in floating point registers, just
+; convert the SImode value to DImode. If we are loading the value from memory,
+; we will use the LFIWAX/LXSIWAX
(define_expand "floatsisf2"
[(set (match_operand:SF 0 "gpc_reg_operand")
(float:SF (match_operand:SI 1 "nonimmediate_operand")))]
@@ -6915,7 +6945,13 @@
{
if (TARGET_FCFIDS && TARGET_LFIWAX)
{
- emit_insn (gen_floatsisf2_lfiwax (operands[0], operands[1]));
+ if (TARGET_POWERPC64 && TARGET_P8_VECTOR)
+ {
+ rtx di_tmp = convert_to_mode (DImode, operands[1], false);
+ emit_insn (gen_floatdisf2 (operands[0], di_tmp));
+ }
+ else
+ emit_insn (gen_floatsisf2_lfiwax (operands[0], operands[1]));
DONE;
}
else if (TARGET_FCFID && TARGET_LFIWAX)
[gcc r14-9930] RISC-V: Bugfix ICE non-vector in TARGET_FUNCTION_VALUE_REGNO_P
https://gcc.gnu.org/g:dc51a6428f6d8e5a57b8b1bf559145288e87660b
commit r14-9930-gdc51a6428f6d8e5a57b8b1bf559145288e87660b
Author: Pan Li
Date: Fri Apr 12 11:12:24 2024 +0800
RISC-V: Bugfix ICE non-vector in TARGET_FUNCTION_VALUE_REGNO_P
This patch would like to fix one ICE when vector is not enabled
in hook TARGET_FUNCTION_VALUE_REGNO_P implementation. The vector
regno is available if and only if the TARGET_VECTOR is true. The
previous implement missed this condition and then result in ICE
when rv64gc build option without vector.
The below test suite is passed for this patch.
* The rv64gcv fully regression tests.
* The rv64gc fully regression tests.
PR target/114639
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_function_value_regno_p): Add
TARGET_VECTOR predicate for V_RETURN regno.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr114639-1.c: New test.
* gcc.target/riscv/pr114639-2.c: New test.
* gcc.target/riscv/pr114639-3.c: New test.
* gcc.target/riscv/pr114639-4.c: New test.
Signed-off-by: Pan Li
Diff:
---
gcc/config/riscv/riscv.cc | 2 +-
gcc/testsuite/gcc.target/riscv/pr114639-1.c | 11 +++
gcc/testsuite/gcc.target/riscv/pr114639-2.c | 11 +++
gcc/testsuite/gcc.target/riscv/pr114639-3.c | 11 +++
gcc/testsuite/gcc.target/riscv/pr114639-4.c | 11 +++
5 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 91f017dd52a..e5f00806bb9 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -11008,7 +11008,7 @@ riscv_function_value_regno_p (const unsigned regno)
if (FP_RETURN_FIRST <= regno && regno <= FP_RETURN_LAST)
return true;
- if (regno == V_RETURN)
+ if (TARGET_VECTOR && regno == V_RETURN)
return true;
return false;
diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-1.c
b/gcc/testsuite/gcc.target/riscv/pr114639-1.c
new file mode 100644
index 000..f41723193a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr114639-1.c
@@ -0,0 +1,11 @@
+/* Test that we do not have ice when compile */
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -std=gnu89 -O3" } */
+
+g (a, b) {}
+
+f (xx)
+ void* xx;
+{
+ __builtin_apply ((void*)g, xx, 200);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-2.c
b/gcc/testsuite/gcc.target/riscv/pr114639-2.c
new file mode 100644
index 000..0c402c4b254
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr114639-2.c
@@ -0,0 +1,11 @@
+/* Test that we do not have ice when compile */
+/* { dg-do compile } */
+/* { dg-options "-march=rv64imac -mabi=lp64 -std=gnu89 -O3" } */
+
+g (a, b) {}
+
+f (xx)
+ void* xx;
+{
+ __builtin_apply ((void*)g, xx, 200);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-3.c
b/gcc/testsuite/gcc.target/riscv/pr114639-3.c
new file mode 100644
index 000..ffb0d6d162d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr114639-3.c
@@ -0,0 +1,11 @@
+/* Test that we do not have ice when compile */
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32d -std=gnu89 -O3" } */
+
+g (a, b) {}
+
+f (xx)
+ void* xx;
+{
+ __builtin_apply ((void*)g, xx, 200);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-4.c
b/gcc/testsuite/gcc.target/riscv/pr114639-4.c
new file mode 100644
index 000..a6e229101ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr114639-4.c
@@ -0,0 +1,11 @@
+/* Test that we do not have ice when compile */
+/* { dg-do compile } */
+/* { dg-options "-march=rv32imac -mabi=ilp32 -std=gnu89 -O3" } */
+
+g (a, b) {}
+
+f (xx)
+ void* xx;
+{
+ __builtin_apply ((void*)g, xx, 200);
+}
