[Bug target/48227] New: "rep ret" generated for -march=core2
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48227 Summary: "rep ret" generated for -march=core2 Product: gcc Version: 4.5.4 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unassig...@gcc.gnu.org ReportedBy: zuxy.m...@gmail.com gcc 4.5 will use "rep; ret" for K8, Athlon, AMDFam10, Core2, and generic. Looking into the change history, we can see that gcc has padded returns for Core2 ever since Core2 support was added here: http://gcc.gnu.org/ml/gcc-patches/2006-11/msg00860.html It is suspected that Vlad just copied the generic tunings for Core2, and didn't notice that there was no particular reason to pad returns for Core2.
[Bug target/48227] "rep ret" generated for -march=core2
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48227 --- Comment #3 from Zuxy 2011-04-06 13:42:21 UTC --- (In reply to comment #1) > A good question is does it make a difference in actual performance numbers, it > might still make a positive difference. Until someone tries it out and sees > the difference in performance, I am going to say we should keep it. Actually GCC since 4.6 has stopped generating 'rep ret' for all Intel CPUs.
[Bug target/48743] -march=native mis-detects AMD K6-2+ / K6-3 as Athlon - compiled C fails with "illegal instruction"
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48743 --- Comment #3 from Zuxy 2011-05-12 08:27:56 UTC --- Created attachment 24233 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=24233 Proposed patch For a brief time AMD produced K6-2+ and K6-3+ processors, targeting mobile market. These processors support Extended 3DNow! but not CMOV or Extended MMX (a subset of SSE) and are detected as Athlon by GCC so GCC will generate CMOV for them, leading to #UD. The patch solves the problem by differentiating K6 and Athlon by Extended MMX rather than Extended 3DNow!.
