[Bug other/52646] New: Clang LLVM's __attribute__((naked)) for GCC when compiling for x86

2012-03-20 Thread th020394 at gmail dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52646

 Bug #: 52646
   Summary: Clang LLVM's __attribute__((naked)) for GCC when
compiling for x86
Classification: Unclassified
   Product: gcc
   Version: unknown
Status: UNCONFIRMED
  Severity: enhancement
  Priority: P3
 Component: other
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: th020...@gmail.com


It would be helpful to system developers if GCC had something similar to Clang
LLVM's __attribute__((naked)) for x86 targets. There are cases, such as when
interfacing with assembly or when handling an interrupt, when the code that
precedes and follows a normal function causes problems.

GCC already has __attribute__((interrupt)) for multiple targets, but doesn't
implement it for x86. Personally, if the feature were to be implemented, I
believe naked is more explicit.

I'd be glad to do this myself, but I'm not acquainted with GCC at all. What
files should I look in to get started?


[Bug other/52646] Clang LLVM's __attribute__((naked)) for GCC when compiling for x86

2012-03-20 Thread th020394 at gmail dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52646

--- Comment #2 from Tyler Hardin  2012-03-21 
00:44:39 UTC ---
While I admit my knowledge of interrupts on ARM, AVR, CR16, Epiphany, M32C,
M32R/D, m68k, MeP, MIPS, RL78, RX and Xstormy16 is limited; I don't see why, if
GCC supports interrupts on all of them, then it shouldn't have support for
others. Is there something special about them?


[Bug other/52646] Clang LLVM's __attribute__((naked)) for GCC when compiling for x86

2012-03-20 Thread th020394 at gmail dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52646

--- Comment #4 from Tyler Hardin  2012-03-21 
01:07:20 UTC ---
If I care enough to implement them for x86, do you believe it would be included
in GCC? If not, I won't waste my time with it (while it's worth my time to
implement it, it's not worth my time to maintain a fork that has my patch).

If you do, then I would really appreciate a hint about where to start. I
realize it may be obscure, so I understand if no one has a clue.


[Bug inline-asm/51863] New: invlpg with -masm=intel generates memory operand size error in assembly stage

2012-01-14 Thread th020394 at gmail dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51863

 Bug #: 51863
   Summary: invlpg with -masm=intel generates memory operand size
error in assembly stage
Classification: Unclassified
   Product: gcc
   Version: 4.6.1
Status: UNCONFIRMED
  Severity: minor
  Priority: P3
 Component: inline-asm
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: th020...@gmail.com


The expected behavior would be to generate code analogous to that of the
default -masm=att, which uses no size prefixes to address the memory operand of
invlpg.

The actual behavior is that -masm=intel causes GCC to emit code that uses a
size prefix (like dword, byte, etc.) which causes an error in GAS when the code
is assembled.

The command that generates the error is:
gcc -masm=intel main.c

The same command without -masm=intel works.

Output of "gcc -v"
Using built-in specs.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/i686-linux-gnu/4.6.1/lto-wrapper
Target: i686-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Ubuntu/Linaro
4.6.1-9ubuntu3' --with-bugurl=file:///usr/share/doc/gcc-4.6/README.Bugs
--enable-languages=c,c++,fortran,objc,obj-c++,go --prefix=/usr
--program-suffix=-4.6 --enable-shared --enable-linker-build-id
--with-system-zlib --libexecdir=/usr/lib --without-included-gettext
--enable-threads=posix --with-gxx-include-dir=/usr/include/c++/4.6
--libdir=/usr/lib --enable-nls --with-sysroot=/ --enable-clocale=gnu
--enable-libstdcxx-debug --enable-libstdcxx-time=yes --enable-plugin
--enable-objc-gc --enable-targets=all --disable-werror --with-arch-32=i686
--with-tune=generic --enable-checking=release --build=i686-linux-gnu
--host=i686-linux-gnu --target=i686-linux-gnu
Thread model: posix
gcc version 4.6.1 (Ubuntu/Linaro 4.6.1-9ubuntu3)

The system type is Linux Mint 12, but I've found the same bug in i686-elf for
GCC 4.6.2.


[Bug inline-asm/51863] invlpg with -masm=intel generates memory operand size error in assembly stage

2012-01-14 Thread th020394 at gmail dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51863

--- Comment #1 from Tyler Hardin  2012-01-15 
06:05:49 UTC ---
Created attachment 26328
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=26328
A source file that generates the error.


[Bug inline-asm/51863] invlpg with -masm=intel generates memory operand size error in assembly stage

2012-01-15 Thread th020394 at gmail dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51863

Tyler Hardin  changed:

   What|Removed |Added

 Status|RESOLVED|UNCONFIRMED
 Resolution|INVALID |

--- Comment #3 from Tyler Hardin  2012-01-15 
08:49:26 UTC ---
(In reply to comment #2)
> I think you should use:
> asm("invlpg %0" :: "r"(pointer_to_page) : "memory");
> Instead.
invlpg only accepts memory operands. But, if I adapt your idea just a little,
it works:
asm("invlpg [%0]" :: "r"(pointer_to_page) : "memory");

It would be nice if it would work without having to trick the compiler (telling
it I'm using a register but actually referencing memory), but it works now,
that's all I care about. Thanks.

> What GCC is doing is correct in that it outputs the byte/word/dword
> correctly for -masm=intel.
But why for -masm=intel and not for -masm=att (the default)?