[Bug target/43129] Simplify global variable's address loading with option -fpic

[stephen.clarke at st dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43129

Stephen Clarke  changed:

   What|Removed |Added

 CC||stephen.clarke at st dot
   ||com

--- Comment #8 from Stephen Clarke  2010-10-14 
16:32:56 UTC ---
For arm instruction set, could you fold pc into the indexing
to save an instruction?

foo:
ldr r3, .L2// C
.LPIC0:
ldr r3, [r3,pc]// C
@ sp needed for prologue
ldr r2, [r3]
str r0, [r3]
mov r0, r2
bx  lr
.L3:
.align  2
.L2:
.word   ABS_ADDRESS_OF_GOT_ENTRY_FOR_i -(.LPIC0+4) // C

[Bug target/43129] Simplify global variable's address loading with option -fpic

[stephen.clarke at st dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43129

--- Comment #10 from Stephen Clarke  2010-10-14 
17:01:47 UTC ---
OK, I can see that the ARM ARM states for Rm == PC then its unpredictable.

But for Rn == PC, I can only see that its unpredictable if W is 1
or P is 0  (I am looking at encoding A1).  So I am struggling to
understand that:

   ldr r3, [pc,r3]

is unpredictable.  Forgive me if I made a mistake, my knowledge of
ARM is a little rusty.