[Bug target/112337] arm: ICE in arm_effective_regno when compiling for MVE

[saurabh.jha at arm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337

--- Comment #5 from Saurabh Jha  ---
Hey,

I did some digging into it. The ICE is happening on this assert:

gcc_assert (REG_P (op))

Here the op->code is MEM while it was expecting a REG. For the test program
above, the function arm_effective_regno is called some number of times and that
assert passes before it fails and cause ICE.

Could it be that the additional conditions that are causing it to use lra
causing it to fail? I am still continuing to investigate here.

Regards,
Saurabh

[Bug target/112337] arm: ICE in arm_effective_regno when compiling for MVE

[saurabh.jha at arm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337

--- Comment #10 from Saurabh Jha  ---
Hey,

This ICE uncovered something in Arm MVE. We proposed a fix in this patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635789.html

Regards,
Saurabh

[Bug tree-optimization/110221] With AVX512 fully masking gfortran.dg/pr68146.f ICEs

[saurabh.jha at arm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110221

Saurabh Jha  changed:

   What|Removed |Added

 CC||saurabh.jha at arm dot com

--- Comment #5 from Saurabh Jha  ---
Hi Richard,

Just to let you know, this fix has also seemed to have fixed this ICE too:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111478.

This ICE happens in GCC 12 but not in 13. I did a bisect on where the fixed
happened and it converged to your commit
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=e5f1956498251a4973d52c8aad3faf34d0443169

Regards,
Saurabh

[Bug target/112337] arm: ICE in arm_effective_regno when compiling for MVE

[saurabh.jha at arm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337

--- Comment #14 from Saurabh Jha  ---
I will look into this.

[Bug target/112337] arm: ICE in arm_effective_regno when compiling for MVE

[saurabh.jha at arm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337

--- Comment #15 from Saurabh Jha  ---
Have a patch for review here:
https://gcc.gnu.org/pipermail/gcc-patches/2024-January/644454.html

[Bug tree-optimization/111478] [12 Regression] aarch64 SVE ICE: in compute_live_loop_exits, at tree-ssa-loop-manip.cc:250

[saurabh.jha at arm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111478

--- Comment #8 from Saurabh Jha  ---
Hi Richard,

Are you also planning to backport it to gcc-12?

Regards,
Saurabh

[Bug target/116934] [15 Regression] ICE building 526.blender_r

[saurabh.jha at arm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116934

--- Comment #3 from Saurabh Jha  ---
Submitted a patch for review.
https://gcc.gnu.org/pipermail/gcc-patches/2024-October/664477.html

[Bug target/116934] [15 Regression] ICE building 526.blender_r

[saurabh.jha at arm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116934

--- Comment #2 from Saurabh Jha  ---
I will take a look. Thanks for bisecting it.

[Bug target/116445] gcc.target/arm/unsigned-extend-2.c on Cortex-M55 and misses possible Cortex-M optimization

[saurabh.jha at arm dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116445

--- Comment #1 from Saurabh Jha  ---
I am picking this up. I am having trouble assigning myself so commenting here
for now.