[Bug lto/50293] -flto fails if GCC is installed in directory with space in path name

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50293



--- Comment #3 from jye2 at gcc dot gnu.org 2013-03-06 06:32:15 UTC ---

Author: jye2

Date: Wed Mar  6 06:32:03 2013

New Revision: 196485



URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=196485

Log:

2013-03-06  Joey Ye  



PR lto/50293

* gcc.c (convert_white_space): New function.

(main): Handles white space in function name.



Modified:

trunk/gcc/ChangeLog

trunk/gcc/gcc.c

[Bug lto/50293] -flto fails if GCC is installed in directory with space in path name

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50293



--- Comment #5 from jye2 at gcc dot gnu.org 2013-03-08 07:25:17 UTC ---

Author: jye2

Date: Fri Mar  8 07:25:09 2013

New Revision: 196534



URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=196534

Log:

013-03-08  Joey Ye  



Backport from mainline

2013-03-06  Joey Ye  



PR lto/50293

* gcc.c (convert_white_space): New function.

(main): Handles white space in function name.



Modified:

branches/gcc-4_7-branch/gcc/ChangeLog

branches/gcc-4_7-branch/gcc/gcc.c

[Bug target/49437] interrupt return pop sometimes corrupts sp

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49437

--- Comment #3 from jye2 at gcc dot gnu.org 2011-08-19 08:28:15 UTC ---
Author: jye2
Date: Fri Aug 19 08:28:08 2011
New Revision: 177891

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=177891
Log:
   PR target/49437
   * config/arm/arm.c (arm_output_epilogue): Properly handle epilogue
   when stack was realigned in interrupt handler prologue.

testsuite:

   PR target/49437
   * gcc.target/arm/handler-align.c: New test.
   * lib/target-supports.exp (check_effective_target_arm_cortex_m):
 New Function.


Added:
trunk/gcc/testsuite/gcc.target/arm/handler-align.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/arm/arm.c
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/lib/target-supports.exp

[Bug bootstrap/48120] libpwl test must use g++

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48120

--- Comment #5 from jye2 at gcc dot gnu.org 2011-09-19 05:39:11 UTC ---
Author: jye2
Date: Mon Sep 19 05:39:05 2011
New Revision: 178951

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178951
Log:
2011-09-19  Joey Ye  

Backport r171225 from mainline
2011-03-21  Rainer Orth  

PR bootstrap/48120:
* configure.ac (pwllib): Use LIBS instead of LDFLAGS.
Add -lstdc++ -lm to LIBS.
* configure: Regenerate.

Added:
branches/ARM/embedded-4_6-branch/ChangeLog.arm
Modified:
branches/ARM/embedded-4_6-branch/configure
branches/ARM/embedded-4_6-branch/configure.ac

[Bug target/46934] gcc ICE: error: unrecognizable insn: in extract_insn, at recog.c:2109

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46934

--- Comment #7 from jye2 at gcc dot gnu.org 2011-09-19 06:17:58 UTC ---
Author: jye2
Date: Mon Sep 19 06:17:45 2011
New Revision: 178953

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178953
Log:
2011-09-19  chengbin  

Backport r174035 from mainline
2011-05-22  Tom de Vries  

PR middle-end/48689
* fold-const.c (fold_checksum_tree): Guard TREE_CHAIN use with
CODE_CONTAINS_STRUCT (TS_COMMON).

Backport r172297 from mainline
2011-04-11  Chung-Lin Tang  
Richard Earnshaw  

PR target/48250
* config/arm/arm.c (arm_legitimize_reload_address): Update cases
to use sign-magnitude offsets. Reject unsupported unaligned
cases. Add detailed description in comments.
* config/arm/arm.md (reload_outdf): Disable for ARM mode; change
condition from TARGET_32BIT to TARGET_ARM.

Backport r171978 from mainline
2011-04-05  Tom de Vries  

PR target/43920
* config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing
for size.

Backport r171632 from mainline
2011-03-28  Richard Sandiford  

* builtins.c (expand_builtin_memset_args): Use gen_int_mode
instead of GEN_INT.

Backport r171379 from mainline
2011-03-23  Chung-Lin Tang  

PR target/46934
* config/arm/arm.md (casesi): Use the gen_int_mode() function
to subtract lower bound instead of GEN_INT().

Backport r171251 from mainline 
2011-03-21  Daniel Jacobowitz  

* config/arm/unwind-arm.c (__gnu_unwind_pr_common): Correct test
for barrier handlers.

Backport r171096 from mainline
2011-03-17  Chung-Lin Tang  

PR target/43872
* config/arm/arm.c (arm_get_frame_offsets): Adjust early
return condition with !cfun->calls_alloca.


Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/builtins.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.h
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/unwind-arm.c
branches/ARM/embedded-4_6-branch/gcc/fold-const.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr40887.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr42575.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr43698.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr44788.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/sync-1.c

[Bug target/43920] Choosing conditional execution over conditional branches for code size in some cases.

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43920

--- Comment #15 from jye2 at gcc dot gnu.org 2011-09-19 06:17:54 UTC ---
Author: jye2
Date: Mon Sep 19 06:17:45 2011
New Revision: 178953

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178953
Log:
2011-09-19  chengbin  

Backport r174035 from mainline
2011-05-22  Tom de Vries  

PR middle-end/48689
* fold-const.c (fold_checksum_tree): Guard TREE_CHAIN use with
CODE_CONTAINS_STRUCT (TS_COMMON).

Backport r172297 from mainline
2011-04-11  Chung-Lin Tang  
Richard Earnshaw  

PR target/48250
* config/arm/arm.c (arm_legitimize_reload_address): Update cases
to use sign-magnitude offsets. Reject unsupported unaligned
cases. Add detailed description in comments.
* config/arm/arm.md (reload_outdf): Disable for ARM mode; change
condition from TARGET_32BIT to TARGET_ARM.

Backport r171978 from mainline
2011-04-05  Tom de Vries  

PR target/43920
* config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing
for size.

Backport r171632 from mainline
2011-03-28  Richard Sandiford  

* builtins.c (expand_builtin_memset_args): Use gen_int_mode
instead of GEN_INT.

Backport r171379 from mainline
2011-03-23  Chung-Lin Tang  

PR target/46934
* config/arm/arm.md (casesi): Use the gen_int_mode() function
to subtract lower bound instead of GEN_INT().

Backport r171251 from mainline 
2011-03-21  Daniel Jacobowitz  

* config/arm/unwind-arm.c (__gnu_unwind_pr_common): Correct test
for barrier handlers.

Backport r171096 from mainline
2011-03-17  Chung-Lin Tang  

PR target/43872
* config/arm/arm.c (arm_get_frame_offsets): Adjust early
return condition with !cfun->calls_alloca.


Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/builtins.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.h
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/unwind-arm.c
branches/ARM/embedded-4_6-branch/gcc/fold-const.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr40887.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr42575.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr43698.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr44788.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/sync-1.c

[Bug target/48250] ICE in reload_cse_simplify_operands, at postreload.c:403

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48250

--- Comment #6 from jye2 at gcc dot gnu.org 2011-09-19 06:17:55 UTC ---
Author: jye2
Date: Mon Sep 19 06:17:45 2011
New Revision: 178953

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178953
Log:
2011-09-19  chengbin  

Backport r174035 from mainline
2011-05-22  Tom de Vries  

PR middle-end/48689
* fold-const.c (fold_checksum_tree): Guard TREE_CHAIN use with
CODE_CONTAINS_STRUCT (TS_COMMON).

Backport r172297 from mainline
2011-04-11  Chung-Lin Tang  
Richard Earnshaw  

PR target/48250
* config/arm/arm.c (arm_legitimize_reload_address): Update cases
to use sign-magnitude offsets. Reject unsupported unaligned
cases. Add detailed description in comments.
* config/arm/arm.md (reload_outdf): Disable for ARM mode; change
condition from TARGET_32BIT to TARGET_ARM.

Backport r171978 from mainline
2011-04-05  Tom de Vries  

PR target/43920
* config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing
for size.

Backport r171632 from mainline
2011-03-28  Richard Sandiford  

* builtins.c (expand_builtin_memset_args): Use gen_int_mode
instead of GEN_INT.

Backport r171379 from mainline
2011-03-23  Chung-Lin Tang  

PR target/46934
* config/arm/arm.md (casesi): Use the gen_int_mode() function
to subtract lower bound instead of GEN_INT().

Backport r171251 from mainline 
2011-03-21  Daniel Jacobowitz  

* config/arm/unwind-arm.c (__gnu_unwind_pr_common): Correct test
for barrier handlers.

Backport r171096 from mainline
2011-03-17  Chung-Lin Tang  

PR target/43872
* config/arm/arm.c (arm_get_frame_offsets): Adjust early
return condition with !cfun->calls_alloca.


Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/builtins.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.h
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/unwind-arm.c
branches/ARM/embedded-4_6-branch/gcc/fold-const.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr40887.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr42575.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr43698.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr44788.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/sync-1.c

[Bug target/43872] VLAs are not aligned correctly on ARM

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43872

--- Comment #7 from jye2 at gcc dot gnu.org 2011-09-19 06:17:57 UTC ---
Author: jye2
Date: Mon Sep 19 06:17:45 2011
New Revision: 178953

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178953
Log:
2011-09-19  chengbin  

Backport r174035 from mainline
2011-05-22  Tom de Vries  

PR middle-end/48689
* fold-const.c (fold_checksum_tree): Guard TREE_CHAIN use with
CODE_CONTAINS_STRUCT (TS_COMMON).

Backport r172297 from mainline
2011-04-11  Chung-Lin Tang  
Richard Earnshaw  

PR target/48250
* config/arm/arm.c (arm_legitimize_reload_address): Update cases
to use sign-magnitude offsets. Reject unsupported unaligned
cases. Add detailed description in comments.
* config/arm/arm.md (reload_outdf): Disable for ARM mode; change
condition from TARGET_32BIT to TARGET_ARM.

Backport r171978 from mainline
2011-04-05  Tom de Vries  

PR target/43920
* config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing
for size.

Backport r171632 from mainline
2011-03-28  Richard Sandiford  

* builtins.c (expand_builtin_memset_args): Use gen_int_mode
instead of GEN_INT.

Backport r171379 from mainline
2011-03-23  Chung-Lin Tang  

PR target/46934
* config/arm/arm.md (casesi): Use the gen_int_mode() function
to subtract lower bound instead of GEN_INT().

Backport r171251 from mainline 
2011-03-21  Daniel Jacobowitz  

* config/arm/unwind-arm.c (__gnu_unwind_pr_common): Correct test
for barrier handlers.

Backport r171096 from mainline
2011-03-17  Chung-Lin Tang  

PR target/43872
* config/arm/arm.c (arm_get_frame_offsets): Adjust early
return condition with !cfun->calls_alloca.


Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/builtins.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.h
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/unwind-arm.c
branches/ARM/embedded-4_6-branch/gcc/fold-const.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr40887.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr42575.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr43698.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr44788.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/sync-1.c

[Bug middle-end/48689] [4.7 Regression] ICE in fold-const.c:13798 with fold checking

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48689

--- Comment #4 from jye2 at gcc dot gnu.org 2011-09-19 06:17:54 UTC ---
Author: jye2
Date: Mon Sep 19 06:17:45 2011
New Revision: 178953

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178953
Log:
2011-09-19  chengbin  

Backport r174035 from mainline
2011-05-22  Tom de Vries  

PR middle-end/48689
* fold-const.c (fold_checksum_tree): Guard TREE_CHAIN use with
CODE_CONTAINS_STRUCT (TS_COMMON).

Backport r172297 from mainline
2011-04-11  Chung-Lin Tang  
Richard Earnshaw  

PR target/48250
* config/arm/arm.c (arm_legitimize_reload_address): Update cases
to use sign-magnitude offsets. Reject unsupported unaligned
cases. Add detailed description in comments.
* config/arm/arm.md (reload_outdf): Disable for ARM mode; change
condition from TARGET_32BIT to TARGET_ARM.

Backport r171978 from mainline
2011-04-05  Tom de Vries  

PR target/43920
* config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing
for size.

Backport r171632 from mainline
2011-03-28  Richard Sandiford  

* builtins.c (expand_builtin_memset_args): Use gen_int_mode
instead of GEN_INT.

Backport r171379 from mainline
2011-03-23  Chung-Lin Tang  

PR target/46934
* config/arm/arm.md (casesi): Use the gen_int_mode() function
to subtract lower bound instead of GEN_INT().

Backport r171251 from mainline 
2011-03-21  Daniel Jacobowitz  

* config/arm/unwind-arm.c (__gnu_unwind_pr_common): Correct test
for barrier handlers.

Backport r171096 from mainline
2011-03-17  Chung-Lin Tang  

PR target/43872
* config/arm/arm.c (arm_get_frame_offsets): Adjust early
return condition with !cfun->calls_alloca.


Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/builtins.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.h
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/unwind-arm.c
branches/ARM/embedded-4_6-branch/gcc/fold-const.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr40887.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr42575.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr43698.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr44788.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/sync-1.c

[Bug target/49385] Invalid RTL intstruction for ARM

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385

--- Comment #6 from jye2 at gcc dot gnu.org 2011-09-19 08:13:09 UTC ---
Author: jye2
Date: Mon Sep 19 08:13:02 2011
New Revision: 178955

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178955
Log:
2011-09-19  Jiangning Liu  

Backport r175427 from mainline
2011-06-27  Richard Guenther  

PR tree-optimization/49169
* fold-const.c (get_pointer_modulus_and_residue): Don't rely on
the alignment of function decls.

2011-09-19  Jiangning Liu  

Backport r175208 from mainline
2011-06-20  Ramana Radhakrishnan  

PR target/49385
* config/arm/thumb2.md (*thumb2_movhi_insn): Make sure atleast
one of the operands is a register.

2011-09-19  Jiangning Liu  

Backport r174803 from mainline
2011-06-08  Julian Brown  

* config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI
for double-precision helper functions in hard-float mode if only
single-precision arithmetic is supported in hardware.


Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/thumb2.md
branches/ARM/embedded-4_6-branch/gcc/fold-const.c

[Bug rtl-optimization/49169] ARM: optimisations strip the Thumb/ARM mode bit off function pointers

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49169

--- Comment #6 from jye2 at gcc dot gnu.org 2011-09-19 08:13:09 UTC ---
Author: jye2
Date: Mon Sep 19 08:13:02 2011
New Revision: 178955

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178955
Log:
2011-09-19  Jiangning Liu  

Backport r175427 from mainline
2011-06-27  Richard Guenther  

PR tree-optimization/49169
* fold-const.c (get_pointer_modulus_and_residue): Don't rely on
the alignment of function decls.

2011-09-19  Jiangning Liu  

Backport r175208 from mainline
2011-06-20  Ramana Radhakrishnan  

PR target/49385
* config/arm/thumb2.md (*thumb2_movhi_insn): Make sure atleast
one of the operands is a register.

2011-09-19  Jiangning Liu  

Backport r174803 from mainline
2011-06-08  Julian Brown  

* config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI
for double-precision helper functions in hard-float mode if only
single-precision arithmetic is supported in hardware.


Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/thumb2.md
branches/ARM/embedded-4_6-branch/gcc/fold-const.c

[Bug target/50022] [4.7 regression] "incorrect condition in IT block" when building mozilla code base for ARM

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50022

--- Comment #8 from jye2 at gcc dot gnu.org 2011-09-19 08:35:45 UTC ---
Author: jye2
Date: Mon Sep 19 08:35:37 2011
New Revision: 178960

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178960
Log:
2011-09-19  Jiangning Liu  

Backport r177759 from mainline
2011-08-15  Ramana Radhakrishnan  

PR target/50022
* config/arm/arm.c (output_move_double): Add 2 parameters
to count the number of insns emitted and whether to emit or not.
Use the flag to decide when to emit and count number of instructions
that will be emitted.
Handle case where output_move_double might be called for calculating
lengths with an invalid constant.
(arm_count_output_move_double_insns): Define.
* config/arm/arm-protos.h (arm_count_output_move_double_insns): Declare.
(output_move_double): Adjust prototype.
* config/arm/vfp.md ("*movdi_vfp"): Adjust call to
output_move_double.
("*movdi_vfp_cortexa8"): Likewise and add attribute
for ce_count.
* config/arm/arm.md ("*arm_movdi"): Adjust call to output_move_double.
("*movdf_soft_insn"): Likewise.
* config/arm/cirrus.md ("*cirrus_arm_movdi"): Likewise.
("*cirrus_thumb2_movdi"): Likewise.
("*thumb2_cirrus_movdf_hard_insn"): Likewise.
("*cirrus_movdf_hard_insn"): Likewise.
* config/arm/neon.md (*neon_mov VD): Likewise.
* config/arm/iwmmxt.md ("*iwmmxt_arm_movdi"): Likewise.
("mov_internal VMMX"): Likewise.
* config/arm/fpa.md (*movdf_fpa, *thumb2_movdf_fpa): Likewise.

2011-09-19  Jiangning Liu  

Backport r176867 from mainline
2011-07-28  Ramana Radhakrishnan  

* config/arm/vfp.md ("*movdf_vfp"): Handle the VFP constraints
before the core constraints. Adjust attributes.
(*thumb2_movdf_vfp"): Likewise.

2011-09-19  Jiangning Liu  

Backport r175588 from mainline
2011-06-28  Ramana Radhakrishnan  

* config/arm/vfp.md ("*divsf3_vfp"): Replace '+' constraint modifier
with '=' constraint modifier.
(*divdf3_vfp): Likewise.
("*mulsf3_vfp"): Likewise.
("*muldf3_vfp"): Likewise.
("*mulsf3negsf_vfp"): Likewise.
("*muldf3negdf_vfp"): Likewise.

2011-09-19  Jiangning Liu  

Backport r174894 from mainline
2011-06-10  Ramana Radhakrishnan  
Richard Earnshaw  

* config/arm/arm.c (const_ok_for_op): Check to see
if mvn can be used.
* config/arm/vfp.md (*arm_movdi_vfp): Delete.
(*thumb2_movdi_vfp): Delete.
(*arm_movdi_vfp_cortexa8): Delete.
(*movdi_vfp): Consolidate from *arm_movdi_vfp and *thumb2_movdi_vfp.
(*movdi_vfp_cortexa8): Likewise.

2011-09-19  Jiangning Liu  

Backport r172777 from mainline
2011-04-20  Andrew Stubbs  

* config/arm/arm.c (arm_gen_constant): Move movw support 
(const_ok_for_op): ... to here.

2011-09-19  Jiangning Liu  

Partially backport r171449 from mainline
2011-03-25  Bernd Schmidt  
 Andrew Stubbs  

* config/arm/vfp.md (arm_movdi_vfp): Enable only when not tuning
for Cortex-A8.
(arm_movdi_vfp_cortexa8): New pattern.
* config/arm/arm.md: Move include arm-tune.md up a bit.
(define_attr "arch"): Add "onlya8" and "nota8" values.
(define_attr "arch_enabled"): Handle "onlya8" and "nota8".


Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm-protos.h
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/cirrus.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/fpa.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/iwmmxt.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/neon.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/vfp.md

[Bug target/49437] interrupt return pop sometimes corrupts sp

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49437

--- Comment #4 from jye2 at gcc dot gnu.org 2011-09-19 09:03:35 UTC ---
Author: jye2
Date: Mon Sep 19 09:03:29 2011
New Revision: 178963

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178963
Log:
2011-09-19  Joey Ye  

Backport r177891 from mainline
2011-08-19 Matthew Gretton-Dann  

PR target/49437
* config/arm/arm.c (arm_output_epilogue): Properly handle epilogue
when stack was realigned in interrupt handler prologue.

testsuite:

2011-08-19 Joey Ye  
PR target/49437
* gcc.target/arm/handler-align.c: New test.
* lib/target-supports.exp (check_effective_target_arm_cortex_m):
New Function.

2011-09-19  Joey Ye  

Backport r177890 from mainline
2011-08-19  Joey Ye  

* gcc.c-torture/execute/20101011-1.c (DO_TEST): Skip on ARM.


Added:
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/torture/pr49169.c
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/handler-align.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr46934.c
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/lib/target-supports.exp

[Bug tree-optimization/46021] 3 tree-ssa tests XPASS almost everywhere

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46021

--- Comment #10 from jye2 at gcc dot gnu.org 2011-09-19 09:32:59 UTC ---
Author: jye2
Date: Mon Sep 19 09:32:54 2011
New Revision: 178967

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178967
Log:
2011-09-19  Terry Guo  

Backport r178628 from mainline
2011-09-07  Jiangning Liu  

PR tree-optimization/46021
* gcc.dg/tree-ssa/20040204-1.c: Don't XFAIL on arm*-*-*.

2011-09-19  Terry Guo  

Backport r177594 from mainline
2011-08-09  Ulrich Weigand  

* gcc.dg/pr49948.c: Require pthread effective target.

2011-09-19  Terry Guo  

Backport r176760 from mainline
2011-07-25  Rainer Orth  

* lib/target-supports.exp (check_effective_target_mmap): New proc.

* gcc.dg/vect/pr49038.c: Remove dg-do run.
Use dg-require-effective-target mmap.

2011-09-19  Terry Guo  

Backport r174115 from mainline
2011-05-24  Rainer Orth  

* gcc.dg/vect/pr48172.c: Remove dg-do run.


Modified:
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/pr49948.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/pr48172.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/pr49038.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/lib/target-supports.exp

[Bug testsuite/49443] gcc.dg/vect/vect-peel-3.c and vect-peel-4.c fail on IA64 after testsuite change

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49443

--- Comment #6 from jye2 at gcc dot gnu.org 2011-09-20 09:01:06 UTC ---
Author: jye2
Date: Tue Sep 20 09:00:58 2011
New Revision: 179003

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179003
Log:
2011-09-20  Jiangning Liu  

Backport r175246 from mainline
2011-06-21  Ira Rosen  

PR testsuite/49443
* gcc.dg/vect/vect-peel-3.c: Expect to fail on vect_no_align
targets.
* gcc.dg/vect/vect-peel-4.c: Likewise.

2011-09-20  Jiangning Liu  

Backport r175009 from mainline
2011-06-14  Ira Rosen  

* gcc.dg/vect/vect-16.c: Rename to...
* gcc.dg/vect/no-fast-math-vect16.c: ...this.
* gcc.dg/vect/vect-peel-3.c: Adjust misalignment values
for double-word vectors.
* gcc.dg/vect/vect-peel-4.c: Likewise.
* gcc.dg/vect/bb-slp-10.c: Replace vect_hw_misalign with
vect_element_align.
* gcc.dg/vect/vect.exp: Run no-fast-math-* tests with
-fno-fast-math.


Added:
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/no-fast-math-vect16.c
  (props changed)
  - copied unchanged from r178998,
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/vect-16.c
Removed:
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/vect-16.c
Modified:
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/bb-slp-10.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/vect-peel-3.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/vect-peel-4.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/vect.exp

Propchange:
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/vect/no-fast-math-vect16.c
('svn:mergeinfo' added)

[Bug target/47855] missed cbnz optimization

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47855

--- Comment #4 from jye2 at gcc dot gnu.org 2011-09-22 06:41:49 UTC ---
Author: jye2
Date: Thu Sep 22 06:41:44 2011
New Revision: 179077

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179077
Log:
2011-09-22  Joey Ye  

Backport r178852 from mainline
2011-09-14  Julian Brown  

* config/arm/arm.c (arm_override_options): Add unaligned_access
support.
(arm_file_start): Emit attribute for unaligned access as appropriate.
* config/arm/arm.md (UNSPEC_UNALIGNED_LOAD)
(UNSPEC_UNALIGNED_STORE): Add constants for unspecs.
(insv, extzv): Add unaligned-access support.
(extv): Change to expander. Likewise.
(extzv_t1, extv_regsi): Add helpers.
(unaligned_loadsi, unaligned_loadhis, unaligned_loadhiu)
(unaligned_storesi, unaligned_storehi): New.
(*extv_reg): New (previous extv implementation).
* config/arm/arm.opt (munaligned_access): Add option.
* config/arm/constraints.md (Uw): New constraint.
* expmed.c (store_bit_field_1): Adjust bitfield numbering according
to size of access, not size of unit, when BITS_BIG_ENDIAN !=
BYTES_BIG_ENDIAN. Don't use bitfield accesses for
volatile accesses when -fstrict-volatile-bitfields is in effect.
(extract_bit_field_1): Likewise.

Backport r172697 from mainline
2011-04-19  Wei Guozhi  

PR target/47855
* config/arm/arm-protos.h (thumb1_legitimate_address_p): New prototype.
* config/arm/arm.c (thumb1_legitimate_address_p): Remove the static
linkage.
* config/arm/constraints.md (Uu): New constraint.
* config/arm/arm.md (*arm_movqi_insn): Compute attr "length".

Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm-protos.h
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.opt
branches/ARM/embedded-4_6-branch/gcc/config/arm/constraints.md
branches/ARM/embedded-4_6-branch/gcc/expmed.c

[Bug rtl-optimization/38644] [4.4/4.5/4.6/4.7 Regression] Optimization flag -O1 -fschedule-insns2 causes wrong code

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38644

--- Comment #59 from jye2 at gcc dot gnu.org 2011-11-04 16:50:11 UTC ---
Author: jye2
Date: Fri Nov  4 16:50:04 2011
New Revision: 180964

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=180964
Log:
2011-11-04  Jiangning Liu  

PR rtl-optimization/38644
* config/arm/arm.c (thumb1_expand_epilogue): Add memory barrier
for epilogue having stack adjustment.

testcase:
* gcc.target/arm/stack-red-zone.c: New.

Added:
trunk/gcc/testsuite/gcc.target/arm/stack-red-zone.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/arm/arm.c
trunk/gcc/testsuite/ChangeLog

[Bug target/51408] Miscompilation in arm.md:*minmax_arithsi

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51408

--- Comment #6 from jye2 at gcc dot gnu.org 2012-06-08 06:58:32 UTC ---
Author: jye2
Date: Fri Jun  8 06:58:25 2012
New Revision: 188327

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188327
Log:
Backport mainline r179607, r179979, r179980, r181416, r182014
2012-06-08  Joey Ye  

Backport r182014 from mainline.
2011-12-05  Kazu Hirata  

PR target/51408
* config/arm/arm.md (*minmax_arithsi): Always require the else
clause in the MINUS case.

Backport r181416 from mainline.
2011-11-16  Richard Earnshaw  
Bernd Schmidt 
Sebastian Huber 

PR target/49641
* config/arm/arm.c (store_multiple_sequence): Avoid cases where
the base reg is stored iff compiling for Thumb1.

Backport r179980 from mainline.
2011-10-14  David Alan Gilbert  

PR target/48126
* config/arm/arm.c (arm_output_sync_loop): Move label before barrier.

Backport r179979 from mainline.
2011-10-14  David Alan Gilbert  

* config/arm/arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1.

Backport r179607 from mainline.
2011-10-06  Bernd Schmidt  

PR target/49049
* config/arm/arm.md (arm_subsi3_insn): Lose the last alternative.

Testsuites:
Backport r182014 from mainline
2011-12-05  Kazu Hirata  

PR target/51408
* gcc.dg/pr51408.c: New.

Backport r181416 from mainline
2011-11-16  Richard Earnshaw  
Bernd Schmidt 
Sebastian Huber 

PR target/49641
* gcc.target/arm/pr49641.c: New test.

Backport r179607 from mainline
2011-10-06  Bernd Schmidt  

PR target/49049
* gcc.c-torture/compile/pr49049.c: New test.


Added:
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.c-torture/compile/pr49049.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/pr51408.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr49641.c
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.h
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm

[Bug target/48126] arm_output_sync_loop: misplaced memory barrier

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48126

--- Comment #12 from jye2 at gcc dot gnu.org 2012-06-08 06:58:32 UTC ---
Author: jye2
Date: Fri Jun  8 06:58:25 2012
New Revision: 188327

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188327
Log:
Backport mainline r179607, r179979, r179980, r181416, r182014
2012-06-08  Joey Ye  

Backport r182014 from mainline.
2011-12-05  Kazu Hirata  

PR target/51408
* config/arm/arm.md (*minmax_arithsi): Always require the else
clause in the MINUS case.

Backport r181416 from mainline.
2011-11-16  Richard Earnshaw  
Bernd Schmidt 
Sebastian Huber 

PR target/49641
* config/arm/arm.c (store_multiple_sequence): Avoid cases where
the base reg is stored iff compiling for Thumb1.

Backport r179980 from mainline.
2011-10-14  David Alan Gilbert  

PR target/48126
* config/arm/arm.c (arm_output_sync_loop): Move label before barrier.

Backport r179979 from mainline.
2011-10-14  David Alan Gilbert  

* config/arm/arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1.

Backport r179607 from mainline.
2011-10-06  Bernd Schmidt  

PR target/49049
* config/arm/arm.md (arm_subsi3_insn): Lose the last alternative.

Testsuites:
Backport r182014 from mainline
2011-12-05  Kazu Hirata  

PR target/51408
* gcc.dg/pr51408.c: New.

Backport r181416 from mainline
2011-11-16  Richard Earnshaw  
Bernd Schmidt 
Sebastian Huber 

PR target/49641
* gcc.target/arm/pr49641.c: New test.

Backport r179607 from mainline
2011-10-06  Bernd Schmidt  

PR target/49049
* gcc.c-torture/compile/pr49049.c: New test.


Added:
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.c-torture/compile/pr49049.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/pr51408.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr49641.c
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.h
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm

[Bug target/51915] [4.7 Regression] ICE in output_move_double

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51915

--- Comment #6 from jye2 at gcc dot gnu.org 2012-06-08 08:58:01 UTC ---
Author: jye2
Date: Fri Jun  8 08:57:53 2012
New Revision: 188332

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188332
Log:
2012-06-08  Joey Ye  

Backport r184442 from mainline
2012-02-21  Richard Earnshaw  

PR target/52294
* thumb2.md (thumb2_shiftsi3_short): Split register and 
immediate shifts.  For register shifts tie operands 0 and 1.
(peephole2 for above): Check that register-controlled shifts
have suitably tied operands.

Backport r183756 from mainline
2012-01-31  Matthew Gretton-Dann  

* config/arm/thumb2.md (thumb2_mov_notscc): Use MVN for true
condition.

Backport r183349 from mainline
2012-01-20  Jakub Jelinek  

PR target/51915
* config/arm/arm.c (arm_count_output_move_double_insns): Call
output_move_double on a copy of operands array.

Backport r183095 from mainline
2012-01-11  Matthew Gretton-Dann  

* config/arm/arm.md (mov_notscc): Use MVN for false condition.

Backport r182628 from mainline
2011-12-21  Richard Earnshaw  

PR target/51643
* arm.c (arm_function_ok_for_sibcall): Use DECL_WEAK in previous
change.

Backport r182621 from mainline
2011-12-21  Richard Earnshaw  

PR target/51643
* arm.c (arm_function_ok_for_sibcall): Don't try to tailcall a
weak function on bare-metal EABI targets.

Testsuite:
Backport r183349 from mainline
2012-01-20  Jakub Jelinek  

PR target/51915
* gcc.target/arm/pr51915.c: New test.

Backport r183095 from mainline
2012-01-11  Matthew Gretton-Dann  

* gcc.c-torture/execute/20120110-1.c: New testcase.

Backport r182621 from mainline
2011-12-21  Richard Earnshaw  

PR target/51643
* gcc.target/arm/sibcall-2.c: New test.


Added:
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.c-torture/execute/20120111-1.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr51915.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/sibcall-2.c
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/thumb2.md
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm

[Bug target/52294] [4.7 Regression] [ARM Thumb] generated asm code produces "branch out of range" error in gas with -Os -mcpu=cortex-a9

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52294

--- Comment #12 from jye2 at gcc dot gnu.org 2012-06-08 08:57:59 UTC ---
Author: jye2
Date: Fri Jun  8 08:57:53 2012
New Revision: 188332

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188332
Log:
2012-06-08  Joey Ye  

Backport r184442 from mainline
2012-02-21  Richard Earnshaw  

PR target/52294
* thumb2.md (thumb2_shiftsi3_short): Split register and 
immediate shifts.  For register shifts tie operands 0 and 1.
(peephole2 for above): Check that register-controlled shifts
have suitably tied operands.

Backport r183756 from mainline
2012-01-31  Matthew Gretton-Dann  

* config/arm/thumb2.md (thumb2_mov_notscc): Use MVN for true
condition.

Backport r183349 from mainline
2012-01-20  Jakub Jelinek  

PR target/51915
* config/arm/arm.c (arm_count_output_move_double_insns): Call
output_move_double on a copy of operands array.

Backport r183095 from mainline
2012-01-11  Matthew Gretton-Dann  

* config/arm/arm.md (mov_notscc): Use MVN for false condition.

Backport r182628 from mainline
2011-12-21  Richard Earnshaw  

PR target/51643
* arm.c (arm_function_ok_for_sibcall): Use DECL_WEAK in previous
change.

Backport r182621 from mainline
2011-12-21  Richard Earnshaw  

PR target/51643
* arm.c (arm_function_ok_for_sibcall): Don't try to tailcall a
weak function on bare-metal EABI targets.

Testsuite:
Backport r183349 from mainline
2012-01-20  Jakub Jelinek  

PR target/51915
* gcc.target/arm/pr51915.c: New test.

Backport r183095 from mainline
2012-01-11  Matthew Gretton-Dann  

* gcc.c-torture/execute/20120110-1.c: New testcase.

Backport r182621 from mainline
2011-12-21  Richard Earnshaw  

PR target/51643
* gcc.target/arm/sibcall-2.c: New test.


Added:
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.c-torture/execute/20120111-1.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr51915.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/sibcall-2.c
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/thumb2.md
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm

[Bug target/51643] Incorrect code produced for tail-call of weak function with -O2/-O3 option

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51643

--- Comment #16 from jye2 at gcc dot gnu.org 2012-06-08 08:58:02 UTC ---
Author: jye2
Date: Fri Jun  8 08:57:53 2012
New Revision: 188332

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188332
Log:
2012-06-08  Joey Ye  

Backport r184442 from mainline
2012-02-21  Richard Earnshaw  

PR target/52294
* thumb2.md (thumb2_shiftsi3_short): Split register and 
immediate shifts.  For register shifts tie operands 0 and 1.
(peephole2 for above): Check that register-controlled shifts
have suitably tied operands.

Backport r183756 from mainline
2012-01-31  Matthew Gretton-Dann  

* config/arm/thumb2.md (thumb2_mov_notscc): Use MVN for true
condition.

Backport r183349 from mainline
2012-01-20  Jakub Jelinek  

PR target/51915
* config/arm/arm.c (arm_count_output_move_double_insns): Call
output_move_double on a copy of operands array.

Backport r183095 from mainline
2012-01-11  Matthew Gretton-Dann  

* config/arm/arm.md (mov_notscc): Use MVN for false condition.

Backport r182628 from mainline
2011-12-21  Richard Earnshaw  

PR target/51643
* arm.c (arm_function_ok_for_sibcall): Use DECL_WEAK in previous
change.

Backport r182621 from mainline
2011-12-21  Richard Earnshaw  

PR target/51643
* arm.c (arm_function_ok_for_sibcall): Don't try to tailcall a
weak function on bare-metal EABI targets.

Testsuite:
Backport r183349 from mainline
2012-01-20  Jakub Jelinek  

PR target/51915
* gcc.target/arm/pr51915.c: New test.

Backport r183095 from mainline
2012-01-11  Matthew Gretton-Dann  

* gcc.c-torture/execute/20120110-1.c: New testcase.

Backport r182621 from mainline
2011-12-21  Richard Earnshaw  

PR target/51643
* gcc.target/arm/sibcall-2.c: New test.


Added:
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.c-torture/execute/20120111-1.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr51915.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/sibcall-2.c
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
branches/ARM/embedded-4_6-branch/gcc/config/arm/thumb2.md
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm

[Bug bootstrap/51969] [4.6 regression] trunk gcc unable to build gcc 4.6

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51969

--- Comment #8 from jye2 at gcc dot gnu.org 2012-06-11 09:10:17 UTC ---
Author: jye2
Date: Mon Jun 11 09:10:07 2012
New Revision: 188381

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188381
Log:
2012-06-11  Joey Ye  

Backport r184089,184180 from mainline
2012-02-10  Jan Hubicka  

PR middle-end/48600
* predict.c (predict_paths_for_bb): Prevent looping.
(predict_paths_leading_to_edge, predict_paths_leading_to): Update.

2012-02-13  Jan Hubicka  

PR middle-end/52214
* predict.c (predict_paths_for_bb): Fix thinko in prevoius patch.


Backport partly r181172 from mainline
2011-11-08  Michael Matz  

PR bootstrap/51969
* gengtype.c (write_field_root): Avoid out-of-scope access of newv.

testsuite:

Backport r184089 from mainline
2012-02-10  Jan Hubicka  

PR middle-end/48600
* g++.dg/torture/pr48600.C: New testcase.

Added:
branches/ARM/embedded-4_6-branch/gcc/testsuite/c-c++-common/pr52181.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/g++.dg/torture/pr48600.C
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/gengtype.c
branches/ARM/embedded-4_6-branch/gcc/predict.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm

[Bug middle-end/52214] [4.7 Regression] FAIL: g++.dg/tree-ssa/pr44706.C -std=gnu++* scan-tree-dump-not fnsplit "Splitting function"

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52214

--- Comment #5 from jye2 at gcc dot gnu.org 2012-06-11 09:10:16 UTC ---
Author: jye2
Date: Mon Jun 11 09:10:07 2012
New Revision: 188381

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188381
Log:
2012-06-11  Joey Ye  

Backport r184089,184180 from mainline
2012-02-10  Jan Hubicka  

PR middle-end/48600
* predict.c (predict_paths_for_bb): Prevent looping.
(predict_paths_leading_to_edge, predict_paths_leading_to): Update.

2012-02-13  Jan Hubicka  

PR middle-end/52214
* predict.c (predict_paths_for_bb): Fix thinko in prevoius patch.


Backport partly r181172 from mainline
2011-11-08  Michael Matz  

PR bootstrap/51969
* gengtype.c (write_field_root): Avoid out-of-scope access of newv.

testsuite:

Backport r184089 from mainline
2012-02-10  Jan Hubicka  

PR middle-end/48600
* g++.dg/torture/pr48600.C: New testcase.

Added:
branches/ARM/embedded-4_6-branch/gcc/testsuite/c-c++-common/pr52181.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/g++.dg/torture/pr48600.C
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/gengtype.c
branches/ARM/embedded-4_6-branch/gcc/predict.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm

[Bug middle-end/48600] [4.6 Regression] ICE when using cold attribute

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48600

--- Comment #22 from jye2 at gcc dot gnu.org 2012-06-11 09:10:14 UTC ---
Author: jye2
Date: Mon Jun 11 09:10:07 2012
New Revision: 188381

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188381
Log:
2012-06-11  Joey Ye  

Backport r184089,184180 from mainline
2012-02-10  Jan Hubicka  

PR middle-end/48600
* predict.c (predict_paths_for_bb): Prevent looping.
(predict_paths_leading_to_edge, predict_paths_leading_to): Update.

2012-02-13  Jan Hubicka  

PR middle-end/52214
* predict.c (predict_paths_for_bb): Fix thinko in prevoius patch.


Backport partly r181172 from mainline
2011-11-08  Michael Matz  

PR bootstrap/51969
* gengtype.c (write_field_root): Avoid out-of-scope access of newv.

testsuite:

Backport r184089 from mainline
2012-02-10  Jan Hubicka  

PR middle-end/48600
* g++.dg/torture/pr48600.C: New testcase.

Added:
branches/ARM/embedded-4_6-branch/gcc/testsuite/c-c++-common/pr52181.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/g++.dg/torture/pr48600.C
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/gengtype.c
branches/ARM/embedded-4_6-branch/gcc/predict.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm

[Bug middle-end/51768] [4.5 Regression] ICE with invalid asm goto

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51768

--- Comment #7 from jye2 at gcc dot gnu.org 2012-06-12 03:49:37 UTC ---
Author: jye2
Date: Tue Jun 12 03:49:33 2012
New Revision: 188419

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188419
Log:
2012-06-12  Joey Ye  

Backport r182921 from mainline
2012-01-05  Jakub Jelinek  

PR middle-end/51768
* stmt.c (check_unique_operand_names): Don't ICE during error
reporting if i is from labels chain.

testsuite:

Backport r182921 from mainline
2012-01-05  Jakub Jelinek  

PR middle-end/51768
* c-c++-common/pr51768.c: New test.

Added:
branches/ARM/embedded-4_6-branch/gcc/testsuite/c-c++-common/pr51768.c
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/stmt.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm

[Bug target/48126] arm_output_sync_loop: misplaced memory barrier

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48126

--- Comment #13 from jye2 at gcc dot gnu.org 2012-06-19 03:01:16 UTC ---
Author: jye2
Date: Tue Jun 19 03:01:10 2012
New Revision: 188766

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188766
Log:
2012-06-18  Joey Ye  

Backported from mainline
2011-10-14  David Alan Gilbert  

PR target/48126
* config/arm/arm.c (arm_output_sync_loop): Move label before barrier.

Modified:
branches/gcc-4_6-branch/gcc/ChangeLog
branches/gcc-4_6-branch/gcc/config/arm/arm.c

[Bug middle-end/51200] Wrong code sequence to store restrict volatile bitfield

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51200

--- Comment #7 from jye2 at gcc dot gnu.org 2012-03-29 02:15:37 UTC ---
Author: jye2
Date: Thu Mar 29 02:15:29 2012
New Revision: 185944

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=185944
Log:
2012-03-28  Joey Ye  

Backported from mainline
2011-12-20  Bernd Schmidt  

PR middle-end/51200
* expr.c (store_field): Avoid a direct store if the mode is larger
than the size of the bit field.
* stor-layout.c (layout_decl): If flag_strict_volatile_bitfields,
treat non-volatile bit fields like volatile ones.
* toplev.c (process_options): Disallow combination of
-fstrict-volatile-bitfields and ABI versions less than 2.
* config/arm/arm.c (arm_option_override): Don't enable
flag_strict_volatile_bitfields if the ABI version is less than 2.
* config/h8300/h8300.c (h8300_option_override): Likewise.
* config/rx/rx.c (rx_option_override): Likewise.
* config/m32c/m32c.c (m32c_option_override): Likewise.
* config/sh/sh.c (sh_option_override): Likewise.

2011-12-22  Joey Ye  

* toplev.c (process_options): Fix typo.

testcases:

Backported from mainline
2011-12-20  Bernd Schmidt  

PR middle-end/51200
* gcc.target/arm/volatile-bitfields-4.c: New test.
* c-c++-common/abi-bf.c: New test.

2011-12-26  Joey Ye  

PR middle-end/51200
* gcc.dg/volatile-bitfields-2.c: New test.


Added:
branches/gcc-4_6-branch/gcc/testsuite/c-c++-common/abi-bf.c
branches/gcc-4_6-branch/gcc/testsuite/gcc.dg/volatile-bitfields-2.c
branches/gcc-4_6-branch/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
Modified:
branches/gcc-4_6-branch/gcc/ChangeLog
branches/gcc-4_6-branch/gcc/config/arm/arm.c
branches/gcc-4_6-branch/gcc/config/h8300/h8300.c
branches/gcc-4_6-branch/gcc/config/m32c/m32c.c
branches/gcc-4_6-branch/gcc/config/rx/rx.c
branches/gcc-4_6-branch/gcc/config/sh/sh.c
branches/gcc-4_6-branch/gcc/expr.c
branches/gcc-4_6-branch/gcc/stor-layout.c
branches/gcc-4_6-branch/gcc/testsuite/ChangeLog
branches/gcc-4_6-branch/gcc/toplev.c

[Bug tree-optimization/43491] Unnecessary temporary for global register variable

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43491

--- Comment #6 from jye2 at gcc dot gnu.org 2011-12-23 05:43:17 UTC ---
Author: jye2
Date: Fri Dec 23 05:43:09 2011
New Revision: 182650

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=182650
Log:
2011-12-22  Bin Cheng  
Richard Guenther  

PR tree-optimization/43491
* tree-ssa-pre.c (eliminate): Don't replace global register
variable when it is the RHS of a single assign.

testsuite:
* gcc.dg/tree-ssa/pr43491.c: New test.


Added:
trunk/gcc/testsuite/gcc.dg/tree-ssa/pr43491.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/testsuite/ChangeLog
trunk/gcc/tree-ssa-pre.c

[Bug middle-end/51200] Wrong code sequence to store restrict volatile bitfield

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51200

--- Comment #5 from jye2 at gcc dot gnu.org 2011-12-26 08:43:51 UTC ---
Author: jye2
Date: Mon Dec 26 08:43:48 2011
New Revision: 182685

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=182685
Log:
2011-12-26  Joey Ye  

PR middle-end/51200
* gcc.dg/volatile-bitfields-2.c: New test.

Added:
trunk/gcc/testsuite/gcc.dg/volatile-bitfields-2.c
Modified:
trunk/gcc/testsuite/ChangeLog

[Bug middle-end/51200] Wrong code sequence to store restrict volatile bitfield

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51200

--- Comment #6 from jye2 at gcc dot gnu.org 2011-12-27 02:27:01 UTC ---
Author: jye2
Date: Tue Dec 27 02:26:57 2011
New Revision: 182691

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=182691
Log:
2011-12-26  Joey Ye  
Revert original fix and backport r182545, 182649 from mainline

Revert:
2011-11-18  Joey Ye  

Port Bernd's fix to volatile bitfields
2010-12-02  Bernd Schmidt  

* expr.c (store_field): Avoid a direct store if the mode is larger
than the size of the bit field.
* stor-layout.c (layout_decl): If flag_strict_volatile_bitfields,
treat non-volatile bit fields like volatile ones.
* toplev.c (process_options): Disallow combination of
-fstrict-volatile-bitfields and ABI versions less than 2.
* config/arm/arm.c (arm_option_override): Don't enable
flag_strict_volatile_bitfields if the ABI version is less than 2.

Backport:
2011-12-20  Bernd Schmidt  

PR middle-end/51200
* expr.c (store_field): Avoid a direct store if the mode is larger
than the size of the bit field.
* stor-layout.c (layout_decl): If flag_strict_volatile_bitfields,
treat non-volatile bit fields like volatile ones.
* toplev.c (process_options): Disallow combination of
-fstrict-volatile-bitfields and ABI versions less than 2.
* config/arm/arm.c (arm_option_override): Don't enable
flag_strict_volatile_bitfields if the ABI version is less than 2.
* config/h8300/h8300.c (h8300_option_override): Likewise.
* config/rx/rx.c (rx_option_override): Likewise.
* config/m32c/m32c.c (m32c_option_override): Likewise.
* config/sh/sh.c (sh_option_override): Likewise.

2011-12-22  Joey Ye  

* toplev.c (process_options): Fix typo.

testsute
2011-12-26  Joey Ye  

Revert original fix and backport r182545, r182649 from mainline

Revert:
2011-11-23  Joey Ye  

Apply restrict volatile bitfield test case.
2011-11-23  Joey Ye  
* g++.dg/abi/bitfield12.C: Add option -fno-strict-volatile-bitfields.

Backport:
2011-12-20  Bernd Schmidt  

PR middle-end/51200
* gcc.target/arm/volatile-bitfields-4.c: New test.
* c-c++-common/abi-bf.c: New test.

2011-12-26  Joey Ye  

PR middle-end/51200
* gcc.dg/volatile-bitfields-2.c: New test.


Added:
branches/ARM/embedded-4_6-branch/gcc/testsuite/c-c++-common/abi-bf.c
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.dg/volatile-bitfields-2.c
   
branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
Modified:
branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-4_6-branch/gcc/config/h8300/h8300.c
branches/ARM/embedded-4_6-branch/gcc/config/m32c/m32c.c
branches/ARM/embedded-4_6-branch/gcc/config/rx/rx.c
branches/ARM/embedded-4_6-branch/gcc/config/sh/sh.c
branches/ARM/embedded-4_6-branch/gcc/testsuite/ChangeLog.arm
branches/ARM/embedded-4_6-branch/gcc/testsuite/g++.dg/abi/bitfield12.C
branches/ARM/embedded-4_6-branch/gcc/toplev.c

[Bug target/51835] ARM EABI violation when passing arguments to helper floating functions like __aeabi_d2iz

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51835

--- Comment #3 from jye2 at gcc dot gnu.org 2012-01-30 16:59:21 UTC ---
Author: jye2
Date: Mon Jan 30 16:59:14 2012
New Revision: 183733

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=183733
Log:
2012-01-30  Bin Cheng  

PR target/51835
* config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI
for __aeabi_d2iz/__aeabi_d2uiz with hard-float.

testcases:
PR target/51835
* gcc.target/arm/pr51835.c: New testcase.


Added:
trunk/gcc/testsuite/gcc.target/arm/pr51835.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/arm/arm.c
trunk/gcc/testsuite/ChangeLog

[Bug target/51835] ARM EABI violation when passing arguments to helper floating functions like __aeabi_d2iz

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51835

--- Comment #4 from jye2 at gcc dot gnu.org 2012-01-30 17:22:08 UTC ---
Author: jye2
Date: Mon Jan 30 17:22:04 2012
New Revision: 183734

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=183734
Log:
2012-01-30  Bin Cheng  

PR target/51835
* config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI
for __aeabi_d2iz/__aeabi_d2uiz with hard-float.

testcases:
PR target/51835
* gcc.target/arm/pr51835.c: New testcase.


Added:
branches/gcc-4_6-branch/gcc/testsuite/gcc.target/arm/pr51835.c
Modified:
branches/gcc-4_6-branch/gcc/ChangeLog
branches/gcc-4_6-branch/gcc/config/arm/arm.c
branches/gcc-4_6-branch/gcc/testsuite/ChangeLog

[Bug tree-optimization/80155] [7/8/9/10 regression] Performance regression with code hoisting enabled

[jye2 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80155

--- Comment #46 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu Oct 10 10:29:47 2019
New Revision: 276797

URL: https://gcc.gnu.org/viewcvs?rev=276797&root=gcc&view=rev
Log:
Pickup patch rejected in trunk.
2019-09-11  Wilco Dijkstra  


PR tree-optimization/80155
* common/config/arm/arm-common.c (arm_option_optimization_table):
Enable -fcode-hoisting with -Os.

Added:
branches/ARM/arm-9-branch/gcc/ChangeLog.arm
Modified:
branches/ARM/arm-9-branch/gcc/common/config/arm/arm-common.c

[Bug middle-end/39246] FAIL: gcc.dg/uninit-13.c

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39246

--- Comment #35 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu May  8 01:19:11 2014
New Revision: 210198

URL: http://gcc.gnu.org/viewcvs?rev=210198&root=gcc&view=rev
Log:
2014-05-07  Thomas Preud'homme  

PR middle-end/39246
* tree-complex.c (expand_complex_move): Keep line info when expanding
complex move.
* tree-ssa-uninit.c (warn_uninit): New argument. Ignore assignment 
of complex expression. Use new argument to display correct location 
for values coming from phi statement.
(warn_uninitialized_vars): Adapt to new signature of warn_uninit.
(warn_uninitialized_phi): Pass location of phi argument to 
warn_uninit.
* tree-ssa.c (ssa_undefined_value_p): For SSA_NAME initialized by a
COMPLEX_EXPR, recurse on each part of the COMPLEX_EXPR.

testsuite:

* gcc.dg/uninit-13.c: Move warning on the actual source line where
the uninitialized complex is used.
* gcc.dg/uninit-17.c: New test to check partial initialization of
complex with branches.
* gcc.dg/uninit-17-O0.c: Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/testsuite/ChangeLog

[Bug middle-end/39246] FAIL: gcc.dg/uninit-13.c

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39246

--- Comment #36 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu May  8 01:20:17 2014
New Revision: 210199

URL: http://gcc.gnu.org/viewcvs?rev=210199&root=gcc&view=rev
Log:
2014-05-07  Thomas Preud'homme  

PR middle-end/39246
* tree-complex.c (expand_complex_move): Keep line info when expanding
complex move.
* tree-ssa-uninit.c (warn_uninit): New argument. Ignore assignment 
of complex expression. Use new argument to display correct location 
for values coming from phi statement.
(warn_uninitialized_vars): Adapt to new signature of warn_uninit.
(warn_uninitialized_phi): Pass location of phi argument to 
warn_uninit.
* tree-ssa.c (ssa_undefined_value_p): For SSA_NAME initialized by a
COMPLEX_EXPR, recurse on each part of the COMPLEX_EXPR.

testsuite:

* gcc.dg/uninit-13.c: Move warning on the actual source line where
the uninitialized complex is used.
* gcc.dg/uninit-17.c: New test to check partial initialization of
complex with branches.
* gcc.dg/uninit-17-O0.c: Likewise.

Modified:
trunk/gcc/testsuite/gcc.dg/uninit-13.c
trunk/gcc/tree-complex.c
trunk/gcc/tree-ssa-uninit.c
trunk/gcc/tree-ssa.c

[Bug middle-end/39246] FAIL: gcc.dg/uninit-13.c

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39246

--- Comment #37 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu May  8 01:23:01 2014
New Revision: 210200

URL: http://gcc.gnu.org/viewcvs?rev=210200&root=gcc&view=rev
Log:
2014-05-07  Thomas Preud'homme  

PR middle-end/39246
* tree-complex.c (expand_complex_move): Keep line info when expanding
complex move.
* tree-ssa-uninit.c (warn_uninit): New argument. Ignore assignment 
of complex expression. Use new argument to display correct location 
for values coming from phi statement.
(warn_uninitialized_vars): Adapt to new signature of warn_uninit.
(warn_uninitialized_phi): Pass location of phi argument to 
warn_uninit.
* tree-ssa.c (ssa_undefined_value_p): For SSA_NAME initialized by a
COMPLEX_EXPR, recurse on each part of the COMPLEX_EXPR.

testsuite:

* gcc.dg/uninit-13.c: Move warning on the actual source line where
the uninitialized complex is used.
* gcc.dg/uninit-17.c: New test to check partial initialization of
complex with branches.
* gcc.dg/uninit-17-O0.c: Likewise.

Added:
trunk/gcc/testsuite/gcc.dg/uninit-17-O0.c
trunk/gcc/testsuite/gcc.dg/uninit-17.c

[Bug middle-end/48784] #pragma pack(1) + -fstrict-volatile-bitfields = bad codegen

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48784

--- Comment #7 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu Feb 27 07:28:06 2014
New Revision: 208195

URL: http://gcc.gnu.org/viewcvs?rev=208195&root=gcc&view=rev
Log:
2014-02-27  Joey Ye  

Backport mainline strict-volatile-bitfields fixes
2013-09-28  Sandra Loosemore  

gcc/
* expr.h (extract_bit_field): Remove packedp parameter.
* expmed.c (extract_fixed_bit_field): Remove packedp parameter
from forward declaration.
(store_split_bit_field): Remove packedp arg from calls to
extract_fixed_bit_field.
(extract_bit_field_1): Remove packedp parameter and packedp
argument from recursive calls and calls to extract_fixed_bit_field.
(extract_bit_field): Remove packedp parameter and corresponding
arg to extract_bit_field_1.
(extract_fixed_bit_field): Remove packedp parameter.  Remove code
to issue warnings.
(extract_split_bit_field): Remove packedp arg from call to
extract_fixed_bit_field.
* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
(copy_blkmode_from_reg): Likewise.
(copy_blkmode_to_reg): Likewise.
(read_complex_part): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
to extract_bit_field.
* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust
call to extract_bit_field.
* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust
call to extract_bit_field.
* doc/invoke.texi (Code Gen Options): Remove mention of warnings
and special packedp behavior from -fstrict-volatile-bitfields
documentation.

2013-12-11  Bernd Edlinger  

* expr.c (expand_assignment): Remove dependency on 
flag_strict_volatile_bitfields. Always set the memory
access mode.
(expand_expr_real_1): Likewise.

2013-12-11  Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997

gcc/
* expmed.c (strict_volatile_bitfield_p): New function.
(store_bit_field_1): Don't special-case strict volatile
bitfields here.
(store_bit_field): Handle strict volatile bitfields here instead.
(store_fixed_bit_field): Don't special-case strict volatile
bitfields here.
(extract_bit_field_1): Don't special-case strict volatile
bitfields here.
(extract_bit_field): Handle strict volatile bitfields here instead.
(extract_fixed_bit_field): Don't special-case strict volatile
bitfields here.  Simplify surrounding code to resemble that in
store_fixed_bit_field.
* doc/invoke.texi (Code Gen Options): Update
-fstrict-volatile-bitfields description.

gcc/testsuite/
* gcc.dg/pr23623.c: New test.
* gcc.dg/pr48784-1.c: New test.
* gcc.dg/pr48784-2.c: New test.
* gcc.dg/pr56341-1.c: New test.
* gcc.dg/pr56341-2.c: New test.
* gcc.dg/pr56997-1.c: New test.
* gcc.dg/pr56997-2.c: New test.
* gcc.dg/pr56997-3.c: New test.

2013-12-11  Bernd Edlinger  
 Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997
* expmed.c (strict_volatile_bitfield_p): Add bitregion_start
and bitregion_end parameters.  Test for compliance with C++
memory model.
(store_bit_field): Adjust call to strict_volatile_bitfield_p.
Add fallback logic for cases where -fstrict-volatile-bitfields
is supposed to apply, but cannot.
(extract_bit_field): Likewise. Use narrow_bit_field_mem and
extract_fixed_bit_field_1 to do the extraction.
(extract_fixed_bit_field): Revert to previous mode selection
algorithm.
Call extract_fixed_bit_field_1 to do the real work.
(extract_fixed_bit_field_1): New function.

testsuite:
* gcc.dg/pr23623.c: Update to test interaction with C++
memory model.

2013-12-11  Bernd Edlinger  

PR middle-end/59134
* expmed.c (store_bit_field): Use narrow_bit_field_mem and
store_fixed_bit_field_1 for -fstrict-volatile-bitfields.
(store_fixed_bit_field): Split up.  Call store_fixed_bit_field_1
to do the real work.
(store_fixed_bit_field_1): New function. 
(store_split_bit_field): Limit the unit size to the memory mode
size,
to prevent recursion.

testsuite:
* gcc.c-torture/compile/pr59134.c: New test.
* gnat.dg/misaligned_volatile.adb: New test.

Added:
   
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.c-torture/compile/pr59134.c
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.dg/pr23623.c
 

[Bug middle-end/56341] GCC produces unaligned data access

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56341

--- Comment #18 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu Feb 27 07:28:06 2014
New Revision: 208195

URL: http://gcc.gnu.org/viewcvs?rev=208195&root=gcc&view=rev
Log:
2014-02-27  Joey Ye  

Backport mainline strict-volatile-bitfields fixes
2013-09-28  Sandra Loosemore  

gcc/
* expr.h (extract_bit_field): Remove packedp parameter.
* expmed.c (extract_fixed_bit_field): Remove packedp parameter
from forward declaration.
(store_split_bit_field): Remove packedp arg from calls to
extract_fixed_bit_field.
(extract_bit_field_1): Remove packedp parameter and packedp
argument from recursive calls and calls to extract_fixed_bit_field.
(extract_bit_field): Remove packedp parameter and corresponding
arg to extract_bit_field_1.
(extract_fixed_bit_field): Remove packedp parameter.  Remove code
to issue warnings.
(extract_split_bit_field): Remove packedp arg from call to
extract_fixed_bit_field.
* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
(copy_blkmode_from_reg): Likewise.
(copy_blkmode_to_reg): Likewise.
(read_complex_part): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
to extract_bit_field.
* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust
call to extract_bit_field.
* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust
call to extract_bit_field.
* doc/invoke.texi (Code Gen Options): Remove mention of warnings
and special packedp behavior from -fstrict-volatile-bitfields
documentation.

2013-12-11  Bernd Edlinger  

* expr.c (expand_assignment): Remove dependency on 
flag_strict_volatile_bitfields. Always set the memory
access mode.
(expand_expr_real_1): Likewise.

2013-12-11  Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997

gcc/
* expmed.c (strict_volatile_bitfield_p): New function.
(store_bit_field_1): Don't special-case strict volatile
bitfields here.
(store_bit_field): Handle strict volatile bitfields here instead.
(store_fixed_bit_field): Don't special-case strict volatile
bitfields here.
(extract_bit_field_1): Don't special-case strict volatile
bitfields here.
(extract_bit_field): Handle strict volatile bitfields here instead.
(extract_fixed_bit_field): Don't special-case strict volatile
bitfields here.  Simplify surrounding code to resemble that in
store_fixed_bit_field.
* doc/invoke.texi (Code Gen Options): Update
-fstrict-volatile-bitfields description.

gcc/testsuite/
* gcc.dg/pr23623.c: New test.
* gcc.dg/pr48784-1.c: New test.
* gcc.dg/pr48784-2.c: New test.
* gcc.dg/pr56341-1.c: New test.
* gcc.dg/pr56341-2.c: New test.
* gcc.dg/pr56997-1.c: New test.
* gcc.dg/pr56997-2.c: New test.
* gcc.dg/pr56997-3.c: New test.

2013-12-11  Bernd Edlinger  
 Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997
* expmed.c (strict_volatile_bitfield_p): Add bitregion_start
and bitregion_end parameters.  Test for compliance with C++
memory model.
(store_bit_field): Adjust call to strict_volatile_bitfield_p.
Add fallback logic for cases where -fstrict-volatile-bitfields
is supposed to apply, but cannot.
(extract_bit_field): Likewise. Use narrow_bit_field_mem and
extract_fixed_bit_field_1 to do the extraction.
(extract_fixed_bit_field): Revert to previous mode selection
algorithm.
Call extract_fixed_bit_field_1 to do the real work.
(extract_fixed_bit_field_1): New function.

testsuite:
* gcc.dg/pr23623.c: Update to test interaction with C++
memory model.

2013-12-11  Bernd Edlinger  

PR middle-end/59134
* expmed.c (store_bit_field): Use narrow_bit_field_mem and
store_fixed_bit_field_1 for -fstrict-volatile-bitfields.
(store_fixed_bit_field): Split up.  Call store_fixed_bit_field_1
to do the real work.
(store_fixed_bit_field_1): New function. 
(store_split_bit_field): Limit the unit size to the memory mode
size,
to prevent recursion.

testsuite:
* gcc.c-torture/compile/pr59134.c: New test.
* gnat.dg/misaligned_volatile.adb: New test.

Added:
   
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.c-torture/compile/pr59134.c
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.dg/pr23623.c
 

[Bug middle-end/59134] [4.7/4.8/4.9 regression] infinite loop between store_fixed_bit_field and store_split_bit_field with STRICT_ALIGNMENT

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59134

--- Comment #7 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu Feb 27 07:28:06 2014
New Revision: 208195

URL: http://gcc.gnu.org/viewcvs?rev=208195&root=gcc&view=rev
Log:
2014-02-27  Joey Ye  

Backport mainline strict-volatile-bitfields fixes
2013-09-28  Sandra Loosemore  

gcc/
* expr.h (extract_bit_field): Remove packedp parameter.
* expmed.c (extract_fixed_bit_field): Remove packedp parameter
from forward declaration.
(store_split_bit_field): Remove packedp arg from calls to
extract_fixed_bit_field.
(extract_bit_field_1): Remove packedp parameter and packedp
argument from recursive calls and calls to extract_fixed_bit_field.
(extract_bit_field): Remove packedp parameter and corresponding
arg to extract_bit_field_1.
(extract_fixed_bit_field): Remove packedp parameter.  Remove code
to issue warnings.
(extract_split_bit_field): Remove packedp arg from call to
extract_fixed_bit_field.
* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
(copy_blkmode_from_reg): Likewise.
(copy_blkmode_to_reg): Likewise.
(read_complex_part): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
to extract_bit_field.
* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust
call to extract_bit_field.
* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust
call to extract_bit_field.
* doc/invoke.texi (Code Gen Options): Remove mention of warnings
and special packedp behavior from -fstrict-volatile-bitfields
documentation.

2013-12-11  Bernd Edlinger  

* expr.c (expand_assignment): Remove dependency on 
flag_strict_volatile_bitfields. Always set the memory
access mode.
(expand_expr_real_1): Likewise.

2013-12-11  Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997

gcc/
* expmed.c (strict_volatile_bitfield_p): New function.
(store_bit_field_1): Don't special-case strict volatile
bitfields here.
(store_bit_field): Handle strict volatile bitfields here instead.
(store_fixed_bit_field): Don't special-case strict volatile
bitfields here.
(extract_bit_field_1): Don't special-case strict volatile
bitfields here.
(extract_bit_field): Handle strict volatile bitfields here instead.
(extract_fixed_bit_field): Don't special-case strict volatile
bitfields here.  Simplify surrounding code to resemble that in
store_fixed_bit_field.
* doc/invoke.texi (Code Gen Options): Update
-fstrict-volatile-bitfields description.

gcc/testsuite/
* gcc.dg/pr23623.c: New test.
* gcc.dg/pr48784-1.c: New test.
* gcc.dg/pr48784-2.c: New test.
* gcc.dg/pr56341-1.c: New test.
* gcc.dg/pr56341-2.c: New test.
* gcc.dg/pr56997-1.c: New test.
* gcc.dg/pr56997-2.c: New test.
* gcc.dg/pr56997-3.c: New test.

2013-12-11  Bernd Edlinger  
 Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997
* expmed.c (strict_volatile_bitfield_p): Add bitregion_start
and bitregion_end parameters.  Test for compliance with C++
memory model.
(store_bit_field): Adjust call to strict_volatile_bitfield_p.
Add fallback logic for cases where -fstrict-volatile-bitfields
is supposed to apply, but cannot.
(extract_bit_field): Likewise. Use narrow_bit_field_mem and
extract_fixed_bit_field_1 to do the extraction.
(extract_fixed_bit_field): Revert to previous mode selection
algorithm.
Call extract_fixed_bit_field_1 to do the real work.
(extract_fixed_bit_field_1): New function.

testsuite:
* gcc.dg/pr23623.c: Update to test interaction with C++
memory model.

2013-12-11  Bernd Edlinger  

PR middle-end/59134
* expmed.c (store_bit_field): Use narrow_bit_field_mem and
store_fixed_bit_field_1 for -fstrict-volatile-bitfields.
(store_fixed_bit_field): Split up.  Call store_fixed_bit_field_1
to do the real work.
(store_fixed_bit_field_1): New function. 
(store_split_bit_field): Limit the unit size to the memory mode
size,
to prevent recursion.

testsuite:
* gcc.c-torture/compile/pr59134.c: New test.
* gnat.dg/misaligned_volatile.adb: New test.

Added:
   
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.c-torture/compile/pr59134.c
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.dg/pr23623.c
 

[Bug target/56997] Incorrect write to packed field when strict-volatile-bitfields enabled on aarch32

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56997

--- Comment #15 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu Feb 27 07:28:06 2014
New Revision: 208195

URL: http://gcc.gnu.org/viewcvs?rev=208195&root=gcc&view=rev
Log:
2014-02-27  Joey Ye  

Backport mainline strict-volatile-bitfields fixes
2013-09-28  Sandra Loosemore  

gcc/
* expr.h (extract_bit_field): Remove packedp parameter.
* expmed.c (extract_fixed_bit_field): Remove packedp parameter
from forward declaration.
(store_split_bit_field): Remove packedp arg from calls to
extract_fixed_bit_field.
(extract_bit_field_1): Remove packedp parameter and packedp
argument from recursive calls and calls to extract_fixed_bit_field.
(extract_bit_field): Remove packedp parameter and corresponding
arg to extract_bit_field_1.
(extract_fixed_bit_field): Remove packedp parameter.  Remove code
to issue warnings.
(extract_split_bit_field): Remove packedp arg from call to
extract_fixed_bit_field.
* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
(copy_blkmode_from_reg): Likewise.
(copy_blkmode_to_reg): Likewise.
(read_complex_part): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
to extract_bit_field.
* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust
call to extract_bit_field.
* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust
call to extract_bit_field.
* doc/invoke.texi (Code Gen Options): Remove mention of warnings
and special packedp behavior from -fstrict-volatile-bitfields
documentation.

2013-12-11  Bernd Edlinger  

* expr.c (expand_assignment): Remove dependency on 
flag_strict_volatile_bitfields. Always set the memory
access mode.
(expand_expr_real_1): Likewise.

2013-12-11  Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997

gcc/
* expmed.c (strict_volatile_bitfield_p): New function.
(store_bit_field_1): Don't special-case strict volatile
bitfields here.
(store_bit_field): Handle strict volatile bitfields here instead.
(store_fixed_bit_field): Don't special-case strict volatile
bitfields here.
(extract_bit_field_1): Don't special-case strict volatile
bitfields here.
(extract_bit_field): Handle strict volatile bitfields here instead.
(extract_fixed_bit_field): Don't special-case strict volatile
bitfields here.  Simplify surrounding code to resemble that in
store_fixed_bit_field.
* doc/invoke.texi (Code Gen Options): Update
-fstrict-volatile-bitfields description.

gcc/testsuite/
* gcc.dg/pr23623.c: New test.
* gcc.dg/pr48784-1.c: New test.
* gcc.dg/pr48784-2.c: New test.
* gcc.dg/pr56341-1.c: New test.
* gcc.dg/pr56341-2.c: New test.
* gcc.dg/pr56997-1.c: New test.
* gcc.dg/pr56997-2.c: New test.
* gcc.dg/pr56997-3.c: New test.

2013-12-11  Bernd Edlinger  
 Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997
* expmed.c (strict_volatile_bitfield_p): Add bitregion_start
and bitregion_end parameters.  Test for compliance with C++
memory model.
(store_bit_field): Adjust call to strict_volatile_bitfield_p.
Add fallback logic for cases where -fstrict-volatile-bitfields
is supposed to apply, but cannot.
(extract_bit_field): Likewise. Use narrow_bit_field_mem and
extract_fixed_bit_field_1 to do the extraction.
(extract_fixed_bit_field): Revert to previous mode selection
algorithm.
Call extract_fixed_bit_field_1 to do the real work.
(extract_fixed_bit_field_1): New function.

testsuite:
* gcc.dg/pr23623.c: Update to test interaction with C++
memory model.

2013-12-11  Bernd Edlinger  

PR middle-end/59134
* expmed.c (store_bit_field): Use narrow_bit_field_mem and
store_fixed_bit_field_1 for -fstrict-volatile-bitfields.
(store_fixed_bit_field): Split up.  Call store_fixed_bit_field_1
to do the real work.
(store_fixed_bit_field_1): New function. 
(store_split_bit_field): Limit the unit size to the memory mode
size,
to prevent recursion.

testsuite:
* gcc.c-torture/compile/pr59134.c: New test.
* gnat.dg/misaligned_volatile.adb: New test.

Added:
   
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.c-torture/compile/pr59134.c
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.dg/pr23623.c
 

[Bug middle-end/23623] volatile keyword changes bitfield access size from 32bit to 8bit

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=23623

--- Comment #20 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu Feb 27 07:28:06 2014
New Revision: 208195

URL: http://gcc.gnu.org/viewcvs?rev=208195&root=gcc&view=rev
Log:
2014-02-27  Joey Ye  

Backport mainline strict-volatile-bitfields fixes
2013-09-28  Sandra Loosemore  

gcc/
* expr.h (extract_bit_field): Remove packedp parameter.
* expmed.c (extract_fixed_bit_field): Remove packedp parameter
from forward declaration.
(store_split_bit_field): Remove packedp arg from calls to
extract_fixed_bit_field.
(extract_bit_field_1): Remove packedp parameter and packedp
argument from recursive calls and calls to extract_fixed_bit_field.
(extract_bit_field): Remove packedp parameter and corresponding
arg to extract_bit_field_1.
(extract_fixed_bit_field): Remove packedp parameter.  Remove code
to issue warnings.
(extract_split_bit_field): Remove packedp arg from call to
extract_fixed_bit_field.
* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
(copy_blkmode_from_reg): Likewise.
(copy_blkmode_to_reg): Likewise.
(read_complex_part): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
to extract_bit_field.
* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust
call to extract_bit_field.
* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust
call to extract_bit_field.
* doc/invoke.texi (Code Gen Options): Remove mention of warnings
and special packedp behavior from -fstrict-volatile-bitfields
documentation.

2013-12-11  Bernd Edlinger  

* expr.c (expand_assignment): Remove dependency on 
flag_strict_volatile_bitfields. Always set the memory
access mode.
(expand_expr_real_1): Likewise.

2013-12-11  Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997

gcc/
* expmed.c (strict_volatile_bitfield_p): New function.
(store_bit_field_1): Don't special-case strict volatile
bitfields here.
(store_bit_field): Handle strict volatile bitfields here instead.
(store_fixed_bit_field): Don't special-case strict volatile
bitfields here.
(extract_bit_field_1): Don't special-case strict volatile
bitfields here.
(extract_bit_field): Handle strict volatile bitfields here instead.
(extract_fixed_bit_field): Don't special-case strict volatile
bitfields here.  Simplify surrounding code to resemble that in
store_fixed_bit_field.
* doc/invoke.texi (Code Gen Options): Update
-fstrict-volatile-bitfields description.

gcc/testsuite/
* gcc.dg/pr23623.c: New test.
* gcc.dg/pr48784-1.c: New test.
* gcc.dg/pr48784-2.c: New test.
* gcc.dg/pr56341-1.c: New test.
* gcc.dg/pr56341-2.c: New test.
* gcc.dg/pr56997-1.c: New test.
* gcc.dg/pr56997-2.c: New test.
* gcc.dg/pr56997-3.c: New test.

2013-12-11  Bernd Edlinger  
 Sandra Loosemore  

PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997
* expmed.c (strict_volatile_bitfield_p): Add bitregion_start
and bitregion_end parameters.  Test for compliance with C++
memory model.
(store_bit_field): Adjust call to strict_volatile_bitfield_p.
Add fallback logic for cases where -fstrict-volatile-bitfields
is supposed to apply, but cannot.
(extract_bit_field): Likewise. Use narrow_bit_field_mem and
extract_fixed_bit_field_1 to do the extraction.
(extract_fixed_bit_field): Revert to previous mode selection
algorithm.
Call extract_fixed_bit_field_1 to do the real work.
(extract_fixed_bit_field_1): New function.

testsuite:
* gcc.dg/pr23623.c: Update to test interaction with C++
memory model.

2013-12-11  Bernd Edlinger  

PR middle-end/59134
* expmed.c (store_bit_field): Use narrow_bit_field_mem and
store_fixed_bit_field_1 for -fstrict-volatile-bitfields.
(store_fixed_bit_field): Split up.  Call store_fixed_bit_field_1
to do the real work.
(store_fixed_bit_field_1): New function. 
(store_split_bit_field): Limit the unit size to the memory mode
size,
to prevent recursion.

testsuite:
* gcc.c-torture/compile/pr59134.c: New test.
* gnat.dg/misaligned_volatile.adb: New test.

Added:
   
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.c-torture/compile/pr59134.c
branches/ARM/embedded-4_8-branch/gcc/testsuite/gcc.dg/pr23623.c
 

[Bug libgcc/60166] ARM default NAN encoding violates EABI

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60166

--- Comment #3 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Fri Feb 28 21:53:40 2014
New Revision: 208229

URL: http://gcc.gnu.org/viewcvs?rev=208229&root=gcc&view=rev
Log:
2014-02-28  Joey Ye  

PR libgcc/60166
* config/arm/sfp-machine.h (_FP_NANFRAC_H,
_FP_NANFRAC_S, _FP_NANFRAC_D, _FP_NANFRAC_Q):
Set to zero.

Modified:
trunk/libgcc/ChangeLog
trunk/libgcc/config/arm/sfp-machine.h

[Bug libgcc/60166] ARM default NAN encoding violates EABI

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60166

--- Comment #4 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Fri Feb 28 22:00:52 2014
New Revision: 208230

URL: http://gcc.gnu.org/viewcvs?rev=208230&root=gcc&view=rev
Log:
2014-02-28  Joey Ye  

Backport from mainline r208229
2014-02-28  Joey Ye  

PR libgcc/60166
* config/arm/sfp-machine.h (_FP_NANFRAC_H,
_FP_NANFRAC_S, _FP_NANFRAC_D, _FP_NANFRAC_Q):
Set to zero.

Modified:
branches/gcc-4_8-branch/libgcc/ChangeLog
branches/gcc-4_8-branch/libgcc/config/arm/sfp-machine.h

[Bug libgcc/60166] ARM default NAN encoding violates EABI

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60166

--- Comment #6 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Fri Feb 28 22:05:13 2014
New Revision: 208233

URL: http://gcc.gnu.org/viewcvs?rev=208233&root=gcc&view=rev
Log:
2014-02-28  Joey Ye  

Backport from mainline r208229
2014-02-28  Joey Ye  

PR libgcc/60166
* config/arm/sfp-machine.h (_FP_NANFRAC_H,
_FP_NANFRAC_S, _FP_NANFRAC_D, _FP_NANFRAC_Q):
Set to zero.

Modified:
branches/gcc-4_7-branch/libgcc/ChangeLog
branches/gcc-4_7-branch/libgcc/config/arm/sfp-machine.h

[Bug tree-optimization/60454] [4.7/4.8 Regression] Code mistakenly detected as doing bswap

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60454

--- Comment #9 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Thu Mar 13 07:00:05 2014
New Revision: 208529

URL: http://gcc.gnu.org/viewcvs?rev=208529&root=gcc&view=rev
Log:
2014-03-13  Joey Ye  

Backport from mainline
2014-03-12  Thomas Preud'homme  

PR tree-optimization/60454
* tree-ssa-math-opts.c (find_bswap_1): Fix bswap detection.

testsuite:
* gcc.c-torture/execute/pr60454.c: New test.



Added:
branches/gcc-4_8-branch/gcc/testsuite/gcc.c-torture/execute/pr60454.c
Modified:
branches/gcc-4_8-branch/gcc/ChangeLog
branches/gcc-4_8-branch/gcc/testsuite/ChangeLog
branches/gcc-4_8-branch/gcc/tree-ssa-math-opts.c

[Bug plugins/59335] Plugin doesn't build on trunk

[jye2 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59335

--- Comment #29 from jye2 at gcc dot gnu.org ---
Author: jye2
Date: Fri Sep  5 06:52:17 2014
New Revision: 214938

URL: https://gcc.gnu.org/viewcvs?rev=214938&root=gcc&view=rev
Log:
2014-09-05  Joey Ye  

PR plugin/59335
* Makefile.in (PLUGIN_HEADERS): Add wide-int.h, signop.h, hash-map.h,

Modified:
trunk/gcc/Makefile.in