[Bug tree-optimization/65773] [5 Regression] GCC 5.1 miscompiles LLVM function AArch64InstrInfo::loadRegFromStackSlot()
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65773 James Molloy changed: What|Removed |Added CC||james.molloy at arm dot com --- Comment #13 from James Molloy --- Hi, This has just been pinged at me. Thanks for debugging this and sorry about the broken code. Just a note that the actual problem/fix is even more simple. The problem is we're asking for a reference instead of a copy (which is the pattern used elsewhere), so simply removing the '&' will enforce correct behaviour. Cheers, James
[Bug tree-optimization/65773] [5 Regression] GCC 5.1 miscompiles LLVM function AArch64InstrInfo::loadRegFromStackSlot()
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65773 --- Comment #14 from James Molloy --- Hi, For completeness, I just fixed this in LLVM r235088 (http://reviews.llvm.org/rL235088). Cheers, James
[Bug target/63359] aarch64: 32bit registers in inline asm
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359
James Molloy changed:
What|Removed |Added
CC||james.molloy at arm dot com
--- Comment #1 from James Molloy ---
Hi,
> Besides, clang rejects it, so please find a common syntax...
It shouldn't. The "w" modifier should have been supported since clang 3.4, and
is certainly supported in clang 3.5.
Clang 3.5 has a warning about this:
"""
/tmp/test.c:2:27: warning: value size does not match register size specified by
the constraint and modifier [-Wasm-operand-widths]
asm("clz %0, %0":"+r"(i));
^
/tmp/test.c:2:14: note: use constraint modifier "w"
asm("clz %0, %0":"+r"(i));
^~
%w0
/tmp/test.c:2:27: warning: value size does not match register size specified by
the constraint and modifier [-Wasm-operand-widths]
asm("clz %0, %0":"+r"(i));
^
/tmp/test.c:2:18: note: use constraint modifier "w"
asm("clz %0, %0":"+r"(i));
^~
%w0
2 warnings generated.
"""
[Bug target/63359] aarch64: 32bit registers in inline asm
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #4 from James Molloy --- Hi Richard, My two-pennyworth for what it's worth - we've had several people with broken code tripped by this bug, and Apple have reported seeing the same thing with their internal codebases. This one seems often to appear in real-world code. Cheers, James
[Bug target/63359] aarch64: 32bit registers in inline asm
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #6 from James Molloy --- Good example, although I might argue slightly pathological. So in this case currently, GCC doesn't even implicitly promote the argument, just uses it as-is. It seems a very dangerous behaviour to have as default. Could there not be a more sensible default and an explicit constraint modifier to allow this instead?
[Bug target/63359] aarch64: 32bit registers in inline asm
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #9 from James Molloy --- OK, given your second example I agree that the usecase isn't quite as pathological as I thought. > I'm not saying I'll never accept a warning for this sort of code; but I'd need convincing that it won't unduly pessimize real code with no acceptable work-arounds. Clang is committed to this warning as our community feels the error detection rate makes up for the lack of raw power. So unless we actively do something the two compilers will always differ in approach which probably isn't best for our users. Would you be opposed to discussing a constraint modifier to mean "implicitly extend to 64-bits"?
