[Bug target/33699] New: regression, missing optimization on const addr area store

2007-10-08 Thread fshvaige at cisco dot com 
Same problem for
-0s/-02
version 4.1.0
etc...


[Code]

typedef unsigned * ptr_t;
void f (void) {
ptr_t p = (ptr_t)0xFED0;
p[0] = 0xDEAD;
p[2] = 0xDEAD;
p[4] = 0xDEAD;
p[6] = 0xDEAD;
}


[Assembly generated by version gcc-4.3-20071005]

 :
   0:   3404deadli  a0,0xdead
   4:   3402fee8li  v0,0xfee8
   8:   3403fed0li  v1,0xfed0
   c:   ac44sw  a0,0(v0)
  10:   ac64sw  a0,0(v1)
  14:   3402fed8li  v0,0xfed8
  18:   3403fee0li  v1,0xfee0
  1c:   ac44sw  a0,0(v0)
  20:   03e8jr  ra
  24:   ac64sw  a0,0(v1)


[Assembly generated by version 3.4.5 (seems better)]

 :
   0:   3403fed0li  v1,0xfed0
   4:   3402deadli  v0,0xdead
   8:   ac620018sw  v0,24(v1)
   c:   ac62sw  v0,0(v1)
  10:   ac620008sw  v0,8(v1)
  14:   03e8jr  ra
  18:   ac620010sw  v0,16(v1)
  1c:   nop


[Version]

Using built-in specs.
Target: mips-elf
Configured with: ../gcc-4.3-20071005/configure --enable-languages=c,c++
--prefix=/auto/mipaproj/fshvaige/apps/Linux/gcc-4.3-20071005 --target=mips-elf
--program-suffix=.mips --without-headers --with-newlib
Thread model: single
gcc version 4.3.0 20071005 (experimental) (GCC) 


[Command line options]

gcc.mips -c -o main.o -v -save-temps -O3 -march=mips64 -mabi=eabi
-mexplicit-relocs main.c


-- 
   Summary: regression, missing optimization on const addr area
store
   Product: gcc
   Version: 4.3.0
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: target
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: fshvaige at cisco dot com
 GCC build triplet: i686-pc-linux-gnu
  GCC host triplet: i686-pc-linux-gnu
GCC target triplet: mips-elf


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33699

[Bug target/18404] unnecessary sll when -mint64 (MIPS)

2005-01-18 Thread fshvaige at cisco dot com 

--- Additional Comments From fshvaige at cisco dot com  2005-01-18 09:57 
---
Where can I read the discussion preceding this decision ?

Int is default type in C. I want (as option) default to be 64 bit; it seems to
me so natural for 64 bit architecture. I know that 64 bit MIPS CPUs complete
some 32 bit operations faster then corresponding 64 bit ops, but still.

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18404

[Bug target/18404] New: unnecessary sll when -mint64

2004-11-09 Thread fshvaige at cisco dot com 
Configured with:
--target=mips-elf --program-suffix=.mips --with-newlib --without-headers
--enable-languages=c,c++,objc -v

Thread model: single
gcc version 3.4.2

File /tmp/gcctest_01.c:

typedef signed char t_SI __attribute__ ((__mode__(SI)));

t_SI inc_SI (t_SI v) {
return ++v;
}

Command line:
gcc.mips -S -O2 -march=sb1 -mabi=64 -o /tmp/gcctest_01.s /tmp/gcctest_01.c

Result file gcctest_01.s:

.file   1 "gcctest_01.c"
.section .mdebug.abi64
.previous
.text
.align  2
.align  3
.globl  inc_SI
.entinc_SI
inc_SI:
.frame  $sp,0,$31   # vars= 0, regs= 0/0, args= 0, gp= 0
.mask   0x,0
.fmask  0x,0
.setnoreorder
.setnomacro
j   $31
addiu   $2,$4,1
.setmacro
.setreorder

.endinc_SI

Command line:
gcc.mips -S -O2 -march=sb1 -mabi=64 -mint64 -o /tmp/gcctest_01.s 
/tmp/gcctest_01.c

Result file gcctest_01.s:

.file   1 "gcctest_01.c"
.section .mdebug.abi64
.previous
.text
.align  2
.align  3
.globl  inc_SI
.entinc_SI
inc_SI:
.frame  $sp,0,$31   # vars= 0, regs= 0/0, args= 0, gp= 0
.mask   0x,0
.fmask  0x,0
sll $2,$4,0
.setnoreorder
.setnomacro
j   $31
addiu   $2,$2,1
.setmacro
.setreorder

.endinc_SI

Question: what is this "sll $2,$4,0" good for or why it absent in first result
(without -mint64) ?

-- 
   Summary: unnecessary sll when -mint64
   Product: gcc
   Version: 3.4.2
Status: UNCONFIRMED
  Severity: minor
  Priority: P3
 Component: target
AssignedTo: unassigned at gcc dot gnu dot org
    ReportedBy: fshvaige at cisco dot com
CC: gcc-bugs at gcc dot gnu dot org
 GCC build triplet: i686-pc-linux-gnu
  GCC host triplet: i686-pc-linux-gnu
GCC target triplet: mips-unknown-elf


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18404

[Bug target/18404] unnecessary sll when -mint64 (MIPS)

2004-11-09 Thread fshvaige at cisco dot com 


-- 
   What|Removed |Added

Summary|unnecessary sll when -mint64|unnecessary sll when -mint64
   ||(MIPS)


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18404