[Bug tree-optimization/105090] New: BFI instructions are not generated on arm-none-eabi-g++

2022-03-28 Thread andrew.jeddeloh at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105090

Bug ID: 105090
   Summary: BFI instructions are not generated on
arm-none-eabi-g++
   Product: gcc
   Version: 11.2.1
Status: UNCONFIRMED
  Keywords: missed-optimization
  Severity: normal
  Priority: P3
 Component: tree-optimization
  Assignee: unassigned at gcc dot gnu.org
  Reporter: andrew.jeddeloh at gmail dot com
  Target Milestone: ---

Created attachment 52704
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=52704&action=edit
.ii file for test case

The following code could generate a BFI instruction but does not. Clang will
generate one.

#include 
uint32_t emplace(uint32_t into, uint32_t what) {
constexpr uint32_t shift = 5;
constexpr uint32_t width = 4;
constexpr uint32_t mask = ((1 << width) - 1) << shift;
return (into & ~mask) | ((what << shift) & mask);
}

you can write equivalent C code and get the same problem.

gcc 8.5 and clang generate:
bfi r0, r1, #5, #4
bx  lr

Whereas 9.3+ generates:
lslsr1, r1, #5
and r1, r1, #480
bic r0, r0, #480
orrsr0, r0, r1
bx  lr

These are compiled with arm-none-eabi-gcc -Wall -Wextra -mcpu=cortex-m4 -O3 -c
Compile output is silent. Attached is .ii
I also tried O2, O1 and Os.

See problem with godbolt: https://godbolt.org/z/57h5Yd9ov

A lot of embedded development involves setting certain chunks of memory mapped
registers like this and would greatly benefit from this being fixed. 

GCC version info from my computer:
Using built-in specs.
COLLECT_GCC=arm-none-eabi-gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/arm-none-eabi/11.2.0/lto-wrapper
Target: arm-none-eabi
Configured with: /build/arm-none-eabi-gcc/src/gcc-11.2.0/configure
--target=arm-none-eabi --prefix=/usr --with-sysroot=/usr/arm-none-eabi
--with-native-system-header-dir=/include --libexecdir=/usr/lib
--enable-languages=c,c++ --enable-plugins --disable-decimal-float
--disable-libffi --disable-libgomp --disable-libmudflap --disable-libquadmath
--disable-libssp --disable-libstdcxx-pch --disable-nls --disable-shared
--disable-threads --disable-tls --with-gnu-as --with-gnu-ld --with-system-zlib
--with-newlib --with-headers=/usr/arm-none-eabi/include
--with-python-dir=share/gcc-arm-none-eabi --with-gmp --with-mpfr --with-mpc
--with-isl --with-libelf --enable-gnu-indirect-function
--with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm'
--with-pkgversion='Arch Repository' --with-bugurl=https://bugs.archlinux.org/
--with-multilib-list=rmprofile
Thread model: single
Supported LTO compression algorithms: zlib zstd
gcc version 11.2.0 (Arch Repository)



Possibly related but I'm not sure:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85628

[Bug target/105090] BFI instructions are not generated on arm-none-eabi-g++

2022-05-25 Thread andrew.jeddeloh at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105090

--- Comment #4 from Andrew Jeddeloh  ---
Hi, I wanted to follow up now that GCC 13 development has opened up. Any news
on including it?