[Bug other/116472] New: Wrong offset format when generating assembly with -S and -masm=intel

[8dcc.git at gmail dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116472

Bug ID: 116472
   Summary: Wrong offset format when generating assembly with -S
and -masm=intel
   Product: gcc
   Version: 14.2.1
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: other
  Assignee: unassigned at gcc dot gnu.org
  Reporter: 8dcc.git at gmail dot com
  Target Milestone: ---

The following C code:

#include 

int main(void) {
int arr[2];
arr[0] = 123;
arr[1] = 456;
printf("%d, %d\n", arr[0], arr[1]);
return 0;
}

Is compiled with:

gcc -S -masm=intel -o output.s source.c

This is a chunk of the generated assembly in output.s:

...
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -16[rbp], 123
mov DWORD PTR -12[rbp], 456
...

As far as I know, in intel syntax the offset of the effective addresses should
be inside the square brackets, next to the register:

...
mov QWORD PTR [rbp-8], rax
xor eax, eax
mov DWORD PTR [rbp-16], 123
mov DWORD PTR [rbp-12], 456
...

-

My GCC version:

Using built-in specs.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-pc-linux-gnu/14.2.1/lto-wrapper
Target: x86_64-pc-linux-gnu
Configured with: /build/gcc/src/gcc/configure
--enable-languages=ada,c,c++,d,fortran,go,lto,m2,objc,obj-c++,rust
--enable-bootstrap --prefix=/usr --libdir=/usr/lib --libexecdir=/usr/lib
--mandir=/usr/share/man --infodir=/usr/share/info
--with-bugurl=https://gitlab.archlinux.org/archlinux/packaging/packages/gcc/-/issues
--with-build-config=bootstrap-lto --with-linker-hash-style=gnu
--with-system-zlib --enable-__cxa_atexit --enable-cet=auto
--enable-checking=release --enable-clocale=gnu --enable-default-pie
--enable-default-ssp --enable-gnu-indirect-function --enable-gnu-unique-object
--enable-libstdcxx-backtrace --enable-link-serialization=1
--enable-linker-build-id --enable-lto --enable-multilib --enable-plugin
--enable-shared --enable-threads=posix --disable-libssp --disable-libstdcxx-pch
--disable-werror
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 14.2.1 20240805 (GCC)

[Bug target/116472] Wrong offset format when generating assembly with -masm=intel and -fPIE/-fPIC

[8dcc.git at gmail dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116472

--- Comment #3 from 8dcc.git at gmail dot com ---
> Are you sure you don't have some patch which breaks this?
I haven't manually patched GCC, it was installed it from the Arch repository,
which is apparently configured with `--enable-default-pie`, according to `gcc
-v`.

> Oh -fPIE is needed to get the "broken" assembly.
I tried compiling the source with:

gcc -S -masm=intel -no-pie -o output.s source.c

And the issue still persists.

[Bug target/116472] Wrong offset format when generating assembly with -masm=intel and -fPIE/-fPIC

[8dcc.git at gmail dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116472

--- Comment #6 from 8dcc.git at gmail dot com ---
(In reply to Xi Ruoyao from comment #4)
> > I tried compiling the source with:
> > 
> > gcc -S -masm=intel -no-pie -o output.s source.c
> > 
> > And the issue still persists.
> 
> -no-pie is only passed through to the linker.  The compiler option is 
> -fno-PIE.

You are right. And yes, when compiling with -fno-PIE instead of -no-pie, the
issue does not happen.