[Bug fortran/109467] inconsistent formatting/case of keywords in error messages in Fortran front end
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109467 Jerry DeLisle changed: What|Removed |Added CC||jvdelisle at gcc dot gnu.org Ever confirmed|0 |1 Status|UNCONFIRMED |WAITING Last reconfirmed||2024-09-01 --- Comment #1 from Jerry DeLisle --- What do you advise to be the convention? It should not be too difficult to scan through and modify.
[Bug tree-optimization/113833] 435.gromacs fails verification on with -Ofast -march={cascadelake,icelake-server} and PGO after r14-7272-g57f611604e8bab
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113833 --- Comment #6 from Filip Kastl --- The verification succeeds again. This change happened between r15-3208-ga1062b0c07bb72 and r15-3231-g691f682fe24d07
[Bug target/112434] unexpected error when compiling for riscv64: invalid 'asm': invalid use of '%c'
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112434 --- Comment #4 from Levi Zim --- I think the fix should be easy and this kind of bug has been fixed for aarch64(in f541a48127a1940dce8dc8f48d88ccb04aa2a31e) and loongarch(c44fd55784206ff5b32471dadaa8affbac840454). Based on c44fd55784206ff5b32471dadaa8affbac840454 I made a patch and tested it by building riscv64-linux-gnu-gcc and compile the attached source file. It works. But the steps of sending a patch to gcc seems too complex for me so I am attaching it here for now.
[Bug target/116512] [12/13/14/15 Regression] vzeroupper emitted even though the upper half of the z registers are returned
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116512 --- Comment #8 from GCC Commits --- The releases/gcc-14 branch has been updated by hongtao Liu : https://gcc.gnu.org/g:ba9a3f105ea552a22d08f2d54dfdbef16af7c99e commit r14-10625-gba9a3f105ea552a22d08f2d54dfdbef16af7c99e Author: liuhongt Date: Thu Aug 29 11:39:20 2024 +0800 Check avx upper register for parallel. For function arguments/return, when it's BLK mode, it's put in a parallel with an expr_list, and the expr_list contains the real mode and registers. Current ix86_check_avx_upper_register only checked for SSE_REG_P, and failed to handle that. The patch extend the handle to each subrtx. gcc/ChangeLog: PR target/116512 * config/i386/i386.cc (ix86_check_avx_upper_register): Iterate subrtx to scan for avx upper register. (ix86_check_avx_upper_stores): Inline old ix86_check_avx_upper_register. (ix86_avx_u128_mode_needed): Ditto, and replace FOR_EACH_SUBRTX with call to new ix86_check_avx_upper_register. gcc/testsuite/ChangeLog: * gcc.target/i386/pr116512.c: New test. (cherry picked from commit ab214ef734bfc3dcffcf79ff9e1dd651c2b40566)
[Bug modula2/116557] New: FSF (physical) mailing address is included in the license header
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116557 Bug ID: 116557 Summary: FSF (physical) mailing address is included in the license header Product: gcc Version: 15.0 Status: UNCONFIRMED Keywords: internal-improvement Severity: normal Priority: P3 Component: modula2 Assignee: gaius at gcc dot gnu.org Reporter: pinskia at gcc dot gnu.org Target Milestone: --- The rest of GCC does not include the FSF address in the license header so m2 should not either.
[Bug target/116131] [14/15 Regression] RISC-V: Unrecognizable insn with xtheadmemidx on rv32
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116131 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED|RESOLVED --- Comment #6 from Jeffrey A. Law --- Should be fixed on the trunk now.
[Bug target/116504] wrong code with -mcpu=sifive-x280
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116504 --- Comment #4 from Jeffrey A. Law --- It's not failing for me, either when using QEMU or when running the resultant binary on the BPI. Zdenek, can you (privately) pass along the resulting binary you're testing. It's pretty easy for me to run that on real hardware.
[Bug target/55212] [SH] Switch to LRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #215 from John Paul Adrian Glaubitz --- OK, thanks a lot for looking at the Go problem. In the meantime, I will try to get a more usable backtrace from Ada. On a sidenote, gccgo doesn't work 100% properly on qemu-user while it works perfectly fine on real hardware. But the crash above is not related to qemu-user.
[Bug tree-optimization/64700] Sink common code through PHI
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64700 --- Comment #9 from Andrew Pinski --- (In reply to Andrew Pinski from comment #8) > Created attachment 59035 [details] > Start of the patch One thing this does not support is commutative operations. I will add support in a few minutes.
[Bug tree-optimization/64700] Sink common code through PHI
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64700 --- Comment #8 from Andrew Pinski --- Created attachment 59035 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59035&action=edit Start of the patch This patch extends factor_out_conditional_operation to do more than one operand. We can't do the factoring for division with constants as we don't undo it later on so I disabled for that (PR22196). I have not add any testcases yet. There are a few regressions: +FAIL: gcc.dg/Warray-bounds-92.c (test for warnings, line 106) +FAIL: gcc.dg/Warray-bounds-92.c (test for warnings, line 132) +FAIL: gcc.dg/builtin-object-size-1.c execution test PR 116556 (I think the Warray-bounds are also this one) +FAIL: gcc.dg/tree-ssa/slsr-12.c scan-tree-dump-times optimized " * " 3 +FAIL: gcc.dg/tree-ssa/slsr-34.c scan-tree-dump-times optimized " * " 1 +FAIL: gcc.dg/tree-ssa/slsr-8.c scan-tree-dump-times optimized " w?* " 10 PR 116553 +FAIL: gcc.dg/tree-ssa/split-path-2.c scan-tree-dump split-paths "appears to be a join point for if-convertable diamond" PR 112402 +FAIL: gcc.target/i386/pr113609-1.c scan-assembler-times kortest 17 +FAIL: gcc.target/i386/pr113609-2.c scan-assembler-times [ t]+je 4 +FAIL: gcc.target/i386/pr113609-2.c scan-assembler-times [ t]+sete 4 This needs to be looked more into but I think it is just a testcase issue.
[Bug target/55212] [SH] Switch to LRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #220 from Oleg Endo --- (In reply to Kazumoto Kojima from comment #219) > (In reply to Oleg Endo from comment #217) > > (In reply to Kazumoto Kojima from comment #216) > > > Kaz, can you please create a branch devel/sh-lra and add the patches there? > > I think it would make it easier to manage the patches. > > I am currently losing SSH access to gcc.gnu.org. I have chosen not to > update it so as not to add one more dormant account when an update is > requested. > Sorry for the inconvenience. Ah, OK, understandable. No problem. How about github instead?
[Bug target/55212] [SH] Switch to LRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #221 from Kazumoto Kojima --- (In reply to Oleg Endo from comment #220) > Ah, OK, understandable. No problem. How about github instead? I forked https://github.com/gcc-mirror/gcc and have just added the sh-lra branch to https://github.com/kazkojima/gcc.git. Hope it helps.
[Bug target/116152] RISC-V: Proposed deprecation of LP64E abi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116152 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED |RESOLVED CC||law at gcc dot gnu.org --- Comment #5 from Jeffrey A. Law --- Warning issued on the trunk now.
[Bug target/116512] [12/13/14/15 Regression] vzeroupper emitted even though the upper half of the z registers are returned
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116512 --- Comment #9 from GCC Commits --- The releases/gcc-13 branch has been updated by hongtao Liu : https://gcc.gnu.org/g:5e049ada87842947adaca5c607516396889f64d6 commit r13-8999-g5e049ada87842947adaca5c607516396889f64d6 Author: liuhongt Date: Thu Aug 29 11:39:20 2024 +0800 Check avx upper register for parallel. For function arguments/return, when it's BLK mode, it's put in a parallel with an expr_list, and the expr_list contains the real mode and registers. Current ix86_check_avx_upper_register only checked for SSE_REG_P, and failed to handle that. The patch extend the handle to each subrtx. gcc/ChangeLog: PR target/116512 * config/i386/i386.cc (ix86_check_avx_upper_register): Iterate subrtx to scan for avx upper register. (ix86_check_avx_upper_stores): Inline old ix86_check_avx_upper_register. (ix86_avx_u128_mode_needed): Ditto, and replace FOR_EACH_SUBRTX with call to new ix86_check_avx_upper_register. gcc/testsuite/ChangeLog: * gcc.target/i386/pr116512.c: New test. (cherry picked from commit ab214ef734bfc3dcffcf79ff9e1dd651c2b40566)
[Bug middle-end/116555] [15 Regression] ifcvt: ICE: verify_gimple failed: mismatching comparison operand types with -O2 -fno-tree-forwprop
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116555 Andrew Pinski changed: What|Removed |Added Resolution|--- |DUPLICATE Status|UNCONFIRMED |RESOLVED --- Comment #1 from Andrew Pinski --- Same underlying issue as PR 116510 . *** This bug has been marked as a duplicate of bug 116510 ***
[Bug tree-optimization/116556] New: __builtin_object_size does not handle `ptr + (PHI<4,8>)`, only `PHI`
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116556
Bug ID: 116556
Summary: __builtin_object_size does not handle `ptr +
(PHI<4,8>)`, only `PHI`
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Keywords: missed-optimization
Severity: normal
Priority: P3
Component: tree-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: pinskia at gcc dot gnu.org
Target Milestone: ---
Take:
```
void
__attribute__ ((noinline))
test9 (unsigned cond)
{
char *buf2 = __builtin_malloc (10);
char *p;
__SIZE_TYPE__ t;
if (cond)
t = 8;
else
t = 4;
p = &buf2[t];
if (__builtin_object_size (&p[0], 0) != 6)
__builtin_abort ();
}
void
__attribute__ ((noinline))
test9a (unsigned cond)
{
char *buf2 = __builtin_malloc (10);
char *p;
__SIZE_TYPE__ t;
if (cond)
p = &buf2[8];
else
p = &buf2[4];
if (__builtin_object_size (&p[0], 0) != 6)
__builtin_abort ();
}
```
The __builtin_object_size does not handle the pointer in test9 but does handle
the one in test9a.
This is reduced from gcc.dg/builtin-object-size-1.c when improving phiopt's
factor_out_conditional_operation to handle more than just unary operators.
[Bug middle-end/116562] wrong cost of gather load preventing loop from vectored
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116562 --- Comment #2 from Andrew Pinski --- https://gcc.gnu.org/pipermail/gcc/2024-July/244376.html
[Bug target/55212] [SH] Switch to LRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #216 from Kazumoto Kojima --- Created attachment 59034 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59034&action=edit a patch augments 58905 In the problematic case c#214, the subreg pass requires to recognize the insn (insn 224 223 131 17 (set (mem:HI (plus:SI (reg/f:SI 167 [ _13 ]) (reg:SI 0 r0)) [0 S2 A16]) (subreg:HI (reg:SI 236) 0)) "utf16-nopic.go":75:9 -1 (nil)) but it can't be recognized with the new patterns in the 58905. The patch adds it. This patch is assumed to be applied to the top of 58832, 58833, 58883, 58905 and 59000, though it could be reconstructed as the revised 58905. It's tested only with the target libgcc/libstdc++v3/libgo builds and check-gcc excecute.exp on the cross compilers. I plan to do more tests.
[Bug target/115142] [14 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED --- Comment #7 from Jeffrey A. Law --- I don't see that we'll ever backport to gcc-14 or earlier. Closing.
[Bug target/55212] [SH] Switch to LRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #219 from Kazumoto Kojima --- (In reply to Oleg Endo from comment #217) > (In reply to Kazumoto Kojima from comment #216) > Kaz, can you please create a branch devel/sh-lra and add the patches there? > I think it would make it easier to manage the patches. I am currently losing SSH access to gcc.gnu.org. I have chosen not to update it so as not to add one more dormant account when an update is requested. Sorry for the inconvenience.
[Bug middle-end/116555] [15 Regression] ifcvt: ICE: verify_gimple failed: mismatching comparison operand types with -O2 -fno-tree-forwprop
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116555 --- Comment #2 from Andrew Pinski --- (In reply to Andrew Pinski from comment #1) > Same underlying issue as PR 116510 . Just happens the ICE is different because just happens that match pattern does not hit in this case.
[Bug middle-end/116558] New: some diagnostic-color* include FSF (physical) mailing address is included in the license header
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116558 Bug ID: 116558 Summary: some diagnostic-color* include FSF (physical) mailing address is included in the license header Product: gcc Version: 15.0 Status: UNCONFIRMED Keywords: internal-improvement Severity: normal Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: pinskia at gcc dot gnu.org CC: dmalcolm at gcc dot gnu.org Target Milestone: --- These 2 files include the FSF (physical) mailing address but most other files in GCC have this removed already: ``` diagnostic-color.cc: Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA diagnostic-color.h: Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA ```
[Bug middle-end/116562] New: wrong cost of gather load preventing loop from vectored
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116562
Bug ID: 116562
Summary: wrong cost of gather load preventing loop from
vectored
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: kugan at gcc dot gnu.org
Target Milestone: ---
typedef int real_t;
extern __attribute__((aligned(64))) real_t a[32000],b[32000],c[32000],d[32000];
void s4117()
{
for (int i = 0; i < 32000; i++) {
a[i] = b[i] + c[i/2] * d[i];
}
}
is not vectored for AdvSIMD due to wrong cost calculation.
Compiler option used: cc1plus -Ofast -fdump-tree-vect-all -mcpu=neoverse-v2
--param=aarch64-autovec-preference=1
tt.c:6:21: note: Cost model analysis:
Vector inside of loop cost: 64
Vector prologue cost: 0
Vector epilogue cost: 0
Scalar iteration cost: 15
Scalar outside cost: 0
Vector outside cost: 0
prologue iterations: 0
epilogue iterations: 0
tt.c:6:21: missed: cost model: the vector iteration cost = 64 divided by the
scalar iteration cost = 15 is greater or equal to the vectorization factor = 4.
tt.c:6:21: missed: not vectorized: vectorization not profitable.
tt.c:6:21: missed: not vectorized: vector version will never be profitable.
tt.c:6:21: missed: Loop costings may not be worthwhile.
tt.c:6:21: note: * Analysis failed with vector mode V4SI
We cost this c[i/2] as having the cost of 4 loads and one construct. I think we
should special case these sort of gather loads which as lower cost in practice?
11233 if (costing_p)
11234 {
11235 /* For emulated gathers N offset vector element
11236 offset add is consumed by the load). */
11237 inside_cost = record_stmt_cost (cost_vec,
const_nunits,
11238 vec_to_scalar,
stmt_info,
11239 0, vect_body);
11240 /* N scalar loads plus gathering them into a
11241 vector. */
11242 inside_cost
11243 = record_stmt_cost (cost_vec, const_nunits,
scalar_load,
11244 stmt_info, 0, vect_body);
11245 inside_cost
11246 = record_stmt_cost (cost_vec, 1, vec_construct,
11247 stmt_info, 0, vect_body);
11248 continue;
11249 }
[Bug rtl-optimization/116560] RISC-V : rv32 code optimization , big code difference between 8/9.x and 10.x
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116560
Andrew Pinski changed:
What|Removed |Added
Target||riscv, mips
Component|target |rtl-optimization
Status|UNCONFIRMED |NEW
Keywords||missed-optimization
Ever confirmed|0 |1
Last reconfirmed||2024-09-01
--- Comment #1 from Andrew Pinski ---
Same bad code can be produced by:
```
typedef unsigned short type1 __attribute__((may_alias, aligned(1)));
unsigned char test_swap1(unsigned char *ptr, unsigned *res)
{
type1 *t = (type1 *)ptr;
unsigned short temp=*t;
temp = __builtin_bswap16(temp);
*res=temp;
if (temp==0) return 1;
return 0;
}
```
The problem only happens on strict aligned targets (MIPS, SPARC, RISCV) which
don't have a 16 byte swap.
[Bug tree-optimization/116556] __builtin_object_size does not handle `ptr + (PHI<4,8>)`, only `PHI`
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116556 --- Comment #1 from Andrew Pinski --- Note I think this is also the reason why I get a failure in gcc.dg/Warray-bounds-92.c too.
[Bug target/116512] [12/13/14/15 Regression] vzeroupper emitted even though the upper half of the z registers are returned
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116512 --- Comment #10 from GCC Commits --- The releases/gcc-12 branch has been updated by hongtao Liu : https://gcc.gnu.org/g:6585b06303d8fd9da907f443fc0da9faed303712 commit r12-10694-g6585b06303d8fd9da907f443fc0da9faed303712 Author: liuhongt Date: Thu Aug 29 11:39:20 2024 +0800 Check avx upper register for parallel. For function arguments/return, when it's BLK mode, it's put in a parallel with an expr_list, and the expr_list contains the real mode and registers. Current ix86_check_avx_upper_register only checked for SSE_REG_P, and failed to handle that. The patch extend the handle to each subrtx. gcc/ChangeLog: PR target/116512 * config/i386/i386.cc (ix86_check_avx_upper_register): Iterate subrtx to scan for avx upper register. (ix86_check_avx_upper_stores): Inline old ix86_check_avx_upper_register. (ix86_avx_u128_mode_needed): Ditto, and replace FOR_EACH_SUBRTX with call to new ix86_check_avx_upper_register. gcc/testsuite/ChangeLog: * gcc.target/i386/pr116512.c: New test. (cherry picked from commit ab214ef734bfc3dcffcf79ff9e1dd651c2b40566)
[Bug target/55212] [SH] Switch to LRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #217 from Oleg Endo --- (In reply to Kazumoto Kojima from comment #216) > Created attachment 59034 [details] > a patch augments 58905 > > In the problematic case c#214, the subreg pass requires to recognize the insn > > (insn 224 223 131 17 (set (mem:HI (plus:SI (reg/f:SI 167 [ _13 ]) > (reg:SI 0 r0)) [0 S2 A16]) > (subreg:HI (reg:SI 236) 0)) "utf16-nopic.go":75:9 -1 > (nil)) > > but it can't be recognized with the new patterns in the 58905. The patch > adds it. > > This patch is assumed to be applied to the top of 58832, 58833, 58883, > 58905 and 59000, though it could be reconstructed as the revised 58905. > > It's tested only with the target libgcc/libstdc++v3/libgo builds and > check-gcc excecute.exp on the cross compilers. I plan to do more tests. Kaz, can you please create a branch devel/sh-lra and add the patches there? I think it would make it easier to manage the patches.
[Bug middle-end/116555] New: [15 Regression] ifcvt: ICE: verify_gimple failed: mismatching comparison operand types with -O2 -fno-tree-forwprop
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116555
Bug ID: 116555
Summary: [15 Regression] ifcvt: ICE: verify_gimple failed:
mismatching comparison operand types with -O2
-fno-tree-forwprop
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Keywords: ice-on-valid-code
Severity: normal
Priority: P3
Component: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: zsojka at seznam dot cz
Target Milestone: ---
Host: x86_64-pc-linux-gnu
Target: x86_64-pc-linux-gnu
Created attachment 59033
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59033&action=edit
auto-reduced testcase
Compiler output:
$ x86_64-pc-linux-gnu-gcc -O2 -fno-tree-forwprop testcase.C
testcase.C: In function 'void InputLoop()':
testcase.C:16:6: error: mismatching comparison operand types
16 | void InputLoop() {
| ^
int
WindowClass
_15 = window_class.1_10 == 2;
testcase.C:16:6: error: mismatching comparison operand types
int
WindowClass
_16 = window_class.1_10 == 0;
during GIMPLE pass: ifcvt
testcase.C:16:6: internal compiler error: verify_gimple failed
0x2ee2c2e internal_error(char const*, ...)
/repo/gcc-trunk/gcc/diagnostic-global-context.cc:492
0x18fa13d verify_gimple_in_cfg(function*, bool, bool)
/repo/gcc-trunk/gcc/tree-cfg.cc:5681
0x176ad84 execute_function_todo
/repo/gcc-trunk/gcc/passes.cc:2089
0x176b2de execute_todo
/repo/gcc-trunk/gcc/passes.cc:2143
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
$ x86_64-pc-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-latest/bin/x86_64-pc-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-r15-3345-20240831234259-g592a335de56-checking-yes-rtl-df-extra-nobootstrap-amd64/bin/../libexec/gcc/x86_64-pc-linux-gnu/15.0.0/lto-wrapper
Target: x86_64-pc-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--disable-bootstrap --with-cloog --with-ppl --with-isl
--build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu
--target=x86_64-pc-linux-gnu --with-ld=/usr/bin/x86_64-pc-linux-gnu-ld
--with-as=/usr/bin/x86_64-pc-linux-gnu-as --enable-libsanitizer
--disable-libstdcxx-pch
--prefix=/repo/gcc-trunk//binary-trunk-r15-3345-20240831234259-g592a335de56-checking-yes-rtl-df-extra-nobootstrap-amd64
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 15.0.0 20240901 (experimental) (GCC)
[Bug middle-end/116555] [15 Regression] ifcvt: ICE: verify_gimple failed: mismatching comparison operand types with -O2 -fno-tree-forwprop
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116555 Andrew Pinski changed: What|Removed |Added Target Milestone|--- |15.0
[Bug fortran/109467] inconsistent formatting/case of keywords in error messages in Fortran front end
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109467 --- Comment #2 from sandra at gcc dot gnu.org --- I guess the best thing to do is follow the respective standards, e.g. % for Fortran keywords % for OpenMP keywords I guess Gnu extension keywords could be either upper or lower case, provided both are recognized. There are likely a lot of test cases that match on error messages that would have to be adjusted.
[Bug target/113941] Switch mn10300 to LRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113941
--- Comment #1 from Jeffrey A. Law ---
Not really working on this and I'm not going to lose sleep if this port is
deprecated. But in case someone does care, here's a couple hints.
First the mn103 port will trip an internal consistency check in LRA. This is a
quirk in how LRA checks for secondary reloads. If a pseudo is allocated into
an eliminable hard reg (say the frame pointer if we didn't need the frame
pointer), then the register class used for determining secondary reloads will
be the class of the elimination target register, ie sp.
This patch makes the secondary reload code consistent:
diff --git a/gcc/config/mn10300/mn10300.cc b/gcc/config/mn10300/mn10300.cc
index 1cf08114bd9..0d6a0dd99f7 100644
--- a/gcc/config/mn10300/mn10300.cc
+++ b/gcc/config/mn10300/mn10300.cc
@@ -1369,7 +1369,12 @@ mn10300_secondary_reload (bool in_p, rtx x, reg_class_t
rclass_i,
if (xregno >= FIRST_PSEUDO_REGISTER)
xregno = true_regnum (x);
if (xregno != INVALID_REGNUM)
- xclass = REGNO_REG_CLASS (xregno);
+ {
+ if (!in_p && xregno == FRAME_POINTER_REGNUM)
+ xclass = SP_REGS;
+ else
+ xclass = REGNO_REG_CLASS (xregno);
+ }
}
if (!TARGET_AM33)
Second, the compiler will go into an infinite loop in LRA. I haven't really
investigated deeply.
[Bug target/116256] [15 Regression] RISC-V: testsuite failures since late-combine-pass
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116256
Jeffrey A. Law changed:
What|Removed |Added
Ever confirmed|0 |1
Status|UNCONFIRMED |NEW
Last reconfirmed||2024-09-02
CC||law at gcc dot gnu.org
--- Comment #2 from Jeffrey A. Law ---
Most of these should be fixed at this point...
cm_mv_rv32, calling-convention-?, shorten-memrefs-?
I left dup-{1,2,3} and vlmax_back_prop-37 and vsetvl-15 as-is. I couldn't
convince myself that my local changes were actually desirable. We really need
someone to dive into the before/after again on those. If the after is
reasonable, then obviously we update the test. If not, then we have a
regression related to late-combine and it needs to be marked as-such so that
it's considered during the gcc-15 bugfixing cycle.
[Bug middle-end/116562] wrong cost of gather load preventing loop from vectored
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116562 --- Comment #1 from Andrew Pinski --- I think I saw the same effect on another testcase too.
[Bug middle-end/116510] [15 Regression] ice in decompose, at wide-int.h:1049
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116510 --- Comment #10 from Andrew Pinski --- *** Bug 116555 has been marked as a duplicate of this bug. ***
[Bug modula2/116557] m2: FSF (physical) mailing address is included in the license header
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116557 Gaius Mulley changed: What|Removed |Added Last reconfirmed||2024-09-01 Status|UNCONFIRMED |ASSIGNED Ever confirmed|0 |1 --- Comment #1 from Gaius Mulley --- Thanks for reporting the discrepancy - I'll remove the physical addresses.
[Bug target/112434] unexpected error when compiling for riscv64: invalid 'asm': invalid use of '%c'
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112434 --- Comment #5 from Levi Zim --- Created attachment 59037 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59037&action=edit Patch for fix this bug
[Bug target/116512] [12/13/14/15 Regression] vzeroupper emitted even though the upper half of the z registers are returned
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116512 Hongtao Liu changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED --- Comment #11 from Hongtao Liu --- Fixed in GCC12.5/GCC13.4/GCC14.3/GCC15
[Bug target/116278] [15] RISC-V: Miscompile at -O2 -fwrapv -fno-strict-aliasing
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116278 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC||law at gcc dot gnu.org Resolution|--- |FIXED --- Comment #14 from Jeffrey A. Law --- Should be fixed on the trunk now.
[Bug c/116560] New: RISC-V : rv32 code optimization , big code difference between 8/9.x and 10.x
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116560
Bug ID: 116560
Summary: RISC-V : rv32 code optimization , big code difference
between 8/9.x and 10.x
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: jmic...@georgiatech-metz.fr
Target Milestone: ---
C code (mostly swap big-endian to u16 variable + a test) :
#include
uint8_t test_swap(uint8_t *ptr, uint32_t *res)
{
uint16_t temp=(ptr[0]<<8)|ptr[1];
*res=temp;
if (temp==0) return 1;
return 0;
}
Up to 9.x, with -O2, the generated code is great , with 1 OR:
test_swap:
lbu a5,0(a0)
sllia5,a5,8
lbu a0,1(a0)
or a0,a5,a0
sw a0,0(a1)
seqza0,a0
ret
After 9.x (tested on godbolt.org - https://godbolt.org/z/f38EaosxM ),
useless slli/srli, and 2 OR...
test_swap:
lbu a5,1(a0)
lbu a4,0(a0)
sllia0,a5,8
or a0,a0,a4 // ptr[1]<<8 | ptr[0] ??? why ? want the opposite
sllia5,a0,8 // ptr[1]<<16 | ptr[0]<<8 | 0
srlia0,a0,8 // ptr[1]
or a0,a5,a0 // ptr[1]<<16 | ptr[0]<<8 | ptr[1]
sllia0,a0,16 // and 0x
srlia0,a0,16
sw a0,0(a1) // ptr[0]<<8 | ptr[1]
seqza0,a0
ret
Actually, up to 12.x with -O1, the code is the same as 8.x/9.x
After that, with 13.x and -O1, a pair of useless slli/srli (i.e.
and 0x) is added :
test_swap:
lbu a5,0(a0)
sllia5,a5,8
lbu a4,1(a0)
or a0,a5,a4
sllia0,a0,16 // not necessary
srlia0,a0,16 // not necessary
sw a0,0(a1)
seqza0,a0
ret
[Bug rtl-optimization/116544] [15] RISC-V: Miscompile at -O3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116544 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #5 from Jeffrey A. Law --- Fixed on the trunk.
[Bug rust/116561] New: gcc/testsuite/rust/execute/torture/iter1.rs:350:5: internal compiler error: 'verify_gimple' failed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116561
Bug ID: 116561
Summary: gcc/testsuite/rust/execute/torture/iter1.rs:350:5:
internal compiler error: 'verify_gimple' failed
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rust
Assignee: unassigned at gcc dot gnu.org
Reporter: mark at gcc dot gnu.org
CC: dkm at gcc dot gnu.org, gcc-rust at gcc dot gnu.org,
pierre-emmanuel.patry at embecosm dot com
Target Milestone: ---
A gcc configured with --enable-languages=rust and
--enable-checking=yes,extra,rtl will show failures in
rust/rust/execute/torture/iter1.rs with internal compiler error:
'verify_gimple' failed
https://builder.sourceware.org/buildbot/#/builders/312/builds/24
=== rust tests ===
Running target unix
FAIL: rust/execute/torture/iter1.rs -O1 (internal compiler error:
'verify_gimple' failed)
FAIL: rust/execute/torture/iter1.rs -O1 (test for excess errors)
UNRESOLVED: rust/execute/torture/iter1.rs -O1 compilation failed to produce
executable
FAIL: rust/execute/torture/iter1.rs -O2 (internal compiler error:
'verify_gimple' failed)
FAIL: rust/execute/torture/iter1.rs -O2 (test for excess errors)
UNRESOLVED: rust/execute/torture/iter1.rs -O2 compilation failed to produce
executable
FAIL: rust/execute/torture/iter1.rs -O2 -flto -fno-use-linker-plugin
-flto-partition=none (internal compiler error: 'verify_gimple' failed)
FAIL: rust/execute/torture/iter1.rs -O2 -flto -fno-use-linker-plugin
-flto-partition=none (test for excess errors)
UNRESOLVED: rust/execute/torture/iter1.rs -O2 -flto -fno-use-linker-plugin
-flto-partition=none compilation failed to produce executable
FAIL: rust/execute/torture/iter1.rs -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects (internal compiler error: 'verify_gimple' failed)
FAIL: rust/execute/torture/iter1.rs -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects (test for excess errors)
UNRESOLVED: rust/execute/torture/iter1.rs -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects compilation failed to produce executable
FAIL: rust/execute/torture/iter1.rs -O3 -g (internal compiler error:
'verify_gimple' failed)
FAIL: rust/execute/torture/iter1.rs -O3 -g (test for excess errors)
UNRESOLVED: rust/execute/torture/iter1.rs -O3 -g compilation failed to
produce executable
FAIL: rust/execute/torture/iter1.rs -Os (internal compiler error:
'verify_gimple' failed)
FAIL: rust/execute/torture/iter1.rs -Os (test for excess errors)
UNRESOLVED: rust/execute/torture/iter1.rs -Os compilation failed to produce
executable
=== rust Summary ===
# of expected passes8421
# of unexpected failures12
# of expected failures 69
# of unresolved testcases 6
# of unsupported tests 1
Logs are in bunsen:
https://builder.sourceware.org/testrun/a838fa2940edef1f921401c6066417d2e88b6008?rawfilename=gcc%2Ftestsuite%2Frust%2Frust.log
Executing on host:
/home/builder/shared/x3d1/worker/gcc-fullest-debian-amd64/gcc-build/gcc/testsuite/rust/../../gccrs
-B/home/builder/shared/x3d1/worker/gcc-fullest-debian-amd64/gcc-build/gcc/testsuite/rust/../../
/home/builder/shared/x3d1/worker/gcc-fullest-debian-amd64/gcc/gcc/testsuite/rust/execute/torture/iter1.rs
-fdiagnostics-plain-output
-frust-incomplete-and-experimental-compiler-do-not-use -O1 -lm -o
./iter1.exe(timeout = 10)
spawn -ignore SIGHUP
/home/builder/shared/x3d1/worker/gcc-fullest-debian-amd64/gcc-build/gcc/testsuite/rust/../../gccrs
-B/home/builder/shared/x3d1/worker/gcc-fullest-debian-amd64/gcc-build/gcc/testsuite/rust/../../
/home/builder/shared/x3d1/worker/gcc-fullest-debian-amd64/gcc/gcc/testsuite/rust/execute/torture/iter1.rs
-fdiagnostics-plain-output
-frust-incomplete-and-experimental-compiler-do-not-use -O1 -lm -o ./iter1.exe
/home/builder/shared/x3d1/worker/gcc-fullest-debian-amd64/gcc/gcc/testsuite/rust/execute/torture/iter1.rs:
In function '>::try_from':
/home/builder/shared/x3d1/worker/gcc-fullest-debian-amd64/gcc/gcc/testsuite/rust/execute/torture/iter1.rs:350:5:
error: non-trivial conversion in 'constructor'
union iter1::result::Result
union iter1::result::Result
D.4488 = {};
/home/builder/shared/x3d1/worker/gcc-fullest-debian-amd64/gcc/gcc/testsuite/rust/execute/torture/iter1.rs:350:5:
internal compiler error: 'verify_gimple' failed
0x332987b internal_error(char const*, ...)
../../gcc/gcc/diagnostic-global-context.cc:492
0x1bcbcc6 verify_gimple_in_seq(gimple*, bool)
../../gcc/gcc/tree-cfg.cc:5332
0x17e56ba gimplify_body(tree_node*, bool)
../../gcc/gcc/gimplify.cc:19488
0x17e5865 gimplify_function_tree(tree_node*)
../../gcc/gcc/gimplify.cc:19606
0x15e7087 cgraph_node::analyze()
../../gcc/gcc/cgraphunit.cc:687
0x15e9e87 analyze_functions
../../gcc/gcc/cgraphun
[Bug target/55212] [SH] Switch to LRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #218 from John Paul Adrian Glaubitz --- (In reply to Kazumoto Kojima from comment #216) > This patch is assumed to be applied to the top of 58832, 58833, 58883, > 58905 and 59000, though it could be reconstructed as the revised 58905. > > It's tested only with the target libgcc/libstdc++v3/libgo builds and > check-gcc excecute.exp on the cross compilers. I plan to do more tests. Testing this now and see if that fixes the issue with gccgo.
[Bug target/55212] [SH] Switch to LRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #222 from Oleg Endo --- (In reply to Kazumoto Kojima from comment #221) > (In reply to Oleg Endo from comment #220) > > > Ah, OK, understandable. No problem. How about github instead? > > I forked https://github.com/gcc-mirror/gcc and have just added the sh-lra > branch to https://github.com/kazkojima/gcc.git. Hope it helps. Thanks so much!
[Bug ipa/116410] -ffat-lto-objects generates different and inefficient code compared with -fno-fat-lto-objects
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116410 --- Comment #8 from Sam James --- We plan to adopt -ffat-lto-objects ourselves soon for at least a subset of packages, so this was good timing. :)
[Bug tree-optimization/64700] Sink common code through PHI
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64700 --- Comment #10 from Andrew Pinski --- Created attachment 59036 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59036&action=edit Patch which extends to support commutative operations This extends the first patch to support (all) commutative operations. Including ones where the commutative operands are not 0/1. When I submit this, it will be merged in with the other patch but I wanted to attach this as extension on top of the other one.
[Bug rtl-optimization/116544] [15] RISC-V: Miscompile at -O3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116544 --- Comment #4 from GCC Commits --- The master branch has been updated by Jeff Law : https://gcc.gnu.org/g:0562976d62e095f3a00c799288dee4e5b20114e2 commit r15-3360-g0562976d62e095f3a00c799288dee4e5b20114e2 Author: Jeff Law Date: Sun Sep 1 22:16:04 2024 -0600 [committed][PR rtl-optimization/116544] Fix test for promoted subregs This is a small bug in the ext-dce code's handling of promoted subregs. Essentially when we see a promoted subreg we need to make additional bit groups live as various parts of the RTL path know that an extension of a suitably promoted subreg can be trivially eliminated. When I added support for dealing with this quirk I failed to account for the larger modes properly and it ignored the case when the size of the inner object was > 32 bits. Opps. This does _not_ fix the outstanding x86 issue. That's caused by something completely different and more concerning ;( Bootstrapped and regression tested on x86. Obviously fixes the testcase on riscv as well. Pushing to the trunk. PR rtl-optimization/116544 gcc/ * ext-dce.cc (ext_dce_process_uses): Fix thinko in promoted subreg handling. gcc/testsuite/ * gcc.dg/torture/pr116544.c: New test.
[Bug tree-optimization/116559] New: tree-switch-conversion.cc has FSF (physical) mailing address is included in the license header
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116559 Bug ID: 116559 Summary: tree-switch-conversion.cc has FSF (physical) mailing address is included in the license header Product: gcc Version: 15.0 Status: UNCONFIRMED Keywords: internal-improvement Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: pinskia at gcc dot gnu.org CC: jamborm at gcc dot gnu.org Target Milestone: --- These file include the FSF (physical) mailing address but most (over 90%) other files in GCC have this removed already: ``` tree-switch-conversion.cc:Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA ```
