[arm] possible bug in G++ 3.4.x

2005-02-28 Thread Vladimir Ivanov
Hello all,
While compiling this:
http://sourceforge.net/projects/raytracer/
I think I've spotted a bug in ARM port of G++.
The problem is that many method functions tend to save all callee-saved FP 
registers, while they use few or none of them.

Here's a small snippet from "base3d.cpp" file:
0528 <_ZN6Base3d8rotateV1Ed>:
 528:   e1a0c00dmov ip, sp
 52c:   e92ddff0stmdb   sp!, {r4, r5, r6, r7, r8, r9, sl, fp, 
ip, lr, pc}
 530:   ed2d420csfm f4, 4, [sp, #-48]!
 534:   e24cb004sub fp, ip, #4  ; 0x4
 538:   e24dd0ccsub sp, sp, #204; 0xcc
 53c:   e59f3288ldr r3, [pc, #648]  ; 7cc <.text+0x7cc>
 ...
Function uses only F0 register, although F4-F7 are saved/restored. This 
leads to great speed penalty, especially when coprocessors like Crunch 
have many registers.

PowerPC port shows no such problem, so I think it's something in ARM port.
Sorry I cannot provide small enough example, C++ is not my area of 
expertise.

Best regards,
  -- Vladimir


Re: [arm] possible bug in G++ 3.4.x

2005-03-01 Thread Vladimir Ivanov
Hello,
[Richard]:
Does this mean that GCC-3.4.x won't be fixed?
[Paul]:
Is this problem present also in CSL-3.4.x branch?
Best regards,
  -- Vladimir
On Tue, 1 Mar 2005, Richard Earnshaw wrote:
On Mon, 2005-02-28 at 12:51, Vladimir Ivanov wrote:
Hello all,
While compiling this:
http://sourceforge.net/projects/raytracer/
I think I've spotted a bug in ARM port of G++.
The problem is that many method functions tend to save all callee-saved FP
registers, while they use few or none of them.
Here's a small snippet from "base3d.cpp" file:
0528 <_ZN6Base3d8rotateV1Ed>:
  528:   e1a0c00dmov ip, sp
  52c:   e92ddff0stmdb   sp!, {r4, r5, r6, r7, r8, r9, sl, fp, 
ip, lr, pc}
  530:   ed2d420csfm f4, 4, [sp, #-48]!
  534:   e24cb004sub fp, ip, #4  ; 0x4
  538:   e24dd0ccsub sp, sp, #204; 0xcc
  53c:   e59f3288ldr r3, [pc, #648]  ; 7cc <.text+0x7cc>
  ...
Function uses only F0 register, although F4-F7 are saved/restored. This
leads to great speed penalty, especially when coprocessors like Crunch
have many registers.
PowerPC port shows no such problem, so I think it's something in ARM port.
Sorry I cannot provide small enough example, C++ is not my area of
expertise.
[I tried to reply to this yesterday, but the response has failed to show
up here.  I suspect it was mailer problems at my end, but if you get
this twice I apologise.]
I think this is most likely a consequence of SJLJ exceptions.  It should
be fixed when we move to the EABI unwinding tables.
R.