Question about register allocation (GCC 4.1)
Hello all, I have a question about retargeting the back-end of GCC 4.1. Our targeted architecture uses four classes of registers: global ($RG), locals ($RL), dependents ($RD), shareds ($RS). In total 31 hard registers available for the all previous classes. The amount of each register is only known at compile-time depending on the needs of the program. Normally I would have to specify the number of registers for each class in the .md and .h files which describe the targeted architecture. But is it possible to have an arbitrary number of register in each class and the number would be given by the compiler depending on the needs of registers at compile-time (when the compiler discovers how many registers of each class are needed) ??? Let's take an example... A source file A needs 10 registers for the globals, 11 for the locals, 5 for dependents and 5 for shareds (10RG+11RL+5RD+5RS<=31). And for a program B needs 11 globals, 13 for the locals, 3 for dependents and 4 for shareds (11RG+13RL+3RD+4RS<=31). Finally the program C needs 3 globals and 10 locals (3RG+10RL<<31). So basically this is known at compile-time. Such as "dynamic" register allocator. Is it that possible and what are the implications on the register allocator ??? Thanks in advance, Regards, T.
Question about source-to-source compilation
Hello all, As far as I know, GCC 4.x is easily retargetable for a new architecture. I would be interested by source-to-source compilation with the GCC framework. For instance, let's say the input language is C and the output language is C annotated with pragmas which are the results of some code analysis (done at middle-end level). I do not think that the GCC back-end could support a programming language such as C, C++ or Java. Is GCC 4.x designed to source-to-source compilation ? Is that possible or do I miss something here ? Thanks in advance, T.
GCC Compiler
Dear Sir, My name is Thomas Bernard. I am working as a Master Student for the UvA (Universitat Van Amsterdam) in the section of Computers Systems Architecture of the Informatics Institute. I am doing a study about compilers. I have to monitor many existing compilers and benchmark them. After I have to modify and optimize the 'back-end' part for multithreads models. I have found your works and I would like to have more informations about the IR (Intermediate Representation) during the compilation. For example, if a file containing the IR is created during the compilation. If there is another way,I would like to know how can I access the IR. Is it easy to modify? etc... If you can give me some documents about your IR (and RTL, Back-End). Best wishes, Thomas Bernard -- ===== Thomas Bernard Section of Computer Systems Architecture Universiteit van Amsterdam Informatics Institute Kruislaan 403 1098 SJ Amsterdam Room F.221 E-Mail: [EMAIL PROTECTED] Cell Phone : +33 6 18 22 67 83 =
C front-end - GCC 4.1
Hello , I am currently extending the existing C front-end of GCC 4.1. Basically, I add new keywords into the set of the C language. I have already done a big part of the lexical and syntax analysis of each new keywords. I work on the files "c-common.h", "c-parser.c", "c-tree.h", "c-decl.c", "c-typeck.c" located in the directory '/gcc'. I am confused about also extending the Abstract Syntax Tree of GCC and also the GENERIC form. I would be grateful if someone can explain me which files are used for the operations on the AST and the code generation of the GENERIC form. Cheers, Thomas
Extending RTL expansion and CG with a new operation
Hello
I am extending the backend of GCC 4.1 with a new operation which maps
directly from a keyword in the language. So far I extended the frontend
and middleend in order to handle this new keyword. I managed to generate
the GIMPLE form and a valid CFG and a RTL object for this keyword.
Basically this keyword is handled as a jump-like instruction within the
RTL language.
Within the backend, I updated the following files to support this new
operation which is a kinda specific jump with a condition 'cre'.
- tree.def: the tree code for the keyword
- rtl.def: my new rtl operators
- optabs.h / .c: declaration of operators tables for tree-to-rtl
translations
- expr.c: expansion of trees into RTL expressions
- I also extended the files alpha.c/.d and alpha.md which the
architecture I target
- jump.c: handle the condition of my new jump
- dojump.c: handle the new jump I define
The 'expansion' is performed correctly (the RTL file is valid) and the
'cg' stage gives the following error:
-
kerneltest.c:22: error: unrecognizable insn:
(jump_insn 26 25 29 3 (set (pc)
(create_body_after (cre (reg:DI 75)
(const_int 0 [0x0]))
(label_ref 13)
(pc))) -1 (nil)
(nil))
kerneltest.c:22: internal compiler error: in extract_insn, at recog.c:2096
Please submit a full bug report,
with preprocessed source if appropriate.
See http://gcc.gnu.org/bugs.html> for instructions.
-
Basically it says the new isns I added have not been recognized. Within
the function 'extract_insn', the function 'recog_memoized is called. The
code can be found in the file "recog.h" (cf following).
---recog.h--
static inline int
recog_memoized (rtx insn)
{
if (INSN_CODE (insn) < 0)
INSN_CODE (insn) = recog (PATTERN (insn), insn, 0);
return INSN_CODE (insn);
}
#endif
-
The function 'recog' is coded in a file 'insn-recog.c' which is
generated at bootstrap-time by the file 'genrecog.c'
Does anyone have a clue for solving the problem? I am really open to any
suggestions. ;-)
Thanks in advance,
Thomas
