9 Nov 06 notes from GCC improvement for Itanium conference call

2006-11-10 Thread Mark K. Smith
ON THE CALL: Kenny Zadack (Natural Bridge), Diego Novillo (Red Hat),
Vladimir Makarov (Red Hat), Mark Smith (Gelato), Bob Kidd (UIUC),
Andrey Belevantsev (RAS), Arutyun Avetisyan (RAS), Mark Davis (Intel),
Sebastian Pop (Ecole des Mines de Paris)

Agenda:
1) Gelato ICE April GCC track proposed content (Mark S.)
2) GCC4.2 & GCC 4.3 update, alias analysis update (Diego)
3) Scheduler work update, potential new software pipelining project
(Andrey)
4) LTO update (Kenny)
5) Superblock work update (Bob)

##
1) Gelato ICE April GCC track proposed content (Mark S.)

The content for the GCC track at the upcoming Gelato ICE San Jose
(April 15-18) conference was proposed (still need to confirm with
several speakers):

 - ISP-Russian Academy of Sciences: update on scheduler work, discuss
progress on new software pipelining work
 - Martin Michlmayr: compiling Debian using GCC 4.2 and Osprey
 - Shin-ming Liu: HP GCC and Osprey update
 - Kenny Zadack - update on LTO
 - Bob Kidd - update on superblock work
 - Zdenek Dvorak - update on prefetching work
 - Diego Novillo - update on alias analysis work
 - Matthieu Delahaye - update on Gelato GCC build farm
 - Dan Berlin - GPL2 and GPL3 presentation

##
2) GCC4.2 & GCC 4.3 update, alias analysis update (Diego)

GCC 4.2 & 4.3 update:
-
4.2 has branched.  Likely release in early 2007.

Many major pieces of work being scheduled for GCC 4.3 (SSA across the
callgraph, overhaul dataflow in the backend, overhaul SSA form for
memory, reduce memory footprint in the IL, autoparallelization, new
vectorization, new interprocedural optimizations, etc).

The full list is at http://gcc.gnu.org/wiki/GCC_4.3_Release_Planning

Alias analysis update: 
--
no changes to analysis, representation of aliasing is being modified
for 4.3

##
3) Scheduler work update, potential new software pipelining project
(Andrey)

We have merged all major features of selective scheduling and are
tuning it for Itanium.  We use a set of small benchmarks to analyze
the performance of the scheduler. At this moment we are neutral on
half of the benchmarks, we get 3% speedup on linpack and 5% speedup on
mgrid. We have fixed all of >1% regressions except dhrystone, which
regresses on 4% due to alignment issues. Major part of the bugs we've
fixed is because bundling and instruction choosing mechanism are
tightly coupled with the Haifa scheduler, and we need to support both
schedulers at the same time. We plan to proceed with tuning and
implement the driver for software pipelining for the next month.

We also plan to fix swing modulo scheduling to make it work on ia64
and improve it by propagating data dependency information to RTL. We
plan to discuss this project on the GCC mailing list in a few weeks.

Comments by Vladimir:
-
About software pipelining for Itanium: It is completely broken, more
accurately it never worked for Itanium. Because it is very (probably
most) important optimization for Itanium, after making SP working it
should be switched on by default at least for Itanium to keep it
working.  GCC has a lot of optimizations which are not on by default
and they have tendency to be broken sometime.

About insn bundling and insn scheduler hooks for Itanium:  Usually
the scheduler hooks are very few lines.  This is not case for
Itanium.I believe there is a potential for generating better quality
code by improving bundling and hooks.  Unfortunately, the code is
"spaghetti" code which is hard to understand.

##
4) LTO update (Kenny)

The LTO branch has made some progress: there is work underway by Mark
Mitchell, Sandra Loosemore, and myself to serialize three codes and
the declarations and types into sections inside the .o files.  I have
stopped working on this temporarily while I complete the work on the
dataflow branch. 

I expect that after the first of the year there will be a lot of
progress on this.  We should soon be able to serialize code and
compile it at link time.  This will still leave many problems open for
other to help with, including more aggressive optimizations, as well
as providing some mechanism to distributing/parallelizing the
compilation.

##
5) Superblock work update (Bob)

I'm merging mainline into the ia64-improvements branch. As soon as
that is finished, I will run a regression on the Superblock pass and
prepare a patch to submit to gcc-patches. This work has been on the
back burner for the past couple weeks due to an upcoming paper
deadline.

I'm writing a paper documenting the changes we made to IMPACT's
intermediate representation to allow interprocedural analysis to be
performed more easily. We were able to extend IMPACT's IR from one
stored completely in memory to one that can be stored partially in
memory and partially on disk. This allows us to reduce the memory
requirements for the compiler when processing modern, large program.
This paper will lik

ANNOUNCE: Gelato ICE GCC track, San Jose, CA, April 16-18, 2007

2007-02-05 Thread Mark K. Smith
The following GCC track is part of the Gelato ICE (Itanium Conference
& Expo) technical program, April 16-18, 2007, San Jose, CA. All
interested GCC developers are invited to attend .
A working list of speakers and topics can be found here:


This year there is a strong focus on Linux. Andrew Morton and Wim
Coekaerts, Senior Director for Linux Engineering at Oracle, are
keynote speakers. In addition to the GCC track, there are tracks
covering the Linux IA-64 kernel, virtualization, tools and tuning,
multi-core programming, and research.

GCC Track at Gelato ICE:

- Update on Scheduler Work & Discussion of New Software Pipelining
Work, Arutyun Avetisyan, Russian Academy of Science
- GPL2 and GPL3, Dan Berlin, Google
- Update on the Gelato GCC Build Farm, Matthieu Delahaye, 
Gelato Central Operations
- Update on Prefetching Work, Zdenek Dvorak, SuSE
- Interprocedural Optimization Framework, Jan Hubicka, SuSE
- Update on Superblock Work, Bob Kidd, University of Illinois
- GCC and Osprey Update, Shin-Ming Liu, HP
- Compiling Debian Using GCC 4.2 and Osprey, Martin Michlmayr, Debian
- Update on Alias Analysis Work, Diego Novillo, Redhat
- Update on LTO, Kenneth Zadeck, NaturalBridge



RE: testing GCC 4.2 on IA64 using Debian as a test suite <--- correction

2007-02-05 Thread Mark K. Smith
> Eight IA64 specific and 10 generic GCC defects previously unknown
> were identified. All these bugs have been reported to the GCC bug 
> tracker together with test cases and have all been fixed.

Correction/clarification: All IA-64 specific bugs have been fixed.



15 Sept notes from GCC improvement for Itanium conference call

2005-09-19 Thread Mark K. Smith
ON THE CALL: Bob Kidd (UIUC), Vladimir Makarov (Red Hat), Mark Smith
(Gelato), Wenguang Chen (Tsinghua), Mark Davis (Intel), Diego Novillo
(Red Hat), Andrey Belevantsev (RAS), Dan Berlin (dberlin.org), Wen-mei
Hwu (UIUC)

The call covered:
- current status / updates on the 3 improvement areas 
- brain storming how to help out Dan with the alias analysis
  improvement TODO list
- GCC session at Brazil Gelato meeting
- planned presentations (tentative schedule): 
   - Diego Novillo (Monday 10/3, 7:30 to 8pm)
   - Shin-ming Liu (Monday 10/3, 8 to 8:30pm)
   - Bob Kidd (Monday 10/3, 8:30 to 9pm
   - Canqun Yang (Tuesday 10/4, 10 to 10:30am)
- general discussion (Tuesday 10/4, 10:30 to 11:30am)
   - next steps, action items
   - continue discussion on alias analysis improvements 
 and determine concrete ways to help
   - review and update IA-64 project list
   - a discussion on corporate IP needed for GCC -- 
 can companies donate IP to GCC? 
- planned attendance (from those on the call)
   - Bob Kidd
   - Shin-ming Liu
   - Mark Davis
   - Wenguang Chen
   - Diego Novillo
   - Mark Smith 

Additional detail can be found below.

NEXT MEETING: At Gelato Meeting in Porto Alegre, Brazil, October 2-5,
2005. 

Bob Kidd:
-
The patch to move superblock formation is ready to go and tested on  
x86, x86_64, and ia64.  I'll post it to gcc-patches and post a  
message to the gcc mailing list with details shortly.

Dan Berlin:
---
The current status of the aliasing work is that work is proceeding on
both intraprocedural and interprocedural call clobbering.  Most of the
infrasturcture to get it to be able to be start work on the actual
improved algorithms and use the results is done, or will be done by
next week.

The main task that it would be helpful to have other people work on
would be the "Aliasing Oracle" (pairwise query system for statements)
implementation for tree-ssa.  The backend already uses a query system
exclusively (because it's aliasing is almost exclusively type based).
This is an alternate way of representing and accessing the aliasing
results that can provide better information (though more expensive to
query) than the current representation provides.  Our current analyses
can actually provide better information that we represent.  The
eventual plan is to have a hybrid where optimizations use the current
"virtual ssa" form to discover what appear to be things that alias,
then query the "Aliasing Oracle" to see if it can disambiguate the
aliases further if necessary (IE it decides it wants to try to sink a
store past that point, or whatever).

The implementation can start out simple, (IE even something that
simply looked at base + offset of pointers in the two statements, and
gave answers, would be a good start)  and I'm more than happy to help
mentor/introduce anyone to how to work with GCC's tree-ssa form to
make this work, if they want to help implement it.  Seriously.  I'm
really more than happy to spend hours teaching someone how to work
with this stuff.  IBM Research is also more than happy to let me do
so.  I already help Ken Zadeck a lot with understanding how to get
things done in GCC, and he has become quite adept at working with GCC
in a short time (< 6 months).  If somebody has the resources to
provide someone competent to work on aliasing, I'm glad to put them to
work for you being productive on GCC :).

Vladimir Makarov:
-
Zdenek Dvorak submitted a patch implementing prefetching on tree-ssa
recently.  It would be interesting to look how it will work for
Itanium.

HP and Intel are interesting in gcc performance improvement.  If HP
and Intel guys know for sure that gcc uses their patents or some their
patents could be used for gcc performance improvement, it would be
good to give FSF a permission to use the patents in gcc.  On the other
hand, investigating what patents gcc uses might be a dangerous thing
because any compiler most probably uses algorithms patented by other
companies.

Diego Novillo:
--
I spoke briefly about GCC's development process:

  * Legal issues need to be resolved early.  Assign personal and
corporate copyright to the FSF.
  * It's important to participate in the main development lists (gcc
and gcc-patches).  IRC is a good meeting place, too.
  * GCC works in three main stages:
o Stage 1: Everything goes.
o Stage 2: Stabilization.
o Stage 3: Bug fixes only.
  * Work that spans multiple GCC stages is done on CVS branches in the
main FSF repository.
  * I will present at the next Gelato conference.  I'll describe GCC's
internals, its development process, what is going on and what
needs to be done.



RE: 15 Sept notes from GCC improvement for Itanium conference call

2005-09-19 Thread Mark K. Smith
Another correction:

Shin-ming Liu (HP) attended the meeting. In fact, he led the call :-) 

> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf
> Of Mark K. Smith
> Sent: Monday, September 19, 2005 4:00 PM
> To: Gelato-GCC; GCC
> Subject: 15 Sept notes from GCC improvement for Itanium conference
> call
> 
> ON THE CALL: Bob Kidd (UIUC), Vladimir Makarov (Red Hat), Mark Smith
> (Gelato), Wenguang Chen (Tsinghua), Mark Davis (Intel), Diego
> Novillo
> (Red Hat), Andrey Belevantsev (RAS), Dan Berlin (dberlin.org), Wen-
> mei
> Hwu (UIUC)
> 
> The call covered:
> - current status / updates on the 3 improvement areas
> - brain storming how to help out Dan with the alias analysis
>   improvement TODO list
> - GCC session at Brazil Gelato meeting
> - planned presentations (tentative schedule):
>- Diego Novillo (Monday 10/3, 7:30 to 8pm)
>- Shin-ming Liu (Monday 10/3, 8 to 8:30pm)
>- Bob Kidd (Monday 10/3, 8:30 to 9pm
>- Canqun Yang (Tuesday 10/4, 10 to 10:30am)
> - general discussion (Tuesday 10/4, 10:30 to 11:30am)
>- next steps, action items
>- continue discussion on alias analysis improvements
>  and determine concrete ways to help
>- review and update IA-64 project list
>- a discussion on corporate IP needed for GCC --
>  can companies donate IP to GCC?
> - planned attendance (from those on the call)
>- Bob Kidd
>- Shin-ming Liu
>- Mark Davis
>- Wenguang Chen
>- Diego Novillo
>- Mark Smith
> 
> Additional detail can be found below.
> 
> NEXT MEETING: At Gelato Meeting in Porto Alegre, Brazil, October
2-5,
> 2005.
> 
> Bob Kidd:
> -
> The patch to move superblock formation is ready to go and tested on
> x86, x86_64, and ia64.  I'll post it to gcc-patches and post a
> message to the gcc mailing list with details shortly.
> 
> Dan Berlin:
> ---
> The current status of the aliasing work is that work is proceeding
> on
> both intraprocedural and interprocedural call clobbering.  Most of
> the
> infrasturcture to get it to be able to be start work on the actual
> improved algorithms and use the results is done, or will be done by
> next week.
> 
> The main task that it would be helpful to have other people work on
> would be the "Aliasing Oracle" (pairwise query system for
> statements)
> implementation for tree-ssa.  The backend already uses a query
> system
> exclusively (because it's aliasing is almost exclusively type
based).
> This is an alternate way of representing and accessing the aliasing
> results that can provide better information (though more expensive
> to
> query) than the current representation provides.  Our current
> analyses
> can actually provide better information that we represent.  The
> eventual plan is to have a hybrid where optimizations use the
> current
> "virtual ssa" form to discover what appear to be things that alias,
> then query the "Aliasing Oracle" to see if it can disambiguate the
> aliases further if necessary (IE it decides it wants to try to sink
> a
> store past that point, or whatever).
> 
> The implementation can start out simple, (IE even something that
> simply looked at base + offset of pointers in the two statements,
> and
> gave answers, would be a good start)  and I'm more than happy to
> help
> mentor/introduce anyone to how to work with GCC's tree-ssa form to
> make this work, if they want to help implement it.  Seriously.  I'm
> really more than happy to spend hours teaching someone how to work
> with this stuff.  IBM Research is also more than happy to let me do
> so.  I already help Ken Zadeck a lot with understanding how to get
> things done in GCC, and he has become quite adept at working with
> GCC
> in a short time (< 6 months).  If somebody has the resources to
> provide someone competent to work on aliasing, I'm glad to put them
> to
> work for you being productive on GCC :).
> 
> Vladimir Makarov:
> -
> Zdenek Dvorak submitted a patch implementing prefetching on tree-ssa
> recently.  It would be interesting to look how it will work for
> Itanium.
> 
> HP and Intel are interesting in gcc performance improvement.  If HP
> and Intel guys know for sure that gcc uses their patents or some
> their
> patents could be used for gcc performance improvement, it would be
> good to give FSF a permission to use the patents in gcc.  On the
> other
> hand, investigating what patents gcc uses might be a da

notes, presentations from GCC Improvement for Itanium sessions at Gelato meeting, Oct 3-4, 2005

2005-10-26 Thread Mark K. Smith
http://gcc.gelato.org/PortoAlegreMeeting

We had excellent sessions and extended time to discuss improving GCC
on Itanium. Please refer to the discussion notes for additional
information. Many thanks to the presenters and to Shin-ming Liu (HP)
for leading the discussion.



10 Nov notes from GCC improvement for Itanium conference call

2005-11-15 Thread Mark K. Smith
ON THE CALL: Shin-ming Liu (HP), Vladimir Makarov (Red Hat), Diego
Novillo (Red Hat), Mark Smith (Gelato), Andrey Belevantsev (RAS),
Arutyun Avetisyan (RAS), Bob Kidd (UIUC), Mark Davis (Intel)

The call covered:
1. Setting up GCC branch for Itanium-related work
2. Alias analysis update from RAS and Diego
3. Superblock update from UIUC
4. HP update from Shin
4. Scheduler work from RAS

Mark S. will work on securing a Montecito SDV to help test GCC builds.
Information about submitting proposals to ISA for GCC work was
distributed to the group. Additional call details can be found below. 

NEXT MEETING: December 8th, 2005. Details will be emailed out prior to
the call.

Andrey Belevantsev:
---
We are working on the first part of the new scheduler infrastructure.
This part is a set of routines that gather the instructions available
for scheduling. We'd put this on the ia64 branch as soon as this would
be ready, hopefully in a couple of weeks.

I've tested the tree prefetching pass from the killloop-branch,
written by Zdenek Dvorak some time ago. At that time, the branch
wasn't stable enough, so SPEC INT results didn't show much. But the
pass is a win for SPEC FP tests (8 of 14 tests worked, ~10% mean, from
6% to 40%).

I've also tested the killloop branch together with the speculation
patch, and the speedups when compared to the pristine branch are more
or less the same  (as when comparing head+speculation against head)
for SPEC FP. The prefetching though helps the speculation for SPEC INT
tests (bzip2 speedup is increased by 6%). Probably it's time to redo
this testing, because the killloop branch has significantly changed
since then.

We'll send the alias propagation patch to the list in a few days. The
patch will be put on the ia64 branch then, as well as the other ready
patches. We've got the confirmation from the FSF for three of us who
participated in the last project (Maxim Kuvyrkov, Dmitry Melnik and
myself). So to start working on the branch we'll need just the auth
tokens in the repository. 

Bob Kidd:
-
There's not much new to report on the Superblock scheduling work.  I
received a cleaned version of the patch from Steven Bosscher, but I
haven't had time to look at it yet.  I'm working with Diego to set up
a branch from the FSF tree and will look into setting up a machine to
periodically do performance regressions.

Shin-ming Liu:
--
HP has done a few things in the past month.  We packaged and tested
GCC4.0.2 for HP-UX and the bits should be ready for posting shortly.
We also start working with GCC community looking into the creation of
binary IR files for GCC.  It helps the IPO effort in GCC.

Vladimir Makarov:
-
I told about importance of early access to machines based on new
Itanium chip (Montecito) and documentation for gcc developers trying
to improve gcc for Itanium.

As for Mark Davis remark about rewriting RTL optimizations, I told
that it can not be done easily.

RTL is too complicated. On Andrew Macleod and my etsimation only
writing a new good register allocator is at least 2 years project.
Significtant simplifying rtl or usage another IR is even more
complicated task than introducing Tree-SSA because machine description
is very tied to RTL.

As an example, combine pass is based on outdated work of Fraser,
Proebsting etc.  They proposed to combine several intermidiate data
dependent insns into one machine insn with possible insn spliting
(that what define_split pattern serves in machine desc).  Since that
work they proposed fast and optimal solution of code selection task
with their BURG and IBURG system (finding minimal cost cover of tree
expression by machine insn patterns).  Moving to this algorithm needs
significant simplifying RTL (one rtl insn should be no more than part
of machine insn or just one machine insn).  That means rewritting all
machine desc files (simplier define_insn), removing define_split
patterns, rewriting other optimizations (e.g. reload assumes that all
moves/stores/loads of one mode is described by one define_insn
pattern).

Diego Novillo:
--
My focus over the last few weeks has been OpenMP and fixing bugs for
the 4.1 release.  I will create a branch so that folks can put their
work in it.  I need people to mail me so that I can coordinate write
access with them.

We discussed briefly some of the activity geared towards improving
GCC's backend.  The problem is well understood and various relatively
independent efforts are moving GCC in the right direction (IPA,
dataflow analysis improvements, scheduling, register allocation, move
high-level aliasing information into the backend).  It will probably
take a few releases to fix most of the glaring problems.



8 Dec 05 notes from GCC improvement for Itanium conference call

2005-12-16 Thread Mark K. Smith
ON THE CALL: Shin-ming Liu (HP), Vladimir Makarov (Red Hat), Diego
Novillo (Red Hat), Mark Smith (Gelato), Bob Kidd (UIUC), Mark Davis
(Intel)

A fair amount of time was spent discussing the pros and cons of LLVM
vs. LTO. Keep in mind that the next Gelato conference is coming up in
April 06. If you would like to speak in the GCC track, please contact
Mark Smith. Comments from each participant on the call can be found
below. 

NEXT MEETING: January 12th, 2006. Details will be emailed out prior to
the call.


Bob Kidd:
-
The ia64-improvements branch is up. I haven't had time to do much with
it, but I've checked it out and bootstrapped. I applied Steven
Bosscher's revised superblock patch, bootstrapped and tested it. I'm
looking at updating the branch to either 4.2 or CVS head and will
check in the superblock patch.


Shin-ming Liu:
--
 * HP has posted the GCC 4.0.2 source and binary package on HP site
   for HP-UX in November
 * HP is working toward the similar posting for Linux in the near 
   future
 * HP is actively participating in the LTO activity in GCC community
 * HP has started the alternative backend effort based on Open64 with
   several universities


Vladimir Makarov:
-
I asked Bob to tell more details about superblock scheduling he made.
Because the current version does not take predication into account, I
told that to get better results it is good to combine predication and
superblock forming in future. Also superblock scheduling could work
without profile information as it does currently according to Bob's
review. Gcc has decent evaluation of branch probabilities. It would be
reasonable to try how superblock scheduling will work with the branch
probabilities evaluation.

As for work status of ISP RAS team, they work on infrastructure for
another insn scheduling. It is a big project. They sent patch for
improvement of aliasing analysis for ia64. Diego Novillo and Daniel
Berlin are reviewing the patch. They'll send patch for speculation
support for review soon. It is control and data speculation support
with recovering code. Now it is necessary only for ia64 but it will be
useful for future Intel x86 and x86_64 processors which as I heard
will have  speculation support too.

As for LLVM, I told it is a very interesting research project. In any
case it will help to gcc finally and itself. We will see will it be
finally adopted in gcc. At least, it have more chances for that than
OpenRC with its WHIRL because transition of copyrights to FSF of LLVM
is more probable than one of OpenRC from SGI. But adoption of LLVM
should not  stop other project therefore LTO is a right thing to do.
The competition is good and there will be more chance to have
intermodule optimizations finally.

Additionally to the obstacles to adopt LLVM mentioned by Diego, I
named usage of C++ (although it has advantages too) and patents. LLVM
should be checked for usage of compiler patents. Gcc people avoided
many patents especially from Microsoft. We can not be sure right now
about LLVM.


Diego Novillo:
--
I talked about the new developments in GCC for doing link-time
optimizations.  We discussed both the LTO proposal and LLVM. Although
it's not clear at the moment which proposal will end up being adopted,
we all agreed this is an excellent sign that GCC will start evolving
in that direction.

I also talked about the new ia64-improvements branch and Dmitry's
alias patch. The ia64-improvements branch is ready for people to use.
I have started reviewing Dmitry's patch and will try to send feedback
in the next few days.


Mark Smith:
---
I will continue to work with Intel to secure a Montecito SDV to use
for GCC builds. Itanium Solutions Alliance has funded Bob Kidd's GCC
superblock work. 

I also talked about the upcoming Gelato conference in April 2006. We
want to have a strong GCC track at the meeting. Please consider
attending. Shin-ming and I will work together on designing the track.
If you would like to speak, please contact one of us.



Draft: 12 Jan 06 notes from GCC improvement for Itanium conference call

2006-01-19 Thread Mark K. Smith
ON THE CALL: Shin-ming Liu (HP), Vladimir Makarov (Red Hat), Diego
Novillo (Red Hat), Mark Smith (Gelato), Bob Kidd (UIUC), Andrey
Belevantsev (RAS), Arutyun Avetisyan (RAS) 

Dan Berlin (IBM) was not able to join the call but did email an
aliasing update (see below).

We spent some time up front discussing the GCC track at the upcoming
Gelato ICE conference (www.gelato.org/meeting). Potential topics and
speaker candidates include:

1) Parallel programming with GCC - Diego Novillo
2) Aliasing - Diego Novillo or Dan Berlin (Diego to coordinate with
Dan)
3) LLVM - Chris Lattner? (Mark will approach Chris)
4) LTO - Mark Mitchell? (Shin-ming will approach Mark M.)
5) ORC back end for GCC - Shin-Ming Liu
6) Superblock work - Bob Kidd
7) GCC IP issues - Dan Berlin? (Diego will ask Dan)
8) NUDT update - Canqun Yang? (Mark will approach Canqun)
9) RAS update - Andrey Belevantsev and Arutyun Avetisyan 
10) Intel micro-architecture talk - Cameron McNairy 

Also we discussed holding a face-to-face GCC Improvement meeting in
mid August in Moscow. Expected benefits: strong participation from
Europe GCC community, Intel Moscow, and RAS.

Updates from call participants can be found below.


NEXT MEETING: Feb 16th, 2006. Details will be emailed out prior to the
call.

Dan Berlin:
---
Update on aliasing:

Improvements to the actual points-to analyzer from the
improved-aliasing-branch of gcc have been merged into mainline.

This includes:

1. An initial implementation of interprocedural pointer analysis
(though this is disabled by default for the moment until i finish some
follow up patches).
2. Significantly better results for pointers inside structures.
3. Not punting on structures that contain arrays (we used to treat all
the fields like a single variable).

There is work by Richard Guenther on treating small arrays as if they
were structures so we can get better information about them (without
resorting to pair based querying).

Work on the aliasing query system for those optimizations that want to
disambiguate results for specific stores/loads better than we do now
will start soon on IAB.

Call clobbering changes from IAB are in the process of being merged
into the mainline.

This mainly consists of much better non-context sensitive
intraprocedural call clobbering information, combined with better use
of the interprocedural clobber information for static variables that
we compute.

Once the aliasing query system is done, i will revisit this and
implement some context-sensitive analysis for call clobbering to get
better results.

I also reviewed the patch for propagating points-to sets to RTL, and
sent the review to the list.

Andrey Belevantsev:
---
Dan Berlin has reviewed the alias propagation patch about two weeks
ago. Diego mentioned that his concerns about the patch are in line
with Dan's. I had a chance to read the review only recently due to the
mail problems of our provider. Dan has pointed out to the
implementation flaw of the patch, which is using varrays for storing
points-to sets instead of bitmaps. This should be fixed to avoid
memory and compilation time issues. There are some other less serious
issues and the coding style issues. We are going to fix all problems
pointed to by Dan and resend the patch.

We've sent five parts of the speculation patch to the gcc-patches
list, and Vladimir Makarov has taken them for the review. Some issues
were already raised in the list, mentioning documentation issues and
the effects of the patch for the other platforms. For the x86-64, the
influence of the patch is pretty neutral. We're going to address the
issues Vlad would probably raise in his review and then resend the
patch.

We're advancing in the implementation of the new scheduler. We're
working on the code motion part, which fixes the scheduling DAG and
the data sets after the selected insruction has been scheduled. Part
of those is already implemented and under testing. Another part we're
starting to work on is the selection of the best instruction for
scheduling from the set of available ones. We plan to adopt the
corresponding routines from the haifa scheduler.

Bob Kidd:
-
The Superblock formation pass now duplicates the loop header to allow
Superblock loops to be unrolled.  On a trivial test case, this
improves performance on x86_64 and PPC.  I'm currently benchmarking
the patch on SPEC.

Vladimir Makarov:
-
I am working on review of ISP RAS patch for control and data
specualtion support.  In general the patch is ok. As for idea of
gelato meeting devoted to gcc in Moscow, that is a not bad place
because gcc developers from Europe could be there. But probably time
(August) is not so good.

Diego Novillo:
--
I briefly described the OpenMP implementation and what it requires in
terms of runtime support.  It is now being merged into mainline to be
released with GCC 4.2.  The Fedora Core GCC 4.1 compiler will also
include it.

It should work well on Itani

ANNOUNCE: GCC track at Gelato ICE conference

2006-02-22 Thread Mark K. Smith
Dear GCC Community,

I wanted to let the GCC list know that the Gelato Federation is
holding a conference April 24-26 in San Jose. It is called Gelato ICE
(Itanium Conference & Expo). http://www.gelato.org/meeting 

The technical program is very robust (over 50 technical presentations)
covering a variety of Itanium-related topics: compilers, architecture,
reliability, security, java, virtualization, kernel, memory
management, and high-performance libraries to name a few. 

Of particular interest to this group are the compiler
presentations/sessions. Currently there are ten presentations
scheduled for the GCC track:

* LLVM - Chris Lattner 
* LTO - Mark Mitchell 
* Aliasing update - Dan Berlin
* Parallel programming with GCC - Diego Novillo
* ORC back end for GCC - Shin-Ming Liu 
* Superblock work - Bob Kidd 
* Russian Academy of Science scheduler improvement update - Andrey
Belevantsev and Arutyun Avetisyan
* Intel micro-architecture talk - Cameron McNairy
* Spec2006 - Gerolf Hoflehner (provided Spec2006 has been release at
conference time)
* GCC IP issues - Dan Berlin

We also have a round table scheduled with the Intel icc compiler team
and a talk on icc changes related to Montecito. Montecito is the next
generation of Itanium  due out in a few months.

Everyone is welcome to attend. Check http://www.gelato.org/meeting for
more details.

Mark



16 Feb 06 notes from GCC improvement for Itanium conference call

2006-02-27 Thread Mark K. Smith
ON THE CALL: Shin-ming Liu (HP), Vladimir Makarov (Red Hat), Diego
Novillo (Red Hat), Mark Smith (Gelato), Bob Kidd (UIUC), Andrey
Belevantsev (RAS), Arutyun Avetisyan (RAS), Mark Davis (Intel)

We spent some time up front discussing the GCC track at the upcoming
Gelato ICE conference (www.gelato.org/meeting). Confirmed
topics/speakers include:

* LLVM - Chris Lattner 
* LTO - Mark Mitchell 
* Aliasing update - Dan Berlin
* Parallel programming with GCC - Diego Novillo
* ORC back end for GCC - Shin-Ming Liu 
* Superblock work - Bob Kidd 
* Russian Academy of Science scheduler improvement update - Andrey
Belevantsev and Arutyun Avetisyan
* Intel micro-architecture talk - Cameron McNairy
* Spec2006 - Gerolf Hoflehner (provided Spec2006 has 
 been release at conference time)
* GCC IP issues - Dan Berlin

Updates from call participants can be found below.

NEXT MEETING: March 16th, 2006. Details will be emailed out prior to
the call.

Andrey Belevantsev:
---
We've fixed the alias propagation patch according to Dan Berlin's
suggestions and sent it to the list. Namely, bitmaps are now used
instead of varrays for storing points-to information; global flags are
moved to 'struct function' to be function local and avoid interference
with PA passes; coding style issues are fixed. Now we are looking for
further feedback from Dan and Diego.

Vladimir Makarov has approved one patch from the set of speculation
patches. Vlad has asked us to wait with committing until he'll review
all the rest. That's better because the separate patches don't allow
to use speculation. We've also slightly improved the probability patch
originally submitted by Peter Steinmetz and committed it (the thread
is at http://gcc.gnu.org/ml/gcc-patches/2006-01/msg02223.html).

We've implemented code motion routines of the new scheduler we're
working on. The routines perform DAG traversal in search of the
original forms of the operation being scheduled. When original
operation is found, it is either deleted or changed into a simple copy
operation. If the operation should be moved through a join point, a
bookkeeping copy should be added on all other paths. This logic is
implemented in a slightly different way depending on the type of the
operation we are moving (sequential or conditional branch). Now we
have focused on adapting the scheduling loop routines and the logic of
choosing the best instruction from the set of available ones from the
Haifa scheduler. The code motion part will be fully tested only after
implementation of these "scheduler frontend" routines.


Bob Kidd:
-
There's not much new on the superblock work. I will check the
superblock patch into the ia64-improvements tree later today. After
mainline is merged into the tree, I'll run some performance numbers.


Vladimir Makarov:
-
I was brief on the last teleconference.

I told that it is good to have some info about SPEC2006 and comparison
of Itanium gcc and icc on this benchmark.  Some discussion about
MMU->address bypass for Montecito.


Diego Novillo:
--
Mostly working on getting the OpenMP implementation in mainline. So
far the C and Fortran front end changes have been incorporated. The
C++ changes are being reviewed. It will be released with GCC 4.2.

I have also been working on changes to the aliasing infrastructure to
avoid some of the penalties we pay for representing alias relations
directly in the IL.

Other than that, it's been the usual maintenance work.



16 Mar 06 notes from GCC improvement for Itanium conference call

2006-03-22 Thread Mark K. Smith
ON THE CALL: Shin-ming Liu (HP), Vladimir Makarov (Red Hat), Mark
Smith (Gelato), Bob Kidd (UIUC), Andrey Belevantsev (RAS), Arutyun
Avetisyan (RAS), Mark Davis (Intel)  

Diego Novillo (Red Hat) was unable to join the call, but supplied an
update to include in these notes.

The GCC track at the upcoming Gelato ICE conference now finalized.
Gerolf Hoflehner's talk on SPEC2006 had to be canceled because of a
delay in its release. A new addition to the GCC track is Arutyun
Avetisyan who will give an RAS work overview and start soliciting
input for the August 2006 GCC meeting in Moscow. Confirmed
topics/speakers for the Gelato ICE GCC track include:

* Russian Academy of Science work overview and plans for August GCC
meeting in Moscow - Arutyun Avetisyan
* GCC IP issues - Dan Berlin
* LLVM - Chris Lattner 
* LTO - Mark Mitchell 
* ORC back end for GCC - Shin-Ming Liu 
* Aliasing update - Dan Berlin
* Russian Academy of Science scheduler improvement update - Andrey
Belevantsev 
* Superblock work - Bob Kidd 
* Parallel programming with GCC - Diego Novillo
* Intel micro-architecture talk - Cameron McNairy

For a detailed list of confirmed speakers and topics for Gelato ICE
2006, visit: www.gelato.org/meeting#agenda

Updates from call participants can be found below.

NEXT MEETING: At the Gelato ICE meeting in San Jose, CA, April 24-26,
2006.

Andrey Belevantsev:
---
Testing the aliasing patch with the latest mainline has revealed the
changes in structure aliasing, so we had to rewrite some code that
handles variables with structure field tags (SFTs). Now small arrays
could also be decomposed onto elements for the sake of better
aliasing. The other thing we fixed is more accurate propagation of
original tree expressions saved with MEMs during expand. We have sent
an updated patch to the gcc-patches list.

Vladimir Makarov has approved the speculation patch and provided
commetns on the ia64 part of the patch. We have fixed all issues
pointed to by Vladimir. After additional regtesting on ia64 and i686,
the patch was committed to trunk as rev. 112129. Earlier version of
the patch was also bootstrapped and regtested on sparc-solaris. Using
the patch on other platforms revealed some bugs (PR26275 and PR26734).
The fixes for those PRs are submitted to the list.

We have tested the basic features of code motion during this month. To
accomplish this task, the main scheduling loop was written. A single
iteration of the scheduling loop tries to form a group of
instructions, which could be executed in parallel during one cycle
(more or less corresponds to the instruction group of IA-64). At
first, code motion of entire instructions inside a basic block was
tested. Now we are testing interblock motions, which imply possible
creation of bookkeeping code. Code motion of conditional branches is
now disabled. Our next plans would be enable the code motion of
right-hand sides of expressions.

The last but not least, our paper proposal for GCC Summit 2006 has
been accepted. The paper will talk about new scheduler work, proposed
design and current state of implementation.


Bob Kidd:
-
(Bob had his paper proposal for the GCC Summit 2006 accepted. The
paper will cover the GCC superblock work in detail.)

I checked the Superblock patch into the ia64-improvements tree. This
patch has no significant effect on the overall estimated SPEC score
for ia64 or ppc, and a slight degradation on x86_64. On IA64, some
benchmarks run faster while others slow down. The overall score varies
by one point. I'm looking into the changed benchmarks to see what
causes the speedup or slowdown.

I investigated 300.twolf, which slows down when superblocks are formed
at the Tree-SSA level. One function (new_dbox_a) is significantly
slower with the superblock patch than without. This function takes a
pointer to an integer as an argument and updates the value of that
integer inside a hot loop. The loop is structured along these lines:

for (hot)
   if (cond) (biased)
 a = ...
   else
 a = ...
   *arg += a ...

Tail duplication generates two copies of the *arg += ... line, which
generates two copies of the load and store of arg. When tail
duplication is not done, PRE can move the load and store of arg out of
the loop, but it is unable to do this in the superblock loop. My
suspicion is that superblock formation needs to fix up the alias info
so that later optimizers realize these two loads are the same.


Shin-ming Liu
-
- HP has posted the GCC 4.1 release binary in HP portal for HP-UX:
www.hp.com/go/gcc

- HP submitted 11 patches to stock gcc and 3 patches to binutil

- The Alternative backend project has made reasonable progress. The
front end for this compiler still at 3.3.2. Both C and Fortran are
functional and achieved the similar performance as ORC 2.1. The
current focus is to update the backend to support Itanium C++ ABI.


Vladimir Makarov:
-
Probably Robert Kidd's superblock scheduling in gcc 

ANNOUNCE: GCC track at Gelato ICE finalized - April 24 & 25

2006-03-30 Thread Mark K. Smith
The following GCC track is part of the Gelato ICE (Itanium Conference
& Expo) technical program. All interested GCC developers are invited
to attend . A complete list of speakers and
topics can be found here: 

Monday Afternoon (4/24/06):
* 2:15 pm - Arutyun Avetisyan
  The ISP RAS Effort to Improve GCC for Itanium
  August '06 GCC meeting in Moscow
* 3:00 pm - Dan Berlin
  GCC IP issues
* 4:15 pm - Shin-Ming Liu
  An ORC Backend for GCC
* 5:00 pm - Cameron McNairy 
  Itanium 2 and Montecito Microarchitecture

Monday Night (4/24/06):
* 7:00 pm - Dan Berlin
  Aliasing in GCC
* 7:30 pm - Bob Kidd 
  Superblock Update
* 8:00 pm - Andrey Belevantsev
  An Interblock VLIW Targeted Instruction Scheduler for GCC  
* 8:30 pm - Diego Novillo 
  Parallel programming with GCC

Tuesday Afternoon (4/25/06):
* 2:30 pm - Mark Mitchell
  LTO: A Brief Introduction
* 3:30 pm - Chris Lattner
  LLVM: A Brief Introduction
  





ANNOUNCE: Gelato ICE GCC presentations available

2006-05-08 Thread Mark K. Smith
The following presentations from the Gelato ICE GCC track (April 24
and 25) can be found at: 
http://www.gelato.org/community/gelato_meeting.php?id=ICE06aprT
(see bottom of left index column entitled "Focus on GCC" for links)

- The ISP RAS Effort to Improve GCC for Itanium, Arutyun Avetisyan
- GCC IP Issues, Dan Berlin
- Open64: An Alternative Backend for GCC, Shin-Ming Liu
- Aliasing in GCC, Dan Berlin
- Superblock Update, Robert Kidd 
- An Interblock VLIW-Targeted Instruction Scheduler for GCC, 
  Andrey Belevantsev 
- Parallel Programming with GCC, Diego Novillo
- LTO: A Brief Introduction, Mark Mitchell
- LLVM: A Brief Introduction, Chris Lattner



ANNOUNCE: Gelato GCC Improvement on Itanium Workshop Summary, 7-8 August, Moscow Russia

2006-08-18 Thread Mark K. Smith
A meeting of the Gelato GCC Improvement on Itanium Workgroup took
place August 7 & 8, 2006 in Moscow, Russia. The workshop was hosted by
the Institute for System Programming at the Russian Academy of
Sciences and was sponsored by Intel and HP.
http://gcc.gelato.org/MoscowMeeting

Compiler experts from the GCC open-source community, Red Hat, SuSE,
Intel, HP, and the Gelato Member community discussed specific GCC
improvements for the Itanium platform. Several key areas were
identified to improve Itanium GCC performance.
http://gcc.gelato.org/MeetingNotes

Presentations from the workshop (all presentations can be found at
http://gcc.gelato.org/MoscowMeeting):

  *  An Architectural Overview of GCC, Diego Novillo 
  *  GCC RTL Backend, Steven Bosscher 
  *  The IA64 Backend in GCC, Jim Wilson 
  *  LTO in GCC, Ken Zadeck 
  *  LNO in GCC, Sebastian Pop 
  *  PDO in GCC, Jan Hubicka 
  *  Itanium Architecture and ICC Tutorial, Mark Davis 
  *  Performance Metrics & Measurement, Shin-Ming Liu 
  *  CERN Loops Dissected, Sverre Jarp 
  *  Alias Analysis in GCC, Diego Novillo 
  *  Software Pipelining in GCC, Vladimir Makarov 
  *  Data Prefetching in GCC, Zdenek Dvorak 
  *  Instruction Scheduling in GCC, Vladimir Makarov 
  *  Superblock Update, Robert Kidd 
  *  ISP RAS Scheduling Update, Andrey Belevantsev