Disjoint address register problem during GCC port

[Manish Verma]

Hi all,

 I am trying to port GCC to a new DSP architecture (hopefully will be
made public soon) and I am having a little bit of difficulty in making
GCC to generate code. The reason is that our DSP architecture has
non-orthogonal and segmented (disjoint) address register files (e.g.
A, B and D). Also, all arithmetic operations access memory through
indirect addressing and have restrictions on which register files can
be used as which operand or destination. In addition, they support
offset addressing and post-increment and post-decrement modes.

 For example, MULToperation have the restriction
that  must be a register from REG_D. The operand  must be a
register from REG_A and operand  from REG_B and vice-versa.

 I have defined three register classes (REG_D={d0, ..., d3}, REG_A,
REG_B), set up BASE_REGISTER_CLASS appropriately to make GCC generate
the code of the following form:

  MULT [d0], [a0], [b0]  // d[i] = a[i] * b[i]

 However, I am having problems for GCC to generate the code of the
following form:

  MULT [d0], [a0+1], [b0+2] // d[i] = a[i+1] * b[i+2]

 I am using EXTRA_CONSTRAINT to segregate address registers according
to the address classes.
#define EXTRA_CONSTRAINT(OP, C) \
( (C) == 'Q' ? pica_A_constraint(op,c) \
: (C) == 'R' ? pica_B_constraint(op,c) \
: (C) == 'S' ? pica_D_constraint(op,c) \
: 0)

I have also defined EXTRA_MEMORY_CONSTRAINT appropriately. However, I
keep on getting "error: impossible constraint in 'asm'" error. Any
help on this aspect of GCC would be very much appreciated.

On this issue, I also would like to ask:
(a) Is it possible to have segmented (disjoint) address classes in GCC?
(b) I am using GCC 4.0.2 and I noticed that in the gcc version 4.3.0
has EXTRA_CONSTRAINT is marked as obsolete. Should I use
EXTRA_CONSTRAINT or should I use some other way of specifying an
address register class?

Regards,
Manish

PS: Thanks Andrew for directing me to the right mailing list.
-----
Manish Verma
Altera European Technology Centre,
High Wycombe, UK

Write-only registers and regmove pass

[Manish Verma]

Hi all,

   I am porting GCC to a weird architecture and I have stumbled over
this small problem. The architecture has write-only registers (er0 -
er7) for I/O operations, reading values from these registers is
forbidden. For the following code:

register int ER0 asm("er0");
int main() {
  int a, b;

   ER0 = a;
   b  = a +1;   // copy propagation --> b = ER0 + 1;
   return b;
}

Regmove pass converts b = a +1 into b = ER0 + 1, which is not allowed
as er0 is a write-only register. I went through the code in regmove.c
and found that it was not properly checking whether such a
transformation satisfies the instruction constraints.

Currently, I have done a point fix to stop regmove to copy propogate
if the destination register (er0) is write-only.

I would like to ask the GCC gurus, if there is proper/nicer way to
handle this problem? Or if this problem has already been solved in the
latest version of GCC? We are using gcc-4.0.2.

Thank you very much for your time,
Best Regards,
Manish

-----
Dr. Manish Verma
Altera European Technology Centre,
High Wycombe, UK