Flag of inline assembly ??

[Ching-Hua Chang]

Hi,

Is there a flag in gcc that indicate that we are in the inline assembly ?

thanks,

Aladdin

Addressing mode in inline assembly

[Ching-Hua Chang]

Hello ,

  If it is possible to restrict the addressing mode
  of inline assembly?

  For example,in normal mode that we accept the
  addressing mode BASE+OFFSET, but do not like
  it in inline assembly.

  Is there any one can give me a hand?

  thanks a lot!

  Aladdin

Problem in function in-lining

[Ching-Hua Chang]

We had ported gcc-3.4.2 to our own RISC, and meet a strange
case in optimization level 3 (-O3).

The compiler produce wrong assembly code in O3 and
correct result if we add -fno-inline flag.

It seems that there some problem in function in-lining.
What can I do and what should I do to solve this problem ?



Source : xyz.c

...
... skip
...
#undef errno
int errno;
int _write (int fd, char *buf, int nbytes);

#ifdef REENTRANT_SYSCALLS_PROVIDED
volatile
int
_write_r (struct _reent *r, int fd, char *buf, int nbytes)
{
return _write(fd, buf, nbytes);
}
#endif
/*
  * write -- write bytes to the serial port. Ignore fd, since
  *  stdout and stderr are the same. Since we have no filesystem,
  *  open will only return an error.
  */
int
_write (int fd, char *buf, int nbytes)
{
  __asm__ volatile ("li r8,2"
:::"r8");
  SemiHostedSyscall ();
}


Assembly file genereated with O3 optimization
==

.text
.align2
.globl_write
.ent_write
_write:
.framer0,0,r3, 1# vars= 0, regs= 0,
args= 0, gp= 0
.mask0x,0
#APP
.set volatile
li r8,2
sdbbp 0xb
mv r4, r4
mv r5, r11
#NO_APP
.set optimize
swr5,errno
br!r3
.end_write
.align2
.globl_write_r
.ent_write_r
_write_r:
.framer0,0,r3, 1# vars= 0, regs= 0,
args= 0, gp= 0
.mask0x,0
#APP
.set volatile
li r8,2
sdbbp 0xb ==> inline function call _write with worng arguments
mv r4, r4
mv r5, r11
#NO_APP
.set optimize
swr5,errno
br!r3
.end_write_r

.commerrno,4,4

Assembly file genereated with O3 and -fno-inline flag
==

.text
.align2
.globl_write
.ent_write
_write:
.framer0,0,r3, 1# vars= 0, regs= 0,
args= 0, gp= 0
.mask0x,0
#APP
.set volatile
li r8,2
sdbbp 0xb
mv r4, r4
mv r5, r11
#NO_APP
.set optimize
swr5,errno
br!r3
.end_write
.align2
.globl_write_r
.ent_write_r
_write_r:
.framer0,0,r3, 1# vars= 0, regs= 0,
args= 0, gp= 0
.mask0x,0
mv! r4, r5
mv! r5, r6
mv! r6, r7
j_write
.end_write_r

.commerrno,4,4

Reload problem

[Ching-Hua Chang]

Hi,
  I had wrote doloop_end instruction to support hwloop.
  When try to compile linux kernel, I meet a reload problem,
  the error message as follow.

  What kinds of instuction pattern should I add to support
  the reload that compiler need ?

  Thanks,
  Aladdin


  the constrant 'q' mean the non-general "counter" register

(define_expand "doloop_end"
  [(use (match_operand:SI 0 "register_operand" ""))
   (use (match_operand:SI 1 "const_int_operand" ""))
   (use (match_operand:SI 2 "const_int_operand" ""))
   (use (match_operand:SI 3 "const_int_operand" ""))
   (use (label_ref (match_operand 4 "" "")))]
  ""
{
if(operands[3] != const1_rtx || flag_unroll_loops ||
flag_unroll_all_loops)
FAIL;
emit_jump_insn(gen_bcounter(operands[0], operands[4]));
DONE;
})

(define_insn "bcounter"
  [(set(pc) (if_then_else
(ge (match_operand:SI 0 "register_operand" "=q") (const_int 0))
 (label_ref (match_operand 1 "" ""))
(pc)))
   (set(match_dup 0)
(plus:SI (match_dup 0)
(const_int -1)))]
  ""
  "bcnz %1"
  [(set_attr "type" "branch")])


Error message
===
panic.c: In function `panic':
panic.c:104: error: unable to generate reloads for:
(jump_insn 222 152 158 7 (parallel [
(set (pc)
(if_then_else (ge (reg:SI 5 r5 [orig:199 msec ] [199])
(const_int 0 [0x0]))
(label_ref 224)
(pc)))
(set (reg:SI 5 r5 [orig:199 msec ] [199])
(plus:SI (reg:SI 5 r5 [orig:199 msec ] [199])
(const_int -1 [0x])))
]) 0 {bcounter} (nil)
(expr_list:REG_BR_PROB (const_int 8900 [0x22c4])
(nil)))
panic.c:104: internal compiler error: in find_reloads, at reload.c:3672
Please submit a full bug report,
with preprocessed source if appropriate.
See http://gcc.gnu.org/bugs.html> for instructions.

How to pass option to arch-linux-elf-run in dejagnu

[Ching-Hua Chang]

Hi,
I'm trying to test our Compiler (ported from gcc-3.4.2) using the gcc
test suite.
According to some reasons, I need to pass some options to arch-linux-elf-run in
the dejagnu frame work. Is there anyone can give me a hint about his?

Thanks in advance,
Aladdin