Re: gcc 10 fpcr

[Uros Bizjak via Gcc]

Hello!

> Over at RTEMS, we have had a report that this very old code has quit
> compiling:
>
> #ifdef __SSE__
> #define _CPU_Context_restore_fp(fp_context_pp) \
>  do { \
>__asm__ __volatile__(  \
>  "fldcw %0"   \
>  ::"m"((*(fp_context_pp))->fpucw) \
>  :"fpcr"  \
>); \
>__builtin_ia32_ldmxcsr(_Thread_Executing->fp_context->mxcsr);  \
>  } while (0)
> #else
>
> The error is "error: unknown register name 'fpcr' in 'asm'"

Just remove the fpcr clobber. FP control register was never properly handled.

Please also note gcc manual section "6.47.2.1 Volatile", where the
manual discusses similar case of a system register that controls the
rounding mode of floating-point operations. You have to add an
artificial dependency to the asm by referencing a variable in the
subsequent code, otherwise the compiler may move the access to system
register across the arithmetic insn.

Uros.

gcc-10-20200419 is now available

[GCC Administrator via Gcc]

Snapshot gcc-10-20200419 is now available on
  https://gcc.gnu.org/pub/gcc/snapshots/10-20200419/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.

This snapshot has been generated from the GCC 10 git branch
with the following options: git://gcc.gnu.org/git/gcc.git branch master 
revision 717e91dbc44c6bf55a498f45f6045191ceb10a11

You'll find:

 gcc-10-20200419.tar.xz   Complete GCC

  SHA256=fa5c64eb77e4a4b44d1f732c907aaecdaa51302e823af8ca1e4ecab00dfb26ac
  SHA1=a011c544aa3173f5794cfb5a50f5829b9bcb836f

Diffs from 10-20200412 are available in the diffs/ subdirectory.

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