Help forging a function_decl
Hello there, Please disregard this message in case it doesn't fit here. During compilation of a C file, I need to be able to create a global function definition, with whatever a body I may have forged. I mean, the function is not going to be present in the source file and I got to create the respective tree structure so it can be later gimplified and further compiled like any other function present in the source. I would only need to create that function in case some OpenMP directive is encountered, so my latest and unsuccessful try to do so was to create the tree structures for a FUNCTION_DECL and, say, a variable declared inside the scope of that function, after the parsing of a #pragma omp parallel in c_parser_omp_parallel() in file c-parser.c. I followed and tried to re-create the steps I found in the function create_omp_child_function(), in file omp-low.c, and http://gcc.gnu.org/onlinedocs/gccint/Function-Basics.html#Function-Basics. I think maybe the problem is that my new function doesn't go under rest_of_compilation, therefore it is not gimplified and obviously no code for it is generated. Summarizing: I tried to forge a function in parsing time, but couldn't. What am I doing wrong, and how can one do such a thing? Maybe the problem is that I create no calls to that new function, what do you think? Anyway, I'm compiling with -O0, so I guess no optimization pass would remove my function just because it is not being used. Thanks in advance, --- Rodolfo Guilherme Wottrich Universidade Estadual de Campinas - Unicamp
Why high vsr registers [vsr32 - vsr63] are not used when -mvsx is specified on powerpc?
Hi When I tried to build 444.namd with options "-O2 -m64 -mvsx -mcpu=power7", I can see vsx instructions are actually used, there are many xs- started instructions, but none of them use high registers [vsr32 -vsr63], does anybody know the reason? One example is function calc_pair_energy_fullelect in file ComputeNonbondedUtil.o, there are many vsr register spilling but high vsr registers are never used. thanks Carrot
Re: Why high vsr registers [vsr32 - vsr63] are not used when -mvsx is specified on powerpc?
On Wed, Jul 17, 2013 at 7:27 PM, Carrot Wei wrote: > Hi > > When I tried to build 444.namd with options "-O2 -m64 -mvsx > -mcpu=power7", I can see vsx instructions are actually used, there are > many xs- started instructions, but none of them use high registers > [vsr32 -vsr63], does anybody know the reason? > > One example is function calc_pair_energy_fullelect in file > ComputeNonbondedUtil.o, there are many vsr register spilling but high > vsr registers are never used. For scalar floating point, not vector floating point, GCC currently uses only the lower VSRs because the upper registers only allow indexed addressing modes (register + register) and not displacement forms. It's one register class with different valid addressing forms depending on the register number, which is difficult for GCC. We did not want to disable displacement address form in the initial support. Mike Meissner currently is working on patches for the PPC backend to improve this through reload hooks. Thanks, David
